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Datasheet IRLR7843
Datasheet IRLR7843
IRLR7843CPbF
IRLU7843CPbF
Applications HEXFET® Power MOSFET
l High Frequency Synchronous Buck VDSS RDS(on) max Qg
3.3m:
Converters for Computer Processor Power
l High Frequency Isolated DC-DC 30V 34nC
Converters with Synchronous Rectification
for Telecom and Industrial Use
l Lead-Free
Benefits
l Very Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance D-Pak I-Pak
l Fully Characterized Avalanche Voltage IRLR7843CPbF IRLU7843CPbF
and Current
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.05
RθJA Junction-to-Ambient (PCB Mount) g ––– 50 °C/W
RθJA Junction-to-Ambient ––– 110
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Avalanche Characteristics
Parameter Typ. Max. Units
EAS Single Pulse Avalanche Energy d ––– 1440 mJ
IAR Avalanche Current c ––– 12 A
EAR Repetitive Avalanche Energy c ––– 14 mJ
Diode Characteristics
Parameter Min. Typ. Max. Units Conditions
IS Continuous Source Current ––– ––– 161 f MOSFET symbol
(Body Diode) A showing the
ISM Pulsed Source Current ––– ––– 620 integral reverse
(Body Diode)c p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.0 V TJ = 25°C, IS = 12A, VGS = 0V e
trr Reverse Recovery Time ––– 39 59 ns TJ = 25°C, IF = 12A, VDD = 15V
Qrr Reverse Recovery Charge ––– 36 54 nC di/dt = 100A/µs e
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
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1000 1000
VGS VGS
TOP 10V TOP 10V
4.5V 4.5V
3.7V 3.7V
3.5V 3.5V
100 3.3V 3.3V
3.0V 3.0V
2.7V 100 2.7V
BOTTOM 2.5V BOTTOM 2.5V
10
2.5V
10
2.5V
1
1000 2.0
ID = 30A
RDS(on) , Drain-to-Source On Resistance
VGS = 10V
ID, Drain-to-Source Current (Α)
100 1.5
T J = 175°C
(Normalized)
T J = 25°C
10 1.0
VDS = 15V
20µs PULSE WIDTH
1 0.5
2.0 3.0 4.0 5.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
100000 12
VGS = 0V, f = 1 MHZ ID= 12A
Ciss = C gs + Cgd, C ds SHORTED VDS= 24V
10000 8
Ciss
6
Coss 4
1000
Crss 2
0
100
0 20 40 60 80
1 10 100
Q G Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
1000.0 10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100.0 1000
T J = 175°C
10.0 100
100µsec
1.0 10
T J = 25°C 1msec
Tc = 25°C
VGS = 0V Tj = 175°C
Single Pulse 10msec
0.1 1
0.0 0.5 1.0 1.5 0.1 1.0 10.0 100.0 1000.0
VSD, Source-toDrain Voltage (V) VDS , Drain-toSource Voltage (V)
160 2.5
LIMITED BY PACKAGE
1.5
80
1.0
40
0.5
0
0.0
25 50 75 100 125 150 175
-75 -50 -25 0 25 50 75 100 125 150 175
T C , Case Temperature (°C)
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs. Fig 10. Threshold Voltage vs. Temperature
Case Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50
0.20
R1 R2
0.1 0.10 R1 R2 Ri (°C/W) τi (sec)
τJ τC
0.05 τJ τ 0.5084 0.000392
τ1 τ2
τ1 τ2 0.5423 0.011108
0.02
0.01 Ci= τi/Ri
0.01 Ci= i/Ri
Notes:
SINGLE PULSE 1. Duty Factor D = t1/t2
( THERMAL RESPONSE ) 2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006 1E-005 0.0001 0.001 0.01 0.1
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IRLR/U7843CPbF
15V
6000
RG D.U.T 4000
+
V
- DD
IAS A
20V
VGS 3000
tp 0.01Ω
1000
V(BR)DSS
tp
0
25 50 75 100 125 150 175
12V .2µF
.3µF
Fig 14a. Switching Time Test Circuit
+
V
D.U.T. - DS VDS
90%
VGS
3mA
10%
IG ID
Current Sampling Resistors
VGS
td(on) tr td(off) tf
Fig 13. Gate Charge Test Circuit
Fig 14b. Switching Time Waveforms
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IRLR/U7843CPbF
VGS=10V *
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
- • Low Leakage Inductance
D.U.T. ISD Waveform
Current Transformer
+
Reverse
-
+
Recovery
Current
Body Diode Forward
Current
- di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
VDD
Ripple ≤ 5% ISD
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Vds
Vgs
Vgs(th)
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IRLR/U7843CPbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Special attention has been given to the power losses The power loss equation for Q2 is approximated
in the switching elements of the circuit - Q1 and Q2. by;
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the Ploss = Pconduction + Pdrive + Poutput
*
MOSFET, but these conduction losses are only about
one half of the total losses.
+ (Qg × Vg × f )
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
⎛ Qoss
+ × Vin × f ⎞ verse recovery charge Qrr both generate losses that
⎝ 2 ⎠ are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
This simplified loss equation includes the terms Qgs2 MOSFETs’ susceptibility to Cdv/dt turn on.
and Qoss which are new to Power MOSFET data sheets. The drain of Q2 is connected to the switching node
Qgs2 is a sub element of traditional gate-source of the converter and therefore sees transitions be-
charge that is included in all MOSFET data sheets. tween ground and Vin. As Q1 turns on and off there is
The importance of splitting this gate-source charge a rate of change of drain voltage dV/dt which is ca-
into two sub elements, Qgs1 and Qgs2, can be seen from pacitively coupled to the gate of Q2 and can induce
Fig 16. a voltage spike on the gate that is sufficient to turn
Qgs2 indicates the charge that must be supplied by the MOSFET on, resulting in shoot-through current .
the gate driver between the time that the threshold The ratio of Qgd/Qgs1 must be minimized to reduce the
voltage has been reached and the time the drain cur- potential for Cdv/dt turn on.
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Q gs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Figure A: Qoss Characteristic
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D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
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IRLR/U7843CPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
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D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Repetitive rating; pulse width limited by Calculated continuous current based on maximum allowable
max. junction temperature. junction temperature. Package limitation current is 30A.
Starting TJ = 25°C, L = 20mH, RG = 25Ω,
When mounted on 1" square PCB (FR-4 or G-10 Material).
IAS = 12A. For recommended footprint and soldering techniques refer to
Pulse width ≤ 400µs; duty cycle ≤ 2%. application note #AN-994.
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Visit us at www.irf.com for sales contact information. 05/2006
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