SNR008

8M-bit Mask ROM

======== Contents ========

1. INTRODUCTION............................................................................................................... 3

2. FEATURES ....................................................................................................................... 3

3. PIN ASSIGNMENTS ......................................................................................................... 3

4. Memory mapping for AD Bus Interface......................................................................... 4

5. ABSOLUTE MAXIMUM RATINGS................................................................................... 5

6. ELECTRICAL CHARACTERISTICS ................................................................................ 5

7. Application circuit ........................................................................................................... 6

7.1 AD Bus Interface (with SNC710) .................................................................................. 6

7.2 Standard ROM interface (with SNL310) ....................................................................... 7

8. BONDING PAD ................................................................................................................. 8

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Ver. 1.3 August 29, 2003
 SNR008
8M-bit Mask ROM

AMENDENT HISTORY
Version Date Description
Ver 1.0 March 11, 2003 V1.0 first issue
Ver 1.1 April 18, 2003 Modify the pin assignment table
Add bonding pad information & application circuit
Ver 1.2 April 21, 2003 Modify application circuit & bonding pad information
Ver 1.3 August 29, 2003 Modify operation current from typ.4mA -> MAX. 4mA
Modify access time Max = 200ns in
Electrical Characteristic

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Ver. 1.3 August 29, 2003
 SNR008
8M-bit Mask ROM

1. INTRODUCTION
The SNR008 is a signal power, 8M-bit, read only memory. It is organized as 1M bytes,
operates for single 3V power supply, support static standby mode. The SNR008
embedded two different interfaces, one is a standard 8-bit interface bus which
compatible with SNL310, another one is a special 8-bit AD (address/data) bus which
compatible with SNC710.
SNR008 offers automatic power-down, with power-down controlled by the chip enable
“CE\”. When chip enable goes to high, SNR008 will entry power-down mode in order to
save the power consumption.

2. FEATURES
♦ Power supply: 2.4V ~ 3.6V
♦ Memory Size: 8M-bit
♦ Totally static operation
♦ Embedded a standard 8-bit bus interface compatible with SNL310 or a 8-bit AD
(address/data) bus interface compatible with SNC710
♦ Access time: 200ns @3V

3. PIN ASSIGNMENTS

Symbol I/O Standard ROM interface AD Bus interface

TYPE I 1: Standard ROM type 0: AD Bus interface
A[8..19] I Standard ROM Address [8..19] NC
A[7] I Standard ROM Address A7 TESTM
A[6] I Standard ROM Address A6 Bank Select 4
A[5] I Standard ROM Address A5 Bank Select 3
A[4] I Standard ROM Address A4 Bank Select 2
A[3] I Standard ROM Address A3 Bank Select 1
A[2] I Standard ROM Address A2 Bank Select 0
A[1] I Standard ROM Address A1 ALECLK
A[0] I Standard ROM Address A0 READY
D[0..7] I/O Standard ROM Data [0..7] Address/Data bus [0..7]
CEB I Standard ROM Chip Enable Chip Enable
OEB I Standard ROM Output Enable NC
VDD P 3.3volt Positive Power supply 3.3volt Positive Power supply
GND P Ground Ground

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 SNR008
8M-bit Mask ROM

4. Memory mapping for AD Bus Interface

For 8-bit AD (address/data) bus interface, all the address and data communication
between SNC710 and SNR008 are through data bus D[0..7]. SNC710 allows user to
connect maximum 2 external mask ROM, and SNR008 has 5 bank select pins
(BS0~BS4) to specify the memory region of each mask ROM.

BS4~BS0 Address Region BS4~BS0 Address Region

00100 0x0200000 ~ 0x027FFFF 10010 0x0900000 ~ 0x097FFFF
00101 0x0280000 ~ 0x02FFFFF 10011 0x0980000 ~ 0x09FFFFF
00110 0x0300000 ~ 0x037FFFF 10100 0x0A00000 ~ 0x0A7FFFF
00111 0x0380000 ~ 0x03FFFFF 10101 0x0A80000 ~ 0x0AFFFFF
01000 0x0400000 ~ 0x047FFFF 10110 0x0B00000 ~ 0x0B7FFFF
01001 0x0480000 ~ 0x04FFFFF 10111 0x0B80000 ~ 0x0BFFFFF
01010 0x0500000 ~ 0x057FFFF 11000 0x0C00000 ~ 0x0C7FFFF
01011 0x0580000 ~ 0x05FFFFF 11001 0x0C80000 ~ 0x0CFFFFF
01100 0x0600000 ~ 0x067FFFF 11010 0x0D00000 ~ 0x0D7FFFF
01101 0x0680000 ~ 0x06FFFFF 11011 0x0D80000 ~ 0x0DFFFFF
01110 0x0700000 ~ 0x077FFFF 11100 0x0E00000 ~ 0x0E7FFFF
01111 0x0780000 ~ 0x07FFFFF 11101 0x0E80000 ~ 0x0EFFFFF
10000 0x0800000 ~ 0x087FFFF 11110 0x0F00000 ~ 0x0F7FFFF
10001 0x0880000 ~ 0x08FFFFF 11111 0x0F80000 ~ 0x0FFFFFF
Table-1

Note: For the address region 0x00000~0x01FFFFF are reserved, and the setting
of bank select pins BS4~BS0 CAN’T be the range 0000~0x0011.

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 SNR008
8M-bit Mask ROM

5. ABSOLUTE MAXIMUM RATINGS

Items Symbol Min Max Unit.

Supply Voltage VDD-V -0.3 6.0 V
Input Voltage VIN GND-0.3 VDD+0.3 V
o
Operating Temperature TOP 0 55 C
o
Storage Temperature TSTG -55.0 125.0 C

6. ELECTRICAL CHARACTERISTICS

Item Sym. Min. Typ. Max. Unit Condition

Operating Voltage VDD 2.4 - 3.6 V
Standby current ISBY - 1.5 2.0 uA VDD=3V, no load
Operating Current IOPR - 4 - mA VDD=3V, no load
Address access time tAA - - 200 ns Vdd=3V

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Ver. 1.3 August 29, 2003
 SNR008
8M-bit Mask ROM

7. Application circuit
7.1 AD Bus Interface (with SNC710)

VDD3V

U1 SNC710

9 12
VDD CVDD 33 U1
45 CVDD 53
VDD3V VDD CVDD
58 AD0 1
ROM#1
VDD AD0
LXIN
22 47uF AD1
AD2
2
AD1 0x200000-0x27FFFF
3
220K AD3 4 AD2
GND 5 AD3
51 21 AD4 6 GND
RST LXOUT AD5 7 AD4
49 AD6 8 AD5
0.1uF TEST 50 330 AD7 9 AD6
48 P0.0 VDD3V 10 AD7
CKSEL 54 330 CE_ 11 VDD
20 P0.1 READY 12 CEB
EXTM 55 330 ALECLK 13 READY
P0.2 GND 14 ALECLK
15pF

56 330 GND 15 GND

26 P0.3 GND 16 BS0
XIN 57 330 VDD3V 17 BS1
16MHZ

P0.4 GND 18 BS2

60 330 GND 19 BS3
27 P0.5 20 BS4
XOUT 61 330 TESTM
P0.6
15pF

TYPE

VDD
62 330

NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
P0.7
44 1
BP0 P0.8

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
46 2 SNR008
BN0 P0.9 3
P0.10

VDD3V

VDD3V
SPEAKER 24 4
VO P0.11 5 3V
23 P0.12 6
VDD P0.13 7 1 1
25 P0.14 8 2 2 U2
VDD3V

Extension ROM card

GND P0.15 3 3
4 4
TR1 10 42
VDD3V
5 AD0 ROM#2
ROM Interface

5 1
P1.0 AD0 AD0
AD1
41 6 6 AD1
AD2
2
AD1 0x280000-0x2FFFFF
TR2 11 40 7 7 3
P1.1 AD2 39 8 8 AD3 4 AD2
TR3 14 AD3 9 9 GND 5 AD3
P1.2 37 10 10 AD4 6 GND
TR4 15 AD4 36 11 11 AD5 7 AD4
P1.3 AD5 35 12 12 AD6 8 AD5
TR5 16 AD6 34 13 13 AD7 9 AD6
P1.4 AD7 14 14 VDD3V 10 AD7
VDD3V VDD
TR6 17 32 15 15 CE_ 11
P1.5 CEB 31 16 16 READY 12 CEB
TR7 18 CEIN 30 17 17 ALECLK 13 READY
P1.6 READY 29 18 18 GND 14 ALECLK
TR8 19 ALECLK 28 VDD3V 15 GND
GND
GND
GND
GND
GND
GND

P1.7 CLKIN GND 16 BS0

CONN 18 CONN 18 VDD3V 17 BS1
GND 18 BS2
BS3
13
38
43
47
52
59

GND 19
20 BS4
TESTM
TYPE

VDD
NC

NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
SNR008
VDD3V

VDD3V

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 SNR008
8M-bit Mask ROM

7.2 Standard ROM interface (with SNL310)

VDD VDD VDD

U1
SNL310

3 26
VDD CVDD
19 85

15pF
VDD CVDD 1.5V

C4
VDD 37 2
VDD LXIN C6

32768HZ
48 47uF 1.5V

Y2
VDD
R1 60 1
VDD LXOUT
220K

C5

15pF
79
VDD
RST 83 90 P2_0
RST P2.0 89 P2_1
P2.1 88 P2_2
C1 52 P2.2 87 P2_3
CKSEL P2.3 86 P2_4 VDD VDD
0.1uF P2.4 82 P2_5
53 P2.5 81 P2_6 U2
TESTM P2.6 80 P2_7
P2.7 78 P2_8 10
P2.8 P2_9 VDD
15pF

77 23 C7
C2

6 P2.9 76 P2_10 VDD 0.1uF

XIN P2.10 75 P2_11 12 A0
16MHZ

P2.11 74 P2_12 D0 1 READYB/A0 13 A1

Y1

P2.12 73 P2_13 D1 2 AD0/D0 ALECLK/A1 15 A2

7 P2.13 72 P2_14 D2 3 AD1/D1 BS0/A2 16 A3
XOUT P2.14 71 P2_15 D3 4 AD2/D2 BS1A3 17 A4
15pF

C3

P2.15 D4 6 AD3/D3 BS2/A4 18 A5

70 D5 7 AD4/D4 BS3/A5 19 A6
47 P3.0 69 D6 8 AD5/D5 BS4/A6 20 A7
49 BP0 P3.1 68 D7 9 AD6/D6 TESTM/A7 24 A8
BN0 P3.2 67 AD7/D7 A8 25 A9
4 P3.3 66 A9 26 A10
SPEAKER VO P3.4 65 A10 27 A11
A16 25 P3.5 64 A11 28 A12
A17 24 P5.0 P3.6 63 A12 29 A13
A18 23 P5.1 P3.7 61 CEB 11 A13 30 A14
A19 22 P5.2 P3.8 59 CEB A14 31 A15
A20 21 P5.3 P3.9 58 RDB 22 A15 32 A16
A21 20 P5.4 P3.10 57 OEB A16 33 A17
18 P5.5 P3.11 56 21 A17 34 A18
P5.6 P3.12 VDD TYPE A18
RDB 16 55 CEB 35 A19

GND

GND
D0 15 P5.7 P3.13 54 A19
D1 14 P5.8 P3.14 51
D2 13 P5.9 P3.15
P5.10

14
D3 12 SNR008
D4 11 P5.11 41
D5 10 P5.12 GND 46
D6 9 P5.13 GND 84
D7 8 P5.14 GND 50
P5.15 GND
5
17 GND
28 GND
P4.15
P4.14
P4.13
P4.12
P4.11
P4.10

GND
P4.9
P4.8
P4.7
P4.6
P4.5
P4.4
P4.3
P4.2
P4.1
P4.0
27
29
30
31
32
33
34
35
36
38
39
40
42
43
44
45
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

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Ver. 1.3 August 29, 2003
 SNR008
8M-bit Mask ROM

8. BONDING PAD

35 A19
34 A18
33 A17
32 A16
31 A15
30 A14
29 A13
28 A12
(0.00,0.00) 27 A11
26 A10
25 A9
24 A8
23 VDD
22 OEB
21 TYPE

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
AD1/D1
AD2/D2
AD3/D3

AD6/D6
AD7/D7
AD5/D5
AD0/D0

BS0/A2
BS1/A3

BS4/A6
TESTM/A7
GND

VDD
CEB

GND
READY/A0
ALECLK/A1

Note: The substrate MUST be connected to Vss in PCB layout.

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Ver. 1.3 August 29, 2003
 SNR008
8M-bit Mask ROM

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Ver. 1.3 August 29, 2003