ADAMA UNIVERSITY

SCHOOL OF ENGINEERING AND INFORMATION TECHNOLOGIES

DEPARTMENT OF INFORMATION TECHNOLOGIES
Computer Organization and architecture (IT 3101)
Instructor: Abraham Tesso & Genet Shanko ASSIGNMENT 10%
Submission Deadline: Friday December 10, 2010 in the morning from 9:00 to 11:00 at the instructors
office of at the DEPARTMENT OF INFORMATION TECHNOLOGIES Secretary office.
1. Compute 0.1110110 x 2 6 + 234.365 + 0.234 + - 23.321 using floating point representation with
8 bit exponent and 24 bit mantissa.
2. Compute 10111001 – 01011011

1 of 1
 a. Using one’s complement b. Using two’s complement
3. Compute 01011011– 10111001
a. Using one’s complement b. Using two’s complement
4. Convert 9876.75 to
a. Binary b. Octal b. Hexadecimal d. Base Six

2 of 1
5. Convert the following numbers to decimal form
a) (1110.01)2 b) (210)3 c) (413)5 d) (6352)8 e) (2C5F)16
f) (2CD.A5)16 g) (21.2)3 h) (13.1)9
6. A) Convert 12.2510 to binary
B) Convert 3.1875 to binary
7. Covert 1100.01 to Decimal, to Oct , to Hex
8. Convert 11.0011 to decimal, to Oct , to Hex
9. Construct the logic circuit for the following Boolean function
F(x,y) = (x’ + y)y’ + (xy)’ + (x +y) xy + x’y’
10. Simplify the expression of question number 9 above.
11. Show truth table for the function in question number 9.
12. Draw logic circuit diagram for the simplified expression of the above function.
13. Find 23.375+ 41.25 + 66. 25 using 7-bit for exponent and 10 bit for mantissa and show your result in
floating point representation.
14. Find 25.375+ 41.25 - 66. 25 using 7-bit for exponent and 10 bit for mantissa and show your result in
floating point representation.
15. Compare and contrast the following two circuits

16. Proof that (X.Y'+Z).(X+Y).Z + XZ(Y+Y’) is equal to Y.Z + X.Z

17. (X + Y)(X' + Z)(Y + Z) = (X + Y)(X' + Z) is this expression true or false? Justify
18. Show the truth table for an Exclusive-OR gate
19. Draw circuit diagram for the X-OR gate of question number 18.
20. Adder is one combinational logic circuit. Explain
21. Take a Full Adder and
a. show its circuit diagram,
b. truth table and
c. Karnaugh map