JMicron/JM20330

JM20330
Serial ATA Bridge Chip
Description
JMicron’s JM20330 is a single chip solution for serial and parallel ATA translation. It includes the
Serial ATA PHY, Link, Transport, and Parallel ATA (application layer) controller. The Serial ATA
physical, link, and transport layers are compliant to Serial ATA 1.0. JM20330 supports a 1.5GHz data
rate, and scalable to 3.0 GHz data rate by directly doubling the internal clock source. The application
layer supports both the ATA register command set and PACKET command set, which could drive both
Hard Disk Drive and ATAPI Optical Storage such as CR-ROM, CD-RW, DVD-ROM, DVD-RW, etc.
The Serial ATA and the Parallel ATA application layer support both host and device operation and can
be configured through a single pin.

Features Quick Reference

Serial ATA 1.0 Specification compliant Signal Bit Rate 3.0/1.5 Gbps
Automatic Serial ATA 3.0/1.5 Gbps speed
Spread Spectrum -3.0% to 0.0
negotiation
ATA/ATAPI PIO mode 0 to 4 Power Supply 3.3V and 1.8V
ATA/ATAPI Ultra DMA of transfer rate 16.7,
ESD Protection 2000 V
25, 33, 48, 66, 100, 133, and 150MB/s.
ATA/ATAPI LBA48 addressing mode Host and Device Programmable
associated with 2-byte sector count Adj. Amplitude 2 levels
Support Serial ATA hot-plug
Adj. Pre-emphasis 4 levels
Ultra low power consumption
Work for both AC and DC couple between Package 64-pin TQFP
the transmitter and the receiver
Applications All SATA products
Provide specified OOB signal detection and
Mass storage devices
transmission
Support Spread Spectrum Clocking to reduce Optical storage
EMI Dongle bridge
Support 20MHz, 25MHz, 30MHz or 40MHz Storage system
Reference Clock
Support Partial/Slumber power management
Provide adjustable TX signal amplitude and
pre-emphasis level
Master/Slave support

Version 1.0 May 2003

© JMicron 2003. All rights reserved. Page 1 Copying prohibited.

本 社 東京都世田谷区三軒茶屋 2-11-22 サンタワーズセンタービル 〒154-8539 / TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: jmicron@mcmjapan.com
関西営業所 大阪市淀川区西中島 3-7-13 新大阪サクセスビルEAST 〒532-0011 / TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 /
 JMicron/JM20330

Functional Block Diagram

FIFO
RXP/RXN
Physical
Transport
Link Layer Layer
Layer
(PHY)
TXP/TXN
FIFO
Parallel ATA
Application Layer (ATA/
ATAPI Controller)

Status and Control Register

MODE[2:0]
(SCR)

GIO0
Register File GPIO I/F
GIO1

Fig. 1 Functional Block Diagram of JM20330

Applications
Device Bridge Host Bridge
Application Layer (ATA/ATAPI

Application Layer (ATA/ATAPI

FIFO

FIFO
Transport Layer

Transport Layer
Physical Layer

Physical Layer
RXP/ TXP/
Link Layer

Link Layer
RXN TXN
(PHY)

(PHY)
HDD/ TXP/ RXP/
Controller)

Controller)

TXN RXN

Optical Parallel ATA Parallel ATA PC IDE

FIFO

FIFO

Storage MODE MODE

Port
= 0xx =1xx

Status and Control Register Status and Control Register

GIO0 GIO0
(SCR) (SCR)
GPIO I/ GPIO I/
F GIO1 GIO1 F
Register File Register File

JM30330 JM30330

Fig. 2 JM20330 Host and Device bridge system diagram

Product Information
Name Description
JM20330 Serial ATA Bridge Chip

Design Kit Contact Information

1 JM20330 Data Sheet Department Email
2 JM20330 Design Guide Sales sales@jmicron.com.tw
3 Application EVB Tech. Support fae@jmicron.com.tw

Version 1.0 May 2003

© JMicron 2003. All rights reserved. Page 2 Copying prohibited.

本 社 東京都世田谷区三軒茶屋 2-11-22 サンタワーズセンタービル 〒154-8539 / TEL: 03 (3487) 8502 / FAX: 03 (3487) 8825 / e-mail: jmicron@mcmjapan.com
関西営業所 大阪市淀川区西中島 3-7-13 新大阪サクセスビルEAST 〒532-0011 / TEL: 06(6885) 1688 / FAX: 06 (6885) 1721 /