The von Neumann Model

INF1100, UiT

Einar Holsbø, 250920

A higher abstraction from
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logic gates
Quite central conceptually
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Memory stores programs and data
 Memory access:
1. Load Memory Address Register
2. If read: get data fromç√ Memory Data Register
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3. If write: put data in MDR
 Memory access:
1. Load Memory Address Register
2. If read: get data fromç√ Memory Data Register

3. If write: put data in

ç√MDR
 Memory access:
1. Load Memory Address Register
2. If read: get data fromç√ Memory Data Register

3. If write: put data in MDR

Going to need some ways for humans to
get things into/out of memory
Processing unit processes data
Arithmetic Logic Unit:
Does arithmetic
and logical operations
 Local registers provide
temporary storage (why?)
 The control unit orchestrates
interaction between the other components
 Program Counter
points to the next instruction
(details to follow)
 Instruction Register
holds the current instruction
(details to follow)
Instructions
The smallest atomic unit of work: it either happens or it does not
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Instructions
The smallest atomic unit of work: it either happens or it does not

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It’s all bits as usual

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Instructions
The smallest atomic unit of work: it either happens or it does not

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opcode: a code for the operation to be performed

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Instructions
The smallest atomic unit of work: it either happens or it does not

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operands: where is the data upon which to op?

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Instructions
The smallest atomic unit of work: it either happens or it does not

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Source operands: registers 6 and 2 in this case

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Instructions
The smallest atomic unit of work: it either happens or it does not

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Destination operand,
where the result should go (if any)
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Instructions
The smallest atomic unit of work: it either happens or it does not

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So: Do R6 + R2, store the result in R6

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Instructions
The smallest atomic unit of work: it either happens or it does not

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So: Do R6 + R2, store the result in R6

(other operations/operands are available)
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Instructions
The smallest atomic unit of work: it either happens or it does not

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The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

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4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where it goes

The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from

ç√ memory

5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where it goes

The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

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5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where it goes

The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs

ç√ the operation

6. STORE RESULT: write the result to where it goes

The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs the operation

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6. STORE RESULT: write the result to where it goes
The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where

ç√ it goes
The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where it goes

The instruction cycle
How the Control Unit makes everything go

1. FETCH: fetch the next instruction to be processed

2. DECODE: interpret the opcode and operand(s)

3. EVALUATE ADDRESS: evaluate the memory address(es) needed

4. FETCH OPERANDS: fetch operands from memory

5. EXECUTE: The processing unit performs the operation

6. STORE RESULT: write the result to where it goes

(7) start over

1. FETCH
1. FETCH

Load address of next

instruction into MAR
1. FETCH

Read instruction from MDR

to IR
1. FETCH

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1. FETCH

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Increment PC to point to
next instruction
2. DECODE

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2. DECODE

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What does the opcode say?

2. DECODE

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Which parts here

are relevant?
3. EVALUATE
ADDRESS

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3. EVALUATE
ADDRESS

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These can be offsets from a

base address or something,
need for some manipulation
 4. FETCH
OPERANDS

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 4. FETCH
OPERANDS

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 4. FETCH
OPERANDS

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 4. FETCH
OPERANDS

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 4. FETCH
OPERANDS

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5. EXECUTE

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5. EXECUTE

Do the thing
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6. STORE
RESULT

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6. STORE
RESULT

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6. STORE
RESULT

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REPEAT UNTIL POWEROFF
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