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2012 S-Series Richie 13.3"


D

UMA/DIS Muxless Schematic D

Intel Chief River Platform


C
Ivy Bridge (rPGA989) C

Panther Point PCH

B REV:-1 B

2012-03-15

<Core Design>

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

DY:No stuff Title

Cover Page
DIS_PX:Only DIS install Size
A4
Document Number Rev
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 1 of 103
5 4 3 2 1
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S-Series Richie Block Diagram SYSTEM DC/DC


TPS51461RGER
INPUTS OUTPUTS
48
CPU DC/DC
ISL95832HRTZ
INPUTS OUTPUTS
42~44

DCBATOUT +VCCSA DCBATOUT VCC_CORE

(Muxless) VRAM
128MBx16 884
VRAM
128MBx16 894
SYSTEM DC/DC
TPS51211DSCR 45

D
INPUTS OUTPUTS D

DDR III Slot 0 GDDR5 GDDR5 DCBATOUT 1D05V_S0


DDRIII 1600/1333 Channel A
1600/1333 14 Intel CPU SYSTEM DC/DC
Ivy Bridge-M TPS51123RGER 41
Project code:91.4RS01.001
DDR III Slot 1 DDRIII 1600/1333 Channel B Dual Core SV INPUTS OUTPUTS
1600/1333 15 35W PCIe x 16
Thames Pro PCB P/N:11241 5V_AUX_S5
3D3V_AUX_S5
4,5,6,7,8,9,10
18W S3 Package DCBATOUT 5V_S5
3D3V_S5
83,84,85,86,87

X8501 SYSTEM DC/DC


FDI*2 DMI2.0*4 27MHz TPS51216RUKR 46

RGB CRT
2.7GT/s 5GT/s INPUTS OUTPUTS
1D5V_S3
DCBATOUT 0D75V_S0
DDR_VREF_S3

GFX DC/DC
USB3.0 x 3 USB3.0 CRT ISL95832HRTZ 42~44
62 RGB CRT 50
C C
INPUTS OUTPUTS
FingerPrinter DCBATOUT VCC_GFXCORE
64
USB 2.0 INTEL HDMI
HDMI 1.451
VGA
PCH UP1527QQDD 92
USB2.0 x 1 61 LCD INPUTS OUTPUTS
Panther Point-M LVDS 49
DCBATOUT VGA_CORE
X1701
CAMERA 32.768KHz CHARGER
49 PCB 8 LAYER BQ24736RGRR 40
SMBus
Thermal Sensor
L1: Top INPUTS OUTPUTS
Mini-Card GMT G781 28
X1801 USB 3.0/2.0/1.1 ports (14) GND AD+
SIM Card 54
L2: BT+ DCBATOUT
54
WWAN 25MHz ETHERNET (10/100/1000Mb) L3: Signal 26
High Definition Audio SATA II 6Gb/s
HDD 56 L4: Signal
SYSTEM DC/DC
JMicron RT8068AZQWID 47
SD/MMC/MS PCIE Serial Peripheral I/F(dual output) L5: VCC
33
JMB709 32
INPUTS OUTPUTS
ACPI 1.1 L6: Signal
LPC I/F SATA II 6Gb/s
ODD 56 3D3V_S5 1D8V_S0
B L7: GND B
LAN SATA ports (6) L8: Bottom SYSTEM DC/DC
RJ45 CONN Realtek 8151FH PCIE
93
PCIE ports (8) FDMC7696
35 10/100/1000 34 LPC Bus INPUTS
26 OUTPUTS
X3401
1D5V_S3 1V_VGA_S0
25MHz
XDP
26 SPI/PECI Switches
KBC
INPUTS OUTPUTS
1D5V_S3 1D5V_S0
17,18,19,20,21,22,23,24,25 SPI
SMSC KBC1126 27 5V_S5 5V_S0
INT MIC AUDIO CODEC HD Audio 3D3V_S5 3D3V_S0
31
Pre-AMP IDT92HD87
PCB LAYER
USB2.0

PCIe

SMBus

EXT MIC 29
TLV2462
31 30
L1:Top L5:Vcc
SPI Flash L2:GND L6:Signal
Headphone L3:Signal L7:GND
31 8MB 60 Battery Touch Int.
L4:Signal L8:Bottom
A Mini-Card Pad KB <Core Design> A
39 69 69
Speaker WLAN
802.11abg/n
Accelerometer Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
HP3DC2 65 Taipei Hsien 221, Taiwan, R.O.C.
31 Blue Tooth
53 Title

Block Diagram
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
25 Date: W ednesday, March 14, 2012 Sheet 2 of 103
5 4 3 2 1
5 4 3 2 1

PCH Strapping Chief River Schematic Checklist Rev0.72


Processor Strapping Chief River Schematic Checklist Rev0.72
Pin Name Strap Description Configuration (Default value for each bit is Default
Name Schematics Notes 1 unless specified otherwise) Value
SPKR The signal has a weak internal pull-down.
Note: the internal pull-down is disabled after PLTRST# deasserts. If the signal is sampled high, this indicates that the system is
strapped to the "No Reboot" mode (Cougar Point will disable the TCO Timer system reboot feature). Connect a series 1K ohm resistor on the critical CFG[0] trace in a manner
CFG[0] which does not introduce any stubs to CFG[0] trace. Route as needed
This signal has a weak internal pull-up.
INIT3_3V# Note: The internal pull-up is disabled after PLTRST# deasserts. from the opposite side of this series isolation resistor to the debug port.
NOTE: This signal should not be pulled low. Leave as "No Connect". ITP will drive the net to GND.
D D
Integrated 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when high CFG[2] PCIe Static x16
NOTE: This signal should always be pulled high CFG2 is for Lane Numbering 1: Normal Operation; Lane # definition matches socket pin map definition
INTVRMEN External 1.05 V VRM Enable / Disable. Integrated 1.05 V VRMs is enabled when Low. 0:Lane Reversed
the 16x Reversal. 1
NOTE: This signal should be pulled down to GND through 330 kOhms resistor
1:Disabled - No Physical Display Port attached to Embedded DisplayPort
GNT3#/GPIO55 Display Port 0:Enabled - An external Display Port device is connected to the Embedded
GNT2#/GPIO53 GNT[3:0]# functionality is not available on Mobile. Used as GPIO only. Pull-up resistors are not required on these signals. If CFG[4] Presence strap
pull-ups are used, they should be tied to the Vcc3_3 power rail. Display Port Pull down to GND through a 1KΩ ± 5% resistor to enable port 1
GNT1#/GPIO51
This signal is a strap for selecting DMI and FDI termination voltage.
For Ivy Bridge processor only implementation: 00 = 1 x 8, 2 x 4 PCI Express
DF_TVS needs to be pulled up to VccDFTERM power rail through 2.2 kOhms ±5% resistor. CFG[6:5] PCIE Port Bifurcation 01 = reserved
DF_TVS Straps 11
For future processor compatibility: 10 = 2 x 8 PCI Express
It needs to be connected to PROC_SELECT through a 11 = 1 x 16 PCI Express
1.0 kOhms ±5% series resistor. The PROC_SELECT signal would need a 2.2 kOhms ±5% pull-up resistor to PCH VccDFTERM.
Reserved configuration
This Signal has a weak internal pull-up. CFG[17:7] lands. A test point may
Note: the internal pull-up is disabled after PLTRST# deasserts. This field determines the destination of accesses to the BIOS
memory range. Also controllable via Boot BIOS Destination bit (Chipset Config Registers: Offset 3410h:Bit 10). This strap is used
be placed on the board
in conjunction with Boot BIOS Destination Selection 1 strap. for these lands.
Bit11 Bit 10 Boot BIOS Destination
0 1 Reserved
SATA1GP/ 1 0 PCI Voltage Rails
GPIO19 1 1 SPI POWER PLANE VOLTAGE DESCRIPTION
0 0 LPC ACTIVE IN
5V_S0 5V
NOTE: If option 00 LPC is selected BIOS may still be placed on LPC, but all platforms with Cougar Point require SPI flash 3D3V_S0 3.3V
C connected directly to the Cougar Point's SPI bus with a valid descriptor in order to boot. 1D8V_S0 1.8V C

NOTE: Booting to PCI is intended for debut/testing only. Boot BIOS Destination Select to LPC/PCI by functional strap or via Boot 1D5V_S0 1.5V
1D05V_S0 1.05V
BIOS Destination Bit will not affect SPI accesses initiated by Management Engine or Integrated GbE LAN. VCCSA 1.0V S0 CPU Core Rail
NOTE: PCI Boot BIOS destination is not supported on mobile. 0D75V_S0 0.9 - 0.675V Graphics Core Rail
VCC_CORE 0.75V
VCC_GFXCORE 0.35V to 1.5V
VGA_CORE 0.4 to 1.25V
Reserved. 1D8V_VGA_S0 1.8V
SATA2GP/ This signal has a weak internal pull-down. 3D3V_VGA_S0 3.3V
GPIO36 NOTE: The internal pull-down is disabled after PLTRST# deasserts. 1D5V_VGA_S0 1V
NOTE: This signal should not be pulled high when strap is sampled. PCIe Routing 1V_VGA_S0

Reserved 1D5V_S3 5V
DDR_VREF_S3 1.5V S3
This signal has a weak internal pull-down.
SATA3GP/ NOTE: The internal pull-down is disabled after PLTRST# deasserts. LANE1 X
GPIO37 NOTE: This signal should not be pulled high when strap is sampled.
BT+ 9V-14.1V
High Definition Audio Dock Enable: This signal controls the external Intel HD Audio docking isolation logic. This is an LANE2 X DCBATOUT 9V-19.5V
5V_S5 5V
active-low-signal. When deasserted the external docking switch is in isolate mode. When asserted the external docking switch 5V_AUX_S5 5V All S states AC Brick Mode only
HDA_DOCK_EN# electrically connects the Intel? HD Audio dock signals to the corresponding Cougar Point signals. This signal can instead be LANE3 Card Reader 3D3V_S5 3.3V
/GPIO33 used as GPIO33. 3D3V_AUX_S5 3.3V

Signal has a weak internal pull-down. If strap is sampled low, the security measures defined in the Flash Descriptor will be in LANE4 Mini Card1(WLAN)
3D3V_AUX_KBC 3.3V DSW, Sx ON for supporting Deep Sleep states
effect (default). If sampled high, the Flash Descriptor Security will be overridden. This strap should only be asserted high via
external pull-up in manufacturing/debug environments ONLY. LANE5 X
HDA_SDO Note: The weak internal pull-down is disabled after PLTRST# deasserts. Asserting the HDA_SDO high on the rising edge of 3D3V_AUX_S5 3.3V G3, Sx Powered by Li Coin Cell in G3
RSMRST# will also halt Intel Management Engine after chipset bring up and disable runtime Intel Management Engine features. and 3D3V_S5 in Sx
This is a debug mode and must not be asserted after manufacturing/ debug.
LANE6 LAN
B B

This signal has a weak internal pull-down. LANE7 X


HDA_SYNC On Die PLL VR is supplied by 1.5 V from VCCVRM when sampled high, 1.8 V from VCCVRM when sampled low.
Needs to be pulled High for Chief River platform. LANE8 X
TLS Confidentiality
Low (0) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality
GPIO15 High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality
This signal has a weak internal pull-down.
USB 2.0 Table USB3.0 Table
NOTE: The weak internal pull-down is disabled after RSMRST# deasserts.
Pair Device
SMBus ADDRESSES
NOTE: A strong pull-up may be needed for GPIO functionality USB
0 FREE Pair Device
L_DDC_DATA LVDS Detected. I 2 C / SMBus Addresses Ref Des Chief River CRV
When '1'- LVDS is detected; When '0'- LVDS is not detected. This signal has a weak internal pull-down. 1 USB 3.0 I/O CONN. 1 1 FREE Device Address Hex Bus
NOTE: The internal pull-down is disabled after PLTRST# deasserts. 2 USB 3.0 I/O CONN. 2
SDVO_CTRLDATA Port B Detected
2 I/O CONN. 1
3 USB 3.0 I/O CONN. 3 DIMM1 PCH_SMB_CLK/PCH_SMB_DATA
When '1'- Port B is detected; When '0'- Port B is not detected. This signal has a weak internal pull-down. 3 I/O CONN. 2 DIMM2 PCH_SMB_CLK/PCH_SMB_DATA
NOTE: The internal pull-down is disabled after PLTRST# deasserts. Touch-Pad PCH_SMB_CLK/PCH_SMB_DATA
4 FREE 4 I/O CONN. 3
DDPC_CTRLDATA Port C Detected.
When '1'- Port C is detected; When '0'- Port C is not detected This signal has a weak internal pull-down. 5 BT WLAN combo N/A PCH_SML0_CLK/PCH_SML0_DATA

DDPD_CTRLDATA
NOTE: The internal pull-down is disabled after PLTRST# deasserts
Port D Detected.
6 FREE SATA Table
7 KBC PCH_SML1CLK/PCH_SML1DATA
When '1'- Port D is detected; When '0'- Port D is not detected This signal has a weak internal pull-down. FREE SATA G781_Thermal IC 1001100 PCH_SML1CLK/PCH_SML1DATA
NOTE: The internal pull-down is disabled after PLTRST# deasserts. 8 GPU_Thames PRO 0X41 PCH_SML1CLK/PCH_SML1DATA
DSWVRMEN Deep S4/S5 Well On-Die Voltage Regulator Enable
Fingerprint Pair Device G-Sensor 0X52 PCH_SML1CLK/PCH_SML1DATA
A A
If strap is sampled high, the Integrated Deep S4/S5 Well (DSW) On-Die VR mode is enabled. 9 USB 2.0 I/O CONN. 1
<Core Design>
The On-Die PLL voltage regulator is enabled when sampled high. When sampled low the On-Die PLL Voltage Regulator is 10 Camera 0 HDD
GPIO28 disabled. If not used, 8.2-kΩ to 10-kΩ pull-up to +V3.3A power-rail.
Note: This signal has a weak internal pull-up. The internal pull-up is disabled after RSMRST# deasserts. 11 FREE 1 ODD Wistron Corporation
GPIO29 is multiplexed with SLP_LAN#. If Intel LAN is implemented on the platform, SLP_LAN# must be used to control the power 12 WWAN 2 N/A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
GPIO29/ to the PHY LAN (no other implementation is supported). If integrated Intel LAN is not supported on the platform, GPIO29 can be Taipei Hsien 221, Taiwan, R.O.C.
SLP_LAN# used as a normal GPIO. A soft strap determines the functionality of GPIO29, either as SLP_LAN# or GPIO. By default, the soft 13 FREE 3 N/A
Title
strap enables SLP_LAN# functionality on the pin. If the soft trap is changed to enable GPIO functionality, 4 N/A
then SLP_LAN# functionality is no longer available, and the signal can be used as a normal GPIO (default to GPI). Table of Content
5 N/A Size Document Number Rev
Custom
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 3 of 103
5 4 3 2 1
5 4 3 2 1

CPU(1/7)
IVY BRIDGE PROCESSOR (DMI,DP,PEG,FDI)
D PEG Compensation D
1D05V_S0
CPU1A 1 OF 9
J22 PEG_COMP 1 2
IVY-BRIDGE PEG_ICOMPI R401 24D9R2F-L-GP
19 DMI_TXN[3:0] PEG_ICOMPO J21
DMI_TXN0 B27 H22
DMI_TXN1 DMI_RX#0 PEG_RCOMPO
Note: B25 DMI_RX#1
Signal Routing Guideline:
Intel DMI supports both Lane DMI_TXN2 A25 PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
DMI_TXN3 DMI_RX#2 PEG_RXN15 PEG_RXN[0..15] 83
B24 K33
Reversal and polarity inversion DMI_RX#3 PEG_RX#0
M35 PEG_RXN14 PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
but only at PCH side. This is 19 DMI_TXP[3:0] PEG_RX#1
DMI_TXP0 B28 L34 PEG_RXN13
DMI_TXP1 DMI_RX0 PEG_RX#2 PEG_RXN12
enabled via a soft strap. B26 DMI_RX1 PEG_RX#3 J35

DMI
DMI_TXP2 A24 J32 PEG_RXN11
DMI_TXP3 DMI_RX2 PEG_RX#4 PEG_RXN10
B23 DMI_RX3 PEG_RX#5 H34
H31 PEG_RXN9
19 DMI_RXN[3:0] DMI_RXN0 PEG_RX#6 PEG_RXN8
G21 DMI_TX#0 PEG_RX#7 G33
DMI_RXN1 E22 G30 PEG_RXN7
DMI_RXN2 DMI_TX#1 PEG_RX#8 PEG_RXN6
F21 DMI_TX#2 PEG_RX#9 F35
DMI_RXN3 D21 E34 PEG_RXN5
DMI_TX#3 PEG_RX#10 PEG_RXN4
19 DMI_RXP[3:0] PEG_RX#11 E32
DMI_RXP0 G22 D33 PEG_RXN3
DMI_RXP1 DMI_TX0 PEG_RX#12 PEG_RXN2
D22 DMI_TX1 PEG_RX#13 D31

PCI EXPRESS* - GRAPHICS


DMI_RXP2 F20 B33 PEG_RXN1
DMI_RXP3 DMI_TX2 PEG_RX#14 PEG_RXN0
C21 DMI_TX3 PEG_RX#15 C32

PEG_RXP15 PEG_RXP[0..15] 83
PEG_RX0 J33
L35 PEG_RXP14
PEG_RX1
C 19 FDI_TX_N[7:0] FDI_TX_N0 A21
PEG_RX2 K34
H35
PEG_RXP13
PEG_RXP12 C
FDI_TX_N1 FDI0_TX#0 PEG_RX3 PEG_RXP11
Note: H19 FDI0_TX#1 PEG_RX4 H32
Intel FDI supports both Lane FDI_TX_N2 E19 G34 PEG_RXP10
FDI_TX_N3 FDI0_TX#2 PEG_RX5 PEG_RXP9
F18 G31

Intel(R) FDI
Reversal and polarity inversion FDI_TX_N4 B21
FDI0_TX#3 PEG_RX6
F33 PEG_RXP8
but only at PCH side. This is FDI_TX_N5 FDI1_TX#0 PEG_RX7 PEG_RXP7
C20 FDI1_TX#1 PEG_RX8 F30
enabled via a soft strap. FDI_TX_N6 D18 E35 PEG_RXP6
FDI_TX_N7 FDI1_TX#2 PEG_RX9 PEG_RXP5
E17 FDI1_TX#3 PEG_RX10 E33
F32 PEG_RXP4
PEG_RX11 PEG_RXP3
19 FDI_TX_P[7:0] PEG_RX12 D34
FDI_TX_P0 A22 E31 PEG_RXP2
FDI_TX_P1 FDI0_TX0 PEG_RX13 PEG_RXP1
G19 FDI0_TX1 PEG_RX14 C33
FDI_TX_P2 E20 B32 PEG_RXP0
FDI_TX_P3 FDI0_TX2 PEG_RX15
G18 FDI0_TX3 PEG_TXN[0..15] 83
FDI_TX_P4 B20 M29 PEG_C_TXN15 DIX_PX C401 1 2 SCD22U16V2KX-GP PEG_TXN15
FDI_TX_P5 FDI1_TX0 PEG_TX#0 PEG_C_TXN14
C19 FDI1_TX1 PEG_TX#1 M32 DIX_PX C402 1 2 SCD22U16V2KX-GP PEG_TXN14
FDI_TX_P6 D19 M31 PEG_C_TXN13 DIX_PX C403 1 2 SCD22U16V2KX-GP PEG_TXN13
FDI_TX_P7 FDI1_TX2 PEG_TX#2 PEG_C_TXN12
F17 FDI1_TX3 PEG_TX#3 L32 DIX_PX C404 1 2 SCD22U16V2KX-GP PEG_TXN12
L29 PEG_C_TXN11 DIX_PX C405 1 2 SCD22U16V2KX-GP PEG_TXN11
PEG_TX#4 PEG_C_TXN10
Note: 19 FDI_FSYNC0 J18 FDI0_FSYNC PEG_TX#5 K31 DIX_PX C406 1 2 SCD22U16V2KX-GP PEG_TXN10
Lane reversal does not apply to J17 K28 PEG_C_TXN9 DIX_PX C407 1 2 SCD22U16V2KX-GP PEG_TXN9
19 FDI_FSYNC1 FDI1_FSYNC PEG_TX#6 PEG_C_TXN8
FDI sideband signals. PEG_TX#7 J30 DIX_PX C408 1 2 SCD22U16V2KX-GP PEG_TXN8
H20 J28 PEG_C_TXN7 DIX_PX C409 1 2 SCD22U16V2KX-GP PEG_TXN7
19 FDI_INT FDI_INT PEG_TX#8 PEG_C_TXN6
PEG_TX#9 H29 DIX_PX C410 1 2 SCD22U16V2KX-GP PEG_TXN6
DP Compensation, within 500mil J19 G27 PEG_C_TXN5 DIX_PX C411 1 2 SCD22U16V2KX-GP PEG_TXN5
19 FDI_LSYNC0 FDI0_LSYNC PEG_TX#10 PEG_C_TXN4
19 FDI_LSYNC1 H17 FDI1_LSYNC PEG_TX#11 E29 DIX_PX C412 1 2 SCD22U16V2KX-GP PEG_TXN4
F27 PEG_C_TXN3 DIX_PX C413 1 2 SCD22U16V2KX-GP PEG_TXN3
PEG_TX#12 PEG_C_TXN2
PEG_TX#13 D28 DIX_PX C414 1 2 SCD22U16V2KX-GP PEG_TXN2
1D05V_S0 F26 PEG_C_TXN1 DIX_PX C415 1 2 SCD22U16V2KX-GP PEG_TXN1
B 4mil
PEG_TX#14
PEG_TX#15 E25 PEG_C_TXN0 DIX_PX C416 1 2 SCD22U16V2KX-GP PEG_TXN0 B
R402 1 2 24D9R2F-L-GP DP_COMP A18 EDP_COMPIO PEG_C_TXP15 PEG_TXP[0..15] 83
12mil A17 EDP_ICOMPO PEG_TX0 M28 DIX_PX C417 1 2 SCD22U16V2KX-GP PEG_TXP15
B16 M33 PEG_C_TXP14 DIX_PX C418 1 2 SCD22U16V2KX-GP PEG_TXP14
EDP_HPD PEG_TX1 PEG_C_TXP13
PEG_TX2 M30 DIX_PX C419 1 2 SCD22U16V2KX-GP PEG_TXP13
NOTE: EDP_HPD L31 PEG_C_TXP12 DIX_PX C420 1 2 SCD22U16V2KX-GP PEG_TXP12
PEG_TX3 PEG_C_TXP11
Select a Fast FET similar to 2N7002E whose rise/ C15 EDP_AUX PEG_TX4 L28 DIX_PX C421 1 2 SCD22U16V2KX-GP PEG_TXP11
D15 K30 PEG_C_TXP10 DIX_PX C422 1 2 SCD22U16V2KX-GP PEG_TXP10
EDP_AUX# PEG_TX5
eDP

fall time is less than 6 ns. PEG_TX6 K27 PEG_C_TXP9 DIX_PX C423 1 2 SCD22U16V2KX-GP PEG_TXP9
J29 PEG_C_TXP8 DIX_PX C424 1 2 SCD22U16V2KX-GP PEG_TXP8
If HPD on eDP interface is PEG_TX7 PEG_C_TXP7
C17 EDP_TX0 PEG_TX8 J27 DIX_PX C425 1 2 SCD22U16V2KX-GP PEG_TXP7
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up F16 H28 PEG_C_TXP6 DIX_PX C426 1 2 SCD22U16V2KX-GP PEG_TXP6
EDP_TX1 PEG_TX9 PEG_C_TXP5
resistor on the motherboard. C16 EDP_TX2 PEG_TX10 G28 DIX_PX C427 1 2 SCD22U16V2KX-GP PEG_TXP5
G15 E28 PEG_C_TXP4 DIX_PX C428 1 2 SCD22U16V2KX-GP PEG_TXP4
This signal can be left as no connect if entire eDP interface is disabled. EDP_TX3 PEG_TX11
F28 PEG_C_TXP3 DIX_PX C429 1 2 SCD22U16V2KX-GP PEG_TXP3
PEG_TX12 PEG_C_TXP2
C18 EDP_TX#0 PEG_TX13 D27 DIX_PX C430 1 2 SCD22U16V2KX-GP PEG_TXP2
E16 E26 PEG_C_TXP1 DIX_PX C431 1 2 SCD22U16V2KX-GP PEG_TXP1
EDP_TX#1 PEG_TX14 PEG_C_TXP0
D16 EDP_TX#2 PEG_TX15 D25 DIX_PX C432 1 2 SCD22U16V2KX-GP PEG_TXP0
F15 EDP_TX#3
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils. 62.10040.821
EDP_COMPIO keep W/S=4/15 mils and routing 1ST = 62.10055.551
length less than 500 mils.
2nd = 62.10055.321
3rd = 62.10055.731
A NOTE.
<Core Design>
A
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort. BOM Note:1st/2nd/3rd Add in BOM
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(1/7): DMI/PEG/FDI
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 4 of 103
5 4 3 2 1

CPU(2/7)
IVY BRIDGE PROCESSOR (CLK,MISC,JTAG)
CPU1B 2 OF 9
1D05V_S0 20120116PV-R
IVY-BRIDGE
RN501 0R4P2R-PAD
A28 CPU_BCLK_P 2 3
BCLK CLKOUT_DMI_P 18

MISC

CLOCKS
D D
C26 A27 CPU_BCLK_N 1 4
22 H_SNB_IVB# PROC_SELECT# BCLK# CLKOUT_DMI_N 18

1
R501 1D05V_S0

RN
62R2F-GP TPAD14-OP-GP
TP501
T P501 1 TP_SKTOCC#_R AN34
SKTOCC# CLK_DP_P_R 1
A16 4 RN504
Q501 DPLL_REF_CLK CLK_DP_N_R 2
A15 3 SRN1KJ-7-GP

2
DPLL_REF_CLK#
27 KBC_PROCHOT G
TPAD14-OP-GP
D TP502 1 H_CATERR# AL33
H_PROCHOT# 42 CATERR#

1
R525 S

THERMAL
100KR2J-1-GP
2N7002K-2-GP AN33 R8 CPUDRAMRST#
22,27 H_PECI PECI SM_DRAMRST#
84.2N702.J31

DDR3
MISC
2
2nd = 84.07002.I31 H_PROCHOT# H_PROCHOT#_D AL32 SM_RCOMP_0
3rd = 84.2N702.W31 1
R508
2
56R2F-1-GP PROCHOT# SM_RCOMP0
AK1
SM_RCOMP_1
A5
SM_RCOMP1 SM_RCOMP_2
SM_RCOMP2 A4

AN32
PM_DRAM_PWRGD Traces impedance= 50 ohm 22,85 H_THRMTRIP# THERMTRIP#

1 2 H_CPUPWRGD_R
R518 10KR2J-3-GP AP29 XDP_PRDY# 1 TP503 TPAD14-OP-GP
3D3V_S0 3D3V_S5 1D5V_S0 PRDY# XDP_PREQ#
AND GATE PREQ#
AP27

AR26 XDP_TCK
TCK
1

PWR MANAGEMENT
C503 AR27 XDP_TMS

JTAG & BPM


TMS
1

R523 SCD1U10V2KX-5GP
19 H_PM_SYNC
R519 1 2 0R0402-PAD-1-GP H_PM_SYNC_R AM34 AP30 XDP_TRST#
PM_SYNC TRST#
1

1
200R2F-L-GP
C
R524 C502 AR28 XDP_TDI C
2

200R2F-L-GP SC1U6D3V2KX-GP TDI XDP_TDO


U501 AP26
2

2
TDO
19 PM_DRAM_PWRGD 1 5 22 H_CPUPWRGD
R520 1 2 0R0402-PAD-1-GP H_CPUPWRGD_R AP33
IN B VCC UNCOREPWRGOOD
2

27,37,42,50,96 PWR_GOOD 2 IN A
AL35 XDP_DBRESET# 19
PM_DRAM_PWRGD_M PM_DRAM_PWRGD_R DBR#
3 4 1 2 V8
GND OUT Y R512 130R2F-1-GP SM_DRAMPWROK
AT28 XDP_BPM0_R 1 TP510 TPAD14-OP-GP
74VHC1G09DFT2G-GP BPM#0 XDP_BPM1_R TP511 TPAD14-OP-GP
BPM#1 AR29 1
73.01G09.AAH AR30 XDP_BPM2_R 1 TP512 TPAD14-OP-GP
BUF_CPU_RST# BPM#2 XDP_BPM3_R TP513 TPAD14-OP-GP
2nd = 73.01G09.0AB AR33
RESET# BPM#3
AT30
XDP_BPM4_R
1
3rd = 73.01G09.BAH AP32 1 TP514 TPAD14-OP-GP
R502 BPM#4 XDP_BPM5_R TP515 TPAD14-OP-GP
DY BPM#5
AR31
XDP_BPM6_R
1
1 2 AT31 1 TP516 TPAD14-OP-GP
0R2J-2-GP BPM#6 XDP_BPM7_R TP517 TPAD14-OP-GP
AR32 1
1D05V_S0 BPM#7
3D3V_S0
1

R526
75R2J-1-GP
1

C504
2

U502 SCD1U10V2KX-5GP 3D3V_S0 1D05V_S0


DDR3 Compensation Signals
2

1 NC#1 VCC 5 PUT CLOSE CPU


SM_RCOMP_0

2
2 SM_RCOMP_1
17,21,32,34,53,54,56,71,83,96,97 PLT_RST# A SM_RCOMP_2
R1111
3 4 BUF_CPU_RST#_R 1 2 R1110 51R2J-2-GP
GND Y

1
1KR2J-1-GP
1

1
B R517 R510 R504 R503 B

1
74LVC1G07GW-GP R521

200R2F-L-GP

25D5R2F-GP

140R2F-GP
43R2J-GP 750R2F-GP XDP_TDO
Buffered reset to CPU
DY

2
1D5V_S3 XDP_DBRESET#
S3 Power Reduction Circuit
2

2
1st = 73.01G07.AHG
1 2 SM_DRAMRST#
2nd = 73.01G07.AHG DY

1
3rd = 73.17S07.0AG R527
1K5R2F-2-GP R522 R513
CPUDRAMRST# 1 2 CPUDRAMRST#_R 1KR2F-3-GP
DY 0R2J-2-GP

2
Q502
DMN5L06K-7-GP
R514 1D05V_S0
PU/PD for JTAG signals
S D 1 2 DDR3_DRAMRST# 14,15,97
3D3V_S5
DEEP S3 20120116PV-R 84.05067.031 1KR2J-1-GP
1

XDP_TMS R506 1 2 51R2J-2-GP


1

R515 2ND = 84.00138.F31


G

R529 DY R530 4K99R2F-L-GP XDP_TDI R509 1 2 51R2J-2-GP


20KR2J-L2-GP 1 2 20120112 PV-R
XDP_PREQ# R505 1 DY 2 51R2J-2-GP
PCH_DDR_EN# 8
2

0R0402-PAD
2

C501 XDP_TCK R507 1 2 51R2J-2-GP


R528 SCD047U25V2KX-GP
2

18 PCH_DDR_RST# 1 2 PCH_DDR_EN# 8
DY_DS3 XDP_TRST# R511 1 2 51R2J-2-GP
20KR2J-L2-GP

A A
27,46 KBC_DDR_RST#
<Core Design>
G

Q503
DMN5L06K-7-GP Wistron Corporation
S D 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
DY_DS3
Title
84.05067.031
2ND = 84.07002.I31
3rd = 84.2N702.W31
CPU(2/7) : CLK/MISC/JTAG
Size Document Number Rev
Custom
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 5 of 103
5 4 3 2 1
5 4 3 2 1

CPU(3/7)
IVY BRIDGE PROCESSOR (DDR3)

D D

CPU1C 3 OF 9 CPU1D 4 OF 9

IVY-BRIDGE IVY-BRIDGE
SA_CK0 AB6 SB_CK0 AE2
14 M_A_DQ[63:0] M_A_DIM0_CLK_DDR0 14 15 M_B_DQ[63:0] M_B_DIM0_CLK_DDR0 15
SA_CLK#0 AA6 SB_CLK#0 AD2
M_A_DQ0 M_A_DIM0_CLK_DDR#0 14 M_B_DQ0 M_B_DIM0_CLK_DDR#0 15
C5 V9 C9 R9
M_A_DQ1 SA_DQ0 SA_CKE0 M_A_DIM0_CKE0 14 M_B_DQ1 SB_DQ0 SB_CKE0 M_B_DIM0_CKE0 15
D5 SA_DQ1 A7 SB_DQ1
M_A_DQ2 D3 M_B_DQ2 D10
M_A_DQ3 SA_DQ2 M_B_DQ3 SB_DQ2
D2 SA_DQ3 C8 SB_DQ3
M_A_DQ4 D6 AA5 M_B_DQ4 A9 AE1
M_A_DQ5 SA_DQ4 SA_CK1 M_A_DIM0_CLK_DDR1 14 M_B_DQ5 SB_DQ4 SB_CK1 M_B_DIM0_CLK_DDR1 15
C6 AB5 A8 AD1
M_A_DQ6 SA_DQ5 SA_CLK#1 M_A_DIM0_CLK_DDR#1 14 M_B_DQ6 SB_DQ5 SB_CLK#1 M_B_DIM0_CLK_DDR#1 15
C2 V10 D9 R10
M_A_DQ7 SA_DQ6 SA_CKE1 M_A_DIM0_CKE1 14 M_B_DQ7 SB_DQ6 SB_CKE1 M_B_DIM0_CKE1 15
C3 SA_DQ7 D8 SB_DQ7
M_A_DQ8 F10 M_B_DQ8 G4
M_A_DQ9 SA_DQ8 M_B_DQ9 SB_DQ8
F8 SA_DQ9 F4 SB_DQ9
M_A_DQ10 G10 AB4 M_B_DQ10 F1 AB2
M_A_DQ11 SA_DQ10 SA_CK2 M_B_DQ11 SB_DQ10 SB_CK2
G9 AA4 G1 AA2
M_A_DQ12 SA_DQ11 SA_CLK#2 M_B_DQ12 SB_DQ11 SB_CLK#2
F9 W9 G5 T9
M_A_DQ13 SA_DQ12 SA_CKE2 M_B_DQ13 SB_DQ12 SB_CKE2
F7 SA_DQ13 F5 SB_DQ13
M_A_DQ14 G8 M_B_DQ14 F2
M_A_DQ15 SA_DQ14 M_B_DQ15 SB_DQ14
G7 G2
M_A_DQ16 SA_DQ15 M_B_DQ16 SB_DQ15
K4 SA_DQ16 SA_CK3 AB3 J7 SB_DQ16 SB_CK3 AA1
M_A_DQ17 K5 AA3 M_B_DQ17 J8 AB1
M_A_DQ18 SA_DQ17 SA_CLK#3 M_B_DQ18 SB_DQ17 SB_CLK#3
K1 W10 K10 T10
M_A_DQ19 SA_DQ18 SA_CKE3 M_B_DQ19 SB_DQ18 SB_CKE3
J1 SA_DQ19 K9 SB_DQ19
M_A_DQ20 J5 M_B_DQ20 J9
M_A_DQ21 SA_DQ20 M_B_DQ21 SB_DQ20
J4 J10
M_A_DQ22 SA_DQ21 M_B_DQ22 SB_DQ21
J2 AK3 K8 AD3
C M_A_DQ23 SA_DQ22 SA_CS#0 M_A_DIM0_CS#0 14 M_B_DQ23 SB_DQ22 SB_CS#0 M_B_DIM0_CS#0 15 C
K2 SA_DQ23 SA_CS#1 AL3 K7 SB_DQ23 SB_CS#1 AE3
M_A_DQ24 M_A_DIM0_CS#1 14 M_B_DQ24 M_B_DIM0_CS#1 15
M8 AG1 M5 AD6
M_A_DQ25 SA_DQ24 SA_CS#2 M_B_DQ25 SB_DQ24 SB_CS#2
N10 AH1 N4 AE6
M_A_DQ26 SA_DQ25 SA_CS#3 M_B_DQ26 SB_DQ25 SB_CS#3
N8 SA_DQ26 N2 SB_DQ26
M_A_DQ27 N7 M_B_DQ27 N1
M_A_DQ28 SA_DQ27 M_B_DQ28 SB_DQ27
M10 M4
M_A_DQ29 SA_DQ28 M_B_DQ29 SB_DQ28
M9 SA_DQ29 SA_ODT0 AH3 N5 SB_DQ29 SB_ODT0 AE4
M_A_DIM0_ODT0 14 M_B_DIM0_ODT0 15

DDR SYSTEM MEMORY B


M_A_DQ30 N9 AG3 M_B_DQ30 M2 AD4
DDR SYSTEM MEMORY A

M_A_DQ31 SA_DQ30 SA_ODT1 M_A_DIM0_ODT1 14 M_B_DQ31 SB_DQ30 SB_ODT1 M_B_DIM0_ODT1 15


M7 SA_DQ31 SA_ODT2 AG2 M1 SB_DQ31 SB_ODT2 AD5
M_A_DQ32 AG6 AH2 M_B_DQ32 AM5 AE5
M_A_DQ33 SA_DQ32 SA_ODT3 M_B_DQ33 SB_DQ32 SB_ODT3
AG5 SA_DQ33 AM6 SB_DQ33
M_A_DQ34 AK6 M_B_DQ34 AR3
M_A_DQ35 SA_DQ34 M_B_DQ35 SB_DQ34
AK5 SA_DQ35 AP3 SB_DQ35
M_A_DQ36 AH5 M_B_DQ36 AN3
SA_DQ36 M_A_DQS#[7:0] 14 SB_DQ36 M_B_DQS#[7:0] 15
M_A_DQ37 AH6 C4 M_A_DQS#0 M_B_DQ37 AN2 D7 M_B_DQS#0
M_A_DQ38 SA_DQ37 SA_DQS#0 M_A_DQS#1 M_B_DQ38 SB_DQ37 SB_DQS#0 M_B_DQS#1
AJ5 G6 AN1 F3
M_A_DQ39 SA_DQ38 SA_DQS#1 M_A_DQS#2 M_B_DQ39 SB_DQ38 SB_DQS#1 M_B_DQS#2
AJ6 J3 AP2 K6
M_A_DQ40 SA_DQ39 SA_DQS#2 M_A_DQS#3 M_B_DQ40 SB_DQ39 SB_DQS#2 M_B_DQS#3
AJ8 M6 AP5 N3
M_A_DQ41 SA_DQ40 SA_DQS#3 M_A_DQS#4 M_B_DQ41 SB_DQ40 SB_DQS#3 M_B_DQS#4
AK8 AL6 AN9 AN5
M_A_DQ42 SA_DQ41 SA_DQS#4 M_A_DQS#5 M_B_DQ42 SB_DQ41 SB_DQS#4 M_B_DQS#5
AJ9 SA_DQ42 SA_DQS#5 AM8 AT5 SB_DQ42 SB_DQS#5 AP9
M_A_DQ43 AK9 AR12 M_A_DQS#6 M_B_DQ43 AT6 AK12 M_B_DQS#6
M_A_DQ44 SA_DQ43 SA_DQS#6 M_A_DQS#7 M_B_DQ44 SB_DQ43 SB_DQS#6 M_B_DQS#7
AH8 AM15 AP6 AP15
M_A_DQ45 SA_DQ44 SA_DQS#7 M_B_DQ45 SB_DQ44 SB_DQS#7
AH9 AN8
M_A_DQ46 SA_DQ45 M_B_DQ46 SB_DQ45
AL9 AR6
M_A_DQ47 SA_DQ46 M_B_DQ47 SB_DQ46
AL8 AR5
M_A_DQ48 SA_DQ47 M_B_DQ48 SB_DQ47
AP11 M_A_DQS[7:0] 14 AR9 M_B_DQS[7:0] 15
M_A_DQ49 SA_DQ48 M_A_DQS0 M_B_DQ49 SB_DQ48 M_B_DQS0
AN11 SA_DQ49 SA_DQS0 D4 AJ11 SB_DQ49 SB_DQS0 C7
M_A_DQ50 AL12 F6 M_A_DQS1 M_B_DQ50 AT8 G3 M_B_DQS1
M_A_DQ51 SA_DQ50 SA_DQS1 M_A_DQS2 M_B_DQ51 SB_DQ50 SB_DQS1 M_B_DQS2
AM12 K3 AT9 J6
M_A_DQ52 SA_DQ51 SA_DQS2 M_A_DQS3 M_B_DQ52 SB_DQ51 SB_DQS2 M_B_DQS3
AM11 N6 AH11 M3
M_A_DQ53 SA_DQ52 SA_DQS3 M_A_DQS4 M_B_DQ53 SB_DQ52 SB_DQS3 M_B_DQS4
AL11 AL5 AR8 AN6
M_A_DQ54 SA_DQ53 SA_DQS4 M_A_DQS5 M_B_DQ54 SB_DQ53 SB_DQS4 M_B_DQS5
AP12 AM9 AJ12 AP8
B M_A_DQ55 SA_DQ54 SA_DQS5 M_A_DQS6 M_B_DQ55 SB_DQ54 SB_DQS5 M_B_DQS6 B
AN12 SA_DQ55 SA_DQS6 AR11 AH12 SB_DQ55 SB_DQS6 AK11
M_A_DQ56 AJ14 AM14 M_A_DQS7 M_B_DQ56 AT11 AP14 M_B_DQS7
M_A_DQ57 SA_DQ56 SA_DQS7 M_B_DQ57 SB_DQ56 SB_DQS7
AH14 AN14
M_A_DQ58 SA_DQ57 M_B_DQ58 SB_DQ57
AL15 SA_DQ58 AR14 SB_DQ58
M_A_DQ59 AK15 M_B_DQ59 AT14
M_A_DQ60 SA_DQ59 M_B_DQ60 SB_DQ59
AL14 AT12
M_A_DQ61 SA_DQ60 M_A_A0 M_A_A[15:0] 14 M_B_DQ61 SB_DQ60 M_B_A0 M_B_A[15:0] 15
AK14 AD10 AN15 AA8
M_A_DQ62 SA_DQ61 SA_MA0 M_A_A1 M_B_DQ62 SB_DQ61 SB_MA0 M_B_A1
AJ15 W1 AR15 T7
M_A_DQ63 SA_DQ62 SA_MA1 M_A_A2 M_B_DQ63 SB_DQ62 SB_MA1 M_B_A2
AH15 W2 AT15 R7
SA_DQ63 SA_MA2 M_A_A3 SB_DQ63 SB_MA2 M_B_A3
SA_MA3 W7 SB_MA3 T6
V3 M_A_A4 T2 M_B_A4
SA_MA4 M_A_A5 SB_MA4 M_B_A5
V2 T4
SA_MA5 M_A_A6 SB_MA5 M_B_A6
SA_MA6 W3 SB_MA6 T3
AE10 W6 M_A_A7 AA9 R2 M_B_A7
14 M_A_BS0 SA_BS0 SA_MA7 M_A_A8 15 M_B_BS0 SB_BS0 SB_MA7 M_B_A8
AF10 SA_BS1 SA_MA8 V1 AA7 SB_BS1 SB_MA8 T5
14 M_A_BS1 M_A_A9 15 M_B_BS1 M_B_A9
V6 W5 R6 R3
14 M_A_BS2 SA_BS2 SA_MA9 M_A_A10 15 M_B_BS2 SB_BS2 SB_MA9 M_B_A10
AD8 AB7
SA_MA10 M_A_A11 SB_MA10 M_B_A11
V4 R1
SA_MA11 M_A_A12 SB_MA11 M_B_A12
W4 T1
SA_MA12 M_A_A13 SB_MA12 M_B_A13
AE8 AF8 AA10 AB10
14 M_A_CAS# SA_CAS# SA_MA13 M_A_A14 15 M_B_CAS# SB_CAS# SB_MA13 M_B_A14
AD9 V5 AB8 R5
14 M_A_RAS# SA_RAS# SA_MA14 M_A_A15 15 M_B_RAS# SB_RAS# SB_MA14 M_B_A15
14 M_A_WE# AF9 SA_WE# SA_MA15 V7 15 M_B_WE# AB9 SB_WE# SB_MA15 R4

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(3/7) : DDR3
Size Document Number Rev
Custom
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 6 of 103
5 4 3 2 1
5 4 3 2 1

CPU(4/7)
IVY BRIDGE PROCESSOR (POWER)
CPU1F POWER 6 OF 9

8.5A
IVY-BRIDGE
1D05V_S0
D 53A PROCESSOR UNCORE POWER D
PROCESSOR CORE VCC_CORE

POWER AG35
VCC1
AG34 AH13
VCC2 VCCIO1
AG33 VCC3 VCCIO2 AH10
AG32 AG10
VCC4 VCCIO3
AG31 VCC5 VCCIO4 AC10
AG30 Y10 C729 C730 C731 C732 C715 C716 C717 C718 C733 C734 C719 C720
VCC6 VCCIO5

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP
C713 C722 C727 C736 C714 AG29 U10
VCC7 VCCIO6
1

1
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AG28 VCC8 VCCIO7 P10
AG27 L10

2
VCC9 VCCIO8
AG26 J14
2

2
VCC10 VCCIO9
AF35 J13
VCC11 VCCIO10
AF34 J12
Place Bottom AF33
AF32
VCC12
VCC13
VCC14
VCCIO11
VCCIO12
VCCIO13
J11
H14
AF31 H12
VCC15 VCCIO14
AF30 VCC16 VCCIO15 H11
AF29 G14
VCC17 VCCIO16
AF28 G13
VCC18 VCCIO17

PEG AND DDR


C735 C721 C726 C728 C723 AF27 G12
VCC19 VCCIO18
1

1
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AF26 VCC20 VCCIO19 F14
AD35 VCC21 VCCIO20 F13
AD34 F12
2

2
VCC22 VCCIO21
AD33 VCC23 VCCIO22 F11
AD32 E14
VCC24 VCCIO23
AD31 E12
VCC25 VCCIO24
AD30 VCC26
AD29 VCC27 VCCIO25 E11
AD28 D14
VCC28 VCCIO26
AD27 D13
C VCC29 VCCIO27 C
AD26 VCC30 VCCIO28 D12
AC35 D11
VCC31 VCCIO29
AC34 C14
VCC32 VCCIO30
AC33 VCC33 VCCIO31 C13
AC32 VCC34 VCCIO32 C12
AC31 C11
VCC35 VCCIO33
AC30 VCC36 VCCIO34 B14
AC29 B12
VCC37 VCCIO35
AC28 VCC38 VCCIO36 A14
AC27 A13
VCC39 VCCIO37
AC26 VCC40 VCCIO38 A12
AA35 A11
VCC41 VCCIO39
AA34
Place Top C742 C703 C709 AA33
VCC42
VCC43 VCCIO40
J23
1

1
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C701 C741 AA32


VCC44
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V3MX-GP

AA31
VCC45
AA30
2

VCC46
AA29
VCC47
AA28
VCC48
AA27 VCC49
AA26
VCC50
CORE SUPPLY
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
C738 C702 C706 C707 C708 VCC54
Y31
VCC55
1

1
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

Y30 VCC56
Y29
VCC57
Y28
2

VCC58
Y27
VCC59 Route these three net together
Y26
VCC60
V35
VCC61
SVID

B H_CPU_SVIDALRT# R705 1 B
V34 VCC62 VIDALERT# AJ29 2 43R2J-GP VR_SVID_ALERT# 42
V33 AJ30 H_CPU_SVIDCLK
VCC63 VIDSCLK H_CPU_SVIDDAT H_CPU_SVIDCLK 42
V32 AJ28 H_CPU_SVIDDAT 42
VCC64 VIDSOUT
V31 VCC65
V30
C740 C739 C704 C712 C710 C711 VCC66
V29 1 2 1D05V_S0
VCC67
1

1
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

V28 R703 130R2F-1-GP


VCC68
V27
VCC69
V26
2

VCC70
U35 VCC71
U34 VCC72
U33
VCC73
U32 VCC74
U31
VCC75 reserve PAD for ESD
U30 VCC76
U29
VCC77
U28
VCC78
U27
U26
VCC79 DY DY
VCC80 VCC_CORE
R35

0R2J-2-GP

0R2J-2-GP
VCC81
2

2
R34
VCC82
R33 VCC83

1
R32
VCC84 PUT CLOSE CPU
R31 VCC85
R30 R706
1

1
VCC86 D701 D702
R29 100R2F-L1-GP-U
VCC87
SENSE LINES

R28

2
VCC88 VCCSENSE
R27 AJ35
VCC89 VCC_SENSE VSSSENSE VCCSENSE 42
R26 AJ34
VCC90 VSS_SENSE VSSSENSE 42
P35
VCC91
P34
VCC92

1
P33 VCC93
A A
P32 B10
VCC94 VCCIO_SENSE VTT_SENSE 45 R704
P31 VCC95 VSS_SENSE_VCCIO A10 <Core Design>
VSSP_SENSE 45
P30 VCC96 100R2F-L1-GP-U
P29

2
VCC97
P28 VCC98 Wistron Corporation
1

P27
VCC99 R707 R708 1D05V_S0 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
P26 VCC100
10R2F-L-GP
10R2F-L-GP

Differential Sense feedback Taipei Hsien 221, Taiwan, R.O.C.

Title
2

CPU(4/7) : PWR
PUT CLOSE CPU Size Document Number Rev
Custom
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 7 of 103
5 4 3 2 1
5 4 3 2 1

CPU(5/7) VCCGT_SENSE

IVY BRIDGE PROCESSOR (GRAPHICS POWER) VSSGT_SENSE

D801 D802 M3 - Processor Generated SO-DIMM VREF_DQ

1
33A

0R2J-2-GP

0R2J-2-GP
VCC_GFXCORE CPU1G
POWER 7 OF 9 R820
1st = 84.05067.031
2nd = 84.00138.F31
3rd = 84.05067.031

S
1 2 100R2F-L1-GP-U VCC_GFXCORE

2
DY DY PCH_DDR_EN#
Under Socket and Closed to CPU G

SENSE
LINES
AT24 IVY-BRIDGE AK35 R810
D VAXG1 VAXG_SENSE VCCGT_SENSE 42 Q802 D
AT23 VAXG2 VSSAXG_SENSE AK34 VSSGT_SENSE 42 0R2J-2-GP
C820 C821 C822 C823 C824 C825 AT21 AP2302GN-HF-GP
VAXG3 DY
1

1
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
AT20 R819 reserve PAD for ESD

1
D
VAXG4
AT18 1 2 100R2F-L1-GP-U 20120112 PV-R
VAXG5
AT17
2

2
VAXG6 DDR_VREF_S3_B4
AR24 VAXG7 14 M_VREF_DQ_DIMM0
AR23 CAD Note: +V_SM_VREF should DDR_VREF_S3_D1
VAXG8 15 M_VREF_DQ_DIMM1
AR21 VAXG9 have 10 mil trace width
AR20 VAXG10
AR18 AL1 +V_SM_VREF_CNT

D
VAXG11 SM_VREF Q803
AR17 VAXG12

VREF

2
AP24 B4:VREF_DQ CHA AP2302GN-HF-GP
VAXG13

1
AP23 D1:VREF_DQ CHB C801 C802 R814
VAXG14
AP21
VAXG15 DY DY 5 PCH_DDR_EN# G 0R2J-2-GP

SCD1U16V2ZY-2GP

SC2D2U10V3ZY-1GP
AP20 B4 DDR_VREF_S3_B4 1st = 84.05067.031
DY

2
VAXG16 SA_DIMM_VREFDQ DDR_VREF_S3_D1
AP18 D1 2nd = 84.00138.F31

1
S
VAXG17 SB_DIMM_VREFDQ
AP17 VAXG18 3rd = 84.05067.031

1
AN24
VAXG19 R815 R816
AN23
AN21
VAXG20
VAXG21
1KR2F-3-GP 1KR2F-3-GP 12~16A
AN20
VAXG22 DY DY 1D5V_S0

DDR3 -1.5V RAILS


AN18

2
VAXG23
AN17 VAXG24 33OU*1 10U*6

GRAPHICS
VCC_GFXCORE AM24 AF7
VAXG25 VDDQ1 C803 C804 C805 C806 C807 C808
AM23 AF4
VAXG26 VDDQ2

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
AM21 VAXG27 VDDQ3 AF1
AM20 AC7 TC803
VAXG28 VDDQ4 ST330U2D5VBM-1-GP
Closed to CPU Socket AM18 AC4

2
VAXG29 VDDQ5
AM17 VAXG30 VDDQ6 AC1 80.3371V.A2L
C826 C827 C828 C829 C830 C831 AL24 Y7
VAXG31 VDDQ7
1

1
SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

AL23
VAXG32 VDDQ8
Y4 2nd = 77.22771.00L
AL21 Y1
C VAXG33 VDDQ9 C
AL20 U7 20120131PVR
2

VAXG34 VDDQ10
AL18 U4
VAXG35 VDDQ11
AL17 U1
VAXG36 VDDQ12
AK24 VAXG37 VDDQ13 P7
AK23 VAXG38 VDDQ14 P4
AK21 P1
VAXG39 VDDQ15
AK20 VAXG40
AK18
VAXG41
AK17
AJ24
VAXG42
VAXG43
6A
AJ23 VAXG44
AJ21 VCCSA
VAXG45
AJ20 VAXG46
AJ18
VAXG47
AJ17 M27

SA RAIL
VAXG48 VCCSA1
AH24 M26
VAXG49 VCCSA2 C813 C814 C815 TC802
AH23 L26
VAXG50 VCCSA3

1
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SE330U2D5VDM-1GP
AH21 J26
VAXG51 VCCSA4
AH20
VAXG52 VCCSA5
J25 DY VCCSA
AH18 J24 1st = 77.23371.13L

2
VAXG53 VCCSA6
AH17
VAXG54 VCCSA7
H26 2ND = 79.33719.L01
1.5A VCCSA8
H25 R0801 need be close to pin H23.

1
DY R801
100R2J-2-GP
1D8V_S0
1.8V RAIL

2
H23 VCCUSA_SENSE
VCCSA_SENSE VCCUSA_SENSE 48

B6
VCCPLL1
MISC

A6 C22 H_FC_C22
B C819 C816 C817 C818 VCCPLL2 VCCSA_VID0 VCCSA_SEL H_FC_C22 48 B
A2 VCCPLL3 VCCSA_VID1 C24
VCCSA_SEL 48
1

1
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

1
R804 R806
2

DY A19 H_VCCP_SEL
VCCIO_SEL 1KR2J-1-GP 1KR2J-1-GP

2
SNB: No Connect
IVB: VSS R817
0R2J-2-GP
2 1 H_SNB_IVB#_PWRCTRL 45
H_VCCP_SEL Voltage DY

2
1 1.05V R818
DY 0R2J-2-GP

0 1.0V
1

S3 Power Reduction Circuit Processor VREF_DQ Implementation


1D5V_S3 DDR_VREF_S3 20120112 PV-R
R811 DY
1

R821 R807 1 2
1KR2F-3-GP 1 2 0R2J-2-GP
A A
DY 0R0402-PAD Q801 <Core Design>
DMN5L06K-7-GP
2

+V_SM_VREF +V_SM_VREF_CNT
84.05067.031
D S
Wistron Corporation
1

R822 1st = 84.2N702.J31 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
+V_SM_VREF_G

1KR2F-3-GP 2ND = 84.07002.I31 R803 Taipei Hsien 221, Taiwan, R.O.C.


DY 3rd = 84.2N702.W31 100KR2J-1-GP
G

DY Title
R802 DY
CPU(5/7) : GFX/PWR
2

5 PCH_DDR_EN# 1 2 1 2
0R2J-2-GP C832 Size Document Number Rev
Custom
19,27,29,34,35,36,37,45,46,47,48,92,93 PM_SLP_S3# 20120112 PV-R R823 1 2 0R0402-PAD SC470P50V2KX-3GP
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 8 of 103
5 4 3 2 1
5 4 3 2 1

CPU(6/7)
IVY BRIDGE PROCESSOR (GND)
CPU1H 8 OF 9 CPU1I 9 OF 9
D D
AT35 VSS1 VSS81 AJ22
AT32 VSS2 VSS82 AJ19
AT29 IVY-BRIDGE AJ16 T35 IVY-BRIDGE F22
VSS3 VSS83 VSS161 VSS234
AT27 VSS4 VSS84 AJ13 T34 VSS162 VSS235 F19
AT25 VSS5 VSS85 AJ10 T33 VSS163 VSS236 E30
AT22 VSS6 VSS86 AJ7 T32 VSS164 VSS237 E27
AT19 VSS7 VSS87 AJ4 T31 VSS165 VSS238 E24
AT16 VSS8 VSS88 AJ3 T30 VSS166 VSS239 E21
AT13 VSS9 VSS89 AJ2 T29 VSS167 VSS240 E18
AT10 VSS10 VSS90 AJ1 T28 VSS168 VSS241 E15
AT7 VSS11 VSS91 AH35 T27 VSS169 VSS242 E13
AT4 VSS12 VSS92 AH34 T26 VSS170 VSS243 E10
AT3 VSS13 VSS93 AH32 P9 VSS171 VSS244 E9
AR25 VSS14 VSS94 AH30 P8 VSS172 VSS245 E8
AR22 VSS15 VSS95 AH29 P6 VSS173 VSS246 E7
AR19 VSS16 VSS96 AH28 P5 VSS174 VSS247 E6
AR16 VSS17 VSS98 AH25 P3 VSS175 VSS248 E5
AR13 VSS18 VSS99 AH22 P2 VSS176 VSS249 E4
AR10 VSS19 VSS100 AH19 N35 VSS177 VSS250 E3
AR7 VSS20 VSS101 AH16 N34 VSS178 VSS251 E2
AR4 VSS21 VSS102 AH7 N33 VSS179 VSS252 E1
AR2 VSS22 VSS103 AH4 N32 VSS180 VSS253 D35
AP34 VSS23 VSS104 AG9 N31 VSS181 VSS254 D32
AP31 VSS24 VSS105 AG8 N30 VSS182 VSS255 D29
AP28 VSS25 VSS106 AG4 N29 VSS183 VSS256 D26
AP25 VSS26 VSS107 AF6 N28 VSS184 VSS257 D20
AP22 VSS27 VSS108 AF5 N27 VSS185 VSS258 D17
AP19 VSS28 VSS109 AF3 N26 VSS186 VSS259 C34
C AP16 AF2 M34 C31 C
VSS29 VSS110 VSS187 VSS260
AP13 VSS30 VSS111 AE35 L33 VSS188 VSS261 C28
AP10 VSS31 VSS112 AE34 L30 VSS189 VSS262 C27
AP7 VSS32 VSS113 AE33 L27 VSS190 VSS263 C25
AP4 VSS33 VSS114 AE32 L9 VSS191 VSS264 C23
AP1 VSS34 VSS115 AE31 L8 VSS192 VSS265 C10
AN30 VSS35 VSS116 AE30 L6 VSS193 VSS266 C1
AN27 VSS36 VSS117 AE29 L5 VSS194 VSS267 B22
AN25 AE28 L4 B19
AN22
AN19
VSS37
VSS38
VSS39
VSS VSS118
VSS119
VSS120
AE27
AE26
L3
L2
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
AN16 VSS40 VSS121 AE9 L1 VSS198 VSS271 B13
AN13 VSS41 VSS122 AD7 K35 VSS199 VSS272 B11
AN10 VSS42 VSS123 AC9 K32 VSS200 VSS273 B9
AN7 VSS43 VSS124 AC8 K29 VSS201 VSS274 B8
AN4 VSS44 VSS125 AC6 K26 VSS202 VSS275 B7
AM29 VSS45 VSS126 AC5 J34 VSS203 VSS276 B5
AM25 VSS46 VSS127 AC3 J31 VSS204 VSS277 B3
AM22 VSS47 VSS128 AC2 H33 VSS205 VSS278 B2
AM19 VSS48 VSS129 AB35 H30 VSS206 VSS279 A35
AM16 VSS49 VSS130 AB34 H27 VSS207 VSS280 A32
AM13 VSS50 VSS131 AB33 H24 VSS208 VSS281 A29
AM10 VSS51 VSS132 AB32 H21 VSS209 VSS282 A26
AM7 VSS52 VSS133 AB31 H18 VSS210 VSS283 A23
AM4 VSS53 VSS134 AB30 H15 VSS211 VSS284 A20
AM3 VSS54 VSS135 AB29 H13 VSS212 VSS285 A3
AM2 VSS55 VSS136 AB28 H10 VSS213
AM1 VSS56 VSS137 AB27 H9 VSS214
AL34 VSS57 VSS138 AB26 H8 VSS215
B B
AL31 VSS58 VSS139 Y9 H7 VSS216
AL28 VSS59 VSS140 Y8 H6 VSS217
AL25 VSS60 VSS141 Y6 H5 VSS218
AL22 VSS61 VSS142 Y5 H4 VSS219
AL19 VSS62 VSS143 Y3 H3 VSS220
AL16 VSS63 VSS144 Y2 H2 VSS221
AL13 VSS64 VSS145 W35 H1 VSS222
AL10 VSS65 VSS146 W34 G35 VSS223
AL7 VSS66 VSS147 W33 G32 VSS224
AL4 VSS67 VSS148 W32 G29 VSS225
AL2 VSS68 VSS149 W31 G26 VSS226
AK33 VSS69 VSS150 W30 G23 VSS227
AK30 VSS70 VSS151 W29 G20 VSS228
AK27 VSS71 VSS152 W28 G17 VSS229
AK25 VSS72 VSS153 W27 G11 VSS230
AK22 VSS73 VSS154 W26 F34 VSS231
AK19 VSS74 VSS155 U9 F31 VSS232
AK16 VSS75 VSS156 U8 F29 VSS233
AK13 VSS76 VSS157 U6
AK10 VSS77 VSS158 U5
AK7 VSS78 VSS159 U3
AK4 VSS79 VSS160 U2
AJ25 VSS80

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(6/7) : GND
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 9 of 103
5 4 3 2 1
5 4 3 2 1

CPU(7/7)
IVY BRIDGE PROCESSOR (RESERVED) CFG4
Display Port Presence Strap 0:Enable eDP

1
D DY R1006 D
1KR2J-1-GP CFG4 1:(Default) Disabled; No Physical Display Port
attached to Embedded Display Port

2
0:Enabled; An external Display Port device is
connected to the Embedded Display Port
CPU1E 5 OF 9

IVY-BRIDGE
CFG7
VCC_DIE_SENSE AH27 VCC_DIE_SENSE 1 TP1004 TPAD14-OP-GP

1
AK28 CFG0 VSS_DIE_SENSE AH26
AK29 DY R1009
CFG2 CFG1
AL26 CFG2 1KR2J-1-GP
AL27 CFG3
CFG4 AK26 L7

2
CFG5 CFG4 RSVD#L7
AL29 CFG5 RSVD#AG7 AG7
CFG6 AL30 AE7
CFG7 CFG6 RSVD#AE7
AM31 CFG7 RSVD#AK2 AK2
AM32 CFG8

CFG
AM30 CFG9 RSVD#W8 W8
AM28 CFG10
AM26 CFG11 PEG DEFER TRAINING
AN28 CFG12 RSVD#AT26 AT26
AN31 CFG13 RSVD#AM33 AM33
AN26 CFG14 RSVD#AJ27 AJ27 CFG7 1: (Default) PEG Train immediately following xxRESETB de assertion
AM27 CFG15 0: PEG Wait for BIOS for training
AK31 CFG16
C AN29 C
CFG17

VCC_GFXCORE T8
RSVD#T8
VCC_CORE 49D9R2F-GP
DY R1001 VAXG_VAL_SENSE RSVD#J16 J16

49D9R2F-GP
1 DY 2
R1002 VSSAXG_VAL_SENSE
AJ31 VAXG_VAL_SENSE RSVD#H16 H16
1 2 AH31 VSSAXG_VAL_SENSE RSVD#G16 G16
49D9R2F-GP 1 DY 2 R1003 VCC_VAL_SENSE AJ33
49D9R2F-GP R1004 VSS_VAL_SENSE VCC_VAL_SENSE
1 DY 2 AH33 VSS_VAL_SENSE

AJ26 RSVD#AJ26 RSVD_NCTF#AR35 AR35

RESERVED
RSVD_NCTF#AT34 AT34
AT33 CFG2
RSVD_NCTF#AT33
RSVD_NCTF#AP35 AP35 PEG Static Lane Reversal

1
RSVD_NCTF#AR34 AR34
R1005 1:(Default) Normal Operation; Lane #
1KR2J-1-GP CFG2 definition matches socket pin map definition
F25 RSVD#F25
F24 0:Lane Reversed

2
RSVD#F24
F23 RSVD#F23
D24 RSVD#D24 RSVD_NCTF#B34 B34
G25 RSVD#G25 RSVD_NCTF#A33 A33
G24 RSVD#G24 RSVD_NCTF#A34 A34
E23 RSVD#E23 RSVD_NCTF#B35 B35
D23 C35 CFG6 CFG5
RSVD#D23 RSVD_NCTF#C35
C30 RSVD#C30

1
A31 RSVD#A31
B30 DY R1007 DY R1008
B RSVD#B30 B
B29 RSVD#B29 1KR2J-1-GP 1KR2J-1-GP
D30 RSVD#D30 RSVD#AJ32 AJ32
B31 AK32

2
RSVD#B31 RSVD#AK32
A30 RSVD#A30
C29 RSVD#C29

BCLK_ITP AN35 CLK_XDP_ITP_P1 TP1024 TPAD14-OP-GP


J20 RSVD#J20 BCLK_ITP# AM35 CLK_XDP_ITP_N1 TP1025 TPAD14-OP-GP
B18 RSVD#B18
PCIE Port Bifurcation Straps

J15 RSVD#J15 RSVD_NCTF#AT2 AT2 CFG[6:5] 11: (Default) x16 - Device 1 functions 1 and 2 disabled
RSVD_NCTF#AT1 AT1 10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
RSVD_NCTF#AR1 AR1
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(7/7): CFG/RSVD/DDR3_VREF
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 10 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_XDP
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 11 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 12 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 13 of 103
5 4 3 2 1
5 4 3 2 1

DIMM1 M_A_DQS#[7:0] 6

M_A_DQS[7:0] 6
DIMM1 M_A_A[15:0] 6
M_A_A0 98 NP1
M_A_A1 A0 NP1
97 A1 NP2 NP2
M_A_A2 96
M_A_A3 A2
95 A3 RAS# 110 M_A_RAS# 6
M_A_A4 92 113 M_A_WE# 6
M_A_A5 A4 WE#
91 A5 CAS# 115 M_A_CAS# 6
M_A_A6 90
M_A_A7 A6
D 86 A7 CS0# 114 M_A_DIM0_CS#0 6 D
M_A_A8 89 121 M_A_DIM0_CS#1 6
M_A_A9 A8 CS1#
85 A9
M_A_A10 107 73 M_A_DIM0_CKE0 6 SA0_DIM0
M_A_A11 A10/AP CKE0
M_A_A12
84 A11 CKE1 74 M_A_DIM0_CKE1 6
SA1_DIM0
Note:
83 A12
M_A_A13 119 101 M_A_DIM0_CLK_DDR0 6
If SA0 DIM0 = 0, SA1_DIM0 = 0
M_A_A14 A13 CK0
80 A14 CK0# 103 M_A_DIM0_CLK_DDR#0 6 SO-DIMMA SPD Address is 0xA0

2
1
M_A_A15 78 A15 RN1402 SO-DIMMA TS Address is 0x30
79 A16/BA2 CK1 102 M_A_DIM0_CLK_DDR1 6
6 M_A_BS2
CK1# 104 M_A_DIM0_CLK_DDR#1 6 SRN10KJ-5-GP
6 M_A_BS0 109 BA0
6 M_A_BS1
108 BA1 DM0 11 If SA0 DIM0 = 1, SA1_DIM0 = 0
28 SO-DIMMA SPD Address is 0xA2

3
4
6 M_A_DQ[63:0] M_A_DQ0 DM1
5 DQ0 DM2 46
M_A_DQ1 7 DQ1 DM3 63 SO-DIMMA TS Address is 0x32
M_A_DQ2 15 136
M_A_DQ3 DQ2 DM4
17 DQ3 DM5 153
M_A_DQ4 4 170
M_A_DQ5 DQ4 DM6
6 DQ5 DM7 187
M_A_DQ6 16 RN1401 0R4P2R-PAD
M_A_DQ7 DQ6 SODIMM1_1_SMB_DATA_R
18 DQ7 SDA 200 2 3 PCH_SMBDATA 15,18,31,65
M_A_DQ8 21 202 SODIMM1_1_SMB_CLK_R 1 4
DQ8 SCL PCH_SMBCLK 15,18,31,65
M_A_DQ9 23
M_A_DQ10 DQ9
33 DQ10 EVENT# 198 TS#_DIMM0_1 15

RN
M_A_DQ11 35
M_A_DQ12 DQ11
22 DQ12 VDDSPD 199 3D3V_S0
M_A_DQ13 24 3D3V_S0
DQ13

1
M_A_DQ14 34 197 SA0_DIM0 C1401 C1402
M_A_DQ15 DQ14 SA0 SA1_DIM0
36 DQ15 SA1 201

SCD1U16V2ZY-2GP

SC2D2U6D3V3KX-GP
M_A_DQ16 39

2
DQ16

1
M_A_DQ17 41 77
M_A_DQ18 DQ17 NC#77 R1402
51 DQ18 NC#122 122
C M_A_DQ19 53 125 1D5V_S3 10KR2J-3-GP C
M_A_DQ20 DQ19 NC#125/TEST
40
M_A_DQ21 42
DQ20
75 Thermal EVENT

2
M_A_DQ22 DQ21 VDD
50 DQ22 VDD 76
M_A_DQ23 52 81
M_A_DQ24 DQ23 VDD
57 DQ24 VDD 82
M_A_DQ25 59 87
M_A_DQ26 DQ25 VDD TS#_DIMM0_1
67 DQ26 VDD 88
M_A_DQ27 69 93
DDR_VREF_S3 1D5V_S3 M_A_DQ28 DQ27 VDD
56 DQ28 VDD 94
M_A_DQ29 58 99 SODIMM A DECOUPLING
M_A_DQ30 DQ29 VDD
68 DQ30 VDD 100
M_A_DQ31 70 105
DQ31 VDD
1

R1403 M_A_DQ32 129 106 1D5V_S3


R1401 1KR2F-3-GP M_A_DQ33 DQ32 VDD
131 DQ33 VDD 111
0R2J-2-GP M_A_DQ34 141 112
M_A_DQ35 DQ34 VDD
DY M_A_DQ36
143 DQ35 VDD 117
130 118
2

M_VREF_CA_DIMM0 M_A_DQ37 DQ36 VDD


132 DQ37 VDD 123
M_A_DQ38 140 124 C1407 C1408 C1409 C1410 C1411 C1412
DQ38 VDD
1

1
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
DY M_A_DQ39 142 DQ39
1

R1405 C1403 C1404 M_A_DQ40 147 2


1KR2F-3-GP SCD1U10V2KX-4GP SC2D2U6D3V3KX-GP M_A_DQ41 DQ40 VSS
149 3
2

2
M_A_DQ42 DQ41 VSS
157 DQ42 VSS 8
M_A_DQ43 159 9
M_A_DQ44 DQ43 VSS
146 13
2

M_A_DQ45 DQ44 VSS


148 DQ45 VSS 14
M_A_DQ46 158 19
M_A_DQ47 DQ46 VSS
160 DQ47 VSS 20
M_A_DQ48 163 25
DDR_VREF_S3 1D5V_S3 M_A_DQ49 DQ48 VSS
165 DQ49 VSS 26
M_A_DQ50 175 31 C1413 C1414 C1415 C1416 C1417 C1418 C1419
DQ50 VSS

1
M_A_DQ51 177 32
DQ51 VSS
1

SCD1U10V2KX-5GP
B M_A_DQ52 164 37 B
DQ52 VSS
1

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
R809 R1406 M_A_DQ53 166 38

2
1KR2F-3-GP M_A_DQ54 DQ53 VSS
0R2J-2-GP 174 DQ54 VSS 43
DY M_A_DQ55 176 44 Layout Note:
M_A_DQ56 DQ55 VSS
181 48
2

M_A_DQ57 DQ56 VSS Place these Caps near


183 49
2

M_A_DQ58 DQ57 VSS


M_VREF_DQ_DIMM0 M_A_DQ59
191 DQ58 VSS 54 SO-DIMMA.
193 DQ59 VSS 55
M_A_DQ60 180 60
DQ60 VSS
1

R1407 DY M_A_DQ61 182 61


1KR2F-3-GP C1405 C1406 M_A_DQ62 DQ61 VSS
192 DQ62 VSS 65
SCD1U10V2KX-4GP SC2D2U10V3ZY-1GP M_A_DQ63 194 66
2

DQ63 VSS
VSS 71
M_A_DQS#0 10 72
2

M_A_DQS#1 DQS0# VSS


27 DQS1# VSS 127
M_A_DQS#2 45 128
M_A_DQS#3 DQS2# VSS
62 DQS3# VSS 133
M_A_DQS#4 135 134
M_A_DQS#5 DQS4# VSS
152 DQS5# VSS 138
M_A_DQS#6 169 139
M_A_DQS#7 DQS6# VSS
186 DQS7# VSS 144
VSS 145
M_A_DQS0 12 150
M_A_DQS1 DQS0 VSS
29 DQS1 VSS 151
0D75V_S0 M_A_DQS2
Place these caps 47 DQS2 VSS 155
M_A_DQS3 64 156
close to VTT1 and M_A_DQS4 137
DQS3 VSS
161
M_A_DQS5 DQS4 VSS
VTT2. C1422 C1423 M_A_DQS6
154 DQS5 VSS 162
171 DQS6 VSS 167
1

C1420 C1421 DY DY M_A_DQS7 188 168


DQS7 VSS
VSS 172
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

116 173
2

6 M_A_DIM0_ODT0 ODT0 VSS


6 M_A_DIM0_ODT1
120 ODT1 VSS 178
A
VSS 179 A
M_VREF_CA_DIMM0 126 184
VREF_CA VSS
8 M_VREF_DQ_DIMM0
1 VREF_DQ VSS 185 <Core Design>
VSS 189
5,15,97 DDR3_DRAMRST#
30 RESET# VSS 190
0D75V_S0 VSS
VSS
195
196 Wistron Corporation
203 205 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
VTT1 VSS Taipei Hsien 221, Taiwan, R.O.C.
204 VTT2 VSS 206
Title
DDR3-204P-168-GP
Bom Not: 1st/2nd/3rd Add in BOM 1st = 62.10024.I91 H=9.2mm Size
DDR3 SO-DIMM1
Document Number Rev
2nd = 62.10017.U01 Custom
3rd = 62.10024.H81 2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 14 of 103
5 4 3 2 1
5 4 3 2 1

M_B_A0
M_B_A1
98
97
DIMM2

A0 NP1 NP1
NP2
DIMM2
6 M_B_A[15:0] A1 NP2
M_B_A2 96
M_B_A3 A2
6 M_B_DQS#[7:0] 95 A3 RAS# 110 M_B_RAS# 6
M_B_A4 92 113 M_B_WE# 6
M_B_A5 A4 WE# 3D3V_S0
6 M_B_DQS[7:0] 91 A5 CAS# 115 M_B_CAS# 6
M_B_A6 90
M_B_A7 A6
86 A7 CS0# 114 M_B_DIM0_CS#0 6
M_B_A8 89 121 M_B_DIM0_CS#1 6
M_B_A9 A8 CS1#
85 A9
M_B_A10 107 73 M_B_DIM0_CKE0 6
M_B_A11 A10/AP CKE0
84 A11 CKE1 74 M_B_DIM0_CKE1 6
D M_B_A12 83 D
M_B_A13 A12
119 A13 CK0 101 M_B_DIM0_CLK_DDR0 6
M_B_A14 80 103 M_B_DIM0_CLK_DDR#0 6 RN1502
M_B_A15 A14 CK0# SB1_DIM0
78 A15 1 4
79 102 M_B_DIM0_CLK_DDR1 6 SB0_DIM0 2 3 Note:
6 M_B_BS2 A16/BA2 CK1
CK1# 104 M_B_DIM0_CLK_DDR#1 6 SO-DIMMB SPD Address is 0xA4
109 SRN10KJ-5-GP SO-DIMMB TS Address is 0x34
6 M_B_BS0 BA0
6 M_B_BS1
108 BA1 DM0 11
6 M_B_DQ[63:0] DM1 28
M_B_DQ0 5 46
M_B_DQ1 DQ0 DM2
7 DQ1 DM3 63
M_B_DQ2 15 136
M_B_DQ3 DQ2 DM4
17 DQ3 DM5 153
M_B_DQ4 4 170
DQ4 DM6

RN
M_B_DQ5 6 187
M_B_DQ6 DQ5 DM7 RN1501 0R4P2R-PAD
16 DQ6
M_B_DQ7 18 200 SODIMM0_1_SMB_DATA_R 1 4
DQ7 SDA PCH_SMBDATA 14,18,31,65
M_B_DQ8 21 202 SODIMM0_1_SMB_CLK_R 2 3
DQ8 SCL PCH_SMBCLK 14,18,31,65
M_B_DQ9 23
M_B_DQ10 DQ9 3D3V_S0
33 DQ10 EVENT# 198 TS#_DIMM0_1 14
M_B_DQ11 35
M_B_DQ12 DQ11
22 DQ12 VDDSPD 199
M_B_DQ13 24 DQ13

1
M_B_DQ14 34 197 SB0_DIM0 C1504 DY C1505
M_B_DQ15 DQ14 SA0 SB1_DIM0
36 DQ15 SA1 201

SCD1U16V2ZY-2GP
M_B_DQ16 39 SC2D2U10V3ZY-1GP

2
M_B_DQ17 DQ16
41 DQ17 NC#1 77
M_B_DQ18 51 122
M_B_DQ19 DQ18 NC#2 1D5V_S3
53 DQ19 NC#/TEST 125
M_B_DQ20 40
M_B_DQ21 DQ20
42 DQ21 VDD1 75
M_B_DQ22 50 76
M_B_DQ23 DQ22 VDD2
52 DQ23 VDD3 81
C M_B_DQ24 57 82 C
M_B_DQ25 DQ24 VDD4
59 DQ25 VDD5 87
M_B_DQ26 67 88
M_B_DQ27 DQ26 VDD6
69 DQ27 VDD7 93
M_B_DQ28 56 94
M_B_DQ29 DQ28 VDD8
58 DQ29 VDD9 99
M_B_DQ30 68 100
M_B_DQ31 DQ30 VDD10
70 DQ31 VDD11 105
M_B_DQ32 129 106
DDR_VREF_S3 1D5V_S3 M_B_DQ33 DQ32 VDD12
131 DQ33 VDD13 111
M_B_DQ34 141 112
M_B_DQ35 DQ34 VDD14
143 DQ35 VDD15 117
M_B_DQ36 130 118 SODIMM B DECOUPLING
DQ36 VDD16
1

R1506 M_B_DQ37 132 123


R1501 1KR2F-3-GP M_B_DQ38 DQ37 VDD17 1D5V_S3
140 DQ38 VDD18 124
0R2J-2-GP M_B_DQ39 142
M_B_DQ40 DQ39
DY M_B_DQ41
147 DQ40 VSS 2
149 3
2

M_B_DQ42 DQ41 VSS


157 DQ42 VSS 8
M_VREF_CA_DIMM1 M_B_DQ43 159 9
M_B_DQ44 DQ43 VSS C1508 C1509 C1510 C1511 C1512 C1513
146 DQ44 VSS 13
1

1
SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
DY M_B_DQ45 148 14 TC1401
DQ45 VSS
1

1
SE330U2D5VDM-1GP
R1507 C1506 C1507 M_B_DQ46 158 19
1KR2F-3-GP SCD1U10V2KX-4GP SC2D2U6D3V3KX-GP M_B_DQ47 DQ46 VSS
160 20 1st = 77.23371.13L
2

2
M_B_DQ48 DQ47 VSS
163 25 2ND = 79.33719.L01

2
M_B_DQ49 DQ48 VSS
165 DQ49 VSS 26 3rd = 77.23371.13L
M_B_DQ50 175 31
2

M_B_DQ51 DQ50 VSS


177 DQ51 VSS 32
M_B_DQ52 164 37
M_B_DQ53 DQ52 VSS
166 DQ53 VSS 38
M_B_DQ54 174 43
M_B_DQ55 DQ54 VSS
176 DQ55 VSS 44
DDR_VREF_S3 1D5V_S3 M_B_DQ56 181 48 C1516 C1517 C1518 C1519 C1521 C1520 C1522
DQ56 VSS

1
B M_B_DQ57 183 49 Layout Note: B
M_B_DQ58 DQ57 VSS
191 54
DQ58 VSS Place these Caps near

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
M_B_DQ59 193 55

2
DQ59 VSS
1

R1508 M_B_DQ60 180 60 SO-DIMMB.


R808 1KR2F-3-GP M_B_DQ61 DQ60 VSS
182 DQ61 VSS 61
0R2J-2-GP M_B_DQ62 192 65
M_B_DQ63 DQ62 VSS
DY 194 DQ63 VSS 66
71
2

M_VREF_DQ_DIMM1 M_B_DQS#0 VSS


10 DQS0# VSS 72
M_B_DQS#1 27 127
DQS1# VSS
1

DY M_B_DQS#2 45 128
DQS2# VSS
1

R1509 C1514 C1515 M_B_DQS#3 62 133


1KR2F-3-GP SCD1U10V2KX-4GP SC2D2U10V3ZY-1GP M_B_DQS#4 DQS3# VSS
135 134
2

M_B_DQS#5 DQS4# VSS


152 DQS5# VSS 138
M_B_DQS#6 169 139
M_B_DQS#7 DQS6# VSS
186 144
2

DQS7# VSS
VSS 145
M_B_DQS0 12 150
M_B_DQS1 DQS0 VSS
29 DQS1 VSS 151
M_B_DQS2 47 155
M_B_DQS3 DQS2 VSS
64 DQS3 VSS 156
M_B_DQS4 137 161
M_B_DQS5 DQS4 VSS
154 DQS5 VSS 162
M_B_DQS6 171 167
M_B_DQS7 DQS6 VSS
188 DQS7 VSS 168
VSS 172
6 M_B_DIM0_ODT0
116 ODT0 VSS 173
6 M_B_DIM0_ODT1
120 ODT1 VSS 178
VSS 179
M_VREF_CA_DIMM1 126 184
VREF_CA VSS
8 M_VREF_DQ_DIMM1
1 VREF_DQ VSS 185
VSS 189
Place these caps 0D75V_S0 5,14,97 DDR3_DRAMRST#
30 RESET# VSS 190
A
VSS 195 A
close to VTT1 and 196
VSS
VTT2. 203 VTT1 VSS 205 <Core Design>
204 VTT2 VSS 206

C1523 C1501 C1502 C1503 DDR3-204P-85-GP-U Wistron Corporation


1

1
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


DY DY Taipei Hsien 221, Taiwan, R.O.C.
62.10017.U21 H=5.2mm
2

Title
2nd = 62.10017.T91
3rd = 62.10024.I61
Size Document Number
DDR3 SO-DIMM2 Rev
Custom
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 15 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 16 of 103
5 4 3 2 1
A B C D E

RTC_X1 RTC_AUX_S5 R1705 PCH(1/9)


1
20KR2J-L2-GP
2 INTVRMEN- Integrated
SUS 1.05V VRM Enable LPC_AD[3:0] 27,71

1
R1706
1 2 RTC_X2 C1701 1 DY 2 PCH_INTVRMEN High - Enable internal VRs
10MR2J-L-GP SC1U10V2KX-1GP R1707 330KR2J-L1-GP

2
PCH1A 1 OF 10
X1701 RTC_AUX_S5
X-32D768KHZ-34GPU R1708 RTC_X1 A20 C38 LPC_AD0
RTCX1 FWH0/LAD0 LPC_AD1
4 1 2 FWH1/LAD1 A38 4

LPC
1 4 RTC_X2 C20 B37 LPC_AD2
RTCX2 FWH2/LAD2

2
20KR2J-L2-GP C37 LPC_AD3
FWH3/LAD3
1

1
C1702 C1703 G1701 RTC_RST# D20
7pF20PPM RTCRST#
SC6P50V2CN-1GP

SC6P50V2CN-1GP
C1704 SRTC_RST# D36 LPC_FRAME#_R 1 2
SC1U10V2KX-1GP GAP-OPEN FWH4/LFRAME# R1726 22R2J-2-GP LPC_FRAME# 27,71
2 3 54,97 INTRUDER# G22
2

2
SRTCRST#
20120312MV E36

1
LDRQ0#

RTC
RTC_AUX_S5 R1709
1 2 1MR2J-1-GP K22 K36
INTRUDER# LDRQ1#/GPIO23 PCH_GPIO23 TP1701 TPAD14-OP-GP
1
R1710
1 2 330KR2J-L1-GP PCH_INTVRMEN C17 V5
INTVRMEN SERIRQ SIRQ 27,71
RN1701
82.30001.661 29,97 HDA_SDOUT_CODEC 1 8
29,97 HDA_RST#_CODEC 2 7 SATA0RXN AM3 SATA_RXN0 56
2ND = 82.30001.B21 HDA_BIT_CLK
29,97 HDA_BITCLK_CODEC 3 6 N34 HDA_BCLK SATA0RXP AM1 SATA_RXP0 56 HDD

SATA 6G
29 HDA_SYNC_CODEC 4 5 SATA0TXN AP7 SATA_TXN0 56
HDA_SYNC L34 AP5
SRN33J-7-GP HDA_SYNC SATA0TXP SATA_TXP0 56
R1711 1 2 PCH_HDA_SPKR T10 AM10
29 HDA_SPKR SPKR SATA1RXN SATA_RXN1 56
0R0402-PAD AM8
SATA1RXP SATA_RXP1 56
20120112 PV-R PCH_HDA_RST# K34
HDA_RST# SATA1TXN AP11
AP10
SATA_TXN1 56 ODD
HDA_SYNC_C SATA1TXP SATA_TXP1 56
E34 HDA_SDIN0 SATA2RXN AD7
SATA2RXP AD5
G34 HDA_SDIN1 SATA2TXN AH5
SATA2TXP AH4
C34 HDA_SDIN2
3D3V_S5

IHDA
29 HDA_SDIN0_CODEC SATA3RXN AB8
A34 HDA_SDIN3 SATA3RXP AB10
3 AF3 3
HDA_SDO_R SATA3TXN
SATA3TXP AF1
1

HDA_SDO A36
R1725 HDA_SDO

SATA
SATA4RXN Y7
1KR2J-1-GP 1KR2J-1-GP Y5
R1712 1 HDD_HALTLED_R SATA4RXP
68 HDD_HALTLED 2 C36 HDA_DOCK_EN#/GPIO33 SATA4TXN AD3
AD1
2

ISO_PREP# SATA4TXP
N32 HDA_DOCK_RST#/GPIO13
Y3
BAT_GRNLED#_S

SATA5RXN
SATA5RXP Y1
SATA5TXN AB3
PCH_JTAG_TCK_BUF J3 AB1
JTAG_TCK SATA5TXP
PCH_JTAG_TMS H7 Y11 1D05V_S0
JTAG_TMS SATAICOMPO

JTAG
PCH_JTAG_TDI K5 Y10 SATA_COMP R1713 1 2 37D4R2F-GP
10KR2J-3-GP JTAG_TDI SATAICOMPI
R1701
84.00084.F31 PCH_JTAG_TDO H1
S

JTAG_TDO 1D05V_S0
2nd = 84.BSS84.B31 SATA3RCOMPO AB12
27,82 BAT_GRNLED# 1 2BAT_GRNLED#_G G
AB13 SATA3_COMP R1714 1 2 49D9R2F-GP 3D3V_S0
BSS84-7-F-GP SATA3COMPI
Q1701

1
T3 AH1 RBIAS_SATA3 1 2
D

60 PCH_SPI_CLK SPI_CLK SATA3RBIAS R1715 750R2F-GP


Y14 NEED TO PLACE CLOSE TO PCH R1716
BAT_GRNLED#_D

60 PCH_SPI_CS#0 SPI_CS0# 10KR2J-3-GP


T1

2
27,71 SPI_CS1# SPI_CS1#

SPI
P3 SATA_LED#
2 SATALED# SATA_LED# 68 2

60 PCH_SPI_MOSI V4 SPI_MOSI SATA0GP/GPIO21 V14 SATA0GP_GPIO21 22

60 PCH_SPI_MISO U3 SPI_MISO SATA1GP/GPIO19 P1 SATA_ODD_DET# 56


10KR2J-3-GP
R1702 84.00084.F31 PANTHER-GP-NF
S

3D3V_S5
5,21,32,34,53,54,56,71,83,96,97 PLT_RST# 1 2PLT_RST#_G G 2nd = 84.BSS84.B31 R1724 1 2 1KR2J-1-GP HDA_SYNC
BSS84-7-F-GP
Q1702 R1729 1
RTC Battery 3D3V_AUX_S5
2 10KR2J-3-GP ISO_PREP#
RTC_AUX_S5
D

U1701

2
For Flash Descriptor Security Override HW strap 3D3V_S5 +RTC_VCC
RTC1 3
PCHXDP R1717 1 2 210R2F-L-GP PCH_JTAG_TMS
PCHXDP R1718 1 2 210R2F-L-GP PCH_JTAG_TDO 1 +RTC_VCC 1 2 RTC_PW R 1
PWR

1
PCHXDP R1719 1 2 210R2F-L-GP PCH_JTAG_TDI 2 R1720 1KR2J-1-GP
5V_S0 GND C1705
NP1 NP1
CH715FGP-GP-U SC1U10V3ZY-6GP
NO REBOOT STRAP RN1703 NP2

2
PCH_JTAG_TDO NP2
1 8
PCH_JTAG_TDI
83.R0304.D81
No Reboot Strap R710 2 7
2ND = 83.00040.E81
Low = Default PCHXDP 3 6 PCH_JTAG_TMS BAT-060003HA002M213ZL-GP-U
4
3

HDA_SPKR High = No Reboot 4 5 62.70014.001 20120210PV-R


RN1702
3D3V_S0 SRN100J-4-GP
1 SRN10KJ-5-GP
R1721 1
2nd = 62.70001.061 <Core Design> 1
PCHXDP 2 51R2J-2-GP PCH_JTAG_TCK_BUF
R1727 1 DY 2 1KR2J-1-GP HDD_HALTLED_R
HDA_SPKR R1728 1 2 20KR2J-L2-GP HDA_SDO 20120314 MV
1 2
Wistron Corporation
1
2

R1722 10KR2J-3-GP HDA_SDO_G


20120315 MV 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
DY HDA_SDO_G U1704
Taipei Hsien 221, Taiwan, R.O.C.
HDA_SYNC_C 1 6 HDA_SYNC LAYOUT NOTE:
Title
84.2N702.A3F JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH
SIRQ
2 5 2nd = 84.2N702.E3F JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH PCH(1/9) : HDA/JTAG/SATA
1
R1723
2
10KR2J-3-GP HDA_SDO HDA_SDO_R
3rd = 84.2N702.F3F JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP Size Document Number Rev
3 4
JTAG_TCK TERMINATIONS NEED TO BE PLACED NEAR PCH A3 -1
2012 S-Series Richie 13.3
2N7002KDW -GP Date: W ednesday, March 14, 2012 Sheet 17 of 103
A B C D E
A B C D E

PCH1B PCH(2/9) 2 OF 10 R1806 2 1


3D3V_S5

10KR2J-3-GP
3D3V_S0

4
3
BG34 PERN1
BJ34 E12 RN1803 3D3V_S0
PERP1 SMBALERT#/GPIO11 FPR_OFF 64,97
AV32 PETN1 SRN2K2J-1-GP
AU32 H14 PCH_SMB_CLK
PETP1 SMBCLK 3D3V_S5
BE34 C9 PCH_SMB_DATA

1
2
PERN2 SMBDATA
BF34 PERP2
BB32 R1807 1 2
PETN2 U1801
AY32 1KR2J-1-GP
PETP2

SMBUS
4 A12 14,15,31,65 PCH_SMBDATA 1 6 PCH_SMB_DATA 4
SML0ALERT#/GPIO60 PCH_DDR_RST# 5
32 PCIE_RXN3_MEDIA BG36 PERN3
BJ36 C8 PCH_SML0_CLK 2 5
Media 32 PCIE_RXP3_MEDIA C1805 1 2 SCD1U10V2KX-5GP PCIE_TXN3_C AV34
PERP3 SML0CLK
32 PCIE_TXN3_MEDIA PETN3
32 PCIE_TXP3_MEDIA C1806 1 2 SCD1U10V2KX-5GP PCIE_TXP3_C AU34 G12 PCH_SML0_DATA PCH_SMB_CLK 3 4 PCH_SMBCLK 14,15,31,65
PETP3 SML0DATA
BF36 2N7002KDW -GP
53 PCIE_RXN4_W LAN PERN4
WLAN 53 PCIE_RXP4_W LAN C1809 1
BE36 PERP4 84.2N702.A3F
53 PCIE_TXN4_W LAN 2 SCD1U10V2KX-5GP PCIE_TXN4_C AY34 PETN4 SML1ALERT#/PCHHOT#/GPIO74 C13 PCH_GPIO74 2nd = 84.2N702.E3F
C1807 1 2 SCD1U10V2KX-5GP PCIE_TXP4_C 3D3V_S5
53 PCIE_TXP4_W LAN BB34 PETP4 PCH_SML1CLK
3rd = 84.2N702.F3F
SML1CLK/GPIO58 E14

PCI-E*
BG37 PERN5

1
BH37 M16 PCH_SML1DATA
PERP5 SML1DATA/GPIO75 R1801
AY36 PETN5
BB36 PETP5 10KR2J-3-GP

34 PCIE_RXN6_LAN BJ38 84.2N702.J31

2
PERN6
LAN 34 PCIE_RXP6_LAN
C1810 1
BG38 PERP6 2nd = 84.07002.I31
2 SCD1U10V2KX-5GP PCIE_TXN6_C

Controller
34 PCIE_TXN6_LAN
C1811 1
AU36 PETN6 CL_CLK1 M7 3rd = 84.2N702.W31
34 PCIE_TXP6_LAN 2 SCD1U10V2KX-5GP PCIE_TXP6_C AV36 PETP6 2N7002K-2-GP
DIS_PX

Link
BG40 PERN7 CL_DATA1 T11 G PE_PW RGD 22,86,92,93,96,97
BJ40 PERP7
AY40 PETN7 D
BB40 PETP7 CL_RST1# P10 3D3V_AUX_S5
S 3D3V_S5
BE38 PERN8

4
3
2
1
BC38 PERP8 Q1801
AW38 RN1802
3 PETN8 3
AY38 PETP8 SRN2K2J-4-GP
R1808
M10 CLKREQ_PEG_A# 2 1 10KR2J-3-GP
PEG_A_CLKRQ#/GPIO47 DY

RN
Y40

5
6
7
8
CLKOUT_PCIE0N RN1810 PCH_SML1DATA
Y39 CLKOUT_PCIE0P
AB37 CLKOUT_PEG_A_N 1 4 3D3V_S5
GPIO73 CLKOUT_PEG_A_N CLKOUT_PEG_A_P CLK_PCIE_VGA# 83 PCH_SML1CLK

CLOCKS
J2 PCIECLKRQ0#/GPIO73 CLKOUT_PEG_A_P AB38 2 3 CLK_PCIE_VGA 83
0R4P2R-PAD 20120116PV-R
20120212 MV AB49 AV22 U1802
CLKOUT_PCIE1N CLKOUT_DMI_N CLKOUT_DMI_N 5 PCH_SML1DATA
20120112 PV-R AB47 CLKOUT_PCIE1P CLKOUT_DMI_P AU22 CLKOUT_DMI_P 5 1 6
PCH_KBC_DATA 27,28,85
R1804
1 2 GPIO18 M1 2 5
54 W W AN_DET# 0R2J-2-GP PCIECLKRQ1#/GPIO18
CLKOUT_DP_N AM12
AM13 CLOCK TERMINATION FOR FCIM 3 4 PCH_SML1CLK
CLKOUT_DP_P 27,28,85 PCH_KBC_CLK
AA48 CLKOUT_PCIE2N
AA47 RN1806
CLKOUT_PCIE2P CLK_BUF_EXP_N 2N7002KDW -GP
CLKIN_DMI_N BF18 1 4
GPIO20 V10 BE18 CLK_BUF_EXP_P 2 3 SRN10KJ-5-GP 84.2N702.A3F
PCIECLKRQ2#/GPIO20 CLKIN_DMI_P
RN1807
2nd = 84.2N702.E3F
CLK_BUF_CPYCLK_N
3rd = 84.2N702.F3F
32 CLK_PCIE_MEDIA# Y37 CLKOUT_PCIE3N CLKIN_GND1_N BJ30 2 3
Media 32 CLK_PCIE_MEDIA Y36 CLKOUT_PCIE3P CLKIN_GND1_P BG30 CLK_BUF_CPYCLK_P 1 4 SRN10KJ-5-GP

32 CLKREQ_MEDIA# A8 RN1808 3D3V_S5


PCIECLKRQ3#/GPIO25 CLK_BUF_DOT96_N
CLKIN_DOT_96N G24 1 4

4
3
2
1
E24 CLK_BUF_DOT96_P 2 3 SRN10KJ-5-GP
CLKIN_DOT_96P RN1801
53 CLK_PCIE_W LAN# Y43 CLKOUT_PCIE4N
WLAN Y45 RN1809 SRN2K2J-4-GP
2 53 CLK_PCIE_W LAN CLKOUT_PCIE4P CLK_BUF_CKSSCD_N 2
CLKIN_SATA_N AK7 1 4
L12 AK5 CLK_BUF_CKSSCD_P 2 3 SRN10KJ-5-GP
53 CLKRQ_W LAN# PCIECLKRQ4#/GPIO26 CLKIN_SATA_P

5
6
7
8
V45 K45 CLK_BUF_REF14 R1802 1 2 10KR2J-3-GP
CLKOUT_PCIE5N REFCLK14IN PCH_SML0_DATA
V46 CLKOUT_PCIE5P
All resistors need very close to PCH PCH_SML0_CLK
GPIO44 L14 H45 PCH_SMB_CLK
PCIECLKRQ5#/GPIO44 CLKIN_PCILOOPBACK PCH_SMB_DATA
CLK_PCI_FB 21
AB42 V47 XTAL25_IN
CLKOUT_PEG_B_N XTAL25_IN XTAL25_OUT
AB40 CLKOUT_PEG_B_P XTAL25_OUT V49

GPIO56 E6 1D05V_S0
PEG_B_CLKRQ#/GPIO56
Y47 XCLK_RCOMP 1 2
XCLK_RCOMP R1803 90D9R2F-1-GP
34 CLK_PCIE_LAN# V40 CLKOUT_PCIE6N
LAN 34 CLK_PCIE_LAN V42 CLKOUT_PCIE6P

34 CLKREQ_LAN# T13 PCIECLKRQ6#/GPIO45


V38 K43 CLK_48_USB30 1 TP1801 TPAD14-OP-GP
FLEX CLOCKS

CLKOUT_PCIE7N CLKOUTFLEX0/GPIO64
V37 CLKOUT_PCIE7P
F47 CLK_27_NSSC 1 TP1802 TPAD14-OP-GP
CLKRQ_W W AN# CLKOUTFLEX1/GPIO65
K12 PCIECLKRQ7#/GPIO46
H47 CLK_48_KBC_PCH_SIO 1 TP1803TPAD14-OP-GP
TPAD14-OP-GP
TP1805
T P1805 PCIE_CLK_XDP_N CLKOUTFLEX2/GPIO66
1 AK14 CLKOUT_ITPXDP_N
TPAD14-OP-GP
TP1806
T P1806 1 PCIE_CLK_XDP_P AK13 K49 CLK_14M_KBC_P 1 TP1804TPAD14-OP-GP
CLKOUT_ITPXDP_P CLKOUTFLEX3/GPIO67
1 <Core Design> 1

PANTHER-GP-NF XTAL25_IN 1 2
RN1804 C1801
CLKREQ_LAN# 1 10
3D3V_S5 3D3V_S0 SC15P50V2JN-2-GP Wistron Corporation
1

PCH_GPIO74 2 9 CLKRQ_W LAN# 2 3 X1801 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
GPIO44 3 8 GPIO56 R1805 XTAL-25MHZ-155-GP Taipei Hsien 221, Taiwan, R.O.C.
CLKRQ_W W AN# 4 7 CLKREQ_MEDIA# 1MR2J-1-GP 82.30020.D41
GPIO73 Title
3D3V_S5 5 6 RN1805
GPIO18
2nd = 82.30020.G71
1 4 1 4 3rd = 82.30020.G61 PCH : PCI/USB/NVRAM/RSVD
2

SRN10KJ-L3-GP 2 3 GPIO20 C1802


XTAL25_OUT 1 2 SC18P50V2JN-1-GP Size Document Number Rev
SRN10KJ-5-GP A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 18 of 103
A B C D E
A B C D E

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)


(R1917 STUFFED,
PCH(3/9) R1901 UNSTUFFED

LOW Disabled
(R1901 STUFFED,
3 OF 10
R1917 UNSTUFFED
4 DMI_RXN[3:0] PCH1C
4 FDI_TX_N[7:0] 4 4
DMI_RXN0 BC24 BJ14 FDI_TX_N0
DMI_RXN1 DMI0RXN FDI_RXN0 FDI_TX_N1
BE20 DMI1RXN FDI_RXN1 AY14
DMI_RXN2 BG18 BE14 FDI_TX_N2
DMI_RXN3 DMI2RXN FDI_RXN2 FDI_TX_N3
4 DMI_RXP[3:0] BG20 DMI3RXN FDI_RXN3 BH13
BC12 FDI_TX_N4 RTC_AUX_S5
DMI_RXP0 FDI_RXN4 FDI_TX_N5
BE24 DMI0RXP FDI_RXN5 BJ12
DMI_RXP1 BC20 BG10 FDI_TX_N6
DMI_RXP2 DMI1RXP FDI_RXN6 FDI_TX_N7 R1917 1
BJ18 DMI2RXP FDI_RXN7 BG9 2 330KR2J-L1-GP
DMI_RXP3 BJ20 FDI_TX_P[7:0] 4
4 DMI_TXN[3:0] DMI3RXP FDI_TX_P0 DSW ODVREN R1901 1
FDI_RXP0 BG14 2 330KR2J-L1-GP
DMI_TXN0 AW24 BB14 FDI_TX_P1 DY
DMI_TXN1 DMI0TXN FDI_RXP1 FDI_TX_P2
AW20 DMI1TXN FDI_RXP2 BF14
DMI_TXN2 BB18 BG13 FDI_TX_P3
DMI_TXN3 DMI2TXN FDI_RXP3 FDI_TX_P4
4 DMI_TXP[3:0] AV18 DMI3TXN FDI_RXP4 BE12

DMI
FDI
BG12 FDI_TX_P5
DMI_TXP0 FDI_RXP5 FDI_TX_P6
AY24 DMI0TXP FDI_RXP6 BJ10
DMI_TXP1 AY20 BH9 FDI_TX_P7
DMI_TXP2 DMI1TXP FDI_RXP7
AY18 DMI2TXP
1D05V_S0 PUT CLOSE PCH DMI_TXP3 AU18 DMI3TXP
FDI_INT AW16 FDI_INT 4
R1902 1 2 49D9R2F-GP DMI_COMP_R BJ24 AV12 FDI_FSYNC0 4
DMI_ZCOMP FDI_FSYNC0
BG25 DMI_IRCOMP FDI_FSYNC1 BC10 FDI_FSYNC1 4
1 2 RBIAS_CPY BH21 DMI2RBIAS FDI_LSYNC0 AV14 FDI_LSYNC0 4
R1903 750R2F-GP
FDI_LSYNC1 BB10 FDI_LSYNC1 4
3 3

3D3V_S0
TPAD14-OP-GP
TP1903
T P1903 1 SUSACK#_R A18 DSW ODVREN 20120112 PV-R
DSWVRMEN
R1904 1 2 0R0402-PAD RSMRST#

System Power Management


C12 E22 PCH_DPW ROK R1905 1 DY 2 10KR2J-3-GP
SUSACK# DPWROK

R1906 2 1 0R0402-PAD PM_SYSRST#_R K3 B9


5 XDP_DBRESET# SYS_RESET# WAKE# PCIE_W AKE# 34,53

R1907 2 1 0R0402-PAD SYS_PW ROK_R P12 N3


42 VGATE SYS_PWROK CLKRUN#/GPIO32 PM_CLKRUN# 27

R1908 2 1 0R0402-PAD PM_PCH_PW ROK L22 G8 PCH_GPIO61 1 TP1901 TPAD14-OP-GP


27,97 PM_PW ROK PWROK SUS_STAT#/GPIO61 3D3V_S5
R1909 2 1 0R0402-PAD
RN1901
APW ROK L10 N14 ADP_PRES_OUT 1 8
APWROK SUSCLK/GPIO62 SUSCLK32_KBC 27 PW R_BTN_OUT# 2 7
PM_RI# 3 6
B13 D10 PM_SLP_S5# PCIE_W AKE# 4 5
5 PM_DRAM_PW RGD DRAMPWROK SLP_S5#/GPIO63
20120112 PV-R SRN10KJ-6-GP
C21 H4 SLP_S4#_R R1911 1 2 0R0402-PAD
27,41,97 RSMRST# RSMRST# SLP_S4# PM_SLP_S4# 46,62,97

K16 F4 SLP_S3#_R R1912 1 2 0R0402-PAD


27 SUS_PW R_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# R1910 1 PM_SLP_S3# 8,27,29,34,35,36,37,45,46,47,48,92,93 3D3V_S0
DY 2 0R2J-2-GP
2 2

E20 G10 PM_SLP_A#_R R1913 1 2 0R0402-PAD


27 PW R_BTN_OUT# PWRBTN# SLP_A# PM_SLP_A# 27 PM_CLKRUN# 1 2
R1915 8K2R2J-3-GP
H20 G16 SLP_SUS# 1 TP1905 TPAD14-OP-GP
27,85 ADP_PRES_OUT ACPRESENT/GPIO31 SLP_SUS#

PCH_GPIO72 E10 AP14


BATLOW#/GPIO72 PMSYNCH H_PM_SYNC 5 3D3V_S5

PM_RI# A10 K14 SLP_LAN# RN1902


RI# SLP_LAN#/GPIO29 PCH_GPIO72 1 4
SUS_PW R_ACK 2 3
PANTHER-GP-NF
SRN10KJ-5-GP

Intel ME-EC Interaction Signal List with and without M3 support


Platform With M3 Support AMT/ME COMPLIANCY TEST CONN.
Signal Name (e.g., Intel AMT) Platform Without M3 Support
APS1
9

SUSPWRDNACK(GPIO30) Required Required PM_SLP_S3# 1

PM_SLP_S4# 2
1 PM_SLP_S5# 3 <Core Design> 1
ACPRESENT(GPIO31) Required Required 3D3V_S5 PM_SLP_A# 4

ON_OFF#
5 DY
(Tie to SLP_S3#)
82,97 ON_OFF# 6
7 Wistron Corporation
SLP_LAN# 8 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
SLP_A# Required Note: If SLP_S3# is not Taipei Hsien 221, Taiwan, R.O.C.
routed from PCH to EC, then 10
Title
SLP_A# becomes required ACES-CON8-13-GP-U1
from Intel ME-EC 20.F1295.008 PCH(3/9) : DMI/FDI/PM
Size Document Number Rev
prespecrive. A3
2012 S-Series Richie 13.3 -1
Date: W ednesday, March 14, 2012 Sheet 19 of 103
A B C D E
A B C D E

4
PCH(4/9) 4

3D3V_S0

PCH1D 4 OF 10
49,97 LCD_BL_EN J47 L_BKLTEN SDVO_TVCLKINN AP43

2
1
49,97 LCDVDD_EN M45 L_VDD_EN SDVO_TVCLKINP AP45

RN2002 P45 AM42


SRN2K2J-1-GP 49 BKLT_CTL L_BKLTCTL SDVO_STALLN
SDVO_STALLP AM40
49 LCD_SMBCLK T40 L_DDC_CLK
3 49 LCD_SMBDATA K47 AP39
4
L_DDC_DATA SDVO_INTN
SDVO_INTP AP40
L_CTRL_CLK T45
L_CTRL_DATA L_CTRL_CLK
P39 L_CTRL_DATA
1 2 LVD_IBG AF37 LVD_IBG SDVO_CTRLCLK P38
R2005 2K37R2F-GP AF36 M39
LVD_VBG SDVO_CTRLDATA
AE48 LVD_VREFH
AE47 LVD_VREFL DDPB_AUXN AT49
DDPB_AUXP AT47
DDPB_HPD AT40
49 TXCLKA_L- AK39 LVDSA_CLK#

LVDS
49 TXCLKA_L+ AK40 LVDSA_CLK DDPB_0N AV42
DDPB_0P AV40
3 AN48 AV45 3
49 TXOUTA_L0- LVDSA_DATA#0 DDPB_1N
49 TXOUTA_L1- AM47 LVDSA_DATA#1 DDPB_1P AV46

Digital Display Interface


49 TXOUTA_L2- AK47 LVDSA_DATA#2 DDPB_2N AU48
AJ48 LVDSA_DATA#3 DDPB_2P AU47
DDPB_3N AV47
49 TXOUTA_L0+ AN47 LVDSA_DATA0 DDPB_3P AV49
49 TXOUTA_L1+ AM49 LVDSA_DATA1
49 TXOUTA_L2+ AK49 LVDSA_DATA2
AJ47 LVDSA_DATA3 DDPC_CTRLCLK P46
DDPC_CTRLDATA P42
3D3V_S0
AF40 LVDSB_CLK#
AF39 LVDSB_CLK DDPC_AUXN AP47
DDPC_AUXP AP49
AH45 LVDSB_DATA#0 DDPC_HPD AT38
AH47 LVDSB_DATA#1
AF49 LVDSB_DATA#2 DDPC_0N AY47

4
3
AF45 LVDSB_DATA#3 DDPC_0P AY49
AY43 RN2001
DDPC_1N
AH43 LVDSB_DATA0 DDPC_1P AY45 SRN2K2J-1-GP
AH49 LVDSB_DATA1 DDPC_2N BA47
AF47 LVDSB_DATA2 DDPC_2P BA48
AF43 BB47

1
2
LVDSB_DATA3 DDPC_3N
DDPC_3P BB49

50 PCH_BLUE N48 CRT_BLUE DDPD_CTRLCLK M43 PCH_HDMI_CLK 51


50 PCH_GREEN P49 CRT_GREEN DDPD_CTRLDATA M36 PCH_HDMI_DATA 51
50 PCH_RED T49 CRT_RED
2 2

AT45 DPD_AUXN 1 TP2002TPAD14-OP-GP


DDPD_AUXN

CRT
50 CRT_DDC_CLK T39 AT43 DPD_AUXP 1 TP2001TPAD14-OP-GP
CRT_DDC_CLK DDPD_AUXP
50 CRT_DDC_DATA M40 CRT_DDC_DATA DDPD_HPD BH41 HDMI_PCH_DET 51,97

DDPD_0N BB43 HDMI_DATA2_R# 51


50 CRT_HSYNC M47 CRT_HSYNC DDPD_0P BB45 HDMI_DATA2_R 51
50 CRT_VSYNC M49 CRT_VSYNC DDPD_1N BF44 HDMI_DATA1_R# 51
DDPD_1P BE44 HDMI_DATA1_R 51
DDPD_2N BF42 HDMI_DATA0_R# 51
DAC_IREF T43 BE42 HDMI_DATA0_R 51
DAC_IREF DDPD_2P
T42 CRT_IRTN DDPD_3N BJ42 HDMI_CLK_R# 51
1

DDPD_3P BG42 HDMI_CLK_R 51


R2003
1KR2D-1-GP PANTHER-GP-NF
2

1 <Core Design> 1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH(4/9) : LVDS/CRT/DDI
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 20 of 103
A B C D E
A B C D E

GPIO Table
S 2012 Chief River PCH GPIO 52
Boot BIOS Strap
GNT1#/GPIO51 SATA1GP#/GPIO19 Boot BIOS Location PCH1E PCH(5/9) 5 OF 10
AY7
RSVD1
Richie U&D (13 inches) 1 0 0 LPC RSVD2 AV7
BG26 TP1 RSVD3 AU3
Rocky U&D (14 inches) 1 0 1 Reserved BJ26 TP2 RSVD4 BG4
BH25 TP3
Rocky U&D (15/17 inches) 0 1 0 PCI BJ16 TP4 RSVD5 AT10
BG16 TP5 RSVD6 BC8
1 1 SPI(Default) AH38 TP6
AH37 TP7 RSVD7 AU2
4 AK43 TP8 RSVD8 AT4 4
AK45 TP9 RSVD9 AT3
C18 TP10 RSVD10 AT1
N30 TP11 RSVD11 AY3
H3 TP12 RSVD12 AT5
AH12 TP13 RSVD13 AV3
AM4 TP14 RSVD14 AV1
3D3V_S0 AM5 BB1
TP15 RSVD15
Y13 BA3

R2113 1 2 PCH_GPIO51
USB3.0 Table K24
L24
TP16
TP17
TP18
RSVD16
RSVD17
RSVD18
BB5
BB3
10KR2J-3-GP AB46 BB7
USB AB45
TP19
TP20
RSVD19
RSVD20 BE8

RSVD
R2109 1 2 PCH_GPIO51
Pair Device RSVD21 BD4
BF6
10KR2J-3-GP RSVD22
1 FREE B21 AV5
DY TP21 RSVD23
2 I/O CONN. 1 M20
AY16
TP22 RSVD24 AV10
TP23
3 I/O CONN. 2 BG46 TP24 RSVD25 AT8

3D3V_S0 4 I/O CONN. 3 RSVD26 AY5


BA2
RSVD27
BE28 USB3RN1
DY
PE_GPIO0
62 USB3_RXN2 BC30 USB3RN2 RSVD28 AT12
1 2 62 USB3_RXN3 BE32 USB3RN3 RSVD29 BF3
10KR2J-3-GP BJ32
R2112
62 USB3_RXN4

62 USB3_RXP2
BC28
BE30
USB3RN4
USB3RP1
USB3RP2
USB2.0 Table
3 BF32 3
62 USB3_RXP3 USB3RP3
BG32 C24
62 USB3_RXP4
AV26
USB3RP4
USB3TN1
USBP0N
USBP0P A24 USB
62 USB3_TXN2 BB26 USB3TN2 USBP1N C25 USB_PN1 62 Pair Device
62 USB3_TXN3 AU28 USB3TN3 USBP1P B25 USB_PP1 62 USB 3.0 Conn. 1
3D3V_S0 62 USB3_TXN4 AY30 USB3TN4 USBP2N C26 USB_PN2 62 0 FREE
AU26 USB3TP1 USBP2P A26 USB_PP2 62 USB 3.0 Conn. 2
R2110 62 USB3_TXP2 AY26 USB3TP2 USBP3N K28 USB_PN3 62 1 USB 3.0 I/O CONN. 1
DY
CAMERA_ON
62 USB3_TXP3 AV28 USB3TP3 USBP3P H28 USB_PP3 62 USB 3.0 Conn. 3
1 2 62 USB3_TXP4 AW30 USB3TP4 USBP4N E28 2 USB 3.0 I/O CONN. 2
10KR2J-3-GP D28
USBP4P
RN2101
USBP5N C28 USB_PN5 53 3 USB 3.0 I/O CONN. 3
1 4 ACCEL_INT USBP5P A28 USB_PP5 53 BT WLAN combo
2 3 NMI_SMI_DBG# USBP6N C29 4 FREE
USBP6P B29
INT_PIRQA#
SRN8K2J-3-GP
INT_PIRQB#
K40
K38
PIRQA# USBP7N N28
M28
5 BT WLAN combo
PIRQB# USBP7P

PCI
INT_PIRQC#
RN2102 INT_PIRQD#
H38
G38
PIRQC# USBP8N L30
K30
USB_PN8 64
Fingerprint 6 FREE
3D3V_S0 PIRQD# USBP8P USB_PP8 64
INT_PIRQA# 20120112 PV-R
INT_PIRQD#
1
2
10
9 PE_GPIO1 PCH_GPIO50 C46
USBP9N G30
E30
USB_PN9 61
USB 2.0 Conn. 1 7 FREE
REQ1#/GPIO50 USBP9P USB_PP9 61

USB
INT_PIRQB# PCH_GPIO2 R2106 1 2 0R0402-PAD PLT_DET_R
3 8 27,69 PLT_DET C44 REQ2#/GPIO52 USBP10N C30 USB_PN10 49 8 Fingerprint
INT_PIRQC# 4 7 PLT_DET_R
PCH_GPIO50
92,93 PE_GPIO1
PE_GPIO1 E40 REQ3#/GPIO54 USBP10P A30 USB_PP10 49 Camera
3D3V_S0 5 6 USBP11N L32 9 USB 2.0 I/O CONN. 1
PCH_GPIO51 D47 K32
GNT1#/GPIO51 USBP11P
SRN8K2J-2-GP-U 49 CAMERA_ON E42 GNT2#/GPIO53 USBP12N G32 USB_PN12 54 10 Camera
83 PE_GPIO0 F46 GNT3#/GPIO55 USBP12P E32 USB_PP12 54 WWAN
USBP13N C32
A32
11 FREE
2 PCH_GPIO2 USBP13P 2
G42
G40
PIRQE#/GPIO2 12 WWAN
56,96 SATA_ODD_DA# PIRQF#/GPIO3 USB_BIAS R2101 1 2 22D6R2F-L1-GP
3D3V_S5 27,71 NMI_SMI_DBG#
C42
D44
PIRQG#/GPIO4 USBRBIAS# C33 13 FREE
65 ACCEL_INT PIRQH#/GPIO5

USBRBIAS B33
R2102 1 DY 2 PME# K10
10KR2J-3-GP PME#
PCI_PLTRST# C6 A14 OC0#_GPIO59
PLTRST# OC0#/GPIO59 OC1#_GPIO40
OC1#/GPIO40 K20
B17 OC2#_GPIO41
R2103 1 OC2#/GPIO41
27,97 CLK_PCI_KBC 2 22R2J-2-GP CLK_PCI_SIO_R H49 CLKOUT_PCI0 OC3#/GPIO42 C16 OC3#_GPIO42
R2105 1 2 22R2J-2-GP CLK_PCI_FB_R H43 L16 OC4#_GPIO43
18 CLK_PCI_FB TPAD14-OP-GP TP2108 CLK_OUT_PCI2 CLKOUT_PCI1 OC4#/GPIO43 OC5#_GPIO9
1 J48 CLKOUT_PCI2 OC5#/GPIO9 A16
TPAD14-OP-GP TP2106 1 CLK_OUT_PCI3 K42 D14
R2107 1 CLKOUT_PCI3 OC6#/GPIO10 LANLINK_STATUS 35
71,97 CLK_PCI_DEBUG 2 22R2J-2-GP CLK_PCI_KBC_R H40 CLKOUT_PCI4 OC7#/GPIO14 C14 OC7#_GPIO14

PANTHER-GP-NF
3D3V_S5

3D3V_S5

U2101 AND GATE RN2104


1 5 OC4#_GPIO43 8 1
A VCC OC1#_GPIO40
1 7 2 <Core Design> 1
PCI_PLTRST# 2 OC2#_GPIO41 6 3
B OC3#_GPIO42 5 4
PLT_RST#
3 GND Y 4 PLT_RST# 5,17,32,34,53,54,56,71,83,96,97
SRN10KJ-6-GP Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


U74LVC1G08G-AL5-R-GP-U R2108 RN2103 Taipei Hsien 221, Taiwan, R.O.C.
100KR2J-1-GP OC5#_GPIO9
73.01G08.EHG LANLINK_STATUS
8 1
Title
2nd = 73.7SZ08.EAH OC7#_GPIO14
7 2
3rd = 73.01G08.L04 6 3
PCH(5/9) : PCI/USB/NVM
2

R2104 DY OC0#_GPIO59 5 4
0R2J-2-GP 1 2DY Size Document Number Rev
SRN10KJ-6-GP A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 21 of 103
A B C D E
A B C D E

PE_PW RGD 1
RP2201
10
3D3V_S0

PCH(6/9) D3E_W AKE#


GPS_XMIT_OFF#
8
7
RN2205
1
2
3D3V_S0

OCP_OC# 2 9 GATEA20 6 3
LPC_RESET# 3 8 GPIO34 KBRST# 5 4
SATA_ODD_PW R_EN 4 7 W W AN_TRANSMIT_OFF# PCH1F 6 OF 10
3D3V_S0 5 6 RUNSCI_EC# SRN10KJ-6-GP
CRD_REQ#_R_R T7 C40
SRN10KJ-L3-GP 32 CRD_REQ#_R_R BMBUSY#/GPIO0 TACH4/GPIO68 SATA_ODD_PW R_EN 56,97

38 OCP_OC# A42 TACH1/GPIO1 TACH5/GPIO69 B41 D3E_W AKE# 32,97


3D3V_S5
4
R2204 1
DY 27 RUNSCI_EC# H36 TACH2/GPIO6 TACH6/GPIO70 C41 LPC_RESET# 27 4
2 10KR2J-3-GP PCH_GPIO24
28 THERM_SCI# E38 TACH3/GPIO7 TACH7/GPIO71 A40 GPS_XMIT_OFF# 54,97
R2205 1 2 10KR2J-3-GP GPI_INV_LIDW AKE GPI_INV_LIDW AKE C10 GPIO8
PCH_GPIO12 C4
R2207 LAN_PHY_PWR_CTRL/GPIO12 1D05V_S0
1 2 10KR2J-3-GP W LAN_TRANSMIT_OFF#
R2214 1 2 1KR2J-1-GP TLS_ENcrytion G2 P4
3D3V_S5 GPIO15 A20GATE GATEA20 27
AU16 H_PECI_R 1 DY 0R2J-2-GP
2
PECI H_PECI 5,27

1
SATA4GP_GPIO16 U2 R2209
SATA4GP/GPIO16 R2222
3D3V_S0 PCH_GPIO27 RCIN# P5 KBRST# 27,97 DY 56R2J-4-GP
1 2

GPIO
R2211 10KR2J-3-GP PE_PW RGD D40 AY11
18,86,92,93,96,97 PE_PW RGD TACH0/GPIO17 PROCPWRGD H_CPUPW RGD 5
FPR_LOCK#

CPU/MISC
1 2

2
R2212 DY 10KR2J-3-GP T5 AY10 PCH_THRMTRIP#_R R2210 1 2 390R2F-2GP
54,68 W W AN_TRANSMIT_OFF# SCLOCK/GPIO22 THRMTRIP# H_THRMTRIP# 5,85
PCH_GPIO24 E8 T14 INIT3_3V# 1 TP2203TPAD14-OP-GP
GPIO24 INIT3_3V#
PCH_GPIO27 E16 AY1 DF_TVS
GPIO27 DF_TVS
TPAD14-OP-GP
TP2206
T P2206 1 PCH_GPIO28 P8 PROC_SELECT
GPIO28
TS_VSS1 AH8
GPIO34 K1 1D8V_S0
STP_PCI#/GPIO34
TS_VSS2 AK11
BT_OFF# K4
53,97 BT_OFF# GPIO35

1
AH10
3
VRAM ID TABLE SATA2GP_GPIO36 V8 SATA2GP/GPIO36
TS_VSS3

TS_VSS4 AK10
R2201
2K2R2J-2-GP 3
SATA3GP_GPIO37 M5 SATA3GP/GPIO37

2
3D3V_S0 3D3V_S0 PCH_GPIO38 N2 P37
SLOAD/GPIO38 NC_1
1 2 H_SNB_IVB# 5
PCH_GPIO39 M3 R2202 1KR2J-1-GP
SDATAOUT0/GPIO39
2

PCH_GPIO39 PCH_GPIO38 V13 BG2 NCTF_VSS#BG2 TP22071 TPAD14-OP-GP


R2225 R2220 VENDER 64,97 FPR_LOCK# SDATAOUT1/GPIO48 VSS_NCTF_15#BG2
DMI & FDI Termination Voltage
10KR2J-3-GP 10KR2J-3-GP SATA5GP_GPIO49 V3 BG48 NCTF_VSS#BG48 TP22081 TPAD14-OP-GP
SATA5GP/GPIO49/TEMP_ALERT# VSS_NCTF_16#BG48
Hynix_Elpida Samsung_Elipda
D6 BH3 NCTF_VSS#BH3 TP22091 TPAD14-OP-GP SNB: "1"
0 1 Samsung
1

53 W LAN_TRANSMIT_OFF# GPIO57 VSS_NCTF_17#BH3


DF_TVS IVB: "0"
PCH_GPIO39 PCH_GPIO38 BH47 NCTF_VSS#BH47 TP22101 TPAD14-OP-GP
VSS_NCTF_18#BH47
1 0 Hynix TPAD14-OP-GP
TP2214
T P2214 1 NCTF_VSS#A4 A4 VSS_NCTF_1#A4 VSS_NCTF_19#BJ4 BJ4
2

NCTF
R2223 R2224 A44 BJ44
VSS_NCTF_2#A44 VSS_NCTF_20#BJ44
10KR2J-3-GP 10KR2J-3-GP
UMA_Samsung UMA_Hynix 1 1 Elpida A45 VSS_NCTF_3#A45 VSS_NCTF_21#BJ45 BJ45
1

A46 BJ46
0 0 UMA VSS_NCTF_4#A46 VSS_NCTF_22#BJ46
A5 VSS_NCTF_5#A5 VSS_NCTF_23#BJ5 BJ5

A6 VSS_NCTF_6#A6 VSS_NCTF_24#BJ6 BJ6

A4,A44,A45,A46,A5,A6,B3,B47,

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,
BD1,BD49,BE1,BE49,BF1,BF49,
BG2,BG48,BH3,BH47,BJ4,BJ44,
2
GDDR5/DDR3 TABLE TPAD14-OP-GP
TP2216
T P2216 1 NCTF_VSS#B3 B3 VSS_NCTF_7#B3 VSS_NCTF_25#C2 C2 NCTF_VSS#C2 1 TP2212TPAD14-OP-GP
2
TPAD14-OP-GP
TP2215
T P2215 1 NCTF_VSS#B47 B47 C48 NCTF_VSS#C48 1 TP2211TPAD14-OP-GP
3D3V_S5 VSS_NCTF_8#B47 VSS_NCTF_26#C48
20110822SI

D49,E1,E49,F1,F49
BD1 VSS_NCTF_9#BD1 VSS_NCTF_27#D1 D1
2012 Chief River PCH GPIO 12

NCTF TEST PIN:


1

BD49 D49 NCTF_VSS#D49 1 TP2213TPAD14-OP-GP


R2206 DY VSS_NCTF_10#BD49 VSS_NCTF_28#D49
Richie U&D (13 inches) 0 (13") GDDR5
10KR2J-3-GP BE1 VSS_NCTF_11#BE1 VSS_NCTF_29#E1 E1
Rocky U&D (14 inches) 1(14",15",17")DDR3
BE49 E49
2

PCH_GPIO12 VSS_NCTF_12#BE49 VSS_NCTF_30#E49


Rocky U&D (15/17 inches) 1(14",15",17")DDR3 TPAD14-OP-GP
TP2218
T P2218 1 NCTF_VSS#BF1 BF1 F1
VSS_NCTF_13#BF1 VSS_NCTF_31#F1
2

R2218 TPAD14-OP-GP
TP2217
T P2217 1 NCTF_VSS#BF49 BF49 F49
VSS_NCTF_14#BF49 VSS_NCTF_32#F49
10KR2J-3-GP

PANTHER-GP-NF
1

3D3V_S0
3D3V_S0

3D3V_S0 3D3V_S0
1 DY 2 BT_OFF# RN2202
R2216 10KR2J-3-GP 1 4 SATA0GP_GPIO21 17
1 2 SATA3GP_GPIO37 1 2 SATA2GP_GPIO36 RN2203 2 3 SATA4GP_GPIO16
SATA4GP_GPIO16 96
R2217 DY 200KR2J-L1-GP R2213 DY 200KR2J-L1-GP 1 4 SATA5GP_GPIO49
1 2 3 CRD_REQ#_R_R SRN10KJ-5-GP <Core Design> 1

SRN10KJ-5-GP

Wistron Corporation
FDI TERMINATION VOLTAGE OVERRIDE DMI TERMINATION VOLTAGE OVERRIDE 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPIO37 LOW - Tx, Rx terminated to same voltage GPIO36 LOW - Tx, Rx terminated to same voltage
(FDI_OVRVLTG) (DC Coupling Model DEFAULT) (DC Coupling Model DEFAULT)
PCH(6/9) : GPIO/NTCF/RSVD
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 22 of 103
A B C D E
5 4 3 2 1

VCC_PCH: 6A
PCH(7/9) 3D3V_S0_LDO

U2301
5V_S0

1mA
5 1
D
PCH1G POWER 7 OF 10 OUT IN
GND 2
D

1
1D05V_S0

SCD01U16V2KX-3GP

SCD1U10V2KX-4GP
4 3 C2308
1.3A NC#4 EN

SC1U10V2KX-1GP
AA23 U48 C2322 C2323 C2325

2
VCCCORE1 VCCADAC SC2D2U6D3V3KX-GP TLV70233DBVR-GP
DY AC23

2
VCCCORE2

SC10U6D3V3MX-GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
AD21 74.70233.03F

CRT
VCCCORE3

1
C2313 C2314 C2315 C2316 AD23 U47 2nd = 74.08818.B3F
VCCCORE4 VSSADAC
AF21 3rd = 74.09090.D3F

VCC CORE
VCCCORE5
AF23

2
VCCCORE6 3D3V_S0
AG21 VCCCORE7
AG23 VCCCORE8 1mA
AG24 VCCCORE9 VCCALVDS AK36
AG26 VCCCORE10
AG27 VCCCORE11 VSSALVDS AK37
AG29 VCCCORE12
AJ23 VCCCORE13 1D8V_S0

LVDS
AJ26 VCCCORE14 VCCTX_LVDS1 AM37
AJ27 VCCCORE15 60mA
AJ29 VCCCORE16 VCCTX_LVDS2 AM38
1D05V_S0 AJ31 VCCCORE17

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP
AP36 C2309
2.925A VCCTX_LVDS3

SC22U6D3V5MX-2GP
AP37 C2306 C2307
VCCTX_LVDS4
L2301 AN19

2
1D05V_S0 VCCIO28
DY
1 2 +V1.05S_VCCAPLL_EXP BJ22
IND-1UH-100-GP VCCAPLLEXP 266mA 3D3V_S0
C V33 C
VCC3_3_6

SCD1U10V2KX-4GP
HVCMOS
AN16 VCCIO15

1
SC10U6D3V3MX-GP
1
C2317 AN17 C2318
VCCIO16
DY V34

2
VCC3_3_7
2 AN21 VCCIO17
AN26 VCCIO18
1D05V_S0 AN27 AT16 +VCCAFDI_VRM
160mA
VCCIO19 VCCVRM3
AP21 +V1.05S_VCC_DMI 1D05V_S0
VCCIO20 R2301
AP23 AT20 2 1
42mA
VCCIO21 VCCDMI1
1

0R0402-PAD

1
DMI
C2310 C2311 C2321 C2320 C2301 AP24 C2319
VCCIO22

VCCIO
SC1U10V2KX-1GP
2

2
SC10U6D3V3MX-GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

AP26 AB36 VCCCLKDMI

2
VCCIO23 VCCCLKDMI 1D05V_S0

1
AT24 C2302 R2306
VCCIO24
1 2
20mA
SC1U10V2KX-1GP

2
AN33 0R0402-PAD
VCCIO25
20120112 PV-R
AN34 VCCIO26 VCCDFTERM1 AG16
3D3V_S0

SCD1U10V2KX-4GP
1
BH29 AG17 1D8V_S0
B VCC3_3_3 VCCDFTERM2 C2303 B

DFT / SPI
190mA
1

C2304

2
SCD1U10V2KX-4GP AJ16
1D05V_S0 VCCDFTERM3
2

+VCCAFDI_VRM AP16 VCCVRM2


VCCDFTERM4 AJ17

1 DY 20R3J-0-U-GP +V1.05S_VCCAPLL_FDI BG6


R2302 VCCAFDIPLL
R2303 3D3V_S5
2 1 +V1.05S_VCCDPLL_FDI AP17
0R0402-PAD VCCIO27
V1
20mA
FDI

+V1.05S_VCC_DMI VCCSPI

1
SC1U10V2KX-1GP
AU20 C2305
VCCDMI2

2
PANTHER-GP-NF

20120116PV-R +VCCAFDI_VRM

1D5V_S0 R2304 1 2 0R0603-PAD-1-GP

A <Core Design> A
1D8V_S0 1
R2305
DY 2
0R3J-0-U-GP

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH(7/9) : PWR1
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 23 of 103
5 4 3 2 1
A B C D E

1D05V_S0
PCH(8/9)
1
R2405
DY 2
0R3J-0-U-GP
2.925A
3D3V_S5
PCH1J POWER 10 OF 10 1D05V_S0
2mA +VCCACLK AD49 N26
VCCACLK VCCIO29
1 2

1
R2401 P26 C2402
0R0603-PAD-1-GP +VCCPDSW VCCIO30
T16 VCCDSW3_3 SC1U10V2KX-1GP
3D3V_S0 20120116PV-R P28
L2401

2
VCCIO31

1
4 C2403 4
1 2 +V3.3S_VCC_CLKF33 SCD1U10V2KX-4GP PCH_VCCDSW V12 T27
C2401 DCPSUSBYP VCCIO32

1
IND-10UH-238-GP SCD1U10V2KX-4GP T29
1D05V_S0 VCCIO33 3D3V_S5

SC10U6D3V3MX-GP

SC1U10V2KX-1GP
DY +V3.3S_VCC_CLKF33 T38 VCC3_3_5 97mA

1
1st = 68.1001A.10B DY

2
C2404 C2405 L2405 T23
+VCCAPLL_CPY_PCH VCCSUS3_3_7
2nd = 68.1001D.10E 2 1 BH23

2
VCCAPLLDMI2

1
IND-10UH-193-GP T24 C2406
VCCSUS3_3_8

1
C2439 3D3V_S5 SCD1U10V2KX-4GP
3rd = 68.1001A.10B SC10U6D3V3MX-GP
1D05V_S0 AL29 VCCIO14
DY V23

2
VCCSUS3_3_9 3D3V_S5

USB
2
+VCCSUS1 AL24 V24 5V_S5

CH751H-40-1-GP
DCPSUS3 VCCSUS3_3_10

1
C2407
P24 SCD1U10V2KX-4GP
1mA

A
VCCSUS3_3_6

1
C2408 1D05V_S0

2
SC1U10V2KX-1GP AA19 D2401 R2402
VCCASW1 10R2J-2-GP
DY T26

2
VCCIO34
AA21 VCCASW2 83.R0304.D8F 20120201PV-R

2
K
1D05V_S0 AA24 M26 +V5A_PCH_VCC5REFSUS 2ND = 83.R2004.C8F
1.01A VCCASW3 V5REF_SUS
3RD = 83.1PS76.01F3D3V_S0

1
AA26 C2409 5V_S0

CH751H-40-1-GP
Clock and Miscellaneous
VCCASW4 +VCCA_USBSUS SCD1U10V2KX-4GP
DCPSUS4 AN23 1mA
AA27 C2415

A
VCCASW5

1
SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP
C2410 C2411 AN24
VCCSUS3_3_1
1

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C2412

C2413

C2414
AA29 DY 83.R0304.D8F D2402 R2403
VCCASW6 10R2J-2-GP
2ND = 83.R2004.C8F

2
AA31 3RD = 83.1PS76.01F
2

2
3 VCCASW7 3
DY 20120201PV-R

2
K
AC26 P34 +V5S_PCH_VCC5REF
VCCASW8 V5REF C2416

1
AC27 VCCASW9
N20 3D3V_S5 SC1U10V2KX-1GP
VCCSUS3_3_2

PCI/GPIO/LPC
AC29

2
VCCASW10
VCCSUS3_3_3 N22
3rd = 68.1001A.10B AC31 VCCASW11

1
2nd = 68.1001D.10E P20 C2417
VCCSUS3_3_4 SC1U10V2KX-1GP
AD29 VCCASW12
1D05V_S0
1st = 68.1001A.10B 80mA P22

2
VCCSUS3_3_5 3D3V_S0
AD31 VCCASW13
L2402 1 2 +V1.05S_VCCA_A_DPL
IND-10UH-238-GP W21 AA16
VCCASW14 VCC3_3_1

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
80mA

1
W23 W16 C2418 C2419
VCCASW15 VCC3_3_8 266mA
SC1U10V2KX-1GP

L2403 1 2 +V1.05S_VCCA_B_DPL
SC22U6D3V5MX-2GP

SC1U10V2KX-1GP

SC22U6D3V5MX-2GP

W24 T34

2
IND-10UH-238-GP VCCASW16 VCC3_3_4 3D3V_S0
1

1
C2420

C2421
TC2401

TC2402

W26 VCCASW17
1st = 68.1001A.10B
W29
2

VCCASW18

1
2nd = 68.1001D.10E DY DY C2422
W31 AJ2 SCD1U10V2KX-4GP
VCCASW19 VCC3_3_2 1D05V_S0
3rd = 68.1001A.10B

2
W33 VCCASW20
VCCIO5 AF13

+VCCRTCEXT N16 DCPRTC

1
2 C2423 2
VCCIO12 AH13
1

C2424 +VCCAFDI_VRM SC1U10V2KX-1GP


SCD1U10V2KX-4GP Y49 AH14 1D05V_S0

2
VCCVRM4 VCCIO13
160mA
2

+V1.05S_VCCA_A_DPL VCCIO6 AF14 DY


AF33, AF34 and AG34 should be VCCDIFFCLKN[3:1] BD47 VCCADPLLA

SATA
AK1 +V1.05S_VCCAPLL_SATA3 1 2 L2404
1D05V_S0 +V1.05S_VCCA_B_DPL VCCAPLLSATA IND-10UH-193-GP
BF47 VCCADPLLB

1
C2425
AF11 +VCCAFDI_VRM DY SC10U6D3V3MX-GP
VCCVRM1
AF17

2
VCCIO7
SC1U10V2KX-1GP

1D05V_S0 AF33 VCCDIFFCLKN1


1

AF34 AC16 1D05V_S0


55mA VCCDIFFCLKN2 VCCIO2
1

C2427 AG34
C2426 1D05V_S0 VCCDIFFCLKN3
95mA AC17
2

SC1U10V2KX-1GP VCCIO3
2

1
AG33 AD17 C2428
C2429 VCCSSC VCCIO4 SC1U10V2KX-1GP
1

SC1U10V2KX-1GP C2430

2
1 2PCH_DCPSST V16 DCPSST
1D05V_S0 SCD1U10V2KX-4GP 1D05V_S0
2

1 DY 2 +V1.05M_VCCSUS T17 T21


R2404 0R3J-0-U-GP C2431 DCPSUS1 VCCASW22
V19 DCPSUS2
1

SC1U10V2KX-1GP
MISC

1D05V_S0
DY VCCASW23 V21
1mA
2

CPU

1 BJ8 V_PROC_IO <Core Design> 1


SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCASW21 T19
1

C2432 C2433 C2434


RTC_AUX_S5 3D3V_S5
6uA
10mA Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


HDA

DY DY A22 P32
RTC

VCCRTC VCCSUSHDA
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

Taipei Hsien 221, Taiwan, R.O.C.


1

C2435 C2436 C2437 C2438


PANTHER-GP-NF SCD1U10V2KX-4GP Title

PCH(8/9) : PWR2
2

Size Document Number Rev


A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 24 of 103
A B C D E
A B C D E

PCH1I 9 OF 10

AY4
AY42
AY46
VSS159
VSS160
VSS259
VSS260
H46
K18
K26
PCH(9/9)
VSS161 VSS261
AY8 VSS162 VSS262 K39
B11 K46 PCH1H 8 OF 10
VSS163 VSS263
B15 VSS164 VSS264 K7 H5 VSS0
B19 VSS165 VSS265 L18
B23 VSS166 VSS266 L2 AA17 VSS1 VSS80 AK38
B27 VSS167 VSS267 L20 AA2 VSS2 VSS81 AK4
4 B31 VSS168 VSS268 L26 AA3 VSS3 VSS82 AK42 4
B35 VSS169 VSS269 L28 AA33 VSS4 VSS83 AK46
B39 VSS170 VSS270 L36 AA34 VSS5 VSS84 AK8
B7 VSS171 VSS271 L48 AB11 VSS6 VSS85 AL16
F45 VSS172 VSS272 M12 AB14 VSS7 VSS86 AL17
BB12 VSS173 VSS273 P16 AB39 VSS8 VSS87 AL19
BB16 VSS174 VSS274 M18 AB4 VSS9 VSS88 AL2
BB20 VSS175 VSS275 M22 AB43 VSS10 VSS89 AL21
BB22 VSS176 VSS276 M24 AB5 VSS11 VSS90 AL23
BB24 VSS177 VSS277 M30 AB7 VSS12 VSS91 AL26
BB28 VSS178 VSS278 M32 AC19 VSS13 VSS92 AL27
BB30 VSS179 VSS279 M34 AC2 VSS14 VSS93 AL31
BB38 VSS180 VSS280 M38 AC21 VSS15 VSS94 AL33
BB4 VSS181 VSS281 M4 AC24 VSS16 VSS95 AL34
BB46 VSS182 VSS282 M42 AC33 VSS17 VSS96 AL48
BC14 VSS183 VSS283 M46 AC34 VSS18 VSS97 AM11
BC18 VSS184 VSS284 M8 AC48 VSS19 VSS98 AM14
BC2 VSS185 VSS285 N18 AD10 VSS20 VSS99 AM36
BC22 VSS186 VSS286 P30 AD11 VSS21 VSS100 AM39
BC26 VSS187 VSS287 N47 AD12 VSS22 VSS101 AM43
BC32 VSS188 VSS288 P11 AD13 VSS23 VSS102 AM45
BC34 VSS189 VSS289 P18 AD19 VSS24 VSS103 AM46
BC36 VSS190 VSS290 T33 AD24 VSS25 VSS104 AM7
BC40 VSS191 VSS291 P40 AD26 VSS26 VSS105 AN2
BC42 VSS192 VSS292 P43 AD27 VSS27 VSS106 AN29
BC48 VSS193 VSS293 P47 AD33 VSS28 VSS107 AN3
BD46 VSS194 VSS294 P7 AD34 VSS29 VSS108 AN31
BD5 VSS195 VSS295 R2 AD36 VSS30 VSS109 AP12
BE22 VSS196 VSS296 R48 AD37 VSS31 VSS110 AP19
3 BE26 T12 AD38 AP28 3
VSS197 VSS297 VSS32 VSS111
BE40 VSS198 VSS298 T31 AD39 VSS33 VSS112 AP30
BF10 VSS199 VSS299 T37 AD4 VSS34 VSS113 AP32
BF12 VSS200 VSS300 T4 AD40 VSS35 VSS114 AP38
BF16 VSS201 VSS301 W34 AD42 VSS36 VSS115 AP4
BF20 VSS202 VSS302 T46 AD43 VSS37 VSS116 AP42
BF22 VSS203 VSS303 T47 AD45 VSS38 VSS117 AP46
BF24 VSS204 VSS304 T8 AD46 VSS39 VSS118 AP8
BF26 VSS205 VSS305 V11 AD8 VSS40 VSS119 AR2
BF28 VSS206 VSS306 V17 AE2 VSS41 VSS120 AR48
BD3 VSS207 VSS307 V26 AE3 VSS42 VSS121 AT11
BF30 VSS208 VSS308 V27 AF10 VSS43 VSS122 AT13
BF38 VSS209 VSS309 V29 AF12 VSS44 VSS123 AT18
BF40 VSS210 VSS310 V31 AD14 VSS45 VSS124 AT22
BF8 VSS211 VSS311 V36 AD16 VSS46 VSS125 AT26
BG17 VSS212 VSS312 V39 AF16 VSS47 VSS126 AT28
BG21 VSS213 VSS313 V43 AF19 VSS48 VSS127 AT30
BG33 VSS214 VSS314 V7 AF24 VSS49 VSS128 AT32
BG44 VSS215 VSS315 W17 AF26 VSS50 VSS129 AT34
BG8 VSS216 VSS316 W19 AF27 VSS51 VSS130 AT39
BH11 VSS217 VSS317 W2 AF29 VSS52 VSS131 AT42
BH15 VSS218 VSS318 W27 AF31 VSS53 VSS132 AT46
BH17 VSS219 VSS319 W48 AF38 VSS54 VSS133 AT7
BH19 VSS220 VSS320 Y12 AF4 VSS55 VSS134 AU24
H10 VSS221 VSS321 Y38 AF42 VSS56 VSS135 AU30
BH27 VSS222 VSS322 Y4 AF46 VSS57 VSS136 AV16
BH31 VSS223 VSS323 Y42 AF5 VSS58 VSS137 AV20
BH33 VSS224 VSS324 Y46 AF7 VSS59 VSS138 AV24
BH35 VSS225 VSS325 Y8 AF8 VSS60 VSS139 AV30
2 2
BH39 VSS226 VSS328 BG29 AG19 VSS61 VSS140 AV38
BH43 VSS227 VSS329 N24 AG2 VSS62 VSS141 AV4
BH7 VSS228 VSS330 AJ3 AG31 VSS63 VSS142 AV43
D3 VSS229 VSS331 AD47 AG48 VSS64 VSS143 AV8
D12 VSS230 VSS333 B43 AH11 VSS65 VSS144 AW14
D16 VSS231 VSS334 BE10 AH3 VSS66 VSS145 AW18
D18 VSS232 VSS335 BG41 AH36 VSS67 VSS146 AW2
D22 VSS233 VSS337 G14 AH39 VSS68 VSS147 AW22
D24 VSS234 VSS338 H16 AH40 VSS69 VSS148 AW26
D26 VSS235 VSS340 T36 AH42 VSS70 VSS149 AW28
D30 VSS236 VSS342 BG22 AH46 VSS71 VSS150 AW32
D32 VSS237 VSS343 BG24 AH7 VSS72 VSS151 AW34
D34 VSS238 VSS344 C22 AJ19 VSS73 VSS152 AW36
D38 VSS239 VSS345 AP13 AJ21 VSS74 VSS153 AW40
D42 VSS240 VSS346 M14 AJ24 VSS75 VSS154 AW48
D8 VSS241 VSS347 AP3 AJ33 VSS76 VSS155 AV11
E18 VSS242 VSS348 AP1 AJ34 VSS77 VSS156 AY12
E26 VSS243 VSS349 BE16 AK12 VSS78 VSS157 AY22
G18 VSS244 VSS350 BC16 AK3 VSS79 VSS158 AY28
G20 VSS245 VSS351 BG28
G26 BJ28 PANTHER-GP-NF
VSS246 VSS352
G28 VSS247
G36 VSS248
G48 VSS249
H12 VSS250
H18 VSS251
H22 VSS252
H24 VSS253
1 H26 VSS254 <Core Design> 1
H30 VSS255
H32 VSS256
H34
F3
VSS257
VSS258
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

PANTHER-GP-NF Title

PCH(9/9) : GND
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 25 of 103
A B C D E
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH_XDP
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 26 of 103
5 4 3 2 1
5 4 3 2 1

VOLTAGE_ADC 38 20120112 PV-R


+VCC0 R2703 RTC_AUX_S5
60 SPI_SI_FLASH

2
3D3V_AUX_KBC 3D3V_AUX_S5 1 2
R2721 1 40 CHG_RST
17,71 SPI_CS1# DY 2 0R2J-2-GP SPI_CS1#_R
60 SPI_CS0#_FLASH
R2722

2
300R2J-4-GP R2701 20111117PV C2701 C2702 0R0402-PAD

1
60 SPI_SO_FLASH 1 2 20111122PV R2725
3D3V_AUX_S5

SCD1U10V2KX-4GP

SC1U10V2KX-1GP
20120116PV-R 0R2J-2-GP

1
82,97 QUICKX_LED# 0R0603-PAD-1-GP

2
RN2701 DY

VOLTAGE_ADC_R

1
KSI1 R2747 24K7R2J-2-GP 3D3V_AUX_S5
8 1 1 DY

1
KSI2 C2703 C2705 C2706 C2704 C2707

KCB_GPIO33
7 2 20120112 PV-R 49,82,97 LID_SW #
D 6 3 KSI3 D

1
5 4 KSI0 R2726 1 2 0R0402-PAD ADP_EN_L Keyboard Matrix:

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GP
2

2
40 ADP_EN R2727
SRN4K7J-10-GP R2728 1
high for 13"&14"
38 OCP_A_IN 2 300R2J-4-GP OCP_IN_ADC_L 10KR2J-3-GP
RN2702 R2729 1 2 300R2J-4-GP CURRENT_ADC_L and low for 15"&17"
38 CURRENT_ADC
8 1 KSI7 TPAD14-OP-GP TP2709 1 KBC_GPIO37 DY

2
7 2 KSI6 +VCC0 PLT_DET
54 W W AN_OFF 3D3V_AUX_KBC
6 3 KSI4 1 R2730 2 0R0402-PAD SPI_CS1#_R
KSI5 31 IMDAT
5 4
40 ADP_DET 1 R2731 2 0R0402-PAD ADP_DET_R
D2703
SRN4K7J-10-GP 20120112 PV-R
53 W LAN_OFF R2702
60 SPI_CLK_FLH 2
1070_VCC2 1 2 3D3V_S5
39,97 MAIN_BAT_DET# 3D3V_S0
R2735 1 2 KSO5 VOLTAGE_ADC 3

1
10KR2J-3-GP DY TPAD14-OP-GP
TP2708
T P2708 1 KBC_GPIO36 0R0402-PAD
C2708 1
SCD1U16V2ZY-2GP

2
127
128

106
119
BAV99-5-GP-U

30
31
32
33
34
43
44
62
63
64
65
66
67
94
95
96
97

68

14
39
58
84

49
1
2
3
SC2200P50V2KX-2GP2 1 C2709 VOLTAGE_ADC_R U2701 83.00099.T11
2nd = 83.BAV99.D11 KBC_DDR_RST# R2724 1 DY 2 10KR2J-3-GP

ALARM_CKT#2/GPIO36
HSTCLK/GPIO41

GPIO39
AC_CKT#2/GPIO42

GPIO38
GPIO37
ADC1/GPIO46

GPIO35
GPIO34
Q/GPIO33

HSTDATAIN/GPIO43

HSTCS0#/GPIO44
FLCS0#
HSTDATAOUT/GPIO45

VCC0

VCC1
ADC3/GPIO23
VCC1
VCC1
VCC1
VCC1

VCC2
ADC_TO_PWM_IN

FLDATAIN
FLCLK

EMCLK
IMDAT

KDAT

EMDAT

FLDATAOUT
SC2200P50V2KX-2GP2 1 C2710 CURRENT_ADC_L 3rd = 83.BAV99.H11
69,97 KSO[0..15] KSO0 21 KSO0 20120131PVR
SC2200P50V2KX-2GP2 1 C2711 OCP_IN_ADC_L KSO1 20
KSO2 KSO1
19 KSO2 OUT0/SCI 124 NMI_SMI_DBG# 21,71
SC100P50V2JN-3GP 2 1 C2712 ADC_VREF_L KSO3 18 125 20120201PV-R 3D3V_AUX_S5
KSO4 KSO3 GPIO53/AB3_DATA FET_A CHARGER_DAT 40
17 KSO4 CFETA/OUT7/SMI# 123 83.R0304.D8F2ND = 83.R2004.C8F 3RD = 83.1PS76.01F
SC2200P50V2KX-2GP2 1 C2713 ADP_ID_ADC_L KSO5 16 122 KBRST#_L K A KBC PIN
KSO6 KSO5 OUT8/KBRST D2701 CH751H-40-1-GP KBRST# 22,97
13 KSO6 OUT9/TACH2PWM_OUT 121 FAN_PW M 28
KSO7 12 120 122 KBRST#_L R2734 1 DY 2 10KR2J-3-GP
C KSO8 KSO7 OUT10/PWM0 PW M_LED# BAT_GRNLED# 17,82 C
10 KSO8 CHRGCTL_PWM/OUT11 118 1 TP2703
TPAD14-OP-GP
KBC_AGND KSO9 9 115 8051TX/S3_LED# 1 4
KSO10 KSO9 8051RX/CAPS_LED
8 KSO10 1 TP2704
TPAD14-OP-GP 2 3
3D3V_AUX_KBC KSO11 7 107 CPPW R_EN 114
KSO12 KSO11 GPIO1 VREF_PECI R2737 1
6 KSO12/GPIO0/KBRST VREF_PECI 79 2 0R0402-PAD 1D05V_S0 RN2703
KSO13 5 80 EC_PECI R2738 1 2 43R2J-GP SRN100KJ-6-GP
R2751 1 KSO13/GPIO18 GPIO3/PECI_DATA H_PECI 5,22
2 100KR2J-1-GP KSO15 KSO14 81 GPIO4/KSO14 PM_PWROK DELAY 99ms RESET_OUT#/GPIO6 60 PGD_IN R2741 1 2 0R0402-PAD PM_PW ROK 19,97
20120112 PV-R KSO15 83 85 RSMRST#_R R2742 1 2 10KR2J-3-GP 92 KBC_GPIO15 R2716 1 2 22KR2J-GP
R2744 1 GPIO5/KSO15 OUT1/RSMRST# RSMRST# 19,41,97
19 PW R_BTN_OUT# 2 0R0402-PAD PW R_BTN_OUT#_KBC 4
GPIO24/KSO16 GPIO8/RXD 86 GPIO8/RXD 20120112 PV-R
KSO17 108 87 PLT_DET 113 AMBER_BATLED# R2748 1 2 100KR2J-1-GP
82,97 KSO17 GPIO26/KSO17 GPIO9/TXD PLT_DET 21,69
69,82,97 KSI[0..7] KSI0 KBC_PW R_ON R2746 1
29 KSI0 100 2 100KR2J-1-GP
KSI1 28 88
KSI1 GPIO11/AB2A_DATA PCH_KBC_DATA 18,28,85
KSI2 27 89 86 GPIO8/RXD R2723 1 DY 2 10KR2J-3-GP
KSI2 GPIO12/AB2A_CLK PCH_KBC_CLK 18,28,85
KSI3 26 90
KSI4 KSI3 GPIO13/AB2B_DATA KBC_PROCHOT 5 8051_RECOVER# R2720 1
25 KSI4 GPIO14/AB2B_CLK 91 A_SD# 29 83 2 100KR2J-1-GP
KSI5 24 92 KBC_GPIO15
KSI6 KSI5 GPIO15/FAN_TACH1 TACH_FAN_IN_R VCC1_POR# R2733 1
KBC_AGND 23 KSI6 GPIO16/TACH2PWM_IN 101 77 2 10KR2J-3-GP
KSI7 22 102 GPIO17 1 DY 2
KSI7
KBC1126-NU-GP GPIO17/A20M GATEA20 22
2

61 R2704 0R2J-2-GP 63 ADP_EN_L R2705 1 2 10KR2J-3-GP


C2714 KCLK
31 IMCLK 35 IMCLK GPIO20/PS2CLK 103 8051_RECOVER# 71
SCD1U16V2ZY-2GP 36 105 61
PM_SLP_S3# 8,19,29,34,35,36,37,45,46,47,48,92,93
1

PM_SLP_S4#_KBC 38 VSS GPIO21/PS2DAT KBC_DDR_RST#


ADC4/GPIO50 32KHZ_OUT/GPIO22 75 KBC_DDR_RST# 5,46
40 73
38
3D3V_AUX_S5
ADC_VREF
R2706 1
1
2 10R2J-2-GP ADC_VREF_L 41
2 300R2J-4-GP ADP_ID_ADC_L 42
AVCC
ADC_VREF
71.01126.00G GPIO25
ADP_PRES_CKT#2/GPIO27 74
93
ON/OFFBTN_KBC# 82
ADP_PRES 34,38 127 CHG_RST R2707 1 2 10KR2J-3-GP
38 ADP_A_ID R2708 ADC2/GPIO40 GPIO28 PM_SLP_A# 19
GPIO29/BC_CLK 98 SUS_PW R_ACK 19 123 FET_A R2709 1 2 100KR2J-1-GP
17,71 LPC_AD[3:0] GPIO30/BC_DAT 99 ADP_PRES_OUT 19,85
LPC_AD0 46 100 85 RSMRST#_R R2710 1 2 10KR2J-3-GP
B LPC_AD1 LAD0 GPIO31/BC_INT# KBC_PW R_ON 41 B
48 LAD1 GPIO32/AB3_CLK 126
LPC_AD2 CHARGER_CLK 40 PGD_IN R2711 1
50 LAD2 60 2 10KR2J-3-GP
LPC_AD3 51 LAD3 PW R_GOOD R2712 1
17,71 LPC_FRAME# 52 LFRAME# AB1A_DATA 111 AB1A_DATA 39,97 78 DY 2 10KR2J-3-GP
22 LPC_RESET# 53 LRESET# AB1A_CLK 112 AB1A_CLK 39,97
54 109 75 KBC_DDR_RST# R2713 1 2 22KR2J-GP
DY_DS3
21,97 CLK_PCI_KBC PCI_CLK AB1B_DATA
19 PM_CLKRUN# 55 CLKRUN# AB1B_CLK 110
57 116 FET_B R2719 1 2 100KR2J-1-GP
17,71 SIRQ SER_IRQ
38 OCP_PW M_OUT 59 ADC_TO_PWM_OUT/GPIO19
69 1070_TEST R2714 1 2 1KR2J-1-GP
TEST_PIN
KBC_AGND 45 AVSS PWRGD 78 PW R_GOOD 5,37,42,50,96
76 77 VCC1_POR#
22 RUNSCI_EC# EC_SCI# VCC1_RST# VCC1_POR# 71
1

FET_B R2739
GPIO52/PWM3

CFETB/GPIO10 116
R2715 70 113 1 2 0R2J-2-GP
41 KBC_GPIO51 PWMOK_PWMDEAD#_CKT#2/GPIO51 BAT_LED# AMBER_BATLED# 82 PW R_BD_LED# 82
0R0402-PAD PWR_LED#/8051TX 115 8051TX/S3_LED# 71
19 SUSCLK32_KBC 1 2 SUSCLK32_KBC_IN 71 32KHZ_INPUT FDD_LED#/8051RX 114 8051RX/CAPS_LED 71 3D3V_S0
VCC1

R2717 0R0402-PAD 1 2
CAP
VSS

VSS
VSS
VSS
VSS
VSS
2

0R2J-2-GP KB_CAPS_LED 69,97


20120112 PV-R R2736
2

1
72

11
37
47
56
82
104
117

15

20120112 PV-R R2732 C2715 20120210PV-R R2718


20KR2J-L2-GP 3D3V_AUX_KBC KBC_CAP 1 2 10KR2J-3-GP
DY_DS3 SC4D7U6D3V3KX-GP D2702
1

2
K A TACH_FAN_IN_R
28 TACH_FAN_IN CH751H-40-1-GP
83.R0304.D8F
TP_LED#

20120201PV-R 2ND = 83.R2004.C8F


A 20120210PV-R <Core Design> 3RD = 83.1PS76.01F A

U2702
8,19,29,34,35,36,37,45,46,47,48,92,93 PM_SLP_S3#
8051TX/S3_LED# 1 A1 DY Y1 6 PW R_BD_LED# Wistron Corporation
1 TP2707 TPAD14-OP-GP 2 5 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
46 PM_SLP_S4#_KBC GND VCC 3D3V_AUX_S5
8051RX/CAPS_LED 3 4 KB_CAPS_LED Taipei Hsien 221, Taiwan, R.O.C.
A2 Y2

1
C2716
SCD1U16V2ZY-2GP Title
NC7W Z07P6X-1GP
DY
KBC_SMSC_KBC1126

2
73.7WZ07.0AJ
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 27 of 103
5 4 3 2 1
5 4 3 2 1

4 WIRE PWM Fan Control circuit 3D3V_S0 3D3V_S0

1
2
FAN PWM LEVEL = 5V
D
20mil RN2801
D

SRN2K2J-1-GP
5V_S0 5V_S0 5V_S0_FAN

NAND gate

4
3
KBC control signal is LOW , Fan ON 20120116PV-R U2803

5
U2802 FAN1 20120116PV-R THERM_SDA 1 6 PCH_KBC_DATA 18,27,85

RN
R2801
1 5 2 1 1 RN2802 2 5
27 FAN_PW M THERM# B VCC 0R0402-PAD ACES-CON4-19-GP
2 A 65 Meter_SMBDATA 1 4
3 4 FAN_PW M_Y 2 20.F1637.004 65 Meter_SMBCLK 2 3 3 4
GND Y
R2802 1 TACH_FAN_IN_C
3 2nd = 20.F1808.004 0R4P2R-PAD
27 TACH_FAN_IN 2 4 3rd = 20.F1579.004 2N7002KDW -GP

1
74AHCT1G00GW -GP C2801 0R0402-PAD THERM_SCL
73.01G00.0BG DY 20120112 PV-R 84.2N702.A3F

SC47P50V2JN-3GP
PCH_KBC_CLK 18,27,85

6
1st = 73.01G00.01G 2nd = 84.2N702.E3F
3rd = 84.2N702.F3F
2nd = 73.7SET0.0BG
3rd = 73.01G00.0BG
Thermal IC Control circuit
3D3V_S0

C Cap closed to Q2801 C

1
1
R2804

1
R2803 C2802 10KR2J-3-GP
A B Y 2K2R2J-2-GP SC1U10V3ZY-6GP
20110906SI

2
1
L L H C2803 U2801

2
5V_S0_FAN 1 AFTP2801 AFTE14P-GP Q2801 B
PMBS3904-3-GP SC2200P50V2KX-2GP 1 8 THERM_SCL

2
H VCC SMBCLK
L H FAN_PW M_Y 1 AFTP2802 AFTE14P-GP DXP1 2 7 THERM_SDA

E
DXN1 DXP SMBDATA
3 DXN ALERT# 6 THERM_SCI# 22
TACH_FAN_IN_C 1 AFTP2803 AFTE14P-GP 84.S3904.011 THERM# 4 5
H THERM# GND
H L 2nd = 84.03904.X11
GND 1 AFTP2804 AFTE14P-GP
G781P8F-GP
H H L

B
T8 H/W Shutdown Control circuit B

Degree Rset

95 25.5K
3D3V_S0
90 22.1K
U2805
85 18.7K R2806
22K1R2F-L-GP 1 2 U2804_SET 1 5 U2804_VCC 1 2
SET VCC R2811
2 150R2F-1-GP
GND
1

41 AMB_TEMP_SD# 3 OUT# HYST 4


C2806
SCD1U10V2KX-5GP
U2804_HYST

G709T1UF-GP
74.00709.A7F
2nd = 74.00709.0BF
2

R2813
A 0R0402-PAD <Core Design> A

20120112 PV-R
1

Layout: PUT U2805 Bottom side and close CPU Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
PUT R2806 Close U2806 Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal G781 / FAN


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 28 of 103
5 4 3 2 1
5 4 3 2 1

AVDD_CODEC

AUDIO_AVDD L2901 1 2 20120112 PV-R


Close to codec MCB1608S300IBP-GP 5V_S0

SC1U10V2KX-1GP
SCD1U10V2KX-4GP
PM_SLP_S3# 8,19,27,34,35,36,37,45,46,47,48,92,93

C2906
68.00909.191

1
C2905
2nd = 68.00217.B11 Vout = 4.75 V

10KR2J-3-GP
AUD_DVDDCORE

1
R2905
Vout = 1.25(1+R1/R2)

2
1
5V_S0 R2906
C2901 0R0402-PAD AVDD_CODEC
SC10U10V5KX-2GP
DY Q2902

SCD1U10V2KX-4GP

2
20120112 PV-R AVDD_CODEC_EN 3 4 TPS793475_NR

SC1U10V2KX-1GP

SC10U10V5KX-2GP
D D
EN NR

C2909
3D3V_S0 U2901 AUD_AGND 2 GND

1
C2908

C2910
1 IN OUT 5

SC2D2U6D3V3KX-GP
1 DVDD_LV AVDD1 21

C2912
Close to codec 32 C2907 C2911

2
AVDD2 SCD1U10V2KX-4GP HPA01085DBVR-GP
7
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
DVDD SCD01U16V2KX-3GP
39
SC1U10V2KX-1GP

2
PVDD
PVDD 33 74.01085.03F
1

1
C2903

C2904

C2902
11 AUD_SENSE_A AUD_AGND AUD_AGND
HDA_BITCLK_CODEC SENSE_A AUD_SENSE_B
5 12
2

17,97 HDA_BITCLK_CODEC BITCLK SENSE_B


DY R2901 1 2 HDA_CODEC_SDIN0 6 AUD_AGND
17 HDA_SDIN0_CODEC 33R2J-2-GP SDATA_IN
PORTA_L 22
HDA_SDOUT_CODEC 4 23
17,97 HDA_SDOUT_CODEC SDATA_OUT PORTA_R
VREFOUT_A 19
HDA_SYNC_CODEC 8
17 HDA_SYNC_CODEC SYNC
PORTB_L 25 HP_OUT_L 31,97
3D3V_S0 HDA_RST#_CODEC 9 26
17,97 HDA_RST#_CODEC RESET# PORTB_R HP_OUT_R 31,97
20120116PV-R 15 AUD_EXT_MIC_L C2922 2 1 SC1U10V2KX-1GP MICL 30
PORTC_L AUD_EXT_MIC_R C2921
20120112 PV-R PORTC_R 16 2 1 SC1U10V2KX-1GP MICR 30
1

20 AUD_VREFOUT_B
R2922 R2920 1 VREFOUT_C AUD_VREFOUT_B 30
49,97 DMIC_CLK 2100R2J-2-GP DMIC_CLK_R 2 DMIC_CLK/GPIO1
10KR2J-3-GP R2921 1 2 0R2J-2-GP DMIC_DATA_R 3 35 AUD_SPK_L-
49,97 DMIC_DATA DMIC_0/GPIO2 PORTD_-L AUD_SPK_L+ AUD_SPK_L- 31
from KBC D2901 97 DMIC_CLK_R PORTD_+L 34 AUD_SPK_L+ 31
2

A_SD#_R 97 DMIC_DATA_R
27 A_SD# K A 40 EAPD
C CH751H-40-1-GP 37 AUD_SPK_R- C
C2924 !! Notice PORTD_-R/+R PORTD_-R AUD_SPK_R+ AUD_SPK_R- 31
83.R0304.D8F PORTD_+R 38 AUD_SPK_R+ 31
1

20120201PV-R 2ND = 83.R2004.C8F PUMP_CAPP


3RD = 83.1PS76.01F 13
SCD1U10V2KX-4GP

PORTF_L

2
29 14
2

C2914 CAP- PORTF_R


SC4D7U6D3V3KX-GP 1 30 10 AUD_PC_BEEP
PUMP_CAPN CAP+ PCBEEP

24 18 AUD_CAP2
AVSS2 CAP2
27 AVSS2
3D3V_S0 17 AUD_VREFFLT AUD_CAP2 AVDD_CODEC
VREFFILT
36 28 AUD_V_B AUD_VREFFLT
PVSS V-

2
41 31 AUD_VREG AUD_V_B R2927
GND VREG/+2_5V
2

100KR2J-1-GP
R2926 AUD_VREG
4K7R2J-2-GP 92HD87B2X5NDGXRAX-GP-U1

SC10U10V5KX-2GP

SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1
AUD_AGND 71.92H87.C03 AUD_SENSE_B

C2917

C2918

C2915

C2916
1

1
HDA_RST#_CODEC

2
20110904SI
1

C2928
SC820P50V2KX-1GP
2

B AUD_AGND AUD_AGND AUD_AGND AUD_AGND B

Close to codec Close to Pin14

Digital GND & AUD_AGND PC BEEP AVDD_CODEC

AVDD_CODEC
Tie Analog GND and Digital GND

1
under codec by a single point R2915
1

2K49R2F-GP R2913 20KR2F-L-GP


1 2 HP_DETECT# 31,97
R2924

2
10KR2J-3-GP AUD_SENSE_A
2

G2901 1 2 GAP-CLOSE-PW R-3-GP R2919 10KR2F-2-GP

1
1 2 MIC_DETECT# 31,97
MONO_L2 1 MONO_L_0 1 2 MONO_L_1 2 1AUD_PC_BEEP C2919
G2902 1 2 GAP-CLOSE-PW R-3-GP C2927 R2923 C2925 SC1KP50V2KX-1GP

2
SCD1U16V2KX-3GP 100KR2J-1-GP SCD1U16V2KX-3GP
1
D

G2903 1 2 GAP-CLOSE-PW R-3-GP AUD_AGND

1
Q2901 R2925 C2926
10KR2J-3-GP SCD01U16V2KX-3GP
2N7002K-2-GP Close to Pin13
2

AUD_AGND
84.2N702.J31
A <Core Design> A
2nd = 84.07002.I31
3rd = 84.2N702.W31
G

Wistron Corporation
AUD_AGND 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
audio ground must be connect to Taipei Hsien 221, Taiwan, R.O.C.
17 HDA_SPKR
Title
digital ground with an 80 mil copper AUD_AGND
bridge located directly under codec Audio Codec 92HD87B2X5
Size Document Number Rev
A3 -1
to prevent ESD latch up. 2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 29 of 103
5 4 3 2 1
5 4 3 2 1

Pre-AMP. for External MIC

D D

CODEC_VREF_EQ

100KR2J-1-GP 100KR2J-1-GP
R3004 R3005
1 2 2 1

1 2 MICL 29 1 2 MICR 29
C3001 C3006 C3008
1 2 AUD_AGND SC15P50V2JN-2-GP SC15P50V2JN-2-GP
29 AUD_VREFOUT_B 29 AUD_VREFOUT_B

SC1U10V2KX-1GP

1
CODEC_VREF_EQ
1

1
C3005
R3001 SC100P50V2JN-3GP AVDD_CODEC R3008

2
C 3K9R2F-GP 3K9R2F-GP C

1
U3001
2

2
C3009 20120112 PV-R
1 8 SC100P50V2JN-3GP
L3002

2
EXT_MIC_1IN- OUTA VDD R3007
L3001 20120112 PV-R 2 INA- OUTB 7
R3002 R3003 3 6 EXT_MIC_2IN- 2 1EXT_MICR_R
1 2EXT_MICR 2 1EXT_MICR_1 1 2
INA+ INB- MIC_IN_R 31,97
31,97 MIC_IN_L 1 2 EXT_MICL_1 1 2EXT_MICL 2 1EXT_MICL_R 1 2 4 VSS INB+ 5 R3006
MCB1005S601FBP-GP-U
MCB1005S601FBP-GP-U 0R0402-PAD C3012 68.00213.011
2

1
C3003 0R0402-PAD 10KR2J-3-GP 10KR2J-3-GP SCD47U10V2KX-GP C3013
68.00213.011 SCD47U10V2KX-GP C3004 G1224P8U-1-GP C3011 SC220P50V2KX-3GP
SC68P50V2JN-1GP SC68P50V2JN-1GP
2nd = 68.00217.601
2nd = 68.00217.601 74.G1224.019
1

2
1

C3002 3rd = 68.00225.121 AUD_AGND 3rd = 68.00225.121


SC220P50V2KX-3GP 2nd = 74.02462.019
AUD_AGND AUD_AGND AUD_AGND
2

AUD_AGND

AVDD_CODEC CODEC_VREF_EQ

1
R3009
47KR2J-2-GP
B B

2
1

R3010
47KR2J-2-GP
1

C3014 1 C3015
2
SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

AUD_AGND

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

External MIC_Pre-Amp
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 30 of 103
5 4 3 2 1
5 4 3 2 1

HeadPhone OUT
68.00213.081
2nd = 68.00217.B21
L3101

29,97 HP_OUT_L 1 2 HP_OUT_L_1 1 2 HP_OUT_L1


R3101 16D2R3F-2-GP MCB1005S301S301EBP-GP
L3102
D 29,97 HP_OUT_R 1 2 HP_OUT_R_1 1 2 HP_OUT_R1 D
R3102 16D2R3F-2-GP MCB1005S301S301EBP-GP
68.00213.081
R3111 R3112 C3101 C3102 2nd = 68.00217.B21

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
1

1
20KR2J-L2-GP

20KR2J-L2-GP

1
2

2
C3103 C3104

2
SCD033U16V2KX-GP SCD033U16V2KX-GP

2
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
AUD_AGND AUD_AGND

Audio Board +Touch Pad Connector MIC_DETECT#


MIC_IN_L
MIC_IN_R
HP_OUT_L1
1
1
1
AFTP3101
AFTP3102
AFTP3103
AFTP3104
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
AFTE14P-GP
1
C HP_OUT_R1 1 AFTP3105 AFTE14P-GP C
HP_DETECT# 1 AFTP3106 AFTE14P-GP
PCH_SMBCLK 1 AFTP3118 AFTE14P-GP
PCH_SMBDATA 1 AFTP3119 AFTE14P-GP
IMCLK_R 1 AFTP3120 AFTE14P-GP
IMDAT_R 1 AFTP3121 AFTE14P-GP
AUDIO1 3D3V_S0 1 AFTP3122 AFTE14P-GP
17 3D3V_S0 1 AFTP3123 AFTE14P-GP
1 HP_OUT_R1
1 AFTP3124 AFTE14P-GP
2 HP_OUT_L1
3 20120130PV-R
4 MIC_IN_R 30,97
5 MIC_IN_L 30,97
6 U3101 3D3V_S0 1 AFTP3126 AFTE14P-GP
AUD_AGND
7 DY 1 AFTP3127 AFTE14P-GP
8 HP_DETECT# HP_DETECT# 29,97 IMDAT 1 6 IMCLK 1 AFTP3128 AFTE14P-GP
MIC_DETECT# 3D3V_S0 VI/O#1 VIO#6 AFTP3129 AFTE14P-GP
9 MIC_DETECT# 29,97 1
10 2 GROUND VBUS 5
11 RN3102 SRN0J-6-GP
12 IMCLK_R 1 4 IMCLK 27 HP_DETECT# 3 4 MIC_DETECT#
IMDAT_R 2 VIO#3 VIO#4
13 3 IMDAT 27
14
15 IP4223CZ6-GP
PCH_SMBCLK 14,15,18,65
16 PCH_SMBDATA 14,15,18,65 83.42236.0AE
1

18
C3105
2nd = 83.09904.AAE
ACES-CON16-17-GP
3rd = 83.02304.0AE
SCD1U16V2ZY-2GP
2

B 20.K0721.016 B
2nd = 20.K0382.016 AUD_AGND

20120130PV-R 3D3V_S0
RN6901
IMCLK_R 1 4
IMDAT_R 2 3

SRN4K7J-8-GP

Speaker Connector AUD_SPK_L+ AFTP3132 AFTE14P-GP


1
AUD_SPK_L- 1 AFTP3133 AFTE14P-GP

SPK1 AUD_SPK_R+ 1 AFTP3130 AFTE14P-GP


5 EC3101 AUD_SPK_R- 1 AFTP3131 AFTE14P-GP
AUD_SPK_R- 1 2 SC100P50V2JN-3GP EMI
AUD_SPK_R- 1 EC3102
29 AUD_SPK_R- AUD_SPK_R+ 1 2 SC100P50V2JN-3GP EMI
AUD_SPK_R+ 2 EC3103
29 AUD_SPK_R+ AUD_SPK_L- ACES-CON4-17-GP-U1 AUD_SPK_L-
29 AUD_SPK_L- 3 1 2 SC100P50V2JN-3GP EMI
AUD_SPK_L+ 4 20.F1621.004 EC3104
29 AUD_SPK_L+ AUD_SPK_L+
A 1 2 SC100P50V2JN-3GP EMI <Core Design> A
6 20120307 MV
3rd = 20.F1937.004
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

AUDIO Connector
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 31 of 103
5 4 3 2 1
5 4 3 2 1

CardReader JMicron JMB709


CAD Note:
D D
Put Close Pin10
3D3V_S0 1D8V_S0_CARD 1D8V_S0_CARD
1D8V_S0_CARD

1
(20mil) C3204 C3205 C3206 C3207

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP
2

2
1

1
CAD Note: C3201 C3202 C3203
U3201
Put Close Pin5.
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
2

2 37 DV18 APTXP 12 PTXP C3210 1 2 SCD1U10V2KX-5GP PCIE_RXP3_MEDIA 18


18 11 PTXN C3211 1 2 SCD1U10V2KX-5GP PCIE_RXN3_MEDIA 18
DV18 APTXN
19 DV33 APRXP 8 PCIE_TXP3_MEDIA 18
20 DV33 APRXN 9 PCIE_TXN3_MEDIA 18
44 DV33
APCLKP 4 CLK_PCIE_MEDIA 18
33 CD0N 5 APVDD APCLKN 3 CLK_PCIE_MEDIA# 18
10 APV18
20120112 PV-R 2 1 SDDV33_18 43 7 APREXT 1 2
R3205 1 SDDV33_18 APREXT
22,97 D3E_W AKE# 2 0R0402-PAD
CD0N C3209 SC2D2U6D3V3KX-GP R3201 12KR2J-L-GP 3D3V_S0_CARD
1

C3208 33,97 MS_INS# 15 48 MDIF0 33,97


CR1_CD1 MDIO0

1
SCD1U10V2KX-4GP DY 16 47 MDIF1 33,97
CR1_CD0 MDIO1 R3202
3D3V_S0_CARD (25mil) 17 46 MDIF2 33,97
2

CLOSE TO CHIP CR1_PCTLN MDIO2


21 CR1_LEDN MDIO3 45 MDIF3 33,97 1KR2J-1-GP
C 41 C
MDIO4 MDIF4 33
5,17,21,34,53,54,56,71,83,96,97 PLT_RST# 1 42 MDIF5_R

2
XRST# MDIO5
2 XTEST MDIO6 24 MDIF6 33
39 TXIN MDIO7 40 3D3V_S0
D3E_CPPE# 13 29
CPPE# MDIO8
MDIO9 28
MDIO10 27
14 NC#14 MDIO11 26
22 CRD_REQ#_R_R R3204 1 2 0R2J-2-GP 22 20120112 PV-R
NC#22
DY 23 NC#23 R3203
25 NC#25
30 6 MDIF5_R 2 1 MDIF5 33,97
Q3201 NC#30 APGND
33 NC#33
S D3E_CPPE# 34 31 0R0402-PAD
NC#34 GND
35 NC#35 GND 32
18 CLKREQ_MEDIA# D 36 NC#36 GND 38

G 3D3V_S0
JMB709-LGAZ0A-GP
2N7002K-2-GP 71.00709.00G
84.2N702.J31
2nd = 84.07002.I31
3rd = 84.2N702.W31

D3E Detection Table CR1_CDxN Detection Table

CR1_CDxN
B D3E_CPPE# Status Card Type B
1 0
H H (No Card)
H D3E mode
H L SD Card/MMC
L Normal mode L H MemoryStick
L L XD Card

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Card Reader-JMB 709


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 32 of 103
5 4 3 2 1
5 4 3 2 1

D D

3D3V_S0_CARD

1
C3301 C3302

SC10U6D3V3MX-GP

SCD1U10V2KX-4GP
2

2
CARD1

11 SD_VDD/MMC_VDD MS_DATA0 12 MDIF0 32,97


C 13 C
MS_DATA1 MDIF1 32,97
4 MS_VCC MS_DATA2 10 MDIF2 32,97
MS_DATA3 7 MDIF3 32,97

32 CD0N 20 SD_CD MS_INS 8 MS_INS# 32,97


32,97 MDIF3 3 SD_CD/DAT3/MMC_RSV MS_BS 15 MDIF4 32
MS_SCLK 5 MDIF5 32,97
32,97 MDIF5 14 SD_CLK/MMC_CLK
32 MDIF4 6 SD_CMD/MMC_CMD
GND 23
32,97 MDIF0 18 SD_DAT0/MMC_DAT GND 24
32,97 MDIF1 19 SD_DAT1
32,97 MDIF2 1 SD_DAT2 SD_GND 21

32 MDIF6 22 SD_WP/SW MS_VSS 2


MS_VSS 16

NP1 NP1 SD_VSS/MMC_VSS1 9


NP2 NP2 SD_VSS/MMC_VSS2 17

CARD-PUSH-22P-GP-U
20.I0110.021
2nd = 20.I0133.001

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SD/MS/MMC CONNECTOR
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 33 of 103
5 4 3 2 1
5 4 3 2 1

LAN CHIP-RTL8151FH Regout power plane(1D05V)


USE EFuse No ASF EVDD10
20120116PV-R Put cap near pin21
3D3V_LAN_S5 3D3V_LAN_S5 1 R3417 2
40 mils (average 100mA) R3403

1
LAN_GPO R3406 1 2 1KR2J-1-GP 1 2 VDDREG C3412 C3409 0R0603-PAD-1-GP

SC1U6D3V2KX-GP

SCD1U16V2ZY-2GP
0R0603-PAD-1-GP

2
1

1
C3424 C3422 C3403 C3417 C3418 C3414 C3419 C3406
D LAN_SMBDATA R3418 1 2 10KR2J-3-GP Place D

SC4D7U6D3V3KX-GP
SCD1U16V2ZY-2GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
closed to

2
Pin 34,35
EEDI R3408 1 2 10KR2J-3-GP LanChip Power
EECS R3409 1 2 10KR2J-3-GP +3.3V_LAN_S5 Rising time VDD10

(10%~90%) cap near pin3,6,9,13,29,41,45


Spec >1mS and <100mS cap near pin12,27,39,42,47,48 <200mils

1
C3423 C3420 C3407 C3421 C3435 C3416 C3415

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
2

2
YELLOW _LED# 35,97 EEPROM LED OPTION USE '00'
R3404 => LED0 : ACT (Yellow)
1 2 RSET => LED1 : LINK (Green)
LAN_GPO
2K49R2F-GP (BOTH 10/100 & GIGA CHIP)
GREEN_LED# 35,97
(Power down => Kept high)

3D3V_LAN_S5

3D3V_LAN_S5

3D3V_LAN_S5
LANXOUT
LANXIN
VDD10

VDD10
C 60 mils (average 300mA) C

L3401 2nd = 68.4R71E.10Q


3rd = 68.4R71G.10G

48
47
46
45
44
43
42
41
40
39
38
37
U3401 REGOUT 1 2
49 IND-4D7UH-192-GP

AVDD33
AVDD33

AVDD10
CKXTAL2
CKXTAL1
AVDD33
DVDD10
LED0
DVDD33

LED1/EESK
RSET

GPO/SMBALERT
GND

1
68.4R750.20C C3401 C3413

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP
2

2
Lan Power Inductance Spec
1 36 REGOUT (1) IDC >= 600mA
35 MDIP0 MDIP0 REGOUT VDDREG
35 MDIN0 2 MDIN0 VDDREG 35 (2) Tolerance < 20%
VDD10 3 34
AVDD10 VDDREG ENSW REG (3) RDC <= 0.8ohms(Max)
35 MDIP1 4 MDIP1 ENSWREG 33
5 32 EEDI (4) Efficiency >= 80%
35 MDIN1 VDD10 MDIN1 EEDI/SDA LAN_LED3#
6 AVDD10 LED3/EEDO 31 1
7 30 EECS TP3401 TPAD14-OP-GP
35 MDIP2 MDIP2 EECS/SCL VDD10
35 MDIN2 8 MDIN2 DVDD10 29
VDD10 9 28 PCIE_W AKE# 19,53
AVDD10 RTL8151FH-CG-1-GP LANWAKE# 3D3V_LAN_S5
35 MDIP3 10 MDIP3 DVDD33 27 Put 4D7U L + 4D7U cap near pin36 <200mils
11 26 ISOLATE#
35 MDIN3 3D3V_LAN_S5 12
MDIN3 ISOLATE#
25
(2nd = 78.22610.81L)
AVDD33 PERST# PLT_RST# 5,17,21,32,53,54,56,71,83,96,97

REFCLK_N
REFCLK_P
SMBDATA
CLKREQ#
SMBCLK
DVDD10

EVDD10
Regout Switch

HSON
HSOP
HSIN
HSIP

GND
3D3V_S5 3D3V_LAN_S5 13
14
15
16
17
18
19
20
EVDD10 21
22
23
24
B Q3401 3D3V_LAN_S5 B
DMP2305U-7-GP 71.08151.M04
20120112 PV-R
VDD10

ENSW REG R3405 1 2 0R0402-PAD


S D Close to LanChip

2
1

84.02305.G31 C3425 PCIE_RXN6_R 1 2 C3411 R3407 ENSWREG (REGOUT 1D05V)


Using Efuse PCIE_RXN6_LAN 18
G
1

2ND = 84.02377.031 SCD1U10V2KX-5GP 0R2J-2-GP


PH = Enable
SCD1U10V2KX-5GP

C3402 R3401 3rd = 84.02035.031 Without ASF LAN_SMBDATA PCIE_RXP6_R 1 2 C3410 PCIE_RXP6_LAN 18 DY
2

SC1U10V3ZY-6GP 100KR2J-1-GP SCD1U10V2KX-5GP PL = Disable


2

1
20120210PV-R
2

LAN_POW ER_EN#_R 18 CLKREQ_LAN# CLK_PCIE_LAN# 18


CLK_PCIE_LAN 18

PCIE_TXN6_LAN 18
1

PCIE_TXP6_LAN 18
R3402
10KR2F-2-GP
2

Q3402
1 6
25MHz Crystal Isolate Strap Pin
27,38 ADP_PRES 2 5 PM_SLP_S3# 8,19,27,29,35,36,37,45,46,47,48,92,93
C3404 3D3V_S0
3 4 SC18P50V2JN-1-GP 2 1 LANXOUT

1
A 2N7002KDW -GP <Core Design> A
R3411
1

LAN_POW ER_EN# 1KR2J-1-GP


X3401
84.2N702.A3F XTAL-25MHZ-155-GP Wistron Corporation

2
ISOLATE# 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2nd = 84.2N702.E3F 82.30020.D41 Taipei Hsien 221, Taiwan, R.O.C.

1
3rd = 84.2N702.F3F 2nd = 82.30020.G71
4

R3414 Title
3rd = 82.30020.G61 15KR2F-GP
C3405 Lan Realtek 8151FH
SC18P50V2JN-1-GP 2 1 LANXIN Size Document Number Rev
LANXIN 97

2
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 34 of 103
5 4 3 2 1
5 4 3 2 1

XF3501 XFORM-24P-38-GP

13 12 RJ45-8
34 MDIN3
close to XF3501

D C3501 14 11 RJ45-7 D
34 MDIP3
2 1 XRF_RDC 15 1:1 10 MCT2 1 2 MCT2_C
C3502 SCD01U50V2KX-1GP
SCD01U16V2KX-3GP
16 1:1 9 MCT3 1 2 MCT3_C
17 8 RJ45-5 C3503 SCD01U50V2KX-1GP
34 MDIN2

SRN75J-1-GP

1 8 LAN_TERMINAL
18 7 RJ45-4 2 7
34 MDIP2
3 6
4 5
19 6 RJ45-6
34 MDIN1 RN3501

2
20 5 RJ45-3 C3504
34 MDIP1
21 1:1 4 MCT0 1 2 MCT0_C SC1KP2KV6KX-GP

1
C3505 SCD01U50V2KX-1GP

22 1:1 3 MCT1 1 2 MCT1_C


23 2 RJ45-2 C3506 SCD01U50V2KX-1GP
34 MDIN0

C C

24 1 RJ45-1
34 MDIP0

68.IH115.30A
2nd = 68.69241.30C
3rd = 68.00069.30A

RJ45 Connector
Q3501
S GREEN_LED#

B 21 LANLINK_STATUS D 20120116PV-R B
R3501 RJ45 R3504
G 470R2J-2-GP 13 RJ45-13 2 1
GREEN_LED# 1 2 GREEN_R_LED# 9
0R0603-PAD-1-GP
2N7002K-2-GP
GREEN = Lan Link 3D3V_LAN_S5 10
84.2N702.J31 RJ45-1 1 Green
2nd = 84.07002.I31 RJ45-2
10(+),9(-)
3rd = 84.2N702.W31 RJ45-3
2
8,19,27,29,34,36,37,45,46,47,48,92,93 PM_SLP_S3# 3
RJ45-4 4
RJ45-5 5
RJ45-6 6 Amber
R3502 RJ45-7 7
470R2J-2-GP RJ45-8
12(+),11(-)
8
YELLOW _LED# 1 2 YELLOW _R_LED# 11

34,97 GREEN_LED# YELLOW = LAN ACK 3D3V_LAN_S5 12 R3503 20120116PV-R


14 RJ45-14 2 1
34,97 YELLOW _LED#
RJ45-8P-99-GP 0R0603-PAD-1-GP
22.10177.N21
2nd = 22.10177.N31

(1)route on bottom as differential pairs.


GREEN_R_LED# 1 AFTP3501 AFTE14P-GP
1 AFTP3502 AFTE14P-GP (2)Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3D3V_LAN_S5
A RJ45-1 1 AFTP3503 AFTE14P-GP (3)No vias, No 90 degree bends. <Core Design> A
RJ45-2 1 AFTP3504 AFTE14P-GP
RJ45-3 AFTP3505 AFTE14P-GP
(4)pairs must be equal lengths.
1
RJ45-4 AFTP3506 AFTE14P-GP (5)6mil trace width,12mil separation.
RJ45-5
1
1 AFTP3507 AFTE14P-GP (6)36mil between pairs and any other trace. Wistron Corporation
RJ45-6 1 AFTP3508 AFTE14P-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
RJ45-7 1 AFTP3509 AFTE14P-GP (7)Must not cross ground moat, Taipei Hsien 221, Taiwan, R.O.C.
RJ45-8 1 AFTP3510 AFTE14P-GP except RJ-45 moat.
YELLOW _R_LED# 1 AFTP3511 AFTE14P-GP Title
1 AFTP3512 AFTE14P-GP
3D3V_LAN_S5
1 AFTP3513 AFTE14P-GP LAN RJ45
1 AFTP3514 AFTE14P-GP Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 35 of 103
5 4 3 2 1
5 4 3 2 1

Run Power 5V_ODD_HDD_S0 5V_S5


DY
U3603
+5VALW to +5VS Transfer 1 2 1 S D 8 2.5A
C3603 2 S D 7
+3VALW to +3VS Transfer SCD1U25V2KX-GP 3 S D
D
6
5
+1.5VU to +1.5VS Transfer

1
C3610 G
SCD1U16V2ZY-2GP

2
+V1.05M_LAN to +V1.05S Transfer QM3002M3-GP

2
15V_S0 C3614
D 84.30023.037 D
2nd = 84.01528.037 SCD1U25V2KX-GP

1
1 2 SPW ON DY
R3614 5V_S0 5V_S5
47KR2J-2-GP DY

1
U3601
C3615 1 2 1 S D 8
SCD01U16V2KX-3GP C3601 2 S D 7
3A

2
SCD1U25V2KX-GP 3 S D 6
D 5
G

2
4
2

1
5V_S5 C3607 QM3002M3-GP C3613
R3601 SCD1U16V2ZY-2GP 84.30023.037 SCD1U25V2KX-GP

1
220R2J-L2-GP 2nd = 84.01528.037 DY

2
1
1

SPWON_DC
R3612 3D3V_S0 3D3V_S5
100KR2J-1-GP DY
E

U3602
3A
2

3906_83_B B Q3602 1 2 1 S D 8
MMBT3906-4-GP C3602 2 S D 7
1

84.T3906.A11 SCD1U25V2KX-GP 3 S D 6
C

D 5

D
1

R3613 G
3906_8384_CE

2nd = 84.C3906.A11 20120131PVRC3606


1

2
C 200KR2J-L1-GP U3609 C

4
1
R3610 SCD1U25V2KX-GP 2N7002K-2-GP C3608 QM3002M3-GP C3612
2

PM_SLP_S3 124KR2F-GP 84.2N702.J31 SCD1U16V2ZY-2GP 84.30023.037 SCD1U25V2KX-GP


2

1
2nd = 84.01528.037 DY
2

2
2nd = 84.07002.I31
E
D

Q3603 B3906_84_B 3rd = 84.2N702.W31

S
Q3601 MMBT3906-4-GP
2N7002K-2-GP 84.T3906.A11
C

20120131PVR 1D5V_S0 1D5V_S3


1

2nd = 84.C3906.A11 PM_SLP_S3


DY U3604
84.2N702.J31 R3609 10A
3906_84_C

1 2 1 S D 8
2nd = 84.07002.I31 61K9R2F-GP C3604 2 S D 7
G
S

3rd = 84.2N702.W31 SCD1U25V2KX-GP 3 S D 6


2

2 D 5
G
3

4
1

2
D3601 C3609 QM3006M3-GP
1 BAV99H-75V-GP SCD1U16V2ZY-2GP 84.03006.B37 C3611
20120210PV-R 2nd = 84.07202.030 SCD1U25V2KX-GP

1
1ST = 83.00099.M11 DY
PM_SLP_S3# 8,19,27,29,34,35,37,45,46,47,48,92,93 2ND = 83.BAV99.H11 20120206 PV-R
3RD = 83.00099.P11

B B

41 PW R_5V_PH 1 2 PW R_5V_PH_RC_1 1 2 PW R_5V_PH_RC_2


R3611 C3605
10R2J-2-GP SCD01U50V2KX-1GP

R3607
U3606
470R2J-2-GP U3605
5V_S0 1 2 +5VS_DC 3 4 R3604 DY S
470R2J-2-GP
PM_SLP_S3 2 5 PM_SLP_S3 1D8V_S0 1 DY 2+1.8VS_DC D

1 6 +3VS_DC 1 2 3D3V_S0 G PM_SLP_S3 PM_SLP_S3 93


R3605 84.2N702.J31
2N7002KDW -GP 470R2J-2-GP
2N7002K-2-GP
84.2N702.A3F 2nd = 84.07002.I31
2nd = 84.2N702.E3F 3rd = 84.2N702.W31
3rd = 84.2N702.F3F
A R3603 <Core Design> A
U3607
U3608
1D5V_S0 1 2 +1.5VS_DC 3 4
220R2J-L2-GP PM_SLP_S3
PM_SLP_S3 2 5 PM_SLP_S3
G
Wistron Corporation
D DDR_VREF_S0_DC 1 2 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
0D75V_S0
1 6 +1.05VS_DC 1 2 R3606 Taipei Hsien 221, Taiwan, R.O.C.
1D05V_S0
R3608 S 22R2J-2-GP
2N7002KDW -GP 470R2J-2-GP Title
84.2N702.A3F 84.2N702.J31 2N7002K-2-GP Power Plane Enable
2nd = 84.2N702.E3F Size Document Number Rev
3rd = 84.2N702.F3F 2nd = 84.07002.I31 A3
3rd = 84.2N702.W31 2012 S-Series Richie 13.3 -1
Date: W ednesday, March 14, 2012 Sheet 36 of 103
5 4 3 2 1
5 4 3 2 1

D D

POK

5V_S0

R3704 1 2
76K8R2F-GP

0D75V_S0
3D3V_S0
R3708 1 2
11K5R2F-GP

1
R3703
R3709 1 2 2VREF 3K3R2J-3-GP
48 VCCSA_PG R3706 C3701
3K3R2J-3-GP
1 2 1 2

2
D3701 PW R_GOOD 5,27,42,50,96
R3712 1 34K8R2F-1-GP SC1KP50V2KX-1GP
8,19,27,29,34,35,36,45,46,47,48,92,93 PM_SLP_S3# 2 PM_SLP_S3#_R K A
3K3R2J-3-GP 2VREF_R_APX-
CH751H-40-1-GP
C C
83.R0304.D8F
20120201PV-R 2ND = 83.R2004.C8F 1 R3710 2 1 R3711 2
3RD = 83.1PS76.01F 1MR2F-L-GP 1MR2F-L-GP

POK_B_APX+_R

R3714

47 V1.8S_PG R3716 1 2 3K3R2J-3-GP POK_A_APX+ 1 2 POK_A_APX+_R

10KR2F-2-GP

1
45 VCCP_PG R3718 1 2 3K3R2J-3-GP R3715

6
1MR2F-L-GP C3702 R3717
SC3300P50V2KX-1GP 49K9R2F-L-GP
DY

+
4 8 8 4

-
2
DY

1
42 VCC_GFXCORE_PG R3719 1 2 3K3R2J-3-GP U3701A U3701B
AP393SG-13-GP-U AP393SG-13-GP-U

7
1D5V_S0
R3720
R3722 1 2 34KR2F-GP POK_B_APX+ 1 2

1
10KR2F-2-GP 1st = 74.10393.A21 1st = 74.10393.A21

1
1D05V_S0
R3721 C3703
2ND = 74.00393.S21 2ND = 74.00393.S21
61K9R2F-GP SC3300P50V2KX-1GP
3rd = 74.00393.H21 3rd = 74.00393.H21

2
R3724 1 2 24K3R2F-1-GP 2 Bom Not: 1st/2nd/3rd Add in BOM
B 3D3V_S0 B

R3723 1 2 75KR2F-GP 5V_S5

1
C3704
SCD1U10V2KX-4GP

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

POK
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 37 of 103
5 4 3 2 1
5 4 3 2 1

5V_S0
5V_S0
ADP OCP

2
OCP_OC# 22 2VREF
R3803
665KR2F-GP

2
R3804 5V_S0

D
1
C3801 1 2 OCP_MAIN#_APX R3812
200KR2F-L-GP SC1U10V2KX-1GP Q3801 20KR2F-L-GP 5V_AUX_S5
D U3801
2N7002K-2-GP
U3802
D
84.2N702.J31
1

1
APX_IN 1 5 2nd = 84.07002.I31 2VREF_APX+ 1 5
2 + 2 +

1
OCP_MAIN#_R - -
3 4 3rd = 84.2N702.W31 3 4 ADC_VREF 27

S
C3802
1

1
R3805 SCD1U16V2ZY-2GP

2
APX321SEG-7-GP R3808 27 OCP_PW M_OUT APX321SEG-7-GP

1
200KR2F-L-GP 74.00321.J1F 74.00321.J1F
2

R3807 2KR2J-1-GP
R3806 2ND = 74.00321.G1F 2ND = 74.00321.G1F
2

2
1MR2F-L-GP

OCP_MAIN#_APX_R
118KR2F-1-GP

ADC_VREF_R R3815 1 2 100KR2F-L1-GP

2
1

1
39 OCP_MAIN#
84.00084.F31 BAV70T-GP R3816
200KR2F-L-GP
2nd = 84.BSS84.B31 R3810
2

2
Q3802 100R2J-2-GP
R3811 BSS84-7-F-GP 3 1 2 OCP_A_IN 27
100R2J-2-GP
1 2LIMIT_SIGNAL_100R S D LIMIT_SIGNAL_D 1 3D3V_AUX_S5
82,97 LIMIT_SIGNAL

K
83.4R703.03H D3802
BZT52H-C4V7-GP AD+
D3801
G

83.BAV70.R11 2nd = 83.4R703.D3H

B
C R3826 C

1
2ND = 83.BAV70.H11 R3822 LIMIT_SIGNAL_100R LIMIT_SIGNAL_E E
1 2 C
VBIAS 220KR2J-L2-GP Q3804
CH3906GP-GP-U
ILIM 40 8K06R2F-GP

1
84.C3906.A11

C
R3813

2
VBIAS R3829 1ST = 84.T3906.A11
V_3.9K_R B Q3803 8K66R2F-GP
40 V_3.9K 1 2
PMBS3904-3-GP
2ND = 84.C3906.A11

1
100KR2J-1-GP 20120312MV

2
E
1

1
R3814
3K9R2J-1-GP C3803 R3823
SC3900P50V2KX-2GP
84.S3904.011 130KR2F-GP
2nd = 84.03904.X11

2
ADP_A_ID 27

1
AD+
R3832
For Layout: 45K3R2F-L-GP
C3808 Close to DCIN1
1

2
R3802 R3801,C3809 Close to U2701
49K9R2F-L-GP
AD+_RC 2

R3833
1 2 VOLTAGE_ADC 27
576KR2F-GP
B B
1

C3808 C3809
SC100P50V2JN-3GP

SCD22U10V2KX-1GP

R3801
49K9R2F-L-GP
2

2
2

R3820

40 ICS 1 2 CURRENT_ADC 27
46K4R2F-2-GP

1
C3805 C3804

1
SC100P50V2JN-3GP

SCD22U10V2KX-1GP

2
2
3D3V_AUX_S5 AD+_IN_G
1

R3818 R3817
22KR2J-GP 200KR2F-L-GP 2VREF

LMV331SQ3T2G-GP
R3825
2

27,34 ADP_PRES 4 3 U3804_6 2 1


OUTPUT -IN
GND 2
5 1 U3804_5
A 5V_AUX_S5 VCC +IN 22KR2J-GP <Core Design>
A
1
1

U3804 R3821
C3807 74.00331.F2F R3824 41K2R2F-GP C3806 Wistron Corporation
SCD1U16V2ZY-2GP 255KR2F-GP SCD1U16V2ZY-2GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2nd = 74.00331.A2F
2

Taipei Hsien 221, Taiwan, R.O.C.


2
2

Title

ADP OCP
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 38 of 103
5 4 3 2 1

Battery Connector

D D

3D3V_AUX_S5

2
R3901 R3902 R3903

1
C3901 C3902

SC100P50V2JN-3GP

SC100P50V2JN-3GP
2K2R2J-2-GP

2K2R2J-2-GP

100KR2J-1-GP
BT+ 1 AFTP3901 AFTE14P-GP

2
BT+ 1 AFTP3902 AFTE14P-GP

1
AB1A_DATA_R 1 AFTP3903 AFTE14P-GP
BT+ AB1A_CLK_R 1 AFTP3904 AFTE14P-GP
BAT1 MAIN_BAT_DET#_C 1 AFTP3905 AFTE14P-GP
OCP_MAIN#_C 1 AFTP3906 AFTE14P-GP
NP2 GND 1 AFTP3907 AFTE14P-GP
6 GND 1 AFTP3908 AFTE14P-GP
2 3 RN3901 AB1A_DATA_R 5
27,97 AB1A_DATA
1 4 SRN100J-3-GP AB1A_CLK_R 4
27,97 AB1A_CLK
OCP_MAIN#_C 3
1 2 MAIN_BAT_DET#_C 2
27,97 MAIN_BAT_DET#
R3904 1KR2J-1-GP 1
97 MAIN_BAT_DET#_C NP1

1
C3903
C SC100P50V2JN-3GP C3904 C
SCD1U25V3KX-GP ALP-CON6-4-GP

2
20.81683.006
2nd = 20.81673.006

2
3D3V_AUX_S5
3D3V_AUX_S5 R3905
3D3V_AUX_S5 100R2J-2-GP

D392

1
2
D3901 D3903
2 3
1 6 AB1A_DATA_R OCP_MAIN# 38
3 MAIN_BAT_DET#_C 1

2 5 1 BAV99H-75V-GP

BAV99H-75V-GP 1ST = 83.00099.M11 20120210PV-R


AB1A_CLK_R 3 4 1ST = 83.00099.M11 20120210PV-R 2ND = 83.BAV99.H11
2ND = 83.BAV99.H11 3RD = 83.00099.P11
BAV99S-GP 3RD = 83.00099.P11
B
83.00099.AAE B
2ND = 83.BAV99.AAE

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

BATT CONN
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 39 of 103
5 4 3 2 1
5 4 3 2 1

BQ24736 for CHARGER


PU4003
TPCC8131-GP
1 S D 8
AD+ AD+_IN_G 2 S D 7
97 DC_IN_R
D 3 S D 6 D
D 5
G
PU4001 DCBATOUT

4
TPCC8131-GP PU4002 PR4001
1 S D 8 1 S D 8 D01R3721F-GP-U 84.08131.037
2 S D 7 2 S D 7 DC_IN_R 1 2 2nd = 84.07403.037
3 S D 6 3 S D 6
D 5 D 5

2
G G

2
TPCC8065-H-GP PG4001 PG4002 DY
4

4
1

84.08065.B37 GAP-CLOSE-PW R-3-GP PC4005 PC4007

1
PC4001 PR4003 84.08131.037 2nd = 84.07518.037 GAP-CLOSE-PW R-3-GP PR4002

1
1

200KR2J-L1-GP 2nd = 84.07403.037 10KR2J-3-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
1
SCD1U25V3KX-GP

BQ24726_ACP BQ24726_ACN

1 P2_G

1
A
PR4004 PC4019 +VBAT_DEBUG
DY
2

1
SCD1U25V2KX-GP
20120131PVR PD4001 PC4002 PC4003 PC4004
CH035H-40PT0-GP 1 2

4K02R2F-GP

SCD1U25V2KX-GP
VIN_G PR4005 SC1U25V3KX-1-GP

2
1st = 83.R3504.08F SCD1U25V2KX-GP

1
100KR2J-1-GP

4K02R2F-GP
2nd = 83.1R504.A8F PR4007

2
1

5
6
7
8
PR4006

BQ24726_AGND BQ24726_AGND 10R5J-GP

D
D
D
D
3rd = 83.2R004.08F PU4004 PU4005
PC4008 TPCC8065-H-GP

ACN
ACP

2
20 BQ24726_VCC 1 2 84.08065.B37
BQ24726_ACDRV VCC
4
2

ACDRV PR4008 SCD1U25V3KX-GP

G
4 2nd = 84.07518.037

S
S
S
ADP_EN_D BQ24726_CMSRC 3 17 BQ24726_BST
1 2BQ24726_BST_R
1 2
C CMSRC BTST 1R3J-L1-GP PC4009 C
2nd = 68.4R710.20R

3
2
1
BQ24726_ACDET SCD047U25V3KX-3-GP BT+
6 ACDET BQ24726_HG
68.4R71A.20H
18
D

HIDRV PL4001
PR4009
PQ4001 5 ACPRES BQ24726_PH BT_L
2N7002K-2-GP PHASE 19 1 2 1 2
84.2N702.J31 COIL-4D7UH-33-GP D02R3721F-GP-U

PC4011

PC4012
2nd = 84.07002.I31 27 CHARGER_CLK 9 15 BQ24726_LG
SCL LODRV

1
PC4010

5
6
7
8
3rd = 84.2N702.W31 8
G
S

27 CHARGER_DAT SDA

2
D
D
D
D

PG4004
PU4006

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
3
16 BQ24726_REGN TPCC8065-H-GP PG4003
PR4010 1 REGN
2V_3.9K_DLIM 11 DLIM
PD4002
ADP_EN 27 38 V_3.9K 10KR2J-3-GP BAT54CGP-GP

1
G
4

S
S
S
7 13 BQ24726_SRP 83.R2003.H81
38 ICS IOUT SRP GAP-CLOSE-PW R-3-GP
2nd = 83.00054.Q81

3
2
1
3rd = 83.BAT54.081 GAP-CLOSE-PW R-3-GP
38 ILIM 10 ILIM SRN 12 84.08065.B37
2nd = 84.07518.037

1
3D3V_AUX_S5 PR4011
27 ADP_DET
PC4014

BQ24726_SRN
3D3V_AUX_S5 1 2 21 AGND GND 14
47KR2J-2-GP SC1U10V3KX-3GP

2
5V_S0 AD+
1

PC4022 1PC4021 BQ24736RGRR-GP


1

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1 2 0R0402-PAD-1-GP
PR4013 PR4012
2

2
1

22KR2F-GP
B PR4014 PR4015 PR4016 0R2J-2-GP B
18K2R2F-L-GP 127KR2F-L-GP 1 2 BQ24726_SRP_R
2

2
PD4003
2

1 20111115PV PC4015
PR4017 20111117PV BQ24726_AGND PR4018 0R2J-2-GP SCD1U25V2KX-GP

1
3 1 2 1MR2F-L-GP 1 2 BQ24726_SRN_R
BQ24726_ACDET_L

2
BT+
BAS16-1-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
1

83.00016.B11 PN4001 3D3V_AUX_S5

PC4017
1

1
2nd = 83.00016.K11 PR4019 DY PC4018
20KR2F-L-GP PC4016 CHARGER_CLK 1 4
SC100P50V2JN-3GP CHARGER_DAT 2 3
2

PC4020
SNUBBER
D
2

PQ4002 Place close to PU4004

1
2N7002K-2-GP SRN10KJ-5-GP PD4004
1

B0530WS-7-F-GP
BQ24726_AGND
PR4020 84.2N702.J31 BQ24726_AGND BQ24726_PH 83.R5003.G8H

SC10U25V5KX-GP

2
10KR2F-2-GP BQ24726_AGND BQ24726_AGND
2nd = 84.07002.I31 2nd = 83.5R003.08F

A
2

3rd = 84.2N702.W31
G
S

R4001
4D7R3J-L1-GP
DCBATOUT
RF-DY
1

BQ24726_AGND CHG_RST 27
A <Core Design> A

BQ24726_AGND BQ24726_PH_R

Wistron Corporation
1

TC4001 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SE100U25VM-10GP EC4006 Taipei Hsien 221, Taiwan, R.O.C.
2

79.10112.3JL SC680P50V2KX-2GP
1

Title
RF-DY
Charger_BQ24736
For acoustics Test Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 40 of 103
5 4 3 2 1
5 4 3 2 1

5V_PW R 5V_S5
+VBAT_DEBUG PW R_3V_ENTIP PG4125
1SS355GP-GP RT8223_PW R GAP-CLOSE-PW R-3-GP
AD+ 1SS355GP-GP PD4102 83.00355.F1F 1 2 3D3V_AUX_S5
PD4101

1
PR4122 2nd = 83.00355.D1F 3D3V_AUX_S5 20120116PV-R

1
A K 1 2 +VBAT_DEBUG_R K A DCBATOUT PR4101 PG4140 PR4126
PC4106 100KR2F-L1-GP GAP-CLOSE-PW R-3-GP 2 1
83.00355.F1F 33R5J-2-GP SCD01U16V2KX-3GP 1 2 DY

1
2nd = 83.00355.D1F PR4123 DY 0R0402-PAD

2
1
DY PC4105 1 2 PG4141 PR4125

SCD1U25V3KX-GP

K
BT+ 1SS355GP-GP GAP-CLOSE-PW R-3-GP 0R2J-2-GP U4101
PD4103
0R0402-PAD-1-GP 1 2 20120116PV-R DY_DS3

2
A K PR4124 5 1

2
PD4104 PW R_5V_ENTIP PG4142 0R0402-PAD PR4121 VCC A KBC_PW R_ON 27
D
B 2 KBC_GPIO51 27 D
83.00355.F1F PDZ27B-3-GP GAP-CLOSE-PW R-3-GP PW R_5V3V_ENC 1 2 PW R_ENC_R 2 1 PW R_ENC_GATE 4 3

A
2nd = 83.00355.D1F 0R2J-2-GP Y GND
83.27R03.E3F 1 2

1
2nd = 83.27R03.D3F

1
PR4102 PG4136 PC4120 SNLVC1G32DCKR-LGP
DCBATOUT DCBATOUT_3V 110KR2F-GP PC4107 GAP-CLOSE-PW R-3-GP SCD1U10V2KX-4GP

2
PG4113 SCD01U16V2KX-3GP 1 2 PD4105
73.01G32.L03

2
GAP-CLOSE-PW R-3-GP DCBATOUT DCBATOUT_3V K 1SS355GP-GP
DY A

2
1 2 PG4116 PG4137 83.00355.F1F
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP DY 2nd = 83.00355.D1F
PG4114 1 2 1 2
GAP-CLOSE-PW R-3-GP 20120112 PV-R
1 2 PG4118 PG4138 20120116PV-R
GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP
PG4115 1 2 1 2
GAP-CLOSE-PW R-3-GP
1 2

DCBATOUT_3V
TPS51123 for 3V5V PG4139
GAP-CLOSE-PW R-3-GP
DCBATOUT DCBATOUT_5V
PG4102
GAP-CLOSE-PW R-3-GP
1 2
RT8223_PW R 1 2
DCBATOUT_5V
DY PG4103
GAP-CLOSE-PW R-3-GP
D 1 2
1

1
PC4104 PC4103 PC4108 PU4101
8
7
6
5

1
TPCC8067-H-GP PC4109 PC4110 PC4111 PC4102 PC4101 PG4105
SC10U25V5KX-GP

D
D
D
D

SCD1U25V3KX-GP GAP-CLOSE-PW R-3-GP


84.08067.A37
SCD1U25V3KX-GP
SC68P50V2JN-1GP
2

SCD1U25V3KX-GP
SC10U25V5KX-GP

SC10U25V5KX-GP
2nd = 84.07410.A37

SC2200P50V2KX-2GP
1 2

2
PU4102
D DY DY

5
6
7
8
C 20111128PV TPCC8067-H-GP PG4106 C
G

D
D
D
D
4 20111115PV 84.08067.A37 GAP-CLOSE-PW R-3-GP
G

2nd = 84.07410.A37

16
1 2
1 S
2 S
3 S

PU4103
PG4107
G

VIN
PC4113 GAP-CLOSE-PW R-3-GP

G
S 20120116PV-R 4

S
S
S
PC4112 PR4103 SCD1U25V3KX-GP 1 2
SCD1U25V3KX-GP 2D2R3J-2-GP PR4104
S

3
2
1
2 1PW R_3V_BOOT_R2 1PW R_3V_BOOT9 VBST2 VBST1 22 PW R_5V_BOOT1 2PW R_5V_BOOT1_R
1 2 PW R_5V_PH 36
3D3V_S5 PW R_3V_HG 10 21 PW R_5V_HG 0R0603-PAD-1-GP 5V_PW R
DRVH2 DRVH1
PL4101 1 2 PW R_3V_PH 11 20 PW R_5V_PH PL4102 1 2
IND-2D2UH-46-GP-U LL2 LL1 IND-2D2UH-46-GP-U
Iomax=5.5A
68.2R210.20B PW R_3V_LG 12 DRVL2 DRVL1 19 PW R_5V_LG 68.2R210.20B OCP>9A
1

2nd = 68.2R210.20PD PU4105


D 2nd = 68.2R210.20P
8
7
6
5

5
6
7
8

1
PC4119 TPCC8065-H-GP PC4121

D
D
D
D

ST220U6D3VDM-15GP
D
D
D
D

ST220U6D3VDM-15GP PW R_3V_VO PW R_5V_VO PU4106 PG4127


84.08065.B37 7 24 77.C2271.00L
2

VO2 VO1

1
77.C2271.00L PG4126 2nd = 84.07518.037 TPCC8065-H-GP

2
1

GAP-CLOSE-PWR-3-GP
2nd = 77.22271.27L PW R_3V_FB 5 2 PW R_5V_FB 84.08065.B37 2nd = 77.22271.27L
VFB2 VFB1
GAP-CLOSE-PWR-3-GP

G RT8223_PW R 1 PR4105 2
DY G 2nd = 84.07518.037
249KR2F-GP PR4111

G
4 4
G

2
S
S
S
DY
1 2PW R_5V3V_EN13 23 PW R_5V_PGD 1 2
1 S
2 S
3 S

RSMRST# 19,27,97
2

PR4106 100KR2F-L1-GP EN0 PGOOD 0R0402-PAD-1-GP


S S

3
2
1
PW R_3V_ENTIP6 1 PW R_5V_ENTIP
2VREF TRIP2 TRIP1
2VREF 3 15
VREF GND
1

PC4114 PW R_5V3V_TON 4 25
B TONSEL GND B
SCD22U10V2KX-1GP

1
2
1

84.07692.A37 PW R_5V3V_SKIP 14 18 PW R_5V3V_ENC PR4107 SNUBBER


SKIPSEL ENC
1

1
PR4109 0R2J-2-GP DY
PR4108 0R2J-2-GP FDMC7692 PR4110
DY
VREG3

VREG5

6K8R2F-2-GP Rdson=9.5~11.5mohm, 74.51123.073 30KR2F-GP

1 2
51125_FB1_R PW R_5V_PH
Idc=10.6A, Qg=10~20nc
1 2

51125_FB2_R PC4115
2

2
DY PC4116 TPS51123RGER-GP SC18P50V2JN-1-GPDY
8

17

SC18P50V2JN-1-GP

2
3D3V_AUX_S5 5V_AUX_S5
3D3V_AUX_S5_5_51123

PG4128
2

PG4129 R4102

1
5V_AUX_S5_51123

1 2 1 2 4D7R3J-L1-GP
1

20120116PV-R PR4113
PR4112 PR4114 GAP-CLOSE-PW R-3-GP GAP-CLOSE-PW R-3-GP 20KR2F-L-GP RF-DY

1
SNUBBER 10KR2F-2-GP 2VREF DY1 2 PR4120
0R2J-2-GP 2 1

2
AMB_TEMP_SD# 28 PW R_5V_PH_R
2

PW R_3V_PH PR4115 0R0402-PAD


3D3V_AUX_S5 1 2

2
1

0R0402-PAD20120116PV-R PC4117 PC4118 EC4106


PR4116 SC4D7U6D3V3KX-GP SC10U6D3V3MX-GP SC680P50V2KX-2GP

1
2

DY2 1
RF-DY
2

R4101 Close to VFB Pin (pin5) 0R2J-2-GP


4D7R3J-L1-GP Close to VFB Pin (pin2)
DY PR4117
RF-DY 2 1
2VREF Vout=2*(1+R1/R2)
1

A 0R2J-2-GP <Core Design> A

PW R_3V_PH_R PR4118
DY1 GND VREF VREG3 VREG5
3D3V_AUX_S5 2
0R2J-2-GP Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


EC4105 PR4119 Taipei Hsien 221, Taiwan, R.O.C.
SC680P50V2KX-2GP 2 1 SKIPSEL AUTOSKIP PWM 00A AUTOSKIP 00A AUTOSKIP
1

Title
RF-DY 0R0402-PAD 20120116PV-R
TPS51123RGER_5V/3D3V
TONSEL 200k/CH1 245k/CH1 300k/CH1 365k/CH1 Size Document Number Rev
250k/CH2 305k/CH2 375k/CH2 460k/CH2 A3 -1
2012 S-Series Richie 13.3
Date: Saturday, March 17, 2012 Sheet 41 of 103
5 4 3 2 1
5 4 3 2 1

SSID = CPU.Regulator
PWR_GFX_CSCOMPA 1 2 6132_DROOPA 1 2 PWR_GFX_CSREFA

PR4258 PC4235
1KR2F-L-GP SC1KP50V2JN-2GP

PUT COLSE
D PR4209 TO GT D

SC1KP50V2JN-2GP
1

1
75KR2F-GP Inductor PWR_GFX_TSENSEA

PC4204
PC4206 PC4205

1
PR4211 SCD1U25V2KX-GP SC270P50V2JN-2GP

2
24K9R2F-L-GP PR4210
NTC-220K-5-GP

2
2
1D05V_S0 1 2 PWR_VCORE_CSSUMA_L

1
R224

1
165KR2F-GP
6132_AGND6132_AGND PR4212 PR4213
8K25R2F-1-GP

130R2F-1-GP

54D9R2F-L1-GP
1

1
PR4204 PC4201 NTC-100K-11-GP

75R2F-2-GP

1
PR4201
10R2F-L-GP SC47P50V2JN-3GP PC4202

2
PR4202

PR4203
SC10P50V2JN-4GP 2 1 PR4208 PWR_GFX_SWN1 44

2
20120116PV-R 1 2 PWR_GFX_DIFFA_R
1 2 1 2 54K9R2F-L-GP
PR4239

2
0R0402-PAD PC4203

2
1 2 PWR_VCORE_SDIO PR4206 SC3300P50V2KX-1GP
7 H_CPU_SVIDDAT PWR_VCORE_ALERT#
1 2 PR4242 4K32R2F-GP
7 VR_SVID_ALERT# PWR_VCORE_SCLK
1 2 0R0402-PAD 1 2 1 2GFX_FBA_R
1 2
7 H_CPU_SVIDCLK PR4267
6132_AGND PUT COLSE
0R0402-PAD PR4205
TO V_GT

15K8R2F-GP
1KR2F-L-GP

PR4225
HOT SPOT

1
5V_S0
Route Parallel PC4211
PR4220 SC1KP50V2JN-2GP

2
0R0402-PAD

2
1 2 PWR_GFX_VSPA
8 VCCGT_SENSE

PWR_GFX_CSCOMPA
PC4210 PWR_GFX_CSREFA

PWR_GFX_CSSUMA

PWR_GFX_CSREFA
PWR_GFX_CSREFA 44

PWR_GFX_COMPA
20120116PV-R SC1KP50V2JN-2GP PC4213

PWR_GFX_IMONA
PWR_GFX_DIFFA

6132_DROOPA

1
PWR_GFX_ILIMA
SCD047U25V2KX-GP

PWR_GFX_FBA
2
1 2 PWR_GFX_VSNA
8 VSSGT_SENSE
PR4221
5V_S0

2
1

0R0402-PAD PWR_GFX_CSP1
D4202 D4203 1 2 PWR_GFX_CSP1 1 2 PWR_GFX_SWN1 44
PWR_GFX_TSENSEA 1 2 PC4207 6132_AGND
VARISTOR-5D5V-16-GP

VARISTOR-5D5V-16-GP

20120213 PV-R PG4201 SCD1U25V2KX-GP PR4232


69.80018.021 69.80018.021 GAP-CLOSE-PWR-3-GP 5K11R2F-L1-GP
6132_AGND

61

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46
2nd = 69.80024.061 2nd = 69.80024.061 PWR_6132_PWMA 44
2

C EMI EMI PU4201 C


5V_S0 1 2 PWR_GFX_TSENSEA

VSNA

VSPA

DIFFA

TRBSTA#

FBA

COMPA

IOUTA

ILIMA

DROOPA

CSCOMPA

CSSUMA

CSREFA

CSP2A

CSP1A

TSNSA
GND
1 2

2
PR4223
2R2J-2-GP PR4228 EC4201
1 2 PWR_VCORE_VCC 1 45 26K1R2F-2-GP DY SC1U10V3ZY-6GP
6132_AGND

1
VCC PWMA
PC4230 2 44 PWR_GFX_TSENSEA_C

2
SC2D2U10V3KX-1GP VDDBP BSTA
3 43 EC4202
37 VCC_GFXCORE_PG VRDYA HGA
DY SC1U10V3ZY-6GP

1
1 2 PWR_VCORE_EN 4 42
5,27,37,50,96 PWR_GOOD EN SWA
PR4224 PR4230
0R0402-PAD PWR_VCORE_SDIO 5 41 2R3J-2-GP
SDIO LGA
20120116PV-R reserve PAD for ESD
PWR_VCORE_ALERT# 6 40 PWR_VCORE_BST2 1 2 PWR_VCORE_BST2_R 1 2
ALERT# BST2
1 2PWR_VCORE_VR_HOT# PR4236 PWR_VCORE_SCLK 7 39 PWR_VCORE_HG2 43 PC4215
5 H_PROCHOT# PR4217 10KR2F-2-GP SCLK HG2 SCD22U25V3KX-GP
0R0402-PAD-1-GP 6132_AGND 1 2 PWR_VCORE_BOOT 8
VBOOT
NCP6132BMNR2G-GP SW2
38 PWR_VCORE_SW2 43
PC4209 1 2 PWR_VCORE_ROSC 9 37 PC4218
6132_AGND PWR_VCORE_LG2 43
1

SC47P50V2JN-3GP R4237 ROSC LG2 SC2D2U10V3KX-1GP


PWR_VCCCORE1_DCBATOUT 1 2 80K6R2F-GP PWR_VCORE_VRMP 10 36 1 2
VRMP PVCC
2

PR4238 PWR_VCORE_VR_HOT#11 35 PWR_VCORE_TSENSE


1KR2F-L-GP VRHOT# PGND 5V_S0
PR4215 6132_AGND PC4216 PWR_VCORE_VR_RDY 12 34 PWR_VCORE_LG1 43
2

10KR2F-2-GP SCD01U50V2KX-1GP VRDY LG1


1 2 PWR_VCORE_VSN 13 33
3D3V_S0 VSN SW1 PWR_VCORE_SW1 43
6132_AGND PWR_VCORE_VSP 14 32 PWR_VCORE_HG1 43

1
PWR_VCORE_VR_RDY VSP HG1
1 2

1
19 VGATE PWR_VCORE_DIFF PWR_VCORE_BST1
PR4268 15 31 1 2PWR_VCORE_BST1_R 1 2 PR4246
0R0402-PAD-1-GP DIFF BST1 PR4245 NTC-100K-11-GP

CSCOMP
TRBST#

DROOP

CSSUM
PR4244 PC4219 8K25R2F-1-GP

DRVEN
74.06132.E73

CSREF
COMP

TSNS
CSP3

CSP2

CSP1

PWM
2R3J-2-GP SCD22U25V3KX-GP
IOUT
Route Parallel 20120116PV-R

ILIM
FB

2
PR4240 PWR_VCORE_TSENSE

2
0R0402-PAD
16

17

18

19

20

21

22

23

24

25

26

27

28

29

30
1 2
B 7 VSSSENSE B
1

2
PR4243
PWR_VCORE_COMP

PWR_VCORE_IMON

PWR_VCORE_ILIM

PR4241 PC4217 PWM_R EC4203


DY
6132_DROOP

1 2
0R0402-PAD SC1KP50V2JN-2GP 41K2R2F-GP SC1U10V3ZY-6GP
2

1
1 2 PWR_VCORE_TRBST# PUT COLSE
7 VCCSENSE PWR_VCORE_TSENSE_C
TO VCORE
PWR_6132_DRVEN 44
1

2
HOT SPOT
D4204 D4205 PWR_VCORE_FB EC4204
PWR_VCORE_TSENSE
DY
69.80018.021 1 2 PC4220 6132_AGND SC1U10V3ZY-6GP
VARISTOR-5D5V-16-GP

VARISTOR-5D5V-16-GP

1
12K4R2F-GP

PWR_VCORE_CSCOMP

69.80018.021 2nd = 69.80024.061 SCD1U25V2KX-GP


PWR_VCORE_CSSUM
1
PR4254

2nd = 69.80024.061 1 2 1 2 PWR_VCORE_CSP1


2

EMI EMI PR4247 PC4221 PR4249 PC4224 PWR_VCORE_CSP2


10R2F-L-GP SC680P50V2KX-2GP 1KR2F-L-GP SC10P50V2JN-4GP reserve PAD for ESD
1 2VCORE_FB_L
1 2 1 2VCORE_FB_R
1 2 5V_S0
2

1 2VCORE_TRBST#_U
1 2 PR4207
PR4250 PC4223 5K1R2F-2-GP PC4225 PWR_VCORE_CSREF
PWR_VCORE_CSREF 43
49D9R2F-GP SC470P50V2KX-3GP SC1500P50V2KX-2GP PR4235
1

20111114PV 5K11R2F-L1-GP
PWR_VCORE_TRBST# 1 2PWR_VCORE_TRBST#_R 1 2 PC4227 PWR_VCORE_CSP2 1 2
SC1KP50V2JN-2GP PWR_VCORE_SWN2 43
PR4237
2

1
PR4251 10KR2F-2-GP
1K21R2F-2-GP PC4231
1

6132_AGND SCD047U25V2KX-GP

2
PC4222 PC4228 PR4261 PWR_VCORE_CSREF
SC4700P50V2KX-1GP 1 2 SC1KP50V2JN-2GP 1 2 127KR3F-GP
2

PWR_VCORE_SWN1 43
PR4248
6132_AGND PC4208 PR4262 5K11R2F-L1-GP
1 2 SC330P50V2JC-2-GP 1 2 127KR3F-GP PWR_VCORE_CSP1 1 2
PWR_VCORE_SWN2 43 PWR_VCORE_SWN1 43
1

1
1

PR4214 PC4232
24K9R2F-L-GP PC4226 1 2 1 2 SCD047U25V2KX-GP

2
SCD1U25V2KX-GP PWR_VCORE_CSREF
2

VCORE_CSSUM_L

PR4255 PR4257
2

75KR2F-GP 165KR2F-GP

1 2 PUT COLSE
6132_AGND 6132_AGND
A PR4256 TO VCORE A
NTC-220K-5-GP Phase 1
Inductor

<Core Design>

PWR_VCORE_CSCOMP 6132_DROOP PWR_VCORE_CSREF


Wistron Corporation
1 2 1 2 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
PR4252 Taipei Hsien 221, Taiwan, R.O.C.
820R2F-GP PC4234
SC1KP50V2JN-2GP Title

ISL95832_IMVP7-1/3
Size Document Number Rev
A2 -1
2012 S-Series Richie 13.3
Date: Wednesday, March 14, 2012 Sheet 42 of 103
5 4 3 2 1
5 4 3 2 1

DCBATOUT PW R_VCCCORE2_DCBATOUT

PG4307
GAP-CLOSE-PW R-3-GP
1 2

PG4308
GAP-CLOSE-PW R-3-GP
1 2

D PG4309 D
GAP-CLOSE-PW R-3-GP
1 2

PG4310
GAP-CLOSE-PW R-3-GP
1 2

PG4311 PW R_VCCCORE2_DCBATOUT
GAP-CLOSE-PW R-3-GP
1 2

PG4312
GAP-CLOSE-PW R-3-GP
1 2

1
PC4306 PC4307 PC4308 PC4309

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
DCBATOUT PW R_VCCCORE1_DCBATOUT

2
5
6
7
8
D
D
D
D
PG4301 PU4303
GAP-CLOSE-PW R-3-GP FDMS7698-GP
1 2 84.07698.037
PG4302
2nd = 84.06414.037

G
4

S
S
S
GAP-CLOSE-PW R-3-GP
1 2 Vcc_core

3
2
1
PG4303 Iccmax=53A
C GAP-CLOSE-PW R-3-GP C
1 2 Itdc=36A
PL4302
PG4304
GAP-CLOSE-PW R-3-GP
OCP>65A SNUBBER VCC_CORE
42 PW R_VCORE_HG2
1 2 42 PW R_VCORE_SW 2 1 2
42 PW R_VCORE_LG2
PG4305 IND-D24UH-1-GP
GAP-CLOSE-PW R-3-GP 68.R2410.201

1
1 2 2nd = 68.R2610.101 PT4304 PT4305

2
PG4306 R4302

2
GAP-CLOSE-PW R-3-GP 4D7R3J-L1-GP PG4315 PG4316 ST470UF2VDM-GP ST470UF2VDM-GP

5
6
7
8
1 2 PU4304 1st = 79.47719.2BL 1st = 79.47719.2BL
FDMS0302S-GP RF-DY 2nd = 77.24771.13L2nd = 77.24771.13L

D
D
D
D

GAP-CLOSE-PWR

GAP-CLOSE-PWR
1

1
84.00302.037 3rd = 79.47719.2BL3rd = 79.47719.2BL
PW R_VCCCORE1_DCBATOUT 2nd = 84.06512.037
4 PW R_VCORE_SW 2_R

G
DY
1

S
S
S

2
PT4307 PW R_VCORE_CSREF_R_2

3
2
1
ST15U25VDM-5-GP EC4311
2

SC680P50V2KX-2GP

1
1

2
77.C1561.03L PC4301 PC4302 PC4303 PC4304
2nd = 77.21561.00L RF-DY 42 PWR_VCORE_SWN2 PR4272
SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

10R2F-L-GP
2

1
5
6
7
8
D
D
D
D

B PU4301 B
FDMS7698-GP
84.07698.037 42 PWR_VCORE_CSREF
2nd = 84.06414.037
G

4
S
S
S
3
2
1

PL4301 VCC_CORE
SNUBBER
42 PW R_VCORE_HG1
42 PW R_VCORE_SW 1 1 2
42 PW R_VCORE_LG1
IND-D24UH-1-GP
68.R2410.201
1

2nd = 68.R2610.101 PT4301 1 PT4303


2

ST470UF2VDM-GP ST470UF2VDM-GP
5
6
7
8

PU4302 R4301
2

FDMS0302S-GP PG4313 PG4314 1st = 79.47719.2BL 1st = 79.47719.2BL


D
D
D
D

4D7R3J-L1-GP
84.00302.037 2nd = 77.24771.13L 2nd = 77.24771.13L
2nd = 84.06512.037 RF-DY 3rd = 79.47719.2BL 3rd = 79.47719.2BL
GAP-CLOSE-PWR

GAP-CLOSE-PWR
1

4
G

S
S
S

PW R_VCORE_SW 1_R
3
2
1

PW R_VCORE_CSREF_R
2

EC4302
2

A SC680P50V2KX-2GP <Core Design> A


1

RF-DY 42 PWR_VCORE_SWN1 PR4271


10R2F-L-GP
Wistron Corporation
1

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
42 PWR_VCORE_CSREF
ISL95832_IMVP7-2/3
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 43 of 103
5 4 3 2 1
5 4 3 2 1

PW R_GFXCORE1_DCBATOUT

1
PC4401 PC4402 PC4403 PC4404
1st = 84.03660.037

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
2nd = 84.00038.A37

2
D 20120201PV-R 3rd = 84.03660.037 D

DCBATOUT PW R_GFXCORE1_DCBATOUT

PG4402
GAP-CLOSE-PW R-3-GP PU4401
1 2 2
3
PG4403 1 4
GAP-CLOSE-PW R-3-GP 10 VCC_GFXCORE
1 2 9
7 Iccmax=33A
PG4404 8 6
GAP-CLOSE-PW R-3-GP 1 2 AXG_NC5911_BST_1_L 1 2 5 Itdc=21.5A
1 2

PG4405
PR4402
2R3J-2-GP
PC4407
SCD22U25V3KX-GP
OCP>40A
GAP-CLOSE-PW R-3-GP FDMS3600-02-RJK0215-COLAY-GP
1 2
PU4404
DUAL-MOS VCC_GFXCORE
PL4401
PG4406
GAP-CLOSE-PW R-3-GP AXG_NC5911_BST_11 8 PW R_GFX_HG1 SNUBBER
BST DRVH PW R_GFX_SW 1
1 2 42 PWR_6132_PWMA 2 PWM SW 7 1 2
42 PWR_6132_DRVEN 2 1PW R_6132_DRVEN_R 3 EN GND 6

FLAG
PG4407 4 5 PW R_GFX_LG1 IND-D24UH-1-GP
GAP-CLOSE-PW R-3-GP
5V_S5 PR4401 VCC DRVL
2K2R2J-2-GP
68.R2410.201
1 2

1
2nd = 68.R2610.101 PT4401 PT4402

9
PG4408 PC4408 NCP5911MNTBG-GP-U R4401 ST470UF2VDM-GP ST470UF2VDM-GP

2
SC1U6D3V2KX-GP
C GAP-CLOSE-PW R-3-GP 74.05911.073 4D7R3J-L1-GP C

2
1 2 PG4410 PG4411 1st = 79.47719.2BL 1st = 79.47719.2BL
RF-DY 2nd = 77.24771.13L 2nd = 77.24771.13L

1
3rd = 79.47719.2BL 3rd = 79.47719.2BL

GAP-CLOSE-PWR

GAP-CLOSE-PWR
1

1
PW R_GFX_SW 1_R
DY
1

2
PT4405
ST15U25VDM-5-GP EC4402 PW R_GFX_CSREFA_R
2

SC680P50V2KX-2GP

1
77.C1561.03L RF-DY
2nd = 77.21561.00L

2
PR4226
10R2F-L-GP

1
42 PWR_GFX_SWN1

42 PWR_GFX_CSREFA

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95832_IMVP7-3/3
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: Monday, March 19, 2012 Sheet 44 of 103
5 4 3 2 1
5 4 3 2 1

DCBATOUT DCBATOUT_RT8209B_VCCP
PG4501 +VCCP_PW R 1D05V_S0
GAP-CLOSE-PW R-3-GP
1 2
PG4506
PG4502 GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP 1 2
1 2
PG4507
PG4503 GAP-CLOSE-PW R-3-GP
D GAP-CLOSE-PW R-3-GP 1 2 D
PR4501 1 2
8,19,27,29,34,35,36,37,46,47,48,92,93 PM_SLP_S3# 1 2 20KR2F-L-GP VCCP_RUN_ON PG4508
PG4504 GAP-CLOSE-PW R-3-GP
GAP-CLOSE-PW R-3-GP 1 2
1 2 DCBATOUT_RT8209B_VCCP

1
PG4509
PC4501 PG4505 GAP-CLOSE-PW R-3-GP
SCD1U10V2KX-4GP GAP-CLOSE-PW R-3-GP 1 2

2
PR4502 1 2

1
1 2 PC4502 PC4503 PG4510
GAP-CLOSE-PW R-3-GP

TPS51219_MODE
1KR2F-3-GP
D 1 2

SC10U25V5KX-GP

SC10U25V5KX-GP
2

2
5
6
7
8
D
D
D
D
DY PU4501 DY PG4511
1 2 FDMC8884-GP-U GAP-CLOSE-PW R-3-GP
3D3V_S0
PR4503 10KR2J-3-GP
Iomax=13A
84.08884.A37 1 2

VCCP_PG
PR4504
PC4504
2nd = 84.00412.037 OCP>20A PG4512
37 VCCP_PG

G
S
S
S
TPS51219_VCCP_VBST
1 2RT8209B_VCCP_LL_1
1 2 GAP-CLOSE-PW R-3-GP
G S 1 2

4
3
2
1
2D2R3J-2-GP SCD1U25V3KX-GP
PG4513

17
16
15
14
13
3D3V_S5 PU4502 GAP-CLOSE-PW R-3-GP
1 2

GND
PGOOD

EN
MODE

BST
TPS51219_VREF SNUBBER +VCCP_PW R
PL4501
PG4514
SCD1U10V2KX-5GP
1

1 12 TPS51219_VCCP_LL 1 2 GAP-CLOSE-PW R-3-GP


VREF SW
1

PR4519 DY PR4505 2 11 TPS51219_VCCP_DRVH COIL-D68UH-5-GP 1 2


C 10KR2J-3-GP PC4505 8K25R2F-1-GP REFIN DH TPS51219_VCCP_DRVL C
3 GSNS DL 10 68.R6810.20B
2

PG4515
4 9 D 2nd = 68.R681A.10A
2

VSNS V5

5
6
7
8
PR4507 5V_S5 GAP-CLOSE-PW R-3-GP

TPS51219_VSNS
2

COMP

2
D
D
D
D
PGND
DY0R2J-2-GP PU4503 1 2

TRIP
GND

1
R4501
8 H_SNB_IVB#_PW RCTRL

FDMC7672S-GP
PR4508 4D7R3J-L1-GP PT4501 PT4503 PG4516
1
1

TPS51219RTER-GP 3D3R2F-GP SE330U2D5VDM-1GP SE330U2D5VDM-1GP


GAP-CLOSE-PW R-3-GP
RF-DY

5
6
7
8

2
1

PR4506 84.07672.B37 1 2

1
G
S
S
S
DY DY PC4506 2nd = 84.00402.037
10K5R2F-GP SC2200P50V2KX-2GP PC4507 PG4517
G S

1TPS51219_VCCP_TRIP
2

1 2

4
3
2
1
1 2TPS51219_COMP RT8209B_VCCP_V5FILT TPS51219_VCCP_LL_R GAP-CLOSE-PW R-3-GP
2

TPS51219_GSNS PC4508 1st = 77.23371.13L 1st = 77.23371.13L 1 2


SCD01U16V2KX-L1-GP SC1U10V2KX-1GP 2nd = 79.33719.L01 2nd = 79.33719.L01

2
3rd = 77.23371.13L 3rd = 77.23371.13L PG4518

2
EC4502 GAP-CLOSE-PW R-3-GP
SC680P50V2KX-2GP 1 2

1
RF-DY PG4519
TPS51219_REFIN Voltage GAP-CLOSE-PW R-3-GP
PC4510 1 2
1

DY PR4510
1

1 1.05V 95K3R2F-GP PG4520


SC1U10V2KX-1GP

PR4509 PC4509 GAP-CLOSE-PW R-3-GP


2

1 2
10R2F-L-GP

SC1KP50V2KX-1GP

0 1.0V
2

PG4521
2

GAP-CLOSE-PW R-3-GP
1 2
B PG4522 B
Route Parallel GAP-CLOSE-PW R-3-GP
1 2
PR4511 0R0402-PAD-1-GP
TPS51219_VSNS_R 1 2 VTT_SENSE 7
1 2 VSSP_SENSE 7
PR4512 0R0402-PAD-1-GP

Differential Sense feedback


Resistor need close to controller

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51218_1D05V / 1D0V
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 45 of 103
5 4 3 2 1
5 4 3 2 1

PR4610
1 2
DEEP S3 0R0402-PAD
PM_SLP_S4#_KBC 27

20120116PV-R

PD4601

19,62,97 PM_SLP_S4# 1 DY_DS3 PR4611


D 3 1 2 PW R_1D5V_EN D
PR4607
1 2 KBC_DDR_RST#_R 2 0R2J-2-GP
5,27 KBC_DDR_RST#

1
0R2J-2-GP
DY_DS3 PR4612 C4601
BAT54CGP-GP DY_DS3 DY SCD1U10V2KX-5GP
20KR2J-L2-GP

2
83.R2003.H81 DCBATOUT_1D5V
2nd = 83.R2003.Q81

2
3rd = 83.BAT54.081
5V_S5 DY
PC4602 PC4603

1
SC10U25V5KX-GP

SC10U25V5KX-GP
5
6
7
8
D
D
D
D
PU4601

SC1U10V3KX-3GP

2
FDMC8884-GP-U
1
DCBATOUT PG4601 DCBATOUT_1D5V

PC4601
GAP-CLOSE-PW R-3-GP
1 2

G
S
S
S
PG4602 PU4602
1D5V_PWR

4
3
2
1
GAP-CLOSE-PW R-3-GP 20 12 PC4604 84.08884.A37
PGOOD V5IN
1 2
PW R_0D75V_EN PR4602
SCD1U25V3KX-GP 2nd = 84.00412.037 Iomax=13A
17 VTTEN
PG4603
VBST 15 PW R_1D5V_VBST 1 2 VBST_R 1 2 OCP>19A
GAP-CLOSE-PW R-3-GP PWR_1D5V_EN 16 2D2R3J-2-GP
EN/PSV
1 2
PW R_1D5V_VREF6 14 PW R_1D5V_DRVH
VREF DRVH
1

C PG4604 SNUBBER 68.R8210.10V 1D5V_S3 C


GAP-CLOSE-PW R-3-GP PR4603 PL4601 2nd = 68.R8210.10Z
1 2 R1 9K31R2F-GP 13 PW R_1D5V_SW 1 2
SW
PG4605 COIL-D82UH-2-GP
2

1
GAP-CLOSE-PW R-3-GP PW R_1D5V_REFIN 8 11 TPS51216_DRVL PC4605
REFIN DRVL

SCD1U10V2KX-5GP
1 2 DY PT4601
SCD1U10V2MX-3GP

1
10 PU4603 SE330U2D5VDM-1GP

2
1PR4604

PGND

5
6
7
8
PW R_1D5V_MODE 19 R4601 PG4619 1st = 77.23371.13L
SCD01U16V2KX-3GP

MODE
1

D
D
D
D
54K9R2F-L-GP

FDMC7672S-GP

GAP-CLOSE-PWR-3-GP
PC4606

4D7R3J-L1-GP 2nd = 79.33719.L01


200KR2F-L-GP
1

3rd = 77.23371.13L
RF-DY

2
1

PW R_1D5V_TRIP PW R_1D5V_VDDQS
PC4607

PR4605

18 9
2

1
TRIP VDDQS
R2
82K5R2F-GP
2

DDR_VREF_S3 2 PW R_1D5V_SW _R
VTTIN 0D75V_PW R

G
S
S
S
5 VTTREF
78.10413.5FL 3 84.07672.B37

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
SCD1U10V2KX-4GP

PWR_1D5V_VDDQS
2

4
3
2
1
VTT

2
2nd = 84.00402.037
1

1
PC4608 EC4602

PC4609

PC4610

PC4611
1 DY
PR46062

SCD22U10V2KX-1GP VTTS
21 GND SC680P50V2KX-2GP

1
4
RF-DY
2

2
VTTGND
7 GND Close to output
TPS51216RUKR-GP
Cap pin1
1D5V_S3

78.10610.5BL78.10610.5BL

1
B
PC4612 Vout=1.8*(R2/(R1+R2)) B
3D3V_S0 SC1U6D3V2KX-GP

2
78.10520.5FL
1

PR4601
10KR2F-2-GP
0D75V_PW R 0D75V_S0
2

PG4620
D4601 CH751H-40-1-GP GAP-CLOSE-PW R-3-GP
K A PW R_0D75V_EN 1 2
0D75V_PWR
8,19,27,29,34,35,36,37,45,47,48,92,93 PM_SLP_S3#
PG4621
Iomax=1A
83.R0304.D8F
2ND = 83.R2004.C8F GAP-CLOSE-PW R-3-GP
2

3RD = 83.1PS76.01F 1 2
20120201PV-R PC4613
SCD47U10V2KX-GP
1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

UP1561_1D5V&0D75V
Size Document Number Rev
A3

W ednesday, March 14, 2012


2012 S-Series Richie 13.3 -1
Date: Sheet 46 of 103
5 4 3 2 1
5 4 3 2 1

RT8068A for 1D8V_S0

3D3V_S5

PG4702
GAP-CLOSE-PW R-3-GP
1 2 20111124PV
1D8V_S0
D
PG4706 PU4701
Iomax=2.811A D

GAP-CLOSE-PW R-3-GP
PW R_1D8V_PVDD
1D8V_PW R OCP>3.2A PG4701
1 2 10 PVIN LX#1 1
PL4701 GAP-CLOSE-PW R-3-GP
PG4707 1 2 9 2 PW R_1D8V_PHASE 1 2 1 2
GAP-CLOSE-PW R-3-GP PR4701 PVIN LX#2 COIL-2D2UH-26-GP

1
1 2 2D2R2F-GP PW R_1D8V_SVIN 8 3 68.2R210.20W PG4703
SVIN LX#3

1
PC4703 2nd = 68.2R21C.10R GAP-CLOSE-PW R-3-GP

1
PC4701 PC4702 SC1U6D3V2KX-GP 7 PR4703 PC4705 PC4706 PC4707 1 2

2
NC#7

1
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22P50V2JN-4GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
PW R_1D8V_S0_EN 5 102KR2F-GP
2 EN
6 R1 PG4704

2
FB GAP-CLOSE-PW R-3-GP
37 V1.8S_PG 4

2
PGOOD
GND 11 1 2

RT8068AZQW ID-GP-U PW R_1D8V_FB PG4705


74.08068.A43 GAP-CLOSE-PW R-3-GP
1 2
2nd = 74.05671.043

1
8,19,27,29,34,35,36,37,45,46,48,92,93 PM_SLP_S3# 1 2
PR4702 0R2J-2-GP PR4704
51KR2F-L-GP R2
Vo=0.6*(1+(R1/R2))

2
1
PC4704
SC22P50V2GN-GP

2
DY
C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

1D8V_S0
Size Document Number Rev
A3
2012 S-Series Richie 13.3 -1
Date: W ednesday, March 14, 2012 Sheet 47 of 103
5 4 3 2 1
5 4 3 2 1

D
TPS51461 for VCCSA D

5V_S5
VID0 VID1 VCCSA

L L 0.9V

1
PR4806 PC4814 VCCSA_PG 37 L H 0.8V
1R2F-GP SC1U10V2KX-1GP
20120130PV-R

2
PR4812 1 DY 2 1KR2F-3-GP 20120112 PV-R H L 0.725V

2
PW R_VCCSA_VID1 PR4804 2 1 0R0402-PAD VCCSA_SEL 8
H H 0.675V

1
PC4816 PW R_VCCSA_VID0 PR4805 2 1 0R0402-PAD H_FC_C22 8
SC2D2U10V3KX-1GP 20120116PV-R
1 2

2
PC4808 SCD033U16V2KX-GP 20120130PV-R
PW R_VCCSA_EN +VCCSA VCCSA
2 1
PR4801
DY PM_SLP_S3# 8,19,27,29,34,35,36,37,45,46,47,92,93
10KR2F-2-GP

1
PC4804 PG4803
PWR_VCCSA_V5DRV SC1U6D3V2KX-GP GAP-CLOSE-PW R-3-GP
1 2

2
PG4804

18
17
16
15
14
13
PU4801 GAP-CLOSE-PW R-3-GP
C 1 2 C

VID1
VID0
PGOOD

EN
V5DRV
V5FILT
20120116PV-R
SCD1U25V3KX-GP PG4805
19 PR4807 PC4805 Design Current =6 A GAP-CLOSE-PW R-3-GP
5V_S5 PG4801 PGND PW R_VCCSA_BST 1
20 12 2 PW R_VCCSA_BST_R 1 2 1 2
GAP-CLOSE-PW R-3-GP 21
PGND BST
11 0R0603-PAD-1-GP 6.6A<OCP< 7.8A
PW R_VCCSA_VIN PGND SW#11 PG4806
1 2 22 VIN SW#10 10
23 9 +VCCSA GAP-CLOSE-PW R-3-GP
PG4802 VIN SW#9 PL4801
24 VIN SW#8 8 1 2
1

GAP-CLOSE-PW R-3-GP PC4803 PC4813 PC4815 25 7 PW R_VCCSA_SW 1 2


GND SW#7 COIL-D47UH-9-GP PG4807
1 2

COMP

MODE
SLEW
SC10U10V5KX-2GP

SC10U10V5KX-2GP

VOUT
+VCCSA
SCD1U25V3KX-GP

VREF
68.R4710.20G GAP-CLOSE-PW R-3-GP

GND
2

PG4809 74.51461.043 2nd = 68.R471A.10S PC4807 PC4801 1 2

1
GAP-CLOSE-PW R-3-GP DY PC4809 PC4810
1 2 TPS51461RGER-GP PR4811 PG4808
1
2
3
4
5
6

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP
100R2F-L1-GP-U GAP-CLOSE-PW R-3-GP

2
1 2
PWR_VCCSA_VREF
PWR_VCCSA_COMP

1
PG4810
PW R_VCCSA_SLEW GAP-CLOSE-PW R-3-GP
VCCUSA_SENSE 8
1 2

2
PC4806
SCD01U50V2KX-1GP

1
1

PR4802
B 4K99R2F-L-GP B
2
1 PWR_VCCSA_COMP_1

PC4817
SC3300P50V3KX-1GP
2
2

PC4802
SCD22U10V2KX-1GP
1

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ISL95870A_VCCSA
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 48 of 103
5 4 3 2 1
5 4 3 2 1

LCD Connector CARMER PINDEFINE

LVDS1
38

31 39 3D3V_S0

1 TXCLKA_L- 20

1
2
D 2 TXCLKA_L+ 20 D
32 3 TXOUTA_L0- 20 RN4901
4 TXOUTA_L0+ 20 SRN2K2J-1-GP
5 TXOUTA_L1- 20
6 TXOUTA_L1+ 20
7 TXOUTA_L2- 20

4
3
8 TXOUTA_L2+ 20
9
10
33 11 DISP_OFF#
DISP_OFF# 97
12 3D3V_S0
13 +LCDVDD
14

RN
15 BRIGHTNESS_CTRL R4910 1 2 1KR2J-1-GP BKLT_CTL 20
16 CAMERA_ON 21

2
17 LCD_SMBCLK_C RN4902 1 4 LCD_SMBCLK 20
18 LCD_SMBDATA_C 2 3 LCD_SMBDATA 20 R4905
34 19 0R4P2R-PAD 100KR2J-1-GP
20 CAM_USB_10- 20120116PV-R DY
21 CAM_USB_10+

1
22
23 DMIC_CLK 29,97
24 DMIC_DATA 29,97
25 3D3V_S0
26 5V_S0
35 27
28
29 5V_S0
30 +LCDVDD
DCBATOUT
C C
36 40

37 C4911 C4901 C4902

1
SC10U6D3V3MX-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP
IPEX-CON30-7-GP-U DY C4906 C4905 C4907 C4908 C4909 C4910

1
2

SC4D7U10V5ZY-3GP

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SC47P50V2JN-3GP

SCD1U10V2KX-4GP
20.F1093.030

2
2nd = 20.F2141.030 DY

Near LCD1 CONN

3D3V_AUX_S5

1
3D3V_S0
83.R0304.D8F R4901
2ND = 83.R2004.C8F 100KR2J-1-GP
B B
D4902 3RD = 83.1PS76.01F
DY 20120201PV-R D4901

2
1 6 DMIC_CLK
DISP_OFF# A K LID_SW # 27,82,97
2 5 CH751H-40-1-GP

R4902
DMIC_DATA 3 4
2 1 LCD_BL_EN 20,97

1
BAV99S-GP
2KR2J-1-GP
83.00099.AAE R4903
100KR2J-1-GP
2ND = 83.BAV99.AAE

2
CAMERA LCD POWER CIRCUIT LED BACKLIGHT CONVERTER POWER
+LCDVDD 3D3V_S0

20120116PV-R U4901

TR4901
Layout 40 mil
3 OUT IN#4 4
A 2 GND <Core Design> A
21 USB_PP10 1 2 CAM_USB_10+ 1 5
EN IN#5
EMI 20120112 PV-R
CAM_USB_10-
21 USB_PN10 4 3
G5285T11U-GP Wistron Corporation
FILTER-4P-6-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
20,97 LCDVDD_EN 74.05285.07F Taipei Hsien 221, Taiwan, R.O.C.
2

69.10103.041 2nd = 74.09724.09F


2nd = 69.10080.011 R4904 Title
100KR2J-1-GP 3rd = 74.03514.07F LCD Connector
20120214 PV-R Size Document Number Rev
1

A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 49 of 103
5 4 3 2 1
5 4 3 2 1

84.02305.G31
CRT Connector 5V_S0

1
F5001
2 +5VS_CRT_F2 D S
2nd = 84.02377.031
5V_S0_CRT

Q5002
3rd = 84.02035.031
CRT1 1.1A/8V
FUSE-1D1A6V-4GP-U DMP2305U-7-GP 20120210PV-R
Transmission line

G
characteristic 69.50007.691
2nd = 69.50007.771

1
1CRTVDD_EN#_1
impedance for RGB Transmission line characteristic 3rd = 69.60040.011 C5020 C5022
SC4D7U10V5ZY-3GP DY SCD1U16V2ZY-2GP
signals Zo = 37.5 Ohm impedance Zo= 50 Ohm
CRT RGB

2
D 68.00084.B61 D
2nd = 68.00245.051
3rd = 68.00226.141 L5001

1
MUX_R 1 2 MUX_L_R R5011 1 2 0R2J-2-GP CRT_R

2
1
BLM18BB470SN1D-GP R5020
68.00084.B61 10KR2J-3-GP R5019
2nd = 68.00245.051 L5002 10KR2J-3-GP RN5001
MUX_G 3rd = 68.00226.141 1 2 MUX_L_G R5012 1 2 0R2J-2-GP CRT_G SRN2K2J-1-GP

2
BLM18BB470SN1D-GP
68.00084.B61 CRTVDD_EN#

3
4
CRT1
2nd = 68.00245.051 L5003
MUX_B 3rd = 68.00226.141 1 2 MUX_L_B R5013 1 2 0R2J-2-GP CRT_B
BLM18BB470SN1D-GP 4 9

D
Q5001 NC#4 VCC_CRT
DY DY DY 20120112 PV-R 11 NC#11
R5001

R5002

R5003

C5001

C5002

C5003

C5004

C5005

C5006

C5007

C5008

C5009
20120116PV-R 2N7002K-2-GP
12 DDC_DATA_CON
R1 DDCDATA_ID1
1

1
84.2N702.J31 15 DDC_CLK_CON
DDCCLK_ID3
5 GND
2nd = 84.07002.I31 6 1 CRT_R
2

2
GND CRT_RED CRT_G
7 GND CRT_GREEN 2
SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC22P50V2JN-4GP
3rd = 84.2N702.W31 8 3 CRT_B
2

S
GND CRT_BLUE
10 GND DY DY

1
1
75R2F-2-GP

75R2F-2-GP

75R2F-2-GP

16 14 CRT_VSYNC_CON_1
GND VSYNC CRT_HSYNC_CON_1 C5023 C5021
17 GND HSYNC 13

2
2
Place these resistors as 5,27,37,42,96 PW R_GOOD

SC22P50V2JN-4GP

SC22P50V2JN-4GP
the closest components to D-SUB-15-123-GP DY DY

1
1
connector CRT1 DY 20.20938.015 C5025

SC33P50V2JN-3GP
C
2nd = 20.20984.015 C5024 C

2
2
SC33P50V2JN-3GP
C5019
Transmission line characteristic SCD1U16V2ZY-2GP

2
impedance Zo = 50 Ohm

3D3V_S0 20120116PV-R 5V_S0_CRT


DDC&HSYNC&VSYNC 20120112 PV-R DDC
20 PCH_RED R5006 1 2 0R0402-PAD MUX_R
2
1

D5004
RN5007
SRN10KJ-5-GP 20 PCH_GREEN R5007 1 2 0R0402-PAD MUX_G 1 6 CRT_VSYNC_CON_1

2 5 CRT_R 1 AFTP5001 AFTE14P-GP


3
4

20 PCH_BLUE R5008 1 2 0R0402-PAD MUX_B CRT_G 1 AFTP5002 AFTE14P-GP


5V_S0_CRT CRT_B 1 AFTP5003 AFTE14P-GP
CRT_HSYNC_CON_1 3 4 DDC_DATA_CON 1 AFTP5004 AFTE14P-GP
M_HSYNC DY DDC_CLK_CON 1 AFTP5005 AFTE14P-GP
M_VSYNC 73.1G125.D0G CRT_VSYNC_CON_1 1 AFTP5006 AFTE14P-GP
1

2nd = 73.07125.0AG C5016 BAV99S-GP CRT_HSYNC_CON_1 1 AFTP5007 AFTE14P-GP


3rd = 73.1G125.0JH SCD1U16V2ZY-2GP 83.00099.AAE 5V_S0_CRT 1 AFTP5009 AFTE14P-GP
U5001 1 AFTP5011 AFTE14P-GP
2

1 OE# VCC 5 2ND = 83.BAV99.AAE AFTP5008 AFTE14P-GP


1
B AFTP5010 AFTE14P-GP B
2 A 1
M_HSYNC 1 AFTP5012 AFTE14P-GP
RN

20120116PV-R 3 4 5V_S0_CRT
GND Y
20 CRT_HSYNC RN5002 1 4 U74AHCT1G125G-AL5-R-GP-U
20 CRT_VSYNC 2 3
0R4P2R-PAD
U5002 D5005
20120116PV-R 3D3V_S0
1 OE# VCC 5 5V @ ext. CRT side
1 6 DDC_CLK_CON
M_VSYNC 2 RN5003
A HSYNC_5 1 CRT_HSYNC_CON_1
4 D5006
3 4 VSYNC_5 2 3 CRT_VSYNC_CON_1 2 5
GND Y CRT_R
1 6
U74AHCT1G125G-AL5-R-GP-U SRN33J-5-GP-U
73.1G125.D0G DY DY DDC_DATA_CON 3 4
1
1

2nd = 73.07125.0AG DY 2 5
3rd = 73.1G125.0JH C5018 C5017
BAV99S-GP
2
2

3D3V_S0 CRT_G
83.00099.AAE 3 4
SC10P50V2JN-4GP

SC10P50V2JN-4GP

DY
2ND = 83.BAV99.AAE BAV99S-GP
83.00099.AAE
2
1

RN5004 3D3V_S0 2ND = 83.BAV99.AAE


20120116PV-R SRN2K2J-1-GP
3D3V_S0 3D3V_S0
A <Core Design> A
3
4

Q5003
D5003
2011102PV CRT_DDC_DATA_R DDC_DATA_CON
4 3 DY Wistron Corporation
RN

20120116PV-R 2

1
5 2 C5010 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
RN5008 1 4 CRT_B 3 SCD1U10V2KX-4GP Taipei Hsien 221, Taiwan, R.O.C.
20 CRT_DDC_DATA
20 CRT_DDC_CLK 2 3 6 1
2

0R4P2R-PAD Title
2N7002KDW -GP
DY 1

CRT_DDC_CLK_R BAV99-5-GP-U CRT Connector


84.2N702.A3F Size Document Number Rev
83.00099.T11 A3
2nd = 84.2N702.E3FDDC_CLK_CON 2nd = 83.BAV99.D11 2012 S-Series Richie 13.3 -1
3rd = 84.2N702.F3F 20120131PVR 3rd = 83.BAV99.H11
Date: W ednesday, March 14, 2012 Sheet 50 of 103
5 4 3 2 1
5 4 3 2 1

HDMI Connector
HDMI CONN
20120130PV-R

HDMI_PLL_GND HDMI1
TR5101 TR5103 22

2
HDMI_CLK_R_C 1 2 HDMI_CLK_R_C_CON HDMI_DATA1_R_C 1 2 HDMI_DATA1_R_C_CON DY 20 1 HDMI_DATA2_R_C_CON
D D

D
HDMI_CLK_R_C# 4 3 HDMI_CLK_R_C#_CON HDMI_DATA1_R_C# 4 3 HDMI_DATA1_R_C#_CON R5123 2
0R2J-2-GP 3 HDMI_DATA2_R_C#_CON
COIL-90OHM-100MHZ-3-GP COIL-90OHM-100MHZ-3-GP 4 HDMI_DATA1_R_C_CON

1
68.11900.20A 68.11900.20A Q5103
5
HDMI_DATA1_R_C#_CON
2nd = 69.10098.031 2nd = 69.10098.031 2N7002K-2-GP
6
HDMI_DATA0_R_C_CON
3rd = 69.10118.021 3rd = 69.10118.021 7
8
3D3V_S0 HDMI_DATA0_R_C#_CON
84.2N702.J31 9

S
10 HDMI_CLK_R_C_CON
TR5102 TR5104 2nd = 84.07002.I31 11
HDMI_DATA0_R_C 1 2 HDMI_DATA0_R_C_CON HDMI_DATA2_R_C 1 2 HDMI_DATA2_R_C_CON 12 HDMI_CLK_R_C#_CON

1
HDMI_DATA0_R_C# HDMI_DATA0_R_C#_CON HDMI_DATA2_R_C# HDMI_DATA2_R_C#_CON
3rd = 84.2N702.W31 13
5V_S0_CRT
4 3 4 3 DY 14
R5113 15 DDC_CLK_HDMI
COIL-90OHM-100MHZ-3-GP COIL-90OHM-100MHZ-3-GP 100KR2J-1-GP 16 DDC_DATA_HDMI
68.11900.20A 68.11900.20A 17

2
2nd = 69.10098.031 2nd = 69.10098.031 18
3rd = 69.10118.021 3rd = 69.10118.021 21 19
23

1
C5102
SKT-HDMI23-54-GP SCD1U10V2KX-5GP
22.10296.721

2
2nd = 22.10296.761

HPD_HDMI_CON
Close to PCH
C C
3D3V_S0

C5103 1 2 SCD1U10V2KX-5GP HDMI_CLK_R_C# 84.03904.L06


20 HDMI_CLK_R# C5104 SCD1U10V2KX-5GP HDMI_CLK_R_C
20 HDMI_CLK_R 1 2

3
Q5102 2nd = 84.03904.X11
C5105 1 2 SCD1U10V2KX-5GP HDMI_DATA0_R_C# 1 2HDMI_HPD_B1 PMBS3904-1-GP
20 HDMI_DATA0_R# C5106 SCD1U10V2KX-5GP HDMI_DATA0_R_C R5111
20 HDMI_DATA0_R 1 2
150KR2J-L1-GP

2
1
DY HDMI_HPD_R1 2 HDMI_PCH_DET 20,97
R5110 R5128
C5110 1 2 SCD1U10V2KX-5GP HDMI_DATA1_R_C# 200KR2J-L1-GP 0R0402-PAD
20 HDMI_DATA1_R#

1
C5107 1 2 SCD1U10V2KX-5GP HDMI_DATA1_R_C

2
20 HDMI_DATA1_R R5112 20120116PV-R
C5108 1 2 SCD1U10V2KX-5GP HDMI_DATA2_R_C# 20KR2F-L-GP
20 HDMI_DATA2_R# C5109 SCD1U10V2KX-5GP HDMI_DATA2_R_C
20 HDMI_DATA2_R 1 2

2
Close to HDMI Connector

8
7
6
5

8
7
6
5
RN5106 RN5107
SRN680J-GP SRN680J-GP

1
2
3
4

1
2
3
4
HDMI_PLL_GND
B B

5V_S0_CRT

4
3
3D3V_S0

RN5101
SRN2K2J-1-GP

1
2
Q5104
20 PCH_HDMI_CLK 4 3 DDC_CLK_HDMI
84.2N702.A3F
5 2 2nd = 84.2N702.E3F
3rd = 84.2N702.F3F
6 1

2N7002KDW -GP
20 PCH_HDMI_DATA
DDC_DATA_HDMI

A <Core Design> A
Routing Guidelines:
CTRLDATA must be routed longer than CTRLCLK within 1000 mils (25.4 mm). Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
The total delay on CTRLDATA should be longer than CTRLCLK. Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Conn


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 51 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 52 of 103
5 4 3 2 1
5 4 3 2 1

WLAN Connector
Mini-Card--WLAN (Half) 20120116PV-R
R5304
1D5V_S0_MINI 1 2 1D5V_S0
0R0603-PAD-1-GP

1
C5301 C5302 C5303

SCD01U16V2KX-3GP
D D

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
3D3V_W LAN

2
3D3V_W LAN
W LAN1

1
20120112 PV-R 53
NP1 R5305
19,34 PCIE_W AKE# R5301 1 2 0R0402-PAD PCIE_W AKE#_W LAN 1 2 10KR2J-3-GP

3 4 DY

2
22,97 BT_OFF# R5303 1 DY 2 0R2J-2-GP BT_COMBO#_5 5 6 D5301
R5302 1 DY 2 0R2J-2-GP CLKREQD#_W LAN 7 8 LPC_FRAME#_MINI 71
18 CLKRQ_W LAN#
9 10 LPC_AD3_MINI 71 22 W LAN_TRANSMIT_OFF# K A XMIT_OFF_R
18 CLK_PCIE_W LAN# 11 12 LPC_AD2_MINI 71
18 CLK_PCIE_W LAN 13 14 LPC_AD1_MINI 71 1SS355GP-GP
B+_DEBUG_MINI 15 16 LPC_AD0_MINI 71
71 BT_COMBO#_19 83.00355.F1F
17 18
TPAD14-OP-GP
TP5302
T P5302 1 BT_COMBO#_19 19 20 XMIT_OFF_R XMIT_OFF_R 97 2nd = 83.00355.D1F
21 22 W LAN_RST# 0R2J-2-GP 2 DY 1 R5312 PLT_RST# 5,17,21,32,34,54,56,71,83,96,97
5,17,21,32,34,54,56,71,83,96,97 PLT_RST#
18 PCIE_RXN4_W LAN 23 24 3D3V_W LAN
18 PCIE_RXP4_W LAN 25 26 1 2

2
27 28 C5304
29 30 SCD1U16V2ZY-2GP
1KR2F-3-GP
18 PCIE_TXN4_W LAN 31 32
33 34 R5315
18 PCIE_TXP4_W LAN
35 36 USB_PN5
USB_PN5 21

1
37 38 USB_PP5 U5302
USB_PP5 21
3D3V_W LAN 39 40 1 6 W LAN_RST#
C 41 42 R5313 C
43 44 LED_W IRELESS 1 DY 2 0R2J-2-GP W L_LED# 68 2 5
45 46
47 48 68 W L_LED# 3 4 LED_W IRELESS
49 50
R5311
1 2 3D3V_S0 84.2N702.A3F
22,97 BT_OFF# 51 52
10KR2F-2-GP 2N7002KDW -GP
2nd = 84.2N702.E3F
NP2 C5307 3rd = 84.2N702.F3F
54
1 2 LED_W IRELESS_R_S
SKT-MINI52P-94-GP 3D3V_W LAN

K
1
62.10043.E51 SCD022U16V2KX-3GP D5302
R5314

1SS355GP-GP
220KR2J-L2-GP
2nd = 62.10043.951 5V_S0

A
3rd = 62.10043.F31

2
83.00355.F1F

2
R5309
2nd = 83.00355.D1F
10KR2J-3-GP

1
LED_W IRELESS_R_G

U5301
1 6
3D3V_S0
27 W LAN_OFF 2 5

2
B B

2
3 4 R5307
R5308 4K7R2J-2-GP
1K2R2J-1-GP 2N7002KDW -GP DY
84.2N702.A3F

1
2nd = 84.2N702.E3F

1
3rd = 84.2N702.F3F
CLKRQ_W LAN# 18

R5310
0R2J-2-GP 1 2
DY

3D3V_S0

C5305
1 2

SCD1U10V2KX-4GP
84.02305.G31
2nd = 84.02377.031

S
A R5306 Q5301 3rd = 84.02035.031 <Core Design> A
27 W LAN_OFF 1 2 W LAN_OFF_G G
220KR2J-L2-GP
DMP2305U-7-GP 20120210PV-R Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

D
Taipei Hsien 221, Taiwan, R.O.C.

Title

3D3V_W LAN WLAN MINI SLOT


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 53 of 103
5 4 3 2 1
5 4 3 2 1

WWAN Connector
Mini-Card--WWAN 3D3V_W W AN
BT_COMBO#_W 5
1 AFTP5401
AFTP5402
AFTE14P-GP
AFTE14P-GP
1
W W AN_TP 1 AFTP5403 AFTE14P-GP
UIM_PW R 1 AFTP5404 AFTE14P-GP
UIM_DATA 1 AFTP5405 AFTE14P-GP
D UIM_CLK 1 AFTP5406 AFTE14P-GP D
UIM_RST 1 AFTP5407 AFTE14P-GP
UIM_VPP 1 AFTP5408 AFTE14P-GP
W W AN1 W IFI_RF_EN# 1 AFTP5409 AFTE14P-GP
53 3D3V_W W AN PLT_RST# 1 AFTP5410 AFTE14P-GP
NP1 3D3V_W W AN 1 AFTP5411 AFTE14P-GP
1 2 W W AN_DET# 1 AFTP5412 AFTE14P-GP
3D3V_W W AN 1 AFTP5413 AFTE14P-GP

1
DY 3 4 C5401 3D3V_W W AN 1 AFTP5414 AFTE14P-GP
22,97 GPS_XMIT_OFF# R5402 1 2 BT_COMBO#_W 5 5 6 W W AN_TP 1 TP5401 DY SCD1U16V2ZY-2GP W W _LED# 1 AFTP5415 AFTE14P-GP
0R2J-2-GP 7 8 UIM_PW R TPAD14-OP-GP BT_COMBO#_W 51 1 AFTP5416 AFTE14P-GP

2
9 10 UIM_DATA 3D3V_W W AN 1 AFTP5417 AFTE14P-GP
11 12 UIM_CLK
13 14 UIM_RST
15 16 UIM_VPP PUT R5412 Close WWAN1 83.R0304.D8F
W IFI_RF_EN# 97 2ND = 83.R2004.C8F 20120201PV-R
17 18 D5401 3RD = 83.1PS76.01F
19 20 W IFI_RF_EN# CH751H-40-1-GP A K W W AN_TRANSMIT_OFF# 22,68
21 22 PLT_RST#_R R5412 2 1 WWAN WWAN PLT_RST# 5,17,21,32,34,53,56,71,83,96,97
23 24 510R2J-1-GP 3D3V_W W AN
25 26 1 2 INTRUDER# 17,97
27 28 R5404 0R2J-2-GP 20120116PV-R
DY

1
29 30
31 32 W W AN_DET# W W AN_DET# 18 C5402
33 34 SCD1U16V2ZY-2GP USB_PN12_R R5405 2 1 0R0402-PAD USB_PN12 21

2
35 36 USB_PN12_R WWAN
37 38 USB_PP12_R USB_PP12_R R5410 2 1 0R0402-PAD USB_PP12 21
3D3V_W W AN 39 40
41 42 W W _LED# 68
C 43 44 C
45 46 DY
20120112 PV-R 47 48 2 1
49 50 C5403 SCD1U16V2ZY-2GP 1 2 3D3V_S0
22,97 GPS_XMIT_OFF# R5403 1 2 BT_COMBO#_W 51 51 52 3D3V_W W AN R5401
NP2 10KR2F-2-GP DY
0R0402-PAD 54

SKT-MINI52P-94-GP

62.10043.E51
2nd = 62.10043.951 20120130PV-R 3rd = 83.02304.0AE
2nd = 83.09904.AAE
3rd = 62.10043.F31 83.42236.0AE
U5401

3D3V_W W AN 4 3
INTRUDER# VIO#4 VIO#3
5 VBUS GROUND 2

6 1
D

VIO#6 VI/O#1

1
RTC_AUX_S5 C5411
DY SCD1U16V2ZY-2GP DY
DY IP4223CZ6-GP SIM1

2
1

Q5402 R5408 UIM_PW R


WWAN
C1 VCC I/O C7
2N7002K-2-GP 1MR2J-1-GP UIM_RST
DY C2 RST VPP C6

1
B UIM_CLK B
C3 CLK GND C5
84.2N702.J31 R5409 NP1 NP2
2
G
S

47KR2J-2-GP NP1 NP2


W W AN_DET#
DY
2nd = 84.07002.I31 SKT-SIMM6-20-GP

2
3rd = 84.2N702.W31 UIM_VPP
62.10034.491
UIM_DATA

3D3V_S5

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
2
84.02305.G31 DY C5414

1
C5413

C5412
2ND = 84.02377.031

SC22P50V2JN-4GP
Q5401 20120116PV-R 3D3V_W W AN
3rd
DMP2305U-7-GP
= 84.02035.031 R5411
20120210PV-R
3A

2
0R0805-PAD-1-GP
S D 3D3V_W W AN_R 2 1
1

2
1

WWAN C5405 C5406 C5407 C5408 C5409 C5410 WWAN WWAN


G

R5406 C5404 DY
SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP
SCD01U16V2KX-3GP
2

1
SC39P50V2JN-1GP

SC39P50V2JN-1GP

SC39P50V2JN-1GP

10KR2J-3-GP SCD1U16V2ZY-2GP
2

WWAN WWAN
WWAN WWAN WWAN DY DY
2

R5407
A 27 W W AN_OFF 1 2 W W AN_OFF_R <Core Design> A

220KR2J-L2-GP
WWAN Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

WWAN MINI SLOT/SIM


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 54 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 55 of 103
5 4 3 2 1
5 4 3 2 1
HDD Connector

HDD1

23 P1

D
24
23
24
V33
V33 P2
P3
1.5A 5V_ODD_HDD_S0 20120130PV-R D
V33
NP1 NP1 Put AC Coupling on connector side
NP2 NP2 V5 P7
V5 P8

1
P9 U5601
V5 C5605 C5606
SCD1U16V2ZY-2GP SC1U10V2KX-1GP SATA_TXP0_C
DY SATA_TXN0_C
S1 P13 1 6

2
GND V12 VI/O#1 VIO#6
S4 GND V12 P14
S7 GND V12 P15 2 GROUND VBUS 5 5V_S0
P4 GND
P5 SATA_RXP0_C 3 4 SATA_RXN0_C
GND SATA_TXP0_C C5601 1 VIO#3 VIO#4
P6 GND A+ S2 2 SCD01U16V2KX-3GP SATA_TXP0 17
P10 S3 SATA_TXN0_C C5602 1 2 SCD01U16V2KX-3GP SATA_TXN0 17
GND A- IP4223CZ6-GP
P12 GND
S6 SATA_RXP0_C C5604 1 2 SCD01U16V2KX-3GP SATA_RXP0 17 83.42236.0AE
B+ SATA_RXN0_C C5603 1
P11 DAS/DSS B- S5 2 SCD01U16V2KX-3GP SATA_RXN0 17 2nd = 83.09904.AAE
3rd = 83.02304.0AE
SKT-SATA7P-15P-99-GP
62.10065.I91
2nd = 62.10065.J31

C C

5V_ODD_HDD_S0

ODD Connector
1
2011102SC

1
TC5601

1
SC10U10V5KX-2GP R5603 C5607

2
10KR2J-3-GP SCD1U16V2ZY-2GP

2
2

S
5V_ODD_S0
2 1SATA_PW R_EN_G_1 G Q5601
R5604 DMP2305U-7-GP
3D3V_S0 220KR2J-L2-GP 84.02305.G31
2nd = 84.02377.031 1A ODD1
3rd = 84.02035.031

D
1

Q5602 P2 P4
R5601 SATA_PW R_EN_G +5V MD
1 6 20120210PV-R P3 +5V DP P1
10KR2J-3-GP
22,97 SATA_ODD_PW R_EN 2 5 PLT_RST# 5,17,21,32,34,53,54,71,83,96,97 GND S1
17 SATA_TXN1 SCD01U16V2KX-3GP 2 1 C5609 SATA_TXN1_C S3 S4
2

SCD01U16V2KX-3GP A- GND
17 SATA_ODD_DET# 3 4 17 SATA_TXP1 2 1 C5608 SATA_TXP1_C S2 A+ GND S7
P5
B GND B
1

C5612 P6
SCD1U16V2ZY-2GP 2N7002KDW -GP SCD01U16V2KX-3GP GND
DY 17 SATA_RXN1 2 1 C5610 SATA_RXN1_C S5 B- GND 14
84.2N702.A3F 17 SATA_RXP1 SCD01U16V2KX-3GP 2 1 C5611 SATA_RXP1_C S6 15
2

B+ GND
2nd = 84.2N702.E3F 3D3V_S0
3rd = 84.2N702.F3F NP1 NP1 NP2 NP2

1
SKT-SATA7P-6P-104-GP
R5602 22.10300.E41
8K2R2J-3-GP
97 SATA_ODD_DA#_C 2nd = 22.10300.F21
20120112 PV-R

2
R5605
1 2 SATA_ODD_DA#_C
21,96 SATA_ODD_DA#
0R0402-PAD
SATA_ODD_DET#_C
97 SATA_ODD_DET#_C

20120130PV-R
U5602

SATA_TXP1_C 1 6 SATA_TXN1_C
VI/O#1 VIO#6
2 5
A GROUND VBUS 5V_ODD_S0 <Core Design>
A
SATA_RXP1_C 3 4 SATA_RXN1_C
VIO#3 VIO#4
Wistron Corporation
IP4223CZ6-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
83.42236.0AE
2nd = 83.09904.AAE Title
3rd = 83.02304.0AE
HDD/ODD
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 56 of 103
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 57 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 58 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 59 of 103
5 4 3 2 1
5 4 3 2 1

SSID = Flash.ROM
R3 closley to PCH side R1 closley to SPI ROM side
To PCH R3 20120116PV-R R1
17 PCH_SPI_MOSI R6001 1 2 0R0402-PAD SPI_MOSI R6002 1 2 33R2J-2-GP SPI_MOSI_C From BIOS SYSTEM SPI ROM Socket
D R6003 1 2 0R0402-PAD SPI_MISO R6004 1 2 0R0402-PAD SPI_MISO_C D
17 PCH_SPI_MISO
20120112 PV-R 3D3V_S5 3D3V_AUX_S5
R6005 1 2 0R0402-PAD SPI_CS#0 20120116PV-R
17 PCH_SPI_CS#0
R6006 1 2 33R2J-2-GP SPI_CLK R6007 1 2 33R2J-2-GP SPI_CLK_C 20120116PV-R
17 PCH_SPI_CLK

1
R6008 R6009
0R0402-PAD 0R2J-2-GP
20120116PV-R SPI_PW R
R6 DY

2
71 SPI_MOSI R6010 1 2 0R0402-PAD SPI_SI_FLASH 27
R6011 1 2 0R0402-PAD R6013 1 2 3K3R2J-3-GP
71 SPI_MISO
R6012 1 2 0R0402-PAD
SPI_SO_FLASH 27
From KBC
71 SPI_CS#0 SPI_CS0#_FLASH 27 BIOS1
SPI Layout Note 71 SPI_CLK
R6014 1 2 33R2J-2-GP SPI_CLK_FLH 27 SPI_CS#0 1 8 SPI_PW R
R6 closley to KBC side SPI_MISO_C 2 7 SPI_HOLD#_11 R6015 2
SPI_W P#_1 3 6 3K3R2J-3-GP SPI_CLK_C
4 5 SPI_MOSI_C

SKT-G6179-GP-U

1
62.10076.011 DY C6003

1
C6001 DY C6002

SC68P50V2JN-1GP

SCD1U16V2ZY-2GP
R6016

SC68P50V2JN-1GP
3K3R2J-3-GP

2
DY
C C

2
SPI_HOLD#_1
SPI_HOLD#_1 71
SPI_PW R
NOTE: SPI signal use GND reference

SPI ROM PART


SPI_CS#0 R6017 1 2 4K7R2J-2-GP 72.25Q64.F01 W25Q64FVSSIG WINBOND
72.25Q64.D01 N25Q064A13ESE40F NUMONYX

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 60 of 103
5 4 3 2 1
5 4 3 2 1

Right Side USB 2.0 Connector

D D

Right Side USB 2.0


USB_VCCA
DY USB_VCCA
21 USB_PN9 R6101 1 2 0R2J-2-GP USB21
7 1 AFTP6101 AFTE14P-GP
5 1 AFTP6102 AFTE14P-GP
FILTER-4P-6-GP 1 USB_9- 1 AFTP6103 AFTE14P-GP
2 1 USB_9+ 1 AFTP6104 AFTE14P-GP
C 69.10103.041 EMI USB_9- 2 1 AFTP6105 AFTE14P-GP C
2nd = 69.10080.011 3 4 USB_9+ 3 1 AFTP6106 AFTE14P-GP
4
TR6101 6
8

R6102 1
DY
21 USB_PP9 2 0R2J-2-GP SKT-USB8-113-GP
22.10339.C71 For RF Placement CAP Close to USB21
2nd = 22.10341.781 USB_9-

USB_9+

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
1

1
C6101 C6102

2
20120203PV-R
20120130PV-R

U6101
B USB_9+ USB_3- B
1 VI/O#1 VIO#6 6 USB_3- 62
2 GROUND VBUS 5 5V_S5
USB_9- 3 4 USB_3+ USB_3+ 62
VIO#3 VIO#4

IP4223CZ6-GP
83.42236.0AE
2nd = 83.09904.AAE
3rd = 83.02304.0AE

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

USB Power SW
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 61 of 103
5 4 3 2 1
5 4 3 2 1

Left Side USB 3.0 Connector USB_VCCB


USB 3.0 Connector
Right Side USB 3.0 Connector
Pin definition
1 POWER USB_3- 61
USB33
2 USB 2.0 D- USB_3+ 61
21 USB3_RXN2 R6212 1 2 0R0402-PAD USB3_RX2- 5 1
R6215 1 STDA_SSRX- VBUS
21 USB3_RXP2 2 0R0402-PAD USB3_RX2+ 6 STDA_SSRX+ 3 USB 2.0 D+ USB_VCCA

8 2 USB_1- 4 GND USB31


TR6203 STDA_SSTX- D- USB_1+
D 9 STDA_SSTX+ D+ 3 D
21 USB_PP1 2 1 USB_1+ 5 StdA_SSRX- 21 USB3_RXN4 R6217 1 2 0R0402-PAD USB3_RX4- 5 1
R6218 1 STDA_SSRX- VBUS
EMI 21 USB3_RXP4 2 0R0402-PAD USB3_RX4+ 6 STDA_SSRX+
21 USB_PN1 3 4 USB_1- 10 6 StdA_SSRX+
CHASSIS#10 USB_3-
4 GND CHASSIS#11 11 8 STDA_SSTX- D- 2
FILTER-4P-6-GP 12 7 GND 9 3 USB_3+
CHASSIS#12 STDA_SSTX+ D+
69.10103.041 7 GND_DRAIN CHASSIS#13 13
2nd = 69.10080.011 8 StdA_SSTX-
PUT CAP CLOSE to USB33 CHASSIS#10 10
SKT-USB13-46-GP-U 9 StdA_SSTX+ 4 11
GND CHASSIS#11
22.10339.D21 TR6202 CHASSIS#12 12
2nd = 22.10339.F51 USB_3-
7 GND_DRAIN CHASSIS#13 13
21 USB_PN3 2 1

C6203
EMI USB_3+ SKT-USB13-46-GP-U
21 USB_PP3 3 4
SCD1U10V2KX-5GP 22.10339.D21
Placement CAP Close to USB33 FILTER-4P-6-GP 2nd = 22.10339.F51
21 USB3_TXN2 1 2 USB3_TXN1_C R6210 1 2 0R0402-PAD USB3_TX2- PUT CAP CLOSE to USB31 69.10103.041
21 USB3_TXP2 1 2 USB3_TXP1_C R6211 1 2 0R0402-PAD USB3_TX2+ USB_1+ 2nd = 69.10080.011
USB_1-
C6206

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
SCD1U10V2KX-5GP

1
C6215 C6216
20120130PV-R C6202
SCD1U10V2KX-5GP

2
21 USB3_TXN4 1 2 USB3_TXN4_C R6214 1 2 0R0402-PAD USB3_TX4- Placement CAP Close to USB31
21 USB3_TXP4 1 2 USB3_TXP4_C R6216 1 2 0R0402-PAD USB3_TX4+
USB_3-
USB_VCCB C6205 USB_3+

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP
C SCD1U10V2KX-5GP C

1
20120203PV-R 20120130PV-R C6219 C6220

2
USB32

21 USB3_RXN3 R6209 1 2 0R0402-PAD USB3_RX3- 5 1


R6213 1 STDA_SSRX- VBUS
21 USB3_RXP3 2 0R0402-PAD USB3_RX3+ 6 STDA_SSRX+ 20120203PV-R
8 2 USB_2-
STDA_SSTX- D- USB_2+
9 STDA_SSTX+ D+ 3
TR6201
21 USB_PP2 2 1 USB_2+
EMI USB_2- CHASSIS#10 10
21 USB_PN2 3 4 4 GND CHASSIS#11 11
12
FILTER-4P-6-GP
69.10103.041
7 GND_DRAIN
CHASSIS#12
CHASSIS#13 13
USB POWER
2nd = 69.10080.011 20120201PV-R
SKT-USB13-46-GP-U
22.10339.D21 5V_S5 U6204 100 mil USB_VCCA
2nd = 22.10339.F51
2 IN#2 OUT#6 6
3 IN#3 OUT#7 7
PUT CAP CLOSE to USB32 OUT#8 8

1
HIGH Enable C6207 C6211 C6213

1
SCD1U16V2ZY-2GP

SC10P50V2JN-4GP

SCD1U16V2ZY-2GP
C6208 4 TC6201
C6201 SC1U10V3ZY-6GP EN/EN# ST100U6D3VBM-16GP
Placement CAP Close to USB32 DY 1

2
B SCD1U10V2KX-5GP GND B
5 9 77.C1071.18L

2
FLT# GND
21 USB3_TXN3 1 2USB3_TXN3_C R6207 1 2 0R0402-PAD USB3_TX3- USB_2+ 1st = 77.C1071.081
21 USB3_TXP3 1 2USB3_TXP3_C R6208 1 2 0R0402-PAD USB3_TX3+ USB_2- TPS2001CDGNR-GP 2nd = 77.C1071.18L
SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

74.02001.079 3rd = 77.81071.06L


1

C6204 C6217 C6218


SCD1U10V2KX-5GP 19,46,97 PM_SLP_S4#
2nd = 74.02311.079 20120131PVR
20120130PV-R 20120131PVR
2

DY 2A Active High
5V_S5 1 2 7534B_OC#1
R6219
10KR2J-3-GP 20120201PV-R
20120203PV-R 5V_S5 USB_VCCB
U6205
100 mil
2 IN#2 OUT#6 6
Ultra Low Capacitance TVS Arrays Ultra Low Capacitance TVS Arrays 3 IN#3 OUT#7 7

1
8
(Pin5.6.7.8 No Internal Connection) (Pin5.6.7.8 No Internal Connection) OUT#8
1

C6209 HIGH Enable C6210 C6212 C6214 TC6202

1
SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

SC10P50V2JN-4GP

SCD1U16V2ZY-2GP
U6203 U6202 ST100U6D3VBM-16GP
DY 4

2
EN/EN#

1
USB3_TX3+ 1 8USB3_TX3+ USB3_TX2+1 8USB3_TX2+ 1 77.C1071.18L
2

USB3_TX3- 2 L1#1L1#8 L1#1L1#8 GND


7USB3_TX3- USB3_TX2-2 7USB3_TX2- 5 9

2
L2#2L2#7 L2#2L2#7 FLT# GND
G1 G2 G1 G2 1st = 77.C1071.081

2
USB3_RX3+ 3 GNDGND GNDGND
L3#3L3#6 6USB3_RX3+ USB3_RX2+3 L3#3L3#6 6USB3_RX2+ 2nd = 77.C1071.18L
USB3_RX3- 4 5USB3_RX3- USB3_RX2-4 5USB3_RX2- TPS2001CDGNR-GP 3rd = 77.81071.06L
L4#4L4#5 L4#4L4#5
83.00524.AA0 83.00524.AA0 74.02001.079
2nd = 83.01045.AA0 2nd = 83.01045.AA0
RCLAMP0524PATCT-GP RCLAMP0524PATCT-GP 20120131PVR
19,46,97 PM_SLP_S4#
A 2nd = 74.02311.079 <Core Design> 20120131PVR A
U6207
U6206 DY
USB3_TX4+ 1 8USB3_TX4+ USB_1+ USB_2- 2 7534B_OC#2 2A Active High
USB3_TX4- 2 L1#1L1#8
L2#2L2#7 7USB3_TX4-
1 VI/O#1 VIO#6 6 5V_S5 1
R6220 Wistron Corporation
G1 G2 2 5 10KR2J-3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
GNDGND GROUND VBUS 5V_S5
USB3_RX4+ 3 6USB3_RX4+ Taipei Hsien 221, Taiwan, R.O.C.
USB3_RX4- 4 L3#3L3#6
L4#4L4#5 5USB3_RX4- USB_1- 3 VIO#3 VIO#4 4 USB_2+
83.00524.AA0 Title
2nd = 83.01045.AA0
RCLAMP0524PATCT-GP IP4223CZ6-GP USB3.0
20120130PV-R Size Document Number Rev
83.42236.0AE A3
2nd = 83.09904.AAE 2012 S-Series Richie 13.3 -1
3rd = 83.02304.0AE Date: W ednesday, March 14, 2012 Sheet 62 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 63 of 103
5 4 3 2 1
5 4 3 2 1

Finger Printer Connector

D D

3D3V_S5

3D3V_S5
1 AFTP6402 AFTE14P-GP

SC47P50V2JN-3GP
C6401
1 AFTP6403 AFTE14P-GP

SCD1U10V2KX-4GP
1

C6402
USB_PN8_FP 1 AFTP6404 AFTE14P-GP

2
USB_PP8_FP 1 AFTP6405 AFTE14P-GP
FP1
DY FPR_LOCK# 1 AFTP6406 AFTE14P-GP
7
1 FPR_OFF 1 AFTP6407 AFTE14P-GP

USB_PN8_FP 2 1 AFTP6408 AFTE14P-GP


USB_PP8_FP 3
C 4 1 AFTP6409 AFTE14P-GP C

22,97 FPR_LOCK# 5
18,97 FPR_OFF 6
8

2
PTW O-CON6-12-GP
R6401 20.K0382.006
10KR2J-3-GP
2nd = 20.K0721.006

1
3D3V_S5

20120116PV-R
21 USB_PN8 R6403 1 2 0R0402-PAD USB_PN8_FP
DY D6401
4 1
21 USB_PP8 R6404 1 2 0R0402-PAD USB_PP8_FP

USB_PP8_FP 3 2 USB_PN8_FP

B PRTR5V0U2X-GP B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Finger Print Conn


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 64 of 103
5 4 3 2 1
5 4 3 2 1

D D

ACCELEROMETER
3D3V_S0

I2C ADDRESS

1
C6501 C6502

SCD1U16V2ZY-2GP

SC4D7U6D3V3KX-GP
0X50 GND

2
C C

0X52 VCC
U6501

1 VDD_IO RES#10 10
RES#13 13
14 VDD RES#15 15 Meter_SMBCLK 28
RES#16 16 Meter_SMBDATA 28
11 4 RN6501 1 4 SRN0J-6-GP PCH_SMBCLK 14,15,18,31
21 ACCEL_INT INT1 SCL/SPC
R6501
9 INT2 SDA/SDI/SDO 6 2 DY 3 PCH_SMBDATA 14,15,18,31

3D3V_S0 1 2 G_CS 8 7 G_SDO


1 2 R6502
CS SDO/SA0 0R2J-2-GP
0R0402-PAD
DY
20120112 PV-R 2 NC#2 GND 5
3 NC#3 GND 12

HP3DC2TR-GP
74.HP3DC.ABZ

Must be placed in the


center of the system
B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

ACCELEROMETER
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 65 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 66 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 67 of 103
5 4 3 2 1
5 4 3 2 1
WLAN / WWAN POWER LED
3D3V_S0

1
R6808
10KR2J-3-GP
20120112 PV-R
D D

2
R6801
53 W L_LED# 1 2 W L_LED#_ALL 82,97
0R0402-PAD

Q6802

54 W W _LED# S

22,54 W W AN_TRANSMIT_OFF# G

2N7002K-2-GP

84.2N702.J31
2nd = 84.07002.I31
3rd = 84.2N702.W31

C C
HDD LED

3D3V_S0

HDD_HALTLED 17

20120220 PV-R
R6805
LED1 Amber U6801
R6807 560R2J-3-GP Orange 1 6 HDD_HALTLED# 1 2 3D3V_S0
2 1 HALE_LED1 2 4 HDD_HALTLED#
2 5
B R6809 270R2J-L-GP White 10KR2J-3-GP B
2 1 SATA_LED_L 1 3 SATA_LED#_R 3 4 SATA_LED# 17

White
LED-OW -2-GP-U 2N7002KDW -GP
1st = 83.00195.Y70 84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 83.19223.M70 3rd = 84.2N702.F3F
3rd = 83.00195.Y70

A <Core Design>
A
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

LED Control
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 68 of 103
5 4 3 2 1

Keyboard Connector
KSI[0..7] 27,82,97

KSO[0..15] 27,97
D D

KB1
31
1 KSI1 1 AFTP6928 AFTE14P-GP
PLT_DET 1 AFTP6929 AFTE14P-GP
2 KSI7 1 AFTP6927 AFTE14P-GP KB_CAPS_LED 1 AFTP6932 AFTE14P-GP
3 KSI6 1 AFTP6926 AFTE14P-GP 3D3_CAPS_LED 1 AFTP6931 AFTE14P-GP
4 KSO9 1 AFTP6925 AFTE14P-GP 3D3_CAPS_LED 1 AFTP6933 AFTE14P-GP
5 KSI4 1 AFTP6924 AFTE14P-GP 1 AFTP6934 AFTE14P-GP
6 KSI5 1 AFTP6923 AFTE14P-GP 1 AFTP6935 AFTE14P-GP
7 KSO0 1 AFTP6922 AFTE14P-GP
8 KSI2 1 AFTP6921 AFTE14P-GP
9 KSI3 1 AFTP6920 AFTE14P-GP
10 KSO5 1 AFTP6919 AFTE14P-GP
11 KSO1 1 AFTP6918 AFTE14P-GP
12 KSI0 1 AFTP6917 AFTE14P-GP
13 KSO2 1 AFTP6916 AFTE14P-GP
14 KSO4 1 AFTP6915 AFTE14P-GP
15 KSO7 1 AFTP6914 AFTE14P-GP
16 KSO8 1 AFTP6913 AFTE14P-GP
17 KSO6 1 AFTP6912 AFTE14P-GP
18 KSO3 1 AFTP6911 AFTE14P-GP
19 KSO12 1 AFTP6910 AFTE14P-GP
20 KSO13 1 AFTP6909 AFTE14P-GP
21 KSO14 1 AFTP6908 AFTE14P-GP
22 KSO11 1 AFTP6907 AFTE14P-GP
23 KSO10 1 AFTP6906 AFTE14P-GP
24 KSO15 1 AFTP6905 AFTE14P-GP
C 25 C
PLT_DET 21,27
26
27
28
29 3D3_CAPS_LED1 2 R6904 3D3V_S0
30 560R2J-3-GP KB_CAPS_LED 27,97
32

ACES-CON30-8-GP-U
20.K0524.030
2nd = 20.K0626.030

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 69 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 70 of 103
5 4 3 2 1
5 4 3 2 1

D D

24 PIN LPC DEBUG CONN.


+VBAT_DEBUG
DEBUG1

1 GROUND
21,97 CLK_PCI_DEBUG 2 LPC_PCI_CLK
3 GROUND
17,27 LPC_FRAME# 4 LPC_FRAME#
17,27 SIRQ 5 +V3S
5,17,21,32,34,53,54,56,83,96,97 PLT_RST# 6 LPC_RESET#
C 7 C
21,27 NMI_SMI_DBG# +V3S
LPC_AD0 8
LPC_AD1 LPC_AD0
17,27 LPC_AD[3:0] 9 LPC_AD1
LPC_AD2 10
LPC_AD3 LPC_AD2
11 LPC_AD3
12 VCC_3VA
27 8051TX/S3_LED# 13 PWR_LED#
27 8051RX/CAPS_LED 14 CAPS_LED#
27 8051_RECOVER# 15 NUM_LED#
27 VCC1_POR# 16 VCC1_PWRGD
DY R7101 1 2 0R2J-2-GP SPI_CLK_JP 17
60 SPI_CLK R7102 1 0R2J-2-GP SPI_CS0#_JP SPI_CLK
60 SPI_CS#0 DY R7103 1
2
0R2J-2-GP SPI_SI_JP
18 SPI_CS#
60 SPI_MOSI DY R7104 1
2
0R2J-2-GP SPI_SO_JP
19 SPI_SI
60 SPI_MISO DY 2
SPI_HOLD#_0
20 SPI_SO
21 SPI_HOLD#
22 RESERVED#22
23 RESERVED#23
24 RESERVED#24
20120116PV-R 25 GND
60 SPI_HOLD#_1 R7105 1 2 0R0402-PAD 26 GND
NP1 NP1
17,27 SPI_CS1# NP2 NP2

ACES-CONN24A-2-GP
20.F1954.024
DY
B SPI_PW R
20120305 MV B

SPI_CS1# R7107 1 DY 2 4K7R2J-2-GP

G7101 GAP-OPEN-PW R
CLK_PCI_DEBUG 1 2 BT_COMBO#_19 53

G7102 GAP-OPEN-PW R
LPC_FRAME# 1 2 LPC_FRAME#_MINI 53

G7103 GAP-OPEN-PW R
LPC_AD0 1 2 LPC_AD0_MINI 53

G7104 GAP-OPEN-PW R
LPC_AD1 1 2 LPC_AD1_MINI 53

A <Core Design> A
G7105 GAP-OPEN-PW R
LPC_AD2 1 2 LPC_AD2_MINI 53
Wistron Corporation
G7106 GAP-OPEN-PW R 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
LPC_AD3 1 2 Taipei Hsien 221, Taiwan, R.O.C.
LPC_AD3_MINI 53
+VBAT_DEBUG B+_DEBUG_MINI Title
G7107 GAP-OPEN-PW R
1 2 Dubug connector
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 71 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 72 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 73 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 74 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 75 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 76 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

TPM
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 77 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 78 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 79 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 80 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 81 of 103
5 4 3 2 1
5 4 3 2 1

Adaptor in to generate DCBATOUT DC_PIN1 DC_PIN1 97


330R2J-3-GP MLVS0402M04-GP
1 R8202
2 1 2
5V_AUX_S5
DY L8203

U8201
AD+ 4 3
DCIN1
D 8 7 AMBER_BATLED# 5 2 BAT_GRNLED# D
27 AMBER_BATLED# BAT_GRNLED# 17,27
6 5
4 3 6 1

K
1

1
R8205 DY C8201 C8202 C8203 C8204 DY DC_PIN1 2 1 DC_PIN2 2N7002KDW -GP

SC100P50V2JN-3GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC100P50V2JN-3GP
15KR2J-1-GP D8202 84.2N702.A3F
ACES-CONN8D-GP

P6SMB27A-1-GP
2nd = 84.2N702.E3F

2
3rd = 84.2N702.F3F

2
20.81633.008

1
MLVS0402M04-GP
D8201 L8202
2nd = 20.81650.008
SM24DTCT-GP-U 5V_AUX_S5 2 1 1 2
510R2J-1-GP
83.0SM24.A11 R8201 DY

3
83.P6SMB.KAG DC_PIN2 DC_PIN2 97
2nd = 83.03024.0A1
2ND = 83.P6SBM.EAG
AD+ 1 AFTP8205 AFTE14P-GP
LIMIT_SIGNAL 38,97
AD+ 1 AFTP8203 AFTE14P-GP
LIMIT_SIGNAL 1 AFTP8202 AFTE14P-GP

1 AFTP8206 AFTE14P-GP
1 AFTP8207 AFTE14P-GP

DC_PIN1 1 AFTP8208 AFTE14P-GP


C DC_PIN2 1 AFTP8209 AFTE14P-GP C

Power Button +Quick Lanch board

3D3V_AUX_S5

1
B B

20120130PV-R R8206
100KR2J-1-GP
R8207
PW R1

2
18 ON_OFF# 1 2 ON/OFFBTN_KBC# 27
16
15 ON_OFF# 19,97 100R2J-2-GP

2
14 PW R_BD_LED# 27 20120112PV-R PW R_BD_LED# 1 AFTP8210 AFTE14P-GP
13 3D3V_AUX_S5 ON_OFF# 1 AFTP8211 TPAD28-1-GP-U G8201

1
12 LID_SW #_R 1 AFTP8212 AFTE14P-GP
11 QUICKX_LED# 1 AFTP8213 AFTE14P-GP GAP-OPEN C8206
10 LID_SW #_R 1 R8209 2 LID_SW # 27,49,97 W L_LED#_ALL 1 AFTP8214 AFTE14P-GP SC1U10V3ZY-6GP

2
9 100R2J-2-GP KSO17 27,97 KSI1 1 AFTP8215 AFTE14P-GP
8 KSI3 27,69,97 KSI3 1 AFTP8216 AFTE14P-GP
7 KSI1 27,69,97 KSO17 1 AFTP8217 AFTE14P-GP
6 3D3V_S0 3D3V_AUX_S5 1 AFTP8218 AFTE14P-GP
5 W L_LED#_ALL 68,97 3D3V_AUX_S5 1 AFTP8219 AFTE14P-GP
4 3D3V_S0 1 AFTP8220 AFTE14P-GP
3 3D3V_S0 1 AFTP8221 AFTE14P-GP
2 QUICKX_LED# 27,97 1 AFTP8222 AFTE14P-GP
1 AFTP8223 AFTE14P-GP
1 3D3V_AUX_S5 1 AFTP8224 AFTE14P-GP
17

ACES-CON16-17-GP
20.K0721.016
A 2nd = 20.K0382.016 <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

POWER Button/ DCIN Connector


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 82 of 103
5 4 3 2 1
5 4 3 2 1

4 PEG_TXP[0..15]
VGA1A 1 OF 7 PEG_RXP[0..15] 4 CONFIGURATION STRAPS RECOMMENDED SETTINGS
4 PEG_TXN[0..15] 0= DO NOT INSTALL RESISTOR
PEG_RXN[0..15] 4
ALLOW FOR PULL-UP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, 1 = INSTALL 3K RESISTOR
X = DESIGN DEPENDANT
THEY MUST NOT CONFLICT DURING RESET NA = NOT APPLICABLE

DIX_PX PLATFORM
PEG_TXP0 AF30 AH30 PEG_C_RXP0 C8317 1 2 SCD22U16V2KX-GP PEG_RXP0 STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS RECOMMEND
PEG_TXN0 AE31
PCIE_RX0P PCIE_TX0P
AG31 PEG_C_RXN0 C8318 1 2 SCD22U16V2KX-GP PEG_RXN0 SETTING
PCIE_RX0N PCIE_TX0N DIX_PX Transmitter Power Savings Enable
DIX_PX TX_PWRS_ENB GPIO0 X 1
PEG_TXP1
0: 50% Tx output swing 1: Full Tx output swing
D AE29 PCIE_RX1P PCIE_TX1P AG29 PEG_C_RXP1 C8319 1 2 SCD22U16V2KX-GP PEG_RXP1 D
PEG_TXN1 AD28 AF28 PEG_C_RXN1 C8320 1 2 SCD22U16V2KX-GP PEG_RXN1 PCIE TRANSMITTER DE-EMPHASIS ENABLED
PCIE_RX1N PCIE_TX1N DIX_PX TX_DEEMPH_EN GPIO1 0:Tx de-emphasis disabled 1:Tx de-emphasis enabled X 1
DIX_PX
PEG_TXP2 AD30 AF27 PEG_C_RXP2 C8321 1 2 SCD22U16V2KX-GP PEG_RXP2 0:Advertises the PCIe device as 2.5GT/s capable at power on.
PEG_TXN2 PCIE_RX2P PCIE_TX2P
AC31 PCIE_RX2N PCIE_TX2N AF26 PEG_C_RXN2 C8322 1 2 SCD22U16V2KX-GP PEG_RXN2 BIF_GEN2_EN_A GPIO2 1:Advertises the PCIe device as 5.0GT/s capable at power on. 0 0
DIX_PX
DIX_PX AC (Performance mode) = 3.3 V
PEG_TXP3 AC29 AD27 PEG_C_RXP3 C8323 1 2 SCD22U16V2KX-GP PEG_RXP3 GPIO5_AC_BATT GPIO5 ? 0
PEG_TXN3 AB28
PCIE_RX3P PCIE_TX3P
AD26 PEG_C_RXN3 C8324 1 2 SCD22U16V2KX-GP PEG_RXN3 Battery saving mode = 0.0 V
PCIE_RX3N PCIE_TX3N DIX_PX
DIX_PX GPIO8_ROMSO GPIO8 RESERVED 0 0
PEG_TXP4 AB30 AC25 PEG_C_RXP4 C8325 1 2 SCD22U16V2KX-GP PEG_RXP4
PEG_TXN4 PCIE_RX4P PCIE_TX4P
AA31 PCIE_RX4N PCIE_TX4N AB25 PEG_C_RXN4 C8326 1 2 SCD22U16V2KX-GP PEG_RXN4 0:VGA Controller capacity enabled

PCI EXPRESS INTERFACE


DIX_PX VGA_DIS GPIO9 0 0
1:The device won't be recognized as the system's VGA controller
DIX_PX
PEG_TXP5 AA29 Y23 PEG_C_RXP5 C8327 1 2 SCD22U16V2KX-GP PEG_RXP5 BIOS_ROM_EN=1, Config[2:0] defines the ROM type 0 0 1
PEG_TXN5 PCIE_RX5P PCIE_TX5P
Y28 Y24 PEG_C_RXN5 C8328 1 2 SCD22U16V2KX-GP PEG_RXN5 ROMIDCFG[2:0] GPIO[13:11] BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size X X X
PCIE_RX5N PCIE_TX5N DIX_PX (256MB)
DIX_PX
PEG_TXP6 Y30 AB27 PEG_C_RXP6 C8329 1 2 SCD22U16V2KX-GP PEG_RXP6 GPIO21_BB_EN GPIO21 RESERVED 0 0
PEG_TXN6 PCIE_RX6P PCIE_TX6P
W31 PCIE_RX6N PCIE_TX6N AB26 PEG_C_RXN6 C8330 1 2 SCD22U16V2KX-GP PEG_RXN6
DIX_PX 0:Disable external BIOS ROM device
DIX_PX BIOS_ROM_EN GPIO_22_ROMCSB X 0
PEG_TXP7
1:Enable external BIOS ROM device
W29 PCIE_RX7P PCIE_TX7P Y27 PEG_C_RXP7 C8331 1 2 SCD22U16V2KX-GP PEG_RXP7
PEG_TXN7 V28 Y26 PEG_C_RXN7 C8332 1 2 SCD22U16V2KX-GP PEG_RXN7 VIP Device Strap Enable indicates to the software driver that it sense
PCIE_RX7N PCIE_TX7N DIX_PX VIP_DEVICE_STRAP_EN X
V2SYNC whether or not a VIP device is connected on the VIP Host interface. 0
DIX_PX
PEG_TXP8 V30 W24 PEG_C_RXP8 C8336 1 2 SCD22U16V2KX-GP PEG_RXP8
PEG_TXN8 PCIE_RX8P PCIE_TX8P
C U31 PCIE_RX8N PCIE_TX8N W23 PEG_C_RXN8 C8337 1 2 SCD22U16V2KX-GP PEG_RXN8 RSVD H2SYNC RESERVED 0 0 C
DIX_PX
DIX_PX
PEG_TXP9 U29 V27 PEG_C_RXP9 C8338 1 2 SCD22U16V2KX-GP PEG_RXP9 RSVD GENERICC RESERVED 0 0
PEG_TXN9 PCIE_RX9P PCIE_TX9P
T28 PCIE_RX9N PCIE_TX9N U26 PEG_C_RXN9 C8339 1 2 SCD22U16V2KX-GP PEG_RXN9
DIX_PX
DIX_PX AUD[1] HSYNC X 1
PEG_TXP10 T30 U24 PEG_C_RXP10 C8341 1 2 SCD22U16V2KX-GP PEG_RXP10 AUD[1:0]:11-Audio for both DisplayPort and HDMI
PEG_TXN10 PCIE_RX10P PCIE_TX10P
R31 PCIE_RX10N PCIE_TX10N U23 PEG_C_RXN10 C8340 1 2 SCD22U16V2KX-GP PEG_RXN10
DIX_PX AUD[0] VSYNC X 1
DIX_PX
PEG_TXP11 R29 T26 PEG_C_RXP11 C8344 1 2 SCD22U16V2KX-GP PEG_RXP11
PEG_TXN11 PCIE_RX11P PCIE_TX11P PEG_C_RXN11 C8342 SCD22U16V2KX-GP PEG_RXN11
P28 PCIE_RX11N PCIE_TX11N T27 1 2
DIX_PX 3D3V_VGA_S0
DIX_PX
PEG_TXP12 P30 T24 PEG_C_RXP12 C8345 1 2 SCD22U16V2KX-GP PEG_RXP12
PEG_TXN12 PCIE_RX12P PCIE_TX12P PEG_C_RXN12 C8343 SCD22U16V2KX-GP PEG_RXN12 R8301
N31 PCIE_RX12N PCIE_TX12N T23 1 2 GPIO0 85 TX_PW RS_ENB 1 DY 2 3KR2J-2-GP
DIX_PX
DIX_PX GPIO1 85 TX_DEEMPH_EN R8302 1DY 2 3KR2J-2-GP
PEG_TXP13 N29 P27 PEG_C_RXP13 C8347 1 2 SCD22U16V2KX-GP PEG_RXP13 DIS_PX
PEG_TXN13 PCIE_RX13P PCIE_TX13P
M28 PCIE_RX13N PCIE_TX13N P26 PEG_C_RXN13 C8346 1 2 SCD22U16V2KX-GP PEG_RXN13 GPIO2 85 BIF_GEN2_EN_A R8303 1 2 10KR2J-3-GP
DIX_PX
DIX_PX GPIO8 85 GPIO8_ROMSO R8304 1 DY 2 10KR2J-3-GP
PEG_TXP14 M30 P24 PEG_C_RXP14 C8349 1 2 SCD22U16V2KX-GP PEG_RXP14
PEG_TXN14 PCIE_RX14P PCIE_TX14P
L31 PCIE_RX14N PCIE_TX14N P23 PEG_C_RXN14 C8348 1 2 SCD22U16V2KX-GP PEG_RXN14 GPIO9 85 VGA_DIS R8305 1 DY 2 10KR2J-3-GP
DIX_PX
DIX_PX DIS_PX
PEG_TXP15 L29 DIS_PX M27 PEG_C_RXP15 C8334 1 2 SCD22U16V2KX-GP PEG_RXP15 GPIO11 85 CONFIG0 R8306 1 2 10KR2J-3-GP
PEG_TXN15 PCIE_RX15P PCIE_TX15P
K30 PCIE_RX15N PCIE_TX15N N26 PEG_C_RXN15 C8335 1 2 SCD22U16V2KX-GP PEG_RXN15
B R8307 B
DIX_PX GPIO12 85 CONFIG1 1 DY 2 10KR2J-3-GP

GPIO13 85 CONFIG2 R8308 1 DY 2 10KR2J-3-GP


CLOCK
AK30 GPIO22 85 BIOS_ROM_EN R8313 1 DY 2 3KR2J-2-GP
18 CLK_PCIE_VGA PCIE_REFCLKP
18 CLK_PCIE_VGA# AK32 PCIE_REFCLKN
CALIBRATION 1V_VGA_S0 R8314
DIS_PX
GPIO5 85 GPIO5_AC_BATT 1 2 10KR2J-3-GP
DIS_PX JTAG SIGNAL OPTION
PCIE_CALRP Y22 PCIE_CALRP 1 2
DIS_PX R8326 1K27R2F-L-GP Normal Debug pilot run
1 2VGA_PW RGOOD N10 AA22 PCIE_CALRN 1 2 Signal
R8317 10KR2F-2-GP PWRGOOD PCIE_CALRN R8318 DIS_PX 2KR2F-3-GP mode mode mode
20120201PV-R
VGA_RST# AL27 TESTEN "1"(PU) "1"(PU) "0"(PD)
PERST#
1

C8333 SEYMOUR-PRO-S3-GP JTAG_TRST# "0"(PD) "1"(PU) NC


DY SC47P50V2JN-3GP
DIS_PX
2

R8327 1 2 5K1R2F-2-GP JTAG_TCK CLK "1"(PU) NC


85 TESTEN
dGPU reset for PX/SG transitions
DY DIS_PX 20120201PV-R JTAG_TMS "1"(PU) "1"(PU) NC
3D3V_S0
1 2
R8354
0R2J-2-GP
A DIS_PX R8355
<Core Design> A
U8301
5,17,21,32,34,53,54,56,71,96,97 PLT_RST# 1 2 0R2J-2-GPPLT_RST#_VGA 1 A VCC 5

21 PE_GPIO0 2 B DIS_BOCO Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 4 VGA_RST# Taipei Hsien 221, Taiwan, R.O.C.
GND Y VGA_RST# 85
DIS_BOCO
1

Title
U74LVC1G08G-AL5-R-GP-U C8350
73.01G08.EHG SCD1U10V2KX-5GP GPU PCIE/STRAPPING(1/5)
2

Size Document Number Rev


2nd = 73.7SZ08.EAH A3
3rd = 73.01G08.L04 2012 S-Series Richie 13.3 -1
Date: W ednesday, March 14, 2012 Sheet 83 of 103
5 4 3 2 1
5 4 3 2 1

VGA1C 3 OF 7
88 DQA0_[31..0]
GDDR5/DDR3 GDDR5/DDR3 MAA0_8 MAA0_[8..0] 88
DQA0_0 K27 K17 MAA0_0
DQA0_1 DQA0_0 MAA0_0/MAA_0 MAA0_1
J29 DQA0_1 MAA0_1/MAA_1 J20
DQA0_2 H30 H23 MAA0_2
DQA0_3 DQA0_2 MAA0_2/MAA_2 MAA0_3
H32 DQA0_3 MAA0_3/MAA_3 G23
DQA0_4 G29 G24 MAA0_4
DQA0_5 DQA0_4 MAA0_4/MAA_4 MAA0_5
F28 DQA0_5 MAA0_5/MAA_5 H24
DQA0_6 F32 J19 MAA0_6

MEMORY INTERFACE
D D
DQA0_7 DQA0_6 MAA0_6/MAA0_6 MAA0_7
F30 DQA0_7 MAA0_7/MAA0_7 K19 MAA1_[8..0] 89
DQA0_8 C30 J14 MAA1_0
DQA0_9 DQA0_8 MAA1_0/MAA_8 MAA1_1
F27 DQA0_9 MAA1_1/MAA_9 K14
DQA0_10 A28 J11 MAA1_2
DQA0_11 DQA0_10 MAA1_2/MAA_10 MAA1_3
C28 DQA0_11 MAA1_3/MAA_11 J13
DQA0_12 E27 H11 MAA1_4
DQA0_13 DQA0_12 MAA1_4/MAA_12 MAA1_5
G26 DQA0_13 MAA1_5/MAA_BA2 G11
DQA0_14 D26 J16 MAA1_6
DQA0_15 DQA0_14 MAA1_6/MAA_BA0 MAA1_7
F25 DQA0_15 MAA1_7/MAA_BA1 L15
DQA0_16 A25 MAA1_8
DQA0_17 DQA0_16
C25 DQA0_17 WCKA0_0/DQMA0_0 E32 W CKA0_0 88
DQA0_18 E25 E30
DQA0_18 WCKA0B_0/DQMA0_1 W CKA0_0# 88
DQA0_19 D24 A21
DQA0_19 WCKA0_1/DQMA0_2 W CKA0_1 88
DQA0_20 E23 C21
DQA0_20 WCKA0B_1/DQMA0_3 W CKA0_1# 88
DQA0_21 F23 E13
DQA0_21 WCKA1_0/DQMA1_0 W CKA1_0 89
DQA0_22 D22 D12
DQA0_22 WCKA1B_0/DQMA1_1 W CKA1_0# 89
DQA0_23 F21 E3
DQA0_23 WCKA1_1/DQMA1_2 W CKA1_1 89
DQA0_24 E21 F4
DQA0_24 WCKA1B_1/DQMA1_3 W CKA1_1# 89
DQA0_25 D20
DQA0_26 DQA0_25
F19 DQA0_26 EDCA0_0/QSA0_0 H28 EDCA0_0 88
DQA0_27 A19 C27
DQA0_27 EDCA0_1/QSA0_1 EDCA0_1 88
DQA0_28 D18 A23
DQA0_28 EDCA0_2/QSA0_2 EDCA0_2 88
DQA0_29 F17 E19
DQA0_29 EDCA0_3/QSA0_3 EDCA0_3 88
DQA0_30 A17 E15
DQA0_30 EDCA1_0/QSA1_0 EDCA1_0 89
DQA0_31 C17 D10
89 DQA1_[31..0] DQA0_31 EDCA1_1/QSA1_1 EDCA1_1 89
DQA1_0 E17 D6
1D5V_VGA_S0 1D5V_VGA_S0 DQA1_0 EDCA1_2/QSA1_2 EDCA1_2 89
DQA1_1 D16 G5
DQA1_1 EDCA1_3/QSA1_3 EDCA1_3 89
DQA1_2 F15
C DQA1_3 DQA1_2 C
A15 DQA1_3 DDBIA0_0/QSA0_0# H27 DDBIA0_0 88
1

Ra Ra DQA1_4 D14 A27


DQA1_4 DDBIA0_1/QSA0_1# DDBIA0_1 88
R8410 R8411 DQA1_5 F13 C23
40D2R2F-GP 40D2R2F-GP DQA1_5 DDBIA0_2/QSA0_2# DDBIA0_2 88
DIS_PX DIS_PX DQA1_6 A13 C19
DQA1_6 DDBIA0_3/QSA0_3# DDBIA0_3 88
DQA1_7 C13 C15
DQA1_7 DDBIA1_0/QSA1_0# DDBIA1_0 89
DQA1_8 E11 E9 DDBIA1_1 89
2

MVREFDA MVREFSA DQA1_9 DQA1_8 DDBIA1_1/QSA1_1#


A11 DQA1_9 DDBIA1_2/QSA1_2# C5 DDBIA1_2 89
DQA1_10 C11 H4
DQA1_10 DDBIA1_3/QSA1_3# DDBIA1_3 89
1

Rb C8402 Rb C8403 DQA1_11 F11


R8414 SCD1U10V2KX-5GP R8415 SCD1U10V2KX-5GP DQA1_12 DQA1_11
A9 DQA1_12 ADBIA0/ODTA0 L18 ADBIA0 88
100R2F-L1-GP-U 100R2F-L1-GP-U DQA1_13
DIS_PX DIS_PX DIS_PX DIS_PX C9 K16 ADBIA1 89
2

DQA1_14 DQA1_13 ADBIA1/ODTA1


F9 DQA1_14
DQA1_15 D8 H26
2

DQA1_16 DQA1_15 CLKA0 CLKA0 88


E7 DQA1_16 CLKA0# H25 CLKA0# 88
DQA1_17 A7
DQA1_18 DQA1_17
C7 DQA1_18 CLKA1 G9 CLKA1 89
DQA1_19 F7 H9
GDDR3/GDDR5 Memory Stuff Option DQA1_20 A5
DQA1_19
DQA1_20
CLKA1# CLKA1# 89
DQA1_21 E5 G22
DQA1_22 DQA1_21 RASA0# RASA0# 88
C3 DQA1_22 RASA1# G17 RASA1# 89
DQA1_23 E1
DQA1_24 DQA1_23
GDDR5 GDDR3 DDR3 G7 DQA1_24 CASA0# G19 CASA0# 88
DQA1_25 G6 G16
DQA1_26 DQA1_25 CASA1# CASA1# 89
G1 DQA1_26
MVDDQ 1.5V 1.8V/1.5V 1.5V DQA1_27 G3 H22
DQA1_28 DQA1_27 CSA0_0# CSA0#_0 88
J6 DQA1_28 CSA0_1# J22
DQA1_29 J1
DQA1_30 DQA1_29
Ra 40.2R 40.2R 40.2R J3 DQA1_30 CSA1_0# G13 CSA1#_0 89
DQA1_31 J5 K13
B DQA1_31 CSA1_1# B

Rb 100R 100R 100R 1D5V_VGA_S0 MVREFDA


MVREFSA
K26 MVREFDA DIS_PX CKEA0 K20 CKEA0 88
J26 MVREFSA CKEA1 J17 CKEA1 89
R8403
DIS_PX
1 2 240R2F-1-GP MEM_CALRN0 J25 MEM_CALRN0 WEA0# G25 W EA0# 88
R8408 1 2 240R2F-1-GP MEM_CALRP0 K25 H10
MEM_CALRP0 WEA1# W EA1# 89
DIS_PX

R8405 R8402
1 2DRAM_RST_1 1 2 DRAM_RST L10 GDDR5 / DDR3
88,89 MEM_RST DRAM_RST#
51R2J-2-GP 10R2J-2-GP G20 MAA0_8
TP8450 MAA0_8/MAA_13
R_MEM_2 R_MEM_1 1CLKTESTA K8 CLKTESTA MAA1_8/RSVD G14 MAA1_8
1

DIS_PX DIS_PX R8404 TP8451 1CLKTESTB L7 CLKTESTB


2

C8401
C_MEM 5K1R2F-2-GP
R_MEM_3 DIS_PX SEYMOUR-PRO-S3-GP
SC120P50V2JN-1GP
1

DIS_PX
2

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU Memory(2/5)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 84 of 103
5 4 3 2 1
5 4 3 2 1

VGA1B 2 OF 7 3D3V_VGA_S0

TXCAP_DPA3P
AF2 LVDS Interface
AF4

4
3
TXCAM_DPA3N
Y11
VRAM ID TABLE 1D8V_VGA_S0
AE9
L9
DVCLK
DVCNTL_0 TX0P_DPA2P
AG3
AG5 RN8504
VGA1F 6 OF 7
DVCNTL_1 DVO DPA TX0M_DPA2N SRN2K2J-1-GP RN8501
N9
DVCNTL_2
MEM MEM MEM MEM MEM ID TX1P_DPA1P
AH3 DIS_PX SRN10KJ-5-GP
ID3 ID2 ID1 ID0 DIE Ver AE8 AH1 LVDS CONTROL AB11 VARY_BL 1 4
VALUE Vendor & PN

1
2
DVDATA_12 TX1M_DPA1N Q8503 VARY_BL DIGON
AD9 AB12 2 3
DVDATA_11 GPIO_VGA_04_CLK DIGON
NC NC 0 0 0 AC10 AK3 1 6

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP
PCH_KBC_CLK 18,27,28

2
Samsung(128X16) K4G20325FC-HC04 C DVDATA_10 TX2P_DPA0P
AD7 AK1
DVDATA_9 TX2M_DPA0N
NC NC 1 0 2 Samsung(128X16) K4G20325FD-FC04 D AC8
DVDATA_8
2 5 DY

R8523

R8521

R8520

R8519
DY DY AC7
DVDATA_7 TXCBP_DPB3P
AK5 DIS_PX
NC NC 0 1 1 Hynix(128MX16) H5GQ2H24MFR-T2C M AB9
DVDATA_6 TXCBM_DPB3N
AM3 3 4
TXCLK_UP_DPF3P
AH20
D AB8 AJ19 D

1
DVDATA_5 2N7002KDW-GP TXCLK_UN_DPF3N
NC NC 1 1 3 Hynix(128MX16) H5GQ2H24AFR-T2C A DIS_PX_VRAMID DIS_PX_VRAMIDMEM_ID3 AB7
DVDATA_4 TX3P_DPB2P
AK6
AB4 AM5 PCH_KBC_DATA 18,27,28 AL21
MEM_ID2 DVDATA_3 DPB TX3M_DPB2N TXOUT_U0P_DPF2P
NC NC 0 0 0 Elpida(128MX16) EDW2032BBBG-50-F B
AB2
DVDATA_2 TXOUT_U0N_DPF2N
AK20
MEM_ID1 Y8 AJ7 GPIO_VGA_03_DATA
DVDATA_1 TX4P_DPB1P
NC NC NC NC NC UMA DIS_PX_VRAMID DIS_PX_VRAMIDMEM_ID0 Y7
DVDATA_0 TX4M_DPB1N
AH6 84.2N702.A3F TXOUT_U1P_DPF1P
AH22
2nd = 84.2N702.E3F AJ21

10KR2J-3-GP
2

2
Reserve 0= Old Die VBIOS 1 : Samsung TXOUT_U1N_DPF1N
AK8 3rd = 84.2N702.F3F

10KR2J-3-GP
Pul-High 1= New Die VBIOS 2 : Hynix TX5P_DPB0P
AL7 AL23
TX5M_DPB0N TXOUT_U2P_DPF0P

R8533

R8534
Resistor for VBIOS 3 : Elpida 1D8V_VGA_S0 AK22
MEM_ID2/MEM_ID3 TXOUT_U2N_DPF0N
W6 DPC AK24

1
DPC_VDD18 TXOUT_U3P
V6 AJ23
DP_VSSR TXOUT_U3N
V4
TXCCP_DPC3P
AC6 U5
DPC_VDD18 TXCCM_DPC3N LVTMDP
AC5
1V_VGA_S0 DPC_VDD18
L8507 W3
TX0P_DPC2P
DIS_PX 110mA DPC_VDD10
AA5
DPC_VDD10 TX0M_DPC2N
V2
TXCLK_LP_DPE3P
AL15
1 2 AA6 AK14
DPC_VDD10 TXCLK_LN_DPE3N
Y4
FCM1005MF-121T03-GP TX1P_DPC1P
DY DIS_PX DIS_PX TX1M_DPC1N
W5
TXOUT_L0P_DPE2P
AH16
68.00217.701 AJ15

1
TXOUT_L0N_DPE2N
U1 AA3
C8526 C8527 C8528 DP_VSSR TX2P_DPC0P
2nd = 68.00084.B21 W1
DP_VSSR TX2M_DPC0N
Y2
R8531
DIS_PX TXOUT_L1P_DPE1P
AL17
U3 AK16

2
DP_VSSR DPC_CALR TXOUT_L1N_DPE1N
Y6 J8 2 1 150R2F-1-GP
DP_VSSR DPC_CALR
AA1 DIS_PX AH18

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
DP_VSSR TXOUT_L2P_DPE0P
AJ17
TXOUT_L2N_DPE0N
AL19
TXOUT_L3P
AK18
I2C TXOUT_L3N

R1
SCL
R3
SDA SEYMOUR-PRO-S3-GP
R
AM26 20120116PV-R
GENERAL PURPOSE I/O AK26
R#
83 TX_PWRS_ENB U6
GPIO_0
20111220PV D8550 83 TX_DEEMPH_EN U10
GPIO_1 G
AL25
83 BIF_GEN2_EN_A T10 AJ25
GPIO_VGA_03_DATA U8 GPIO_2 G#
C
19,27 ADP_PRES_OUT K A C
GPIO_VGA_04_CLK GPIO_3_SMBDATA
U7 AH24
1SS355GP-GP GPIO_4_SMBCLK B
83 GPIO5_AC_BATT T9 AG25
TPAD14-OP
TP8505 GPIO6_VGA GPIO_5_AC_BATT DAC1 B#
83.00355.F1F 1 T8
GPIO_6
2nd = 83.00355.D1F T7
GPIO_7_BLON HSYNC
AH26
DIS_PX 83 GPIO8_ROMSO P10
GPIO_8_ROMSO VSYNC
AJ27
83 VGA_DIS P4
TPAD14-OP
TP8510 GPIO_10_ROMSCK GPIO_9_ROMSI R8514
1 P2
GPIO_10_ROMSCK GPU_RSET
N6 AD22 1 2 499R2F-2-GP
GPU Power ID Table 83
83
CONFIG0
CONFIG1 N5
GPIO_11
GPIO_12
RSET AVDD_A2VDDQ
DIS_PX CTF setpoint is 118°C, and is programmed
83 CONFIG2 N3 AG24
GPIO_13 AVDD
GPU SIDE UP1527QQDD
PWRCNTL_0
Y9
N1
GPIO_14_HPD2 AVSSQ
AE22
1D8V_VGA_S0
during ASIC initialization.

THERMTRIP_VGA_R
92 PWRCNTL_0

THERMTRIP_Q8550
GPIO16_SSIN GPIO_15_PWRCNTL_0
GPIO_15_PWRCNTL_0 GPIO_20_PWRCNTL_1 VGA_CORE TPAD14-OP
TP8502 1 M4
GPIO_16 VDD1DI
AE23 45mA
R6 AD23 R8505
GPIO18_VGA GPIO_17_THERMAL_INT VSS1DI
0 0 1V TPAD14-OP
TP8507 1 W10
GPIO_18_HPD3
10KR2J-3-GP
THERMTRIP_VGA M2
PWRCNTL_1 GPIO_19_CTF
1 0 0.9V 92 PWRCNTL_1 P8 SEYMOUR/PARK AM12 2 1THERMTRIP_VGA
TPAD14-OP
TP8520 GPIO21_BB_EN GPIO_20_PWRCNTL_1 NC#AM12/R2
1 P7 AK12
GPIO_21_BB_EN NC#AK12/R2#
83 BIOS_ROM_EN N8 20120116PV-R DIS_PX DIS_PX

2
PEG_CLKREQ# GPIO_22_ROMCSB
3D3V_VGA_S0 DY2 1 R8553 N7 AL11 AVDD_A2VDDQ 1D8V_VGA_S0

1
10KR2J-3-GP GPIO_23_CLKREQB NC#AL11/G2 R8507 C8501 R8554
AJ11 70mA
NC#AJ11/G2# SCD1U10V2KX-5GP 10KR2J-3-GP
L6 2 1

4
JTAG_TRST# 0R0603-PAD-1-GP
20120201PV-R L5 AK10 DIS_PX

2
1

1
JTAG_TDI NC#AK10/B2 C8510 C8506 C8502 Q8550
L3 AL9 DIS_PX

1
JTAG_TCK NC#AL9/B2# SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC4D7U6D3V3KX-GP
L1 2N7002KDW-GP
JTAG_TMS
DIS_PX R8503 1 2 3KR2J-2-GP PWRCNTL_0 K4 84.2N702.A3F

2
JTAG_TDO
R8504 1 2 3KR2J-2-GP PWRCNTL_1 TESTEN K7 AH12 2nd = 84.2N702.E3F

3
83 TESTEN TESTEN SWAPLOCKB/C
DIS_PX 20120112 PV-R AF24
TESTEN_LEGACY NC#AM10/Y
AM10 DIS_PX DIS_PX DIS_PX 20120112 PV-R 3rd = 84.2N702.F3F
R8509 AJ9 R8541
NC#AJ9/COMP Q8550_2
86 PX_EN 2 1 83 VGA_RST# 1 2

1
AB13 C8523
2

0R0402-PAD GENERICA 0R0402-PAD SCD1U10V2KX-5GP


W8 AL13
R8513 GENERICB GENLK_CLK
W9 AJ13 DY DIS_PX

2
5K1R2F-2-GP GENERICC GENLK_V2SYNC
W7
1D8V_VGA_S0 GENERICD
DIS_PX AD10
GENERICE_HPD4 5,22 H_THRMTRIP#
AD19
1

NC#AD19/VDD2IDI
AC14 AC19
1

PX_EN_R HPD1 NC#AC19/VSS2IDI


AB16
PX_EN
DIS_PX R8515 AE20 Intel is H_THERMTRIP#
B 499R2F-2-GP NC#AE20/A2VDD B
1D8V_VGA_S0 DPLL_PVDD AE17
2

GPU_VREFG NC#AE27/A2VDDQ
20120112 PV-R
R8512 DIS_PX DIS_PX AE19
75mA
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

TSVSSQ/A2VSSQ
2 1 0R0402-PAD
1

DY R8516 C8514 AC16 DY


249R2F-GP SCD1U10V2KX-5GP VREFG R2SET 2
AG13 1 R8501
1

SWAPLOCKA/R2SET 0R2J-2-GP
2

C8505 C8515 C8516


2

SC4D7U6D3V3KX-GP
2

DDC/AUX AE6 3D3V_VGA_S0


PLL/CLOCK DDC1CLK
DIS_PX DIS_PX DDC1DATA
AE5
AF14
DPLL_PVDD
AE14 AD2
1V_VGA_S0 DPLL_VDDC DPLL_PVSS AUX1P
L8506 DIS_PX AUX1N
AD4

125mA 1 2 AD14 AC11

2
PBY160808T-471Y-N-GP DPLL_VDDC DDC2CLK
DIS_PX AC13
SC1U6D3V2KX-GP

DDC2DATA R8525 R8526


68.00206.261 DY
1

1XTALIN_1
C8518

2nd = 68.00335.061 C8517 C8519 TP8514 AM28 AD13 10KR2J-3-GP DY 10KR2J-3-GP DY


XTALIN AUX2P
3rd = 68.00214.211 SCD1U10V2KX-5GP TP8515 1XTALOUT_1 AK28 AD11
SC4D7U6D3V3KX-GP XTALOUT AUX2N
20120112 PV-R
2

1
XO_IN1 R8510 1 2 0R0402-PAD XO_IN1_R AC22 AD20
XO_IN2 R8517 1 XO_IN DDCCLK_AUX3P
DIS_PX 2 0R0402-PAD XO_IN2_R AB22 AC20 SS_SEL0
XO_IN2 DDCDATA_AUX3N SS_SEL1
1

EC8503 EC8504 AE16


SC8P250V2CC-GP SC8P250V2CC-GP DDCCLK_AUX5P
AD16

2
DDCDATA_AUX5N
DIS_PX DIS_PX
2

CAD NOTE: EC5803,EC8504 Close VGA1 20111102PV AC1 20120116PV-R R8527 R8528
DPLUS T4 THERMAL DDC6CLK 10KR2J-3-GP 10KR2J-3-GP
1 AC3
TPAD14-OP
TP8551 DMINUS T2 DPLUS DDC6DATA
1
TPAD14-OP
TP8552 DMINUS
20120112 PV-R

1
1D8V_VGA_S0 TSVDD
R8524 R5 DIS_PX DIS_PX
5mA 1 2 0R0402-PAD AD17
TS_FDO
TSVDD
AC17
TSVSS DIS_PX
1

C8520 DY C8521 C8522


SC4D7U6D3V3KX-GP SC1U6D3V2KX-GP SCD1U10V2KX-5GP 3D3V_VGA_S0
DIS_PX DIS_PX SEYMOUR-PRO-S3-GP 2nd = 68.00084.B21
2

A
68.00217.701 A
DIS_PX 3D3V_16020_1
1 2
L8508
FCM1005MF-121T03-GP
DY R8502 2nd = 68.00084.B21 U8501
1 2 1MR2F-GP 68.00217.701
82.30034.641 XO_IN1 <Core Design>
DIS_PX 3D3V_16020_2
4
VDD_100M 27M
9
2nd = 82.30034.651 1 2 8
VDD_27M
X8501 3rd = 82.30034.681 L8509 5 XO_IN2
100M
Wistron Corporation
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
FCM1005MF-121T03-GP
SC5D6P50V2CN-1GP

XTALIN XTALIN
XIN DIS_PX
1 2 1 4 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
1

1
C8524 SC18P50V2JN-1-GP C8503 C8504 C8531 C8532 XTALOUT 10 Taipei Hsien 221, Taiwan, R.O.C.
SC56P50V2JN-2GP XOUT
DIS_PX C8525 SS_SEL0 GND_27M
2
DIS_PX 7 6 Title
2

2
XTALOUT SS_SEL1 SS_SEL0 GND_100M
2 3 1 2 SC18P50V2JN-1-GP DIS_PX 3 11
SS_SEL1 GND
DIS_PX GPU_DP/LVDS/CRT/GPIO(3/5)
20120131PVR Size Document Number Rev
XTAL-27MHZ-85-GP 6V40088DNBGI8-GP
DIS_PX A2
2012 S-Series Richie 13.3 -1
DIS_PX DIS_PX
Date: Wednesday, March 14, 2012 Sheet 85 of 103
5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0
1A

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8606

C8607

C8608

C8609

C8610

C8611

C8612
1

1
VGA1D 4 OF 7 1D8V_VGA_S0

MEM I/O

2
PCIE
H13 AB23
440mA

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP
VDDR1 PCIE_VDDR

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8613

C8615

C8616

C8734
H16 AC23

1
VDDR1 PCIE_VDDR
H19 AD24
VDDR1 PCIE_VDDR
J10 AE24

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP
VDDR1 PCIE_VDDR
J23 AE25

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

2
VDDR1 PCIE_VDDR
DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8621

C8622

C8623

C8624

C8625

C8626

C8627
J24 AE26

1
VDDR1 PCIE_VDDR
J9 AF25
VDDR1 PCIE_VDDR 1V_VGA_S0
K10 AG26
VDDR1 PCIE_VDDR
K23
2

2
VDDR1
K24 2A
VDDR1
K9 L23

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
D D

SC4D7U6D3V3KX-GP
VDDR1 PCIE_VDDC

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8628

C8629

C8630

C8631

C8632

C8633

C8602

C8732
L11 L24

1
VDDR1 PCIE_VDDC
L12 L25
VDDR1 PCIE_VDDC
L13 L26
SC10U6D3V5KX-1GP

SC22U6D3V3MX-L-GP
VDDR1 PCIE_VDDC
DIS_PX

DIS_PX
C8697

L20 M22

2
1

VDDR1 PCIE_VDDC
C8698
L21 N22
VDDR1 PCIE_VDDC
L22 N23
VDDR1 PCIE_VDDC
N24
2

PCIE_VDDC
R22
PCIE_VDDC
T22
VDDC_CT LEVEL PCIE_VDDC
U22
1D8V_VGA_S0 TRANSLATION PCIE_VDDC VGA_CORE
V22
PCIE_VDDC
AA20
VDD_CT
AA21
VDD_CT 11A
DIS_PX 219mA AB20 AA15

SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP

SCD1U10V2KX-5GP SC1U6D3V2KX-GP SC1U6D3V2KX-GP

SC1U6D3V2KX-GP SC1U6D3V2KX-GP

SC1U6D3V2KX-GP SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP SC4D7U6D3V3KX-GP

VDD_CT VDDC

C8650

C8664

C8645

C8644
1 2 AB21 CORE N15
VDD_CT VDDC
DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8699

C8652

C8653
L8608 N17

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP SCD1U10V2KX-5GP
1

1
FCM1005MF-121T03-GP VDDC
R13
I/O VDDC
68.00217.701 VDDC
R16
2nd = 68.00084.B21 AA17 R18
2

2
VDDR3 VDDC
AA18 Y21
3D3V_VGA_S0 VDDR3 VDDC
AB17 T12
VDDR3 VDDC
AB18 T15

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
VDDR3 VDDC

C8646

C8665

C8669

C8670

C8672

C8671
R8605 T17
VDDC

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
2 1 3D3V_VGA_VDDR3 V12 T20

1
VDDR4 VDDC
DIS_PX

DIS_PX

DIS_PX
C8700

C8666

C8667

0R0603-PAD-1-GP Y12 U13


SC1U6D3V2KX-GP
1

VDDR4 VDDC
20120116PV-R U12
VDDR4 VDDC
U16
U18

2
VDDC
AA11 V21
2

NC#AA11 VDDC

POWER
AA12 V15
NC#AA12 VDDC
V17
VDDC
V11 V20

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP
NC#V11 VDDC

DIS_PX

DIS_PX

DIS_PX

DIS_PX
C8680

C8676

C8736

C8739

C8737
U11 Y13

1
NC#U11 VDDC
170mA SC1U6D3V2KX-GP SCD1U10V2KX-5GP VDDC
Y16
Y18
VDDC
DIS_PX

DIS_PX
C8673

C8674

M11

2
PCIE_PVDD VDDC
M12 DY
1

MEM CLK VDDC


DIS_PX
SC4D7U6D3V3KX-GP

1 2 L17
NC#L17_VDDRHA
DIS_PX

DIS_PX
C8603

C8733

C8690

L8604
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
2

2
1

FCM1005MF-121T03-GP L16
NC#L16_VSSRHA
C 68.00217.701 PCIE_PVDD
C
2nd = 68.00084.B21
DY
2

PLL BIF_VDDC
AM30
PCIE_VDDR C8601
R21
MPV18 BIF_VDDC
U21 1 2
MPV18 BIF_VDDC

DIS_PX DIS_PX VGA_CORE


75mA L8
SC4D7U6D3V3KX-GP

NC#L8_MPV18 SC1U6D3V2KX-GP
1 2
DIS_PX

DIS_PX

DIS_PX
C8741

C8740

C8691

L8607
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
1

FCM1005MF-121T03-GP SPV18 ISOLATED


CORE I/O 2A
68.00217.701 M13

SC10U6D3V3MX-GP
VDDCI

SCD1U10V2KX-5GP
2nd = 68.00084.B21 H7 M15

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP
2

SPV18 VDDCI

DIS_PX

C8738
M16

DIS_PX

DIS_PX

DIS_PX
2

1
VDDCI
M17
VDDCI

C8648
1V_VGA_S0 DIS_PX M18 DY

C8679
VDDCI
M20

C8677

C8649
1

2
VDDCI
DIS_PX 100mA SPV10
H8
SPV10 VDDCI
M21
1 2 N20
L8606 VDDCI
J7
SC4D7U6D3V3KX-GP

SPVSS
DIS_PX

DIS_PX

DIS_PX
C8724

C8730

C8731

FCM1005MF-121T03-GP
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
1

68.00217.701
2nd = 68.00084.B21
SPV18 SEYMOUR-PRO-S3-GP
2

DIS_PX 50mA
1 2
SC4D7U6D3V3KX-GP
DIS_PX

DIS_PX

DIS_PX
C8729

C8692

C8694

L8605
SC1U6D3V2KX-GP

SCD1U10V2KX-5GP
1

FCM1005MF-121T03-GP
68.00217.701
2nd = 68.00084.B21
2

20120116PV-R
R8602 100mA
2 1
B 0R0603-PAD-1-GP B

BIF_VDDC Q8601 Q8603 VGA_CORE BIF_VDDC U8602 U8604 1V_VGA_S0


AO3400A-GP AO3400A-GP AO3418-GP AO3418-GP

S D BIF_VDDC_CORE D S S D BIF_VDDC_1V D S
DY DIS_BACO DY DIS_BACO DY DIS_BACO DY DIS_BACO PX_EN 8209A_EN/DEM_VGA PX_MODE PX_EN# PX_EN## BIF_VDDC
5V_S0
5V_S0
84.03400.B37 84.03400.B37 84.03418.031 84.03418.031
G

2nd = 84.03404.C31 2nd = 84.03404.C31 DY DIS_BACO Non-BACO 0 1 1 0 1 VGA_Core


1

DY DIS_BACO 3rd = 84.03203.031 3rd = 84.03203.031


1

R8604
R8603 1KR2J-1-GP BACO 1 0 0 1 0 1V_VGA
1KR2J-1-GP
2

PX_EN# PX_EN# = High, BIF_VDDC = 1V_VGA_S0


2

PX_EN##
PX_EN## = High, BIF_VDDC = VGA_CORE

U8605 3D3V_S0
Q8602
18,22,92,93,96,97 PE_PWRGD 1
B PX_EN#
5 4 3
VCC
92,93 8209A_EN/DEM_VGA 2
A PX_MODE
4 5 2
Y
3
GND PX_EN## 6 1
74LVC1G08GW-1-GP
Q8605
DY DIS_BACO 2N7002KDW-GP
PX_EN Mode BIF_VDDC S 84.2N702.A3F
8209A_EN/DEM_VGA
2nd = 84.2N702.E3F
0 Normal VGA_Core D 3rd = 84.2N702.F3F
A 85 PX_EN G DY DIS_BACO DY DIS_BACO A
1 BACO 1V_VGA
2N7002K-2-GP
84.2N702.J31
2nd = 84.07002.I31 <Core Design>
3rd = 84.2N702.W31

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_POWER(4/5)
Size Document Number Rev
A2 -1
2012 S-Series Richie 13.3
Date: Wednesday, March 14, 2012 Sheet 86 of 103
5 4 3 2 1
5 4 3 2 1

D VGA1E 5 OF 7 D

AA27 PCIE_VSS GND A3


AB24 PCIE_VSS GND A30
AB32 PCIE_VSS GND AA13
AC24 PCIE_VSS GND AA16
AC26 PCIE_VSS GND AB10
AC27 PCIE_VSS GND AB15
AD25 PCIE_VSS GND AB6
AD32 PCIE_VSS GND AC9
AE27 AD6 1D8V_VGA_S0 1D8V_VGA_S0
PCIE_VSS GND VGA1G 7 OF 7
AF32 PCIE_VSS GND AD8
AG27 PCIE_VSS GND AE7
AH32 AG12 DP E/F POWER DP A/B POWER
PCIE_VSS GND
K28 PCIE_VSS GND AH10
K32 PCIE_VSS GND AH28 AG15 DPEF_VDD18 DPAB_VDD18 AE11
L27 PCIE_VSS GND B10 AG16 DPEF_VDD18 DPAB_VDD18 AF11
M32 PCIE_VSS GND B12
N25 B14 1V_VGA_S0 1V_VGA_S0
PCIE_VSS GND
N27 PCIE_VSS GND B16
P25 PCIE_VSS GND B18 AG20 DPEF_VDD10 DPAB_VDD10 AF6
P32 PCIE_VSS GND B20 AG21 DPEF_VDD10 DPAB_VDD10 AF7
R27 PCIE_VSS GND B22
T25 PCIE_VSS GND B24
T32 PCIE_VSS GND B26 AG14 DP_VSSR DP_VSSR AE1
U25 PCIE_VSS GND B6 AH14 DP_VSSR DP_VSSR AE3
U27 PCIE_VSS GND B8 AM14 DP_VSSR DP_VSSR AG1
C V32 C1 AM16 AG6 C
PCIE_VSS GND DP_VSSR DP_VSSR
W25 PCIE_VSS GND C32 AM18 DP_VSSR DP_VSSR AH5
W26 PCIE_VSS GND E28
W27 F10 1D8V_VGA_S0 1D8V_VGA_S0
PCIE_VSS GND
Y25 PCIE_VSS GND F12
Y32 PCIE_VSS GND F14 AF16 DPEF_VDD18 DPAB_VDD18 AE13
GND F16 AG17 DPEF_VDD18 DPAB_VDD18 AF13
GND F18
F2 1V_VGA_S0 1V_VGA_S0
GND
GND F20
M6 GND GND F22 AF22 DPEF_VDD10 DPAB_VDD10 AF8
N11 GND GND F24 AG22 DPEF_VDD10 DPAB_VDD10 AF9
N12 GND GND F26
N13 GND GND F6
N16 F8 AF23 AF10
N18
N21
GND
GND
GND
GND GND
GND
GND
G10
G27
AG23
AM20
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
DP_VSSR
AG9
AH8
P6 GND GND G31 AM22 DP_VSSR DP_VSSR AM6
P9 GND GND G8 AM24 DP_VSSR DP_VSSR AM8
R12 GND GND H14
R15 GND GND H17
R17 H2 DIS_PX R8703
GND GND
R20 GND GND H20
T13 GND GND H6 1 2DPCD_CALR AF17 DPEF_CALR DPAB_CALR AE10 DPAB_CALR 1 2
T16 J27 R8701 150R2F-1-GP 150R2F-1-GP
GND GND 1D8V_VGA_S0
T18 GND GND J31
1D8V_VGA_S0
DIS_PX
T21 GND GND K11
T6 K2 AG18 DP PLL POWER AG8
GND GND DPEF_VDD18 DPAB_VDD18
U15 GND GND K22 AF19 DP_VSSR DP_VSSR AG7
B 1D8V_VGA_S0 B
U17 GND GND K6
U20 GND DIS_PX
U9 GND
V13 GND AG19 DPEF_VDD18 DPAB_VDD18 AG10
V16 GND AF20 DP_VSSR DP_VSSR AG11
V18 GND
Y10 GND
Y15 GND
Y17 GND VSS_MECH A32 VGA_VSS_MECH1 TPAD14-OP-GP
1 TP8701 SEYMOUR-PRO-S3-GP
Y20 GND VSS_MECH AM1 VGA_VSS_MECH2 TPAD14-OP-GP
1 TP8702
R11 GND DIS_PX VSS_MECH AM32 VGA_VSS_MECH3 TPAD14-OP-GP
1 TP8703
T11 GND

SEYMOUR-PRO-S3-GP

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DPPWR/GND(5/5)
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 87 of 103
5 4 3 2 1
5 4 3 2 1

1D5V_VGA_S0 VRAM2A 1 OF 2

1D5V_VGA_S0 VRAM1A 1 OF 2 C5 B5
VDD VSS
C10 B10
VDD VSS
C5 B5 D11 D10
VDD VSS VDD VSS
C10 B10 G1 G5
VDD VSS VDD VSS
D11 D10 G4 G10
VDD VSS VDD VSS
G1 G5 G11 H1
VDD VSS VDD VSS
G4 G10 G14 H14
VDD VSS VDD VSS
G11 H1 L1 K1
VDD VSS VDD VSS
G14 H14 L4 K14
VDD VSS VDD VSS
D L1 K1 L11 L5 D
VDD VSS VDD VSS
L4 K14 L14 L10
VDD VSS VDD VSS
L11 L5 P11 P10
VDD VSS VDD VSS
L14 L10 R5 T5
VDD VSS 1D5V_VGA_S0 VDD VSS
P11 P10 R10 T10
VDD VSS VDD VSS
R5 T5
1D5V_VGA_S0 R10
VDD
VDD
VSS
VSS
T10 GDDR5 Table B1
B3
VDDQ
VDDQ
VSSQ
VSSQ
A1
A3
B1 A1 B12 A12
VDDQ VSSQ VDDQ VSSQ
B3 A3 B14 A14
VDDQ VSSQ VDDQ VSSQ
B12
VDDQ VSSQ
A12 Vender Vandor Part Part Number D1
VDDQ VSSQ
C1
B14 A14 D3 C3
VDDQ VSSQ VDDQ VSSQ
D1 C1 D12 C4
VDDQ VSSQ VDDQ VSSQ
D3
VDDQ VSSQ
C3 HYNIX H5GQ2H24AFR-T2C 635930-352 D14
VDDQ VSSQ
C11
D12 C4 E5 C12
VDDQ VSSQ VDDQ VSSQ
D14 C11 E10 C14
VDDQ VSSQ VDDQ VSSQ
E5
VDDQ VSSQ
C12 SAMSUNG K4G20325FD-FC04 635930-952 F1
VDDQ VSSQ
E1
E10 C14 F3 E3
VDDQ VSSQ VDDQ VSSQ
F1 E1 F12 E12
VDDQ VSSQ VDDQ VSSQ
F3
VDDQ VSSQ
E3 ELPIDA EDW1032BBBG-50-F 635930-152 F14
VDDQ VSSQ
E14
F12 E12 G2 F5
VDDQ VSSQ VDDQ VSSQ
F14 E14 G13 F10
VDDQ VSSQ VDDQ VSSQ
G2 F5 H3 H2
VDDQ VSSQ VDDQ VSSQ
G13 F10 H12 H13
VDDQ VSSQ VDDQ VSSQ
H3 H2 K3 K2
VDDQ VSSQ VDDQ VSSQ
H12 H13 K12 K13
VDDQ VSSQ VDDQ VSSQ
K3 K2 L2 M5
VDDQ VSSQ VDDQ VSSQ
K12 K13 L13 M10
VDDQ VSSQ VDDQ VSSQ
L2 M5 M1 N1
VDDQ VSSQ VDDQ VSSQ
L13 M10 M3 N3
VDDQ VSSQ VDDQ VSSQ
M1 N1 M12 N12
VDDQ VSSQ VDDQ VSSQ
M3 N3 M14 N14
VDDQ VSSQ VDDQ VSSQ
M12 N12 N5 R1
VDDQ VSSQ VDDQ VSSQ
M14 N14 N10 R3
VDDQ VSSQ VDDQ VSSQ
N5
VDDQ VSSQ
R1
C8862
DIS_PX P1
VDDQ VSSQ
R4
DIS_PX N10 R3 1D5V_VGA_S0 1 2 SC1U6D3V2KX-GP P3 R11
VDDQ VSSQ VDDQ VSSQ
P1 R4 P12 R12
C8824 SC1U6D3V2KX-GP VDDQ VSSQ R8823 1 VDDQ VSSQ
1D5V_VGA_S0 1 2 P3 R11 DIS_PX 22K37R2F-GP P14 R14
VDDQ VSSQ R8822 1 VDDQ VSSQ
DIS_PXR8814 P12 R12 DIS_PX 2 5K49R2F-GP T1 U1
VDDQ VSSQ VDDQ VSSQ
1 2 2K37R2F-GP P14 R14 DIS_PX C8865 1 2 SC1U6D3V2KX-GP T3 U3
R8815 1 VDDQ VSSQ VDDQ VSSQ
DIS_PX 2 5K49R2F-GP T1 U1 T12 U12
C8825 1 SC1U6D3V2KX-GP VDDQ VSSQ VDDQ VSSQ
C DIS_PX 2 T3
VDDQ VSSQ
U3
C8864 1 SC1U6D3V2KX-GP
T14
VDDQ VSSQ
U14 C
T12
VDDQ VSSQ
U12 DIS_PX R8820 1
2
VREFC_A1
DIS_PX T14 U14 1D5V_VGA_S0 DIS_PX 2 2K37R2F-GP J14 A5
C8826 SC1U6D3V2KX-GP VDDQ VSSQ R8821 1 VREFC VPP/NC#A5
1 2 DIS_PX 2 5K49R2F-GP U5
R8816 1 VREFC_A0 VREFD1_A1 VPP/NC#U5
1D5V_VGA_S0 DIS_PX 2 2K37R2F-GP J14 A5 DIS_PX C8863 1 2 SC1U6D3V2KX-GP A10
R8817 1 VREFC VPP/NC#A5 VREFD2_A1 VREFD
DIS_PX 2 5K49R2F-GP U5 DIS_PX C8867 1 2 SC1U6D3V2KX-GP U10 DIS_PX
C8827 SC1U6D3V2KX-GP VREFD1_A0 VPP/NC#U5 R8824 1 VREFD
DIS_PX 1 2 A10 1D5V_VGA_S0 DIS_PX 2 2K37R2F-GP
C8829 SC1U6D3V2KX-GP VREFD2_A0 VREFD R8825 1
DIS_PX 1 2 U10 DIS_PX DIS_PX 2 5K49R2F-GP
R8818 1 VREFD
1D5V_VGA_S0 DIS_PX 2 2K37R2F-GP DIS_PX C8866 1 2 SC1U6D3V2KX-GP H5GQ2H24MFR-T2C-GP
DIS_PX R8819 1 2 5K49R2F-GP 20110817SI
DIS_PX C8828 1 2 SC1U6D3V2KX-GP H5GQ2H24MFR-T2C-GP DQA0_[31..0] 84
20110817SI 84 MAA0_[8..0] VRAM2B 2 OF 2
84 MAA0_[8..0] DQA0_[31..0] 84
VRAM1B 2 OF 2 MAA0_0 K4 DQ24| DQ0 A4 DQA0_31
MAA0_6 A8/A7 DQA0_29
H5 DQ25| DQ1 A2
MAA0_7 DQA0_19 MAA0_7 A9/A1 DQA0_30
K4 DQ24| DQ0 A4 H4 DQ26| DQ2 B4
MAA0_1 A8/A7 DQA0_21 MAA0_1 A10/A0 DQA0_28
H5 DQ25| DQ1 A2 K5 DQ27| DQ3 B2
MAA0_0 A9/A1 DQA0_16 MAA0_8 A11/A6 DQA0_27
H4 DQ26| DQ2 B4 J5 DQ28| DQ4 E4
MAA0_6 A10/A0 DQA0_17 A12/RFU#J5/NC#J5 DQA0_26
K5 DQ27| DQ3 B2 DQ29| DQ5 E2
MAA0_8 A11/A6 DQA0_22 MAA0_4 DQA0_25
J5 DQ28| DQ4 E4 H11 DQ30| DQ6 F4
A12/RFU#J5/NC#J5 DQA0_23 MAA0_3 BA0/A2 DQA0_24
DQ29| DQ5 E2 K10 DQ31| DQ7 F2
MAA0_2 DQA0_20 MAA0_2 BA1/A5
H11 DQ30| DQ6 F4 K11 DQ16| DQ8 A11
1D5V_VGA_S0 MAA0_5 BA0/A2 DQA0_18 MAA0_5 BA2/A4
K10 DQ31| DQ7 F2 H10 DQ17| DQ9 A13
MAA0_4 BA1/A5 BA3/A3
K11 DQ16| DQ8 A11 DQ18| DQ10 B11
MAA0_3 BA2/A4
H10 DQ17| DQ9 A13 84 ADBIA0 J4 DQ19| DQ11 B13
BA3/A3 ABI#
DQ18| DQ10 B11 84 CASA0# G3 DQ20| DQ12 E11
RAS#
DIS_PX

DIS_PX

84 ADBIA0 J4 DQ19| DQ11 B13 84 WEA0# G12 DQ21| DQ13 E13


1

ABI# CS#
G3 E11 L3 F11
60D4R2F-GP

60D4R2F-GP

84 RASA0# RAS# DQ20| DQ12 84 RASA0# CAS# DQ22| DQ14


R8809

R8810

84 CSA0#_0 G12 DQ21| DQ13 E13 84 CSA0#_0 L12 DQ23| DQ15 F13
CS# WE# DQA0_15
84 CASA0# L3 DQ22| DQ14 F11 DQ8| DQ16 U11
CAS# CLKA0 DQA0_14
84 WEA0# L12 DQ23| DQ15 F13 J12 DQ9| DQ17 U13
WE# DQA0_7 CLKA0# CK DQA0_13
DQ8| DQ16 U11 J11 DQ10| DQ18 T11
2

DQA0_6 CK# DQA0_12


84 CLKA0 J12 DQ9| DQ17 U13 84 CKEA0 J3 DQ11| DQ19 T13
CK DQA0_5 CKE# DQA0_11
84 CLKA0# J11 DQ10| DQ18 T11 DQ12| DQ20 N11
CK# DQA0_4 DQA0_10
84 CKEA0 J3 DQ11| DQ19 T13 84 DDBIA0_3 D2 DQ13| DQ21 N13
CKE# DQA0_3 DBI0# DQA0_9
DQ12| DQ20 N11 1D5V_VGA_S0 D13 DQ14| DQ22 M11
DQA0_2 DBI1# DQA0_8
84 DDBIA0_2 D2 DQ13| DQ21 N13 84 DDBIA0_1 P13 DQ15| DQ23 M13
DBI0# DQA0_1 DBI2#
1D5V_VGA_S0 D13 DQ14| DQ22 M11 1D5V_VGA_S0 P2 DQ0| DQ24 U4
DBI1# DQA0_0 DBI3#
84 DDBIA0_0 P13 DQ15| DQ23 M13 DQ1| DQ25 U2
DBI2#
1D5V_VGA_S0 P2 DQ0| DQ24 U4 84,89 MEM_RST J2 DQ2| DQ26 T4
DBI3# RESET#
DQ1| DQ25 U2 20120112 PV-R DQ3| DQ27 T2
B J2 T4 R8830 1 2 0R0402-PAD SEN_A1 J10 DQ4| DQ28 N4 B
84,89 MEM_RST RESET# DQ2| DQ26 SEN
20120112 PV-R T2 R8828 1 DIS_PX
2 120R2F-GP VRAM2_ZQ J13 DQ5| DQ29 N2
DQ3| DQ27 ZQ
R8812 1 2 0R0402-PAD SEN_A0 J10 N4 J1 DQ6| DQ30 M4
SEN DQ4| DQ28 1D5V_VGA_S0 MF
R8811 1 120R2F-GP VRAM1_ZQ MF=1
DIS_PX
2 J13
ZQ DQ5| DQ29 N2 DQ7| DQ31 M2
J1
MF DQ6| DQ30 M4 Mirror 84 WCKA0_1 D4
WCK1 20120112 PV-R
DQ7| DQ31 M2 84 WCKA0_1# D5 C2 EDCA0_3 84
WCK1# EDC0
84 WCKA0_1 D4 DIS_PX C13 VRAM2_EDC4 1 2 0R0402-PAD
WCK1 EDC1
84 WCKA0_1# D5
WCK1# EDC0
C2 EDCA0_2 84 84 WCKA0_0 P4
WCK23 EDC2
R13 EDCA0_1 84 R8843
C13 VRAM1_EDC3 1 2 0R0402-PAD P5 R2
EDC1 84 WCKA0_0# WCK23# EDC3
P4 DIS_PX R13 EDCA0_0 84 R8842
84 WCKA0_0 WCK23 EDC2
84 WCKA0_0# P5 R2
WCK23# EDC3 H5GQ2H24MFR-T2C-GP
20120112 PV-R
H5GQ2H24MFR-T2C-GP

Hynix --> 64M*32

Use internal Vref memory voltage


1D5V_VGA_S0

1D5V_VGA_S0
1D5V_VGA_S0
DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX
SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

SC1U6D3V2KX-GP DIS_PX

1D5V_VGA_S0
SC10U6D3V5KX-1GP
1

DIS_PX

C8881
1

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

DIS_PX

SC10U6D3V5KX-1GP
DIS_PX

C8880
C88332

C88342

C88352

C88362

C88372

C88382

C88392

C88402

C88412

C88422

C88432

C88442

C88452

1
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C88512

C88532

C88562

C88582

C88602

C88462

C88482

C88502

C88522

C88542

C88572

C88592

C88612

2
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP
A A
5X0.1uF 8X1uF 1X10uF

5X0.1uF 8X1uF 1X10uF

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM1,2 (1/4)
Size Document Number Rev
A2 -1
2012 S-Series Richie 13.3
Date: Wednesday, March 14, 2012 Sheet 88 of 103
5 4 3 2 1
5 4 3 2 1

D D

1D5V_VGA_S0 VRAM3A 1 OF 2
1D5V_VGA_S0 VRAM4A 1 OF 2
C5 B5 20100903 X01: Change VRAM1,VRAM2 to GDDR5.
VDD VSS 20100908 X01: Modify VRAM net name for Mirror Function. 20100903 X01: Change VRAM1,VRAM2 to GDDR5.
C10 B10 C5 B5
VDD VSS VDD VSS 20100908 X01: Modify VRAM net name for Mirror Function.
D11 D10 C10 B10
VDD VSS VDD VSS
G1 G5 D11 D10
VDD VSS VDD VSS
G4 G10 G1 G5
VDD VSS VDD VSS
G11 H1 G4 G10
VDD VSS VDD VSS
G14 H14 G11 H1
VDD VSS VDD VSS
L1 K1 G14 H14
VDD VSS VDD VSS
L4 K14 L1 K1
VDD VSS VDD VSS
L11 L5 L4 K14
VDD VSS VDD VSS
L14 L10 L11 L5
VDD VSS VDD VSS
P11 P10 L14 L10
VDD VSS VDD VSS
R5 T5 P11 P10
1D5V_VGA_S0 VDD VSS VDD VSS
R10 T10 R5 T5
VDD VSS 1D5V_VGA_S0 VDD VSS
R10 T10
VDD VSS
B1 A1
VDDQ VSSQ
B3 A3 B1 A1
VDDQ VSSQ VDDQ VSSQ
B12 A12 B3 A3
VDDQ VSSQ VDDQ VSSQ
B14 A14 B12 A12
VDDQ VSSQ VDDQ VSSQ
D1 C1 B14 A14
D3
D12
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
C3
C4
GDDR5 Table D1
D3
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
C1
C3
D14 C11 D12 C4
VDDQ VSSQ VDDQ VSSQ
E5 C12 D14 C11
VDDQ VSSQ VDDQ VSSQ
E10
VDDQ VSSQ
C14 Vender Vandor Part Part Number E5
VDDQ VSSQ
C12
F1 E1 E10 C14
VDDQ VSSQ VDDQ VSSQ
F3 E3 F1 E1
VDDQ VSSQ VDDQ VSSQ
F12
VDDQ VSSQ
E12 HYNIX H5GQ2H24MFR-T2C 72.05224.00U F3
VDDQ VSSQ
E3
F14 E14 F12 E12
VDDQ VSSQ VDDQ VSSQ
G2 F5 F14 E14
VDDQ VSSQ VDDQ VSSQ
G13
VDDQ VSSQ
F10 SAMSUNG K4G20325FC-HC04 72.20325.00U G2
VDDQ VSSQ
F5
H3 H2 G13 F10
VDDQ VSSQ VDDQ VSSQ
H12 H13 H3 H2
VDDQ VSSQ VDDQ VSSQ
K3 K2 H12 H13
VDDQ VSSQ VDDQ VSSQ
K12 K13 K3 K2
VDDQ VSSQ VDDQ VSSQ
L2 M5 K12 K13
VDDQ VSSQ VDDQ VSSQ
L13 M10 L2 M5
VDDQ VSSQ VDDQ VSSQ
C M1 N1 L13 M10 C
VDDQ VSSQ VDDQ VSSQ
M3 N3 M1 N1
VDDQ VSSQ VDDQ VSSQ
M12 N12 M3 N3
VDDQ VSSQ VDDQ VSSQ
M14 N14 M12 N12
VDDQ VSSQ VDDQ VSSQ
N5 R1 M14 N14
VDDQ VSSQ VDDQ VSSQ
N10 R3 N5 R1
VDDQ VSSQ VDDQ VSSQ
C8924
DIS_PX P1
VDDQ VSSQ
R4 N10
VDDQ VSSQ
R3
1D5V_VGA_S0 1 2 SC1U6D3V2KX-GP P3 R11 DIS_PX P1 R4
VDDQ VSSQ C8962 VDDQ VSSQ
P12 R12 1D5V_VGA_S0 1 2 SC1U6D3V2KX-GP P3 R11
R8914 1 VDDQ VSSQ VDDQ VSSQ
DIS_PX 2 2K37R2F-GP P14 R14 P12 R12
R8915 1 VDDQ VSSQ VDDQ VSSQ
DIS_PX 2 5K49R2F-GP T1 U1 DIS_PX R8923 1 22K37R2F-GP P14 R14
C8925 1 VDDQ VSSQ VDDQ VSSQ
DIS_PX 2 SC1U6D3V2KX-GP T3 U3 DIS_PX R8922 1 25K49R2F-GP T1 U1
VDDQ VSSQ C8965 1 VDDQ VSSQ
T12 U12 DIS_PX 2 SC1U6D3V2KX-GP T3 U3
VDDQ VSSQ VDDQ VSSQ
DIS_PX
C8926
T14
VDDQ VSSQ
U14 T12
VDDQ VSSQ
U12
1 2 SC1U6D3V2KX-GP DIS_PX T14 U14
R8916 1 VREFC_A3 VDDQ VSSQ
1D5V_VGA_S0 2 2K37R2F-GP DIS_PX J14 A5 C8964 1 2 SC1U6D3V2KX-GP
R8917 1 VREFC VPP/NC#A5 VREFC_A4
2 5K49R2F-GP DIS_PX U5 1D5V_VGA_S0 R8920 1 2 2K37R2F-GP DIS_PX J14 A5
C8927 VREFD1_A3 VPP/NC#U5 VREFC VPP/NC#A5
DIS_PX 1 2 SC1U6D3V2KX-GP A10 DIS_PX R8921 1 2 5K49R2F-GP U5
C8929 VREFD2_A3 VREFD VREFD1_A4 VPP/NC#U5
DIS_PX 1 2 SC1U6D3V2KX-GP U10 DIS_PX C8963 1 2 SC1U6D3V2KX-GP DIS_PX A10
R8918 1 VREFD VREFD2_A4 VREFD
1D5V_VGA_S0 2 2K37R2F-GP DIS_PX DIS_PX C8967 1 2 SC1U6D3V2KX-GP U10 DIS_PX
R8919 1 VREFD
2 5K49R2F-GP DIS_PX 1D5V_VGA_S0 R8924 1 2 2K37R2F-GP DIS_PX
C8928 1 2 SC1U6D3V2KX-GP H5GQ2H24MFR-T2C-GP DIS_PX R8925 1 2 5K49R2F-GP
DIS_PX 20110817SI C8966 1 2 SC1U6D3V2KX-GP H5GQ2H24MFR-T2C-GP
84 MAA1_[8..0] DQA1_[31..0] 84 20110817SI
VRAM3B 2 OF 2
DIS_PX 84 MAA1_[8..0] VRAM4B 2 OF 2
DQA1_[31..0] 84
MAA1_0 K4 DQ24| DQ0 A4 DQA1_7
MAA1_6 A8/A7 DQA1_6 MAA1_7 DQA1_15
H5 DQ25| DQ1 A2 K4 DQ24| A4
MAA1_7 A9/A1 DQA1_5 MAA1_1 A8/A7 DQ0 DQA1_14
H4 DQ26| DQ2 B4 H5 DQ25| A2
MAA1_1 A10/A0 DQA1_4 MAA1_0 A9/A1 DQ1 DQA1_13
K5 DQ27| DQ3 B2 H4 B4
MAA1_8 A11/A6 DQA1_3 MAA1_6 A10/A0 DQ26| DQ2 DQA1_12
J5 DQ28| DQ4 E4 K5 DQ27| B2
A12/RFU#J5/NC#J5 DQA1_2 MAA1_8 A11/A6 DQ3 DQA1_11
DQ29| DQ5 E2 J5 DQ28| E4
MAA1_4 DQA1_1 A12/RFU#J5/NC#J5 DQ4 DQA1_10
H11 DQ30| DQ6 F4 DQ29| E2
MAA1_3 BA0/A2 DQA1_0 MAA1_2 DQ5 DQA1_9
K10 DQ31| DQ7 F2 H11 DQ30| F4
MAA1_2 BA1/A5 1D5V_VGA_S0 MAA1_5 BA0/A2 DQ6 DQA1_8
K11 DQ16| DQ8 A11 K10 F2
MAA1_5 BA2/A4 MAA1_4 BA1/A5 DQ31| DQ7
H10 DQ17| DQ9 A13 K11 DQ16| A11
BA3/A3 MAA1_3 BA2/A4 DQ8
DQ18| DQ10 B11 H10 DQ17| A13
BA3/A3 DQ9
84 ADBIA1 J4 DQ19| DQ11 B13 DQ18| B11
ABI# DQ10
84 CASA1# G3 DQ20| DQ12 E11 84 ADBIA1 J4 B13

1
RAS# ABI# DQ19| DQ11

DIS_PX

DIS_PX
G12 E13 G3 E11

60D4R2F-GP

60D4R2F-GP
84 WEA1# CS# DQ21| DQ13 84 RASA1# RAS# DQ20| DQ12

R8909

R8910
84 RASA1# L3 DQ22| DQ14 F11 84 CSA1#_0 G12 DQ21| E13
B CAS# CS# DQ13 B
84 CSA1#_0 L12 DQ23| DQ15 F13 84 CASA1# L3 DQ22| F11
WE# DQA1_23 CAS# DQ14
DQ8| DQ16 U11 84 WEA1# L12 DQ23| F13
DQA1_22 WE# DQ15 DQA1_31
84 CLKA1 J12 DQ9| DQ17 U13 U11

2
CK DQ8| DQ16
J11 DQ10| DQ18 T11 DQA1_21 CLKA1 J12 U13 DQA1_30
84 CLKA1# CK# CK DQ9| DQ17
J3 DQ11| DQ19 T13 DQA1_20 CLKA1# J11 T11 DQA1_29
84 CKEA1 CKE# CK# DQ10| DQ18
DQ12| DQ20 N11 DQA1_19 J3 T13 DQA1_28
84 CKEA1 CKE# DQ11| DQ19
D2 DQ13| DQ21 N13 DQA1_18 N11 DQA1_27
84 DDBIA1_0 DBI0# DQ12| DQ20 1D5V_VGA_S0
1D5V_VGA_S0 D13 DQ14| DQ22 M11 DQA1_17 D2 N13 DQA1_26
DBI1# 84 DDBIA1_1 DBI0# DQ13| DQ21
P13 DQ15| DQ23 M13 DQA1_16 D13 M11 DQA1_25
84 DDBIA1_2 DBI2# 1D5V_VGA_S0 DBI1# DQ14| DQ22
P2 U4 P13 M13 DQA1_24

SC10U6D3V5KX-1GP
1D5V_VGA_S0 DBI3# DQ0| DQ24 84 DDBIA1_3 DBI2# DQ15| DQ23

DIS_PX

C8983
DQ1| DQ25 U2 1D5V_VGA_S0 P2 DQ0| U4

1
1D5V_VGA_S0 DBI3# DQ24
20120112 PV-R 84,88 MEM_RST J2
RESET# DQ2| DQ26 T4 DQ1| DQ25
U2
DQ3| DQ27 T2 20120112 PV-R 84,88 MEM_RST J2
RESET# DQ2| DQ26
T4
R8912 1 2 0R0402-PAD SEN_A3 J10 N4 T2
SC10U6D3V5KX-1GP

DQ4| DQ28

2
SEN DQ3| DQ27
DIS_PX

VRAM3_ZQ SEN_A4
C8982

R8911 1 DIS_PX
2 120R2F-GP J13 DQ5| DQ29 N2 R8930 1 2 0R0402-PAD J10 N4
1

ZQ SEN DQ4| DQ28


R8928 1 120R2F-GP VRAM4_ZQ
1D5V_VGA_S0 J1
MF DQ6| DQ30 M4 DIS_PX
2 J13
ZQ DQ5| DQ29
N2
MF=1 DQ7| DQ31 M2 J1
MF DQ6| DQ30
M4
Mirror 84 WCKA1_0 D4 20120112 PV-R M2
2

WCK1 DQ7| DQ31


D5 C2 EDCA1_0 84 R8942 D4 20120112 PV-R
84 WCKA1_0# WCK1# DIS_PX EDC0 84 WCKA1_0 WCK1
C13 VRAM3_EDC2 1 2 0R0402-PAD 84 WCKA1_0# D5 C2 EDCA1_1 84 R8956
EDC1 WCK1# EDC0
P4 R13 C13 VRAM4_EDC1 1 2 0R0402-PAD
84 WCKA1_1
P5
WCK23 EDC2
R2
EDCA1_2 84
P4
DIS_PX EDC1
R13
84 WCKA1_1# WCK23# EDC3 84 WCKA1_1 WCK23 EDC2 EDCA1_3 84
84 WCKA1_1# P5 R2
WCK23# EDC3
H5GQ2H24MFR-T2C-GP
H5GQ2H24MFR-T2C-GP

A A

<Core Design>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM3,4 (2/4)
Size Document Number Rev
A2 -1
2012 S-Series Richie 13.3
Date: Wednesday, March 14, 2012 Sheet 89 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved) GPU-VRAM5,6 (3/4)


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 90 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved) GPU-VRAM7,8 (4/4)


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 91 of 103
5 4 3 2 1
5 4 3 2 1

+VGA_CORE
GPU Power ID Table
Thames Pro S3 GDDR5
DCBATOUT
GPU SIDE UP1527QQDD
D PU9202 D
PWRCNTL_0 PWRCNTL_1 VGA_CORE 2
3
0 0 1V 1 4
10
1 0 0.9V 9
7
8 6 PC9204 PC9207 PC9205

1
SC1U25V3KX-1-GP

SC10U25V5KX-GP

SC10U25V5KX-GP
5

2
FDMS3600-02-RJK0215-COLAY-GP DIS_PX DIS_PX
5V_S5
PR9203
DIS_PX DUAL-MOS
PW R_VGA_CORE_TON 1 2
249KR2F-GP 1st = 84.03660.037 DY DIS_PX
DIS_PX
2nd = 84.00038.A37 20120201PV-R
PU9201
DIS_PX DIS_PX
DIS_PX PR9202 PC9203
3rd = 84.03660.037
PR9201 16 13 PW R_VGA_CORE_BOOT1 2PW R_VGA_CORE_BOOT_C 1 2 SNUBBER Design Current = 20A VGA_CORE
TON BOOT 2R3J-2-GP
2 1 9
10R2F-L-GP PVCC
12 PW R_VGA_CORE_UGATE SCD1U25V3KX-GP PL9201 OCP< 30A
PW R_VGA_CORE_VDD UGATE PW R_VGA_CORE_PHASE
2 VCC PHASE 11 1 2
8 PW R_VGA_CORE_LGATE L-D47UH-GP-U
PR9205 LGATE PG9205 PT9203 PT9202
9K09R2F-GP PW R_VGA_CORE_PGOOD 4
68.R4710.20A SE330U2D5VDM-1GP SE330U2D5VDM-1GP
7

SCD1U10V2KX-4GP
POK G0 PW RCNTL_0 85

1
C 1 2PW R_VGA_CORE_CS 10 3 PW R_VGA_CORE_FB 2nd = 68.R471A.10R C

GAP-CLOSE-PWR-3-GP
IMAX FB

1
DIS_PX G1 14 PW RCNTL_1 85
5 PW R_VGA_CORE_D1 R9201 DIS_PX

2
D1
1

8209A_EN/DEM_VGA 15 PW R_VGA_CORE_D0

PC9206
PC9221 EN/PSM D0 6 4D7R3J-L1-GP DIS_PX DIS_PX
RF-DY

2
SC1U10V2KX-1GP 17 1 PW R_VGA_CORE_VOUT
2

1
AGND VOUT
DIS_PX 1st = 77.23371.13L 1st = 77.23371.13L
PW R_VGA_CORE_PHASE_R DIS_PX 2nd = 79.33719.L01 2nd = 79.33719.L01
UP1527QQDD-GP-U 3rd = 77.23371.13L 3rd = 77.23371.13L
DIS_PX PW R_VGA_CORE_VOUT

2
74.01527.A73 EC9202
SC680P50V2KX-2GP

1
2nd = 74.08208.B73 RF-DY

DY DIS_PX Vout=0.75V*(R1+R2)/R2

1
3D3V_S0
PR9208 DY DY

1
R9203
10KR2F-2-GP
8,19,27,29,34,35,36,37,45,46,47,48,93 PM_SLP_S3# 1 2 0R2J-2-GP 8209A_EN/DEM_VGA PC9208 PC9209

1
DIS_PX SC10P50V2JN-4GP SC10P50V2JN-4GP

2
R1

2
DY DIS_PX PR9207
10KR2J-3-GP

2
PR9211 PW R_VGA_CORE_FB
PW R_VGA_CORE_PGOOD 1 2 PE_PW RGD 18,22,86,93,96,97
0R0402-PAD

1
1
B PR9209 PR9210 PR9216 B

DIS_PX PC9222 75KR2F-GP 300KR2F-GP 59KR2F-GP


SC100P50V2JN-3GP DIS_PX DIS_PX DIS_PX

2 PWR_VGA_CORE_D1
PWR_VGA_CORE_D0
R3 R2 R4

5V_S0
DY DIS_BACO
2

PR9217
3D3V_S0 1 2 10KR2F-2-GP
DY PR9214
100KR2J-1-GP
1

DY DIS_BACO PW R_VGA_CORE_EN_R#

D9201
2 18209A_EN/DEM_VGA 8209A_EN/DEM_VGA 86,93
21,93 PE_GPIO1
DY
6

CH551H-30PT-GP
1

VGA_CORE
PC9223
84.2N702.A3F PQ9201
83.R5003.C8F
2ND = 83.R5003.H8H SCD1U10V2KX-4GP
2nd = 84.2N702.E3F
2

DIS_PX 2N7002KDW -GP


1

3rd = 84.2N702.F3F PR9215

PR9204 1
DY 100R2J-2-GP
A 2 <Core Design> A
10KR2F-2-GP
1

8209A_EN/DEM_VGA PQ9206_3
DIS_BOCO
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

VGA_ISL95870
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: Monday, March 19, 2012 Sheet 92 of 103
5 4 3 2 1
5 4 3 2 1

3D3V_VGA_S0 > VGA_CORE > 1V_VGA_S0 > 1D5V_VGA_S0 > 1D8V_VGA_S0

D D

3D3V_S0
5V_S5

1
20120112 PV-R

1
PC9328 PR9318
SC10U6D3V5MX-3GP 0R0402-PAD

2
3rd = 84.03413.A31 DIS_PX

2
2ND = 84.00102.031 PC9321
84.02130.031

1
SC1U10V2KX-1GP
3D3V_VGA_S0
DIS_PX
1.5A

PWR_1D8V_VDD
PQ9302 PR9317 PG9303
60mA

2
3D3V_S0 S DMP2130L-7-GP 1 2 34KR2F-GP GAP-CLOSE-PWR-3-GP
8,19,27,29,34,35,36,37,45,46,47,48,92 PM_SLP_S3#
SCD1U10V2KX-5GP

D 1 2
D DIS_BOCO DY DIS_PX 1D8V_VGA_PWR 1D8V_VGA_S0
1

PG9304
PWR_1D8V_VGA_S0_EN PU9304
PR9316 PC9325 GAP-CLOSE-PWR-3-GP
G

100KR2J-1-GP DIS_PX DIS_PX 1 2


2

DIS_BOCO DIS_BOCO PC9324 VIN#5


5
6 4
2

1
VCNTL VOUT#4

SCD47U10V2KX-GP
3D3V_VGA_S0 7 3 PC9304 PC9307 PC9306
SOFT_STAR POK VOUT#3
1 2 21,92 PE_GPIO1 1 2 PR9303 8 2 PR4705 DY DIS_PX DY
EN FB

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
PC9301 34KR2F-GP 9 1 DIS_PX 12K7R2F-GP

2
2
SCD022U16V2KX-3GP VIN#9 GND
DIS_BOCO
2

DIS_BOCO PR9302

2
PR9307 2 10KR2J-3-GP
APL5930KAI-TRG-GP PWR_1D8V_ADJ
4K7R2J-2-GP
PR9314 DY 74.05930.03D
DIS_BOCO

1
470R2J-2-GP 2nd = 74.G9731.03D
1

1D8V_S0_VGA_PG PR9305
3.3V_ALW_1 DIS_BOCO 10KR2F-2-GP
1

DIS_PX

2
DIS_BOCO
6

C C
84.2N702.A3F PQ9303
2nd = 84.2N702.E3F 2N7002KDW-GP
1

3rd = 84.2N702.F3F

3.3V_RUN_VGA_1

DY DIS_PX
PR9310 1 2
8,19,27,29,34,35,36,37,45,46,47,48,92 PM_SLP_S3# 0R2J-2-GP

PR9311 1 2 PE_GPIO1_R
21,92 PE_GPIO1 0R0402-PAD
20120116PV-R

1D5V_VGA_S0

1D5V_S3
DIS_PX
1D5V_VGA_S0
1D5V_S3 RT9025 for 1V_S0
B
8 D S 1
5A 5V_S5 B

7 D S 2 20120112 PV-R

1
6 D S 3
1

1
5 D U9305 PC9332 PC9314 PR9313
1

PC9327 G QM3004M3-GP SC10U6D3V3MX-GP 15V_S0 SC10U6D3V5MX-3GP 0R0402-PAD


DIS_PX 84.30043.037 DIS_PX
1D5V_ENABLE_RC 4

2
2nd = 84.01525.037 DIS_PX
SC10U6D3V3MX-GP
2

2
SC1U6D3V2KX-GP
DY DIS_PX
PR9309

1
1 2 20KR2F-L-GP PC9313
Iomax>1.2A
DIS_PX
1.6A

PWR_1V_VDD
PR9312 PG9301

2
DIS_BOCO PR9330 PM_SLP_S3# 1 2 10KR2F-2-GP GAP-CLOSE-PWR-3-GP
1 2 20KR2F-L-GP 1 2
DY DIS_PX 1V_PWR 1V_VGA_S0
Vo(cal.)=1.005V PG9302
PU9303
1

5V_S5 PWR_1V_EN GAP-CLOSE-PWR-3-GP


PC9326 1D5V_VGA_S0
SCD1U10V2KX-4GP
DIS_PX DIS_PX DIS_PX 1 2
5
2

VIN#5
1 2 VGA_1D5V_EN# DIS_BOCO PC9318 6 4

1
VCNTL VOUT#4

SCD47U10V2KX-GP
PR9332 100KR2J-1-GP PR9304 3D3V_S0 7 3 PC9315 PC9317 PC9316
1

POK VOUT#3
DIS_BOCO D G S 21,92 PE_GPIO1 1 2 10KR2F-2-GP 8
EN FB
2 PR9306

SC100P50V2JN-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP
PR9336 9 1 10KR2F-2-GP

2
1
VIN#9 GND
DIS_BOCO 470R2J-2-GP DIS_PX 20120305 MV
6

PR9324 20120306 MV

2
15V_S0 2K2R2J-2-GP
84.2N702.A3F DIS_PX DY DIS_PX
DIS_1D5V_VGA_S02

PQ9305 APL5930KAI-TRG-GP PWR_1V_ADJ


2N7002KDW-GP
DY
2nd = 84.2N702.E3F 2 1 PR9308 74.05930.03D DY DIS_PX DY

2
PM_SLP_S3 36
1

1
0R2J-2-GP
1

3rd = 84.2N702.F3F PR9319 2N7002K-2-GP PWR_1V_PGOOD 2nd = 74.G9731.03D PR9315


S G D 100KR2J-1-GP DIS_PX 39KR2F-GP
VGA_1D5V_EN#
DIS_BOCO DIS_PX
G
2

2
PR9327 D
1 2 VGA_1D5V_EN 1D5V_ENABLE_R 20111102SC
18,22,86,92,96,97 PE_PWRGD 0R2J-2-GP S
DY PR9328
1

PQ9307
1 2 C9309 84.2N702.J31
A 86,92 8209A_EN/DEM_VGA 0R2J-2-GP SCD1U10V2KX-5GP A
2nd = 84.07002.I31
2

DIS_BOCO DY 3rd = 84.2N702.W31


20120112 PV-R
20120116PV-R
<Variant Name>

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCRETE VGA POWER


Size Document Number Rev
A2 -1
2012 S-Series Richie 13.3
Date: Wednesday, March 14, 2012 Sheet 93 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 94 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 95 of 103
5 4 3 2 1
5 4 3 2 1

1D05V_S0 11 PCS
5V_S5 9 PCS
1D05V_S0 EC9634 1 2 SC1KP50V2KX-1GP DY
5V_S5 EC9601 1 2 SC1KP50V2KX-1GP DY EC9635 1 2 SC1KP50V2KX-1GP DY
EC9602 1 2 SC1KP50V2KX-1GP DY EC9636 1 2 SC1KP50V2KX-1GP DY
EC9603 1 2 SC1KP50V2KX-1GP DY EC9637 1 2 SC1KP50V2KX-1GP DY DCBATOUT EC9678 1 2 SCD1U25V2KX-GP EMI
EC9604 1 2 SCD1U25V2KX-GP EMI EC9638 1 2 SC1KP50V2KX-1GP DY EC9679 1 2 SC68P50V2JN-1GP RF
D EC9605 1 2 SC1KP50V2KX-1GP DY EC9639 1 2 SC1KP50V2KX-1GP DY EC9680 1 2 SC68P50V2JN-1GP RF D
EC9606 1 2 SC1KP50V2KX-1GP DY EC9640 1 2 SC1KP50V2KX-1GP DY EC9681 1 2 SC68P50V2JN-1GP RF
EC9607 1 2 SC1KP50V2KX-1GP DY EC9641 1 2 SC1KP50V2KX-1GP DY EC9682 1 2 SC68P50V2JN-1GP RF
EC9608 1 2 SC1KP50V2KX-1GP DY EC9642 1 2 SC1KP50V2KX-1GP DY EC9683 1 2 SCD1U25V2KX-GP EMI
EC9609 1 2 SC1KP50V2KX-1GP DY EC9643 1 2 SC1KP50V2KX-1GP DY EC9684 1 2 SC68P50V2JN-1GP RF-DY
EC9644 1 2 SC1KP50V2KX-1GP DY EC9685 1 2 SCD1U25V2KX-GP EMI

1D8V_PWR 2 PCS EC9677 1 2 SCD1U25V2KX-GP EMI


3D3V_S5 11 PCS EC9687 1 2 SC82P50V2JN-3GP RF
EC9688 1 2 SC82P50V2JN-3GP RF
3D3V_S5 EC9610 1 2 SC1KP50V2KX-1GP DY EC9689 1 2 SC82P50V2JN-3GP RF
EC9611 1 2 SC1KP50V2KX-1GP DY EC9690 1 2 SC82P50V2JN-3GP RF-DY 20120306 MV
EC9691 1 2 SCD1U25V2KX-GP EMI
3D3V_S5 EC9645 1 2 SC1KP50V2KX-1GP DY EC9692 1 2 SC82P50V2JN-3GP RF-DY
EC9646 1 2 SC1KP50V2KX-1GP DY EC9693 1 2 SC82P50V2JN-3GP RF
1V_VGA_S0 2 PCS EC9647 1 2 SC1KP50V2KX-1GP DY
EC9648 1 2 SC1KP50V2KX-1GP DY
1V_VGA_S0 EC9612 1 2 SC1KP50V2KX-1GP DY EC9650 1 2 SC1KP50V2KX-1GP DY
EC9613 1 2 SC1KP50V2KX-1GP DY EC9651 1 2 SC1KP50V2KX-1GP DY
EC9652 1 2 SC1KP50V2KX-1GP DY
EC9653 1 2 SC1KP50V2KX-1GP DY
EC9654 1 2 SC1KP50V2KX-1GP DY 5V_S5 EC9695 1 2 SC68P50V2JN-1GP RF-DY
1D8V_VGA_S0 2 PCS EC9655 1 2 SC1KP50V2KX-1GP DY EC9696 1 2 SC68P50V2JN-1GP RF-DY
EC9697 1 2 SC68P50V2JN-1GP RF-DY
3D3V_LAN_S5 EC9649 1 2 SC1KP50V2KX-1GP DY
C
1D8V_VGA_S0 EC9614 1 2 SC1KP50V2KX-1GP DY EC9698 1 2 SC82P50V2JN-3GP RF-DY C
EC9615 1 2 SC1KP50V2KX-1GP DY EC9699 1 2 SC82P50V2JN-3GP RF-DY
DCBATOUT 21 PCS EC9700 1 2 SC82P50V2JN-3GP RF-DY
VGA_CORE 2 PCS
DCBATOUT EC9656 1 2 SC1KP50V2KX-1GP DY
EC9657 1 2 SCD1U25V2KX-GP EMI
EC9658 1 2 SC1U6D3V2KX-GP EMI
VGA_CORE EC9616 1 2 SC1KP50V2KX-1GP DY EC9659 1 2 SC1KP50V2KX-1GP DY
EC9617 1 2 SC1KP50V2KX-1GP DY EC9660 1 2 SCD1U25V2KX-GP EMI 3D3V_S5 EC9703 1 2 SC68P50V2JN-1GP RF-DY
EC9661 1 2 SC1KP50V2KX-1GP DY EC9704 1 2 SC68P50V2JN-1GP RF-DY
EC9662 1 2 SCD1U25V2KX-GP EMI EC9705 1 2 SC68P50V2JN-1GP RF-DY
EC9663 1 2 SC1KP50V2KX-1GP DY
EC9664 1 2 SCD1U25V2KX-GP EMI
1D5V_VGA_S0 2 PCS EC9665 1 2 SC1KP50V2KX-1GP DY
EC9666 1 2 SC1KP50V2KX-1GP DY EC9706 1 2 SC82P50V2JN-3GP RF-DY
EC9667 1 2 SC1KP50V2KX-1GP DY EC9707 1 2 SC82P50V2JN-3GP RF-DY
1D5V_VGA_S0 EC9618 1 2 SC1KP50V2KX-1GP DY EC9668 1 2 SCD1U25V2KX-GP EMI EC9708 1 2 SC82P50V2JN-3GP RF-DY
EC9619 1 2 SC1KP50V2KX-1GP DY EC9669 1 2 SC1KP50V2KX-1GP DY
EC9620 1 2 SC1KP50V2KX-1GP DY EC9670 1 2 SC1U6D3V2KX-GP EMI
EC9671 1 2 SC1KP50V2KX-1GP DY
EC9672 1 2 SC1KP50V2KX-1GP DY
EC9673 1 2 SC1KP50V2KX-1GP DY
EC9674 1 2 SC1U6D3V2KX-GP EMI
EC9675 1 2 SC1KP50V2KX-1GP DY
1D5V_S3 8 PCS EC9676 1 2 SC1KP50V2KX-1GP DY
EC9686 1 2 SCD1U25V2KX-GP EMI
1D5V_S3 EC9621 1 2 SC1KP50V2KX-1GP DY EC9694 1 2 SCD1U25V2KX-GP EMI
B EC9622 SCD1U25V2KX-GP 18,22,86,92,93,97 PE_PW RGD B
EC9623
1 2
SCD1U25V2KX-GP
EMI EC9701 1
1 2 EMI 21,56 Sata_Odd_Da# 2 SCD1U25V2KX-GP EMI
EC9624 1 2 SCD1U25V2KX-GP EMI
EC9625 1 2 SC1KP50V2KX-1GP DY EC9702 1 2 SCD1U25V2KX-GP EMI
22 SATA4GP_GPIO16

EC9716 1 2 SCD1U25V2KX-GP EMI


5,27,37,42,50 pwr_good EC9717 1 2 SCD1U25V2KX-GP EMI
EC9718 1 2 SCD1U25V2KX-GP EMI
VCCSA 1 PCS
EC9719 1 2 SCD1U25V2KX-GP EMI
5,17,21,32,34,53,54,56,71,83,97 plt_rst# EC9720 1 2 SCD1U25V2KX-GP EMI
VCCSA EC9629 1 2 SC1KP50V2KX-1GP DY
5V_ODD_HDD_S0 EC9721 1 2 SCD1U25V2KX-GP EMI

VCC_CORE 4 PCS 1D05V_S0 EC9709 1 2 SCD1U25V2KX-GP EMI


EC9710 1 2 SCD1U25V2KX-GP EMI
VCC_CORE EC9630 1 2 SCD1U25V2KX-GP EMI EC9711 1 2 SCD1U25V2KX-GP EMI
EC9631 1 2 SC1KP50V2KX-1GP DY
EC9632 1 2 SC1KP50V2KX-1GP DY
EC9633 1 2 SC1KP50V2KX-1GP DY EC9712 1 2 SCD1U25V2KX-GP EMI
A <Core Design> A
1D8V_S0 EC9713 1 2 SCD1U25V2KX-GP EMI
EC9714 1 2 SCD1U25V2KX-GP EMI
3D3V_S0
Wistron Corporation
EC9715 1 2 SCD1U25V2KX-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3D3V_S5 EMI Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 96 of 103
5 4 3 2 1
5 4 3 2 1

PAGE 14_DIMM1 EMI CAP PAGE 33_SD/MS/MMC CONNECTOR EMI CAP PAGE 50_CRT EMI CAP PAGE 62_USB3.0 EMI CAP
EC1428 1 2 SC1KP50V2KX-1GP DY EC6202 1 2 SC1U10V3ZY-6GP DY
5,14,15 DDR3_DRAMRST# CLOSE CARD1 EC3307 SC1KP50V2KX-1GP EC5011 1 2 SCD1U50V3KX-GP
USB_VCCA
22,32 D3E_WAKE# 1 2 DY 5V_S0 DY
32,33 MS_INS# EC3308 1 2 SC1KP50V2KX-1GP DY
32,33 MDIF2 EC3306 1 2 SC22P50V2JN-4GP DY USB_VCCB EC6201 1 2 SC1U10V3ZY-6GP DY
EC3305 SC22P50V2JN-4GP DY EC6203 1 2 SC1U10V3ZY-6GP DY
PAGE 15_DIMM1 EMI CAP 32,33 MDIF1
EC3304
1 2
SC22P50V2JN-4GP
32,33 MDIF0 1 2 DY
32,33 MDIF3 EC3303 1 2 SC22P50V2JN-4GP DY
EC1524 1 2SC1KP50V2KX-1GP DY
5,14,15 DDR3_DRAMRST# PAGE 51_HDMI EMI CAP PAGE 64_FINGER PRINT EMI CAP
PAGE 34_Lan RTL8111E EMI CAP EC5101 1 2 SC1KP50V2KX-1GP EC64041 2 SC1KP50V2KX-1GP
D 20,51 HDMI_PCH_DET DY 22,64 FPR_LOCK# EC64051
DY D
PAGE 17_PCH(1/9) CLOSE U3401 Pin25 18,64 FPR_OFF 2 SC1KP50V2KX-1GP DY

EC1701 1 2 SC22P50V2JN-4GP DY EC3401 1 2 SCD1U25V2KX-GP EMI


17,29 HDA_BITCLK_CODEC 5,17,21,32,34,53,54,56,71,83,96 PLT_RST#
EC1702 1 2 SC22P50V2JN-4GP DY
17,29 HDA_SDOUT_CODEC
PAGE 53_WLAN SLOT EMI CAP PAGE 82_DCIN EMI CAP
PAGE 35_LAN RJ45 EMI CAP 38,82 LIMIT_SIGNAL EC8206 SC1KP50V2KX-1GP
PAGE 27_KBC EC5303 1
1 2 EMI
5,17,21,32,34,53,54,56,71,83,96 PLT_RST# 2 SC100P50V2JN-L-GP DY 82 DC_PIN1 EC8209 1 2 SC1U25V3KX-1-GP EMI
53 XMIT_OFF_R EC5301 1 2 SC1KP50V2KX-1GP DY 82 DC_PIN2 EC8210 1 2 SC1U25V3KX-1-GP EMI
34,35 GREEN_LED# EC3502 1 2 SCD1U16V2ZY-2GP DY 22,53 BT_OFF# EC5302 1 2 SC1KP50V2KX-1GP DY 27,82 QUICKX_LED# EC8212 1 2 SC1KP50V2KX-1GP EMI
34,35 YELLOW_LED# EC3501 1 2 SCD1U16V2ZY-2GP DY 19,82 ON_OFF# EC8213 1 2 SC1KP50V2KX-1GP EMI
EC2701 1 2 SC1KP50V2KX-1GP DY 27,49,82 LID_SW# EC8214 1 2 SC1KP50V2KX-1GP EMI
22,27 KBrst# EC2702 1 2 SC1KP50V2KX-1GP DY 68,82 WL_LED#_ALL EC8215 1 2 SCD1U16V2ZY-2GP DY
19,27 Pm_Pwrok EC2703 1
19,27,41 Rsmrst# 2 SC1KP50V2KX-1GP DY PAGE 54_WLAN SLOT EMI CAP
PAGE 39_BATT CONN EMI CAP EC8202 1 2 SC1U25V3KX-1-GP
AD+ DY
EC8201 1 2 SC1U25V3KX-1-GP EMI
EC3901 SC22P50V2JN-4GP
CLOSE WWAN1 EC5401 SC1KP50V2KX-1GP
27,39 AB1A_DATA EC3902
1 2
SC22P50V2JN-4GP
DY 22,54 GPS_XMIT_OFF#
EC5402
1 2
SC1KP50V2KX-1GP
DY
27,39 AB1A_CLK
1 2 DY 17,54 INTRUDER# 1 2 DY
EC3903 1 2 SC1KP50V2KX-1GP DY 54 WIFI_RF_EN# EC5403 1 2 SC1KP50V2KX-1GP DY
27,39 MAIN_BAT_DET# EC3904 SC1KP50V2KX-1GP EC5404 SC100P50V2JN-L-GP
PAGE 29_AUDIO CODEC EMI CAP 39 MAIN_BAT_DET#_C
1 2 DY 5,17,21,32,34,53,54,56,71,83,96 PLT_RST# 1 2 DY CLOSE PWR1 EC8216 1
27,69,82 KSI1 2 SC1KP50V2KX-1GP EMI
27,69,82 KSI3 EC8217 1 2 SC1KP50V2KX-1GP EMI
EC8218 1 2 SC1KP50V2KX-1GP EMI
EC2901 1 2SC1KP50V2KX-1GP
PAGE 56_HDD/ODD EMI CAP 27,82 KSO17
17,29 HDA_RST#_CODEC DY PAGE 49_LVDS EMI CAP
5V_S0 EC5601 1 2 SC1U10V3ZY-6GP DY
20,49 LCDVDD_EN EC4911 1 2 SC1KP50V2KX-1GP DY 22,56 SATA_ODD_PWR_EN EC5615 1 2 SC1KP50V2KX-1GP DY 3D3V_S0 EC8207 1 2 SC1KP50V2KX-1GP EMI
49 DISP_OFF# EC4912 1 2 SC1KP50V2KX-1GP DY 56 SATA_ODD_DET#_C EC5613 1 2 SC1KP50V2KX-1GP DY EC8211 1 2 SCD1U25V2KX-GP EMI
EC4913 1 2 SC1KP50V2KX-1GP DY 56 SATA_ODD_DA#_C EC5614 1 2 SC1KP50V2KX-1GP DY
27,49,82 LID_SW# EC4914 SC1KP50V2KX-1GP EC8205 1
C 20,49 LCD_BL_EN 1 2 DY 3D3V_AUX_S5 2 SC1KP50V2KX-1GP EMI C
EC4904 1 2 SC33P50V2JN-3GP DY EC8208 1 2 SCD1U25V2KX-GP EMI
29,49 DMIC_DATA EC4905 SC33P50V2JN-3GP
29,49 DMIC_CLK
1 2 DY
PAGE 31_AUDIO CONNECTOR EMI CAP PAGE 61_USB2.0 EMI CAP
EC4915 1 2 SCD1U50V3KX-GP DY
EC3111 2SC100P50V2JN-L-GP
PUT CLOSE R4911 DCBATOUT
30,31 MIC_IN_R EC3112
1 DY
1 2SC100P50V2JN-L-GP DY CLOSE USB21 PAGE 40-48,92_POWER EMI CAP
30,31 MIC_IN_L EC3113
29,31 HP_OUT_L
1 2SC100P50V2JN-L-GP DY +LCDVDD EC4916 1 2 SCD1U16V2ZY-2GP DY USB_VCCA EC6102 1 2 SCD1U16V2ZY-2GP DY
EC3114 1 2SC100P50V2JN-L-GP DY
AUD_AGND
29,31 HP_OUT_R EC4903 1
3D3V_S0 2 SC1U6D3V2KX-GP DY CLOSE TO PU4005 DCBATOUT EC4001 1 2 SCD1U25V2KX-GP EMI
EC4902 1 2 SC1U6D3V2KX-GP DY CLOSE TO PU4301 DCBATOUT EC4301 1 2 SCD1U50V3KX-GP DY
20120130PV-R EC4901 1 2 SC1U6D3V2KX-GP DY CLOSE TO PU4303 DCBATOUT EC4303 1 2 SCD1U50V3KX-GP DY
CLOSE TO PU4401 DCBATOUT EC4401 1 2 SCD1U25V2KX-GP EMI
CLOSE TO PU4501 DCBATOUT EC4501 1 2 SCD1U50V3KX-GP DY
AVDD_CODEC 1 2 AUD_AGND DY CLOSE TO PU4601 DCBATOUT EC4601 1 2 SCD1U50V3KX-GP DY
EC3115 SC1U6D3V2KX-GP CLOSE TO PU4701 DCBATOUT EC4701 1 2 SCD1U25V2KX-GP EMI
CLOSE TO PU4801 DCBATOUT EC4801 1 2 SCD1U25V2KX-GP EMI
5V_S0 EC3107 1 2 SCD1U16V2ZY-2GP DY PWR_VCCCORE2_DCBATOUT EC4312 1 2 SC68P50V2JN-1GP RF-DY EC2101 2 1 SC12P50V2JN-3GP RF-DY CLOSE TO PU9202 DCBATOUT EC9201 1 2 SCD1U50V3KX-GP DY
EC4308 SCD1U25V2KX-GP 21,27 CLK_PCI_KBC EC2102 2 1 SC12P50V2JN-3GP
1 2 EMI 21,71 CLK_PCI_DEBUG
RF-DY
EC4309 1 2 SC2200P50V2KX-2GP RF-DY
EC4310 SCD1U50V3KX-GP RF-DY
EC3108 1 2SC1KP50V2KX-1GP
1 2 PAGE 62_USB3.0 CAP
DY AUD_AGND EC2904/EC2903 CLOSE U2901
DY EC3109 1 2SC1KP50V2KX-1GP EC6215 1 2 SCD1U16V2ZY-2GP DY
EC3110 1 2SC1KP50V2KX-1GP EC4403 SC68P50V2JN-1GP
CLOSE USB31 USB_VCCA
EC6214 1 2 SCD1U16V2ZY-2GP
DY PWR_GFXCORE1_DCBATOUT 1 2 RF-DY CLOSE USB32 USB_VCCB DY
EC4404 SCD1U25V2KX-GP EMI EC2904 1 2 SC220P50V2KX-3GP EMI EC6213 1 2 SCD1U16V2ZY-2GP DY
EC4405
1 2
SC2200P50V2KX-2GP 29 DMIC_CLK_R EC2903 1 2 SC220P50V2KX-3GP
CLOSE USB33 USB_VCCB
EC4406
1 2
SCD1U50V3KX-GP
RF-DY 29 DMIC_DATA_R EMI CLOSE U6204 EC6212 1
PAGE 32_Card Reader EMI CAP 1 2 RF-DY 2SC1KP50V2KX-1GP DY
19,46,62 PM_SLP_S4#
EC3201 1 2SC22P50V2JN-4GP DY
32,33 MDIF5
EC4503 SC68P50V2JN-1GP
CLOSE U6205 EC6211 1 2SC1KP50V2KX-1GP
DCBATOUT_RT8209B_VCCP
EC4504
1 2
SC82P50V2JN-3GP
RF 19,46,62 PM_SLP_S4# DY
CLOSE U3201 PIN1 1 2 RF H1 ~ H16 --> ZZ.00PAD.D11
5,17,21,32,34,53,54,56,71,83,96 PLT_RST# EC3212 1 2SC100P50V2JN-L-GP DY EC4505 1 2 SC2200P50V2KX-2GP RF WLAN & WWAN
EC4506 SCD1U25V2KX-GP RF H17 ~ H22 --> ZZ.00PAD.N11
B 1 2 18,22,86,92,93,96 PE_PWRGD
H23 ~ H26 --> 34.4Y824.001
PAGE 69_KEYBOARD/TOUCH PAD EMI CAP B

EC4603 SC68P50V2JN-1GP H27 ~ H28 --> 34.4Q602.101 SRC1KP50VM-GP EC6904 SRC1KP50VM-GP EC6906
DCBATOUT_1D5V 1 2 RF-DY 20120112 PV-R
KSI3 KSO6
EC4604 1 2 SC82P50V2JN-3GP RF-DY 1 2 1 2
EC4605 1 2 SCD1U25V2KX-GP EMI WWAN WWAN KSO5 3 4 KSO3 3 4

1
RF-DY EC4606 1 2 SCD1U25V2KX-GP EMI PCH KSO1 5 EMI 6 KSO12 5 EMI 6
Put Caps near DIMMA1 1D5V_S3 EC1425 1 2 SC68P50V2JN-1GP EC9207 EC9208 H23 H24 H25 H26 KSI0 7 8 KSO13 7 8
H27 H28

SC47P50V2JN-3GP

SC47P50V2JN-3GP

STF256R168H65-GP

STF256R168H65-GP

STF256R168H65-GP

STF256R168H65-GP
EC1424 1 2 SC68P50V2JN-1GP RF-DY

STF256R168H103-GP

STF256R168H103-GP
2

2
SRC1KP50VM-GP EC6903 SRC1KP50VM-GP EC6905
KSO2 1 2 KSO14 1 2
Put Caps near DIMMA2 1D5V_S3 EC1525 1 2 SC68P50V2JN-1GP RF-DY KSO4 3 4 KSO11 3 4
EC1526 1 2 SC68P50V2JN-1GP RF-DY +LCDVDD EC4909 1 2 SC68P50V2JN-1GP RF-DY KSO7 5 EMI 6 KSO10 5 EMI 6

1
EC4908 1 2 SC1KP50V2KX-1GP RF-DY KSO8 7 8 KSO15 7 8

1
EMI EMI
3D3V_LAN_S5 1 2 SCD1U10V2KX-5GP RF-DY
EC3403 1 2 SC82P50V2JN-3GP EC5304 SC68P50V2JN-1GP SRC1KP50VM-GP EC6901
RF-DY 3D3V_WLAN 1 2 RF-DY KSI1
EC3405 1 2 SC56P50V2JN-2GP RF-DY EC5305 1 2 SC82P50V2JN-3GP RF-DY 1 2
EC3402 EC5306 1 2 SC2200P50V2KX-2GP RF-DY 34.4KD36.00134.4KD36.001 34.4KD36.001 34.4KD36.001 KSI7 3 4
KSI[0..7] 27,69,82
EC5307 1 2 SCD1U50V3KX-GP RF-DY H19 H20 H11 H12 KSI6 5 EMI 6
EC3404 1 2 SC56P50V2JN-2GP RF-DY KSO9 7 8

HOLE276R178-GP

HOLE276R178-GP

HOLE256R115-GP

HOLE256R115-GP
34 LANXIN KSO[0..15] 27,69

1D5V_S0 EC5309 1 2 SC68P50V2JN-1GP RF-DY SRC1KP50VM-GP EC6902


EC5310 1 2 SC82P50V2JN-3GP RF-DY KSI4 1 2
EC4003 1 2 SC68P50V2JN-1GP RF-DY EC5311 1 2 SC2200P50V2KX-2GP RF-DY KSI5 3 4
DCBATOUT
EC4002 1 2 SC82P50V2JN-3GP RF-DY EC5308 1 2 SCD1U50V3KX-GP RF-DY KSO0 5 EMI 6

1
EC4004 1 2 SC2200P50V2KX-2GP RF-DY KSI2 7 8
EC4005 1 2 SCD1U50V3KX-GP RF-DY
ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.D11 ZZ.00PAD.D11
3D3V_WWAN EC5405 1 2 SC68P50V2JN-1GP RF-DY H30 H31 H1 H2 H3 H4
EC4101 1 2 SC68P50V2JN-1GP RF-DY EC5406 1 2 SC82P50V2JN-3GP RF-DY
HOLE276R178-GP

HOLE256R115-GP

HOLE256R115-GP

HOLE256R115-GP

HOLE256R115-GP

HOLE256R115-GP
DCBATOUT_3V
EC4102 1 2 SC82P50V2JN-3GP RF-DY EC5407 1 2 SC2200P50V2KX-2GP RF-DY EC6907 1 2SC100P50V2JN-L-GP DY
EC4103 SC2200P50V2KX-2GP EC5408 SCD1U50V3KX-GP 27,69 KB_CAPS_LED
1 2 RF-DY 1 2 RF-DY
A EC4104 1 2 SCD1U25V2KX-GP EMI A

DCBATOUT EC9203 1 2 SC68P50V2JN-1GP RF-DY <Core Design>


1

1
DCBATOUT_5V EC4107 1 2 SCD1U25V2KX-GP EMI EC9204 1 2 SCD1U25V2KX-GP EMI
EC4108 1 2 SC82P50V2JN-3GP RF-DY EC9205 1 2 SC2200P50V2KX-2GP RF-DY
EC4109 SC2200P50V2KX-2GP EC9206 SCD1U50V3KX-GP
EC4110
1
1
2
2 SCD1U50V3KX-GP
RF-DY
RF-DY
1 2 RF-DY ZZ.00PAD.N11
H29
ZZ.00PAD.D11
H17 H15 H16
ZZ.00PAD.D11 ZZ.00PAD.D11ZZ.00PAD.D11ZZ.00PAD.D11
H5 H8 Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
HOLE256R115-GP

HOLE276R178-GP

HOLE276R178-GP

HOLE276R178-GP

HOLE256R115-GP

HOLE256R115-GP
Taipei Hsien 221, Taiwan, R.O.C.
PWR_VCCCORE1_DCBATOUT EC4304 1 2 SC68P50V2JN-1GP RF-DY EC4007 1 2 SC1U25V3KX-1-GP EMI
40 DC_IN_R Title
EC4305 1 2 SCD1U25V2KX-GP EMI AD+_IN_G EC4008 1 2 SC1U25V3KX-1-GP EMI
EC4306 SC2200P50V2KX-2GP RF-DY
EC4307
1
1
2
2 SCD1U50V3KX-GP RF-DY UNUSED PARTS/EMI Capacitors
1

1
Size Document Number Rev
Custom
ZZ.00PAD.D11 ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.N11 ZZ.00PAD.D11 ZZ.00PAD.D11
2012 S-Series Richie 13.3 -1
Date: Wednesday, March 14, 2012 Sheet 97 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Change History
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 98 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Sequence
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 99 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 100 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

SMBUS Block Diagram


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 101 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Audio Block Diagram


Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 102 of 103
5 4 3 2 1
5 4 3 2 1

D D

C C

(Blanking)

B B

A <Core Design> A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

mSATA
Size Document Number Rev
A3 -1
2012 S-Series Richie 13.3
Date: W ednesday, March 14, 2012 Sheet 103 of 103
5 4 3 2 1

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