EX NO: 6 DESIGN, IMPLEMENTATION AND VERIFICATION OF

Date: 02-12-2021 MAGNITUDE COMPARATOR

REG NO: URK21CS7046

OBJECTIVE

To design, implement and verify a magnitude comparator.

SOFTWARE

Simulator.io

DESCRIPTION

Magnitude comparator is a combinational logic circuit that compares the input binary
quantities and generates the output to indicate which one has greater magnitude. It is often used
as a part of address decoding circuitry used in a computer to select a specific input/output
device or area of a memory for storage. Magnitude comparators are also useful in control
applications where a binary number representing the physical variable is being controlled. The
design starts with the corresponding truth table. From the truth table using the K-map method
the simplified expressions are obtained for the three output functions say A=B, A>B, A<B
TRUTH TABLE

CIRCUIT DIAGRAM:

Two Bit magnitude comparator

PROCEDURE:

1. Use select tool to select suitable logic gates, switches and LEDs from Elements library
and place it on the design window
2. Use add/wire tool to connect the logic elements as per the circuit diagram to build the
logic circuit.
3. Click the run button.
4. Apply inputs based on the truth table and verify the corresponding outputs.

SIMULATION LINK
https://simulator.io/board/IK584G4JP2/1

SIMULATION SNAPSHOTS

RESULT
A magnitude comparator has been designed, implemented and its operation has been
verified.