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Datasheet IRF540 N
Datasheet IRF540 N
IRF540N
HEXFET® Power MOSFET
l Advanced Process Technology D
l Ultra Low On-Resistance VDSS = 100V
l Dynamic dv/dt Rating
l 175°C Operating Temperature RDS(on) = 44mΩ
l Fast Switching G
l Fully Avalanche Rated ID = 33A
S
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.15
RθCS Case-to-Sink, Flat, Greased Surface 0.50 ––– °C/W
RθJA Junction-to-Ambient ––– 62
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IRF540N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, I D = 1mA
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 44 mΩ VGS = 10V, ID = 16A
VGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V VDS = VGS , ID = 250µA
gfs Forward Transconductance 21 ––– ––– S VDS = 50V, ID = 16A
––– ––– 25 VDS = 100V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V
Qg Total Gate Charge ––– ––– 71 ID = 16A
Qgs Gate-to-Source Charge ––– ––– 14 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 21 VGS = 10V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 11 ––– VDD = 50V
tr Rise Time ––– 35 ––– ID = 16A
ns
td(off) Turn-Off Delay Time ––– 39 ––– RG = 5.1Ω
tf Fall Time ––– 35 ––– VGS = 10V, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 16A, VGS = 0V
trr Reverse Recovery Time ––– 115 170 ns TJ = 25°C, IF = 16A
Qrr Reverse Recovery Charge ––– 505 760 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS,
max. junction temperature. (See fig. 11) TJ ≤ 175°C
Starting TJ = 25°C, L =1.5mH Pulse width ≤ 400µs; duty cycle ≤ 2%.
RG = 25Ω, I AS = 16A. (See Figure 12)
This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175°C .
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IRF540N
1000 VGS 1000 VGS
TOP 15V TOP 15V
10V 10V
8.0V 8.0V
I D , Drain-to-Source Current (A)
4.5V
10 4.5V 10
1
20µs PULSE WIDTH
T = 25 C
J °
1
20µs PULSE WIDTH
T = 175 C
J °
1000 3.5
ID = 33A
R DS(on) , Drain-to-Source On Resistance
3.0
I D , Drain-to-Source Current (A)
2.5
(Normalized)
TJ = 25 ° C 2.0
100
1.5
TJ = 175 ° C
1.0
0.5
10
V DS = 50V
20µs PULSE WIDTH
0.0
VGS = 10V
4.0 5.0 6.0 7.0 8.0 9.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)
3000 20
VGS = 0V, f = 1MHz
ID = 16A
Ciss = Cgs + Cgd , Cds SHORTED
V DS = 80V
Crss = Cgd
C, Capacitance (pF)
Ciss
2000
12
1500
8
1000
C
oss 4
500
0
Crss
0
FOR TEST CIRCUIT
SEE FIGURE 13
1 10 100 0 20 40 60 80
VDS , Drain-to-Source Voltage (V) QG , Total Gate Charge (nC)
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ISD , Reverse Drain Current (A)
100 100
TJ = 175 ° C
10
100µsec
10
TJ = 25 ° C 1msec
1 1
T A = 25°C 10msec
T J = 175°C
V GS = 0 V Single Pulse
0.1 0.1
0.2 0.6 1.0 1.4 1.8
VSD ,Source-to-Drain Voltage (V) 1 10 100 1000
VDS , Drain-toSource Voltage (V)
35 RD
VDS
30
VGS
D.U.T.
RG
I D , Drain Current (A)
25 +
-VDD
20
VGS
Pulse Width ≤ 1 µs
15 Duty Factor ≤ 0.1 %
10
Fig 10a. Switching Time Test Circuit
5 VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC)
1
D = 0.50
0.20
0.10 P DM
0.1 0.05 t1
0.02
0.01 SINGLE PULSE
(THERMAL RESPONSE) t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
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IRF540N
400
1 5V ID
RG D .U .T +
- VD D 200
IA S A
20V
tp 0 .01 Ω
V (B R )D SS
tp 0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( ° C)
50KΩ
12V .2µF
QG .3µF
VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
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IRF540N
Peak Diode Recovery dv/dt Test Circuit
+
- +
-
RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS
[VGS=10V ] ***
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% [ ISD ]
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Visit us at www.irf.com for sales contact information.03/01
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