Name of the Student: ………………………………… Scholar No.: …………………….

MAULANA AZAD NATIONAL INSTITUTE OF TECHNOLOGY, BHOPAL

END TERM EXAM, NOVEMBER-2021
Department of Computer Science & Engineering
Course: B.Tech. Semester: V
Subject: Microprocessor Subject Code: CSE-313
Time: 2:00 PM to 5:00 PM (180 Minutes) Date: 20/11/2021
Submission / Uploading Time: 5:00 PM to 5:15 PM (15 Minutes) Max Marks: 50

NOTE: 1. Don’t wait till the deadline to upload, do it as soon as you finish your paper.
2. Reply and upload the answer sheet in single pdf file with filename as your scholar number, for example
(191112001.pdf) on email id 313csemanit@gmail.com
3. All questions are compulsory.

Q. No. Questions Marks

1 (a) 2 KB RAM, 2 KB ROM, one input and one output device are to be interfaced with 5
8085 microprocessor. Employ memory mapped I/O scheme to execute the above.

(b) Draw and explain the timing Diagram for opcode fetch cycle in 8085 5
microprocessor. Show the difference in machine cycles through the diagram when
instructions are one byte long and when more than one byte long.

2 (a) Write a program which will call the subroutine (say named ‘SR’) if RST 6.5 is 5
masked. Let content of ACC is 20 H on executing the RIM instruction.

(b) The value of Stack Segment register and Code Segment Register is 3860H and 5
4042H respectively and the value of different offsets is as follows :

BX :2094 H
IP:4247 H
DI : 0555 H
SP :1738 H
BP :3837 H

Calculate all possible effective address for the given segments.

3 (a) Consider the 8085 based microprocessor with 2 MHz clock frequency. 5

(i) Design the counter with time delay and write the assembly code for the same.

(ii) How much time will it take to execute the MVI instruction when MVI
instruction takes six clock periods?
 (b) Explain the interrupt pointer table for intel 8086. How Type of an interrupt can be 5
defined (type 0, type1and so on…)

4 (a) Consider the following code: 5

[[𝑆𝑃] − 1] ← [𝑃𝐶𝐻]
[[𝑆𝑃] − 2] ← [𝑃𝐶𝐿]
[𝑆𝑃] ← [𝑆𝑃] − 2
[𝑃𝐶] ← 𝑎𝑑𝑑 (𝑙𝑎𝑏𝑒𝑙)

This code belongs to which group of instructions in 8085 processor. Explain the
working of each line.

(b) Consider the following code segment 5

LXI H, 2500H
MOV C,M
BEHIND INX H
CMP M
JZ FORWARD
DCR C
JNZ BEHIND

FORWARD MVI A, 00
MOV M,A
RET

DATA:

2500- 05
2501- 54
2502- EB
2503- 85
2504- 9B
2505- A8

(i) What is the size of above program?

(ii) What are the result saved in memory location 2601, 2602, 2603, 2604, 2605 and
2606 after the execution of above instructions?

5 (a) How different ports and control words are selected for 8255. How many possible 5
combinations of 8255 would be there when it is operated in mode 2.

(b) In what way interrupt Service Subroutine differs from conventional subroutines? 5
Why there exist two separate return instructions in 8051? Explain the difference in
their usage.