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
 

I/O 1 XFA1 XB1

I/O 2
XA2 XB2

I/O 3 XA3 XB3

1 2 3 4 5 6 1 2
Serial Ports Ethernet

X2
 


    
 
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≤ Ω

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 

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𝑃𝑀𝐴𝑋 𝑃𝑀𝐴𝑋 𝑃𝑀𝐴𝑋

𝑇𝐴𝑃1 = 𝑇𝐴𝑃2 = 𝑇𝐴𝑃3 =
√3 · 𝑈1 · 𝐶𝑇1 √3 · 𝑈2 · 𝐶𝑇2 √3 · 𝑈3 · 𝐶𝑇3

𝐼𝑑𝑖𝑓𝐴 𝐼𝑎1 𝐼𝑎2 𝐼𝑎3

1 1 1
(𝐼𝑑𝑖𝑓𝐵 ) = · 𝐴1 · ( 𝐼𝑏1 ) + · 𝐴2 · (𝐼𝑏2 ) + · 𝐴3 · ( 𝐼𝑏3 )
𝑇𝐴𝑃1 𝐼𝑐1 𝑇𝐴𝑃2 𝐼𝑐2 𝑇𝐴𝑃3 𝐼𝑐3
𝐼𝑑𝑖𝑓𝐶

 

 Ia   1 0 0   Ia   IG
 Ib   0 1 0    Ib   1   IG
     3 
 Ic   0 0 1   Ic   IG

 Ia   Ia   IG
 Ib    1  
A Ib   IG
    3 
 Ic   Ic   IG
 

Incoming positive polarity to the zone Outgoing negative polarity zone

I1 I I
I _ dif   C1  2  C2  3  C3
Tap1 Tap2 Tap3



 √
 

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 

I dif _ 2 d  I dif _ 1  I dif _ 2

I restraint _ 1  I restraint _ 2
I restraint _ 2 d 
2

I dif _ 3d  I dif _ 1  I dif _ 2  I dif _ 3

I restraint _ 1  I restraint _ 2  I restraint _ 3

I restraint _ 3d 
2

A
C

C B

B
 

A
A

C B
C B

C A

B A

B C

A C
 

A B

A
C

C B

C
 

Tapmínimum·Sensibilit y  0.05·In

Tapw1·Sensibilit y  0.05·Inw1
Tapw 2 ·Sensibilit y  0.05·Inw 2
Tapw3 ·Sensibilit y  0.05·Inw3

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

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 

Tapmínimum·Threshold  0.01·In

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IN  Ia  Ib  Ic
RTF
Idif _ S 0   ( Ia  Ib  Ic)  I G
RTG
 Idif _ S 0  Threshold




Idif _ S 0 * RTG
*100  Slope
Ibias * RT ( F , G, N )

Ibias n  max{ Ia, Ib, Ic, I G , IN ,  }

  Ibias n 1  0.998

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 

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

  
IN  3·I 0  I a  I b  I c
RTF    
Idif _ S 0   ( I a  I b  I c)  I G
RTG
 

IN1  3·I 01  Ia1  Ib1  Ic1

IN 2  3·I 02  Ia2  Ib2  Ic2
RTF1 RTF2
Idif _ S 0   3  I 01   3  I 02  I G
RTG RTG

Ibias n  max{ Ia1 , Ib1 , Ic1 , IN1 , Ia 2 , Ib2 , Ic 2 , IN 2 , I G ,  }

  Ibias n 1  0.998

RTF1 RTF2
 3  I 01   3  I 02  0.05 * InG
RTG RTG

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 

  MTA _FASES 
 j 
Sop Ia  e   180
2
Phase Ia Spol Vbc
   
 j  MTA _FASES
Sop Ib  e   180
2
Phase Ib Spol Vca
  
 j  MTA _FASES
Sop Ic  e   180
2
Phase Ic Spol Vab
 

S1pol V1


j MTA_FASES
180
S1op I1  e
 

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 

SETTING INTERNAL CALCULATION

Serial compensation=NO SOP=IN·eMTA_S0·j
Serial compensation=YES
INTERNAL CALCULATION
INTERNAL CALCULATION SPOL=-VN+IN·Z0offset·eMTA_s0·j

-VN+IN·Z0offset·eMTA_S0·j +
INTERNAL CALCULATION
-
<
SPOL=-VN
INTERNAL CALCULATION
|VN| +
-
<
SETTING DIGITAL SIGNAL
Minimum V polarization (V) Polarization Fail In

INTERNAL CALCULATION
IN/In (Rated I of the CT)
+
SETTING -
<
Minimum 3I0 / Irated (%)
INTERNAL CALCULATION
Time
IN/I1 N/4
+
SETTING -
<
Minimum 3I0 / I1 (%) n/4
DIGITAL SIGNAL
SETTING 67N Forward
Permission with low Vpol

Time
INTERNAL CALCULATION
N/4
|ANG(SOP/SPOL)|≤AMP_S0/2 DIGITAL SIGNAL
INTERNAL CALCULATION n/4 67N Reverse
|ANG(SOP/SPOL)+180|≤AMP_S0/2
 

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 

INTERNAL VALUE
SETTING V1MEM=V1
Serial compensation=YES
INTERNAL VALUE
V1MEM=V1(n-2cycles)
DIGITAL SIGNAL Time
Fault detection 4 CYCLES

S
Time
0
0
R
V1
MEMORY

INTERNAL VALUE
DIGITAL INPUT V1MEM=V1MEM
Force V1 with memory

INTERNAL MEASUREMENT
V1
SETTING ≥
Minimum V1 (V)

INTERNAL VALUE
DIGITAL INPUT V1POLARIZ=V1
Force V1 without memory
INTERNAL VALUE
V1POLARIZ=V1MEM

SETTING
Serial compensation=YES
INTERNAL VALUE
VABMEM=VAB
DIGITAL SIGNAL
Fault detection INTERNAL VALUE
VABMEM=VAB(n-4cycles)
Time
4 CYCLES

S
Time
0 0

R
Vc
Memory

INTERNAL VALUE
DIGITAL INPUT VABMEM=VABMEM
Force Vc with memory

INTERNAL MEASUREMENT
VAB
SETTING ≥
Minimum Ph-ph voltage (V)

DIGITAL INPUT INTERNAL VALUE

Force Vc without memory VAB POLARIZ=VAB

INTERNAL VALUE
VAB POLARIZ=VABMEM
 



 ϕ
 ϕ


ϕ ϕ



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
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 
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 
 
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
 


ϕ ϕ

  


ϕ ϕ







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 



 


j MTA_S0
180
S0pol VN  IN  Z0Offset  e

j MTA_S0
180
S0op IN  e
 

SETTING INTERNAL CALCULATION

Serial compensation=NO SOP=IN·eMTA_S0·j
Serial compensation=YES
INTERNAL CALCULATION
INTERNAL CALCULATION SPOL=-VN+IN·Z0offset·eMTA_s0·j

-VN+IN·Z0offset·eMTA_S0·j +
INTERNAL CALCULATION
-
<
SPOL=-VN
INTERNAL CALCULATION
|VN| +
-
<
SETTING DIGITAL SIGNAL
Minimum V polarization (V) Polarization Fail In

INTERNAL CALCULATION
IN/In (Rated I of the CT)
+
SETTING -
<
Minimum 3I0 / Irated (%)
INTERNAL CALCULATION
Time
IN/I1 N/4
+
SETTING -
<
Minimum 3I0 / I1 (%) n/4
DIGITAL SIGNAL
SETTING 67N Forward
Permission with low Vpol

Time
INTERNAL CALCULATION
N/4
|ANG(SOP/SPOL)|≤AMP_S0/2 DIGITAL SIGNAL
INTERNAL CALCULATION n/4 67N Reverse
|ANG(SOP/SPOL)+180|≤AMP_S0/2
 




 

P Re(V)  cos   Im(V)  sin   Re(I)  Im(V)  cos   Re(V)  sin   Im(I)

 

 



 


 


 Re(V)  cos    Im(V)  sin   Re(I)  Im(V)  cos    Re(V)  sin   Im(I) 
I·cosv  i   
V





 
 

Im(V)  cos   Re(V)  sin   Re(I)  Re(V)  cos    Im(V)  sin   Im(I)
I·sinv  i   
V
 

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 

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 

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 

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
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 

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 

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 

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
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 


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 

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 




INTERNAL DIGITAL SIGNAL

Memorization of original
Table

INTERNAL DIGITAL SIGNAL

Activation table 6

DIGITAL SIGNAL Time INTERNAL DIGITAL SIGNAL

POLE A OPEN* Cold load active
Time to Cold
(Memorized)
Load (ms)
DIGITAL SIGNAL
POLE B OPEN* S
DIGITAL SIGNAL
R Cold Load Activation
DIGITAL SIGNAL 0 (Reset
dominat DIGITAL SIGNAL
POLE C OPEN* es)
Cold Load Start
* comes from open pole function

S DIGITAL SIGNAL
R Cold Load Reposition
(Reset
Time dominat
es)
Cold Load
Operating
time (ms)

INTERNAL DIGITAL SIGNAL

DIGITAL INPUT Activation original table
Cold load block

SETTING
Cold Load Enabled

Time
INTERNAL DIGITAL SIGNAL
Cold load active 100 ms.
(Memorized)

INTERNAL DIGITAL SIGNAL

Relay picked up 0
 


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
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 

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




 

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 

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 

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

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 


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




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

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
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 




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
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
 

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






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


 
















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
 
























 














 












 







 









 








 





 

SETTING
Rate of change enabled
Time
MEASUREMENT
0
Vb
+
SETTING -
≥
3 semi-
Minimum monitoring V cycles

MEASUREMENT
Ia
+
-
≥
SETTING
Minimum monitoring I

INTERNAL CALCULATION
fn

SETTING +
<
Maximum monitoring f -

Time
INTERNAL CALCULATION +
35Hz -
≥ Nºcyclesx2–1/2

INTERNAL CALCULATION S DIGITAL SIGNAL

fr.r.ch/vol.r=|(fn-fn-9)/(tn -tn-9)| +
Step 1 pick up
-
≥
R
INTERNAL CALCULATION
fr.r.ch2/vol.r=|(fn-fn-4)/(tn -tn-4)|+0.1Hz/s +
Reset count
-
≥ Freeze count

INTERNAL CALCULATION
fr.r.ch3/vol.r=|(fn-4-fn-8)/(tn-4 -tn-8)|+0.1Hz/s +
-
≥ Time Time Time
INTERNAL CALCULATION + 1 cycle 1 cycle Additional
fr.r.ch/vol.r.1-0.05Hz <
- time

SETTING
fr.r.ch/vol.r.1
Drop out t.
INTERNAL CALCULATION
(fn-fn-9)<0 Time

N. drop out
INTERNAL CALCULATION cycles S DIGITAL SIGNAL
(fn-fn-9)>0 R Step 1 activation
(Reset
SETTING dominat
es)
fr.r.ch/vol.r type = negative
fr.r.ch/vol.r. type = positive and negative
fr.r.ch/vol.r. type = positive

DIGITAL INPUT
Breaker for sealing fr.r.ch/vol.r.1 52a
 

















 








 









VFF  VN  80% ( V)
 
















 

SETTING
ENABLED=YES

DIGITAL SIGNAL
BF BLOCK

DIGITAL SIGNAL
Three-pole trip
DIGITAL INPUT
Three-pole BF start
Time
RETRIP
T DIGITAL SIGNAL
MEASUREMENT 52BF Retrip
IA (DFT ½ CYCLE) + 0
-
≥
MEASUREMENT
IB (DFT ½ CYCLE) Time
52 FAILURE T
MEASUREMENT
+ DIGITAL SIGNAL
IC (DFT ½ CYCLE) ≥
-
0 Breaker Failure Status
SETTING
Phase Current detector (A)
+
SETTING -
≥

MEASUREMENT
IN (DFT ½ CYCLE) +
-
≥
SETTING
Ground Current detector (A)

DIGITAL INPUT
General trip




 




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





 

























 


 


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















 







 






SETTING
Enab. Logic 52_1 = 1 POLE / 4 STATUSES

Enab. Logic 52_1 = 3 POLES / 4 STATUSES

SETTING
DIGITAL INPUT POLE
FAILURE T
52a input
0

DIGITAL INPUT
52b input

SETTING
DIGITAL INPUT POLE DIGITAL SIGNAL
FAILURE T DIGITAL SIGNAL 52_1 Undetermined
52a-Pole A
52_1 phase A Undetermined
0

DIGITAL SIGNAL
52_1 phase A Open
DIGITAL SIGNAL
52_1 phase A Closed

DIGITAL SIGNAL
52_1 phase A Failure
DIGITAL INPUT
52b-Pole A

SETTING
DIGITAL INPUT POLE
FAILURE T DIGITAL SIGNAL
52a-Pole B
52_1 phase B Undetermined
0 DIGITAL SIGNAL
DIGITAL SIGNAL 52_1 Open
52_1 phase B Open
DIGITAL SIGNAL
52_1 phase B Closed

DIGITAL SIGNAL
52_1 phase B Failure
DIGITAL INPUT
52b-Pole B

SETTING DIGITAL SIGNAL

DIGITAL INPUT POLE 52_1 closed
FAILURE T DIGITAL SIGNAL
52a-Pole C
52_1 phase C Undetermined
0
DIGITAL SIGNAL
52_1 phase C Open
DIGITAL SIGNAL
52_1 phase C Closed
DIGITAL SIGNAL
DIGITAL SIGNAL 52_1 failure
DIGITAL INPUT 52_1 phase C Failure
52b-Pole C
 









 

DIGITAL SIGNAL
Ph. A Open Command

SETTING DIGITAL SIGNAL

Trip sealed=YES Ph. B Open Command
DIGITAL SIGNAL DIGITAL SIGNAL
General Trip Ph. C Open Command
DIGITAL SIGNAL DIGITAL SIGNAL
Manual open command Open Command

S
INTERNAL DIGITAL SIGNAL
52 open due to trip
DIGITAL SIGNAL R
52_1A closed
INTERNAL DIGITAL SIGNAL
DIGITAL SIGNAL
52_1B closed S 52 opened manually
Time DIGITAL SIGNAL
DIGITAL SIGNAL Pole status
Open Failure
52_1C closed R failure time (ms)

DIGITAL SIGNAL 0 At least one pole closed 0

DIGITAL SIGNAL
52_1 closed 1 All poles open Ph. A Open Failure
 

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 

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










 





ANALOGUE INPUT
DIGITAL SIGNAL
IA (min (dft,dft ½)) +
< Phase A Open ( I < )
SETTING -

Current threshold (A)

ANALOGUE INPUT
DIGITAL SIGNAL
IB (min (dft,dft ½)) +
-
< Phase B Open ( I < )

DIGITAL SIGNAL
ANALOGUE INPUT +
< Phase C Open ( I < )
IC (min (dft,dft ½)) -
 

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 

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 

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





 


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
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






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




 

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
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

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






 

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



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




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

 

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


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

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


 

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






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
 

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 

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


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
 

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 


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













 





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


 


 

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 

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 

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 

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
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

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 

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 

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
















 

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
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



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
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


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














 





































 







 



















 






 






















 
















 








 




 




 












 





 



 







 



 















 

DIGITAL
INPUTS
(0 - 287)

GOOSE
SIGNALS
(288 - 1695)

















 

PROTECTION SIGNALS
TYPE B
(8192 - 9215)

FAST PROTECTION LOGIC

SIGNALS

(9216 - 9343)

FAST CONTROL LOGIC

SIGNALS
.
(9344 - 9471)

ADDITIONAL
PROTECTION SIGNALS
TYPE B
(9472 -10399)





 

TYPE C
PROTECTION
SIGNALS
(16384 -
16671)














 

TYPE D PROTECTION SIGNALS

(24576 - 24991)

CONTROL SIGNALS (COM FAILURE)

(24992 - 25119)

SLOW LOGIC CONTROL SIGNALS

(25120 - 26399)

SIGNALS RESULTING FROM

ORDERS
(26400 - 26911)












 





PROTECTION MEASUREMENTS
(0 - 299)

GOOSE MEASUREMENTS
(300 - 555)

MEASURERMENTS RESULTING FROM CONTROL LOGICS

(556 - 687)

MEASURERMENTS RESULTING FROM ANALOGICAL

INPUT BOARDS
(688 - 743)

ADDITIONAL
PROTECTION MEASUREMENTS
(744 - 882)






 




PROTECTION COUNTERS
(0 - 31)

COUNTERS RESULTING FROM CONTROL LOGICS

(32 - 149)

ADDITIONAL
PROTECTION COUNTERS
(150 - 176)
 




 

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
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










 




 


 


 


 
















 








 




















 












 











 

 

 
 











 
 







 




  






 




 

 

 

 

 
 

 




  

 

 


 

 
 

 


 

















 

 

  





















 


 






 









 



 




 

 

 ♦

 
 

 











 



 

 
 







 

 











 



 




 


 












 

 





 







 



 

    

 
 


 

 
 

 






k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0






 


 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0



 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0



 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0



 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0



 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0



 

k tr
T  M  TRECAIDA  M 
 2
 I 1  I 1
I  I 
 0  0


 






T  M   A  
B D E tr
  TRECAIDA  M 
   C
I 2 3
 I   I  C  I  C  2
 I 1
 0  I  I  I 
  0   0    0







 

T  M   A  
B D E tr
  TRECAIDA  M 
  I  C 2 3
 I   I  C  I  C  2
 I 1
 0  I  I  I 
  0   0    0

 

T  M   A  
B D E tr
  TRECAIDA  M 
   C
I 2 3
 I   I  C  I  C  2
 I 1
 0  I  I  I 
  0   0    0

 

T  M   A  
B D E tr
  TRECAIDA  M 
   C
I 2 3
 I   I  C  I  C  2
 I 1
 0  I  I  I 
  0   0    0

 

T  M   A  
B D E tr
  TRECAIDA  M 
   C
I 2 3
 I   I  C  I  C  2
 I 1
 0  I  I  I 
  0   0    0

 














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
 Parque Tecnológico de Bizkaia • Edificio 110
48170 Zamudio, Bizkaia, Spain
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