ADDER

 combinational circuit that performs the arithmetic operation of addition with binary
numbers
 The half adder design is carried out first, from which we develop the full adder.

HALF ADDER
 The Input variables designate the augend and addend bits; the output variables produce
the sum and carry. We assign symbols x and y to the two inputs and S (for sum) and C
(for carry} to the outputs.
 The truth table for the half adder

 The simplified Boolean functions for the two outputs can be obtained directly from the
truth table. The simplified sum-of-products expression are

Implementation of half adder

FULL ADDER
 Is a combinational circuit that forms the arthimetic sum of three bits . It consists of three
inputs and two outputs
 two of the input variables denoted by x and y, represent the two significant bits lo be
added. The third input Z represents the carry from the previous lower significant
position
 The truth table for the full adder
 Maps far full adder

 The simplified Boolean functions for the two outputs can be obtained directly from the
truth table. The simplified sum-of-products expression are

Implementation of full adder in sum-of-products form

It can implemented with two half adders and one OR gate,

Implementatlon of full adder with two half adder and an OR gate

Ripple Carry Adder (RCA)

 known as ”n-bit parallel adder”
 is a combinational logic circuit used for the purpose of adding two n-bit binary numbers
and requires ‘n’ full adders in the circuit.RCA is constructed by cascading full adder
blocks in series. the carry out of one stage is fed to the carry-in of next stage. for an n-bit
parallel adder,
 It is less power consumption.RCA is easy to implemented, and for short bit length the
performance are good. For Ripple Adder Ttotal = NTFA
 CARRY PROPAGATION

The addition of two binary numbers in parallel implies that all the bits of the augends and addend
are available for computation at the same time. As in any combinational circuit the signal must
propagate through the gates before the correct output sum is available in the output terminals.
The total propagation time is equal to the propagation delay of a typical gate, times the number
of gate levels in the circuit. The longest propagation &delay time in m adder is the time it takes
the carry to propagate through the full adders. Since each bit of the sum output depends on the
value of the input carry, the value of Si at any given stage in the adder will be in its steady-state
final value only after the input carry to that stage has hen propagated. En this regard, consider
output S3 in Figure below Inputs A3 and B3 are available as soon as input signals are applied to
the adder, however, input carry C3 does not settle to its find value until C2 is available from the
previous stage.
Similarly, C2 has to wait for C1 and so on down to Co. Thus, only after the carry propagates and
ripples through all stages will the last output S3 and carry C4 settle to their final correct value.
Example 4-bit Ripple Carry Adder

 4-bit Ripple Carry Adder:-is used for the purpose of adding two 4-bit binary number.
In mathematics, any two 4-bit binary numbers A3A2A1A0 and B3B2B1B0 will be added as-
Using ripple carry adder, this addition will be carried out as shown by the following logic
diagram-

Logic Diagram for 4-bit Ripple Carry Adder

As shown, Ripple Carry Adder works in different stages where the carry out produced by each
full adder as output serves as the carry in input for its adjacent most significant full adder. When
the carry in becomes available to the full adder, it activates that full adder and it comes into
operation.

Working of a 4-bit Ripple Carry Adder

Suppose we want to add two 4 bit binary numbers 0101 (A 3A2A1A0) and 1010 (B3B2B1B0). Using
ripple carry adder, this addition will be carried out as explained below-
Stage-1:
When Cin will be fed as input to full Adder A, it will activate full adder A. Then, At Full Adder
A, A0 = 1,B0 = 0 and Cin = 0.The sum bit and carry bit produced as output by full adder A will be
calculated by full adder A as-
Calculating S0= A0 ⊕  B0 ⊕ Cin =1 ⊕ 0 ⊕ 0=1therefore S0=1

Calculating C0=A0B0 ⊕  B0Cin ⊕ CinA0=1.0 ⊕ 0.0 ⊕ 0.1=0 ⊕ 0 ⊕ 0=0 therefore Co=0.

Stage-2:
Now, when Co will be fed as input to full adder B by full adder A, it will activate full adder B.
Then, At Full Adder B, A1 = 0, B1 = 1 and C0 = 0. The sum bit and carry bit produced as output
by full adder B will be calculated by full adder B as-
Calculating S1=A1 ⊕ B1 ⊕ C0=0 ⊕ 1 ⊕ 0=1.therefore S1=1.
Calculating C1= A1B1 ⊕ B1C0 ⊕ C0A1=0.1 ⊕ 1.0 ⊕ 0.0=0 ⊕ 0 ⊕ 0=0 therefore C1=0.
Stage-3:
Now, when C1 will be fed as input to full adder C by full adder B, it will activate full adder C.
Then, At Full Adder C, A2 = 1, B2 = 0 and C1 = 0. The sum bit and carry bit produced as output
by full adder C will be calculated by full adder C as-
Calculating S2=A2 ⊕ B2 ⊕ C1=1 ⊕ 0 ⊕ 0=1.therefore S2=1.
Calculating C2= A2B2 ⊕ B2C1 ⊕ C1A2= 1.0 ⊕ 0.0 ⊕ 0.1=0.therfore C2=0.
Stage-4:
Now, when C2 will be fed as input to full adder D by full adder C, it will activate full adder D.
Then, At Full Adder D, A3 = 0, B3 = 1 and C2 = 0.The sum bit and carry bit produced as output
by full adder D will be calculated by full adder D as-
Calculating S3= A3 ⊕ B3 ⊕ C2= 0 ⊕ 1 ⊕ 0= 1 therefore S3 = 1
Calculating C3 = A3B3 ⊕ B3C2 ⊕ C2A3= 0.1 ⊕ 1.0 ⊕ 0.0= 0 ⊕ 0 ⊕ 0= 0 therefore C3 = 0
Thus finally,
Output Sum = S3S2S1S0 = 1111
Output Carry = C3 = 0
Limitation of Ripple Carry Adder
 Ripple Carry Adder does not allow all full adders to be used simultaneously and each
full adder has to necessarily wait till the carry bit becomes available from its adjacent
less significant full adder.
 extremely slow 
 Not very efficient when large bit numbers are used
Table 1 Comparison of adders with delay, memory and logic levels