Exams questions on Kompüter sxemotexnikası və mikroprosessor

sistemləri
1. Give, please, brief and examples to addressing methods used by MP →Immediate
addressing, Register addressing, Direct addressing, Indirect Addressing.
Take concrete instructions to illustrate the specifics of each method. Λ

2. Collate below two instructions. Specify schematically differences and

similarity on how these instructions to be realized in ALU and registers. Λ
How Z- and CY- indicators, and accumulator are changed.
Illustrate on numerical example.

SUB L Opcode (A)←(A) – (L) Z, CY ?

(registry)
CMP L Opcode (A) ─ (L) Z, CY ?
(registry)

3. Functions and destination of PC register. Illustrate answer on example and by Λ

sketch diagram .

4. Functions and destination of SP register. Illustrate answer on example and by

sketch diagram . Λ

5. Functions and destination of HL registers pair. Illustrate answer on example and

by sketch diagram . Λ

6. Functions and destination of Increment/Decrement register. Illustrate answer on

example and by sketch diagram . Λ

7. Configuration of BUSses in microprocessors. Types, their functions and destinations.

Sketch diagram to illustrate how BUSses work. Λ

8. Functions and destination of Instructions Register and Instructions Decoder.

You may Illustrate answer on any concrete instruction and by sketching diagram. Λ

9. Give detailed explanation to sequence of procedures how to execute any instructions.

Fetching of COPs, decoding, fetching of operands. The work of PC, Program memory
cells, busses. You may specify your answer on example of LOAD (86h) instruction.
Sketch relevant diagram for illustration. Λ

10. Detailed sequence of steps to execute math operation between two (random) numbers —
one in memory, other in register. You may specify answer on example of two instructions
ADI (2-bytes) (Add A with data); SUI (2-bytes) (Subtract data from A ).
Sketch relevant diagram. Λ

11. Detailed sequence of steps to execute math operation between two (random) numbers —
booth of them are in registers. You may specify answer on example of two instructions
 ADD H (1-byte) ; SUB L (2-bytes). Sketch relevant diagram. Λ

12. Detailed sequence of steps to execute Logical operation between two (random) numbers
— one in memory, other in register : You may specify answer on example of two
instructions ANI (2-bytes) (A and data); and ORA M (A or loc (HL)).
Sketch relevant diagram. Λ

13.Types of Addressing Modes - various techniques to specify address of data.

Sketch relevant diagram to illustrate answer. ΛΛ

14.Detailed sequence of steps to execute Log-operation between two (random) numbers —

booth of them are in registers. You may specify answer on example of two instructions
ORA L (1-byte) ; XRH (1-byte) (A or excluding H). Sketch relevant diagram. Λ

15.Detailed sequence of steps to execute Logical shifting (left/right ) of (random) number

in register. You may specify answer on example of two instructions
RAR (1-byte) (shift right) ; and RAL (1-byte) (shift left) Sketch relevant diagram. Λ

16.Types and categories of machine commands of INTEL microprocessor. What are the
differences between machine commands and other program instructions ? Λ Λ Λ

17.Detailed sequence of steps to execute branching/transition-operations .

You may specify answer on example of two instructions
JMP(3-bytes) (Go to Loc) ; JZ (3-bytes) (Go to Loc if 0). Sketch relevant diagram. Λ

18.Detailed sequence of steps to execute branching/transition-operations .

You may specify answer on example of two instructions
JMP(3-bytes) (Go to Loc) ; JZ (3-bytes) (Go to Loc if 0). Sketch relevant diagram. Λ Λ

19.Detailed differences between MOV and Load instructions

You may specify answer on example of two instructions
MOV A, H (1-byte) and LDA,H (3-bytes) ; Sketch relevant diagram. Λ

20.Detailed sequence of steps to execute data transformation commands .

You may specify answer on example of two instructions
JNZ(3-bytes) (Go to Loc if not 0) ; JC (3-bytes) (Go to if CY=1).
Sketch relevant diagram. Λ

21. The three-bytes instruction JMP has binary format

[11000011]→[10000101]→[00100000]. Give brief to what operation does that
instruction. Please specify destinations of each byte. ΛΛ

22. Give, please, brief to specifics of following Groups of Machine commands 

Moving data; Math; Logical; Jumping, Relation; Shift; Special instructions;.
23. Memory organization principle in computer. Data and address allocation over memory
 cells. Sketch relevant diagram.
24. By using the machine code structure for Jump instruction please write the full binary
codes format for JMP, JZ , JNZ, JC, JNC instructions. Use arbitrary addresses for each
of 5 instructions. Destination and function each of them

25. What are the principal differences between Harvard Architecture and Princeton
Architecture? What are the technical advantages they cause? Why are separate
instruction and data memories required? You may illustrate answer. Λ
26. By using the machine code structure for MOV please write full instruction for
moving data from L register
to H; A to E; C to D; H registers,
to memory address indicated in HL
from memory address element to
accumulator. Λ

27. Destination and functions of flags used in microprocessors. Illustrate answer with
concrete examples and give relevant sketch. Λ

28. What are the basic functionalities are being performed by different control
signals/ lines in microprocessor. List them and explain the destination of
each of them. Λ
29. Give brief to functions and destinations of six control outputs WAIT, HLDA, WAIT,
DBIN, SYNC and WR derive from Intel 8080, and control inputs HOLD,
A , ,( ) and INT.
Λ
30. What is the process of communicating Memory with the Microprocessor?
How many types of buses that are required to transfer the data between them?

31. What is the difference between microcontrollers and microprocessor? Λ

32. What are the principal differences between Harvard Architecture and Princeton
Architecture? What are the technical advantages they cause?
Why are separate instruction and data memories required? You may illustrate answer. Λ
33. For adding of [00100101] with number [10110110] you have 3-ways — to use
instructions → ADDI (2bytes; opcode C6h) or ADDH (1byte; opcode 84h)
or ADDM (1byte; opcode 86h). Please, sketch schemas for all three ways of
instructions realization. What registers to be involved?
Using random cell addresses, indicate how these instructions might be written
to RAM. Give brief;
Λ
34. What are the differences between
 → JMP; 3-bytes; (PC) ←(address 2 bytes); no-indicators;
→ JZ; 3-bytes; (PC) ← (address 2 bytes); if Z=0;
→ JC; 3-bytes; (PC) ← (address 2 bytes); if CY=1;
Give detailed explanation to their functions and procedures.
Sketch explanatory operational schemas. Λ

35. What are the differences betweenndinstructions:

→ ADI ; 2-bytes; (A)←(A)+(2 byte); Z, CY;
→ ADD H; 2-bytes; (A)←(A) + (H); Z, CY ;
→ ADD M; 1-bytes; (A)←(A) + ((H) (L)); Z, CY ;
Explain by using drawing. Λ

36. How the pipelining works? Basic instruction cycles. Main principle of pipelining
organization?
Λ
37. Sketch please schematically Harvard Architecture and Princeton Architecture.
Concretely, what are the principal differences between them? Why instruction and data
memories are separated? What are the technical advantages of that?

38. How the pipelining procedure is organized in microprocessors? Basic instruction cycles.
How instructions divided on different stages like Fetching, Decoding, Executing and etc? Λ

39. Destination and main components of microcontroller circuit (PİC) and principle of its
operation. Data piping and basic instruction cycle. With neat sketch illustrate answer. Λ

40. The basic formats for PIC controller instructions. Destination of each part of instruction. Λ
Using concrete instruction please specify the differences between PIC and Intel instructions.
.
41. CPU-OS Simulator has instructions like LDB (Load byte), SUB, MOV.
Using these instructions in correct form, please write the due micro-program that will
calculate the 21 -6 -14 and result will be loaded to register R5.

42. CPU- Simulator has instructions like MOV, ADD, LDB ( Load byte).
Using these instructions in correct form, please write the due micro-program that will
calculate the sum of 5+17+1+6 and result will be loaded to register R10.

43. CPU-OS Simulator has instructions like LDB (Load byte), SUB, ADD, MOV.
Using these instructions in correct form, please write the due micro-program that will
calculate the 47 +16 - 32 and result will be loaded to register R20.

44. CISC and RISC processors. Similarity and principal differences