Shri Vile Parle Kelavani Mardat's a DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING ‘Aim: To design Logic Gates. ‘Apparatus: | TINKERCAD - Online simulation Tool Theory: A logie gate is a device that acts as a building block for digital circuits. They perform basic logical functions that are fundamental to digital circuits. Most electronic devices we use today will have some form of logic gates in them. For example, logic gates can be used in technologies such as smartphones, tablets or with memory devices. Different logic gates are as follows: AND GATE - The AND gate is an electronic circuit that gives a high output (1) only if all its inputs are high. A dot (.) is used to show the AND operation, ie AB Applications ~ Used in bank lockers, etc. x B Y A 0 0 Y : 0 H T Y=A.B T 7 0 AND GATE T T H Symbol and Truth Table of AND Gate OR GATE - The output of OR Gate is ‘High’ if either the inputs are ‘High’ or one of the inputs is ‘High’. The output is ‘Low’ if both the inputs are ‘Low’. Applications — Used in alarm circuit for car door system, etc. A B Y A ) 0 0 y B 0 1 1 1 0 1 OR GATE 1 1 1 Symbol and Truth Table of OR GateShri Vite Parle Kelavani Mandat's DWARKADAS J. SANGHVI COLLEGE OF ENGINEERING (%) (Autonomous College Mfilinted to the Univeraiyy of Mumbai) NAAC Accredited with "A* Grade (CGPA : 3.16) Semester IV- B.E. NAND GATE - The output of NAND Gate is ‘High’ if both the inputs are ‘Low’ and if either of the input is ‘Low’. The output is ‘Low’ if both the inputs are ‘High’ Applications - NAND Gates in used in Burglar Alarms and Buzzers, ete. A B Y A 0 T ¥ . = 0 T T Y=_B T 7 T NAND GATE 1 T 0 Symbol and Truth Table of NAND Gate. NOR GATE — ‘The output of NOR Gate is ‘High’ if both the inputs are ‘Low’. The output is ‘Low’ if either the inputs are ‘High’ or either of the input is “High’. Applications — Used to control the flow of ingredients of a mixer tank, ete, x B Y . 0 0 H Y B 0 1 0 NOR GATE | ® ° T 1 0 Symbol and Truth Table of NOR Gate XOR GATE ~ The output of XOR Gate is ‘High’ ifeither of the input is ‘High’. The output is “Low” if both the inputs are ‘High’ or if both the inputs are ‘Low’,Sg Shri Vile Parle Kelavani Mandal's = DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING (%) fed = of Mambal) ZS Semester IV - B.E. Applications — Pseudo-Random Number Generation, Correlation and Sequence Detection, ete. A B Y A 0 0 x B : 0 1 1 Y=A@B 1 0 1 XOR GATE 1 1 0 Symbol and Truth Table of XOR Gate Cireuit 1 AND GATE-74HC08 Diagram: Veo 1] fis] fre] fr] fro] [e] [a]Shri V: = DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING Semester IV - B.E. 3. NAND GATE- 74HC00aome NAAC z Shri Vile Parle Kelavani Mardat's & DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING Observation: 1. AND GATE-74HC08 —Shri Vite Parle Kelavani Mandat's DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING (%) (Rutonomous Celle: dinted t the University of Wambal) NAAC Accradi Grade (COPA: 3.18) Semester IV - B.E. 2. OR GATE-74HC32 ~ 6.00V 18.9 vA CoShri Vite Parle Kelavani Mandat's DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING (Rutonomous Celle: dinted t the University of Wambal) NAAC Accradi Grade (COPA: 3.18) Semester IV - B.E. 3. NAND GATE- 74HC00 —Shri Vite Parle Kelavani Mandat's DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING aome 4. NOR GATE-74HC02 ~Shri Vite Parle Kelavani Mandat's DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING sted t the Grade (COPA: 3.18) Semester IV - B.E. (Rutonomous Celle: NAAC Accradi siversiy of Mambai) 5. XOR GATE-74HC06 ~spe Shui Vile Pace Ket = DWARKADAS J, SANGHVI COLLEGE OF ENGINEERING i Mandat's Semester IV - B.E. @) —— Conclusion: Thus, we conclude here that all the logic gates ie. AND GATE - 74HC08, OR GATE - 74HC32, NAND GATE - 74HC00, NOR GATE - 74HC02 and XOR GATE - 74HC06 are verified using tinker cad.