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Sinusoidal shaping of the ISF in LC oscillators

Article  in  International Journal of Circuit Theory and Applications · October 2008

DOI: 10.1002/cta.458

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Abumoslem Jannesari Mahmoud Kamarei

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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Int. J. Circ. Theor. Appl. (2007)
Published online in Wiley InterScience (www.interscience.wiley.com). DOI: 10.1002/cta.458

Sinusoidal shaping of the ISF in LC oscillators

Abumoslem Jannesari∗, † and Mahmoud Kamarei

Electrical and Computer Engineering Department, University of Tehran, P.O. Box 14395-515, Tehran, Iran

SUMMARY
A new method to decrease the phase noise of the sinusoidal oscillators is proposed. The proposed method
is based on using a dynamic transistor biasing in a typical oscillator topology. This method uses the
oscillator impulse sensitivity function (ISF) shaping to reduce the sensitivity of the oscillator to the
transistor noise and as a result reducing the oscillator phase noise. A 1.8 GHz, 1.8 V designed oscillator
based on the proposed method shows a phase noise of −130.3 dBc/Hz at 1 MHz offset frequency, thereby
showing about 6 dB phase noise decreasing in comparison with the typical constant bias topology. This
result is obtained from the simulation based on 0.18u CMOS technology and on-chip spiral inductor with
a quality factor equal to 8. Copyright q 2007 John Wiley & Sons, Ltd.

Received 17 September 2006; Revised 18 August 2007; Accepted 3 September 2007

KEY WORDS: phase noise; LC oscillators; switched-bias oscillator; impulse sensitivity function (ISF)

1. INTRODUCTION

The constant demand to increase data rates in wireless networks puts hard limits on the efficient
bandwidth usage. Local oscillator phase noise is an important limiting factor in the efficient usage
of bandwidth when designing a wireless system. This has spurred numerous research efforts in
this area. The general phase noise theory developed in [1, 2] has introduced a new view to the
phase noise of oscillators. On the basis of this theory, some phase noise reduction methods have
been proposed [3–8]. These methods are based on using symmetric structures and optimizing the
oscillator for minimum phase sensitivity. In addition to these techniques, differential structures with
improved oscillation amplitude also give good phase noise behavior [3–5]. Also, the traditional
Colpitts oscillator has been analyzed for its phase noise behavior and new differential structures
for Colpitts oscillator are introduced with superior phase noise behavior [4, 6]. Although the

∗ Correspondence to: Abumoslem Jannesari, Electrical and Computer Engineering Department, University of Tehran,
P.O. Box 14395-515, Tehran, Iran.
†
E-mail: jannesari@ut.ac.ir

Contract/grant sponsor: Applied-Electromagnetic-Systems Centre of Excellence at University of Tehran

Copyright q 2007 John Wiley & Sons, Ltd.

 A. JANNESARI AND M. KAMAREI

proposed methods improve the phase noise of oscillators, better performance is required for the
local oscillator in wireless OFDM and multiple-input multiple-output systems [9].
In this paper, a new method based on impulse sensitivity function (ISF) shaping is proposed.
The proposed method can improve the phase noise of LC oscillator at least 6 dB whilst with 20%
saving in the oscillator power consumption. The introduced method can give better phase noise
performance, when the switching duty cycle is decreased.
Section 2 introduces the ISF shaping scheme, and Section 3 presents the closed-form equa-
tions for phase noise improvement quantity. Sections 4 and 5 present the simulation results and
conclusion.

2. OSCILLATOR PHASE NOISE REDUCTION

There are various models to describe the phase noise of oscillators [2, 10–12]. The most practical
and simple model is the LTI model proposed by Leeson [10] and developed by other researchers
[11]. But this model is not complete in the prediction of the phase noise of an oscillator. This
is shown using a simple example by Hajimiri in the general phase noise theory expression [1].
The proposed LTV model in [1] is a very useful model in oscillators’ phase noise consideration.
On the basis of this model, we can express new design methods for designing low-phase noise
oscillators. One of these methods is the shaping of the ISF function of an oscillator. From [2], the
phase noise formula is
⎡ ⎤
i n2 ∞ 2
⎢ cn ⎥
⎢
f n=0 ⎥
L(

) = 10 log10 ⎢ 2 ⎥ (1)
⎣ 4qmax (

)2 ⎦

where Cn is the coefficient of nth harmonic of the ISF Fourier series expansion and qmax is the
maximum charge displacement on the tank circuit. qmax is proportional to the oscillation amplitude
and the tank capacitor. From Parsval’s formula, the harmonics power summation can be expressed
based on the root-mean-square (rms) value as

∞
cn2 = 2 ISF2rms (2)
n=0

Combining Equations (1) and (2) gives the phase noise formula based on the rms value of the
ISF as
⎡ ⎤
i n2
⎢ (2 ISFrms ) ⎥
2
⎢
f ⎥
L(

) = 10 log10 ⎢ 2 (

)2 ⎥
(3)
⎣ 4qmax ⎦

From this equation, it is clear that the oscillator phase noise can be reduced by: (a) reducing the
noise power, (b) reducing the rms value of ISF, (c) increasing the tank Q, and (d) increasing
the oscillation amplitude. Items (c) and (d) increase qmax , thereby reducing the oscillator phase
noise. But the tank Q (quality factor) is limited to the on-chip low-Q inductors, and for on-chip

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 SINUSOIDAL SHAPING OF THE ISF IN LC OSCILLATORS

inductors, increasing Q has physical limitations. Increasing the oscillation amplitude is limited
by the supply voltage which is not achievable in low voltage designs used in new short channel
processes. Decreasing the noise power is also limited by the fabrication technology, and for ultra-
short channel CMOS technologies, transistor noise is increased. But lowering the rms value of the
ISF is a straightforward solution.
As shown in [2], ISF is almost equal to f  (x)/[max( f  (x))]2 , where f (x) is the oscillator output
waveform. Therefore, for LC oscillators ISF is approximately equal to cos(
0 t)/Vm , where the
oscillator output voltage is Vout (t) = Vm sin(
0 t). If the oscillator bias current is constant, the ISF
of an LC oscillator is approximately a sinusoidal function, but if the bias current varies with time,
then the generated noise from transistors will be cyclostationary process controlled by the shape of
the bias current. In [2], it is shown that in this case, the equivalent ISF is the product of the prime
ISF and a(t), which is the shape of the transistor current waveform. a(t) is a scaled function with
unity peak value and it is proportional to the transistor current and it is a periodic function. By
changing the shape of a(t), the shape of the equivalent ISF modifies. Shaping the equivalent ISF
should be done in a manner that its rms value decreases to reduce the phase noise of the oscillator.
Indeed, minimizing the rms value of the equivalent ISF is an optimization problem and the problem
is to find the unity function of a(t), which minimizes the rms value of the equivalent ISF as

2 
1  cos(
t)
0
min(ISF2rms ) = min a(t) d(
0 t) (4)
 0 Vm

where the oscillator output voltage is Vout (t) = Vm sin(
0 t). As a(t) is less than or equal to one,
it can be expressed as

 

cos(
0 t) 2 cos(
0 t) 2
a(t) d(
0 t)
d(
0 t) (5)
0 Vm 0 Vm

From Equation (5), for equal oscillation amplitude (Vm ), ISF shaping can decrease the ISF2rms value
in order to decrease the phase noise of the oscillator. A good choice for a(t) can be a sinusoidal
function synchronously with the oscillator output sinusoidal voltage. As the prime ISF of an LC
oscillator is maximum when the output voltage is in its zero crossing, with this choice of a(t),
the equivalent ISF is zero when the output voltage is in the zero-crossing points. This proposes to
have sinusoidal waveform for the bias current synchronously with the oscillator output voltage.
In the above discussion, it was assumed that each transistor is on in a half of a sinusoidal cycle.
But the on cycle of transistors can be decreased to have less rms value for the equivalent ISF. This
is shown as
−t1
 

cos(
0 t) 2 cos(
0 t) 2
a(t) d(
0 t)
a(t) d(
0 t) (6)
t1 Vm 0 Vm
where t1 is the conduction phase of the oscillator bias transistor.

3. SINUSOIDAL SWITCHING

As discussed in the previous section, one of the effective methods for decreasing the phase noise
of the oscillator is to shape the equivalent ISF to have less rms value. This can be carried out by

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 A. JANNESARI AND M. KAMAREI

changing the current waveform of the transistors. In the LC oscillators with a sinusoidal waveform,
a good solution for the transistor current is the sinusoidal waveform in-phase with the oscillator
output voltage. Of course, decreasing the on duty cycle of the transistors can also be valuable in
reducing the rms value of the ISF. To express the appropriate equations to show the performance of
this method, the oscillator of [3] is taken as the reference oscillator and tried to apply the proposed
method, to see how much it can improve the phase noise behavior of the oscillator. The oscillator
of [3] is depicted in Figure 1. In order to apply the sinusoidal current to the tail transistor, the
constant bias tail transistor MB is replaced with two transistors MB1 and MB2 (as depicted in
Figure 2) that they are derived with sinusoidal voltages synchronously with the oscillator output
sine wave and 180◦ phase difference with each other. This sinusoidal current switching oscillator is
depicted in Figure 2. To calculate the a(t) function, it is needed to calculate the tail bias currents of
MB1 and MB2 transistors. In order to generalize the problem, it is assumed that the tail transistors
are on for duty cycles less than or equal to 100% and that the 100% duty cycle is achieved when
the previously defined t1 is equal to zero and each tail transistor conducts for a half of a sine wave
cycle. For duty cycle less than 100%, each tail transistor conducts for less than half cycle.
First, the tail transistor current is calculated to extract the unity a(t) function. If the transistors
follow the short channel current equation, then applying a sinusoidal signal to the transistor gate–
source gives sinusoidal current for the transistor; otherwise the transistor current will be a square of
the sinusoidal. However, for the 0.18u CMOS process with low power supply voltage, transistors
still follow the long channel equations and hence the transistor current will be a square of the
sinusoidal. As a result, the exactly sinusoidal switching is not possible. Therefore, we follow the
proposed scheme with squared sinusoidal tail current for ISF shaping. To simplify the equations,
the oscillation period is scaled to unit. With the assumption that the gate–source voltage of tail
transistors is driven with sinusoidal voltages, the output voltage and the tail transistor current
will be
Vout (t) = Vm sin(t) (7)

2
 w sin(t)−sin(t1 )
I D = Cox (vgs −vth )2 = Iˆb (8)
2 l 1−sin(t1 )

VDD

M1 M2

outn L outp
r

C
M4 M3

Ib

MB

Figure 1. Hajimiri’s oscillator [3].

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 SINUSOIDAL SHAPING OF THE ISF IN LC OSCILLATORS

MB1 MB2

Figure 2. Sinusoidal-switched proposed oscillator.

where Iˆb is the peak voltage of the bias transistor current and t1 is the time when vgs voltage
becomes greater than the transistor threshold (vth ) voltage. On the basis of the transistor current,
a(t) will be


sin(t)−sin(t1 ) 2
a(t) = (9)
1−sin(t1 )
Now using the a(t) function, the equivalent ISF and its rms value will be in Equations (10) and
(11), respectively, as


cos(t) cos(t) sin(t)−sin(t1 ) 2
ISFeq (t) = a(t) = (10)
Vm Vm 1−sin(t1 )
−t1 −t1
2 2
1 1 cos(t) sin(t)−sin(t 1 )
ISF2rms = ISF2eq (t) dt = dt (11)
 t1  t1 vm 1−sin(t1 )

If the switching duty cycle (d) is defined based on t1 , the duty cycle d will be
−2t1
d= (12)

However, decreasing the duty cycle and changing the bias current from a constant bias to a
sinusoidal decrease the effective injected power to the tank circuit; hence, to have the same
oscillation amplitude as the reference oscillator (Figure 1), an increase in the amplitude of the
sinusoidal-switched-bias current is required. As the average injected power to the tank circuit is

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 A. JANNESARI AND M. KAMAREI

equal to the tank circuit power loss, we have


1 −t1 sin(t)−sin(t1 ) 2 V2
Pav = Vm sin(t) Iˆb dt = m (13)
 t1 1−sin(t1 ) 2R
From Equation (13), the oscillation amplitude (Vm ) based on R, Ib , and d is calculated as






d 2 3 d d d d
ˆ 2 sin − sin − cos (d+ sin(d))+2 sin cos2
2R Ib 2 3 2 2 2 2
Vm =

2 (14)
 d
1− cos
2
However, for the reference oscillator (Figure 1), the oscillation amplitude is [2]
4R Ib
Vm = (15)

For equal amplitude in both oscillators of Figures 1 and 2, the peak bias current ratio of two
oscillators will be

Iˆb
iRatio peak =
Ib,REF


2
d
1− cos
2
=





d 1 3 d 1 d d d
sin − sin − cos (d+ sin(d)) + sin cos2
2 3 2 2 2 2 2
(16)

3.1. Noise
The main noise sources that contribute in the oscillator phase noise can be listed as (1) thermal
noise of the series resistor of the tank inductor and (2) thermal and flicker noises of the transistors.
As mentioned in [3], noise of the tail current source transistor can be removed by using the
appropriate filters; therefore, only noise of the four cross-coupled transistors on the tank circuit
is considered in the oscillator phase noise. Now, we try to calculate the noise behavior difference
between the reference oscillator and the proposed sinusoidal-switched oscillator. To find a closed
form for the noise power ratios in two oscillators, we initially assume that the noise power of the
series resistor of the tank inductor is small enough to ignore it in comparison with the noise power
of the cross-coupled transistors.
First, we consider the point that when the transistors turn off, their noise contribution is zero.
Hence, when the conduction duty cycle is less than 100%, the noise power is multiplied by the
duty cycle. To check this, let us see Figure 3 and express the noise power equations as

1 T 2
E(n 2 ) = lim n (t) dt = 2 (17)
T →∞ T 0

1 T 2
E(n 1 ) = lim
2 n (t) p(t)2 dt = 2 d (18)
T →∞ T 0

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 SINUSOIDAL SHAPING OF THE ISF IN LC OSCILLATORS

p(t)

t
n(t)

n1(t)

Figure 3. Cyclo-stationary noise.

On the other hand, altering the transistor current changes its noise profile. If we assume an
average current on the transistor to calculate its noise, the noise power calculation can be expressed
in a closed form. As the noise current of a transistor is related to its gm and so to the bias
current, the effect of increasing the bias current on the noise power should be considered for
the sinusoidal-switched oscillator in comparison with the reference oscillator. To analyze the bias
current dependence of noise for the MOS transistors, the flicker and thermal noise contributions
are considered separately. For flicker noise, the total noise of transistors can be expressed as [3]


i n2 1 kn kp
= 2
gm,n + g2 (19)

f 2 (wl)n cox f (wl) p cox f m, p

where kn , k p are flicker noise parameters of NMOS and PMOS transistors, cox is the gate oxide
capacitor per unit, gmn , gmp are the trans-conductance of NMOS and PMOS, and f is the frequency
in Hertz. For equal W, L for transistors in both the reference oscillator and the proposed oscillator
and equal gm for PMOS and NMOS transistors, the ratio of the noise power can be expressed as

i n2 I¯Bias
= = iRatio ave (20)
2
i n,REF IBias,REF

where iRatio ave is the average bias current ratio (dependent on the duty cycle d) in the two
oscillators and is calculated as


1 3 d
¯IBias d − sin(d)+(d) cos2
2 2 2
= iRatio ave(d) = (iRatio peak(d))

2 (21)
IBias,REF d
 1−cos
2

From the general phase noise theory of [2], the flicker noise component of the transistors is up-
converted to the oscillation frequency by the weight of c0 (DC value of ISF) and has more effect on
the phase noise in small frequency offsets from the oscillation frequency. For the offset frequencies
in the region where the phase noise is decreasing with 1/ f 2 slope, the phase noise is affected only

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 A. JANNESARI AND M. KAMAREI

by the thermal noise of transistors. For the thermal noise component of the transistors, the noise
power spectrum can be expressed in the same way as

i n2 1
= [(4kT )gm,n +(4kT )gm, p ] (22)

f 2
where k is the Boltzman constant, T is temperature in Kelvin, and  is the MOS transistor short
channel parameter. The thermal noise current power ratio of the sinusoidal-switched oscillator to
the reference oscillator can be expressed as

i n2 I¯Bias √
= = iRatio ave (23)
i2 IBias,REF
n,REF

As there is one ISF function per noise source, we should check the ISF for each noise source. As
the contributed noise sources in the oscillator phase noise come from the cross-coupled transistors,
the ISF function for each cross-coupled transistor noise source is almost the same as that for the
other cross-coupled transistor noise source due to the symmetric structure. Therefore, we use the
ISF of Equation (10) for all the noise sources. By using the phase noise equation of Equation (3),
now we can compare the phase noise behavior of the proposed method with the reference oscillator
of [3]. To do so, the phase noise improvement function is defined as

IMF(d)|dB = L(

)|REF − L(

)|sine,sw (24)

The IMF(d) function is calculated in dB and gives a good measure for the phase noise improvement.
With the assumption that both oscillators have the same tank circuit and the same oscillation
frequency and the same oscillation amplitude, we obtain the phase noise improvement function
versus the switching duty cycle (d) as
⎛ ⎞
i 2
IMF(d) = −10 log10 (2∗ISF2rms )−10 log10 ⎝d n ⎠ (25)
2
i n,REF

And interesting for two cases, flicker noise dominant and thermal noise dominant, the IMF(d)
will be
 
−10 log10 [2 ISF2rms d (iRatio ave)] if Thermal noise dominant
IMF(d) = (26)
−10 log10 [2 ISF2rms d(iRatio ave)] if Flicker noise dominant

It should be reminded that this closed form for IMF was obtained by ignoring the noise of the
series resistor of the tank inductor. The IMF function is shown in Figure 4. As can be seen in
this figure, the phase noise improvement for 100% duty cycle is about 9.5 dB for both flicker and
thermal noise dominant regions. In this case, each tail transistor conducts for half of a sinusoidal
cycle. Including this phase noise improvement due to efficient ISF shaping, switching of the tail
transistor also reduces its flicker noise, which further improves the oscillator phase noise behavior
[7, 8]. However, due to the lack of a good model to express the flicker noise and gate–source
switching voltage dependency, this effect is not considered here.

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 SINUSOIDAL SHAPING OF THE ISF IN LC OSCILLATORS

Figure 4. The phase noise improvement function (IMF(d)) versus the duty cycle.

Figure 5. Power consumption ratio versus the switching duty cycle (d).

3.2. Power consumption

Now, it is needed to check whether this switching scheme affects the oscillator power consumption
due to increased peak bias current. The power consumption for the reference oscillator of Figure 1
and the switched-bias oscillator of Figure 2 can be expressed, respectively, as

Pd,REF = Vdd Ib (27)

Pd,Sine-switched = Vdd I¯b (28)

Considering the power consumption of the proposed circuit in comparison with the reference
circuit of Figure 1 with equal oscillation amplitude, the power ratio can be expressed as
Pd,Sine-swithced I¯Bias
= = iRatio ave(d) (29)
Pd,REF IBias,REF
This ratio can be evaluated from Equation (21). The power consumption ratio versus the duty cycle
(d) is depicted in Figure 5. As can be seen in this figure, for d = 100%, this ratio is about 0.75,

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 A. JANNESARI AND M. KAMAREI

which means 25% less power consumption in the sinusoidal-switched oscillator than the reference
oscillator in full duty cycle. For duty cycles less than 100%, the power consumption reduces to
37% in the smallest duty cycle near 10%.

4. SIMULATION RESULTS

To verify the derived equations for the phase noise improvement of the sinusoidal switching, the
SpectreRF circuit simulation on the reference oscillator of Figure 1 and the sinusoidal-switching
oscillator of Figure 2 were run. The structure of the proposed sinusoidal-switched oscillator is the
same as that of Hajimiri’s oscillator [3]. In this oscillator, capacitors Cf1 and Cf2 bring the output
sinusoidal voltages synchronously to the gate of transistors MB1 and MB2. The DC voltage in gate
of MB1 and MB2 transistors is tuned to be near vth (transistor threshold voltage) by switching
them to a constant DC voltage in starting up the oscillator. This DC voltage is generated on the
gate–source of the diode-connected MBB transistor in Figure 2 and it is connected to the gates
of MB1 and MB2. In starting up the oscillator, the connected switches from MB1 and MB2 to
MBB become turned off and the sinusoidal voltages on the gates of MB1 and MB2 generate the
sinusoidal bias current for the oscillator. Therefore, each of transistors MB1 and MB2 conducts
for half of a sinusoidal period and as assumed in Equation (8), the current of MB1 and MB2 will
be square of the sinusoidal. As the DC voltage in the gates of MB1 and MB2 is about vth, the t1
mentioned in Equation (8) will be zero and switching will run with d = 100% duty cycle.
The oscillators were designed for 1.8 GHz oscillation frequency in 1.8 V supply voltage. The
used CMOS process was 0.18u CMOS process. It is assumed that the inductor is an on-chip spiral
inductor with a quality factor of 8 and its loss is modeled with a resistance series with the inductor.
The SpectreRF simulation results for the proposed oscillator of Figure 2 are shown in Figures 6–9.
In Figure 6, oscillator output voltages and the drive voltage at the gates of MB1 and MB2 are
shown. Figure 7 shows the current of MB1 and MB2 and sum of their currents as the tail Ib current
for the oscillator of Figure 2. In Figure 8, the numerically calculated normalized ISF and a(t) are
shown. The product of ISF and a(t) as the equivalent ISF is depicted in this figure. As shown in
Figure 8, the rms value of the equivalent ISF is less than that of the ISF. The phase noise simulation
was carried out by using the SpectreRF advanced PSS and Pnoise analyses. The simulation results
for both oscillators are shown in Figure 9. As shown in this figure, the phase noise improvement

Figure 6. Sinusoidal voltages at the oscillator output nodes and the gates of
MB1 and MB2 transistors of Figure 2.

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 SINUSOIDAL SHAPING OF THE ISF IN LC OSCILLATORS

Figure 7. The tail current of Ib and the currents of MB1 and

MB2 transistors for the oscillator of Figure 2.

Figure 8. Normalized ISF, a(t), and product of them as the equivalent ISF for the oscillator of Figure 2.

Figure 9. SpectreRF phase noise simulation for two oscillators.

is about 6 dB for d = 100% duty cycle. Owing to the unavailability reliable flicker noise transistor
model parameters, only the thermal noise region was examined in this simulation. The phase noise
for the reference oscillator and the proposed sinusoidal-switched oscillator was obtained to be about
−124.5 and −130.3 dBc/Hz at 1 MHz offset frequency, respectively. The theoretical calculation
predicts about 9 dB phase noise improvement for 100% sinusoidal switching, but in the circuit
simulation, it is about 6 dB. This difference is because of neglecting the noise of the series resistor

Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta
 A. JANNESARI AND M. KAMAREI

of the tank inductor in the derived equations and another reason is due to the incomplete sinusoidal
switching as assumed in Equations (8)–(10). The simulated sinusoidal-switched oscillator has about
20% less power consumption than the reference oscillator, but in the theoretical calculation it is
predicted that there is 25% power saving in the sinusoidal-switched method. This difference is due
to overlapping the conduction times of MB1 and MB2 transistors (in the oscillator of Figure 2)
as shown in Figure 7.

5. CONCLUSION

A new method for improving the phase noise of LC oscillators has been proposed. The proposed
method is based on shaping of the oscillator ISF function. The used shaping method was based on
sinusoidal currents for the transistors. The proposed method was simulated on a 1.8 GHz, 1.8 V
oscillator designed with 0.18u CMOS process and on-chip inductor with a quality factor equal
to 8. It was gained about 6 dB phase noise improvement for 100% duty cycle with 20% power
consumption reduction. The proposed method is a general method for phase noise improvement of
LC oscillators and can be applied for different structures. The 6 dB phase noise improvement for
100% duty cycle is a very attractive gain. Although lowering the duty cycle can give additional
phase noise improvement, the 100% duty cycle sinusoidal switching is so straightforward in
practical implementation.

ACKNOWLEDGEMENTS
The authors would like to thank the Applied-Electromagnetic-Systems Centre of Excellence at University
of Tehran for the financial and technical support.

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Copyright q 2007 John Wiley & Sons, Ltd. Int. J. Circ. Theor. Appl. (2007)
DOI: 10.1002/cta

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