MV-4 94V-0 Schematic Digram

Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the M540SS/M548SS/M549SS notebook’s PCB’s. The following table indicates
where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Table B - 1

Schematic
System Block Diagram - Page B - 2 968 PCIE LAN GPIO 2/4 - Page B - 15 System Power - Page B - 28
Diagrams
Processor 1/2 - Page B - 3 968 USB SATA 3/4 - Page B - 16 VCORE - Page B - 29
B.Schematic Diagrams
Processor 2/2 - Page B - 4 968 PWR GND 4/4 - Page B - 17 VDD3, VDD5 - Page B - 30
SiSM672 HOST PCIE 1/5 - Page B - 5 Clock Generator & Clock Buffer - Page B - 18 1.05VS, 1.2V, 1.5V - Page B - 31
SiSM672 DRAM 2/5 - Page B - 6 SiS307ELV - Page B - 19 1.8V, 0.9VS - Page B - 32
SiSM672 MuTITOL VGA 3/5 - Page B - 7 ODD, SATA, USB2.0 *2 - Page B - 20 D/D BD (CRT, S-Video, RJ-11) - Page B - 33
SiSM672 PWR 4/5 - Page B - 8 Card Reader JMB385 - Page B - 21 D/D BD (Charger, DC-In) - Page B - 34
SiSM672 GND 5/5 - Page B - 9 KBC-ITE IT8512E - Page B - 22 Audio BD (Phone Jack, RJ-11, USB) - Page B - 35

DDRII SO-DIMM - 2 - Page B - 10 Mini Card, New Card, TPM, FGPT - Page B - 23 Hot key BD (Hot key, LED) - Page B - 36
Version Note
DDRII SO-DIMM - 1 - Page B - 11 AZALIA Codec ALC883 - Page B - 24 RJ-45 Board - Page B - 37
The schematic dia-
grams in this chapter
Panel, Fan - Page B - 12 Audio AMP2056A - Page B - 25 FingerPrint Board - Page B - 38
are based upon ver-
LAN PHY Realtek 8201CL - Page B - 13 MDC, BT, PWRGD, DDB CON - Page B - 26 sion 6-7P-M5SS6-002.
If your mainboard (or
968 PCI IDE MuTIOL SPI 1/4 - Page B - 14 TouchPad, LED - Page B - 27 other boards) are a lat-
er version, please
check with the Service
Center for updated di-
agrams (if required).
B - 1
Schematic Diagrams
System Block Diagram
D/D BOARD SYSTEM POWER,2.5V

CHARGER,DC JACK,
CRT,RJ-11 CLEVO M540SS System Block Diagram RD111 Design
14.318 MHz
+VCORE
AUDIO BOARD Colck Generator
AUDIO PHONE JACK, ICS9LPR600 Intel Merom Memor y Termina tion
56pins TSSOP
USB CONNECTOR PROCESSOR VDD3,VDD5,3.3V,5V
1 7 .1 *8 . 1*1 .2 mm
47 9 pi ns s oc ke t P DDRII
HOT KEY BOARD SO-DIMM0
POWER BOTTON, 1.05VS,1.5V,1.2V
3 5 *3 5 *2. 7m m
INDICATOR LED, DDRII
LID SWITCH SO-DIMM1
FSB 1.8V,0.9VS
Sheet 1 of 37 LCD CONNECTOR LVDS (TV)
667/800 MHz Clock Buffer
ICS9P935
System Block SiS307ELV
169balls BGA
NORTH BRIDGE
28pins SSOP
1 7. 1*8 .1 *1. 2 mm
MAIN Boa rd AUDIO Board
Diagram CLICK BOARD

TOUCH PAD IVERTER 1 3*1 3*1 .7 mm
SiSM672 SPDIF LINE MIC HP
Synaptic
533/667 MHz OUT IN IN OUT
RJ-11
810602-1703 CRT 852 ball s TEB GA PCIE
3 5 *3 5 *2. 4m m
AZALIA
32.768 KHz Mini PCIE Azalia Codec AUDIO AMP
MDC
EC SOCKET Realtek ANPAC
SPI MuTIOL 1G MODULE ALC883 APA2056A INT SPK
ITE 8512E (USB2)
48pins LQFP 24pins TSSOP
128pins LQFP
LPC 33 MHz MDC CON 9 *9 *1. 6 mm 9 .8 *6 . 4*1 .2 mm
1 4*1 4*1 .6 m m
SOUTH BRIDGE 24 MHz INT MIC
AZALIA LINK
SiS968 100 MHz
INT. K/B EC SMBUS PCIE
570b alls mBGA
PCIE 100 MHz
THERMAL SMART SMART 2 7*2 7*2 .5 mm
SENSOR FAN BATTERY GMAC
32.768KHz
F75383M
10/100M PHY New Card
CARD READER 24.576
SATA I/II 3.0Gb/s RTL8201CL SOCKET MHz
USB2.0 48pins LQFP (USB5) JMB385
PATA-133 4 80 Mbps 9*9 *1. 7m m
25 MHz
FINGER PRINTER BOARD
CCD Bluetooth USB0 USB1 USB & Phone
SATA HDD ODD Jack B'd (USB4) Mini PCIE 4IN1
(USB6) (USB4)
USB3 FingerPrint SOCKET SOCKET
(USB2)
RJ-45
12 MHz
(Optional)
B-2
Schematic Diagrams
Processor 1/2
J SKT1 A
4 H _ A # [3 5 :3 ]
H _ A# 3 J4 H 1 H_ A D S # 4 4 H _ D# [6 3 :0 ] J S K T1 B H _ D# [6 3 :0 ] 4
H _ A# 4 L5 A[3 ]# AD S# E 2 H _D # 0 E2 2 Y 22 H_ D #32
A[4 ]# B NR # H_ B N R # 4 D [0 ]# D [3 2 ]#
H _ A# 5 L4 G 5 H _D # 1 F24 A B2 4 H_ D #33
A[5 ]# B PR I# H_ B P RI# 4 D [1 ]# D [3 3 ]#
H _ A# 6 K5 H _D # 2 E2 6 V 24 H_ D #34
A[6 ]# D [2 ]# D [3 4 ]#
H _ A# 7 M3 H 5 H _D # 3 G 22 V 26 H_ D #35
ADDR GROUP 0
A[7 ]# D EFER # H_ D E F E R# 4 D [3 ]# D [3 5 ]#
H _ A# 8 N2 F 21 H _D # 4 F23 V 23 H_ D #36
A[8 ]# DR DY # H_ D RD Y # 4 D [4 ]# D [3 6 ]#
H _ A# 9 J1 E 1 H _D # 5 G 25 T22 H_ D #37
DATA GRP 0
DATA GRP 2
A[9 ]# D BSY # H_ D B S Y # 4 D [5 ]# D [3 7 ]#
H _ A# 1 0 N3 H _D # 6 E2 5 U 25 H_ D #38
A[1 0 ]# D [6 ]# D [3 8 ]#
CONTROL
H _ A# 1 1 P5 F 1 H _ BR 0 # H _D # 7 E2 3 U 23 H_ D #39
A[1 1 ]# B R0 # H_ B R 0 # 4 D [7 ]# D [3 9 ]#
H _ A# 1 2 P2 H _D # 8 K2 4 Y 25 H_ D #40
A[1 2 ]# D [8 ]# D [4 0 ]#
H _ A# 1 3 L2 D 20 H _ IE R R# H _D # 9 G 24 W 22 H_ D #41
A[1 3 ]# I E RR # D [9 ]# D [4 1 ]#
H _ A# 1 4 P4 B 3 H _ IN IT # H _D # 1 0 J24 Y 23 H_ D #42
H _ A# 1 5 P1 A[1 4 ]# IN IT # H_ IN IT # 14 H _D # 1 1 J23 D [1 0 ]# D [4 2 ]# W 24 H_ D #43
H _ A# 1 6 R1 A[1 5 ]# H 4 H _D # 1 2 H 22 D [1 1 ]# D [4 3 ]# W 25 H_ D #44
A[1 6 ]# L OC K # H_ L O CK # 4 D [1 2 ]# D [4 4 ]#
Sheet 2 of 37
M1 H _D # 1 3 F26 A A2 3 H_ D #45
4 H _A D S TB # 0 A D S T B [0 ]# D [1 3 ]# D [4 5 ]#
C 1 H _ CP UR S T # H _ D# 1 4 K2 2 A A2 4 H_ D #46
4 H _ R E Q# [ 4 : 0 ] H_ R EQ #0 K3 RE S E T # F 3 H_ C P U RS T# 4 H _D # 1 5 H 23 D [1 4 ]# D [4 6 ]# A B2 5 H_ D #47
RE Q[ 0 ] # R S[0 ]# H_ R S # 0 4 D [1 5 ]# D [4 7 ]#
H_ R EQ #1 H2 F 4 J26 Y 26
RE Q[ 1 ] # R S[1 ]# H_ R S # 1 4 4 H _ DS T B N# 0 D S T B N [0 ]# D S T B N [2 ]# H_ D ST B N # 2 4
Processor 1/2
H_ R EQ #2 K2 G 3 H 26 A A2 6
RE Q[ 2 ] # R S[2 ]# H_ R S # 2 4 4 H _ DS T B P # 0 D S T B P[0 ]# DST B P [2 ]# H_ D ST B P # 2 4
H_ R EQ #3 J3 G 2 H_ T R DY # 4 4 H _ DI NV# 0 H 25 U 22 H_ D INV # 2 4
H_ R EQ #4 L1 RE Q[ 3 ] # T R DY # D INV [0 ]# D IN V [2 ]#
RE Q[ 4 ] # G 6
4 H _ A# [3 5 :3 ] H IT # H_ H IT # 4 4 H _ D# [6 3 :0 ] H _ D# [6 3 :0 ] 4
H_ A # 1 7 Y2 E 4 H _D #16 N 22 A E2 4 H_ D #48
A[1 7 ]# H I TM # H _ H I T M# 4 D [1 6 ]# D [4 8 ]#
H_ A # 1 8 U5 H _D #17 K2 5 A D2 4 H_ D #49
H_ A # 1 9 R3 A[1 8 ]# A D4 H _ BPM 0 # H _D #18 P2 6 D [1 7 ]# D [4 9 ]# A A2 1 H_ D #50
H_ A # 2 0 W6 A[1 9 ]# BP M [0 ]# A D3 H _ BPM 1 # H _D #19 R 23 D [1 8 ]# D [5 0 ]# A B2 2 H_ D #51
A[2 0 ]# BP M [1 ]# D [1 9 ]# D [5 1 ]#
H_ A # 2 1 U4 A D1 H _ BPM 2 # H _D #20 L23 A B2 1 H_ D #52
ADDR GROUP 1
XDP/ITP SIGNALS
H_ A # 2 2 Y5 A[2 1 ]# BP M [2 ]# A C4 H _ BPM 3 # H _D #21 M 24 D [2 0 ]# D [5 2 ]# A C2 6 H_ D #53
DATA GRP 1
DATA GRP 3
H_ A # 2 3 U1 A[2 2 ]# BP M [3 ]# A C2 H _ P R DY # H _D #22 L22 D [2 1 ]# D [5 3 ]# A D2 0 H_ D #54
A[2 3 ]# P R DY # D [2 2 ]# D [5 4 ]#
H_ A # 2 4 R4 A C1 H _ PR EQ # H _D #23 M 23 A E2 2 H_ D #55
1 .0 5 VS A[2 4 ]# P RE Q # D [2 3 ]# D [5 5 ]#
H_ A # 2 5 T5 A C5 H _ T CK H _D #24 P2 5 A F23 H_ D #56
H_ A # 2 6 T3 A[2 5 ]# TC K A A6 H _ T DI H _D #25 P2 3 D [2 4 ]# D [5 6 ]# A C2 5 H_ D #57
H_ A # 2 7 W2 A[2 6 ]# TD I A B3 H _ T DO H _D #26 P2 2 D [2 5 ]# D [5 7 ]# A E2 1 H_ D #58
A[2 7 ]# T DO D [2 6 ]# D [5 8 ]#
R 35 5 1 .1 _ 1 % _ 04 H _ BPM 0# H_ A # 2 8 W5 A B5 H _ T MS H _D #27 T24 A D2 1 H_ D #59
A[2 8 ]# TM S D [2 7 ]# D [5 9 ]#
R 20 5 1 .1 _ 1 % _ 04 H _ BPM 1# H_ A # 2 9 Y4 A B6 H _ T R S T# H _D #28 R 24 A C2 2 H_ D #60
R 34 5 1 .1 _ 1 % _ 04 H _ BPM 2# H_ A # 3 0 U2 A[2 9 ]# TR ST# C 20 H _ DB R# H _D #29 L25 D [2 8 ]# D [6 0 ]# A D2 3 H_ D #61
R 17 5 1 .1 _ 1 % _ 04 H _ BPM 3# H_ A # 3 1 V4 A[3 0 ]# DB R # H _D #30 T25 D [2 9 ]# D [6 1 ]# A F22 H_ D #62
A[3 1 ]# D [3 0 ]# D [6 2 ]#
H_ A # 3 2 W3 H _D #31 N 25 A C2 3 H_ D #63
A[3 2 ]# D [3 1 ]# D [6 3 ]#
R 33 5 6 . 2 _ 1 % _ 04 H _ P R D Y # H_ A # 3 3 AA4 T HERM AL 4 H _ DS T B N# 1 L26 A E2 5 H_ D ST B N # 3 4
R 32 5 4 . 9 _ 1 % _ 04 H _ TD O H_ A # 3 4 AB2 A[3 3 ]# M 26 D S T B N [1 ]# D S T B N [3 ]# A F24
A[3 4 ]# 4 H _ DS T B P # 1 D S T B P[1 ]# DST B P [3 ]# H_ D ST B P # 3 4
H_ A # 3 5 AA3 D 21 H _ P R O C H O T# N 24 A C2 0
A[3 5 ]# P R OC H OT # H _ P R O C H O T# 14 4 H _ DI NV# 1 D INV [1 ]# D IN V [3 ]# H_ D INV # 3 4
V1 A 24 H _ T H E R MD A
4 H_ A D S T B # 1 A D S T B [1 ]# T H E RM D A
B 25 H _ T H E R MD C AD 2 6 R 26 CO M P 0
H _A 20 M # A6 T HER M DC C 23 G T LR E F CO MP [0 ] U 26 CO M P 1
14 H _ A 2 0 M# A 2 0 M# T 20 T EST 1 CO MP [1 ]
H _F E R R # A5 C 7 H_ T H RM T RI P # D 25 A A1 CO M P 2
14 H _F E R R #
H _I GN N E # C4
F E R R# T H E R MT R I P # H _T H R MT R I P # 1 4 T 22
Z0211 C 24
T EST 2 CO MP [2 ]
Y 1 CO M P 3
If used M672
14 H _ I GN N E # I GN N E # C1 0 5 *0 . 1 u _ X 7 R _ 0 4 A F26 T EST 3 CO MP [3 ] than del R3
T EST 4
M ISC H _ D P R S T P # 6, 28
H _S TP C L K # D5 Z 0 2 1 2 AF 1 E 5
14 H_ S T P CL K # STPC L K# T EST 5 D PR STP# H _ DP S L P # 6
H _I N T R C6 H CLK Z0213 A2 6 B 5 H _ DP S L P #
14 H _ IN T R L INT 0 T EST 6 DP S L P #
H _N M I B4 A 22 D 24 H _ D P W R #_ R R 2 31 *0 _ 0 4
IC H
14 H _N M I H _S MI # A3 L INT 1 BC L K[0 ] A 21 H _ CL K_ C P U 1 7 C P U _ B S E L0 B2 2 D PW R # D 6 H _ PW R G D H_ D P W R# 4
14 H _ SM I# SM I# BC L K[1 ] H _ CL K_ C P U # 1 7 17 C PU _ BSEL 0 B S E L [0 ] P W R G O OD H _ PW R G D 4
C P U _ B S E L1 B2 3 D 7 H _ CP US L P #
17 C PU _ BSEL 1 B S E L [1 ] SL P# H _ C P U S LP # 1 4
Z 02 0 1 M4 C P U _ B S E L2 C 21 A E6 P S I#
RS V D[ 01 ] 17 C PU _ BSEL 2 B S E L [2 ] P SI# 3 .3 VS
Z 02 0 2 N5
Z 02 0 3 T2 RS V D[ 02 ] C PU_ G T L RE F M e ro m B a l -l ou t R e v 1 a R 36 68 0 _ 0 4
RS V D[ 03 ] Layout Note:
RESERVED
Z 02 0 4 V3
RS V D[ 04 ]
Z 02 0 5 B2 R8 0 1 K_ 1 % _ 0 4
Z 02 0 6 C3
RS V D[ 05 ] C1 Close to TEST4 (Pin AF26) 1 .0 5 VS
Z 02 0 7 D2 RS V D[ 06 ]
56_04 Z 02 0 8 D2 2 RS V D[ 07 ] C1 0 4 C 107 R8 1
CPU_GRFE=0.7V
1. 05 V S RS V D[ 08 ]
Z 02 0 9 D3
6-14-5603B-11B Z 02 1 0 F6
RS V D[ 09 ]
1U _ 6 . 3 V _ 0 4 0 . 0 1 u _ 1 6 V _ X 7R _ 0 4 2 K _ 1 % _ 04
Layout Note:
R 21 7 1 K_ 0 4 CP U_ B S E L 2 RS V D[ 10 ]
R 21 8 1 K_ 0 4 CP U_ B S E L 1
0.5" max, Zo= 55 Ohms
R 21 9 1 K_ 0 4 CP U_ B S E L 0
Me ro m B a l -o u t R e v 1 a
R 21 5 7 5 _ 1 % _ 04 H _ P R O C H O T# If PROCHOT# is routed between CPU, IMVP and MCH, ( SiS Recommandation 200p) Layout note:
pull-up resistor has to be 68 ohm ? 5%. If not
R 21 0 56_04 H_ T H RM T RI P # use, pull-up resistor has to be 56 ohm ? 5%
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms(20mil)
R 20 5 56_04 H_ F E RR # COMP1, COMP3: 0.5" Max, Zo=55 Ohms(5mil)
R 20 1 56_04 H_ S T P CL K #
R 19 9 56_04 H_ IN IT # Best estimate is 18 mils wide trace for outer
R 20 3 56_04 H_ IG N NE# IF USED Desktop CPU, H_CPURST#,H_PWRGD,H_BRD,need layers and 14 mils wide trace if on internal
R 20 2 56_04 H_ S M I#
R 21 1 56_04 H_ A 2 0 M #
add pull high resistor layers.
R 20 7 56_04 H_ C P U S L P #
R 20 4 56_04 H _ N MI CO MP 0
R 20 8 56_04 H_ IN T R CO MP 1
R 20 6 56_04 H_ D P S L P# CO MP 2
CO MP 3
3. 3V V_ TH ER M
CPU to SB interface
R 20 0 * 5 1_ 0 4 H _ C P U R S T#
R2 2 2 0_06
ASC7525: 6-02-07525-LD0 R 30 R 31 R7 7 R7 8
R 21 3 * 3 30 _ 0 4 H_ P W RG D
R 29 5 1 . 1 _ 1 % _ 04 H_ B R 0 #
R2 2 5
*1 0 0 K _ 0 4
C 45 3
1 0 U_ 1 0 V_ 0 8
Thermal IC Z0225 R2 2 9 10 K _0 4
5 4 . 9 _ 1 % _0 4 2 7 .4 _ 1 % _ 0 4 54 . 9 _ 1 % _ 0 4 2 7. 4_ 1 % _ 0 4
V _ T HE R M
R 21 6 56_04 H_ IE RR #
R 18 56_04 H_ P R E Q # U1 2 R2 2 8 0_ 0 4
T H ERM _ A L E R T # 2 1
R 53 1 5 0 _ 1 % _0 4 H_ T D I 1 4
V DD T HE R M
R 54 3 9 . 2 _ 1 % _ 04 H_ T M S H _ T HE R M DA R 226 0_04 H _T H R MD 2 6 Z0226 R2 2 0 *0 _ 0 4
D+ AL ER T
R 21 4 5 4 . 9 _ 1 % _ 04 H_ D B R # C 45 4 R2 2 1 *1 0 K _ 0 4
V DD 3
1 0 0 0p _ 5 0 V _ 0 4
3 7
D- S D A TA S M D_ C P U _ T HE R M 21 1 .0 5 V S 3 ,4 ,6 ,7 ,1 6 ,3 0
R 23 0 * 5 6_ 0 4 H_ D P W R # _ R H _ T HE R M DC R 227 0_04 H _T H R MC 5 8 S M C_ C P U _ T HE R M 21 3 .3 V 1 2 , 1 4 , 1 5 , 1 6 , 2 2 , 2 5, 26 , 2 7 , 2 9 , 3 0 , 3 1
GN D S C LK
If used M672 than 3 .3 V S 6 , 1 0 , 1 1 , 1 3 , 1 4 , 1 5 , 1 6, 17 , 1 8 , 1 9 , 2 0 , 2 1 , 2 2 , 2 3 , 2 4, 2 5 , 2 6 , 2 7 , 2 8
A S C 7 5 25 R2 2 3 4. 7K _ 04
del R40 and add R42 V DD 3 V DD 3 1 1 , 1 5 , 2 1 , 2 5 , 2 6 , 2 7, 29 , 3 1
R2 2 4 4. 7K _ 04
R 23 2 1 0 _ 1 % _ 04 H_ D P W R # _ R
Layout Note: Layout Note:
C 44 9 * . 1 U _1 6 V _ 0 4 H_ P W RG D
Route H_THERMDA and Close to Thermal IC
R 19 2 7 . 4 _ 1 % _ 04 H_ T C K H_THERMDC on same layer. ADM1032 1000p
R 52 680_04 H_ T R S T # 10 mil trace on 10 mil spacing. F75383M 2200p
Processor 1/2 B - 3
Schematic Diagrams
Processor 2/2
Check cap for santa rosa platform

VCORE
PLACE NEAR CPU
JSKT1D C452 C33 C32 C71 C50 C52 C35
VCORE VCORE A4 P6
VSS[001] VSS[082]
JSKT1C A8 P21 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6. 3V_08 *10U_6.3V_08
VSS[002] VSS[083]
A7 AB20 A11 P24
VCC[001] VCC[068] VSS[003] VSS[084]
A9 AB7 A14 R2
VCC[002] VCC[069] VSS[004] VSS[085]
A10 AC7 A16 R5
A12 VCC[003] VCC[070] AC9 A19 VSS[005] VSS[086] R22
A13 VCC[004] VCC[071] AC12 A23 VSS[006] VSS[087] R25 VCORE
A15 VCC[005] VCC[072] AC13 AF2 VSS[007] VSS[088] T1
A17 VCC[006] VCC[073] AC15 B6 VSS[008] VSS[089] T4
VCC[007] VCC[074] VSS[009] VSS[090]
A18 AC17 B8 T23
VCC[008] VCC[075] VSS[010] VSS[091]
A20 AC18 B11 T26 C451 C70 C72 C36 C55 C75 C40
VCC[009] VCC[076] VSS[011] VSS[092]
B7 AD7 B13 U3
VCC[010] VCC[077] VSS[012] VSS[093]
B9 AD9 B16 U6 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6. 3V_08 *10U_6.3V_08
VCC[011] VCC[078] VSS[013] VSS[094]
B10 AD10 B19 U21
B12 VCC[012] VCC[079] AD12 B21 VSS[014] VSS[095] U24
B14 VCC[013] VCC[080] AD14 B24 VSS[015] VSS[096] V2

B15 VCC[014] VCC[081] AD15 C5 VSS[016] VSS[097] V5 VCORE
B17 VCC[015] VCC[082] AD17 C8 VSS[017] VSS[098] V22 6-0 7-10611- 7C0
VCC[016] VCC[083] VSS[018] VSS[099]
B18 AD18 C11 V25
VCC[017] VCC[084] VSS[019] VSS[100]
B20 AE9 C14 W1
VCC[018] VCC[085] VSS[020] VSS[101]
C9 AE10 C16 W4 C74 C51 C34 C54 C37 C450
VCC[019] VCC[086] VSS[021] VSS[102]
C10 AE12 C19 W23
Sheet 3 of 37
VCC[020] VCC[087] VSS[022] VSS[103]
C12 AE13 C2 W26 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6.3V_08 10U_6. 3V_08 10U_6.3V_08
C13 VCC[021] VCC[088] AE15 C22 VSS[023] VSS[104] Y3
C15 VCC[022] VCC[089] AE17 C25 VSS[024] VSS[105] Y6
C17 VCC[023] VCC[090] AE18 D1 VSS[025] VSS[106] Y21
Processor 2/2 C18
D9
D10
VCC[024]
VCC[025]
VCC[026]
VCC[091]
VCC[092]
VCC[093]
AE20
AF9
AF10
D4
D8
D11
VSS[026]
VSS[027]
VSS[028]
VSS[107]
VSS[108]
VSS[109]
Y24
AA2
AA5
VCORE
VCC[027] VCC[094] VSS[029] VSS[110]
D12 AF12 D13 AA8
VCC[028] VCC[095] VSS[030] VSS[111]
D14 AF14 D16 AA11
VCC[029] VCC[096] VSS[031] VSS[112]
D15 AF15 D19 AA14 C65 C45 C28 C77 C58 C69
VCC[030] VCC[097] VSS[032] VSS[113]
D17 VCC[031] VCC[098] AF17 D23 VSS[033] VSS[114] AA16
D18 AF18 D26 AA19 1U_6.3V_04 1U_6.3V_04 1U_6.3V_04 1U_6.3V_04 1U_6. 3V_04 1U_6.3V_04
E7 VCC[032] VCC[099] AF20 E3 VSS[034] VSS[115] AA22
E9 VCC[033] VCC[100] P ower Plane 2A E6 VSS[035] VSS[116] AA25
E10 VCC[034] G21 E8 VSS[036] VSS[117] AB1
VCC[035] VCCP[01] 1.05VS VSS[037] VSS[118]
E12 VCC[036] VCCP[02] V6 E11 AB4
VSS[038] VSS[119] VCORE
E13 VCC[037] VCCP[03] J6 E14 AB8
VSS[039] VSS[120]
E15 VCC[038] VCCP[04] K6 C73 E16 AB11
VSS[040] VSS[121]
E17 VCC[039] VCCP[05] M6 E19 AB13
VSS[041] VSS[122]
E18 VCC[040] VCCP[06] J21 22U_6.3V_08 E21 AB16
E20 K21 E24 VSS[042] VSS[123] AB19 C76 C56 C42 C41 C29 C44
F7 VCC[041] VCCP[07] M21 F5 VSS[043] VSS[124] AB23
F9 VCC[042] VCCP[08] N21 F8 VSS[044] VSS[125] AB26 1U_6.3V_04 1U_6.3V_04 1U_6.3V_04 1U_6.3V_04 1U_6. 3V_04 1U_6.3V_04
F10 VCC[043] VCCP[09] N6 F11 VSS[045] VSS[126] AC3
VCC[044] VCCP[10] VSS[046] VSS[127]
F12 VCC[045] VCCP[11] R21 L39 1.5VS Layout note: F13 AC6
VSS[047] VSS[128]
F14 VCC[046] VCCP[12] R6 HCB2012KF-500T40 130mA F16 AC8
VSS[048] VSS[129]
F15 VCC[047] VCCP[13] T21 Near pin B26 F19 VSS[049] VSS[130] AC11
F17 T6 F2 AC14 VCORE
VCC[048] VCCP[14] VSS[050] VSS[131]
F18 VCC[049] VCCP[15] V21 C456 C458 F22 VSS[051] VSS[132] AC16
F20 W21 F25 AC19
AA7 VCC[050] VCCP[16] 10U_6. 3V_08 0.01u_16V_X7R_04 G4 VSS[052] VSS[133] AC21
AA9 VCC[051] B26 VCCA20 G1 VSS[053] VSS[134] AC24 C48 C31 C84 C30 C57 C43
AA10 VCC[052] VCCA[01] C26 G23 VSS[054] VSS[135] AD2
VCC[053] VCCA[02] VSS[055] VSS[136]
AA12 VCC[054] G26 VSS[056] VSS[137] AD5 0.01u_16V_X7R_04 0. 1u_10V_X7R_04 0. 1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.01u_16V_X7R_04
AA13 VCC[055] VID[0] AD6 H_VID0 H3 AD8
H_VID0 28 VSS[057] VSS[138]
AA15 VCC[056] VID[1] AF5 H_VID1 H6 AD11
H_VID1 28 VSS[058] VSS[139]
AA17 VCC[057] VID[2] AE5 H_VID2 H21 AD13
H_VID2 28 VSS[059] VSS[140]
AA18 VCC[058] VID[3] AF4 H_VID3 H24 AD16
AA20 AE3 H_VID4 H_VID3 28 J2 VSS[060] VSS[141] AD19
AB9 VCC[059] VID[4] AF3 H_VID5 H_VID4 28 J5 VSS[061] VSS[142] AD22
VCC[060] VID[5] H_VID5 28 VSS[062] VSS[143]
AC10 AE2 H_VID6 J22 AD25
AB10 VCC[061] VID[6] H_VID6 28
J25 VSS[063] VSS[144] AE1 PLACE NEAR CPU
AB12 VCC[062] K1 VSS[064] VSS[145] AE4
VCC[063] VSS[065] VSS[146] C4 6 & C73 8 Co-l ay out
AB14 VCC[064] VCCSENSE AF7 VCCSENSE K4 AE8
VCCSENSE 28 VSS[066] VSS[147] 1. 05VS
AB15 VCC[065] K23 VSS[067] AE11
VSS[148]
AB17 VCC[066] K26 VSS[068] VSS[149] AE14
AB18 VCC[067] VSSSENSE AE7 VSSSENSE L3 AE16
VSSSENSE 28 VSS[069] VSS[150]
L6 VSS[070] VSS[151] AE19
Merom Ball-out Rev 1a L21 AE23 C64 C63 C27 C26 C25 C83 C79
R209 R212 L24 VSS[071] VSS[152] AE26
+
. VSS[072] VSS[153]
Layout note: M2 A2 22U_6. 3V_12 *150U_4V_B2 0. 1u_10V_X7R_04 0. 1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.01u_16V_X7R_04
0_04 0_04 M5 VSS[073] VSS[154] AF6
VSS[074] VSS[155]
Route VCCSENSE and M22 VSS[075] VSS[156] AF8
VSSSENSE traces at 27.4 M25 VSS[076] VSS[157] AF11
N1 AF13 1. 05VS
ohms with 15.5mils width VSS[077] VSS[158]
VCORE N4 VSS[078] VSS[159] AF16
10mils spacing. N23 VSS[079] VSS[160] AF19
N26 AF21
Place PU and PD within 1 P3 VSS[080] VSS[161] A25 C82 C80 C78 C23 C81 C24
inch of CPU. VSS[081] VSS[162] AF25
VSS[163] 0.1u_10V_X7R_04 0. 1u_10V_X7R_04 0. 1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
Merom Ball-out Rev 1a
.
1.05VS 2,4, 6,7,16,30

1.5VS 6,22, 27
VCORE 28
B - 4 Processor 2/2
Schematic Diagrams
SiSM672 HOST PCIE 1/5
1.8VS C1XAVDD
L14 HCB1005KF-121T20
U13C
H_D#
0 H_D#[63:0] 2
B16 N29
C128 C158 C161 C1XAVDD C17 C1XAVDD HD0# M30 H_D#
1
C1XAVSS C1XAVSS HD1# M28 H_D#
2
HD2#
10U_1
0V_0
8 0.1u_
10V_X7R_04 A17 L30 H_D#
3
C4XAVDD C4XAVDD HD3# H_D#
4
0.01u_16V_X7
R_04 B18 L29
NC3 NC_04 C4XAVSS C4XAVSS HD4# K28 H_D#
5
W24 HD5# K31 H_D#
6
NB_GTLREF HVREF HD6#
U24 K30 H_D#
7
HVREF HD7# H_D#
8
C1XAVSS R24 H31
HVREF HD8# H_D#
9
N24 G34
L21 HVREF HD9# H32 H_D#
10
HVREF HD10# G32 H_D#
11
1.8VS C4XAVDD HD11# H_D#
12
K32
NB_PCREQ# HD12# H_D#
13 1.2VS NB_PCIE_1.2VS
R34 F34
L15 HCB1005KF-121T20 Z0401 P32 PCREQ# HD13# F33 H_D#
14 L17
EDRDY# HD14# F32 H_D#
15 HCB1005KF-121T20
HD15# H_D#
16
E21 H28
2 H_
DPWR# NC2 (DPWR#) HD16# H_D#
17
C145 C163 C166 J30 U1
3D
HD17# H30 H_D#
18 C174 C171 P7
10U_1
0V_0
8 0.1u_
10V_X7R_04 F18 HD18# G29 H_D#
19 R7 PCIEAVDD T5
17 H_CLK_NB CPUCLK HD19# H_D#
20 PCIEAVDD REFCLK+ PCIE_CLK_NB 17
0.01u_16V_X7
R_04 G18 J29 0.01u
_16V_X7R_0
4 0. 1
u_10V_X7R_04 T
7 T4
17 H_CLK_NB# CPUCLK# HD20# H_D#
21 PCIEAVDD REFCLK- PCIE_CLK_NB# 17
NC4 NC_04 G30 U7
L32 HD21# F30 H_D#
22 V7 PCIEAVDD
2 H_LOCK# HLOCK# HD22# PCIEAVDD
P30 D33 H_D#
23
2 H_DEFER# DEFER# HD23#
C4XAVSS P31 D34 H_D#
24 D7
2 H_TRDY# HTRDY# HD24# 15,22 PCIE_WAKE# PME#
Sheet 4 of 37
F21 B32 H_D#
25 G16
2 H_CPURST# P28 CPURST# HD25# B33 H_D#
26 6,13 PCI_INTA# INTX
#
2 H_PWRGD CPUPWRGD HD26#
N30 C34 H_D#
27 E4 G6 C147 0.1u_1
0V_X
7R_04
1.05VS 2 H_BPRI# BPRI # HD27# 22 PCIE_RX
P1_WLAN PERP0 PETP0 PCIE_T
XP1
_WLAN 22
P33 D31 H_D#
28 E5 H6 C153 0.1u_1
0V_X
7R_04
SiSM672 HOST
2 H_BR0# BREQ0# HD28# H_D#
29 22 PCIE_RXN1_
WLAN Z0408 F1 PERN0 PETN0 Z0440 PCIE_T
XN1_WLAN 22
A32 G4
K34 HD29# A31 H_D#
30 Z0409 G1 PERP1 PETP1 G5 Z0441
2 H_RS#0 RS0# HD30# PERN1 PETN1
M31 C31 H_D#
31 Z0410 H3 J6 Z0442
2 H_RS#1 RS1# HD31# PERP2 PETP2
K33 B30 H_D#
32 Z0411 H2 K6 Z0443
PCIE 1/5
PCIE
2 H_RS#2 RS2# HD32# H_D#
33 Z0412 H1 PERN2 PETN2 Z0444
R99 C2
08 C30 J4
M34 HD33# A30 H_D#
34 Z0413 J1 PERP3 PETP3 J5 Z0445
2 H_ADS# ADS# HD34# PERN3 PETN3
75_1%_04 0.01u_
16V_
X7R_04 N34 D28 H_D#
35 Z0414 K1 L6 Z0446
2 H_HI T
M# HITM# HD35# PERP4 PETP4
NB_GTLREF= 0.7V N32 G28 H_D#
36 Z0415 K2 M6 Z0447
2 H_HI T # HIT# HD36# H_D#
37 Z0416 L PERN4 PETN4 Z0448
M33 C29 1 M4
NB_GT
LREF 2 H_DRDY# DRDY# HD37# H_D#
38 Z0417 M PERP5 PETP5 Z0449
2 H_DBSY# L34 C28 1 M5
M32 DBSY# HD38# E28 H_D#
39 Z0418 N1 PERN5 PETN5 P6 Z0450
2 H_BNR# BNR# HD39# PERP6 PETP6
R101 C2
00 C203 E27 H_D#
40 Z0419 N2 R6 Z0451
2 H_REQ #[4:0] HD40# H_D#
41 Z0420 P1 PERN6 PETN6 Z0452
H_REQ#0 T34 C27 P4
HREQ0# HD41# H_D#
42 Z0421 R1 PERP7 PETP7 Z0453
150_1%_04 0.01u_
16V_
X7R_04 0.1u
_10V_X7R_0
4 H_REQ#1 R30 G26 P5
H_REQ#2 R29 HREQ
HREQ
1#
2#
Host HD42#
HD43#
E26 H_D#
43 Z0422 T1 PERN7
PERP8
PETN7
PETP8
V6 Z0454
H_REQ#3 R32 D26 H_D#
44 Z0423 T2 W6 Z0455
HREQ3# HD44# H_D#
45 Z0424 U1 PERN8 PETN8
H_REQ#4 P34 B26 W4
HREQ4# HD45# H_D#
46 Z0425 V1 PERP9 PETP9(HDVBP2) HDVBP2 18
Place under M671MX A26 W5 HDVBN2 18
HD46# C26 H_D#
47 Z0426 W1 PERN9 PETN9(HDVBN2) Y6
solder side HD47# PERP10 PETP10(HDVBP1) HDVBP1 18
U34 G22 H_D#
48 Z0427 W2 AA6
2 H_ADSTB# 0 HASTB0
# HD48# PERN10 PETN10(HDVBN1) HDVBN1 18
AA34 C24 H_D#
49 Z0428 Y1 AA4
2 H_ADSTB# 1 HASTB1
# HD49# H_D#
50 Z0429AA1 PERP11 PETP11(HDVBP0) HDVBP0 18
A25 AA5
2 H_A#[35:3] H_A#3 T32 HD50# B24 H_D#
51 Z0430AB1 PERN11 PETN11(HDVBN0) AB6 Z0456 HDVBN0 18
H_A#4 T28 HA3# HD51# C25 H_D#
52 Z0431AB2 PERP12 PETP12 AC6 Z0457
HA4# HD52# PERN12 PETN12
H_A#5 T31 A24 H_D#
53 Z0432AC1 AC4
H_A#6 HA5# HD53# H_D#
54 Z0433AD1 PERP13 PETP13(HDVAP2) HDVAP2 18
T33 E23 AC5
H_A#7 T30 HA6# HD54# E25 H_D#
55 Z0434AE1 PERN13 PETN13(HDVAN2) AD6 HDVAN2 18
HA7# HD55# PERP14 PETP14(HDVAP1) HDVAP1 18
R242 *5
6_04 NB_PCREQ# H_A#8 U32 G24 H_D#
56 Z0435AE2 AE6
1.05VS HA8# HD56# PERN14 PETN14(HDVAN1) HDVAN1 18
H_A#9 U30 D22 H_D#
57 Z0436AF1 AE4
H_A#10 HA9# HD57# H_D#
58 Z0437AG PERP15 PETP15(HDVAP0) HDVAP0 18
V34 C22 1 AE5
H_A#11 U29 HA10# HD58# E22 H_D#
59 PERN15 PETN15(HDVAN0) HDVAN0 18
H_A#12 V33 HA11# HD59# C23 H_D#
60 SiSM672
H_A#13 V32 HA12# HD60# A23 H_D#
61
H_A#14 HA13# HD61# H_D#
62
V28 A22
H_A#15 HA14# HD62# H_D#
63
V31 B22
H_A#16 W34 HA15# HD63#
H_A#17 Y33 HA16#
H_A#18 HA17#
W32 J32
H_A#19 HA18# DBI0# H_DI NV#0 2
V30 E32 H_DI NV#1 2
H_A#20 W30 HA19# DBI1# F27
HA20# DBI2# H_DI NV#2 2
H_A#21 Y34 F23
H_A#22 HA21# DBI3# H_DI NV#3 2
Y28
H_A#23 HA22#
W29 H33 H_DSTBN#0 2
H_A#24 Y32 HA23# HDSTBN0# E31
HA24# HDSTBN1# H_DSTBN#1 2
H_A#25 Y30 B28
HA25# HDSTBN2# H_DSTBN#2 2
H_A#26 Y31 D24
H_A#27 HA26# HDSTBN3# H_DSTBN#3 2
AA32
H_A#28 AA30 HA27# H34
HA28# HDSTBP0# H_DSTBP#0 2
H_A#29 AA29 D32
HA29# HDSTBP1# H_DSTBP#1 2
H_A#30 AB33 A28
H_A#31 HA30# HDSTBP2# H_DSTBP#2 2
AB34 E24
H_A#32 AB32 HA31# HDSTBP3# H_DSTBP#3 2
H_A#33 AC34 HA32# A21 NB_COMP R92 110_1%_
06
HA33# HPCOMP
H_A#34 AB30 C21 NB_COMP#
H_A#35 HA34# HNCOMP
AB31
HA35# R94 10_1%_0
4
1.05VS
SiSM672
1.05VS 2,3,6,7,16,30
1.2VS 7,27
1.8VS 5,6,7,13,14,15,1
6,17,18,27
SiSM672 HOST PCIE 1/5 B - 5

Schematic Diagrams
SiSM672 DRAM 2/5
9,10 M_A_DQ[63: 0] U13B

M_A_DQ0 AD31 MD0A
M_A_DQ1 AD30 MD1A
M_A_DQ2 AG34 MD2A D1XAVDD A15 D1XAVDD
M_A_DQ3 AE29 MD3A D1XAVSS B15 D1XAVSS
M_A_DQ4 AE32 MD4A
1.8VS D1XAVDD M_A_DQ5 AF34 AP11
M_A_DQ6 MD5A D4XAVDD D4XAVDD
AF31 MD6A D4XAVSS AP10 D4XAVSS
L12 HCB1005KF-121T20 M_A_DQ7 AE30
AD28 MD7A
9,10 M_DM0 DQM0A
9,10 M_DQS0 AF32 DQS0A
C124 C150 C154 9,10 M_DQS0# AF33 DQS0A#
10U_10V_08 0.1u_10V_X7R_04 9,10 M_A_DQ[63: 0] M_A_DQ8 AF28 AH24 M_A_A0 M_A_A[17:0] 9,10
0.01u_16V_X7R_04 M_A_DQ9 AJ34 MD8A MA0A AP25 M_A_A1
NC2 NC_04 M_A_DQ10 AH31 MD9A MA1A AM25 M_A_A2
M_A_DQ11 AG30 MD10A MA2A AL25 M_A_A3
M_A_DQ12 AF30 MD11A MA3A AP26 M_A_A4
D1XAVSS M_A_DQ13 AG32 MD12A MA4A AM26 M_A_A5
M_A_DQ14 AJ32 MD13A MA5A AN26 M_A_A6
M_A_DQ15 AJ31 MD14A MA6A AK25 M_A_A7
AH34 MD15A MA7A AP27 M_A_A8
9,10 M_DM1 AH32 DQM1A MA8A AP28 M_A_A9
1.8VS D4XAVDD 9,10 M_DQS1 AH33 DQS1A MA9A AK24 M_A_A10
9,10 M_DQS1# DQS1A# MA10A
AN24 M_A_A11
L21 HCB1005KF-121T20 9,10 M_A_DQ[63: 0] M_A_DQ16 AK34 MA11A AP24 M_A_A12
M_A_DQ17 AH30 MD16A MA12A AM28 M_A_A13
M_A_DQ18 AL32 MD17A MA13A AM27 M_A_A14
C256 C253 C247 M_A_DQ19 AM33 MD18A
MD19A
D RAM MA14A
MA15A AN28 M_A_A15
M_A_DQ20 AK32 MD20A MA16A AP21 M_A_A16
10U_10V_08 0.1u_10V_X7R_04 M_A_DQ21 AG29 MD21A MA17A AP29 M_A_A17
0.01u_16V_X7R_04 M_A_DQ22 AM34
Sheet 5 of 37 NC5 NC_04 M_A_DQ23 AL31 MD22A AM23

MD23A RASA# M_RAS# 9, 10
9,10 M_DM2 AJ30 DQM2A CASA# AP22 M_CAS# 9, 10
9,10 M_DQS2 AK33 DQS2A WEA# AJ23 M_WE# 9, 10
SiSM672 DRAM 2/5

D4XAVSS 9,10 M_DQS2# AL34 DQS2A#
9,10 M_A_DQ[63: 0] M_A_DQ24 AM32 AK12 M_FWDSDCLKOA_D_R R103 0_04 M_FWDSDCLKOA_D
M_A_DQ25 AP32 MD24A FWDSDCLKOA AH12 M_FWDSDCLKOA_D#_R R106 0_04 M_FWDSDCLKOA_D# M_FWDSDCLKOA_D 17
M_A_DQ26 MD25A FWDSDCLKOA# M_FWDSDCLKOA_D# 17
AP31 MD26A
1.8V M_A_DQ27 AM29
M_A_DQ28 AK30 MD27A
M_A_DQ29 MD28A
AK29 MD29A CS0A# AP23 M_CS0# 9, 10
M_A_DQ30 AJ27 AH22
M_A_DQ31 AK28 MD30A CS1A# AM22 M_CS1# 9, 10
MD31A CS2A# M_CS2# 10 Plac e clos e to
R108 C242 9,10 M_DM3 AN32 AM21 M_CS3# 10 M671 MX
AM30 DQM3A CS3A#
1K_1%_04 0.1u_10V_X7R_04 9,10 M_DQS3 AM31 DQS3A
9,10 M_DQS3# DQS3A#
M_DDR VREF=0 .9V 9,10 M_A_DQ[63: 0] AK22 M_ODT0 9, 10
M_A_DQ32 AK20 ODT0A AP20
M_DDRVREF M_A_DQ33 AM20 MD32A ODT1A AN22 M_ODT1 9, 10
M_A_DQ34 AM19 MD33A ODT2A AL21 M_ODT2 10
R109 C236 C232 M_A_DQ35 AJ19 MD34A ODT3A M_ODT3 10
M_A_DQ36 AN20 MD35A
1K_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 M_A_DQ37 AJ21 MD36A AN30
M_A_DQ38 AP19 MD37A CKEA0 AP30 M_CKE0 9, 10
M_A_DQ39 AH20 MD38A CKEA1 AH26 M_CKE1 9, 10 1.8V
AK21 MD39A CKEA2 AK27 M_CKE2 10
9,10 M_DM4 AK19 DQM4A CKEA3 M_CKE3 10 M_COMP_N R112 36_1%_06
Plac e und er M67 1MX 9,10 M_DQS4 DQS4A
AL19
sold er si de 9,10 M_DQS4# DQS4A#
9,10 M_A_DQ[63: 0] M_A_DQ40 AK18 C265 M_COMP_P R118 36_1%_06
M_A_DQ41 MD40A
AJ17 MD41A
M_A_DQ42 AK17 *0. 1u_10V_X7R_04
M_A_DQ43 AP16 MD42A AD18
M_A_DQ44 MD43A DDRVREF0 M_DDRVREF
AH18 MD44A DDRVREF1 AD23
M_A_DQ45 AP18
M_A_DQ46 AN18 MD45A
M_A_DQ47 MD46A 1.8V
AP17 MD47A C258
9,10 M_DM5 AM18 DQM5A
AL17 AJ25 M_COMP_P 1U_6.3V_04 M_OCD VREF_ P=0.87 4V R123 40.2_1%_04
9,10 M_DQS5 DQS5A DDRCOMP M_COMP_N
9,10 M_DQS5# AM17 DQS5A# DDRCOMN AK26
9,10 M_A_DQ[63: 0] M_OCDVREF_P
M_A_DQ48 AN16
M_A_DQ49 AK16 MD48A R124 36_1%_06
M_A_DQ50 AN14 MD49A AH28 M_OCDVREF_P
M_A_DQ51 AJ15 MD50A OCDVREFP AJ29 M_OCDVREF_N C281
M_A_DQ52 AP15 MD51A OCDVREFN
M_A_DQ53 AM16 MD52A *0.1u_10V_X7R_04
M_A_DQ54 AK15 MD53A 1.8V
M_A_DQ55 AP14 MD54A
AH16 MD55A M_OCD VREF_ N=0.96 9V R119 36_1%_06
9,10 M_DM6 AL15 DQM6A
9,10 M_DQS6 AM15 DQS6A B6 M_OCDVREF_N
9,10 M_DQS6# DQS6A# S3AUXSW# NB_S3AUXSW# 26
9,10 M_A_DQ[63: 0] M_A_DQ56 AL13 R121 40.2_1%_04
M_A_DQ57 AM13 MD56A
M_A_DQ58 AM12 MD57A C278
M_A_DQ59 AJ13 MD58A
M_A_DQ60 AM14 MD59A *0.1u_10V_X7R_04
M_A_DQ61 AK14 MD60A
M_A_DQ62 AN12 MD61A
M_A_DQ63 AH14 MD62A
AK13 MD63A
9,10 M_DM7 DQM7A
9,10 M_DQS7 AP12 DQS7A
9,10 M_DQS7# AP13 DQS7A#
1. 8V 7, 9,10,14,15,16,20, 27,30,31
1. 8VS 4, 6,7,13,14,15, 16, 17,18,27
SiSM672
B - 6 SiSM672 DRAM 2/5

Schematic Diagrams
SiSM672 MuTITOL VGA 3/5
3 .3 V S C 613
1 .8 V S 0 .1 u _ 1 6 V _ 0 4
5
U2 7 R 361
U 13 A R 346 1 33_04
R 102 C2 1 5 A H 10 F15 N B _ E N TE S T 33_04 4 Z0618 D P R S T P #_ I N V
17 Z _ C L K0 ZC LK EN T EST Z0617 2
150_1% _04 0 . 1 u_ 1 0 V _ X 7 R _0 4 AP8 D1 6 N B _ T E S T M OD E 0
13 Z D RE Q A N8 Z D RE Q T ESTM O DE 0 E1 6 N B _ T E S T M OD E 1 7 4L V C 1 G 1 4G W
13 Z U RE Q C5 8 5
Z U RE Q T ESTM O DE 1 F16 N B _ T E S T M OD E 2
Z_ VR EF T ESTM O DE 2
3
A M7 D1 7 Z0602 *1 0 0 P _ 5 0 V _ 0 4
13 ZSTB_ D 0 Z ST B0 TR AP0 Z0603
A L7 E1 7
R 100 C2 1 8 13 Z S T B _ D #0 AP4 Z ST B0 # TR AP1 F17 Z0604 R 376
13 ZSTB_ D 1 Z ST B1 TR AP2
AP5 * 3 3_ 0 4
13 Z S T B _ D #1 Z ST B1 #
4 9 .9 _ 1 % _ 0 4 0 . 1 u_ 1 0 V _ X 7 R _0 4
13 Z A D[1 6 :0 ] Z AD 0 Z0605 1 4 SB_ D PR SL PVR 14 S B _ DP R S T P #
A K 10 AC 3 2
Z AD 1 A M6 Z AD 0 T R AP3 AD 3 4 Z0606
Z AD 2 A K 11 Z AD 1 T R AP4 AB2 8 Z0607 3 .3 V S C 614
Z AD 2 T R AP5
Z AD 3 A J 11 AD 3 2 Z0608 0 .1 u _ 1 6 V _ 0 4
Z AD 3 T R AP6 Z0609
Z AD 4 AP7 AD 3 3
Z AD 5 A J9 Z AD 4 T R AP7 AE3 4 Z0610
Z AD 5 T R AP8
5
Z AD 6 AP6 AC 3 0 Z0611 U2 6 R 363
Z AD 6 T R AP9
Z AD 7 A N6 AC 2 9 Z0612 R 347 1 33_04
Z AD 7 TR A P 10 Z0620
Z AD 8 AK9 33_04 4
Z AD 8 P M_ D P R S L P V R 28
1 .8 V S Z AD 9 A M4 Z0619 2
Z AD 10 AK6 Z AD 9
Z AD 10
R 105 56_04 Z _ C O MP _ N Z AD 11 AK8 C5 8 6 7 4L V C 1 G 1 7G W
Z AD 11 AU X_ PW R O K
Z AD 12 A N4 A5
3
R 107 56_04 Z _ C O MP _ P Z AD 13 AK7 Z AD 12 A U XO K C6 D EL AY _ PW R G D AU X_ PW R O K 1 2 ,1 4
D E L A Y _ P W R G D 2 7 ,2 8 *1 0 0 P _ 5 0 V _ 0 4
Z AD 14 A L5 Z AD 13 PW RO K A7
Z AD 14 P C I R S T# N B _ R S T # 1 8 ,2 7
Z AD 15 A M5
N B_ EN T EST Z AD 16 Z AD 15
R 91 4 . 7 K _0 4 A M8
A SL
Sheet 6 of 37
Z AD 16 R 36 2 * 0_04
C 4 5 7 0 .1 u _ 1 0 V _ X 7 R_ 0 4 AU X_ PW R O K A L9
Z_ VR EF Z VR EF
Z _ C O MP _ P AP9
D EL AY _ PW R G D Z _ C O MP _ N Z C MP _P
SiSM672 MuTITOL
C 4 5 5 0 .1 u _ 1 0 V _ X 7 R_ 0 4 A M9
Z C MP _N G1 4
A GP S T OP # A G P S TO P # 1 4 3. 3V S 3. 3V S
A6 C6 1 2 C6 3 0
A GP B U S Y # AG PB USY # 1 4
0 . 1 u _ 16 V _0 4 0 . 1 u _ 16 V _0 4
VGA 3/5
Z 4 XAVD D A M 10 D8 V B V S Y NC 1 8
A N 10 Z 4 XAVD D V BVSY N C F7
3 .3 V S Z 4 XAVS S VB HSY N C V B HS Y N C 1 8
5
E7 U 25 R3 6 0
V B H CL K V B HC L K 18
5
C 633 *. 1 U _ 1 6V _ 04 R3 4 5 1 3 3_ 0 4 U 32
D 13 C8 4 99 _ 1 % _ 0 4 4 Z 0 62 3 Z 0 62 5 1
25 D A C _ RE D RO U T V B CL K V B CL K 18
C 629 *. 1 U _ 1 6V _ 04 C 12 E9 Z0621 2 4 H _D P S LP # _L S
25 D AC_ G R EE N GO U T V BCA D V B CA D 18
C 13 2
25 D A C _ B LU E B O UT
C 632 *. 1 U _ 1 6V _ 04 D9 V A CL K 18 C 584 7 4 L V C 1 G1 7 G W
F 12 V A CL K 7 4 L V C 1 G0 8 G W
25 D AC _ HSY N C
3
G 12 HS Y N C
For SiS VB 307 1 0 0 p _ 50 V _0 4 6-01-74108-Q61
3
25 D AC_ V S YN C VSY N C
D 11
use only
2 5 D A C _ D D C A C LK V G P IO 0
E 12 AH 2 Z0613
2 5 D AC _ DD C A D A T V G P IO 1 N C0 AG 3 Z0614
V CO M P N C1 14 C PU _ ST P# 3. 3V S 3. 3V S
D 15 C6 1 1 C6 3 1
V VBW N V C OM P
C 15 0 . 1 u _ 16 V _0 4 0 . 1 u _ 16 V _0 4
R 23 6 1 3 0 _ 1 % _0 4 VR SET C 14 VVB W N
VR SET
Z0601
5
R 93 0_04 F 13 U 33
4 ,1 3 P C I_ IN T A # I N TA #
5
U 24 R3 5 9 1
F 11 R3 4 4 1 3 3_ 0 4 4
1 7 C L K _ 1 4 M _ 67 1 M X VO SC I C PU ST P# 1 7
3 3_ 0 4 4 Z 0 62 4 Z 0 62 6 2
A 12 Z0622 2
1 .8 V S EC L KAVD D DA CA V DD 1 DA CA VDD 1
D ACA VS S1 B 12 7 4 A H C 1 G 3 2 GW
DA CA VS S1 7 4 L V C 1 G1 7 G W
C 583
3
L40 H C B 1 0 0 5 K F -1 2 1 T 2 0 A 13
3
DA CA V DD 2 DA CA VDD 2
B 13 * 1 00 P _5 0 V _ 0 4
D ACA VS S2 DA CA VS S2
C 459 C4 6 0 C 46 2 B 10
DC L K A V DD DC L K A V DD
A 11
DC L KA V SS
1 0 U _ 1 0V _ 08 0 . 1 u_ 1 0 V _ X 7 R _0 4
0 . 0 1 u _1 6 V _ X 7 R _ 04
A9
E CL K A V D D EC L KAVD D
B8
EC L KAVS S
SiSM 6 7 2
Level Shitt
1.05V <=> 3.3V
Z 0 62 9 R 3 8 5 2 0 0 K_ 0 4
1 .8 V S D C L KAVD D 1 .0 5 VS 3 .3 V S
R 391 1 5 0 _ 1 % _0 4 U 31 R3 8 4 1 K _1 % _ 0 4
R 390 1 5 0 _ 1 % _0 4 1 8 R3 8 9 1 K _1 % _ 0 4
G ND E N
L41 H C B 1 0 0 5 K F -1 2 1 T 2 0 2 7
3 VR EF1 VR EF 2 6 D P RS T P # _ INV
2 ,2 8 H_ D P R S T P # SC L 1 S C L2
4 5 H _D P S LP # _L S
2 H _D P S LP # SD A1 S DA 2
C 119 C4 6 5 C 46 3
P C A9 3 0 6 DC U R C 620
1 0 U _ 1 0V _ 08 0 . 1 u_ 1 0 V _ X 7 R _0 4
0 . 0 1 u _1 6 V _ X 7 R _ 04 0 . 0 1 u _ 1 6V _ X7 R _ 0 4
C6 3 4 0 .1 u _ 1 0 V _ X 7 R_ 0 4 V CO M P
C6 3 5 0 .1 u _ 1 0 V _ X 7 R_ 0 4 V V B W N
1. 8V S
R 400 3 .3 _ 0 6
1 .8 V S C4 6 4 * 0 . 1 u _ 10 V _X 7 R _ 0 4V C O M P
1 .0 5 V S 2 ,3 ,4 ,7 ,1 6 ,3 0
1 .8 V S Z 4X A V D D 1. 5V S D A C A VD D1 1 .5 V S 3 ,2 2 ,2 7
L43 L44 C4 6 6 * 0 . 1 u _ 10 V _X 7 R _ 0 4V V B W N
1 .8 V S 4 , 5 , 7 , 1 3 , 1 4 , 1 5, 16 , 1 7 , 1 8 , 2 7
* H C B 1 0 0 5 K F -1 2 1 T 2 0 H C B 1 00 5 K F -1 2 1T 2 0
L19 H C B 1 0 0 5 K F -1 2 1 T 2 0 3 .3 V S 2 , 1 0 , 1 1 , 1 3, 14 , 1 5 , 1 6 , 1 7 , 1 8 , 1 9 , 2 0 , 2 1, 22 , 2 3 , 2 4 , 2 5 , 2 6 , 2 7 , 2 8
D A C AV D D2
C 211 C2 2 9 C 23 9 C 461 C 130 C1 4 6 C 469 C4 6 8 C 46 7
1 0 U _ 1 0V _ 08 0 . 1 u_ 1 0 V _ X 7 R _0 4 * 1 0U _ 1 0 V _ 0 8 0 .1 U _ 1 6 V_ 0 4 1 U_ 6 .3 V _ 0 4 1 0 U _ 1 0V _ 08 0 . 1 u_ 1 0 V _ X 7 R _0 4
0 . 0 1 u _1 6 V _ X 7 R _ 04 0 . 0 1 u _1 6 V _ X 7 R _ 04
N C1 NC _ 0 4 NC 1 5 N C _ 04
D AC AVS S1 DA CA V S S 2
SiSM672 MuTITOL VGA 3/5 B - 7

Schematic Diagrams
SiSM672 PWR 4/5

U13E
1.8V
1.2VS
W23
Y23 VCC M M1 3
C2 40 C246 C276 C2 49 AA23 VCC M IVDD M1 4
AB23 VCC M IVDD M1 5 C2 05 C176 C170
1 0U_10V_08 10U_ 10V_08 1U_6. 3V_ 04 1 U_6.3 V_0 4 AC23 VCC M IVDD M1 6
AC18 VCC M IVDD M1 7 10 U_10V_08 10U_ 10V_08 10U_10 V_0 8
AC20 VCC M IVDD M1 8
VCC M IVDD
AC16 M1 9
1.8V AD16 VCC M IVDD N1 6
AD17 VCC M IVDD N1 7
AD19 VCC M IVDD N1 8 1.2VS
AD20 VCC M IVDD N2 0
C2 80 C273 C248 C2 89 AD21 VCC M IVDD R2 2
VCC M IVDD
AD22 N2 2
1 U_6.3V_0 4 1U_6 .3V_04 0.1u _10V_X7R_ 04 AJ22 VCC M IVDD N1 3 C1 97 C223 C191
0 .1u_1 0V_ X7R_0 4 AJ24 VCC M IVDD P13
AL23 VCC M IVDD Y1 3 1U _6.3V_04 1U_6 .3V_04 1U_6. 3V_ 04
AL26 VCC M IVDD Y2 2
AN21 VCC M IVDD T1 3
AN23 VCC M IVDD U1 3

AN25 VCC M IVDD U2 2
AN27 VCC M IVDD V13 1.2VS
1. 8VS VCC M IVDD
AN29 VCC M IVDD W13
W22
AP3
VCC 1.8
PWR IVDD
IVDD
AA13
AB12 AA22 C2 28 C195 C234
Sheet 7 of 37 C2 01 C202 C198 C2 10 AB13 VCC 1.8 IVDD AB14

AC12 VCC 1.8 IVDD AB15 1U _6.3V_04 0.1 u_10V_X7 R_04
1 0U_10V_08 1U_6 .3V_04 1U_6. 3V_ 04 1 U_6.3 V_0 4 AC13 VCC 1.8 IVDD AB16 0.1u _10V_X7R_ 04
VCC 1.8 IVDD
SiSM672 PWR 4/5

AC14 AB18
VCC 1.8 IVDD
AC15 VCC 1.8 IVDD AB20
AH6 AB22
1.8 VS AH7 VCC 1.8 IVDD AF6
AJ4 VCC 1.8 IVDD AF7 1 .2VS
AJ5 VCC 1.8 IVDD AK3
VCC 1.8 IVDD C138 & C739 Co-layout
AJ6 AG4
VCC 1.8 IVDD
C190 C204 C1 92 AJ7 VCC 1.8 IVDD AG5
AN2 AG6 C1 52 C 151 C18 6 C180
0. 1u_10V_X7 R_04 0 .1u_1 0V_ X7R_0 4 AK4 VCC 1.8 IVDD AG7
+
0.1u _10V_X7R_ 04 AK5 VCC 1.8 IVDD R1 3 *15 0U_4V_B2 2 2U_6. 3V_ 12 22 U_6.3V_12 22U_6 .3V_12
AL1 VCC 1.8 IVDD AH3
AL4 VCC 1.8 IVDD AJ1
AM1 VCC 1.8 IVDD AJ2
AM2 VCC 1.8 IVDD AJ3
AM3 VCC 1.8 IVDD AK1
AN3 VCC 1.8 IVDD AK2
AN5 VCC 1.8 IVDD AC22
AN7 VCC 1.8 IVDD AC21
VCC 1.8 IVDD
AN9 AC19
VCC 1.8 IVDD AC17 1.05 VS
E8 IVDD
1.8 VS F9 VDD VB1.8 A19
C1 60 C148 C220 F8 VDD VB1.8 VTT A20
VDD VB1.8 VTT B19 C1 87 C175 C188
1 U_6.3V_0 4 0. 1u_10V_X7 R_04 E10 VTT B20
0.1 u_10V_X7 R_04 F10 VDD 1.8 VTT C1 9 1U _6.3V_04 1U_6 .3V_04 10U_10 V_0 8
VDD 1.8 VTT C2 0
VTT
VTT D1 9
1.8 VS N19 D2 0
N21 PVDDH VTT E19 1.0 5VS
P20 PVDDH VTT E20
C2 25 C209 C217 PVDDH VTT
P22 F19
1 U_6.3V_0 4 1U_6 .3V_04 R21 PVDDH VTT F20
0.1 u_10V_X7 R_04 T22 PVDDH VTT G1 9 C182
PVDDH VTT C1 94
U21 G2 0
V22 PVDDH VTT L1 8 0. 1u_1 0V_ X7R_04
PVDDH VTT L1 9 0.1 u_10V_X7 R_04
M11 VTT L2 0
1.2 VS N11 VDD PEX VTT M2 0
C1 72 C185 C181 P11 VDD PEX VTT M2 1
R11 VDD PEX VTT M2 2
VDD PEX VTT
1 0U_10V_08 0. 1u_10V_X7 R_04 T11 VDD PEX VTT M2 3
1U_6. 3V_04 U11 N2 3
V11 VDD PEX VTT P23
W11 VDD PEX VTT R2 3
1.2 VS Y11 VDD PEX VTT T2 3
AA11 VDD PEX VTT U2 3 1.8VS
C1 77 C189 C173 VDD PEX VTT
AB11 V23
1 U_6.3V_0 4 0. 1u_10V_X7 R_04 VDD PEX VTT M1 2
1U_6. 3V_04 VTTP N1 2
B5 VTTP P12 C1 64 C167 C169
C5 AUX_IVDD VTTP R1 2
D6 AUX_IVDD VTTP T1 2 1U _6.3V_04 0.1 u_10V_X7 R_04
1. 2V AUX_IVDD VTTP U1 2 0.1u _10V_X7R_ 04
C129 C125 VTTP V12
C1 26 VTTP
1.8V G8 W12
AUX1.8 VTTP
1U_6 .3V_04 1U_6. 3V_ 04 0 .1u_1 0V_ X7R_04 VTTP Y1 2
C 165 C16 2 AA12
VTTP
1.0 5VS 2,3 ,4,6 ,16, 30
0 .1u_ 10V_X7R_0 4 1.2 V 27, 30
0. 01u_1 6V_ X7R_04 SiSM672 1.2 VS 4,2 7
1.8 V 5,9 ,10, 14,1 5,16, 20,2 7,30 ,31
1.8 VS 4,5 ,6,1 3,14 ,15, 16,17 ,18, 27
B - 8 SiSM672 PWR 4/5

Schematic Diagrams
SiSM672 GND 5/5
H29
C237B128D107
H7 H6
2 9 2 9
3 8 3 8
4 1 7 4 1 7
C355CH512B296D111N C355CH512B296D111N
A
d
d
T
h
r
o
u
g
h
H
o
l
e
f
i
x
T
h
e
r
m
a
l
I
s
s
u
e
.
AC31
AC33
AA16
AA17
AA18
AA19
AA20
AA21
AD29
AE31
AE33
AF29
AG31
AG33
AH29
AL10
AL12
AL14
AL16
AL18
AL20
AL28
AL30
AN11
AN13
AN15
AN17
AA31
AA33
AB29
AC3
AD2
AD3
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ26
AJ28
AJ33
AK31
AL33
AC2
AD4
AD5
AD7
AE3
AF2
AF3
AF4
AF5
AG2
AH1
AL6
AL8
AB3
AB4
AB5
AB7
AJ8
U13F
H26 H5 H25 H23 H24
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A3 C237D91 C237D83A C367B158D158 C367B158D158 C367B158D158
B2 VSS T29
B3 VSS VSS U2
VSS VSS
B4 VSS VSS U3
VSS U4
Sheet 8 of 37
B21 U5
B23 VSS VSS U6
VSS VSS
B25 VSS VSS U14
B27 U15
SiSM672 GND 5/5

B29 VSS VSS U16
B31 VSS VSS U17
VSS VSS
C1 VSS VSS U18
C2 U19 H9 H15 H14 H11 H27 H28
C3 VSS VSS U20 C296D111 C237D107A C237D107A C237D107A C237B128D107 C237B128D107
C4 VSS VSS U31
VSS VSS
VSS U33
V2
C9 VSS V3
C10 VSS VSS V4 1/10
C11 VSS VSS V5
C16 VSS VSS V14
C18 VSS VSS V15
C32 VSS VSS V16
C33 VSS VSS V17
D1 VSS VSS V18
D2 VSS VSS V19 M1 M2 M5 M6 M9 M8 M13 M12
D3 VSS VSS V20 M-MARK1 M-MARK1 M-MARK1 M- MARK1 M-MARK1 M-MARK1 M-MARK1 M-MARK1
VSS VSS
D4 VSS VSS V29
D5 VSS VSS AN33
D10 AN31
D12 VSS VSS AN19
D21
VSS
VSS
GN D VSS
VSS W3
D23 VSS VSS W14
D25 W15
D27 VSS VSS W16
VSS VSS
D29 VSS VSS W17
E1 W18 M4 M7 M11 M3 M14 M10
E2 VSS VSS W19 M-MARK1 M-MARK1 M-MARK1 M- MARK1 M-MARK1 M-MARK1
E3 VSS VSS W20
VSS VSS
E6 VSS VSS W21
E11 W31
E13 VSS VSS W33
E14 VSS VSS Y2
E18 VSS VSS Y3
E29 VSS VSS Y4
E30 VSS VSS Y5
E33 VSS VSS Y7
F2 VSS VSS Y14
VSS VSS H16 H21 H20 H8
F3 Y15 2 9 2 9 2 9 2 9
F4 VSS VSS Y16 3 8 3 8 3 8 3 8
F5 VSS VSS Y17 4 1 7 4 1 7 4 1 7 4 1 7
F6 VSS VSS Y18
F14 VSS VSS Y19
VSS VSS
F22 Y20 MTH296D111A MTH296D111A MTH296D111A MTH296D111A
F24 VSS VSS Y21
VSS VSS
F26 VSS VSS Y29
F28 VSS VSS AA2
G2 AA3 H10 H13 H22 H12
G3 VSS VSS AA14 2 9 2 9 2 9 2 9
VSS VSS
G7 VSS VSS AA15 3 8 3 8 3 8 3 8
G10 VSS VSS AB17 4 1 7 4 1 7 4 1 7 4 1 7
P21 AB19
T21 VSS VSS AB21
VSS VSS
V21 VSS VSS P19 C296D185N C296D111N C296D111N C296D111N
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H18 H19 H1 H2 H17

C158D158 C158D158 C158D158 C158D158 C67D67
SiSM672
G31
G33
H29
M29
N14
N15
N31
N33
R16
R17
R18
R19
R20
R31
R33
T14
T15
T16
J31
J33
K29
L31
L33
P14
P15
P16
P17
P18
P29
R14
R15
T17
T18
T19
T20
H4
H5
M2
M3
N3
N4
N5
N6
N7
T3
T6
J2
J3
J7
K3
K4
K5
L2
L3
L4
L5
L7
P2
P3
R2
R3
R4
R5
SiSM672 GND 5/5 B - 9

Schematic Diagrams
DDRII SO-DIMM - 2
SO-DIMM 0 1.8V
111
117
118
103
104
133
183
184
121
122
196
193
162
150
138
161
149
112
Closed to NB(Solt
96
95
81
82
87
88
47
77
12
48
78
71
40
72
28
8
JDIMM2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
lower). 5,10 M_A_A[17:0]
M_A_A0
M_A_A1
M_A_A2
102
101
100
A0
A1
DQ0
DQ1
5
7
17
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ[63:0] 5, 10
A2 DQ2
M_A_A3 99 A3 DQ3 19 M_A_DQ3
M_A_A4 98 4 M_A_DQ4
M_A_A5 97 A4 DQ4 6 M_A_DQ5
M_A_A6 94 A5 DQ5 14 M_A_DQ6
M_A_A7 92 A6 DQ6 16 M_A_DQ7
M_A_A8 93 A7 DQ7 23 M_A_DQ8
M_A_A9 91 A8 DQ8 25 M_A_DQ9
M_A_A10 105 A9 DQ9 35 M_A_DQ10
M_A_A14 90 A10/AP DQ10 37 M_A_DQ11
M_A_A15 89 A11 DQ11 20 M_A_DQ12
A12 DQ12
M_A_A16 116 A13 DQ13 22 M_A_DQ13
M_A_A17 86 36 M_A_DQ14
84 A14 DQ14 38 M_A_DQ15
M_A_A13 85 A15 DQ15 43 M_A_DQ16
M_A_A11 107 A16/BA2 DQ16 45 M_A_DQ17
M_A_A12 106 BA0 DQ17 55 M_A_DQ18
BA1 DQ18 57 M_A_DQ19
DQ19 44 M_A_DQ20
10 DQ20 46 M_A_DQ21
5,10 M_DM0 DM0 DQ21
Sheet 9 of 37 5,10
5,10
5,10
M_DM1
M_DM2
M_DM3
26
52
67
130
DM1
DM2
DM3
DQ22
DQ23
DQ24
56
58
61
63
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
5,10 M_DM4
DDRII SO-DIMM - 2 147 DM4 DQ25 73 M_A_DQ26

5,10 M_DM5 170 DM5 DQ26 75 M_A_DQ27
5,10 M_DM6 185 DM6 DQ27 62 M_A_DQ28
5,10 M_DM7 DM7 DQ28
DQ29 64 M_A_DQ29
5,10 M_DQS0 13 DQS0 DQ30 74 M_A_DQ30
31 76 M_A_DQ31
5,10 M_DQS1 51 DQS1 DQ31 123 M_A_DQ32
5,10 M_DQS2 DQS2 DQ32
5,10 M_DQS3 70 DQS3 DQ33 125 M_A_DQ33
131 135 M_A_DQ34
5,10 M_DQS4 148 DQS4 DQ34 137 M_A_DQ35
5,10 M_DQS6 169 124 M_A_DQ36
188 DQS6 DQ36 126 M_A_DQ37
5,10 M_DQS7 DQS7 DQ37 134 M_A_DQ38
DQ38 136 M_A_DQ39
M_RAS# 108 DQ39 141 M_A_DQ40
5,10 M_RAS# M_WE# 109 RAS# DQ40 143 M_A_DQ41
5,10 M_WE# M_CAS# 113 WE# DQ41 151 M_A_DQ47
5,10 M_CAS# CAS# DQ42
DQ43 153 M_A_DQ43
M_CS0# 110 140 M_A_DQ44
5,10 M_CS0# M_CS1# 115 S0# DQ44 142 M_A_DQ45
5,10 M_CS1# S1# DQ45 152 M_A_DQ46
M_CKE0 79 DQ46 154 M_A_DQ42
5,10 M_CKE0 M_CKE1 80 CKE0 DQ47 157 M_A_DQ52
5,10 M_CKE1 CKE1 DQ48
DQ49 159 M_A_DQ55
173 M_A_DQ54
DQ50 175 M_A_DQ51
M_CLK_DDR0 30 DQ51 158 M_A_DQ48
17 M_CLK_DDR0 CK0 DQ52
17 M_CLK_DDR0# M_CLK_DDR0# 32 CK0# DQ53 160 M_A_DQ50
17 M_CLK_DDR1 M_CLK_DDR1 164 174 M_A_DQ53
M_CLK_DDR1# 166 CK1 DQ54 176 M_A_DQ49
17 M_CLK_DDR1# CK1# DQ55 179 M_A_DQ62
M_ODT0 114 DQ56 181 M_A_DQ57
5,10 M_ODT0 M_ODT1 119 ODT0 DQ57 189 M_A_DQ59
5,10 M_ODT1 ODT1 DQ58
DQ59 191 M_A_DQ60
195 180 M_A_DQ58 1. 8V
10,14,17,22 S_DAT 197 SDA DQ60 182 M_A_DQ56
10,14,17,22 S_CLK SCL DQ61
DQ62 192 M_A_DQ61
DQ63 194 M_A_DQ63
5,10 M_DQS0# 11
29 DQS#0 R130 C303
5,10 M_DQS1# DQS#1
5,10 M_DQS2# 49 83
68 DQS#2 NC1 120 1K_1%_04 0.1u_10V_X7R_04
5,10 M_DQS3# 129 DQS#3 NC2 50
5,10 M_DQS4# DQS#4 NC3
5,10 M_DQS5# 146 DQS#5 NC4 69 MVREF1
167 163
5,10 M_DQS6# 186 DQS#6 NCTEST
5,10 M_DQS7# DQS#7
R132 C305 C306
1.8V MVREF1 1 1K_1%_04 0.1u_10V_X7R_04 1U_6.3V_04
VREF 198 Z0901 R86 10K_04
C310 199 SA0 200 Z0902 R84 10K_04
VDDSPD SA1
1U_6.3V_04
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C179 C282
22U_6.3V_12 22U_6.3V_12 AS0A421-NARN-4F
127
128
145
165
171
172
177
187
178
190
155
132
144
156
168
139
3.3VS_SPD
18
24
41
53
42
54
59
65
60
66
33
34
27
39
21
15
9
2
3
C118
C1 70 & C7 4 2 C o- la yout 0.1u_16V_04
1.8VC1 71 & C7 4 3 C o- la yout
1.8V 5,7,10,14,15,16,20,27, 30, 31

+C178 +C283 C193 C287 C237 C230 C291 C274 C260 C213 C262 C250 C224 C216 C271 C243 C222 3.3VS_SPD 10
*150U_4V_B2 *150U_4V_B2 4. 7U_10V_08 4.7U_10V_08 10U_10V_08 10U_10V_08 10U_10V_08 0.1u_16V_04 0.1u_16V_04 0.1u_16V_04 0.1u_16V_04 0.1u_16V_04 0. 1u_16V_04 0.1u_16V_04 0.1u_16V_04 0. 22u_10V_04 0.22u_10V_04
B - 10 DDRII SO-DIMM - 2
Schematic Diagrams
DDRII SO-DIMM - 1
SO-DIMM 1 1.8V
5,9 M_A_A[17:0]
112
111
117
118
104
133
184
121
122
193
162
150
161
3
83
96
38
9
Far from NB(Slot
96
95
81
82
87
10
88
47
77
12
48
71
72
40
28
14
8
1
1
JDIMM1
Layout Note:
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDD
VDD
Higher).
5,9 M_A_A[17: 0]
M_A_A0 102 5 M_A_DQ0
M_A_DQ[63:0] 5,9 Two pieces of 56 ohms must use o ne
A0 DQ0 0.1U bypass capacitor.
M_A_A1 101 7 M_A_DQ1
M_A_A2 100 A1 DQ1 17 M_A_DQ2
M_A_A3 99 A2 DQ2 19 M_A_DQ3 0.9VS
M_A_A4 98 A3 DQ3 4 M_A_DQ4
A4 DQ4
M_A_A5 97 6 M_A_DQ5
A5 DQ5
M_A_A6 94 14 M_A_DQ6 M_A_A16 4 1 RN20 C484 0.1u_16V_04
M_A_A7 92 A6 DQ6 16 M_A_DQ7 3 2 4P2RX56_04
A7 DQ7 5 M_ODT2
M_A_A8 93 23 M_A_DQ8 4 1 RN21 C482 0.1u_16V_04
A8 DQ8 5 M_CS2#
M_A_A9 91 25 M_A_DQ9 3 2 4P2RX56_04
A9 DQ9 5,9 M_RAS#
M_A_A1
0 105 35 M_A_DQ10
A10/AP DQ10
M_A_A1
4 90 37 M_A_DQ11 M_A_A12 4 1 RN22 C485 0.1u_16V_04
M_A_A1
5 89 A11 DQ11 20 M_A_DQ12 M_A_A0 3 2 4P2RX56_04
M_A_A1
6 116 A12 DQ12 22 M_A_DQ13 M_A_A14 4 1 RN25 C486 0.1u_16V_04
A13 DQ13
M_A_A1
7 86 36 M_A_DQ14 M_A_A17 3 2 4P2RX56_04
A14 DQ14
84 38 M_A_DQ15
M_A_A1
3 85 A15 DQ15 43 M_A_DQ16 M_A_A2 4 1 RN23 C487 0.1u_16V_04
M_A_A1
1 107 A16/BA2 DQ16 45 M_A_DQ17 M_A_A4 3 2 4P2RX56_04
M_A_A1
2 106 BA0 DQ17 55 M_A_DQ18 M_A_A6 4 1 RN24 C488 0.1u_16V_04
BA1 DQ18
57 M_A_DQ19 M_A_A7 3 2 4P2RX56_04
DQ19
44 M_A_DQ20
10 DQ20 46 M_A_DQ21 4 1 RN2 C285 0.1u_16V_04
5,9 M_
DM0 DM0 DQ21 5 M_ODT3
Sheet 10 of 37
26 56 M_A_DQ22 3 2 4P2RX56_04
5,9 M_
DM1 DM1 DQ22 5 M_CS3#
52 58 M_A_DQ23 C480 0.1u_16V_04
5,9 M_
DM2 DM2 DQ23
67 61 M_A_DQ24
5,9 M_
DM3 DM3 DQ24
5,9 M_
DM4 130 63 M_A_DQ25
DDRII SO-DIMM - 1
147 DM4 DQ25 73 M_A_DQ26 M_A_A9 4 1 RN8 C277 0.1u_16V_04
5,9 M_
DM5 DM5 DQ26
170 75 M_A_DQ27 M_A_A15 3 2 4P2RX56_04
5,9 M_
DM6 DM6 DQ27
185 62 M_A_DQ28 4 1 RN3 C270 0.1u_16V_04
5,9 M_
DM7 DM7 DQ28 5,9 M_CS0#
64 M_A_DQ29 3 2 4P2RX56_04
13 DQ29 74 M_A_DQ30 5,9 M_ODT0
31 76 M_A_DQ31 M_A_A11 4 1 RN5 C263 0.1u_16V_04
51 123 M_A_DQ32 M_A_A10 3 2 4P2RX56_04
70 125 M_A_DQ33 4 1 RN4 C219 0.1u_16V_04
5,9 M_DQS3 DQS3 DQ33 5,9 M_WE#
131 135 M_A_DQ34 3 2 4P2RX56_04
5,9 M_DQS4 148 DQS4 DQ34 137 M_A_DQ35 5,9 M_CAS#
169 124 M_A_DQ36 M_A_A5 4 1 RN7 C227 0.1u_16V_04
188 126 M_A_DQ37 M_A_A8 3 2 4P2RX56_04
134 M_A_DQ38 M_A_A1 4 1 RN6 C235 0.1u_16V_04
DQ38
136 M_A_DQ39 M_A_A3 3 2 4P2RX56_04
M_
RAS# 108 DQ39 141 M_A_DQ40
M_
WE# 109 RAS# DQ40 143 M_A_DQ41 4 1 RN9 C244 0.1u_16V_04
WE# DQ41 5,9 M_CKE1
M_
CAS# 113 151 M_A_DQ47 3 2 4P2RX56_04
CAS# DQ42 5 M_CKE2
153 M_A_DQ43 C252 0.1u_16V_04
M_
CS2# 110 DQ43 140 M_A_DQ44 M_A_A13 R120 56_04
M_
CS3# 115 S0# DQ44 142 M_A_DQ45
S1# DQ45 152 M_A_DQ46 R241 56_04 C255 0.1u_16V_04
DQ46 5 M_CKE3
M_
CKE2 79 154 M_A_DQ42 R97 56_04
CKE0 DQ47 5,9 M_CS1#
M_
CKE3 80 157 M_A_DQ52 R98 56_04 C212 0.1u_16V_04
CKE1 DQ48 159 M_A_DQ55 5,9 M_ODT1 R122 56_04
DQ49 5,9 M_CKE0
173 M_A_DQ54
DQ50
175 M_A_DQ51
DQ51
M_
CLK_DDR2 30 158 M_A_DQ48
17 M_CLK_DDR2# M_
CLK_DDR2# 32 160 M_A_DQ50 C199 1U_6
. 3V_04
M_
CLK_DDR3 164 CK0# DQ53 174 M_A_DQ53
M_
CLK_DDR3# 166 176 M_A_DQ49 C290 10U_
10V_08
17 M_CLK_DDR3# CK1# DQ55
179 M_A_DQ62
DQ56
M_
ODT2 114 181 M_A_DQ57
M_
ODT3 119 ODT0 DQ57 189 M_A_DQ59
ODT1 DQ58 191 M_A_DQ60 C206 0.22u_10
V_04
195 DQ59 180 M_A_DQ58 D6 SCS751V- 4
0
9,14, 17, 2
2 S_DAT SDA DQ60
197 182 M_A_DQ56 C A
9,14, 17, 2
2 S_CLK SCL DQ61 3.3VS_SPD 3.3VS
192 M_A_DQ61
DQ62 194 M_A_DQ63
11 DQ63
5,9 M_DQS0# DQS#0
29
5,9 M_DQS1# DQS#1 1.8V
49 83
5,9 M_DQS3# 68 120
129 DQS#3 NC2 50
146 69
167 163
5,9 M_DQS6# DQS#6 NCTEST
186 R131 C304
5,9 M_DQS7# DQS#7
3.3VS 1K_1%_04 0.1u_10V_X7R_04
1 R396
MVREF2 VREF
198 Z1001 R235 10K_04
SA0 MVREF2
C307 199 200 Z1002 R234 10K_04 1K_0
6
VDDSPD SA1
1U_6.3V_04 R133 C312 C311
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1K_1%_04 0.1u_10V_X7R_04 1U_6.3V_04
D
AS0A421-N2RN-4F
139
128
145
165
172
177
187
178
155
132
144
156
168
3.3VS_SPD
7
71
90
18
24
41
53
42
54
59
65
60
66
12
21
33
15
27
39
4
1
1
9
2
3
C120 G
27 SUSB
Q30
0.1u_16V_04 2N7002W
S
C1 83 & C18 4 Co- la yout
1. 8
V C2 96 & C29 7 Co- la yout
0.9VS 31
1.8V 5,7,9,14,15,16,20,27,30,31
3.3VS 2,6,11,13,14,15,16,17,18,19,20, 21, 2
2,23,24,25,26,27,28
3.3VS_SPD 9
C296 C183 C275 C238 C284 C1
96 C254 C272 C261 C226 C214 C241 C251 C257 C221 C245 C231
+ +
150U_4V_B2 15
0U_4V_B2 4.7U_10
V_08 4.7U_10V_08 10U_10
V_08 10U_10V_08 10U_10V_08 0.1u_16V_04 0
. 1u
_16V_04 0.1u_16V_04 0.1u_
16V_04 0.1u_16V_04 0.1u_16V_0
4 0.1u_16V_04 0.1u_16
V_04 0. 2
2u_10V_04 0.22u_
10V_04
DDRII SO-DIMM - 1 B - 11
Schematic Diagrams
Panel, Fan
PANEL
PLVDD 3. 3VS
40 m ils
C1 C5 C6 VDD3
4 0 mils
Q1 C3
JLCD1 0.1u_16V_04 SYS15V 1 6
4. 7U_6. 3V_06 4. 7U_6. 3V_06 D D
0. 1u_16V_04
1
2 2 D D 5
4 5 LVDS-UCLKP R6 4 0 mil s
3 LVDS-UCLKP 18
JLCD LVDS-L0N CP4 3 6 LVDS-UCLKN R195 3 4
4 LVDS-UCLKN 18 100K_04 G S PLVDD
30 5 LVDS-L0P *8P4CX10p_16V_12 2 7 LVDS-U2P LVDS-U2P 18
1 8 LVDS-U2N 1M_04 NTGS4141NT1G
6 LVDS-U2N 18
LVDS-L1N 4 5 LVDS-U1P C2
7 LVDS-U1P 18
LVDS-L1P CP3 3 6 LVDS-U1N
D
8 LVDS-U1N 18
*8P4CX10p_16V_12 2 7 LVDS-U0P Q17 1M_04 R196
9 LVDS-U0P 18
LVDS-L2N 1 8 LVDS-U0N
10 LVDS-U0N 18
LVDS-L2P 4 5 LVDS-L1P G C444 75_06
C
11 LVDS-L1P 18
3 6 LVDS-L1N 2N7002W
12 LVDS-L1N 18 0. 01u_50V_04
LVDS-LCLKN CP1 2 7 LVDS-L0P B
S
13 LVDS-L0P 18 18 ENAVDD
LVDS-LCLKP *8P4CX10p_16V_12 1 8 LVDS-L0N
D
14 3. 3VS LVDS-L0N 18
4 5 LVDS-LCLKP Q3
15 LVDS-LCLKP 18
LVDS-U0N 3 6 LVDS-LCLKN DTC114EUA Q4
16 LVDS-LCLKN 18
E
17 LVDS-U0P CP2 2 7 LVDS-L2P LVDS-L2P 18 G 2N7002W
*8P4CX10p_16V_12 1 8 LVDS-L2N
18 LVDS-L2N 18
LVDS-U1N
S
19
20 LVDS-U1P
1 21 LVDS-U2N R3 R4
Sheet 11 of 37 22
23
24
25
LVDS-U2P
LVDS-UCLKN
4.7K_04 4.7K_04
LVDS-UCLKP
Panel, Fan GND1 26
GND2 Shield1 27
GND3 Shield2 28
P_DDC_DATA
P_DDC_CLK P_DDC_DATA 18
GND4 Shield3 29 P_DDC_CLK 18
Shield4 30 3.3VS
LVC-C30SFYGTP
C4
0.1u_16V_04
5VS
4 0m ils
2
FAN CONTROL L1
HCB1608KF-121T25
1
C11
5VS FAN_VDD
C
4.7U_6.3V_06
C448 D2
4 0m ils
0.1u_16V_04 SCS751V-40
S
G
A
Q5
FAN_DC_VOL R14 4.99K_1%_06
8
NDS352AP_NL
D
R9 10K_1%_04 3 JFAN1
+ 1 FAN_DC_VOL 1
2
- C447
2
+ 3
U11A LM358L
85205-03001
4
21 CPU_FAN
100U_6.3V_B2
JFAN
21 CPU_FANSEN 3
R198 4.7K_04
3.3VS
1
C A
D20 SCS751V-40
5 +
7
6
-
U11B LM358L
2,15,21, 25,26,27,29,31 VDD3

27,29 SYS15V
19,21, 23,24,25,26,27 5VS
2,6,10,13, 14,15,16,17,18, 19,20,21,22,23, 24,25,26,27,28 3.3VS
B - 12 Panel, Fan
Schematic Diagrams
LAN PHY Realtek 8201CL
PHY Address : 01
U3
Close to R TL820 1CL 25 32

14 MDC_PHY MDIO_PHY 26 MDC PWFBOUT 36 PWFBOUT
14 MDIO_PHY 6 MDIO AVDD33 V_LAN_3.3
C66 14 TXD0_PHY 5 TXD0
22p_50V_04 14 TXD1_PHY 4 TXD1 29
PHY_XTAL1 14 TXD2_PHY 3 TXD2 AGND 35
14 TXD3_PHY R59 0_04 TXEN_PHY_R 2 TXD3 AGND
14 TXEN_PHY R56 22_04 TXCLK_PHY_R 7 TXEN
14 TXCLK_PHY R40 0_04 RXDV_PHY_R 22 TXC
14 RXDV_PHY R41 0_04 RXD0_PHY_R 21 RXDV 27
14 RXD0_PHY RXD0 NC1
2
R42 0_04 RXD1_PHY_R 20

X1 14 RXD1_PHY R43 0_04 RXD2_PHY_R 19 RXD1
25MHz 14 RXD2_PHY R44 0_04 RXD3_PHY_R 18 RXD2 CLOSE TO LAN CHIP CLOSE TO TRANSFORMAL
14 RXD3_PHY R45 22_04 RXCLK_PHY_R 16 RXD3 31 MDI1+
14 RXCLK_PHY COL_PHY 1 RXC TPRX+ 30 MDI1-
1
14 COL_PHY CRS_PHY COL TPRX-

C67 14 CRS_PHY 23 CRS
22p_50V_04 RXER_PHY 24
PHY_XTAL2 14 RXER_PHY PHY_XTAL1 RXER/FXEN
46 X1 TPTX- 33 MDI0-
PHY_XTAL2 47 34 MDI0+
X2 TPTX+
LED_TX 9
LED1 LED0/ PHYAD0 LAN_RTSET
12 / 2 0 10 LED1/ PHYAD1 RTSET 28 R57 R55 R47 R46
LED2 12 43 ISOLATE
M odi f y C 66 , C6 7 from 1 8P F LED3 LED2/ PHYAD2 ISOLATE RPTR
13 LED3/ PHYAD3 RPTR 40 49.9_1%_04 49.9_1%_04 49.9_1%_04 49.9_1%_04
LED4 15 39 SPEED
ch a nge t o 2 2 P F f or O SC LED4/ PHYAD4 SPEED 38 DUPLEX
8 DUPLEX 37 ANE
is sus e . PWFBIN PWFBIN ANE
14 41 LDPS C47 C21
Sheet 12 of 37
48 DVDD33 LDPS 44 MII/ SINB
V_LAN_3.3 DVDD33 MII/SNIB/RTT3 42 LAN_RST# R67 0_04 0.1u_16V_04 0.1u_16V_04
11 RESETB AUX_PWROK 6, 14
17 DGND0
45 DGND1
DGND2
RTL8201CL-VD-LF
LAN PHY Realtek
8201CL
R13 *0_04
LP2
WCM2012F2S-161T03
MLMX0-_R 4 3 MLMX0-
MLMX0+_R 1 2 MLMX0+
R12 *0_04
L3
V_LAN_3.3 PWFBOUT MDI0+ 7 10 MLMX0+_R R11 *0_04
TD+ TX+
MDI0- 8 TD- TX- 9 MLMX0-_R
MLMX1-_R 4 3 MLMX1-
4 12
R68 5 NC NC 13 MLMX1+_R 1 2 MLMX1+
R48 R49 NC NC LP1
5.1K_04 MDI1+ 1 16 MLMX1+_R WCM2012F2S-161T03 JLAN1
0_04 0_04 MDI1- 2 RD+ RX+ 15 MLMX1-_R R10 *0_04 MLMX1-
LAN_RST# RD- RX- DC_NP 1 2 MLMX1+
RD_CT 3 14 RX_CT 3 4 MLMX0-
TD_CT 6 RD_CT RX_CT 11 TX_CT DD_NP 5 6 MLMX0+
C68 TD_CT TX_CT 7 8
C22 C20 9 10
M540J E? ? ?
0.1u_16V_04 NS0013LF SPUBF- 10-VB-1-B
0. 01u_16V_X7R_04 0.01u_16V_X7R_04 R16 R15 R2 R1
75_1%_04 75_1%_04 75_1%_04 75_1%_04
C19
V_LAN_3.3
1000p_2KV_12
R51 1.5K_04 MDIO_PHY
R58 5.1K_04 COL_PHY
R37 5.1K_04 LED_TX

R61 5.1K_04 SPEED
R65 5.1K_04 DUPLEX
R60 5.1K_04 ANE
R62 5.1K_04 LDPS
R69 5.1K_04 MI I/SI NB
R39 5.1K_04 CRS_PHY

R38 5.1K_04 RXER_PHY
RN1 8P4RX10K_04
8 1 LED4 PWFBOUT L4 PWFBI N 3.3V V_LAN_3.3
7 2 LED3 HCB1608KF-121T25 CLOSE TO 3.3V 2,14,15, 16,22,25,26,27,29, 30,31
6 3 LED2 PWFBIN L5 HCB1608KF-121T25
5 4 LED1
C38 C39 C46 C85 C53 C59 C62
R50 2K_1%_04 LAN_RTSET
R63 5.1K_04 ISOLATE 0. 1u_16V_04 10U_6.3V_08 0.1u_16V_04 10U_6.3V_08 0.1u_16V_04 0.1u_16V_04 10U_6.3V_08
R66 5.1K_04 RPTR
LAN PHY Realtek 8201CL B - 13

Schematic Diagrams
968 PCI IDE MuTIOL SPI 1/4
6-16-47238-45A
3.3VS RN18
8P4RX8. 2
K_04
1 8 PCI_REQ2#
2 7 PCI_I NTD#
3 6 PCI_I NTB#
4 5 PCI_I NTC#
R1
59 8.2K_04 PCI_REQ0#
RN17
8P4RX8. 2
K_04
M2
PCI_I NTA#
H5
K4
K3
M1
M4
R1
R4
R3
T1
U2
T5
U4
U3
1 8
J4
J3
K1
K2
J5
L2
K5
L4
L3
L5
P3
R2
P5
T2
T4
T3
U1
V1
PCI_REQ0#
2 7 PCI_REQ1# U20A
3 6 PCI_REQ4# PCI_GNT0#
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
6
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
AD1
4 5 PCI_REQ3# FOR MR510 V3
AVDD_IDE IDE_AVDD
PCI_REQ4# H2 V4
PREQ4# AVSS_IDE IDE_AVSS
RN15 PCI_REQ3# H1
PCI_REQ2# PREQ3#
8P4RX4. 7
K_04 G3
PCI_REQ1# PREQ2#
1 8 PCI_SERR# G4
PCI_REQ0# PREQ1#
2 7 PCI_I RDY# G2
3 6 PCI_PLO CK# PREQ0#
4 5 PCI_FRAM E# Z1301 J2 AE20
Sheet 13 of 37 PGNT4
# ICHRDYA IDE_PDIORDY 19
Z1302 J1 AB18
PGNT3
# IDREQA IDE_PDDREQ 19
RN16 Z1303 H3 AB19
PGNT2
# I IRQA Z1305 IDE_IRQ 19
8P4RX4. 7
K_04 Z1304 H4 AC20
PGNT1
# CBLIDA
968 PCI IDE

1 8 PCI_STOP# G5 R147 10K_0
4
PGNT0
#
2 7 PCI_DEVSEL#
3 6 PCI_TRDY# L1
4 5 M3 C/BE3#
MuTIOL SPI 1/4

N5 C/BE2# AF20
C/BE1# IIORA# IDE_PDIOR# 19
1.8VS
4,6 PCI_INTA#
PCI_I NTA#
R5
F5
C/BE0#
INTA#
PCI IIOWA#
IDACKA#
AD19
AC19
IDE_PDIOW# 19
IDE_PDDACK# 19
PCI_I NTB# F4
PCI_I NTC# F3 INTB#
PCI_I NTD# G1 INTC# AD21
INTD# IDSAA2 IDE_PDA2 19
R2
79 AD20
PCI_FRAM E# IDSAA1 IDE_PDA1 19
N1 AB20
IDE
PCI_I RDY# FRAME# IDSAA0 IDE_PDA0 19
150_1
%_04 N2
PCI_TRDY# IRDY#
M5
PCI_STO P# N3 TRDY#
SZVREF STOP# AC21
IDECSA1# IDE_PDCS3# 19
PCI_SERR# P2 AB21
SERR# IDECSA0# IDE_PDCS1# 19
R2
80 C5
16 P4
PCI_DEVSEL# PAR
N4
DEVSEL#
49.9_1%_04 0.1u_10V_X7R_04 PCI_PLOCK# P1
PLOCK# AE19 IDE_PDD0 IDE_PDD[15:0] 19
V2 I DA0 AD18 IDE_PDD1
17 PCLK_SB PCICLK I DA1
D5 AC17 IDE_PDD2
27 SB_PCIRST# PCIRST# I DA2
AF18 IDE_PDD3
I DA3
AB16 IDE_PDD4
I DA4
AE17 IDE_PDD5
I DA5
AD16 IDE_PDD6
1.8VS IDE_AVDD I DA6 AF16 IDE_PDD7
AC26 I DA7 AE16 IDE_PDD8
17 Z_CLK1 ZCLK I DA8
L29 HCB1
005KF-121T20 AF17 IDE_PDD9
I DA9
V22 AC16 IDE_PDD1
0
6 ZSTB_D0 ZST
B0 I DA10
V23 AD17 IDE_PDD1
1
6 ZSTB_D#0 ZST
B0# I DA11
C3
73 C355 C3
54 AE18 IDE_PDD1
2
V25 I DA12 AB17 IDE_PDD1
3
6 ZSTB_D1 ZST
B1 I DA13
0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 V26 AF19 IDE_PDD1
4
6 ZSTB_D#1 ZST
B1# I DA14 AC18 IDE_PDD1
5
NC9 NC_04 I DA15
AA23
6 ZUREQ ZUREQ
AA24
6 ZDREQ ZDREQ
IDE_AVSS
1.8VS
R292 56_04 SZCMP_N AB24

ZCMP_N
MuTIOL SPI_CS0N
AE21 Z1308
R291 56_04 SZCMP_P AB25 AF21 Z1307
1.8VS AVDD_SZ4X ZCMP_P SPI_CS1N
AD22 Z1309
SPI
L27 HCB1
005KF-121T20 SPI_DO AE22 Z1310
SPI_DI
AF22 Z1311
SPI _CLK
C3
28 C522 C5
23
AA22 3.3VS
AVDD_SZ4X AVDD_Z4X
10U_10V_08 0.01u_16V_X7R_04 0.1u_10V_X7R_04 AB23
AVSS_SZ4X AVSS_Z4X AF23 SPI _TRAP R14
0 *4. 7
K_04
NC16 NC_04 AB26 SPI_HARDWARE_TRAP
SZVREF ZVREF
0:L PC Internal Pull down
ZAD11
ZAD12
T22 ZAD10
3
ZAD14
AA26 ZAD15
ZAD16
1:S PI External Pull up
ZAD4
ZAD5
ZAD6
ZAD1
ZAD0
Y23 ZAD1
W21 ZAD2
Y26 ZAD3
ZAD7
U24 ZAD8
U22 ZAD9
AVSS_SZ4X C517
1U_6.3V_04
SiS968
W22
W24
W25
U25
Y22
Y25
U21
T23
T25
T26
ZAD10
ZAD16
1
ZAD12
ZAD13
ZAD14
ZAD15
ZAD2
ZAD3
ZAD9
ZAD1
ZAD0
ZAD1
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
6 ZAD[16:0]
1.8VS 4,5,6,7,14,15,16,17,18,27
3.3VS 2,6,10,11,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28
B - 14 968 PCI IDE MuTIOL SPI 1/4

Schematic Diagrams
968 PCIE LAN GPIO 2/4

U20
B
R31
9 0_
04 Z140
4 C557 22p_50V_04
C8
AVSS_GMACCMP18 AVSS_GMACCMP
D9
AVDD_GMACCMP18 AVDD_GMACCMP
2
AC23 R318
2 H_I NIT# INIT#
AE26 B8 Z1402 X5
2 H_A20M# A20M# OSC25MHO
3.3V
RN19 8P4RX10K_04
2
2
H_SMI#
H_INTR
AD23
AC22
AE25
SMI#
INTR
CPU_S OSC25MHI
A8
A12
Z1403
GTXCLK_PHY_R
*1M_
04 25MHz
1
AGPSTOP# 2 H_NMI NM I GTXCLK EXTCLK_PHY
1 8 AE24 F14 C556 22p_50V_04
SCI# 2 H_IGNNE# IGNNE# EXTCLK
2 7 2 H_FERR# AF24
3 6 AF25 FERR# B11
2 H_STPCLK# TXCLK_PHY 12 Put closed to 968
4 5 SWI# AD24 STPCLK# TXCLK
2 H_CPUSLP# CPUSLP#/CPUSTOP#
C12
R1
83 10K_04 CPU_STP# AGPBUSY# AE23
TXEN
C11 T
XER_PHY
TXEN_PHY 12 12 /2 0
6 AGPBUSY# BMBUSY# TXER
M odif y C5 5 7, C5 5 6 from 2 7P F
R1
86
R3
25
10K_04
4.7K_04
PSON#
PME#
PWR_ BTN#
2 H_PROCHO T#
2 H_THRMTRIP#
AC24
AD25
PROCHOT#
THERMTRIP#
APIC TXD0
TXD1
D12
A13
TXD0_PHY
TXD1_PHY
12
12
cha nge to 2 2P F f or O SC
R1
84 10K_04
TXD2
B13
C13 TXD2_PHY 12 iss use .
TXD3 TXD3_PHY 12
Y5
21 LPC_AD0 LAD0
AA4 A14 RGMCMP_N R176 56_04
GMAC
21 LPC_AD1 LAD1 RGMCMP_N V_LAN V_LAN
AB2 B14 RGMCMP_P R320 56_04
21 LPC_AD2 LAD2 RGMCMP_P
21 LPC_AD3 AB3 C14 RGMVREF
LAD3 RGMVREF
21 LPC_FRAME#
LPC_LDRQ#
AB1
AB4
LFRAME#
LDRQ#
LPC RXCLK
A11
RXCLK_PHY 12
R178
21 SERIRQ AA5 C10 RXDV_PHY 12
3
.3VS SIRQ RXDV E12 150_1%_04
? ? ? ? ? PHY>>1.5V
RXER RXER_PHY 12
RN14 8P4RX10K_04
1 8 LCDI D1 A10
RXD0 RXD0_PHY 12 RGMVREF
2 7 LCDI D0 C9
3 6 SB_THERM# RXD1 B9 RXD1_PHY 12
RXD2 RXD2_PHY 12
4 5 GPIO0 A9 C432 R182
RXD3 RXD3_PHY 12
R2
52 10K_04 PM_CLKRUN# RTC_
CLKO E2 E10 0.1u_10V_X7R_04 150_1%_04
Sheet 14 of 37
R1
54 10K_04 SMI# RTC_
CLKI E1 OSC32KHO COL E11 COL_PHY 12
OSC32KHI CRS CRS_PHY 12
R1
41 4.7K_04 AGPBUSY# E14
MDC MDC_PHY 12
R1
53
R1
51
10K_04
1K_04
LPC_LDRQ#
S_CLK F1
RTC MDIO
E13
MDIO_PHY 1
2
968 PCIE LAN GPIO

15 RTC_PWROK BATOK
R1
49 1K_04 S_DAT 21,25,27,28 SB_PWROK SB_PWROK E4 D8 EESK
R3
28 10K_04 GA20# PWROK GPIO21 F8 EEDI
R3
29 10K_04 SB_KBCRST# GPIO22 E8 EEDO 3.3V
GPIO23 EEPROM
D1 A7 EECS
2/4
VCC_RTC RT
CVDD GPIO24
U10
C424 D2 M26 EECS 1 8
RT
CVSS PRX0+ PCIE_RXP0_NEW_CARD 22 CS VCC
M25 EESK 2 7 C40
4
PRX0- PCIE_RXN0_NEW_CARD 2 2 SK DC
1U_6.3V_04 N24 C406 0.1u_1
0V_
X7R_04 EEDI 3 6
PTX0+
N23 C395 0.1u_1
0V_
X7R_04
PCIE_TXP0_NEW_CARD 22 PCIE NEWC AR D EEDO 4
DI ORG
5 0.1u_16V_04
R3
08 4.7K_04 SB_DPRSLPVR PTX0- K26 PCIE_TXN0_NEW_CARD 22 DO GND
PCIE_RXP5_CARD 20 3.3V
HD Audio
PRX1+ K25 R306 4.7K_04 AT93
C46DN-SH-T
R1
81 0_04 SENTEST E5
PRX1-
L24 C552 0.1u_1
0V_
X7R_04
PCIE_RXN5_CARD 20 PCIE
23 AZ_SDIN0
C4
HDA_SDIN0 PTX1+
L23 C548 0.1u_1
0V_
X7R_04
PCI E_TXP5_CARD 20 CA RDR EAD ER
AUX_PWROK 25 AZ_SDIN1 HDA_SDIN1 PTX1- PCI E_TXN5_CARD 20
C436 0.1u_10
V_X7
R_04
Y3 F26 Z140
5
PCI-Express
23,25 AZ_SDOUT HDA_SDOUT NC11
C425 0.1u_10
V_X7
R_04 SB_
PWROK Y2 F25 Z140
6
23,25 AZ_SYNC HDA_SYNC NC10
G24 Z140
7
NC9
23,25 AZ_RST# B3 G23 Z140
8
Y1 HDA_RESET# NC8 H26 Z140
9
23,25 AZ_BITCLK HDA_BIT_CLK NC7 H25 Z141
0 PCI-Express X1
NC6
J24 Z141
1
NC5
J23 Z141
2
3.3V
R3
30 *10K_04 NC4 Lane 0 New Card
1.8V AVDD_GMACCMP P26 Lane 1 Mini Card( Wireless LAN)
ACPI/Others
PCLK100P PCIE_CLK_SB 17
P25
L37 HCB1005KF-121T20 PCLK100N PCIE_CLK_SB# 17
AA2
17 CL
K_1
4M_968 OSCI
SENTEST F2 R25
ENTEST AVDD_PEXTRX AVDD_PEXTRX
C434 C43
3 AA1 R26
23 SPKROUT SPK AVSS_PEXTRX AVSS_PEXTRX
0.1u
_10V_X7R_0
4 PWR_BTN# E6 3.3V
21 PWR_BTN# PWRBTN#
0.01u_16
V_X
7R_04 PME# A6 P22 P-RSET0 R1
61 499_1%_04
21 PM E# PME# RSET0
NC11 NC_04 PSON# E7 P21 P-RSET1 R1
57 124_1%_04
26 PSON# PSON# RSET1
C
AUX_PWROK C3
6
,12 AUX
_PWROK AUXOK
AVSS_GMACCMP Z1401 A5 R21 R342 D1
4
ACPILED PCIEPRSNT1
R23 PCI E_PRSNT
0
PCIEPRSNT0 PCIE_PRSNT0 22
*2.2K_04 *SCS75
1V-40
M a in Boa rd I D
3.3V
A
AUX POWE R MAIN POWER
21 SCI#
SCI#
SWI#
D6
A4 GPIO7/G PWAK#
GPIO GPIO0
U5
AB5
GPI O0
R340
AUX_PWROK
0
_04
RSMRST# 21
21 SWI# GPIO8/ RING GPIO1/LDRQ1#/PCIE_HOTPLUG SB_BLON 25 AUX_PWROK 6,12

C6 V5 SB_THERM#
24 SB_MUTE# GPIO9/ HDA_SDIN2 GPIO2/THERM#
C2 W4 SMI#
26 SB_SUSC# SLP_S5# GPIO3/EXTSMI# SMI# 21
R326 AGPSTOP# F6 W3 CLKRUN# R341 C4
41
6 AGPSTO P# GPIO11/ STP_PCI#/AGPSTOP# GPIO4/CLKRUN# PM_CLKRUN# 21
PCI-Express 10K_04 6 CPU_STP# CPU_STP# D4
SB_DPRSLPVR D3 GPIO12/ CPUSTP# GPIO5/PREQ5#
W2
W1
L
CDID0
L
CDID1
R263 *0_04
*330
K_04 *10U_10V_08
1
.8VS 6 SB_DPRSLPVR GPIO13/ DPRSLPVR GPIO6/PGNT5#
LPC_FLASH B5
AVDD_PEXTRX GPIO14/ AGPSTOP#/S3AUXSW#
C7
26 SB_SUSB# SLP_S3#
B7 Y4 Z141
3 R152 0_04 S_CLK
6 SB_DPRSTP# D7 GPIO16/ DPRSTP# GPIO19 W5 S_DAT S_CLK 9,10
,17,22
HCB1005KF- 1
21T20 21 GA20# S_DAT 9,10
,17,22
L31 R327 B4 GPIO17/ GA20# GPIO20
21 SB_KBCRST# GPIO18/ KBDRST#
*1
0K_ 04
C378 C37
7 1.8V 5,7,9,10,15,16,20,27,30,31
0.1u_10
V_X
7R_04 SiS968 1.8VS 4,5,6,7,13,15,16,17,18,27
3.3VS 2,6,10,11,13,15,16,17,18,19,20,21,22,23
,24,25,26,27,28
0.01u_
16V_X7R_04
3.3V 2,12,15,16,22,25,26,27,29,30,31
NC10 NC_04
D02 VCC_RTC 15
V_LAN 16
RT
C_CLKO C531 15p_50V_04
2
1
AVSS_PEXT
RX R301 X
4
1.8VS 10M_04 3
2.768KHz
3
4
RT
C_CLKI C528 15p_50V_04
R158 *10K_04 PCIE_PRSNT0
6 -2 2 -3 2R7 6 -0 B1, H=2 .4
968 PCIE LAN GPIO 2/4 B - 15

Schematic Diagrams
968 USB SATA 3/4
USB0: Port0 On Board

U20C
USB1: Port1 On Board Mini PCIE D26 A22
19 USB_PP0 UV0+ OSC12MHI CLK_12M_USB 1
7
USB2: Mini PCIE Port1 On Board D25
19 USB_PN0 UV0-
E24 B22 Z1501
22 USB_PP1 UV1+ OSC12MHO
U
S
B
2
.
0
E
y
e
P
a
t
t
e
r
n
I
s
s
u
e
.
USB3: Port2 Off Board CCD E23 R173 110_1%_04
22 USB_PN1 UV1-
19 USB_PP2 A20 F20 USBREF
B20 UV2+ USBREF
USB4: BLUETOOTH 19 USB_PN2 UV2-
C19 B26
25 USB_PP3 UV3+ AVDD_USBPLL18 USBPVDD18
USB5: New Card Zo=90 Ohm D19 B25
25 USB_PN3 UV3- AVSS_USBPLL18 USBPVSS18
A18
25 USB_PP4 B18 UV4+ E21
USB6: CCD Port2 Off Board 25 USB_PN4 USBCMPAVDD18
USB7: FINGER PRINTER

22
22
24
USB_PP5
USB_PN5
USB_PP6
C17
D17
A16
UV4-
UV5+
UV5-
UV6+
USB AVDD_USBCMP18
AVSS_USBCMP18
AVDD_USBCMP33
E20
D21
USBCMPAVSS18
UVDD33
24 USB_PN6 B16 C21
C15 UV6- AVSS_USBCMP33 C430 C429
22 USB_PP7 UV7+
D15
3.3V 22 USB_PN7 UV7-
RN35 0.1u
_16V_04 0.01u_16
V_X7
R_04
8P4RX10K_04 USB_OC0# A23
8 1 USB_OC7# 19 USB_OC0# USB_OC1# F21 OC0# NC12 NC_
04
19 USB_OC1# OC1#
7 2 USB_OC4# USB_OC2# A24
22 USB_OC2# OC2#
6 3 USB_OC5# USB_OC3# B24 USBCMPAVSS33
24 USB_OC3# USB_OC4# OC3#

5 4 USB_OC6# C23
OC4#
USB_OC5# C24
USB_OC6# A25 OC5#
USB_OC7# B23 OC6# AC13 SATATXP0
OC7# STX0+ SATATXP0 19
AD13 SATATXN0
STX0
- SATATXN0 19
E16 AF12 SATARXP0
UVDD18 E18 UVDD1
8 SRX0+ AE12 SATARXN0 SATARXP0 19
1.8V UVDD18 UVDD1
8 SRX0- SATARXN0 19
F15 AC6 Z1502
Sheet 15 of 37
UVDD1
8 STX1+
F16 AD6 Z1503
UVDD1
8 STX1
-
L
34 HCB100
5KF-121T2
0 J19 AF5 Z1504
UVDD1
8 SRX1+
H18 AE5 Z1505
H17 UVDD1
8 SRX1-
968 USB SATA 3/4 C415 C419 H16 UVDD1

8 AE8 SOSC25MHI R142 0_
04
UVDD1
8 XIN
H15 AF8 SOSC25MHO
UVDD1
8 X
OUT
0.1u_10V_X7R_04 J15
0.01u
_16V_X7R_0
4 UVDD1
8 AA3
HDACT SATA_LED# 19
F22 AC1 ISW1 R1

50 1K_04
UVDD33 UVDD3
3 ISWITCHOPEN1
F19 AD1 ISW0 R1
44 1K_04
UVDD3
3 ISWITCHOPEN0
F17
UVDD3
3
3.3V UVDD33
L
33 HCB100
5KF-121T2
0 AF14
AVDD_
SATARX AVDD_SATARX
AF15
AVSS_
SATARX AVSS_SATARX
C421 C420 AC9 D22 Z1506
AVDD_SATAPLL33 AVDD_SAT
APLL33 IPB_OUT0
AD9 C22 Z1507
AVDD_SAT
APLL33 IPB_OUT1
0.1u_10V_X7R_04
0.01u
_16V_X7R_0
4
AVSS_SATAPLL33
AC8
AD8
AVSS_SATAPLL33
AVSS_SATAPLL33
SATA TRAP0
E22 ZCLK_SEL
SATAREXT AF7
REXT D10 Z1508 R1
77 1K_04
AT
RAP
AE15
1.8VS AVDD_SATARX 17 CLK_SATA CLK100P
AD15 E9 PCI E_WAKE#
17 CLK_SATA# CLK100N PCIEWAKE PCIE_WAKE# 4,22
L
26 HCB100
5KF-121T2
0
C319 C321
SiS968 MuTIOL Clock Select (ZCLK)
0.1u_10V_X7R_04 ? ? ? ? ?
0.01u
_16V_X7R_0
4 133MHz : Interanl Pull dow n
NC7 NC_0
4 66MHz : External Pull up
R143 12K_1%_0
4
SATAREXT 3.3V
AVSS_SATARX
ZCLK_
SEL R1
71 *10K_04
C323 22
p_50V_04
3.3VS AVDD_SATAPL
L33
L
25 HCB100
5KF-121T2
0 3.3V
VCC_RTC PCI E_WAKE# R1

74 10K_04
C324 C327
D12 SCS7
51V- 4
0 D1
3 1SS35
5
0.1u_10V_X7R_04 A C C A
VDD3
0.01u
_16V_X7R_0
4
NC8 NC_0
4
C428
D 6 f rom
S CS 75 1 V- 40
AVSS_SATAPLL33 10U_10V_08
c ha nge to 1S S3 5 5
S O D- 32 3 f or c ost
1.8V USBPVDD18 1.8V USBCMPAVDD18 do w n. 1.8V 5,7,9,10,14,16,20,27,30,31
JCBAT1 R14
8 1K_04 D11 SCS7
51V- 4
0 R1
66 10K_1%_04
1.8VS 4,5,6,7,13,14,16,17,18,27
L
38 HCB100
5KF-121T2
0 L36 HCB1
005KF-121
T20 Z1512 Z1511 A C
1 RTC_
PWROK 14 3.3V 2,12,14,16,22,25,26,27,29,30,31
3.3VS 2,6,10,11,13,14,16,17,18,19,20, 2
1,22,23,24,25,26,27,28
2 VDD3 2,11,21,25,26,27,29,31
C431 C426 C427 C423 C371 C375 JOPEN1 C367 C385
VCC_RTC 14
8
5205-02001 2
2U_6.3V_08
0.1u_10V_X7R_04 0.1u_10V_X7
R_04 1U_6.3V_04 NO_04 1U_6.3V_04 10
U_10V_08
0.01u
_16V_X7R_0
4 0
.01u_16V_X7R_04
NC13 NC_0
4 NC14 NC_04
7 / 18
USBPVSS18 USBCMPAVSS1
8 C 28 8 f rom 10 uF_ 10 V_ 0 8 c ha nge
t o 2 2 uF_6 . 3V _0 8 f or RTC t im e
i ssu e .
B - 16 968 USB SATA 3/4

Schematic Diagrams
968 PWR GND 4/4

1.05VS
AB22
1
AA2
U23
W23
T21
T17
R15
R16
U17
K10
M11
M12
M13
M14
M15
N10
R22
1
Y21
T15
P15
T16
U16
1
K12
L10
L12
L14
L15
L16
0
V2
K1
11
M1
1.8VS
L
U20D
N11
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VTT
VTT
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSSZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSZ
VSSZ
VSSZ
U26 N12
1.8VS W26 VDDZ VSS N13 C382 C387 C380 C362 C359 C370 C352 C353
AA25 VDDZ VSS N14
VDDZ VSS
R24 P10 10U_
10V_
08 10
U_10V_08 1U_6
.3V_04 1U_6.3V_04 0.1u_16V_04 0.1u
_16V_04 0.1u_16V_04 0.1u
_16V_04
VDDZ VSS
T24 P11
VDDZ VSS
V24 P12
Y24 VDDZ VSS P13
P18 VDDZ VSS P14
VDDZ VSS 3.3VS
W18 R10
VDDZ VSS
U18 R11
V18 VDDZ VSS R12
V19 VDDZ VSS R13
VDDZ VSS
W19 R14 C363 C388 C364 C397 C365 C360 C348 C349
VDDZ VSS
N18 T
10
VDDZ VSS
T
11 10U_
10V_
08 10
U_10V_08 1U_6
.3V_04 1U_6.3V_04 0.1u_16V_04 0.1u
_16V_04 0.1u_16V_04 0.1u
_16V_04
R18 VSS T
12
R17 IVDD VSS T
13
IVDD VSS
V17 T
14 2.5V change to 3.3V
IVDD VSS
V13 U10
V12 IVDD VSS U11 3
.3V V_LAN
V11 IVDD VSS U12
IVDD VSS
V10 U13 L35 HCB1005KF-121T20
IVDD VSS
K9 U14
IVDD VSS
M9 U15 C405 C416 C418 C417 C399
N9 IVDD VSS D13
P9 IVDD VSS D11 1U_6
.3V_04 1U_6.3V_04 1U_6.3V_04 0.1u_
16V_04 0.1u_16V_04
IVDD VSS
R9 B12
IVDD VSS
T9 B10
U9 IVDD VSS AC25
IVDD VSS
Sheet 16 of 37
J14 AD26
IVDD VSS 1.8VS V_AVDD_SATA 1
.8V
T18
IVDD
D14
V16 USBVSS E15 L28 HCB1005KF-121T20
3.3VS
968 PWR GND 4/4

V15 PVDD USBVSS A15
V14 PVDD USBVSS B15 C338 C329 C343 C332 C402 C411
PVDD USBVSS
T8
N8
L9
PVDD
PVDD
PVDD
Power/Ground USBVSS
USBVSS
USBVSS
C16
D16
A17
10U_10V_08 1U_6.3V_04 0.1u_
16V_04 0.01u_16V_X7R_04 1U_6
.3V_04 0.1u
_16V_04
W17 B17
OVDD USBVSS
W16 E17
OVDD USBVSS
W15 C18
W14 OVDD USBVSS D18 1.8VS V_AVDD_SBPCI E 1.05
VS
W13 OVDD USBVSS A19
W12 OVDD USBVSS B19 L32 HCB1005KF-121T20
OVDD USBVSS
K8 E19
OVDD USBVSS
L8 C20 C392 C384 C391 C383 C342 C341
M8 OVDD USBVSS D20
P8 OVDD USBVSS A21 10U_10V_08 1U_6.3V_04 0.1u_
16V_04 0.01u_16V_X7R_04 1U_6
.3V_04 0.1u
_16V_04
OVDD USBVSS
R8 B21
OVDD USBVSS
U8 D23
V8 OVDD USBVSS D24
OVDD USBVSS C25
USBVSS
J18 C26
1.8V IVDD_AUX USBVSS
J17 K13
IVDD_AUX USBVSS
J16 K14
J10 IVDD_AUX USBVSS K15 Put under SiS968 solder side
J8 IVDD_AUX USBVSS K16
IVDD_AUX USBVSS
J9 K17
IVDD_AUX USBVSS
L
13
H19 USBVSS L
17 1.8VS 1.05VS 1.8V V_AVDD_SBPCIE
3.3V OVDD_AUX USBVSS
H9
OVDD_AUX
H8 AB6
OVDD_AUX AVSS_SATA
F7 AB7
OVDD_AUX AVSS_SATA
J11 AB12 C3
61 C366 C3
68 C372 C3
76 C340 C394 C3
96 C390 C3
89
J12 OVDD_AUX AVSS_SATA AB13
OVDD_AUX AVSS_SATA AB14 0.1u_16V_0
4 0.1u_16V_04 0.1u_16
V_0
4 0.1u_16V_04 0.1u_16V_0
4 0.1u_16V_04 0.1u_16V_04 0.1u_1
6V_0
4 0.1u_16V_04 0.01u_16V_
X7R_04
AVSS_SATA
H10 AB15
V_
LAN GMIIVDD_AUX AVSS_SATA
H11 AC2
H12 GMIIVDD_AUX AVSS_SATA AC3
H13 GMIIVDD_AUX AVSS_SATA AC4
GMIIVDD_AUX AVSS_SATA 3.3VS 3.3V V_LAN V_AVDD_SAT
A
J13 AC5
GMIIVDD_AUX AVSS_SATA
AC7
AVSS_SATA
V_AVDD_SBPCIE K18 AC12
L18 AVDDPEX AVSS_SATA AC14
L19 AVDDPEX AVSS_SATA AC15 C3
74 C369 C3
50 C381 C4
12 C398 C4
01 C414 C4
13 C333 C3
44
AVDDPEX AVSS_SATA
M18 AD2
AVDDPEX AVSS_SATA
M19 AD3 0.1u_16V_0
4 0.1u_16V_04 0.1u_16
V_0
4 0.1u_16V_04 0.1u_16V_0
4 0.1u_16V_04 0.1u_16
V_0
4 0.1u_16V_04 0.1u_1
6V_0
4 0.1u_16V_04 0.01u_16V_
X7R_04
N19 AVDDPEX AVSS_SATA AD4
H21 AVDDPEX AVSS_SATA AD5
AVDDPEX AVSS_SATA
J21 AD7
AVDDPEX AVSS_SATA
K21 AD12
AVDDPEX AVSS_SATA
L21 AD14
M21 AVDDPEX AVSS_SATA AE1
N21 AVDDPEX AVSS_SATA AE2
AVDDPEX AVSS_SATA
M22 AE3
AVDDPEX AVSS_SATA
H22 AE4
AVDDPEX AVSS_SATA AE6
AVSS_SATA AE7
AVSS_SATA
AB8 AE9
V_AVDD_SATA AVDD_SATA AVSS_SATA
AB9 AE11
AB10 AVDD_SATA AVSS_SATA AE13
AB11 AVDD_SATA AVSS_SATA AE14
AVDD_SATA AVSS_SATA 1.05VS 2,3,4,6,7,30
AC10 AF2
AVDD_SATA AVSS_SATA 1.8V 5,7,9,10,14,15,20,27,30,31
AC11 AF3
AVDD_SATA AVSS_SATA 1.8VS 4,5,6,7,13,14,15,17,18,27
AD10 AF4 3.3V 2,12,14,15,22,25,26,27,29,30,31
AD11 AVDD_SATA AVSS_SATA
AVDD_SATA 3.3VS 2,6,10,11,13,14,15,17,18,19,20,21
, 22, 23,24,25,26,27,28
AE10 AF6
AVDD_SATA AVSS_SATA V_LAN 14
AF10 AF9
AVDD_SATA AVSS_SATA
V9 AF11
W8 AVDD_SATA AVSS_SATA
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AF13
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
AVSSPEX
W9 AVDD_SATA AVSS_SATA
W10 AVDD_SATA
AVDD_SATA
W11
AVDD_SATA
SiS968
N25
M24
M23
G22
H23
G26
G25
E26
M17
M16
4
P23
2
N26
L22
K22
J22
L26
L25
K24
3
J26
J25
H24
F24
F23
E25
P16
N17
7
6
N15
P2
N2
K2
P1
N1
968 PWR GND 4/4 B - 17

Schematic Diagrams
Clock Generator & Clock Buffer
C 50 6 C 5 14 C 499
3 .3 V S L47 C L K GE N _ V D D
H C B 1 0 0 5 K F - 12 1 T 2 0 0 . 1 u _ 16 V _0 4 0 . 1 u _ 1 6V _ 04 0 .1 u _ 1 6 V _ 0 4 U1 5
2 55 H _ CL K _ N B_ R 1 4 RN 2 7
V DD RE F C P U T_ L 0 F H _ C LK _ N B 4
14 54 H _ CL K _ N B# _ R 2 3 4 P 2 RX 3 3 _ 0 4
C5 0 4 C 50 1 C 5 13 C 502 19 V DD PC I C P U C_ L 0 F 52 H _ CL K _ C P U _R 1 4 RN 2 8 H _ C LK _ N B # 4
V DD PC I C P U T _ L1 H _ C LK _ C P U 2
23 51 H _ CL K _ C P U #_ R 2 3 4 P 2 RX 3 3 _ 0 4
V DD Z C P U C _ L1 H _ C LK _ C P U # 2
1 0 U_ 1 0 V _ 0 8 1 U_ 6 .3 V _ 0 4 1 U _6 . 3 V _0 4 0 .1 u _ 1 6 V _ 0 4 24
V DD 48
56 44 PC I E _ C L K _ N B _R 1 4 RN 3 0
39 V DD CP U P C I E T _ L0 43 PC I E _ C L K _ N B #_ R 2 3 4 P 2 RX 3 3 _ 0 4 P CIE _ CL K _ N B 4
V DD PC IE X P C I E C _ L0 P CIE _ CL K _ N B # 4
29 41 PC IE T _ L 1 1 4 R N2 6
V DD PC IE X P C I E T _ L1 C L K _ P C I E _ J M3 8 0 2 0
40 PC IE C _ L 1 2 3 4 P 2 RX 3 3 _ 0 4
P C I E C _ L1 C L K _ P C I E _ J M3 8 0 # 2 0
7 38 PC IE _ C L K _ S B _ R 1 4 RN 3 1 P CIE _ CL K _ S B 1 4
8 G N DR E F P C I E T _ L2 37 PC IE _ C L K _ S B # _ R 2 3 4 P 2 RX 3 3 _ 0 4
G N DP C I P C I E C _ L2 P CIE _ CL K _ S B # 1 4
13 36 PC IE _ C L K _ NE W _ R 1 4 RN 3 2
G N DP C I P C I E T _ L3 P C I E _ C L K _ N E W 22
20 35 PC IE _ C L K _ NE W # _ R 2 3 4 P 2 RX 3 3 _ 0 4
G N DZ P C I E C _ L3 P CIE _ CL K _ N E W # 2 2
27 34 PC I E _ C L K _ MI N I _ R 1 4 RN 3 3 P CIE _ CL K _ M IN I 2 2
53 G N D4 8 P C I E T_ L 4 F 33 PC I E _ C L K _ MI N I # _ R 2 3 4 P 2 RX 3 3 _ 0 4
G N DC P U P CI E C_ L 4 F P CIE _ CL K _ M IN I# 2 2
42 31 PC IE _ C L K _ HD V _ R 1 4 RN 3 4
G N DP C IE X P C I E T_ L 5 F P CIE _ CL K _ H DV 1 8
R 264 * 0_04 32 30 PC IE _ C L K _ HD V # _ R 2 3 4 P 2 RX 3 3 _ 0 4
2 0 , 2 1 , 2 2 , 2 6 , 2 7, 30 , 3 1 S U S B # G N DP C IE X P CI E C_ L 5 F P CIE _ CL K _ H DV # 1 8
49 C L K_ SATA_ R 1 4 RN 2 9 C LK _ S A T A
S A T A C LK T _L C L K _ S A TA 1 5
R2 6 8 1 0 K_ 0 4 C L KEN 1 48 C L K_ SATA# _ R 2 3 4 P 2 RX 3 3 _ 0 4 C LK _ S A T A #
3 .3 V S ( C L K _ S T O P # )/ V T T P W R G D / P D # S A T A C L K C _L C L K _ S A TA # 1 5
D
21 Z _ C L K0 _ R R 270 22 _ 0 4 Z_ C L K0
Z CL K 0 Z _ CL K 0 6
22 Z _ C L K1 _ R R 271 22 _ 0 4 Z_ C L K1
Z CL K 1 Z _ CL K 1 13
G 28
28 CL K E N# 6 CP US T P # * (C P U _ S TO P # )/ R E S E T #
Q 19 3 C L K GE N _ F S L0 R 254 33 _ 0 4 C LK _ 14 M _ 6 71 M X C L K _ 1 4 M_ 6 7 1 M X 6
2 N 7 0 02 W 3. 3V S L46 CL K G E N _ V DD A * *F S L 0 / R E F 0 _ 2x 4 C L K GE N _ F S L1 R 253 33 _ 0 4 C LK _ 14 M _ 9 68
Sheet 17 of 37
*F S L 1 / R E F 1 _ 2x C L K _ 1 4 M_ 9 6 8 1 4
S
H C B 1 00 5 K F -1 21 T 2 0 R 251 33 _ 0 4 C LK _ 14 M _ 3 07 E LV
PC L K_ SB C L K _ 1 4 M_ 3 0 7 E L V 1 8
50 9 C L K GE N _ F S L2 R 278 33 _ 0 4
V DD A ** F S L 2 / P C I C L K 0_ 2 x F 10 C L K GE N _ F S 3 R 274 33 _ 0 4 PC L K_ KBC P CL K _ S B 1 3
* *F S 3 / P C I C L K 1_ 2 x F P CL K _ K B C 2 1
C 494 C 4 98 C 500 11 C L K GE N _ F S 4 R 275 *3 3 _ 0 4
Clock Generator &

* *F S 4 / P C ICL K 2
12 S T P _ P CI#
* (P C I _ S T OP #) / P C ICL K 3 P C L K _ L P C RO M P C L K _ L P C RO M
1 0 U _1 0 V _ 0 8 0 . 1 u _ 1 0V _ X7 R _ 0 4 15 C L K GE N _ M OD E R 276 *3 3 _ 0 4 C 51 9 * 1 0 p_ 5 0 V _ 0 4
0 . 0 1 u _ 1 6V _ X7 R _ 0 4 4 7 ** MO D E / P C ICL K 4 16 P E CL K R E Q 0 # R 277 0_ 0 4
G N DA (P E C L K R E Q 0 #) / P C ICL K 5 MI N I _ C A R D _ C L K R E Q # 2 2
Clock Buffer
17 P E CL K R E Q 1 # R 285 0_ 0 4
(P E C L K R E Q 1 #) / P C ICL K 6 NE W _ CA R D _ CL K R E Q # 2 2
18 P C L K _ D E B U G_ R
PC ICL K 7
45 26 S E L2 4 _ 4 8 # R 273 *3 3 _ 0 4
9, 10 , 1 4 , 2 2 S _ D A T S D A TA ** S E L 2 4 _ 48 # / 2 4 _ 4 8 MH z
46
9, 10 , 1 4 , 2 2 S _ C L K S CL K
25 C L K _ 1 2M _ U S B _ R R 272 33 _ 0 4 C LK _ 12 M _ U S B
1 2 MH z C L K _ 1 2 M_ U S B 15
X1
X2
I C S 9 L P R 6 0 0 C GL F
6
X3
Z1704 1 2 Z 17 0 5
1 4 . 3 18 M H z
C 509 C5 1 0
2 7 p _ 5 0V _ 04 2 7 p_ 5 0 V _ 0 4
S T P _ P C I# R 28 7 * 1 0 K _ 04 3 .3 V S
Place CRYSTAL Within 500 3 .3 V S

mils of ICS9LPR600
M
o
d
i
f
y
C
5
0
9
,
C
5
1
0
f
r
o
m
3
3
P
F
c
h
a
n
g
e
t
o
2
7
P
F
f
o
r
O
S
C
i
s
s
u
s
e
.
C L K GE N _ M OD E R 28 3 1 0 K_ 0 4
C L K GE N _ F S L0 R 25 7 2 .2 K _ 1 % _ 0 4
CPU _ BSE L 0 2
C L K GE N _ F S L1 R 25 0 2 .2 K _ 1 % _ 0 4
Clock Generator Pin 15
CPU _ BSE L 1 2
C L K GE N _ F S L2 R 28 8 2 .2 K _ 1 % _ 0 4
1 .8 V S CPU _ BSE L 2 2 Status (LO)Non-STUFF (HI)PULLl-UP
C L K GE N _ F S 3 R 28 1 2 .7 K _ 0 4
C L K GE N _ F S 4 R 28 2 * 2 .7 K_ 0 4
Mode Desktop mode Mobile mode
3 .3 V S
C 2 95 C 294 C 300
L24
H C B 1 0 0 5 K F -1 2 1 T 2 0 0 . 1 u _ 1 6V _ 04 0 .1 u _ 1 6 V _ 0 4 0 .1 u _ 1 6 V _ 0 4
Pin 1 VTTOWRGD/PD# CLK_STOP#
CL K B UF _ V DD Host Clock
C2 9 8 C 2 99 C 301 FS4 FS3 BSEL2 BSEL1 BSEL0 Frequency
Pin 12 PCICLK3 PCI_STOP#
1 0 U_ 1 0 V _ 0 8 0 . 1 u _ 1 6V _ 04 0 .1 u _ 1 6 V _ 0 4 U 14 0 1 1 0 1 100 MHz
3 7
Pin 16 PCICLK5 PECLKREQ0#
V D D 1 .8 V D D A 1 .8 C L KBU F_ AVD D
11 0 1 0 0 1 133 MHz
25 V D D 1 .8 1 M_ C L K _ D D R 3 # _R 1 4 RN 1 0 M _ CL K _ D D R3 #
21
V D D 1 .8 D D RC 0
2 M_ C L K _ D D R 3 _ R 2 3 4 P 2 RX 0 _ 0 4 M _ CL K _ D D R3
M _ CL K _ D DR 3 # 1 0 Pin 17 PCICLK6 PECLKREQ1#
V D D 1 .8 D DR T 0 M _ CL K _ D DR 3 1 0 0 1 0 1 1 166 MHz
10 5 M_ C L K _ D D R 1 # _R 2 3 RN 1 1 M _ CL K _ D D R1 # 0 1 0 1 0 200 MHz
5 M _ F W D S D C LK OA _ D #
9
C L K _ IN C D D RC 1
4 M_ C L K _ D D R 1 _ R 1 4 4 P 2 RX 0 _ 0 4 M _ CL K _ D D R1
M _ CL K _ D DR 1 # 9 Pin 28 RESET# CPU_STOP#
5 M_ F W D S D C L K OA _ D C L K _ IN T D DR T 1 M _ CL K _ D DR 1 9
R1 2 7 *0 _ 0 4 Z 1 7 0 6 20 13 M_ C L K _ D D R 2 # _R 1 4 RN 1 2 M _ CL K _ D D R2 #
9 ,1 0 ,1 4 ,2 2 S _ D A T SD ATA D D RC 2 M _ CL K _ D DR 2 # 1 0
R1 2 8 *0 _ 0 4 Z 1 7 0 7 19 12 M_ C L K _ D D R 2 _ R 2 3 4 P 2 RX 0 _ 0 4 M _ CL K _ D D R2
9 ,1 0 ,1 4 ,2 2 S _ C L K SC L K D DR T 2 M _ CL K _ D DR 2 1 0
F B _ INA 18 15 M_ C L K _ D D R 0 # _R 2 3 RN 1 3 M _ CL K _ D D R0 # 1 .8 V S C L KBU F _ AVD D

F B _ IN D D RC 3 M _ CL K _ D DR 0 # 9 1 .8 V S 4, 5, 6, 7, 13 , 1 4 , 1 5 , 1 6 , 1 8 , 2 7
R 1 29 22_04 F B _ OU T A 17 16 M_ C L K _ D D R 0 _ R 1 4 4 P 2 RX 0 _ 0 4 M _ CL K _ D D R0
F B _ OU T D DR T 3 M _ CL K _ D DR 0 9 3 .3 V S 2, 6, 10 , 1 1 , 1 3 , 1 4 , 1 5 , 1 6 , 1 8, 19 , 2 0 , 2 1 , 2 2 , 2 3 , 2 4 , 2 5, 26 , 2 7 , 2 8
L23 H C B 1 0 05 K F -1 2 1 T2 0
C 3 02 8 23
6 G ND D D RC 4 22 C 286 C2 9 2 C2 9 3
1 0 p _ 50 V _0 4 28 G ND D DR T 4
G ND
24 27 1 0 U _ 10 V _ 0 8 0. 1u _ 1 0 V _ X 7 R _ 0 4
G ND D D RC 5
14 26 0 . 0 1u _ 1 6 V _ X 7 R _ 0 4
G ND D DR T 5
IC S 9 P 9 3 5
B - 18 Clock Generator & Clock Buffer

Schematic Diagrams
SiS307ELV
L 1<=400m ils
1. 8
VS VB_PCI EVDD L1 Cl os e to 3 07 s ide
L13 HCB1005KF-121T20 HDVBN2_R C143 0.1u
_10V_X7R_04
HDVBN2 4
HDVBP2_R C144 0.1u
_10V_X7R_04
C155 C123 C13
2 C127 C131 C122 HDVBN1_R C141 0.1u
_10V_X7R_04 HDVBP2 4
HDVBN1 4
HDVBP1_R C142 0.1u
_10V_X7R_04
HDVBP1 4
10U_
10V_08 0.1u
_16V_04 0.1u_16
V_04 0.1u_16V_04 0.1u_
10V_
X7R_04 HDVBN0_R C139 0.1u
_10V_X7R_04
HDVBN0 4
0.1u_10V_X7R_04 HDVBP0_R C140 0.1u
_10V_X7R_04
HDVBP0 4
HDVAN2_R C137 0.1u
_10V_X7R_04 HDVAN2 4
HDVAP2_R C138 0.1u
_10V_X7R_04
HDVAP2 4
HDVAN1_R C135 0.1u
_10V_X7R_04
General I/O Power VB_PCIEAVDD
HDVAP1_R C136 0.1u
_10V_X7R_04
HDVAN1 4
HDVAP1 4
HDVAN0_R C133 0.1u
_10V_X7R_04 HDVAN0 4
HDVAP0_R C134 0.1u
_10V_X7R_04
HDVAP0 4
VB_VDD3V
M13
M12
M11
M10
N12
N13
HD V S igna ls
M9
L10
K10
K12
0
N11
M8
M7
M6
M5
M4
M3
M2
1
K9
M1
N1
N8
N9
N4
N5
N2
N1
L1
K5
K6
K7
K8
L6
K3
K4
J5
J6
J7
J8
J9
L2
L3
N6
N7
N3
9
1
L
L
R82 0_06 U5
3. 3
VS
HDVBN1
HDVAN0
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
HDVBN2
HDVBP2
HDVBP1
HDVBN0
HDVBP0
HDVAN2
HDVAP2
HDVAN1
HDVAP1
HDVAP0
HDVPLLVDD
HDVPHYVDD
HDVPHYVDD
HDVPHYVDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C112
HDVPLL
0.1u_10V_X7R_04
R408 0_0
4 G10
VDD33
L7
1.8VS HDVREFCLKN PCI E_CLK_HDV# 17
G4 L8 PCI E_CLK_HDV 17
C115 C114 H4 I VDD HDVREFCLKP
J4 I VDD L4 VB_HDVRSET0 R2
38 499_1%_04
I VDD HDVRSET0
0.1u
_10V_X7R_04 H10 L5 VB_HDVRSET1 R2
37 124_1%_04
I VDD HDVRSET1
Sheet 18 of 37
0.1u_10V_X7R_04 H11
H12 I VDD K13
I VDD VACLK VACLK 6
R409 0_0
4 H13 J12 VBCLK_R R85 0
_04
I VDD VBCLK VBCLK 6
K11
SiS307ELV
1.8VS VBHSYNC VBHSYNC 6
F5 J11
C110 C113 F6 VSS VBVSYNC L13 VBVSYNC 6
F7 VSS VBHCAD L12
VBCAD 6 Side-Band
VSS VBHCLK VBHCLK 6 Signals
0.1u
_10V_X7R_04 F8
VSS
0.1u_10V_X7R_04 F9 F13
1 /1 0 C64
3 G5 VSS EXTRSTN E11 Z1124 NB_RST
# 6,27
G6 VSS GPIOF/DVINTN E10 Z1125
4.7U_
6.3V_
06 G7 VSS PFTESTO F10 Z1126
VSS PFTEST1
G8 G11 Z1127
VSS PFTEST2 VB_DACVDD
G9
H5
H6
VSS
VSS
VSS
307ELV DACRSET
DACCOMP
B2
B1
C102
H7 D2 Z1128 *.1U_1
6V_
04
VSS TVDACR
H8 D1 Z1129
H9 VSS TVDACG E2 Z1130
J10 VSS T
VDACB E1 Z1131 VB_DACVSS
VSS TVCSYNC
Z1101 G2 C2
Z1102 H2 GPIOA DACVDD C1 VB_DACVDD
Z1103 H1 GPIOB DACVSS D3
GPIOC DACVSS
Z1104 G1 E3
GPIOD DACVSS VB_DACVSS
G13 E4
11 ENAVDD LCDVDD_EN//GPIOG DACVSS
25 307_BLON G12 F4
Z1105F11 BL_EN/ /GPIOH DACVSS
LVDSPHYVDD//TMDSPHYVDD
GPIOI
VDSPHYVDD// TMDSPHYVDD
LVDSPHYVDD/ /TMDSPHYVDD
Z1106 F3 LVDSPHYVDD/ /TMDSPHYVDD
LVDSPHYVSS/ /TMDSPHYVSS
K2
LVDSPHYVSS//TMDSPHYVSS
VDSPHYVSS//TMDSPHYVSS
LVDSPHYVSS// TMDSPHYVSS
LVDSPLLVDD//TMDSPLLVDD
GPIOJ COREPLLVDD VB_PLL1
VDD
LVSS//TMDSPLLVSS
Z1107 G3 J2 VBRCLK R83 0_04
GPIOK VBRCLK CLK_14M_307ELV 1
7
Z1108 F2 J1 Z1132
Z1109 F1 GPIOL VBOSCO K1
Z1110 H3 GPIOM COREPLLVSS
GPION
Z1111 J3 F12
GPIOO LDIDDCCLK//DVIDDCCLK P_DDC_CLK 11
E13
XC2N//DXC1N
LDIDDCDATA// DVI DDCDATA P_DDC_DATA 11

P
E12 Z1133
LXC2P//DXC1
BL_ADJ//DVIHPD
N//NC12
LXC1P//NC1
LXC1N/ /NC2
LX4N//DX0N
LX6N//DX2N
P//DX0P
P//DX2P
EXTSWING
X0N//NC10
N
LX5P//DX1P
1
LX3P/ /NC5
LX3N//NC6
LX2P//NC1
LX1P//NC3
LX1N//NC4
LX0P//NC9
LX5N// DX1
LX7P// NC7
LX7N/ /NC8
LVDSPL
LX2
LX4
LX6
R76
L
L
6.04K_1%_06
C13
C11
C12
C10
D10
D13
B13
SiS307ELV
Z1112 A12
Z1113 A13
A10
A11
1
D12
B10
B11
B12
C9
C8
C6
E5
E9
D1
B5
B9
D4
D5
D8
D9
A8
A9
C7
A6
A7
C5
A4
A5
C3
C4
E6
E7
E8
B3
A2
A3
B4
B6
B7
B8
D6
D7
C89 R75
1U_6.3V_04 24K_1%_06
Z1134 EX
TSWING 3.3VS VB_DACVDD
L8 HCB1005KF- 1
21T20
T134
T133
VB_
LVDSPLLVDD
LVDS-L2P
11 LVDS-L2P
LVDS-L2N C1
00 C101 C9
8
11 LVDS-L2N VB_
LAVDD
LVDS-L1P 0.1u_1
0V_
X7R_04 10U_10V_08
11 LVDS-L1P LVDS- U2N 11
LVDS-L1N 0.01u_16V_X7R_04
11 LVDS-L1N LVDS- U2P 11
R79 0_0
6
LVDS-L0P
11 LVDS-L0P LVDS- U1N 11
LVDS-L0N
11 LVDS-L0N LVDS- U1P 11
VB_DACVSS
LVDS-LCLKP
11 L
VDS-LCLKP LVDS- U0N 11
11 L
VDS-LCLKN LVDS-LCLKN LVDS- U0P 11
LVDS- UCLKN 11
LVDS- UCLKP 11
1
.8VS VB_PCIEAVDD 3.3VS VB_
LAVDD 3.3VS VB_LVDSPLLVDD 3
.3VS VB_PLL1VDD
L16 HCB1005KF-121T20 L9 HCB1005

KF-121T20 L7 HCB1005KF-121T20 L11 HCB1005KF-121T20 1.8VS 4,5,6,7,13,14,1
5,16,17,27
3.3VS 2,6,10,11,13,14,15,16,17,19,20,21,22,23
,24,25,26,27,28
C156 C472 C47

3 C93 C99 C95 C103 C1
06 C86 C92 C90 C121 C116 C11
7
10U_
10V_
08 0.1u_10V_X7R_04 10U_10V_08 0.1u_
10V_X7R_0
4 0
.1u_10V_X7R_04 10U_10V_08 0.1u_10
V_X
7R_04 10U_
10V_
08 0.1u_10V_X7R_04
0.01u_16V_X
7R_04 0.1u_10V_X7
R_04 0.1u_10V_X7R_04 0.01u
_16V_X7R_04 0.01u_16
V_X
7R_04
SiS307ELV B - 19
Schematic Diagrams
ODD, SATA, USB2.0 *2
I DE _ P DD [1 5 :0 ]
1 3 ID E _ P D D[1 5 :0 ]
SATA HDD SIS? ? ? ?
CD-ROM JC D 1 JS A T A 1
? ? ? ? ?
Connector
S 1
1 2 S 2 S ATA_ TXP0 _ C C 5 43 1 0 n_ 5 0 V _ 0 4
3 4 SA TAT XP0 1 5
R 117 33_04 C D_ R S T # ID E_ PD D 8 S 3 S A T A_ T XN0 _ C C 5 39 1 0 n_ 5 0 V _ 0 4
2 0 ,2 2 ,2 7 P C I_ RS T # 5 6 SA T AT XN0 1 5
ID E _ P D D 7 ID E_ PD D 9 S 4
ID E _ P D D 6 7 8 ID E_ PD D 10 S 5 S A T A _ RX N 0 _ C C 5 35 1 0 n_ 5 0 V _ 0 4
9 10 SA T ARXN 0 1 5
ID E _ P D D 5 ID E_ PD D 11 S 6 S A T A _ R X P 0_ C C 5 34 1 0 n_ 5 0 V _ 0 4
11 12 SA T ARXP 0 1 5
ID E _ P D D 4 ID E_ PD D 12 S 7
13 14 3 .3 VS
ID E _ P D D 3 ID E_ PD D 13
ID E _ P D D 2 15 16 ID E_ PD D 14
17 18
40m ils
ID E _ P D D 1 ID E_ PD D 15 P 1
19 20
ID E _ P D D 0 P 2
21 22 I D E _ P D D R E Q 13
I DE _ P DIO R # 1 3 P 3 C5 2 5 C5 3 0
23 24 P 4
1 3 I DE _ P DIO W # 25 26 5V S
3 .3 V S P 5 0. 1u _ 1 0 V _ X 7 R _ 0 4
1 3 I DE _ P DIO R DY 27 28 I DE _ P DD A C K # 1 3
P 6 1 0 U_ 1 0 V_ 0 8
13 ID E _ IR Q 29 30
13 ID E _ P D A 1 IDE _ P DD IA G # R 240 *1 0 K _ 0 4 P 7 40 m ils
31 32 P 8
13 ID E _ P D A 0 33 34 I D E _ P D A 2 13
P 9
1 3 I DE _ P DC S 1 # 35 36 I DE _ P DC S 3 # 1 3
C D_ D A S P # P 10
37 38
P 11 T1 0 0 C3 3 9 C3 3 4 C3 3 1 C 351 C5 2 6 C 527
C 479 * .0 1 U_ 1 6 V _ 0 4 39 40 P 12 +
41 42 P 13 0. 1u _ 1 0 V _ X 7 R _ 0 4 1 0 U _1 0 V _ 0 8 2 2 U _ 6 .3 V _ 1 2
43 44 *1 0 0 U _ 6. 3V _ B 2
P 14 0. 1u _ 1 0 V _ X 7 R _ 0 4 1 U_ 6 .3 V _ 0 4
45 46
R2 3 9 0_04 C D_ C A B S E L P 15
47 48
49 50 C 1 66 8 8 -1 2 2 0 4 -Y C5 26 & C5 2 7 Co - lay ou t
Sheet 19 of 37 C 1 2 4 3 4- 15 A 1- B
PIN GND1~GND2=GND
5 VS
P IN G ND 1 ~ 2 = G ND
ODD, SATA, C4 7 6 C 48 3 C 481 C 477 C4 7 8 C 20 7 C 493

5V
60mils
USB2.0 *2
+
0 . 1 u_ 1 6 V _ 0 4 0 . 1 u _ 16 V _0 4 0 .1 u _ 1 6 V _ 0 4 0 .1 u _ 1 6 V _ 0 4 1 U_ 6 .3 V _ 0 4 1 0 U_ 1 0 V_ 0 8 1 0 0 U_ 6 .3 V _ B 2
C 94 U4
4 3
1 0 U _ 10 V _0 8 V IN V IN
2
G ND
5 1
V C C US B 0 V C CU S B 0
R 113 5. 6K _0 4 ID E _ P D D7 USB 2.0 C9 1 C8 8

V O UT V OU T
R T 9 7 0 1 -C P L C9 7 C 96
3 .3 V S 0 . 1 u _1 6 V _ 0 4 10 U _ 1 0 V _ 0 8 1 0U _ 1 0 V _ 0 8 0 . 1 u _ 16 V _0 4
3 .3 V S D3 1 ,D3 2 f rom
SC S7 51 V- 40
c ha nge t o
1 SS3 5 5 SO D- 32 3 R 110
R 11 1 R 104 1 0 0 K_ 0 4
*1 0 K _ 0 4 * 1 0 K_ 0 4 for cos t dow n. 6 0m ils L6
1 2
VC C USB 0
D8 1 SS3 5 5 H C B 1 6 08 K F -1 2 1 T2 5
C A R7 0 1 0 K_ 0 4
15 S A T A _L E D # H D_ L E D # 2 6 15 U S B _ O C 0#
R6 4 1 5 K_ 0 4
CD _ DA S P # C A
J U SB1
D7 1 SS3 5 5 R 74 *0 _ 0 4
Z 1 60 2 1
VC C
LP 3 GN D 1
GN D1
15 US B _ P N0 4 3 Z 1 60 3 2 GN D 2
D AT A- GN D2 GN D 3
1 2 Z 1 60 4 3 GN D3 GN D 4
15 US B _ P P 0 D AT A+ GN D4
W C M 2 01 2 F 2 S -1 61 T 0 3
C6 0 C 61 C 49 4
R 73 *0 _ 0 4 + G ND
2 2 U_ 6 .3 V _ 1 2 * 10 0 U _ 6 . 3V _ B 2 0 . 1 u _ 16 V _0 4
C 1 0 77 0 -1 0 4 A 3
60 m ils
C6 0 & C6 1 Co - lay ou t
L10 1 2 H C B 1 6 0 8 K F -1 2 1 T 2 5
V C CU S B0
R3 9 8 1 0 K_ 0 4
15 U S B _ O C 1#
R3 9 9 1 5 K_ 0 4
J U SB2
R 88 *0 _ 0 4
Z 1 60 5 1
VC C
LP 4 GN D 1
GN D1
15 US B _ P N2 4 3 Z 1 60 6 2 GN D 2
D AT A- GN D2 GN D 3
1 2 Z 1 60 7 3 GN D3 GN D 4
15 US B _ P P 2 D AT A+ GN D4
W C M 2 01 2 F 2 S -1 61 T 0 3
C 1 09 C 11 1 4
R 87 *0 _ 0 4 + G ND
1 0 0U _ 6 . 3 V _ B 2 0 . 1 u _ 16 V _0 4
C 1 0 77 0 -1 0 4 A 3
C1 0 8 & C10 9 Co- la yo ut
2 4 , 2 5 , 2 6 , 2 8 , 2 9, 30 , 3 1 5 V
1 1 , 2 1 , 2 3 , 2 4 , 2 5, 26 , 2 7 5 V S
2 , 6 , 1 0 , 1 1 , 1 3 , 1 4 , 1 5 , 1 6 , 1 7, 18 , 2 0 , 2 1 , 2 2 , 2 3 , 2 4 , 2 5 , 2 6, 27 , 2 8 3 . 3 V S
B - 20 ODD, SATA, USB2.0 *2

Schematic Diagrams
Card Reader JMB385

3.3VS
3. 3
VS
C4 7 2 Ne ar to Pin30
R302 4.7K_0
4 SD_
CD#
R303 4.7K_0
4 MS_
I NS# C533
DV1.8V
R337 10K_04 MDIO7 0.1u_16V_04
MDIO10
MDIO11
MDIO12
VCC_CARD
8
9
MDIO
MDI O
C573 SD_CL
K
0.1u_16V_04
36
35
34
33
32
31
30
29
28
27
26
25
U21 C43
7 C438 C550
VCC_CARD
MDIO12
NC
NC
NC
GND
TAV33
MDIO8
MDIO9
10
11
ND
ND
*10p_50V_04 0. 1
u_16V_04 10U_10
V_08
MDIO
MDI O
G
G
R338 10K_04 SD_WP 37 24
R305 10K_04 MDIO13 38 DV18 GND 23 MDIO13
3.3VS PCIES_EN MDIO13
39 22 MDIO14 3.3VS
MDIO7 40 PCIES MDIO14 21 CR1_LEDN
MDIO7 CR1_LEDN
SD_WP 41 20 Nea r Cardreader CONN
3.3VS MDIO6 DV33
SD_CLK 42 19
MDIO5 DV33
SD_BS 43 18
44 MDIO4
DV33
J MB385 DV18
CR1_PCTLN
17 CR1_PCTLN DV1. 8
V
SD_D3 45 16 SD_CD# C532 Layou t note:
R309 200K_04 MDIO12 SD_D2 46 MDIO3 CR1_CD0N/WAKEN 15 MS_INS# C536
R304 200K_04 MDIO14 C572 SD_D1 47
MDIO2 CR1_CD1N
14 0.1u_16V_04 0.1u_16V_04
La yout note: Very closed to pin 5
MDIO1 NC Very closed between
SD_D0 48 13 DV1.8V
MDIO0 CPPEN pin 5 and pin 10
APREXT
APCLKN
APCLKP
XRSTN
APGND
APRXN
0.1u_1
6V_04
APRXP
APTXP
APVDD
APTXN
XTEST
APV18
M P v e rsi on IC w ill provide c ard re ade r pow e r by Pi n1 7
JMB385 C555 C56
0 C5
41 C564
Sheet 20 of 37
10
11
12
1
2
3
4
5
6
7
8
9
0.1u_16V_04 1000p_
50V_
04 0.1u_16V_04 10U_10V_08
19,22,27 PCI_RST#
C5
38
C5
42
0.1u_10V_X7R_04
0.1u_10V_X7R_04
PCI E_RX
P5_CARD 14
PCI E_RX
N5_CARD 14
Card Reader
17 CLK_PCIE_JM380
17 CLK_PCIE_JM
#
380
DV1. 8
V 10/29
PCIE_TXN5_CARD 14
JMB385
DV1.8V PCIE_TXP5_CARD 14 VCC_CARD
R316 8.2K_1%_0
4
HIGH LOW
C439 C440
MD IO 7 On Borad Add-in Card
0. 1
u_16V_04 0.1u_16V_04
Be c aus e M P v ers ion JM B3 8 5 w il l prov ide 1.8 V by IC s el f, be ad re s erv e for debug
1.8V DV1.8V
MD IO 12 CR1_PCTLN CR1_PCTLN
High Active Low Active Q20 L48
*AO3415 *HCB1608KF-121T25
S D
MD IO 14 CR1_LEDN CR1_LEDN 4 IN 1 SO CKET SD/M MC/M S/MS Pro

High Active Low Active JCARD_
NOR1
G
C5
47 C554 *1u_6.3V_04 C537 SD_CD# P1
CD_ SD
R307 SD_WP P2
10U_10V_08 0.1u_16V_04 SD_D1 P3 WP_SD
R323 *100K_04 SD_D0 P4 DAT1_SD
P5 DAT0_SD
WPGND_SD
*20K_04 P6
VSS_SD
P7
VSS_MS
R324 *100K_04 SD_BS P8
SD_CLK P9 BS_M S
SD_D1 P10 CLK_SD
D
SD_D0 P11 DAT1_MS
SDIO/DAT0_MS
Q23 P12
VCC_CARD VDD_SD
G SD_D2 P13
17,21,22,26,27,30,31 SUSB# *2N700
2W DAT2_MS
P14
MS_INS# P15 VSS_SD
S
SD_D3 P16 INS_MS
SD_BS P17 DAT3_MS
CMD_SD
SD_CLK P18
SCLK_MS
P19 P23
VCC_CARD VCC_M S GND
SD_D3 P20 P24
P21 CD/DAT3_SD GND P25
SD_D2 P22 VSS_MS GND P26
Card Reader Power DAT2_SD GND
MSD019-C0
- 10
A0(No
r mal)
CR1_PCTL
N R314 0_0
8
3.3VS
Q 22 6-21 -G40 00-12 6
30 mil *AO3415 30 mil
S D
VCC_CARD
C55
1 C549
G R312 R397
S
D
C
a
r
d
R
e
m
o
v
e
F
a
l
l
t
i
m
e
l
e
s
s
t
h
a
n
1
m
s
.
*10U_10V_08 R315 0.1u_16V_04
*470_06 75_06
*100
K_04
D
Q21
CR1_PCTLN G
*2N7002W
S
2, 6
, 10
, 11
, 13
, 14
, 15
, 16
,17, 1
8, 1
9, 21, 2
2, 2
3, 2
4, 2
5, 2
6, 2
7, 2
8 3.3VS
5,7,9, 1
0, 1
4, 1
5, 1
6, 2
7, 3
0, 3
1 1.8V
Card Reader JMB385 B - 21

Schematic Diagrams
KBC-ITE IT8512E
V DD 3 L 30
C3 2 6 C3 0 9 C3 2 2 C 32 0 K B C_ A VDD H C B 1 0 0 5K F - 12 1 T2 0
R 26 9 1 0K _ 0 4 W D T _E N
WE B 0# - - - APK EY 10 U _1 0 V _ 08 0 . 1u _ 1 6V _ 0 4 0 . 1u _ 1 6V _ 0 4 0 . 1 u_ 1 6 V _0 4
V DD 3
V DD 3
WE B 1# - - - MAI L C3 5 6 C3 5 7 C 35 8 R 26 0 V DD3
C3 0 8 R 26 2 1 0K _ 0 4
WE B 2# - - - WW W 0 . 1u _ 1 6V _ 0 4 0 . 1u _ 1 6V _ 0 4 0 . 1 u_ 1 6 V _0 4 1 0 0K _0 4
0 . 1u _ 1 0V _ X 7R _ 04
R 26 1 W D _ D I S A B LE R 2 49
3 .3 VS
G
K B C _ A GN D 1 0 K _0 4 U1 6 1 0 0 K _0 4
Z 2 2 01 3
M R# 1 Z 2 2 02 S D KB C_ W RE SE T #
1 24 D0 2 R ESET #
J_KB1 VD D3 5
VC C
114
127
J I N TK B 1 4 Q1 8 C 5 03
1 21
11
26
92
WD I
50
74
U 6 8 5 2 01 -2 40 5 1 C 50 5 2 2 N 7 00 2 W
3
G ND 6-15-27002-7B5 1 U _6 . 3 V _ 04
V STBY
VST BY
VST BY
VST BY
VST BY
VST BY
VBAT
10 58 K B -S I 0 4 0 . 1 u_ 1 6V _0 4 A A T 3 5 10 I GV -2. 9 3 -C -C -T1
V CC
A V CC
14 L P C_ A D 0 L A D0 K S I0 /S T B#
9 59 K B -S I 1 5 6-03-35102-0D0 3 IN1
14 L P C_ A D 1 8 L A D1 KSI1 /AF D # 60 K B -S I 2 6
14 L P C_ A D 2 L A D2 K S I2 /INIT #
14 L P C_ A D 3 7 61 K B -S I 3 8
P C LK _ K B C 13 L A D3 K S I 3/ S LI N # 62 K B -S I 4 11
17 P C L K _K B C L P CCL K KS I4 J1
1 4 L P C_ F RA M E # 6 63 K B -S I 5 12
5 L F RA M E # KS I5 64 K B -S I 6 14 W D _D I S A B L E 1 2
14 S ERIR Q SE RIR Q LPC K/B MATRIX KS I6
22 65 K B -S I 7 15
2 2 , 2 7 L P C _R S T # L P C R S T# / W U I 4/ G P D 2 ( P U ) KS I7
K B C _W R E S E T # 14 36 K B -S O 0 1 2 0m i l
W RST # K S O 0/ P D 0
37 K B -S O 1 2
H 8_ GA 20 # 12 6 K S O 1/ P D 1 38 K B -S O 2 3
GA 2 0 / GP B 5 K S O 2/ P D 2
25 A C_ IN# 4 39 K B -S O 3 7
16 K B R S T # / GP B 6 ( P U ) K S O 3/ P D 3 40 K B -S O 4 9
Sheet 21 of 37
26 L E D _A C I N # P W U R E Q# / GP C 7 ( P U ) K S O 4/ P D 4
2 TH E R M _A L E R T# 20 41 K B -S O 5 10 V ER. M OD EL_ ID V OL TA GE
L 80 L LA T/ G P E 7 ( P U ) K S O 5/ P D 5 42 K B -S O 6 13
W EB0 # 23 K S O 6/ P D 6 43 K B -S O 7 16 M540SS
E C S C I # / GP D 3 ( P U ) K S O 7/ P D 7 V 1.0 L ow 0V
W EB1 # 15 44 K B -S O 8 17
KBC-ITE IT8512E
E C S M I # / GP D 4 ( P U ) K S O8 / A C K # 45 K B -S O 9 18
K S O 9/ B U S Y
DAC 46 K B -S O 10 19 D1 1,D12 ,D14 Ne ar Conn ec tor.
C P U_ F A N_ R 76 K S O 1 0/ P E 51 K B -S O 11 20 V DD 3 MO D E L _I D R2 6 7 *1 0 K _0 4
DA C 0/ G PJ 0 K S O1 1 / E R R # V DD3
S Y S _F A N _ R 77 52 K B -S O 12 21
78 DA C 1/ G PJ 1 K S O1 2 / S LC T 53 K B -S O 13 22 R2 5 9 10 K _ 0 4
22 W L A N_ PW R 79 DA C 2/ G PJ 2 K S O1 3 54 K B -S O 14 23
2 2, 2 6 W L A N _ E N S R S _E N 80 DA C 3/ G PJ 3 K S O1 4 55 K B -S O 15 24 RX
24 V O L_ MU T E #
81 DA C
DA C
4/ G
5/ G
PJ 4
PJ 5
IT 85 12E K S O1 5 C
B A T _ V OL T AC
ADC FLASH 6- 2 0 -9 4 A8 0 -1 2 4 25 B A T_ V O LT D4 A
25 B A T0 _ TE MP 66 10 0 D02 BAV9 9 V DD3
B A T _ V OL T _R 67 ADC 0/ G P I0 F L F R A ME # / GP G 2 10 1 K B C _S P I _ C E # C
ADC 1/ G P I1 F L A D0 /S C E#
C H G_ C U R _ R 68 10 2 K B C _S P I _ S I C H G_ C U R AC 3 G_ D E T # R 1 55 1 0 0K _0 4
T OT A L _ C U R _ R 69 ADC 2/ G P I2 F L A D 1/ S I 10 3 K B C _S P I _ S O 25 C H G _C U R D3 A CC D_ DET # R 1 56 1 0 0K _0 4
70 ADC 3/ G P I3 F L AD2 /S O 10 4 BAV9 9
3 G_ D E T# 71 ADC 4/ G P I4 F L A D 3 / GP G 6 10 5 K B C _S P I _ S C LK C
T 1 04 C C D _ D E T# 72 ADC 5/ G P I5 F L CL K /SCK 10 6 T OT A L _ C U R AC C4 9 7
T1 0 3 ADC 6/ G P I6 ( P D )F LR S T #/ W U I 7 / TM / GP G 0 CCD _ E N 25 25 T OT A L _ C U R
M OD E L _ I D 73 D1 A P CL K_ K B C R 1 34 * 10 _ 04
ADC 7/ G P I7 BAV9 9
GPIO
SMBUS 56 S US B # 1 7 , 2 0, 2 2 , 2 6, 2 7 , 3 0, 3 1 6-06-00099-011 *1 0 p_ 5 0 V _0 4
R2 2
1 0 _ 1% _ 04 S MC L K 0 11 0 ( P D )K S O1 6 / GP C 3 57 R1 3 5 0_04
25 S MC _B A T S MD A T 0 S MC LK 0/ G PB3 ( P D )K S O1 7 / GP C 5 S US C # 26
25 S MD _B A T R2 3
1 0 _ 1% _ 04 11 1
S M C _ C P U _T H E R M 11 5 S MD A T 0/ G PB4 93 D 21
2 S M C _ C P U _T H E R M S M D _ C P U _T H E R M 11 6 S MC LK 1/ G P C1 ( PD )I D 0 / GP H 0 94 HO L D_ S W # P M_ C L K R U N # 1 4 K B C _ R S T# C A
2 S M D _ C P U _T H E R M S MD A T 1/ G P C2 ( PD )I D 1 / GP H 1 T110 S B _ K B C R S T # 14
S M C _ MD MS I C 11 7 95 C T X1
T 1 09 S M D _ ME M S I C 11 8 S MC LK 2/ G PF6 ( PU ) ( PD )I D 2 / GP H 2 96 W D T_ E N T108
T 1 07 S MD A T 2/ G PF7 ( PU ) ( PD )I D 3 / GP H 3
97 W LA N _ D E T # 22 * S C S 7 5 1V -4 0
( PD )I D 4 / GP H 4 98 07/18/2007
PWM ( PD )I D 5 / GP H 5 B T_ D E T# 2 5 31 APKEY
L C D _B R I GH T N E S S 24 99 DD_ O N 29 25 B A T _V O L T B A T_ V O LT _ R
25 P W M0 / G P A 0( PU ) ( PD )I D 6 / GP H 6 R2 5 1 0 0_ 1 % _0 4 C 17 1 U _6 . 3 V _ 04
23 K B C _B E E P LE D _ S C R # 28 P W M1 / G P A 1( PU ) 10 7 3 G_ E N C H G _C U R _R
P W M2 / G P A 2( PU ) ( P D )I D 7 / GP G 1 T106 25 C H G_ C U R
D
LE D _ N U M # 29 Q 31 R2 4 1 0 0_ 1 % _0 4 C 18 * 1 u_ 6 . 3V _0 4
LE D _ C A P # 30 P W M3 / G P A 3( PU ) 2 N 7 0 02 W T OT A L_ C U R T O TA L _ C U R _ R
P W M4 / G P A 4( PU ) EXT GPIO
L OW ACTIVE 31 82 G R8 1 0 0_ 1 % _0 4 C 10 * 1 u_ 6 . 3V _0 4
2 6 LE D _B A T_ C H G# 32 P W M5 / G P A 5( PU ) ( P D )E G A D / G P E 1 83 S MI # 14
2 6 L E D _ B A T _F U L L# P W M6 / G P A 6( PU ) ( P D )E GC S # / G P E 2 S CI# 14
34 84 P W R _B T N # 1 4
S
26 L ED_ P W R# P W M7 / G P A 7( PU ) ( P D )E GC L K / G P E 3 W EB0 # R 13 6 1 0 K _ 04
V D D3
PS/2 WAKE UP 5 VS D9
8 0 CL K 85 35
P S 2 C L K 0 / GP F 0 ( PU ) ( P D )W U I 5 / G P E 5 R S M R S T # 14
D
3 IN1 86 17 K B C _R S T# Q8 A C H 8 _G A 2 0#
P S 2 D A T 0 / GP F 1 ( PU ) ( P D )L P C P D # / W U I 6 / G P E 6 14 G A 20 #
8 0 DET # 87 2N 7 00 2 W
88 P S 2 C L K 1 / GP F 2 ( PU ) G
14 PM E# P S 2 D A T 1 / GP F 3 ( PU ) PWM/COUNTER
26 T P _ CL K 89 47 C P U_ F A NS E N 1 1 S C S 75 1 V -4 0
90 P S 2 C L K 2 / GP F 4 ( PU ) ( P D )T A C H 0 / GP D 6 48 S Y S _F A N S E N J HKB 1 6-06-75140-061
S
26 T P _D A T A P S 2 D A T 2 / GP F 5 ( PU ) ( P D )T A C H 1 / GP D 7
C8 7 R7 1
12 0 L E D_ S C R# 1
WAKE UP ( P D )T MR I 0 / W U I 2 / GP C 4 V C OR E _ O N 2 8 2
T H E R M_ R S T # 12 5 12 4 0 . 1 u_ 1 6 V _0 4 1 0 0K _ 0 4 L E D _ N U M# V D D3 C3 8 6
T 1 02 P W R S W / GP E 4 ( P U ) ( P D )T MR I 1 / W U I 3 / GP C 6 S B _ P W R OK 1 4 , 25 , 2 7, 28 3 8M bi t KBC_SPI_*_R = 0.1"~0.5"
CIR R2 4 8 * 0_ 0 4 L E D_ CA P # 0. 1 u _1 0 V _ X7 R _0 4
18 11 9 W EB0 4
31 P W R _S W # R I 1 # / W U I 0 / GP D 0 ( P U ) ( P D )C R X / GP C 0 E MA I L _ LE D # 26 5
21 12 3 W EB1 # U 8
25 L ID_ S W # R I 2 # / W U I 1 / GP D 1 ( P U ) ( P D )C TX / G P B 2 T105 W EB2 # 6 8 5 K B C _ S P I _ S I _R K B C _S P I _S I
7 VD D SI
GP INTERRUPT LPC/WAKE UP R 1 72 4 7_ 0 4 C4 2 2 30 p _ 50 V _ 0 4
W EB2 # 33 19 8 2 K B C _ S P I _ S O_ R K B C _S P I _S O
GI N T/ G P D 5 ( P U ) ( P D )L 8 0H LA T / G P E 0 SW I# 14 31 M _B TN 9 SO
VI N R 17 0 1 K _ 1 %_ 0 4 R 1 65 1 5_ 0 4 C4 0 3 30 p _ 50 V _ 0 4
11 2 R7 2 1 00 K _ 0 4 10 K B C _ F LA S H 3 1 K B C_ S P I_ CE # _ R K B C _S P I _C E #
( P D )R I N G# / P W R F A I L# / L P C R S T# / G P B 7 C H G _E N 25 VDD 3 L ID_ S W # 11 W P# CE # R 1 64 1 5_ 0 4 C3 9 3 30 p _ 50 V _ 0 4
UART 25 LI D _ S W #
10 8 V DD 3 12 6 K B C_ S P I_ S CL K _ R K B C _S P I _S C L K
RX D/G P B 0 ( P U ) CLOCK 13 SC K
2 5, 2 6 BT _ EN 10 9 2 R 16 3 4 . 7 K _ 04 R 1 67 4 7_ 0 4 C4 0 0 30 p _ 50 V _ 0 4
AVSS
T XD / GP B 1 ( P U ) C K 3 2K E
V SS
25 BKL _ EN
VSS
VSS
VSS
VSS
VSS
VSS
12 8 85 2 01 -1 3 05 1 Z 2 20 3 7 4
C K 3 2K R 2 45 1 0 M_ 04 H OL D # VSS
I T 8 51 2 E / E X JHKB S S T2 5 V F 0 80 B
113
1 22
27
49
91
6-03-08512-0P1 X2 6-04-25080-A70
12
75
1
3 2 . 76 8 K H z
D02 6 -2 2 - 32 R 76 - 0 B1 1 13
C P U_ F A N_ R
11 CP U_ F A N
R 2 66 1 20 K _ 1 %_ 0 4 NC 6 S H OR T 1 4 J H8 DB G 1
1 2 2 3 W DT _ E N
2 1 V DD 3
C 5 08 0 . 1u _ 10 V _ X 7R _ 04 C4 9 6 C4 9 5
4 3
6 5
K B C _A GN D 1 5 p_ 5 0 V _0 4 1 5p _ 50 V _ 0 4 3 IN1 8 0 CL K
L C D _ B R I GH T N E S S 8 7 8 0 DE T #
2 5 B R I GH T N E S S 10 9
R 2 55 1 00 _ 1% _ 0 4 V IN 25 , 2 8, 29 , 3 0, 3 1
S P U F Z -1 0S 3 -V B -0 -B J_H8DBG1
C 5 07 *0 . 1 u_ 1 0 V _X 7 R _ 0 4 5 VS 11 , 1 9, 23 , 2 4, 2 5 , 2 6, 2 7 6-21-C2A00-210
V DD 3 2, 1 1 , 1 5, 2 5 , 26 , 2 7 , 29 , 3 1 2 1
10 9
3 . 3V S 2, 6 , 1 0 , 11 , 1 3, 14 , 1 5, 1 6 , 1 7, 1 8 , 1 9, 2 0 , 2 2, 2 3 , 2 4, 2 5 , 2 6, 2 7 , 2 8
B - 22 KBC-ITE IT8512E
Schematic Diagrams
Mini Card, New Card, TPM, FGPT
MINI CARD 3.3VS 20mils

3.3V 20mils
1.5VS 30mils
J M IN I1
P C IE _ W AK E # 1 2
4, 1 5 P C I E _ W A K E # 3 W AKE# 3 .3 V _ 0 4 MI N I -3 V S 3. 3V
R2 8 4 1 0 K_ 0 4 5 BT_ D ATA GN D 5 6
3 .3 V S B T _ C HC L K 1 .5 V _ 0 1 .5 V S
7 8 T 16 2 D0 2 6- 15 - 03 40 9- 7E0
1 7 M I N I _ C A R D _ C L K R E Q# 9 C L K R E Q# U I M_ P W R 10
G ND 0 U I M_ D A T A T 16 1
11 12 R 393 0_ 0 6
17 P C I E _C L K _ MI N I #
1 7 P CI E _ CL K _ M INI
13
R EFC L K-
R EFC L K+
U I M _C L K
U I M_ R E S E T
14
T 16 4
T 16 3
INTEL W/LA N ON
15 16 3. 3V S
G ND 1 U I M _V P P T 16 5 Other W/LA N Off
KE Y S D M I N I -3 V S
17 18
N C3 GN D 6
19 20 W L AN _ EN C 288 Q 10
N C4 W _ DI S AB L E # W L A N _ E N 21 , 2 6
21 22 P C I_ RS T # 1 9 ,2 0 ,2 7 * A O 3 40 9
23 G ND 2 PER SET# 24 R1 1 6 0 _0 4 C2 7 9
4 P C IE _ R X N1 _ W L A N P E T n0 3 .3 V A UX 3 .3 V
G
R2 4 3 0 _ 04 25 26 C 264
4 P C I E _ R X P 1 _W L A N P E T p0 GN D 7
R2 4 4 0 _ 04 27 28 10 U _ 1 0V _0 8 * 1u _ 6 . 3 V _ 0 4
29 G ND 3 1 .5 V _ 1 30 R1 1 5 * 0 _ 04 R 126 0 . 1 u _ 1 6V _0 4
G ND 4 N C ( S MB _C L K ) S _ C LK 9, 10 , 1 4 , 1 7 R1 2 5
31 32 R1 1 4 * 0 _ 04 * 2 0 K _ 1 %_ 0 4
4 P C I E _ T XN 1 _ W L A N P E Rn 0 N C (S MB _ D A T A ) S_ D AT 9, 10 , 1 4 , 1 7
4 P C I E _ T XP 1_ W LA N 33 34
35 P E Rp 0 GN D 8 36
21 W L A N _ DE T # G ND 1 1 N C (U S B _ D -) U SB_ PN 1 1 5
37 38 *1 0 0 K _ 0 4
N C6 N C (U S B _ D + ) U SB_ PP1 1 5
Sheet 22 of 37
D
3 . 3V 39 40
41 N C7 GN D 9 42 D02
43 N C8 N C (L E D _ W W A N # ) 44 W L AN _ PW R G Q 11
N C9 L E D _ W LA N # 21 W L AN _ PW R
T92 45 46 * 2 N7 0 0 2 W
N C1 0 N C (L E D _ W P A N # )
Mini Card, New Card,

47 48
T91 1 .5 V S
S
49 N C1 1 1 .5 V _ 2 50
T93 N C1 2 GN D 1 0 6 -1 5- 27 0 02 -7 B5
51 52
N C1 3 3 .3 V _ 1 MI N I -3 V S
Place close to
MINIPCIE 8 8 9 1 1 -5 20 4
TPM, FGPT
3 .3 V 3 .3 V 3. 3V
1 .5 V S
M I N I -3 V S
C4 9 0 C2 6 9 C4 9 1 C 48 9 C 266 C 267 C 26 8
0 . 1 u_ 1 6 V _ 0 4 1 0 U _ 1 0 V _ 08 0. 1u _ 1 6 V _ 0 4 1 U_ 6 .3 V _ 0 4 0 .1 u _ 1 6 V _ 0 4 0 . 1 u _ 1 6V _0 4 0 . 1 u _1 6 V _ 0 4
F
r
o
m
0
8
0
5
C
h
a
n
g
e
t
o
0
4
0
2
NEW CARD 3 .3 V C5 2 4
0 . 1 u_ 1 6 V _ 0 4
14 P C I E _P R S N T 0 A C N C_ C P P E #
D1 0 from SC S7 51 V- 40
U1 8
7 4 A H C 1 G0 8 G W 3 .3 V
D1 0 1 SS3 5 5 c ha nge to 1S S3 55
SO D- 32 3 f or cos t
FINGER PRINT
For 549SS.
5
1
2 1 ,2 7 L P C _ RS T #
4
dow n.
2
1. 5 V S 3 .3 V S 3 .3 V R2 6 5 R2 5 6
*1 0 0 K _ 04 *1 0 0 K _ 0 4
3
U 17 20mils J NE W 1
21 20 3 V A U X2 0 12
A U X IN A U XO U T +3 . 3 V A U X
6 8 3 V O UT 3 0 30mils 14 3 .3 VS
5 3 .3 V IN 3 .3 V O U T 7 15 +3 . 3 V JF P 1
3 .3 V IN 3 .3 V O U T +3 . 3 V
18 16 1 .5 VO UT 3 0 30mils 9
19 1 .5 V IN 1 .5 V O U T 17 10 +1 . 5 V 1
1 .5 V IN 1 .5 V O U T +1 . 5 V 15 US B _ P P7 2
2 9 N C_ P E RS T # 13 15 US B _ P N7 3
2 1 , 2 7 L P C _R S T # SY SR ST# P E RS T # PER ST# 4
R 2 89 1 0 K_ 0 4 3
3. 3 V S H D N#
4 15 N C_ C P P E # 17
1 7 , 20 , 2 1 , 2 6 , 2 7 , 3 0, 31 S U S B # ST B Y# C PPE # 14 NC _ CP US B # 4 CP P E # *8 5 2 0 1 -0 40 5 1
23 CP US B # P C IE _ W A K E# 11 CP U S B #
15 U S B _ O C2 # O C# W AKE#
22 C 33 5 C3 4 5 C3 2 5 16
R 2 90 1 0 K_ 0 4 R C LK E N 1 7 N E W _ C A R D _ C LK R E Q # R 2 86 1 0 K _ 04 CL K R E Q # C6 3 6 C 637 JFP1
3 . 3V 3 .3 V S
1 11 0 . 1 u _1 6 V _ 0 4 0 . 1 u_ 1 6 V _ 0 4 0. 1 u _ 1 6 V _ 0 4 19 1 4
N C GN D 1 7 P C I E _ C LK _ N E W RE F CL K+
10 25 18 0 . 1u _ 1 6 V _ 0 4 0 . 1 u _ 1 6 V _ 04
1 . 5V S 3 .3 V S 3 .3 V N C GN D 1 7 P C IE _ CL K _ N E W # RE F CL K-
12
13 N C 24
N C N C
22
14 P CI E _ RX P 0 _ NE W _ CA RD PETp 0
P 22 3 1 T H L F C 1 14 P C I E _ R X N 0_ N E W _ C A R D R 1 62 0_ 0 4 21
R 1 60 0_ 0 4 25 PETn 0
0 . 1 u _ 16 V _ 0 4
14 P C I E _ T X P 0 _N E W _ C A R D P E R p0
24
0 . 1 u_ 1 6 V _ 0 4
0. 1 u _ 1 6 V _ 0 4
C 51 20 . 0 1 u _1 6 V _ X 7 R _ 04
C 5 1 80 . 0 1u _ 1 6 V _ X 7 R _ 0 4
C 5 2 00. 01 u _ 1 6 V _ X 7 R _ 0 4
ENE P2231 pin3,4,15,22 14 P C IE _ T X N0 _ NE W _ CA R D P E R n0

5
has internally 3 RE S E R V ED 6
15 US B _ P P5 U S B _D + R E S E R V E D
pulled high (170Kohm) 2
15 US B _ P N 5 U S B _D -
1
GN D
20
GN D
9 , 1 0 , 14 , 1 7 S _D A T 8 23
7 S MB _D A T A GN D 26
C 51 1
C5 1 5
C5 2 1
9 , 1 0 , 14 , 1 7 S _C L K S MB _C L K GN D
1 30 8 0 1 -1
Place close to
2 , 6 , 1 0, 11 , 1 3 , 1 4 , 1 5 , 1 6, 1 7 , 1 8 , 1 9 , 2 0 , 21 , 2 3 , 2 4 , 2 5 , 2 6, 27 , 2 8 3 . 3 V S NEWCARD Eje ct or: 13 0851- C
3 ,6 ,2 7 1 .5 V S
2 , 1 2 , 1 4 , 1 5 , 16 , 2 5 , 2 6 , 2 7 , 2 9, 30 , 3 1 3 . 3 V
Mini Card, New Card, TPM, FGPT B - 23

Schematic Diagrams
AZALIA Codec ALC883
Ve ry Closed to Codec ALC883.

5VS_AUD
3VS_AUD 20 m ils L57
3.3VS 1 2
5VS
MIC1-VREFO-R MIC1-VREFO-L L52 2 0m ils HCB1005KF- 12
1T20
1 2 3VS_AUD C575 C545 C587
HCB1005KF-121T20 C593 L58
R31
7 R331 C59
0 C577 C559 C570 0
. 1u
_16V_04 0.1u_16V_04 10U_10V_08 + 1 2
1
00U_6.3V_B2 HCB1005KF-121T20
4.7K_1%_04 4.7K_1%_04 0.1u_16V_04 10U_10V_08 0.1u_16V_04 0.1u
_16V_04 L59
1 2
MIC1
-R MIC1-L HCB1005KF-121T20
R32
2 C607
C55
3 C558 AUDG C623 0.1u_
16V_
04
25
8
1U_6
.3V_04
4
7
1
9
3
U22
*3
30p_50V_06 *33
0p_50V_06 *1
0K_0
4 C561 0.1u_
16V_
04
AVDD1
AVDD2
DVSS1
DVSS2
DVDD1
DVDD2
2
24 EAPD_MODE 3 GPIO0 27 Z2419 C5
65 10U_10V_08 C544 0.1u_
16V_
04
AUDG AUDG GPIO1 VREF
C562 10p_50V_04 C540 0.1u_
16V_
04
R3
32 3
3_04 5 28 MIC1-VREFO-L
14,25 AZ_SDOUT SDATA-O UT M IC1-VREFO-L
R334 33_04 Z24
03 6 32 MIC1-VREFO-R C622 0.1u_
16V_
04
14,25 AZ_BITCLK R333 33_04 Z24
04 8 BI T
- CLK MI C1-VREFO-R
Z2404 Max: 0.5inch 14 AZ_SDIN0 SDATA-IN
R3
39 3
3_04 10 29
14,25 AZ_SYNC
11 SYNC DIGITAL LINE1-VREFO-L 37 Z2421
14,25 AZ_RST# RESET# LINE1-VREFO-R
AUDG
47 30 MIC2-VREF
SPDIFI/EAPD MIC2-VREFO 31
C604 SPDIFO 48 LINE2-VREFO
1U_6.3V_04 SPDIFO 35 FRONT-L
FRONT-OUT-L FRONT-L 24
KBCBEEP R35
1 10
K_04 BEEP C576 1U_6.3V_04 Z24
07 12 36 FRONT-R
21 KBC_BEEP PCBEEP FRONT-OUT-R FRONT-R 24
Sheet 23 of 37 C608
1U_6.3V_04
AUDG
R34
8
C59
1
1K_04
100p_5
0V_0
4 JD_SENSE1 13
Sense A( JD1)
SURR-OUT-L
SURR-OUT-R
39
41
HP_L
HP_R
R401
R402
0_04
0_04
L_HP_OUT_A 24
R_HP_OUT_A 24
AZALIA Codec
R405 *39.2K_1%_04 SENSE_B 34 43 Z2426
14 SPKROUT Sense B( JD2) CEN-OUT
44 Z2427
LFE-OUT
24 JD_SENSE1_H L_HP_OUT_A R403 04 L
*0_ I NE2
-L 14
R_HP_OUT_A R404 *0_
04 L
I NE2
-R 15 LINE2-L 45 Z2428
ANALO G
ALC883 PC BEEP LINE2-R SIDESURR-OUT-L 46 Z2429
SIDESURR-OUT-R
C596 4.7U_6
. 3V_06 MIC2-LL1 16
MIC2-RR1 MIC2
-L
MIC2 C609 4.7U_6
. 3V_06 17 33 Z2430 R313 10K_04
MIC2
-R DCVOL 5VS_AUD
10/02/2006
C597 *0.1u_16V_04 C_CD_L 18 40 Z2431 R310 20K_1%_04 5VS_AUD
CD- L JDREF AUDG
C610 *0.1u_16V_04 C_CD_G 19
CD- GND
C598 *0.1u_16V_04 C_CD_R 20 23 Z2432 C6
01 4.7U_
6. 3
V_06LINE-L
CD- R LINE1-L
24 Z2433 C6
02 4.7U_ V_06LINE-R
6. 3
AVSS1
AVSS2
LINE1-R
R406 75_04 MIC1-LL C599 4.7U_6.3V_0
6 MIC1-LL1 21
2
4 MIC1-L R407 75_04 MIC1-RR C600 4.7U_6.3V_0
6 MIC1-RR1 22 MIC1
-L C571 C546
2
4 MIC1-R MIC1
-R
AUDG R368 R367
ALC883 0.01u_16V_X7R_
04
26
A
L
C
6
6
2
A
L
C
8
8
3
2
10
0K_0
4 1
00K_
04 0.1u_16V_04
C
6
0
1
,
C
6
0
2
N
o
t
m
o
u
n
t
e
d
.
C
6
0
1
,
C
6
0
2
m
o
u
n
t
e
d
R
3
1
3
N
o
t
m
o
u
n
t
e
d
R
3
1
3
m
o
u
n
t
e
d
.
AUDG AUDG AUDG
R
4
0
3
,
R
4
0
4
m
o
u
n
t
e
d
R
4
0
3
,
R
4
0
4
N
o
t
m
o
u
n
t
e
d
.
AUDG
R
4
0
1
,
R
4
0
2
N
o
t
m
o
u
n
t
e
d
.
R
4
0
1
,
R
4
0
2
m
o
u
n
t
e
d
.
JD_SENSE1 R355 10K_1%_04 JD_SENSE1_L
R
4
0
5
m
o
u
n
t
e
d
.
R
4
0
5
N
o
t
m
o
u
n
t
e
d
.
R352 20K_1%_04
JD_SENSE1_M24
R358 39.2K_1%_04 JD_SENSE1_H 24
JINTMIC_15
2 1
JS PDIF MI C2-VREF R187 2.2K_
1%_04
3 JLI NEIN
JINTMIC_1
1 5 MIC2
1 NC1
4 5 4
3 1 C442
2 NC2
2 1
00p_06 88
266-02001
2 6
TOP VIEW
Layout Note: SOLDER SIDE VIEW
U28 pin 1 ~ pin 11 and pin 47 and pin 48
are Digital signals. S PD IF O U T
The others are Analog signals. (SU RR _B AC K) 3 JSPDIF1
6-20-B2840-006
5 JD_SENSE1_
L JLINEIN1
5
4 4
Layout Note: SPDIFO L18 1 2 FCM1005KF-102T02 Z2435 2 LINE- R L2
01 2 FCM1005KF-121T03 3
(1)MIC1-L (U28.21) (2)MIC1-R (U28.22) 1 6
C168 2SJ-S870-010 LINE- L L2
21 2 FCM1005KF-121T03 Z243
7 2
(3)LINE-L (U28.23) (4)LINE-R (U28.24) 1
SP DIF OUT
04
p_50V_04
(5)CD_L (U28.18) (6)CD_G (U28.19) 1000p_5
0V_0
4 2SJ- S351-S30
(S UR R_BA CK)
50V_
(7)CD_R (U28.20) LIN E IN
(SU RR )
680p_
? ? ? ? ? ? AUDG, ? ? ? ? ? ? ?
BLACK
680
5VS & VIN plane.
59
C233
C2
2,6,10,11,13,14,15,16,17,18
, 19
,20, 2
1,22,24,25,26,27,28 3.3VS
11,19,21, 24
,25, 2
6,27 5VS
B - 24 AZALIA Codec ALC883

Schematic Diagrams
Audio AMP2056A
R_ IN _ HP C5 6 8 * 6 8p _ 5 0 V _ 0 4 R _ H P _ OU T _ C
L _ IN_ H P C5 6 7 * 6 8p _ 5 0 V _ 0 4 L _H P _ O U T _ C
3 .3 V S 5 VS 5 V S _A MP
40 m ils
C 563 0 . 1 u_ 1 0 V _ X 7 R _ 0 4
5 VS 5V S _ A M P
R 335 C 605 R 35 3 L51 1 2 H C B 1 0 0 5 K F -1 2 1 T 20

C A C 581 C6 2 5 C 592
1 4 S B _ M UT E # 0 . 1 u _ 10 V _ X 7 R _0 4
D 22 S CS3 5 5 V C 59 4 C 578 C 58 2 C6 1 6 C5 8 0 C 589
5
10 0 K _ 0 4 1 U _ 6 . 3V _ 04 0. 1 u _ 1 6 V _ 0 4 0 . 1 u _ 1 6V _0 4
C A O P M U T E A P M# 1 1 0 0 K _ 04 0 . 1 u _ 10 V _ X 7 R _0 4 1 0 U _1 0 V _ 0 8 1 0 U_ 1 0 V _ 0 8 0 . 1 u_ 1 6 V _ 0 4 0. 1 u _ 1 6 V _ 0 4 0 . 1 u _ 1 6V _0 4
2 3 E A P D _ M OD E
D 23 * S C S 3 55 V 4 MU T E A P M #
2 1 V O L _M U TE # 2
U 23 C 6 24 0 . 1 u _ 1 6V _0 4
7 4 A H C 1 G0 8 G W
28
26
20
10
1
U2 8 Tra ce Wid th :Sp ac e= 15 :1 2 T rac e W idt h :Spa ce =1 5 :12
R 378 0_04 C6 2 1 1U _ 6 . 3 V _ 0 4 R3 7 7 8 .2 K_ 0 4 R _ IN_ A M P 3
23 F R ON T -R R _ I N _A MP
VD D
BE EP
SD #
PVD D
PV DD
22 R_ O UT + _ C L56 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 S P K OU T R +
L _ I N _A MP R_ O UT + S P K O U TR + 2 5
23 F R ON T -L R 365 0_04 C6 1 5 1U _ 6 . 3 V _ 0 4 R3 6 4 8 .2 K_ 0 4 5
L _ I N _ A MP 21 R _ O U T -_ C L53 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 S P K OU T R -
R _ OU T - S P K O U TR - 2 5
C6 1 9 1U _ 6 . 3 V _ 0 4 R3 6 9 3 9 K_ 0 4 R_ IN _ HP 4
2 3 R _ H P _O U T_ A R _ I N _H P L_ O U T + _ C S P K OU T L+
8 L55 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 S P K O U TL + 2 5
C6 0 6 1U _ 6 . 3 V _ 0 4 R3 5 6 3 9 K_ 0 4 L _ IN_ H P 6 L _ O UT +
2 3 L _ H P _ OU T _ A L _ IN _ HP
9 L_ O U T -_ C L54 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 S P K OU T L-
L _ OU T - S P K O U TL - 25
*1 0 K _ 0 4
* 1 0K _ 04
*1 0 K _ 0 4
* 10 K _ 0 4
Sheet 24 of 37
R3 7 4 R 37 5
A M P _ E N# 27
APA 205 6A
5V S A MP _ E N # R _ H P _ OU T _C
17 L50 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 H E A D P H O N E -R
1 0 0K _ 04 1 0 K_ 0 4 24 R _H P _ O U T
Audio AMP2056A
R3 7 2 R3 7 3 H P_ EN 18 L_ H P _ OU T _ C L49 2 1 F C M1 0 0 5 K F -1 2 1 T0 3 H E A D P H O N E -L
L _H P _ O U T
C near CP+ and CP- 1 2
D
10 K _ 0 4 10 0 K _ 0 4
C5 6 9 C P+ 11 R 33 6 0_06
CP V DD 5V S _ A MP
R 370
G
R 35 7
R3 6 6
R 37 9
Q2 7 1 U_ 1 0 V _ 0 6 14 19 C 579 C 574
C P- HP V DD
C
D T C1 1 4 E UA Q 28
S
H P _P LU G B 2 N 7 00 2 W 15 1 U _ 6. 3 V _ 0 4 0 . 1 u _ 1 6V _ 04
B YPASS
C P GN D
16 C PVS S
P GN D
PG ND
H PVS S
GN D
G ND
C5 6 6
E
13
23
25
1U _ 1 0V _0 6 A P A 2 0 5 6A R3 4 3 0_04
29
7
3 .3 V S
5 VS C 62 6
C 58 8
0 . 1 u _ 1 0V _X 7 R _ 04
C 595 C 6 17 0 . 1 u _1 6 V _ 0 4 Delete AUDG2 &
0 . 1 u _ 1 6V _0 4
Change into GND.
5
1 U _ 1 0V _0 6 Delete L59, L60, C735,

1
4 R 37 1 *1 0 K _ 0 4 A MP _ E N # C736, C737.
M U T E A P M# 2
U3 0 C 6 18
*7 4 A H C 1 G 08 G W
3
1 U _6 . 3 V _ 0 4
5V TO AUDIO BOARD JAUDIO
30mils USB CONN. 15 1
C3 7 9 U 7
16 2
4 3 J A U D I O1
1 U_ 6 .3 V _ 0 4 VIN V IN
23 J D _ S E N S E 1 _ M 1 2
2 VC C USB 3 H P_ PL U G
G ND 3 4
V C CU S B 3 H E A D P H ON E -R R1 3 8 1 0 0 _1 % _ 0 4
5 1 H E A D P H ON E -L R1 3 9 1 0 0 _1 % _ 0 4 5 6
VO U T V OU T 7 8
23 J D _ S E N S E 1 _ H 9 10
C3 3 7 C3 4 7 R T 9 70 1 -C P L C 346 C 336
23 MI C 1 -R 11 12 US B _ P P 6 1 5
23 MI C 1 -L 13 14 US B _ P N6 1 5
*0 . 1 u _ X 7R _ 0 4 *1 0 u _ 1 0V _0 8 1 0 U _ 10 V _ 0 8 0 . 1 u _ 1 6V _0 4
15 16 V C C US B 3
C3 1 3 C 316 C 3 18 8 7 2 1 6- 16 0 6 C 330 R1 4 5 10 K _ 0 4
U S B _ OC 3 # 15
R1 4 6 15 K _ 0 4
47 0 p _ 5 0V _0 4 * 4 70 p _ X 7 R _ 0 4 4 7 0 p_ 5 0 V _ 0 4 0 . 1 u _ 1 6V _ 04
C 3 15
C 314
4 7 0 p _5 0 V _ 0 4 C3 1 7
4 7 0 p _ 50 V _ 0 4
4 70 p _ 5 0 V _ 0 4
2 , 6, 10 , 1 1 , 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 1 8 , 1 9 , 20 , 2 1 , 2 2 , 2 3 , 2 5, 26 , 2 7 , 2 8 3 . 3 V S
1 9 , 2 5 , 2 6 , 2 8, 29 , 3 0 , 3 1 5 V
1 1 , 1 9 , 2 1 , 2 3, 25 , 2 6 , 2 7 5 V S
Audio AMP2056A B - 25
Schematic Diagrams
MDC, BT, PWRGD, DDB CON
3 .3 V
R1 6 8 0 _0 4
INVERTER CONNECTOR ALAZIA MDC C 409 C 408 C 407
0 .1 u _ 1 6 V _ 0 4 1 U _ 6. 3 V _ 0 4 *1 0 u _ 10 V _ 0 8
3 .3 V 3 .3 V
3. 3V J M DC 1
1 2
U9 D R2 9 5 3 3 _ 04 3 G ND RE S E RV E D 4
1 4, 23 A Z _ S D O U T A za l ai _ S D O RE S E RV E D
14
74 L V C 0 8 P W U 9A C4 3 5 5 6
14
G ND 3 . 3 V Ma i n / a u x 3 .3 V
14 SB_ BL O N 12 7 4 L VC0 8 P W 1 4 ,2 3 A Z _ S Y NC 7 8
11 1 0. 1u _ 1 6 V _ 0 4 R2 9 4 3 3 _ 04 9 A za l ai _ S Y N C GN D 10
3 .3 V 14 A Z _ S D IN 1 A za l ai _ S D I GN D
13 3 R2 9 3 3 3 _ 04 11 12 R1 6 9 33_04
21 B K L _E N 1 4 ,2 3 A Z _R S T # A za l ai _ R S T # A z al i a _ B C L K A Z _ B IT CL K 14 , 2 3
2
8 8 0 1 8 -1 20 G C 410
U 9C
14
3 .3 V R 180 7 4 L V C 08 P W * 1 0 p_ N P O _0 4
7
9 Z2606 Max: 0.5inch
1 0 0 K_ 0 4 8 IN V _ B L O N
10
R1 8 5 3 0 7 _ B L ON _ 3 V
D
10 0 K _ 0 4 R 17 9 1 M _ 04 3 .3 V
7
Q 12 R 17 5
G
14
2 N7 0 0 2 W
Q1 3 1 M_ 0 4
C
D T C1 1 4 E UA 4
21 L ID _ S W #
S
B 6
18 3 0 7 _B L ON
1 4 ,2 1 ,2 7 ,2 8 S B _ PW R O K 5
USB BLUETOOTH
V C C_ B T
Sheet 25 of 37
U 9B
7
7 4 L VC0 8 P W 20 m ils
3. 3V
C4 7 0
MDC, BT, PWRGD, CCD J B T1
1
0. 1u _ 1 6 V _ 0 4
L 45 1
2
DDB CON
Q2
H C B 1 0 05 K F -1 2 1T 2 0 15 U SB_ PN 4 3
A O 3 4 09 L2 20m ils 15 U SB_ PP4 JBT
R5 0_ 0 6 S D 1 2 4
5V V CC _ CC D 21 B T _ DE T # 5
H C B 1 6 08 K F -1 21 T 2 5 9
6
C4 4 3 20 mils
2
C7 1 U_ 6 .3 V _ 0 4 R 7 V CC _ B T R 23 3 1 0 K_ 0 4 7
8
C 9 C 8
G
9
D
10 U _ 10 V _0 8 1 0 0 K_ 0 4 C 47 5 C4 7 4 C 471
0 . 1 u _ 1 6V _0 4 1 0 U _1 0 V _ 0 8 Q 9 8 72 1 2 -0 9 G0 1
R 197 R 194 1 U_ 6 .3 V _ 0 4 0 . 1u _ 1 6 V _ 0 4 0 . 1 u _ 1 6 V _ 04 G 2 N7 0 0 2 W
2 1 ,2 6 BT_ EN
3 3 0 K_ 0 4 1 5 0 K_ 0 4
S
FROM H8 def HI
D
FROM H8 def HI
Q 16
G 2 N 7 0 02 W
21 CC D_ E N
S
TO MULTI-FUNCTION BOARD 2
JDDB
60
3 .3 V S
D0 2 3 .3 V S
J DD B 1 1 59 Q7
G
S X U S -6 0-V B -1 -P B S S 1 3 8 _ NL R 26 2 . 2 K _ 1% _ 0 4 3 . 3 V S
R 3 94
V IN 60 59 V IN 3 .3 VS
C RT _ D DC A DA T A D S
58 57 DA C _ DD CA DA T 6
C 16 C 44 6 PC 1 P C4 5 390_04
56 55
5
1
0 . 1 u _ 5 0V _0 6 0 . 1 u _5 0 V _ 0 6 54 53 0 . 0 1 u _ 50 V _ 0 4 0 . 0 1 u _ 5 0V _0 4 F C M1 0 0 5 K F -1 2 1 T 03 R2 7 4 .7 K _ 0 4 D 5 S C S 7 5 1 V -4 0
52 51
C RT _ V S Y N C L60 1 2 CR T _ V S 4 2 D A C _ V S Y NC 6 C A 5 VS
50 49
48 47 C 63 8 R2 8 4 .7 K _ 0 4
46 45 15m ils
3 .3 V S U2
20mil 44 43 S N 74 A H C 1 G1 2 5 D C K R C RT _ D DC A CL K D S
VA DA C _ DD CA CL K 6
3
42 41 2 2 p _5 0 V _ 0 4
40 39 S MC _ B A T 2 1
C4 4 5 0 . 1 u _5 0 V _ 0 6 S MD _ B A T 2 1 Q6 R 21 2 . 2 K _ 1% _ 0 4 3 . 3 V S
38 37 3 .3 V S B S S 1 3 8_ N L
36 35 C H G_ E N 2 1
I N V _ B L ON D0 2
G
34 33 C H G_ C U R 2 1 3 .3 V S
2 1 B R IG HT N E S S 32 31 B A T _V OL T 2 1
30 29 B A T 0_ T E M P 2 1
R 3 95
28 27 3. 3V S
T V _ D A C A _O U T
26 25 T V _ D A C B _O U T T128 390_04
24 23 T127
5
1
T V _ D A C C _ OU T
15 U S B _P N 3 22 21 T126
F C M 1 00 5 K F - 12 1 T 0 3
15 U SB_ PP3 20 19 C RT _ H S Y N C F C M 1 00 5 K F - 12 1 T 0 3 C RT _ H S Y N C L 6 1 1 2 C RT _ HS 4 2 2 , 1 1 , 1 5, 21 , 2 6 , 2 7 , 2 9 , 3 1 V D D 3
V C C _C C D 18 17 D A C _ HS Y N C 6
C RT _ V S Y N C F C M 1 00 5 K F - 12 1 T 0 3
16 15 31 VA
D A C _R L 62 1 2 C 63 9
2 1 T O TA L_ C U R 14 13 D A C _G L 63 1 2 DA C _ RE D 6 U 1 2 , 6 , 1 0 , 1 1 , 1 3, 1 4 , 1 5 , 1 6 , 1 7 , 18 , 1 9 , 2 0 , 2 1 , 2 2, 23 , 2 4 , 2 6 , 2 7 , 2 8 3. 3 V S
V DD 3 12 11 D A C _ GR E E N 6 21 , 2 8 , 2 9 , 3 0 , 3 1 V IN
D A C _B L 64 1 2 S N 7 4 A H C 1 G1 2 5 D C K R
3
10 9 DA C _ B L UE 6 2 , 12 , 1 4 , 1 5 , 1 6 , 2 2, 26 , 2 7 , 2 9 , 3 0 , 3 1 3. 3 V
C RT _ D DC AD A T A F C M 1 00 5 K F - 12 1 T 0 3 2 2 p _5 0 V _ 0 4
24 S PKO UT L + 8 7 C R T _ D D C A C LK 1 1 , 1 9, 21 , 2 3 , 2 4 , 2 6 , 2 7 5V S
24 S PKO UT L - 6 5 1 9 , 2 4, 26 , 2 8 , 2 9 , 3 0 , 3 1 5V
24 S PKO UT R - 4 3 FOR EMI PLACE IN LAN PORT
C 640 C6 4 1
24 S PKO UT R + 2 1 A C_ IN # 21 22 p _ 5 0 V _ 0 4 2 2p _ 5 0 V _ 0 4 V IN V IN V IN 5V S 5 VS 5 VS
T rac e Wid th :Spa c e= 15 :1 2
*0 . 1 u _ 1 6V _0 4 C 15 *0 . 1 u _ 1 6V _0 4 C6 4 2 PC 1 9 P C3 6 PC 2 P C1 1 3 P C1 6 2 P C 16 3
C 13 2 2 p _5 0 V _ 0 4
0. 01 u _ 5 0 V _ 04 0 . 01 u _ 5 0 V _ 0 4 0 . 0 1 u _ 5 0V _0 4 0 . 0 1 u _ 1 6V _X 7 R _ 04
*0 . 1 u _ 1 6V _0 4 C 14 *0 . 1 u _ 1 6V _0 4 0. 01 u _ 1 6 V _ X 7R _ 0 4 0 . 0 1u _ 1 6 V _ X 7 R _ 0 4
C 12
B - 26 MDC, BT, PWRGD, DDB CON

Schematic Diagrams
TouchPad, LED
SW1
1 2
TOUCH PAD 3 4 TPBUTTON_L
5
6
TC031-AA1G- A160T
JTP_1 VENDO R PART NUMBE R
Z2301
1 TPBUTTON_R Synaptics SW2
2 TPBUTTON_L
3 Z2302 E-LAN 800409-5102 1 2
JTP_14 4 3 4 TPBUTTON_R
1 12 5
6
7
5
6
8 TP_CLK C149 22p_5 0V_06
9 TP_DATA C157 22p_5 0V_06 TC031-AA1G- A160T
10
11 5VTP R90 *0_04
12 C159 0. 1u_16V_04 5V
87151- 1207G R89 0_06
5VS 5VTP
R95 R96
10K_04 10K_04
3. 3V
TP_CLK TP_CLK 21
3. 3V
3.3V TP_DATA TP_DATA 21
R354
3.3V
R382
C603
0. 1u_16V_04
4. 7K_04
R350 *0_04 R311 0_0 4
SUSC#
SB_SUSC# 14
21
Sheet 26 of 37
100K_04
TouchPad, LED
D
5
R381 1 R349
For NB contr ol an d Lev el sh ift 4 G
D
100K_04 2 Q24 1M_04
2N7002W
S
G U29
Q26 74AHC1G08GW
3
C
2N7002W 3. 3V
S
5 NB_S3AUXSW# B
Q25
DTC114EUA R387
E
4. 7K_04 SUSB# 17,20,21,22,27, 30,31

R386 *0_04 R380 0 _04
SB_SUSB# 14
D
R383
100K_04
14 PSON# G C627
Q29
If need PSON# than used C628 2N7002W *.1U_16V_04
S
100K and 0.1U
0. 1u_16V_04
3.3VS 3.3VS
3.3VS
R193 R191 LED
220_04 220_04
R189 Z2309 Z2310

E-M AIL L ED 3. 3VS VDD3 VDD3
1
220_04 VDD3 VDD3

D19
SG
Y
Z2308 KPB-3025YSGC R188 R392 R388

WL AN/BT LED R192 R190
A
220_04 220_04 220_04

2
D17 220_04 220_04
KP-2012SGC BT1 Z2305 D20,D17,D16 Z2306 Z2307

Z2311 Z2312
A
3
1
3
D18 1 3 D15
C
SG
Q15 WLAN1 D16
Y
AC
SG
KP-2012SGC 2 4 KPB-3025YSGC
Y
H DD/CD -ROM B ATTE RY LED
21,25 BT_EN G 2N7002W L ED L ED KPB-3025YSGC
4
C
S
4
21 EMAIL_LED#
21 LED_ACIN#
D
Q14 21 LED_BAT_CHG# 21 LED_PWR#

21,22 WLAN_EN G 2N7002W 19 HD_LED# 21 LED_BAT_FULL#
S
2, 12,14,15,16,22, 25,27,29,30,31 3.3V

2,6,10,11,13, 14,15,16,17, 18,19,20,21,22, 23,24,25,27,28 3.3VS
11,19, 21,23,24,25,27 5VS
2,11,15, 21,25,27,29,31 VDD3
19,24, 25,28,29,30,31 5V
TouchPad, LED B - 27
Schematic Diagrams
System Power
1.2VS,1.5VS,1.8VS,3.3VS,5VS
P Q3
P Q4 1 P Q4 3 S Y S 15 V 1 .2 V A O4 4 6 8 1 .2 V S
S Y S 15 V V DD 5 A O4 4 6 8 5 VS SYS1 5 V V DD 3 A O4 4 6 8 3. 3V S 8
8 8 3A 7 3 3A
4A 7
6
3
2
4A 3A 7
6
3
2
3A PR1 9
6
5
2
1
P R8 9 5 1 P R1 0 1 5 1 PC 1 2 P C1 1 PR 2 0
PC 1 1 9 P C1 2 0 PR 9 1 P C 1 28 PC1 2 7 P R 1 00 1M _ 0 4
1M _ 0 4 1 M _ 04 PR 1 2 6 0 . 1 u _ 16 V _ 0 4 1 0U _ 1 0V _0 8 1 M _0 4
4
0 . 1 u _ 16 V _ 0 4 10 U _ 10 V _ 0 8 1 M _0 4 0 . 1 u _1 6 V _ 0 4 10 U _ 10 V _ 0 8 1 M_ 0 4
4
1 K_ 0 6 Z 2 7 04
Z 2 7 01 Z 2 70 2
D
D
D
P Q2 PC 1 0
P Q3 6 PC 1 1 4 P Q4 8 P C 1 29 S USB G 2N 7 0 02 W
S US B G 2N 7 0 02 W SU SB G 2 N 7 00 2 W 0 . 0 1 u _1 6 V _ X 7 R _ 0 4
2 2 0 0p _ 5 0 V _ 0 4 0 . 0 1 u_ 1 6 V _ X 7 R _ 0 4
S
D
PQ 5 1
G 2 N 70 0 2 W
10 SU SB
S
V DD 5
Sheet 27 of 37 P R8 5
SYS1 5 V 1 . 5V
8
P Q4 2
A O4 4 6 8 1. 5V S S Y S 15 V 1 .8 V
8
P Q3 3
A O4 4 6 8 1 .8 V S
1.5A 7 3 1.5A 4A 7 3 4A
System Power 10 0 K _ 0 4
SU SB
P R9 6
6
5
2
1
P C 1 24 PC1 2 3 PR 9 9
PR8 7
6
5
2
1
PC 1 1 7 P C1 1 8 PR 9 2
1 M _ 04 1M _ 0 4
D
0 . 1 u _1 6 V _ 0 4 10 U _ 10 V _ 0 8 1 M_ 0 4 0 . 1 u _ 16 V _ 0 4 1 0U _ 1 0V _0 8 1 M _0 4
4
P Q3 2
G 2N 7 0 02 W Z 2 70 3 Z 2 7 05
1 7 , 2 0, 2 1 , 2 2 , 2 6 , 3 0, 3 1 S U S B #
D
S
P R 84 P Q4 0 P C 1 22 P Q3 4 PC 1 1 6
SU SB G 2 N 7 00 2 W S USB G 2N 7 0 02 W
1 M_ 0 4 0 . 0 1 u_ 1 6 V _ X 7 R _ 0 4 0 . 0 1 u _1 6 V _ X 7 R _ 0 4
S
POWER GOOD & RESET
3 .3 V 3 .3 V
VCORE Power Good delay
3ms and Notice SB U1 9 A
All Power Good and
14
7 4L V C 0 8 P W U 19 B
14
1 7 4 L VC0 8 P W Notice SB
31 1 . 8 V _ P W R GD
3 Z2706 4
2 6
30 1 . 5 V _ P W R GD S B _ P W R OK 14 , 2 1 , 2 5 , 2 8
5
R2 9 8
7
1M _ 0 4
3 .3 V
U1 9 C
14
7 4L V C 0 8 P W
9
6 , 2 8 D E L A Y _ P W R GD
8 Z2707
10
3 0 1. 05 V S _P W R G D
Close to SIS968
7
1 .2 V 7 ,3 0
1 .2 VS 4 ,7
1 .5 V 30
1 .5 VS 3 ,6 ,2 2
3 .3 V 1 .8 V 5 , 7 , 9 , 1 0 , 1 4, 15 , 1 6 , 2 0 , 3 0, 3 1
1 .8 VS 4 , 5 , 6 , 7 , 1 3 , 1 4, 1 5 , 1 6 , 1 7 , 18
C5 2 9 0 . 1 u_ 1 6 V _ 0 4 3 .3 V 2 , 1 2 , 1 4 , 15 , 1 6 , 2 2 , 2 5 , 26 , 2 9 , 3 0 , 3 1
3 .3 VS 2 , 6 , 1 0 , 1 1, 13 , 1 4 , 1 5 , 1 6, 17 , 1 8 , 1 9 , 2 0, 2 1 , 2 2 , 2 3 , 2 4, 2 5 , 2 6 , 2 8
U1 9 D
14
7 4L V C 0 8 P W 5 VS 1 1 , 1 9 , 2 1, 2 3 , 2 4 , 2 5 , 2 6
S Y S 1 5V 1 1 ,2 9
12
VD D3 2 , 1 1 , 1 5 , 21 , 2 5 , 2 6 , 2 9 , 31
13 S B _ P C I R S T# 11 Z 2 7 0 8 R2 9 9 33_04 P C I _ R S T # 1 9 , 2 0 , 22 VD D5 29
13
R2 9 7 33_04
L P C _R S T # 2 1 , 22
R3 0 0 R2 9 6 33_04
7
NB _ RS T # 6 ,1 8
1 M_ 0 4
B - 28 System Power
Schematic Diagrams
VCORE
V IN
5V
PC 3 PC 4 8 PC 1 6 4 P C4 6 P C 47
+ +
0 . 0 1 u _ 50 V _ 0 4 * 2 2u _ 2 5 V _ 8 *1 1 _ E C 6 8 0 u _ 2 5V _1 0 * 16 _ E C * 4 .7 U_ 2 5 V _ X5 R_ 0 8 *4 . 7 U _2 5 V _ X 5 R _ 0 8
PC6 4 PR4
A
P Q6 PQ 7
5
6
7
8
5
6
7
8
3 .3 V S 1 U _ 10 V _ 0 6 PD 1 10 _ 0 6
I R F 74 1 3 Z P B F IR F 7 4 1 3 Z P B F
F M 0 54 0 -N V C CA PR 1 * s ho rt _ 0 4 4 4
2
3
1
2
3
1
PR 6 B ST D RN _ A PC6 3
PR 3 0 _0 6
25A
6 8 0_ 0 6 1U _ 6 . 3 V _ 0 4 V C OR E -G A T E 1 V CO RE
PC 6 2
PL 1 0 . 6 u H 1 3 * 13 * 4
C LK E N # 1 U_ 1 0 V _ 0 6 G ND _ S IG NA L
17 CL K E N#
TG
DR N
D RN PR 2
PC 5 9
PC 5 8
P C5 7
P C7 3
P C5 5
PR 5 2 * 1 0K _ 04 Z2801 B G P Q 10 P Q8 PQ 1 1
5
6
7
8
5
6
7
8
5
6
7
8
3 .3 VS
C
1 0 _ 08
4 A O 4 4 56 4 A O 44 5 6 4 A O4 4 5 6 PD 6 + + + + +
P R5 3 D E LA Y _ P W R G D 6, 27
F M5 8 2 2
4 7 0 U_ 2 .5 V _ D 3
4 7 0 U_ 2 .5 V _ D 3
4 7 0 U_ 2 .5 V _ D 3
4 7 0 U _2 . 5 V _ D 3
* 4 7 0 u_ 2 . 5 V _ D 3
32
31
30
29
28
27
25
Sheet 28 of 37
V C -E M I
26
2
3
1
2
3
1
2
3
1
*s h o rt _ 04 PR 5 5 1 K_ 0 4
3 .3 V S
B G
A
B ST
TG
DR N
P W R GD
V RT T #
V5
CL K E N#
P C 70 1 0 0 0 p _5 0 V _ 0 4 PC 7
CS 1 N
3
3
3
H
H
H
_ VID6
_ VID5
_ VID4
1
2
3
V ID 6
V ID 5
V ID 4
PU4
EN
R AM P
D PR SL
24
23
22
E N _ V CO RE
R A MP
DP RS L
P R 58 1 0 K_ 0 4 1 0 0 0 p _ 50 V _ 0 4
VCORE
4 21 P R 54 0_06
3 H _ VID3 5 V ID 3 T T R IP 20 GN D _ S I GN A L
3 H _ VID2 V ID 2 C S+
3 H _ VID1
6
7
V ID 1 SC454 C S-
19
18 PR 9 0_04
V CC A
3 H _ VID0 DP RS L _ S T P V ID 0 FB+ P M _ DP R S L P V R 6
1
2 ,6 H _ DP R S T P # 8 17
E R RO U T
PR 4 7 * 0 _ 04 D PR STP# F B- P RT 1
C L SET
V CC A
PR 8 * 1 K_ 0 4 GN D _S I GN A L
A G ND
VR EF
10 0 K _ 5 % _ 0 6 N T C
G ND
DA C
HY S
PR 4 8 S S
T T RI P
2
* 0 _0 4 V CO RE V C OR E VI N V IN V IN
33
10
11
12
13
14
16
CS +
15
9
CS - P R5 7 P C7 1
G ND _ S IG NA L V CC A P R5 6 1 0 _ 1 %_ 0 4 V C CS E NS E 1 0 K_ 1 % _ 0 4 10 p _ 5 0 V _ 0 4
V C CSE NS E 3
HY S
P R7 1 0 _ 1 %_ 0 4 V S SS E NS E
V S S S E NS E 3
C L SET V C_ S S 96 / 0 6 / 0 8 P o w e r A D D ? ? P U 1 P C5 0 PC 4 9 PC 6 P C4 PC 5
PC 7 7
V RE F V C D AC G N D_ S IG N A L 0. 1u _ 1 6 V _ 0 4 0 . 0 1 u _ 50 V _ 0 4 0 . 0 1u _ 5 0 V _ 0 4 0 . 0 1 u _ 5 0V _0 4 0 . 0 1 u_ 5 0 V _ 0 4
PC 8
E R R OU T
*1 0 0 P F _ 5 0 V _ 0 4
*1 0 0 p _5 0 V _ 0 4
PR 5 0 PR 4 5
1 3 0 K _ 1 %_ 0 4 1 3 0 K _ 1 % _0 4 P R5
P C6 1
P C6 6
P C6 5
P C6 9
8 8 7 _ 1 % _0 6
E R R OU T A
P C5 4
P C 56
*1 0 0 P F _ 5 0 V _ 0 4
1 0 0 0 p _ 50 V _ 0 4
0. 01 u _ 5 0 V _ 0 4
10 0 0 p _ 5 0V _0 4
G ND _ S IG NA L P C5 1 0 . 1 u _ 16 V _0 4
PR 4 6 PR 5 1
P C 60 P C7 4 0 . 1 u _ 16 V _0 4
1 00 p _ 5 0 V _ 0 4
1 00 p _ 5 0 V _ 0 4
3 0 . 1 K _ 1 % _0 6 10 0 K _ 0 4
1 8 0 p _ 50 V _0 4 P C7 2 0 . 1 u _ 16 V _0 4 V C _S S P R4 9 *0 _ 0 4 Z 2 8 0 8
PR 4 2 * sh o rt _ 0 8
PC 5 2 5V
* 0 . 1 u _1 6 V _ 0 4 P C 53
VR EFV C G ND _ S IG NA L *0 . 0 2 2 U _ 1 6 V _ X 7 R _ 0 4
G ND _ S IG NA L Z2809
G ND _ S IG NA L PU 3
D
5
C S1 N *7 4 A H C T 1 G 02 G W
CL K E N# 1 PQ 9
P C9 PR 4 3 *0 _ 0 4 4 Z 2 8 0 7G
* 2 N7 0 0 2 W
DP R SL Z2806 2
10 0 p _ 5 0 V _ 04 PR 1 5 * 0_ 0 4
S
5V PR 4 4 *0 _ 0 4
PR 6 2 1 0 K _ 04 DP R SL _ S T P
3
PR T2
GN D _S I GN A L PR 1 4 E N _ V C OR E
D RP _ L 1 2 1 P R1 3 1 K_ 0 4 CS +
G ND _ S IG NA L
2 8 K _ 1 % _ 06 1 0 0 K _ 5 % _ 06 N T C PR 6 3 PC 7 9
P C7 5 PR 1 0
D
PR 5 9 1 0 0 K_ 0 4 * 0 . 1u _ 1 6 V _ 0 4
D RN PC 7 8 2 2 n _ 5 0V _ 06 * 6 8p _ 5 0 V _ 0 4 6 . 9 8 K _ 1 % _ 06
Z2805 G
17 . 4 K _ 1 % _ 0 6 CS - PR 6 0 *0 _ 0 4 P Q1 5
1 4 , 2 1 , 25 , 2 7 S B _ P W R OK
D
2 N 7 00 2 W
S
P C 76
PR 6 1 0_ 0 4 G G
21 V C O R E _O N
*3 . 3 n F _ 5 0 V _ 0 6 PC 6 7 PC 6 8 PQ 1 7
3 .3 V S 2, 6 , 1 0 , 1 1 , 1 3 , 1 4 , 1 5, 1 6 , 1 7 , 1 8 , 1 9 , 2 0, 21 , 2 2 , 2 3 , 2 4 , 2 5, 26 , 2 7
P Q 16 2 N 70 0 2 W
S
P R1 2 1 K_ 0 4 1 0 0 p _5 0 V _ 0 4 1 0 0 p_ 5 0 V _ 0 4 2 N 7 0 02 W 5V 19 , 2 4 , 2 5 , 2 9 , 3 0, 31
V C OR E 3
P R 11
2 9 ,3 0 ,3 1 CV _ T E S T V IN 21 , 2 5 , 2 9 , 3 0 , 3 1
*0 _ 0 4
G ND _ S IG NA L G N D _ S I GN A L
VCORE B - 29
Schematic Diagrams
VDD3, VDD5
L D O5 V V IN1
L DO 5 V ? VDD3 VDD5 High Si de ? ? ? ? 2pcs 10u_25V

P C1 4 3 PC1 4 0 C A PC 1 3 9
V IN
P R1 0 4 PD 1 8 PR 1 0 5
1 U _ 6 . 3V _ 04 4 . 7U _ 1 0 V _ 0 8 F M0 5 4 0 -N PC1 3 0 P C1 3 3 P C1 3 1
*1 M_ 0 4 C A 10_06 0 . 1 u _ 5 0V _ 06
PD 1 7 0. 1 u _ 5 0 V _ 0 6 4 . 7 U _ 2 5V _X 5 R _ 08
F M0 5 4 0 -N 4 . 7 U _ 25 V _ X 5 R _0 8
V IN
V IN2
0V:220 KHz
5V:640 KHz PC 1 4 2
P C1 4 1
21
18
19
15
0 . 1 u _ 25 V _ X 7 R _0 6 0 . 1 u _ 2 5V _X 7 R _ 06
P C1 3 4 P C 1 32
B O OS T 1
B O OS T 2
IN T V C C
V IN
P Q4 4
8
7
6
5
5
6
7
8
4. 7U _ 2 5 V _ X5 R _ 0 8 4 .7 U_ 2 5 V _ X 5 R_ 0 8
A O4 4 6 8 PQ 4 6
4 UG A T E 1 22 14 UG A T E 2 4
V DD 5 TG 1 T G2
AO 4 4 6 8 *1 0 0 0 p _5 0 V _ 0 4
*1 0 0 0 p_ 5 0 V _ 0 4 P R1 0 7 *1 0 _ 0 6 P C1 4 4
3
2
1
1
2
3
SY S5 V P C1 3 8 PR1 0 6 * 10 _ 0 6 SY S3 V VD D 3
PL 7 PR 9 8 PJ 8
PJ 6 P R 97 P L6 V D DS W 1 23 13 V D DS W 2 5A 1 2
1 2 4A SW 1 SW 2 4 . 7 U H 5 . 5 A 6 . 8 * 7 . 3* 3 . 5
4 . 7 U H 5. 5A 6 . 8 *7 . 3 *3 . 5 P Q4 5 8m _ 1 2 5m m
C
8
7
6
5
5
6
7
8
5m m 8 m _ 12 PC 1 2 6 PC 1 2 1
+
P C 16 1 P D 12 A O4 4 6 8 PQ 4 7 PD 1 1
P C 12 5 + 4 L G ATE1 20 17 L G ATE2 4 1 5 0 U _ 6 . 3 V _ D 2 0 . 1 u _ 16 V _0 4
F M5 8 2 2 B G1 B G2
1 50 U _ 6 . 3V _ D 2 0 . 1 u _ 1 6 V _ 04 AO 4 4 6 8 F M5 8 2 2
Sheet 29 of 37
3
2
1
1
2
3
A
A
P R1 1 4 1 0 _ 1 % _0 4 V D D S E N S E 1+ 27 8 VD D SEN SE2 + P R1 1 5 1 0 _1 % _ 0 4
SEN SE1 + S E N S E 2+
VDD3, VDD5 P R1 1 6 1 0 _ 1 % _0 4
P C 1 51
1 0 00 p _ 5 0 V _ 0 4
V D D S E N S E 1- 28
SEN SE1 - SEN SE2 -
7 VD D SEN SE2 -
PC 1 5 2
1 0 0 0 p_ 5 0 V _ 0 4
P R1 1 7 1 0 _1 % _ 0 4
H C B 1 0 0 5 K F -1 2 1 T 2 0
P C 15 8 P R1 2 4 P R1 2 3 4 7 K_ 0 4 P C1 5 3 2 2 0 p_ 5 0 V _ 0 4 2 11 PL 8
* 2 2p _ 5 0 V _ 0 4 10 5 K _ 1 % _ 0 6 I TH 1 EXTVC C 5V
P C1 5 9 * 1 00 p _ 5 0 V _ 0 4
S GN D 4 3 5 P C 16 0 22 0 p _ 5 0V _ 04 P R1 2 5 4 7 K_ 0 4
VFB1 IT H2 PC 1 5 7 P R 12 2
12
P GO O D
P R1 1 8 P C 15 5 10 0 p _ 5 0V _ 04 *1 0 0 p _ 50 V _ 0 4 6 3 . 4K _ 1% _ 0 4
L D O5 V PR 1 0 8 0 _0 4 24 S G N D4
20 K _1 % _ 0 4 MO D E / P L L I N 4
VF B2
L D O 5V PR 1 1 0 1 0K _ 04 25
F R E Q/ P L L F L T R
T K /S S 2
T K /S S 1
PR 1 0 9 16 PR1 1 9
RU N 2
R UN 1
P GN D
I LI M
S G ND 4 *0 _ 0 4 PR 1 1 2 PIN 29 = SGND4 2 0 K _ 1% _ 0 4
3 . 32 K _1 % _ 0 6 PU 6
26
10
L T C3 8 5 0
1
6-02-03850-CQ0
S G N D4 P NC 1 N C_ 0 4
SG ND 4 S G N D4
PR 1 1 1 0_ 0 4 L DO 5 V
S G ND 4
P C 1 35 C A
S YS5 V
3 V_ EN P R1 1 3 0. 1u _ 1 6 V _ 0 4
L G ATE1 Z2925 P D 1 3 S CS 3 5 5 V
5 V_ EN * 1 0 K _ 04
A C
T K /S S 2 S YS1 0 V
PQ 2 8 PC 1 5 0
A O 4 46 8 2 2 0 0p _ 5 0 V _ 0 4 PC 1 4 9 P D 1 6 S CS 3 5 5 V P C 1 46
S Y S 1 5V V DD 5 8 5V 1 0 0 0p _ 5 0 V _ 0 4
7 3 PC 1 5 4 2 2 00 p _ 5 0 V _ 0 4
4A 6 2
4A P C 1 36 C A
5 1 Power Plane SY S5 V 0 . 0 1 u _ 16 V _X 7 R _ 04 0. 1u _ 1 6 V _ 0 4
PR 6 8 P C1 5 6 Z2926 P D 1 4 S CS 3 5 5 V 5V 5V 5V 5V 5V
PR 7 5
1 M_ 0 4 0 . 0 1 u_ 1 6 V _ X 7 R _ 0 4 A C
S YS1 5 V
4
1 M_ 0 4 PC 8 9 PC 9 3 PC 9 5 PC 9 6 P C 97
Z2927 P R1 2 1 S GN D 4 P D 1 5 S CS 3 5 5 V P C 1 45
*0 _ 0 4 0 . 1 u _ 1 6V _0 4 0 . 1 u _ 16 V _0 4 0 . 1 u _ 16 V _ 0 4 0 . 1 u _1 6 V _ 0 4 0 . 1 u_ 1 6 V _ 0 4
P Q2 7 2 2 00 p _ 5 0 V _ 0 4
D
PC 9 4 2 N 7 0 02 W S G N D4
2 2 0 0p _ 5 0 V _ 0 4 G D D_ O N# 5V 5V 5V 5V 5V
P R1 2 0
S
*0 _ 0 4 PC 1 4 7 PC 1 0 0 PC 1 0 3 P C 1 04 P C 14 8
S Y S 5V
0 . 1 u _ 1 6V _0 4 0 . 1 u _ 16 V _0 4 0 . 1 u _ 16 V _ 0 4 0 . 1 u _1 6 V _ 0 4 0 . 1 u_ 1 6 V _ 0 4
E
PQ 4 9 S GN D 4
A O 4 46 8 3 0 ,3 1 D D_ O N# B P Q 39
S Y S 1 5V V DD 3 8 3 .3 V DT A 1 1 4 E U A EMI
7 3
3A 6 2
3A
C
5 1 D D _ ON H
D
Power Plane D D _ ON H 31 V IN 1 31
PR 1 0 3
S Y S 1 5V 11 , 2 7
P R 1 02 G G
21 D D _ ON 3 .3 V 2, 1 2 , 1 4 , 1 5 , 1 6 , 2 2, 25 , 2 6 , 2 7 , 3 0 , 3 1
1 M_ 0 4 PQ 3 7 PQ 3 8 P C 11 5 P R 90 V D D3 2, 1 1 , 1 5 , 2 1 , 2 5 , 2 6, 27 , 3 1
4
1 M_ 0 4 2 N 7 00 2 W 2 N7 0 0 2 W
5V 19 , 2 4 , 2 5 , 2 6 , 2 8, 30 , 3 1
S
Z2928 PR 9 3 0 . 1 u_ 1 6 V _ 0 4 1 M_ 0 4
V D D5 27
V IN 21 , 2 5 , 2 8 , 3 0 , 3 1
P Q5 0
D
PC 1 3 7 2 N 7 0 02 W
1 0 0 K_ 0 4 PR 9 4 PR 9 5
0 . 0 1 u _1 6 V _ X 7 R _ 0 4 G D D_ O N# 1 M_ 0 4 1 0 0 K_ 0 4
Z2930 2 1
SY S5 V
PJ 5 1m m
S
2 8 , 3 0 , 31 CV_ T E ST
B - 30 VDD3, VDD5
Schematic Diagrams
1.05VS, 1.2V, 1.5V
VIN
HCB100
5KF-121T2
0
PC88 PC90 PC91 PC86 PL5 Z3001 PR8
1 10_06 Z30
11 PC112 1U_6.3V_04 PC85 PC92 PC87
5V
0. 1
u_50V_06 4.7U_25V_X5R_08 0.1u_50V_06 4.7U_25V_X5R_08 *4.7U_25V_X5R_08
4.7U_
25V_
X5R_08 *4.7U_25V_X5R_08 PR3
6 10_06 Z30
12 PC101 1U_6.3V_04
SGND1 SGND2
A
2A PD10
FM0540-N
PD5
FM0540-N
PR69 10K_04 PU5 PC107 1000p_5

0V_0
4
3.3V
C
2A
2
7 13
27 1.05VS_PWRGD PGOOD1 PGOOD2 PC106 1000p_5
0V_0
4
PC98 1
U_6.3V_04 3 25
VDDP1 VCCA1
PC111 1
U_6.3V_04 1
7 11 SGND1 SGND2
7/24 Power
VDDP2 VCCA2
8
7
6
5
Power Plane PQ23 Z3002 6 23 Z3013 PR74 1M_
04
PR121 from
DH1 TON1
AO4474 4 750K_04 change
1.05VS V1.05
6A
PJ3 PL3 PR72 Z3003 4 9 Z3014 PR78 1.2M_
04
ILIM1 TON2
2.5UH+/-20% Z3022 to 1.2M_04
3
2
1
5
6
7
8
1 2 3.9K_04 Z3004 5 20 Z3015
LX1 DH2 PR37 PC110 Power Plane
C
Z3005 2 21 Z3016 0_
04 0.1u_25V_X7R_06 4 PQ25
DL
1 BST2
8
7
6
5
5mm PC102 PR71 PC83 PC82 PD9 5/10 AO4468
+ PR80
3A
PC99 Z300
6 PR73 0_04 7 SC413 18 Z3017 PL4 V1.2 PJ1 1.2V
1
2
3
1
00p_50V_04 11K_1%_06 0.1u_16V_04 220U_4V_D FM5822 4 BST1 ILIM2 2. 5
UH +/-20%
10K_1%_04
Sheet 30 of 37
0.1u_
25V_
X7R_06 Z3007 2
6 19 Z3018 1 2
FBK1 LX2
3
2
1
Ra
PQ24 2
4 16 Z3019 2mm
C
AO4456 VOUT
1 DL2 PR79 PC109
1.05VS, 1.2V, 1.5V
5
6
7
8
8 12 Z3023 PD8 PC81 Ra
EN/PSV2 FBK2 + 14K_1%_04 22p_50V_04
2
2 10 4 PQ26 FM5822 220
U_4V_D
EN/PSV1 VOUT2 AO4468
A
1
2
3
PR70
AGND1
AGND2
PGND1
PGND2
Rb Z3
008
10K_1%_04 5V PR7
6 100K_04 PR82
Rb
SC413 10K_1%_04
28
14
15
1
PC105
SGND1 G PQ29
29,31 DD_ON#
S 2N7002
W 0.1u_16V_04 SGND2
SGND1 SGND2
PR8
6 100K_04 Z3
009
5V
PR77 PR83
D
PR8
8 PC108
10
0K_0
4 G PQ30 0.1u_16V_04 0_06 0_
06
2N7002
W
Z3010 SGND1 SGND2
S
D
G PQ31
17,20
,21, 2
2,26,27,31 SUSB#
2N7002W
S
G PQ35
28
,29, 3
1 CV_
TEST
2N7002W
S
5
V
PC39
1.8V
PU2 1U_
6.3V_0
4
PR41 10K_04
1.5A 5 6 V1.5 PJ7 1.5V
3.3V VIN VCNT
L
9 3mm
27 1.5V_PWRGD
7 VIN 4 1.5A 1 2
POK VOUT
1.0
5VS 2,3,4,6,7,16
3 PC37
Z3020 VOUT VIN 21,25,28, 29,31
PR40 47K_04 8 PC42 PC4
1 PC40
5V EN 1.5
V 27
82p_5
0V_0
4 1.8
V 5,7,9,10,14,15 , 16
,20,27,31
1 2 Z3021 4
.7U_10V_X5R_08 4.7U_10V_X5R_
08 0.1u_
16V_
04
D
GND VFB 3.3

V 2,12,14, 15,16,22,25,26,27,29,31
PR39
5V 19,24,25, 26,28,29,31
PC38 PC44 PC43 APL5913 17.4K_1%_04
1.8
V 5,7,9,10,14,15 , 16
,20,27,31
G PQ5 PR38
29
,31 DD_ON# 2N7002W 0.1u_1
6V_0
4 0.1u_16V_04 4.7U_
10V_X5R_08 1.2
V 7,27
19.6K_1%_06
S
1.05VS, 1.2V, 1.5V B - 31

Schematic Diagrams
1.8V, 0.9VS
VIN 5V 3.3V
A
PR33 PR34 PR31
PD4 100K_04
1M_04 10_06
V1.8 FM0540-N
PU1
PR35 10_06 Z3101 3 7
C
VDDQS PGD 1.8V_PWRGD 27
Ra
PC27 PR30 PC33 PC30 PR29
Z3102 2 0_06 Z3123
100p_50V_04 2.2K_1%_04 1U_6.3V_04 1U_6.3V_04 TON
BST 24 Z3111
Z3103 6 VIN
FB
Z3104 8 REF PC25 PC17 PC13 PC14
PR24 Z3105 9 0.1u_25V_X7R_06 4.7U_25V_X5R_08 4.7U_25V_X5R_08 0.1u_50V_06
COMP
5
6
7
8
Rb PR23
10_06 PC24 0_06 PQ21
PR26 PR32 23 Z3112 Z3116 4 AO4474

*.1U_10V_04 DH
10_06 10K_1%_04 Z3106 10 PR25
1
2
3
VTTS
4.7K_04
Z3109 Z3107 5 21 Z3113 PL2 V1. 8
VCCA I LIM 2.5UH +/-20% PJ4
PC26 PC23 PR22 PC29 PC31
LX
22 Z3114 6A 1 2 1.8V
Sheet 31 of 37 1U_6. 3V_04 0.068u_10V_04 0_06 1000p_50V_04 1U_6.3V_04 19 Z3115 8mm
C
DL
5
6
7
8
VSSA 4 PD7 PC84 PC34 PC32 PC35
1.8V, 0.9VS VSSA +
PJ2 14 VDDP1 20 4 FM5822 220U_4V_D2 4. 7U_10V_X5R_08 0.01u_16V_X7R_04

0.9VS
2 1 1.5A VTT_MEM 15 VTT
VTT
5V 0.1u_16V_04
PC22
A
1
2
3
3mm V1.8 12 VDDP2
PR21 PC16 +
PC15 13 VDDP2 1U_6.3V_04
PQ22 PR27
20K_1%_04 4.7U_10V_X5R_08 *150U_4V_B2 PC18 PC20 1 EN/PSV PGND1 18 AO4456 VSSA
PGND1 16 7 / 24 pow e r P C1 0 3 f rom
GND
4.7U_10V_X5R_08 1U_6.3V_04 11 0_06
VTTEN PGND2 17 2 2 0 U_ 4 V_ D2
SC486 c ha ng e t o 47 0 U _2 . 5V _ D3 .
25
A DD P C 19 0 4 . 7 U_ 1 0V _ 0 8.
5V PR28 47K_04 1.8VEN
D
PC28
29,30 DD_ON# G PQ4 0.1u_16V_04

2N7002W
S
VIN VA VIN1
PR67 47K_04 VTTEN PD3 SCS140P
5V A C
PQ1
PR66 NDS352AP_NL PD2 SCS140P
VDD3 S D Z3122 A C
D
100K_04 PC21
Z3110 G PQ20 0.1u_16V_04
2N7002W PR16 PR17 100K_04 PR18 20K_1%_04
G
D
APKEY DON#
S
100K_04
G PQ18
17,20,21,22, 26,27,30 SUSB# 2N7002W 21 PWR_SW# PQ14 21 APKEY
S
D
2N7002W
28,29,30 CV_TEST G PQ19 G

2N7002W
PQ13 PQ12
S
D
2N7002W 2N7002W
PR65 100K_04
21 M_BTN PWRSW G G DD_ONH 29
S
PR64 PC80
100K_04 0.1u_50V_06
VA 25
VIN 21,25,28, 29, 30
VIN1 29
5V 19,24,25, 26, 28,29,30
VDD3 2,11,15, 21, 25,26,27,29
3.3V 2,12,14, 15, 16,22,25,26,27,29, 30
1.8V 5,7,9, 10,14,15,16,20,27,30
0.9VS 10
B - 32 1.8V, 0.9VS
Schematic Diagrams
D/D BD (CRT, S-Video, RJ-11)
CRT M CR T 1
D S 0 1 A 9 1- MD 2 21 -7 F
M _ RE D M RE D 1
M _ GR E E N 9
M _ B L UE M GR N 2
A C
AC
AC
10
MD 1 M D2 M D3 M BL U 3
B AV9 9 BA V9 9 B A V 99
M R3 M R2 M R1 M C 10 MC 9 M C8 MC 7 M C5 MC 3
4
11
12 M ID 1
CCD M +V C C _ C C D
C
C
A
A
5 M C 22 . 1 u _5 0 V _ 0 6 MJ C C D 1
M GN D
7 5 _ 1% _ 0 6 7 5 _ 1 % _0 6 7 5 _ 1 % _0 6 2 2 p _ 5 0V _0 4 2 2p _ 5 0 V _ 0 4 22 p _ 5 0 V _ 04 2 2p _ 5 0 V _ 0 4 13 MH S JCCD
1
M GN D M GN D MG N D 2 2 p _ 50 V _ 0 4 2 2 p_ 5 0 V _ 0 4 6 M U SB_ PN 6 MR 1 2 0_06
14 M VS M U SB_ PP6 MR 1 3 0_06 2
7 3 1 5
4
15 MI D 3
8 5
MG N D 8 5 20 4 -0 5 0 0 1
GN D 1
G N D2
M+ 3 V S
MC 6 M C4 MC 2 M C1
M LP 2 M G ND
F C A 3 21 6 K F 4 -1 2 1 T 0 3 1 8 1 0 00 p _ 5 0 V _ X7 R _ 0 4 2 20 p _ 5 0 V _ 04
MH S 4 5 M _ HS Y NC MG R N 2 7 M _ GR E E N 2 2 0 p _ 50 V _ 0 4 1 0 0 0p _ 5 0 V _ X 7 R _ 0 4
MB L U 3 6 M _ B L UE MI D 1 3 6 M _ DD CA DA T A
MV S 2 7 M _ V S Y NC MR E D 4 5 M _ RED M GN D MG N D M G ND M G ND M GN D
MI D 3 1 8 M _ DD CA C L K
ML P 1
F C A 3 2 1 6 K F 4 -1 2 1 T 03
S-VIDEO MS _V I D E O1 ML 3
Sheet 32 of 37
ML 1 7
* F C M1 6 0 8 K -1 2 1T 0 6
R SVD
3
L1Z 32 0 5 * F1C M1 6 0 8 K2-1 2 1T 0 6 L2 M TV _D A C B _ OU T
M T V _ D A C C _O U T
L2 1 2 Z 32 0 4
L1 4
S -C _ C -P R
MP R 7 S -Y _ C -Y 1
D/D BD (CRT, S-
I R TN B
M A C OK 2 MC 1 5 MC 1 6 M R9
MA C O K 33 IR T NC
M R7 M C1 2 MC 1 1 5
* S H T_ 1 0 M I L_ 0 6 6 C V B S _ C -P B *6 p _ 5 0V _0 6 *6 p _ 5 0 V _ 06 0 _ 06
IR T NA
M PR 1 1 3 0 K _ 1% _ 0 4 0_06 * 6 p_ 5 0 V _ 0 6 *6 p _ 5 0V _0 6
S
S
Video, RJ-11)
G ND 1
GN D 2
M V D D3 MP R 6 1 0 K _ 04 MA C _ I N # 33 M VB M VB E C M BAT0 _ V * C 1 0 8 7 8- 10 7 A 5
D
MP Q 1 MP Q3 M PR 8 M PC 6 ML 2 M GN D
M PR 9 *1 M _ 04 Z 3 43 1 G DT A1 1 4 EU A M G ND
M+ V A
*2 N 7 0 02 M TV _D A C A _ OU T M G ND
L1Z 32 0 6*F C M1 16 0 8 K -1 22 1 T 06 L2 M TV _D A C A _ OU T
DB
M P R 10 6 . 0 4 K _ 1% _ 0 4 . 1 u _ 5 0V _0 6 M TV _D A C B _ OU T
S
MP Q 2 M TV _D A C C _ O U T
G MC 1 3 MC 1 4 M R8
M V D D3 2 N 7 00 2
* 2 00 K _ 0 4
AC
AC
AC
*6 p _ 5 0V _0 6 *6 p _ 5 0 V _ 06 0 _ 06
S
MD 1 2 MD 1 0 M D1 1
M GN D *B A V 9 9 *B A V 9 9 *B A V 9 9
M G ND Layout Note:
C
A
A
M GN D
L1 : Trace Length Max=0.5" MC 2 5 MC 2 3 MC 2 4
L2 : Trace Length Max=0.2"

. 1 u_ 1 0 V _ 0 4 . 1 u _1 0 V _ 0 4 . 1 u _ 10 V _ 0 4
M GN D M GN D M G ND
M+ 3 V S M+ 3 V S M +3 V S
M DD B 1
S P U F Z -6 0S 2 -V B -1 -R
M +V I N 60 59 M + VIN
58 57
M C2 7 MC 2 9 M C2 8 MC 3 0 MC 3 1
56 55
. 0 1 u _ 50 V _ 0 6 . 1 u _5 0 V _ 0 6 54 53 . 1 u _ 5 0V _0 6 . 0 1 u_ 5 0 V _ 0 6 . 0 1u _ 5 0 V _ 0 6
52 51
50 49
M GN D M GN D 48
46
47
45
M GN D M GN D MG N D INVERTER CONNECTO R SPEAKER CONNECTOR
20mil 44 43 M+ 3 V S
M + VA 42 41
40 39 MB A T0 _ C L K 3 3 M + VIN M L4
38 37 MB A T0 _ D A T 3 3
MC H A G_ E N 3 3 H C B 2 0 1 2 K F -5 0 0 T4 0 M J SPK_ 1
M BL O N 36 35 1 2 Z 3 2 07 MD D -S PKL +
34 33 MC U R S E N 3 3 4
M B R IG HT N E S S _ K B C M BAT0 _ V MD D -S PKL -
32 31 3
MB A T0 _ T E M P 3 3 M C1 7 MC 1 8 MC 2 1 MD D -S PKR -
30 29 MD D -S PKR + 2
28 27 1
M TV _ D A C A _ O U T 1 0 U_ 2 5 V _ 1 2 . 0 1 u_ 5 0 V _ 0 6 . 0 1u _ 5 0 V _ 0 6
26 25
4
3
2
1
M TV _ D A C B _ O U T 8 5 2 0 4- 04 0 0 1
M U SB_ PN 6 24 23 M TV _ D A C C _ O U T M CP 1
22 21
M U SB_ PP6 M GN D M GN D MG N D MJ I N V 1 8 P 4 C X1 8 0 p
20 19
M + V CC _ CC D M _H S Y NC
18 17 M _V SYN C 1 JINV JSPK_14
16 15 M _R ED MB L O N M L6 1 2 F C M1 6 0 8 K -1 2 1T 0 6 Z3208 2
6
5
6
7
8
3 3 MT O T A L _C U R 14 13 3
M _G R EEN MB R I G H T N E S S _ K B C M L5 1 2 F C M1 6 0 8 K -1 2 1T 0 6 Z3209 4
MV D D 3 12 11 M _B L UE 4
M D D -S PKL + 10 9 M _D D CA D A T A MC 3 2 M C1 9 MC 2 0 5 MG N D
8 7 6 1
M D D -S PKL - M _D D CA C L K 1
M D D -S PKR - 6 5 *1 0 0 p _5 0 V _ 0 4 1 0 0p _ 5 0 V _ 0 4 1 00 p _ 5 0 V _ 04 8 5 2 04 -0 6 0 0 1
M D D -S PKR + 4 3 M A C_ IN #
2 1
M GN D MG N D MG N D MG N D
MG N D M GN D
MV D D 3 33
M+ V A 33
M+ V I N 33
D/D BD (CRT, S-Video, RJ-11) B - 33

Schematic Diagrams
D/D BD (Charger, DC-In)
M PQ 4
M + VIN S I 4 8 3 5 B D Y -T 1 -E 3
CHARGER Circuit 8
65W/3.42A
3 7
4A 160mil 2 6
1 5
M +V A M P Q5
MD C _ JA C K 1 M PL 1 S I 4 8 3 5 B D Y -T 1 -E 3 M+ V A MV B
MP D 1
4
8 M PL 2
4A 160mil 1 2 M +V A A C M P R2 0 2 0m _ 2 5
4A 160mil 3 7 1 2
3A 120mil M PR 3 2 2 5 m _ 25
1
2 6
2 H C B 4 5 3 2 K F -8 0 0 T 6 0 1 5 1 5u H _ 1 0 *1 0 *4
1 0 U _2 5 V _ 1 2
1 0 U_ 2 5 V _ 1 2
0. 1u _ 5 0 V _ 0 6
1 0 U _ 25 V _1 2
G ND 1 F M 1 04 0 -T 1
C
0 .1 u _ 5 0 V_ 0 6
MP C 2 5 MP C 2 6
*0 . 1 u _ 5 0 V _ 0 6
G ND 2 MP C 2 4 MP C 2 3 M PC 2 2 MP C 2 1
M P D2
0 . 1 u_ 5 0 V _ 0 6
* 10 K _0 4
G ND 3
0 .1 u _ 5 0 V _ 0 6 1 0 U _ 2 5 V_ 1 2
1 0 K_ 0 4
4
G ND 4 MP R 1 3 FM 540
1 0 U _ 2 5 V _ 1 2 1 0 U _2 5 V _ 1 2 1 0U _ 2 5 V _ 1 2 1 0 U_ 2 5 V _ 1 2
0_06
2 D C -G 2 1 3 -B 2 0 0 22 0 K _ 1 % _ 0 4
A
MG N D MG N D
M GN D M G ND MG N D M G ND MG N D
M PC 2 0
M PC 1 9
M P C1 8
M P C1 7
M A C IN
M PC 1 0
M PC 9
M PC 8
M PR 1 5
M P R1 4
M PR 1 8
MG N D M G ND M GN D MG N D M P R3 *0 _ 0 6 MV R E F
Hi:16.8V
MP R 1 2
MC U R S E N 3 2
Low:12.6V
20 K _1 % _ 0 4 MP R 2
M G ND
0 _0 6 MP C 4
. 0 1 u _5 0 V _ 0 6
MG N D M +V A M P R 23 0 _ 06 C T L
Sheet 33 of 37
MG N D
MG N D
MP R 3 0 * 1 0 0K _ 06 M P U1
MP C 5 2 2p _ 5 0 V _ 0 6 13 12
MP R 2 9 0_06 14 + INC 1 -I N C 1 11
D/D BD (Charger,
# TOTAL POWER = 60W C T L OU T D / S E L
15 10 M PR 2 6 1 0 0 K_ 0 6
FB1 2 3 O U T C1
16 9 6 8 0 0p _ X 7 R _0 6
-I N E 3 + IN E1
# MAX CHARGE CURRENT = 2.5A M PC 1 6 MP R 2 8 MP R 1 9 3 0 K_ 0 6 17 8 M PR 2 5 1 0 K_ 0 6 MP C 1 5 M PR 5
RT -I N E 1
DC-In)
18 7 M PR 2 4 0 _ 0 6 M AC IN
3 3 K_ 0 6 MP C 1 3 0. 1u _ 5 0 V _ 0 6 19 X A C OK A CIN 6 * 1 0K _0 6
VH VR EF
# BAT_SEL H:16.8V ; L: 12.6V 2 2 00 p _ 5 0 V _ 0 6 20 5 MA C O K
OU T A CO K M A CO K 32
M P R 33 1 0 _0 6 21 4 M PR 2 2 1 0 K_ 0 6 MP C 1 4
M + VIN 22 VC C -I N E 2 3
M P C 1 2 0 . 2 2 u _ 10 V _ 0 6 23 CS + IN E2 2 M PR 2 1 1 0 0K _ 06 6 80 0 p _ X 7 R _ 0 6
# CURSEN : Vcursen=0.025 X 20 X Ichg GN D O U TC 2
24 1
+ INC 2 -I N C 2 M T OT A L _ C U R 32
M PC 2 7 0 .1 u _ 5 0 V _ 0 6
# TOTAL_CUR : Vtotal_cur=0.020 X 20 X Ichg MB39A126 MB 39 A 12 6 M PC 1 1 0 . 0 1 u _ 50 V _0 6 M PR 1
* 2 . 2 M_ 0 6
M GN D
M V RE F
T _ C U R _C O N T
C UR _ CO N T
M GN D
M PR 4 MP R 1 6
3 0 K_ 1 % _ 0 6
M VB M PC 7 3 0 K_ 1 % _ 0 6 M V D D3
M GN D M G N D
M V D D3 0. 22 u _ 1 0 V _ 0 6 ADJ C.V POINT
MP R 3 1
M PR 2 7 MP R 1 7 MP Q6
MR 5 MR 4 M R6 M PF1 10 K _0 4
C
D
2 N7 0 0 2
M D9 M D7 M D5
7A
1 0K _ 1% _ 0 6 10 K _1 % _ 0 6 G
SC S3 5 5 V SC S3 5 5 V SC S3 5 5 V
M PQ 7
1 0 K_ 0 4 2 .2 K_ 0 4 2 .2 K _ 0 4 J _ MB A T 1
D
1
MG N D M GN D MG N D
A
2 N7 0 0 2
MP J 1
1
32 MB A T 0_ C L K M BAT0 _ C L K 2m m G MC H A G_ E N M C HA G _ E N 32
M BAT 0 _ D AT 2
32 MB A T 0_ D A T Charge Current 2.5A
M BAT0 _ TEM P 3
S
2
3 2 MB A T 0 _ TE MP 4
Charge Voltage 12.6V
5 M G ND
Total Power 60W
M PC 3 M PC 2 M PC 1 B T D -0 5 T I 1 G
C
6 Cell Battery
M D8 M D6 M D4
SC S3 5 5 V SC S3 5 5 V SC S3 5 5 V
3 0 p _5 0 V _ 0 4 3 0 p _ 5 0V _ 04
3 0 p_ 5 0 V _ 0 4
A
M G ND
MH 2 M H4 M H1 MH 3
H 3 H 4 C 2 7 6 D 1 1 1 C 2 5 6D 1 3 0 2 9 2 9
C 6 7 D6 7 C 6 7D 6 7 3 8 3 8
MV B 32
4 1 7 4 1 7 MV D D 3 32
5 6 5 6 M+ V A 32
M+ V I N 32
M T H 2 7 6 D 11 1 MT H 2 7 6 D 1 1 1
M G ND M GN D MG N D
MG N D MG N D
B - 34 D/D BD (Charger, DC-In)

Schematic Diagrams
Audio BD (Phone Jack, RJ-11, USB)
RJ-11 PLANE
DIGITAL PLANE
? ? ? ? ? ? ? ? ?
PJ L 7 60 m ils
? ? 2.5mm ? ? P J + V C CU S B3
2 1
H C B 2 0 12 K F -5 00 T 4 0
PJMODEM PJ USB 1
2 1
1
PJ L 8 V CC GN D1
GN D1
PJ U SB_ PN 6 4 3 Z3405 2 GN D2
D ATA- GN D2 GN D3
PJ U SB_ PP6 1 2 Z3406 3 GN D3 GN D4
MODEM RJ-11 W C M 3 2 1 6F 2S -1 61 T 0 3
D ATA+ GN D4
4
P J M OD E M 1 PJ RJ 1 P J C9 P J C1 0 G N D
Z 34 0 1 P J L5 1 2 B K 2 1 2 5 H S 1 2 1 _ 0 8 05 Z 34 0 3 1 PJ C 7 PJ C 6
Sheet 34 of 37
1 T IP +
Z 34 0 2 P J L6 1 2 B K 2 1 2 5 H S 1 2 1 _ 0 8 05 Z 34 1 4 2 *1 0 p _ N P O _ 0 4 *1 0 p _ N P O _ 0 4 C 1 0 7 7 0- 10 4 A 3
2 R IN G 1 00 U _ 6 . 3V _ B 2 . 1 u _ 10 V _ 0 4
8 5 2 04 -0 2 0 0 1 P JG N D PJ G ND
P C B F o o t p ri n t = 8 52 0 4 -0 2 0 0 C 1 0 1 46 -1 0 2 A 4 -Y
P I N G N D 1 ~ 4= P J G N D P J G ND P JG N D
P J G ND P J G ND Audio BD (Phone
Jack, RJ-11, USB)
PJAUDIO
P JH 4 P J H3 PJ H2 PJ H 5 P JH 1
12 1 2 9 2 9 2 9 C 67 D 6 7 C 6 7 D6 7
3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
P J GN D PJ C8 . 1u _ 1 0 V _ 0 4 MT H 29 6 D 1 11 MT H 2 96 D 1 1 1 MT H 2 3 7D 1 1 1
P JG N D P J GN D P J GN D P J GN D
PJ G ND
P J A U D I O1
12 P J +V C C U S B 3
PJ U SB_ PN 6
11 PJ U SB_ PP6
10
9
8 PJ M I C 1 -R
7
PJ H P_ SEN SE
6
PJ M I C 1 -L
5
ANALOG PLANE 4
3
2
PJ M
PJ H
PJ H
IC_ S E NS E
P _ P UG
E A D P H O N E -R
PS1
1 2
SHO R T
PJ H E A D P H O N E -L PS2 SHO R T
1
1 2
87 2 1 3 -1 2 00 G
P J A U DG
PJ A U DG P J GN D
PJHP, PJMIC
5
4 1
3
2
6
SOLDER SIDE VIEW

6- 20-B 2840-006
P J HP _ S E NS E
6- 20-B 2840-006 P J M IC_ S E NS E P J M IC1
P J HP 1 5
P J HP _ P U G 5 4
4 P J M I C 1 -R P JL 3 1 2 F C M1 6 0 8 K -1 2 1T 0 6 3
P J H E A D P H O N E -R PJ L 4 1 2 F C M 1 6 08 K - 12 1 T 0 6 3 Z3420 6
6 P J M I C 1 -L P JL 2 1 2 F C M1 6 0 8 K -1 2 1T 0 6 2
P J H E A D P H O N E -L PJ L 1 1 2 F C M 1 6 08 K - 12 1 T 0 6 2 1
1 2 S J -S 3 5 1 -S 3 0
2 S J -S 3 5 1 -S 3 0 P J C2 PJ C 5
PJ C 1 P JC 4 P J C3 PJ R 4 P JR 1
MIC IN
6 8 0p _ 5 0 V _ 0668 0 p _ 50 V _ 0 6 . 1u _ 5 0 V _ 0 6 1 K_ 1 % _ 0 4 1 K _ 1 % _ 04 H EAD PHONE 10 0 p _ 0 6 1 0 0 p_ 0 6
( CEN TE R/S UB_W )
(FRONT_OUT)
P J AUD G
P J A U DG
Audio BD (Phone Jack, RJ-11, USB) B - 35

Schematic Diagrams
Hot key BD (Hot key, LED)
FOR M540R PS+5VS PS+5VS PS+5VS PS+5VS

POWER NUM LOCK CAPS LOCK SCROLL
SWITCH LED LED LOCK
PSR4 LED PSR1 PSR3 PSR2 LED
4
70_06 LED8 470_06 LED4 470_06 LED5 470_06 LED6
PSD8 HT- 1
50NB- DT PSD4 KP-2012SGC PSD5 KP-2012SGC PSD6 KP-2012SGC
Z3501A C Z350
2A C PSNUM_LED Z3
503 A C PSCAP_LED Z350
4A C PSSCROLL_LED
LED7 LED1 LED2 LED3

PSD7 *HT-150NB-DT PSD1 *KP-2012SGC PSD2 *KP- 20
12SGC PSD3 *KP-2012
SGC
A C A C A C A C
PSGND
FOR *M550R
Sheet 35 of 37
Hot key BD FOR M540R
(Hot key, LED) SW2
PSSW2
SW4
PSSW4
SW6
PSSW6
SW8
PSSW8
TJG-523-S-V-T/R TJG-523
- S-V- T/R TJG-523-S-V-T/R TJG-5
23-S-V-T/ R
1 2 PSWEB0 1 2 PSWEB1# 1 2 PSWEB2# 1 2
PS+VIN
3 4 3 4 PSW1~8 3 4 3 4 PSPWRSW
PS+VIN
PSC2 PSC3 PSC4
3 1 PSC5
.1u_16V_04 .1u_16V_04 .1u_16V_04
5
6
5
6
5
6
5
6
4 2
.1u_50V_06
PSGND PSGND PSGND

PSGND PSGND PSGND
SW1 SW3 SW5

SW7
PSSW1 PSSW3 PSSW5
*TJG-523-S-V-T/R *T
JG-523-S-V-T/R *TJG-523-S-V-T/R PSSW7
1 2 1 2 1 2 *TJG-523-S- V-T/R
3 4 3 4 3 4 1 2
3 4
5
6
5
6
5
6
5
6
PSGND PSGND PSGND
PSGND
FOR *M550R
LID SWITCH IC
LED1 LED 2 LED3 LED4 LE D5 LED6 LED7 LE D8 MR SENSOR
FOR M540R FOR *M550R M540R X X X V V V X V PSU1
PS+KBC_3.3V PS+KBC_3.3V
PS+5VS PSR5 1
0K_06
*M550R V V V X X X V X PSU2
PSU1 PSU2
PSHKB1 PSC1 .1u_16V_04 1 3 PSLID_SW# 1 3 PSLID_SW# SW1 SW2 SW3 SW4 SW 5 SW6 SW7 SW 8
PSGND VCC OUT VCC OUT
GND
GND
PSHKB 1 PSSCROLL_LED PSC6
2
3
PSNUM_LED
PSCAP_LED .1u_1
6V_04 AH999WLA *AH999WLA
M540R X V X V X V X V
1 4
PSWEB0 PSU1, PSU2
2
2
5
6
PSWEB1#
PSWEB2#
2 *M550R V X V X V X V X
7
PSGND PSGND PSGND
8 1 3
PSPWRSW
9
10 PS+VIN
13
11 PSLI D_SW#
12
13 PS+KBC_3.3V
PSH2 PSH3 PSH6 PSH1 PSH4 PSH5 PSH7
85201-13051 2 9 2 9 2 9 C48D48 C48D48 C48D48 C48D48
PSGND 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7
MTH29
6D91 MTH296D91 MTH296D91
PSGND PSGND PSGND PSGND
B - 36 Hot key BD (Hot key, LED)

Schematic Diagrams
RJ-45 Board
R JRJ_45
GND1 1 RMLMX4 -
GND2 s hield DA+ 2 RMLMX4 +
s hield DA- 3 RMLMX3 -
DB+ 6 RMLMX3 +
RGND DB-
RJLAN1
4 RMLMX2 -
DC+ 5 RMLMX2 + 1 2
DC- 3 4
7 RMLMX1 -
DD+ 8 RMLMX1 + 5 6
DD- 7 8
C 10091-108A4 9 10
SPUA Z-10S2-VB-040-1-P
Sheet 36 of 37
RGND RGND RJ-45 Board
RJLAN
1 9
2 10
R H1 RH2
C 237D91 C237D107
RGND RGND
RJ-45 Board B - 37
Schematic Diagrams
FingerPrint Board
F3. 3
V
F3.3V
FJ_FP1 FC20 FC21
FL1
1
FUSB_PP4 FCM1608K-121T06 1U_1
0V_06 .1u_16V_04
2
FUSB_PN4 FGPIO0/I NT FR19 1.5K_04
FJ_FP1
1
3
4 FGND
FUSB_PP1_R FR20 27.4_1%_04 FUSB_PP4
4
FESD_GND FGND
85201-04051
FC22
47p_50V_04
FTC_VDD
FGND
FDATA2 FR1 47K_04
FU1 FDATA1 FR2 47K_04

FUSB_PN1_R FR17 27.4_1%_04 FUSB_PN4

A1 FESD_RING FDATA0 FR3 47K_04
EXT_RING2
B1 FGRID0/SENSE FR18 FC19 FGPIO1 FR4 330K_04

CRIDO
C1 100K_04 47p_50V_04 FMISO/MODE3 FR5 47K_04
RING FESD_GND
D1 Z3701 FC1 33p_50V_04
MUXOUT FGND
Sheet 37 of 37
FGND
E1 FGND FGND
AVDD FAVDD
F1 FMCS
FingerPrint Board
MCS FC3 1U_10V_
06
FGND
6-04-25128-490
G1 FTC_VDD
PAD_VDD1B FU2
FTC_VDD
H1 FMISO/MODE3 FMI SO/MODE3 5 8
MISO S VDD
FC4 .1u_16V_04 FMOSI 2
FGND Q
J1 FMCS 1
DVDD FMCLK 6 CS#
FDVDD1 SCK
A2 FGPIO1 3 FC2
GPI O1 WP#
B2 .1u_16V_04
AGND
C2 FDATA0 4 7
DATA0 VSS HOLD#
D2 FDATA1 AT25128A
DATA1 FGND FGND
E2 FGPIO0/INT
GPI O0
F2 FMCLK
MCLK 1201
G2 FUSB_PN1_R
USB_DN
H2 FUSB_PP1_R
USB_DP
FC17 FR15
MOSI
J2 FMOSI .1u_
25V_X
7R_06 100_06 10MIL FU4
FGRI D0/SENSE Z3706 FESD_RING 1
A3 FPD_REG 3
PD_REG F3.3V 2
B3 FNRESET FR1
0 47K_04
NRESET FTC_VDD
FR16 FC18 RClamp0502B
C3 FC1
0 .1u_16V_04 FQ1
DGND FGND
NDS35
2AP_NL 330K_06 *18P_50V_06
S
D3 FDATA2 FG_FET G FR22
DATA2
E3 FESD_RING *0_0
6
EXT_RING1
FC5
FTC_VDD
D
F3 FGND
PVDD FAVDD
FC1
2 1U_10V_
06 .022u_1
6V_04
FGND
G3 FXIN
XTALI N
FTC_VDD
FR6 15_
06 FU4.2 pin must
H3 connect to GND
PGND FGND 2 1 F3. 3
V F3. 3
V
FC7 FC8
XTALOUT
J3 FXOUT
3 4 FGND
FR9 FC9 copper on Top
1U_10V_06 .1u_16V_04 .1u_16V_04
TCS4B FX1 33_0
6
layer
FGND
E
HSX531S_12MHz
FGND B FQ2
FDVDD1
FR14 *47K_04 2SB1198
KR/ T1
46 FGND FU3 FR11 FR21 FC23
1 8
A# VCC
C
FC1
5 FC16 FC11 330K_04 *4
7K_04 *.1U_16V_
04
Z3702 2
B
1
8p_50V_06 18p_50V_06 1U_10V_06 7 Z3703
Rx/Cx FPD_REG
FR12 FC14 3 6 Z3704
F3. 3
V CLR# Cx
FGND FGND FC13 2
. 2U_6.3V_
06
C
FGND 10
0K_04 1U_10V_06
4 5 Z3705 FR13 10K_04 FG_FET FR23 FD1
GND Q
*SCS551V
0_04
SN74LVC1G12
3DCT
A
FGND FGND
FESD_GND FGND
M 548SS/M 549SS Only.
B - 38 FingerPrint Board

MV-4 94V-0 Schematic Digram

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MV-4 94V-0 Schematic Digram

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Schematic Diagrams

Appendix B: Schematic Diagrams

Diagram - Page Diagram - Page Diagram - Page Table B - 1

SiSM672 DRAM 2/5 - Page B - 6 SiS307ELV - Page B - 19 1.8V, 0.9VS - Page B - 32

System Block Diagram

D/D BOARD SYSTEM POWER,2.5V

Diagram CLICK BOARD

Check cap for santa rosa platform

B14 VCC[013] VCC[080] AD14 B24 VSS[015] VSS[096] V2

1.05VS 2,4, 6,7,16,30

SiSM672 HOST PCIE 1/5

SiSM672 HOST PCIE 1/5 B - 5

SiSM672 DRAM 2/5

9,10 M_A_DQ[63: 0] U13B

Sheet 5 of 37 NC5 NC_04 M_A_DQ23 AL31 MD22A AM23

SiSM672 DRAM 2/5

B - 6 SiSM672 DRAM 2/5

SiSM672 MuTITOL VGA 3/5

C 211 C2 2 9 C 23 9 C 461 C 130 C1 4 6 C 469 C4 6 8 C 46 7

SiSM672 MuTITOL VGA 3/5 B - 7

SiSM672 PWR 4/5

AN23 VCC M IVDD U1 3

Sheet 7 of 37 C2 01 C202 C198 C2 10 AB13 VCC 1.8 IVDD AB14

SiSM672 PWR 4/5

B - 8 SiSM672 PWR 4/5

SiSM672 GND 5/5

SiSM672 GND 5/5

H18 H19 H1 H2 H17

SiSM672 GND 5/5 B - 9

DDRII SO-DIMM - 2 147 DM4 DQ25 73 M_A_DQ26

C1 70 & C7 4 2 C o- la yout 0.1u_16V_04

1.8VC1 71 & C7 4 3 C o- la yout

1.8V 5,7,10,14,15,16,20,27, 30, 31

1K_1%_04 0.1u_10V_X7R_04 1U_6.3V_04

2,15,21, 25,26,27,29,31 VDD3

LAN PHY Realtek 8201CL

Close to R TL820 1CL 25 32

R42 0_04 RXD1_PHY_R 20

14 COL_PHY CRS_PHY COL TPRX-

75_1%_04 75_1%_04 75_1%_04 75_1%_04

R37 5.1K_04 LED_TX

R39 5.1K_04 CRS_PHY

LAN PHY Realtek 8201CL B - 13

968 PCI IDE MuTIOL SPI 1/4

968 PCI IDE

MuTIOL SPI 1/4

R292 56_04 SZCMP_N AB24

B - 14 968 PCI IDE MuTIOL SPI 1/4

968 PCIE LAN GPIO 2/4

968 PCIE LAN GPIO

21 SWI# GPIO8/ RING GPIO1/LDRQ1#/PCIE_HOTPLUG SB_BLON 25 AUX_PWROK 6,12

968 PCIE LAN GPIO 2/4 B - 15

968 USB SATA 3/4

USB0: Port0 On Board

USB7: FINGER PRINTER

24 USB_OC3# USB_OC4# OC3#

968 USB SATA 3/4 C415 C419 H16 UVDD1

F22 AC1 ISW1 R1

VCC_RTC PCI E_WAKE# R1

B - 16 968 USB SATA 3/4

968 PWR GND 4/4

968 PWR GND 4/4

968 PWR GND 4/4 B - 17

Clock Generator & Clock Buffer