CLEVO P670HP6 (-G) P671HP6 (-G) (P670HP6 Skylake) 6-71-P65P0-D02A

Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the P670HP6(-G) / P671HP6(-G) notebook’s PCB’s. The following table indi-
cates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 Frame Buffer Partition C_D - Page B - 26 M.2 3G/LTE - Page B - 50 VCC_Core & VCCSA - Page B - 74 Table B - 1
Processor 1/7 - Page B - 3 GPU Decoupling 1 - Page B - 27 Realtek ALC898 - Page B - 51 VCore Output Stage - Page B - 75 SCHEMATIC
Processor 2/7 - Page B - 4 GPU Decoupling 2 - Page B - 28 TPA2008D2 - Page B - 52 VCCGT - Page B - 76 DIAGRAMS
Processor 3/7 - Page B - 5 Straps & XTAL - Page B - 29 Subwoofer - Page B - 53 VCCGT Output Stage - Page B - 77
B.Schematic Diagrams
Processor 4/7 - Page B - 6 IFP I/O Interface - Page B - 30 AR_TBT - Page B - 54 Audio Board P65_ESS_A 1/3 - Page B - 78
Processor 5/7 - Page B - 7 Misc - GPIO, I2C and ROM - Page B - 31 AR_Power - Page B - 55 Audio Board P65_ESS_A 2/3 - Page B - 79
Processor 6/7 - Page B - 8 NVIDIA Power Sequence - Page B - 32 TPS65982 - Page B - 56 Audio Board P65_ESS_A 3/3 - Page B - 80
Processor 7/7 - Page B - 9 GPIO Level Shift - Page B - 33 TPS65982-1 - Page B - 57 Audio Board P67_3DAMP_E - Page B - 81
DDR CHA SO-DIMM_0 - Page B - 10 GPU NVVDD, FBVDDQ - Page B - 34 AR_Conn Type A/C - Page B - 58 P650RS Power Board - Page B - 82 
DDR CHA SO-DIMM_1 - Page B - 11 GPU GND - Page B - 35 TPM, CCD, TP - Page B - 59 P650RS HDD Board - Page B - 83
Version Note
DDR CHB SO-DIMM_0 - Page B - 12 PCH 1/9 - Page B - 36 Fan, LID, KB LED - Page B - 60 P650RS LED Board - Page B - 84
DDR CHB SO-DIMM_1 - Page B - 13 PCH 2/9 - Page B - 37 Connector - Page B - 61 P650RS FP Board - Page B - 85 The schematic dia-
grams in this chapter
Panel, Inverter - Page B - 14 PCH 3/9 - Page B - 38 DDR 1.2V / 0.6VS - Page B - 62 P650RS Click Board - Page B - 86
are based upon ver-
Mini DP Port E - Page B - 15 PCH 4/9 - Page B - 39 VDD3, VDD5 - Page B - 63 P650RS USB Board 1/3 - Page B - 87 sion 6-7P-P65SB-008.
Mini DP Port F + PS8330B - Page B - 16 PCH 5/9 - Page B - 40 5V, 5VS, 3.3V, 3.3VS, 3.3VA - Page B - 64 P650RS USB Board 2/3 - Page B - 88 If your mainboard (or
HDMI - Page B - 17 PCH 6/9 - Page B - 41 Power 1.0V, VCCIO - Page B - 65 P650RS USB Board 3/3 - Page B - 89 other boards) are a lat-
er version, please
VGA PCI Express - Page B - 18 PCH 7/9 - Page B - 42 AC_In, Charger - Page B - 66 P670RS LED Board - Page B - 90
check with the Service
VGA Frame Buffer Partition - Page B - 19 PCH 8/9 - Page B - 43 1.0DX_VCCSTG/VCCSFR_OC/2.5V - Page B - 67 P670RS USB Board 1/2 - Page B - 91 Center for updated di-
Frame Buffer Partition A - Page B - 20 PCH 9/9 - Page B - 44 1V8_RUN/AON, NV3V3 - Page B - 68 P670RS USB Board 2/2 - Page B - 92 agrams (if required).
Frame Buffer Partition B - Page B - 21 KBC IT8587 - Page B - 45 NVVDD Phase 1 & 2 - Page B - 69
Frame Buffer Partition A_B - Page B - 22 RGB KB Only - Page B - 46 NVVDD Phase 3~4 - Page B - 70
GPU Frame Buffer Partition - Page B - 23 USB Charger - Page B - 47 NVVDDS - Page B - 71
Frame Buffer Partition C - Page B - 24 M.2 WiGig/WLAN + BT - Page B - 48 PEX_VDD - Page B - 72
Frame Buffer Partition D - Page B - 25 M.2 PCIE4X SSD - Page B - 49 FBVDDQ - Page B - 73
B - 1
Schematic Diagrams
System Block Diagram

5 4 3 2 1
1.2V(VDDQ),0.6VS SHEET 61
P650 ESS AUDIO BOARD
6-71-P65S8-D02C NEW SHEET 77,78,79 P670HP6 Skylake System Block Diagram VDD3,VDD5 SHEET 62
P670 3DAMP AUDIO BOARD

EM370(D) 5V,3.3V,5VS,3VS SHEET 63
6-71-P67P8-D02B SHEET 80 6-7P-P65SB-008 VDD1.0,VCCIO SHEET 64
P650 POWER SW BOARD PCIE*16 <=4.5" 6-71-P65S0-D02C AC_IN,CHARGER SHEET 65
D 6-71-P65SC-D02 SHEET 81 27 MHz DDR4/1.2V/1866, 2133MHz D
P650 HDD BOARD N17E-G1 6,3GB H-processor <=4.5"

1.0DX_VCCSTG,VCCSFR_OC
(N17E-G2 8GB) VPP 2.5V SHEET 66
6-71-P65SN-D02A NEW SHEET 82
37.5x37.5mm PROCESSOR DDR4 1V8_AON,1V8_RUN SHEET 67
P650 LED BOARD 2152 Ball SHEET 17~34 NV3V3
BGA1440 SO-DIMM*4
6-71-P65S4-D02 SHEET 83 <=6" SHEET 9,10,11,12
SHEET 2,3,4,5,6,7,8 NVVDD SHEET 68~69
P650 F/P BOARD Mini DP SHEET 14,15
NVVDDS SHEET 70
6-71-P65SF-D01A SHEET 84 HDMI2.0 SHEET 16
AUDIO BOARD 5.1 channel PEX_VDD
eDP <=6" DMI*4 SHEET 77,78,79
SHEET 71
P650 CLICK BOARD PS8331B <=7"
SHEET 85
PANEL SPDIF FBVDDQ SHEET 72
6-71-P65S2-D02
SHEET 13 SHEET 3 OUT
P650 USB BOARD ES9018K2M VCC_CORE,VCCSA SHEET 73
6-71-P65S3-D02A NEW SHEET 86~88
VCORE OUTPUT STAGE SHEET 74
Sheet 1 of 91 C P670 LED BOARD
LME49720 Hi-Fi
HP VCCGT SHEET 75 C
6-71-P67S4-D02A SHEET 89 H Platform OPA1622

System Block P670 USB BOARD
K'B BACKLIGHT 32.768KHz
Controller LME49720
OUT
Diagram 6-71-P67S3-D02C NEW SHEET 90,91 SHEET 45

Hub (PCH-H)
EC
I2C SV3S700A
MIC
TOUCH PAD SPI(Option)
SHEET 44
TPM2.0 24MHz HM170/CM236 IN
(Option) TPA2008D2 Front L
SHEET57 (RESERVE) Front R
SHEET 57 SHEET 51
23x23mm FCBGA Azalia Codec
EC
ITE 8587A 33 MHz LPC AZALIA LINK REALTEK
ALC892/898 INT MIC APA2607QBI
(512KB ROM) SHEET 35~43 24 MHz SUBWOOFER
BIOS SHEET 50 SHEET 58 SHEET 52
SPI
SHEET 44
SHEET 35 For P67
EC SMBUS
B INT. K/B B
SHEET 44
THERMAL SMART SMART PCIE 100 MHz
SENSOR FANx3 BATTERY <8" <8" <8"
RT5
AC-IN TBT
NGFF M KEY NGFF A KEY RTL8411B
K/B Backlight SHEET 2 SHEET 59 SHEET 65 SSD WiGig PCIe P1~4
SHEET 59 USB 3.0 USB 2.0 PCIe P7, 8 PCIe P5 SHEET 53~57
5 Gbps 480 Mbps PCIe P9~12
SATA 0 (USB8) LAN CARD
2"~7" 3"~9" 1"~12" SHEET 47
SATA III 6.0Gb/s SHEET 48
SHEET 87 READER
25
SHEET 91 (P67) MHz
USB3.1 USB3.1
TYPE C TYPE C
SHEET 57 SHEET 57
RJ-45 2IN1
SATA HDD SATA HDD NGFF B KEY USB3.0 P5 SHEET 87
SOCKET
7mm 7mm CCD USB3.0 P1 NGFF M KEY SHEET 91 SHEET 87
SATA 2 SATA 1 FingerPrint 3G/LTE (USB1) SSD (USB4) SHEET 91
SHEET 37 (USB7) (USB9) SHEET 88
(P67) (P67)
(Optional) SHEET 58 USB3.0 P2 SHEET 46 SATA 1
HDD BOARD SHEET 85 12 MHz (USB6) (Charging) SHEET 92
SIM
SHEET 83 PCIe P17~20 (P67)
A SHEET 49 ONLY P65 A
SATA 4 SHEET 88
(CM236) LAN BOARD
FP on CLICK BOARD
SHEET 48
SHEET 86 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[01]BLOCK DIAGRAM
Size Document Number Rev
A3 P650RS 6-7P-P65SB-008 D02B
Date: Thursday, September 08, 2016 Sheet 1 of 91

5 4 3 2 1
B - 2 System Block Diagram

Schematic Diagrams
Processor 1/7
5 4 3 2 1
U59C SKYLAKE_HALO
BGA1440
E25 B25 PEG_TX_0 C863 0.22u_10V_X5R_04

17 PEG_RX0 PEG_RXP[0] PEG_TXP[0] PEG_TX0 17
D25 A25 PEG_TX#_0 C855 0.22u_10V_X5R_04
D 17 PEG_RX#0 PEG_RXN[0] PEG_TXN[0] PEG_TX#0 17 D
E24 B24 PEG_TX_1 C854 0.22u_10V_X5R_04
F24 C24 PEG_TX#_1 C849 0.22u_10V_X5R_04
17 PEG_RX#1 PEG_RXN[1] PEG_TXN[1] PEG_TX#1 17
E23 B23 PEG_TX_2 C846 0.22u_10V_X5R_04
D23 A23 PEG_TX#_2 C839 0.22u_10V_X5R_04
E22 B22 PEG_TX_3 C836 0.22u_10V_X5R_04
F22 C22 PEG_TX#_3 C830 0.22u_10V_X5R_04
E21 B21 PEG_TX_4 C825 0.22u_10V_X5R_04
D21 A21 PEG_TX#_4 C817 0.22u_10V_X5R_04
E20 B20 PEG_TX_5 C816 0.22u_10V_X5R_04
F20 C20 PEG_TX#_5 C808 0.22u_10V_X5R_04
E19 B19 PEG_TX_6 C806 0.22u_10V_X5R_04
D19 A19 PEG_TX#_6 C802 0.22u_10V_X5R_04
E18 B18 PEG_TX_7 C801 0.22u_10V_X5R_04
F18 C18 PEG_TX#_7 C792 0.22u_10V_X5R_04
D17 A17 PEG_TX_8 C791 0.22u_10V_X5R_04
E17 B17 PEG_TX#_8 C786 0.22u_10V_X5R_04
F16 C16 PEG_TX_9 C785 0.22u_10V_X5R_04
E16 B16 PEG_TX#_9 C782 0.22u_10V_X5R_04
D15 A15 PEG_TX_10 C779 0.22u_10V_X5R_04
C 17 PEG_RX10 PEG_RXP[10] PEG_TXP[10] PEG_TX10 17 C
E15 B15 PEG_TX#_10 C777 0.22u_10V_X5R_04
F14 C14 PEG_TX_11 C776 0.22u_10V_X5R_04
E14 B14 PEG_TX#_11 C774 0.22u_10V_X5R_04
17 PEG_RX12
17 PEG_RX#12
D13
E13 PEG_RXP[12]
PEG_RXN[12]
PEG_TXP[12]
PEG_TXN[12]
A13
B13
PEG_TX_12
PEG_TX#_12
PEG_TX_13
C772
C766
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX12 17
PEG_TX#12 17 Sheet 2 of 91
17 PEG_RX13 F12 C12 C764 0.22u_10V_X5R_04
Processor 1/7
PEG_RXP[13] PEG_TXP[13] PEG_TX#_13 PEG_TX13 17
17 PEG_RX#13 E12 B12 C760 0.22u_10V_X5R_04
PEG_RXN[13] PEG_TXN[13] PEG_TX#13 17
D11 A11 PEG_TX_14 C758 0.22u_10V_X5R_04
E11 B11 PEG_TX#_14 C757 0.22u_10V_X5R_04
F10 C10 PEG_TX_15 C756 0.22u_10V_X5R_04
VCCIO E10 B10 PEG_TX#_15 C754 0.22u_10V_X5R_04
R578 24.9_1%_04 PEG_COMP G2

PEG_RCOMP
D8 B8
36 DMI_IT_MR_0_DP DMI_RXP[0] DMI_TXP[0] DMI_MT_IR_0_DP 36
E8 A8
36 DMI_IT_MR_0_DN DMI_RXN[0] DMI_TXN[0] DMI_MT_IR_0_DN 36
E6 C6
F6 B6
B B
D5 B5
E5 A5
J8 D4
J9 B4
3 OF 14
SKL_H_CPU
REV = 1
3.3V
PLACE NEAR CPU
2
RT1
TH05-3H103FR
P/N 6-17-10320-731
1
A THERM_VOLT 44 A
R295
10K_1%_04
12/25 ፖECᒔᎁ,ፂ਍10K
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
[02] Processor 1/7-DMI/PEG
3.3V 13,31,46,47,49,54,58,60,61,63,64,66,67,71
VCCIO 3,7,64 A3 P650RS 6-71-P65S0-D02C D02C
Date: W ednesday, September 07, 2016 Sheet 2 of 91

5 4 3 2 1
Processor 1/7 B - 3
Schematic Diagrams
Processor 2/7
5 4 3 2 1
SKYLAKE_HALO
U59D
BGA1440
K36 D29 IEDP_TXP_0
K37 DDI1_TXP[0] EDP_TXP[0] E29 IEDP_TXN_0
J35 DDI1_TXN[0] EDP_TXN[0] F28 IEDP_TXP_1
J34 DDI1_TXP[1] EDP_TXP[1] E28 IEDP_TXN_1
H37 DDI1_TXN[1] EDP_TXN[1] B29 IEDP_TXN_2
D D
H36 DDI1_TXP[2] EDP_TXN[2] A29 IEDP_TXP_2
J37 DDI1_TXN[2] EDP_TXP[2] B28 IEDP_TXN_3
J38 DDI1_TXP[3] EDP_TXN[3] C28 IEDP_TXP_3
DDI1_TXN[3] EDP_TXP[3]
D27 C26 IEDP_AUX
E27 DDI1_AUXP EDP_AUXP B26 IEDP_AUX#
DDI1_AUXN EDP_AUXN
H34
H33 DDI2_TXP[0]
F37 DDI2_TXN[0] A33 EDP_DISP_UTIL
DDI2_TXP[1] EDP_DISP_UTIL VCCIO
G38
F34 DDI2_TXN[1]
F35 DDI2_TXP[2] D37 EDP_RCOMP R544 24.9_1%_04
E37 DDI2_TXN[2] EDP_RCOMP
E36 DDI2_TXP[3]
Width = 5mil CLOSE TO CPU
DDI2_TXN[3]
Space = 25mil
F26 lengh = 600mil(max)
E26 DDI2_AUXP
DDI2_AUXN
C34
D34 DDI3_TXP[0]
B36 DDI3_TXN[0]
B34 DDI3_TXP[1]
F33 DDI3_TXN[1]
DDI3_TXP[2] 3/29 ADD I2C ᒵሁᇞ PS8331 ᐙ᥼panel timing issue
Sheet 3 of 91 E33
C33
B33
DDI3_TXN[2]
DDI3_TXP[3]
DDI3_TXN[3] G27
3.3VS
AUD_AZACPU_SCLK 38
Processor 2/7 C
D02
A27
B27 DDI3_AUXP
DDI3_AUXN
4 OF 14
PROC_AUDIO_CLK
PROC_AUDIO_SDI
PROC_AUDIO_SDO
G25
G29
AUD_AZACPU_SDO_R 38 D02 PS8331_CTL_EN R760
R761
*4.7K_04
*0_04
C
AUD_AZACPU_SDI_R R190 20_1%_04

AUD_AZACPU_SDI 38
PS8331_IN2_PEQ# SKL_H_CPU
9,10,11,12,38 SMB_CLK_R R758 *0_04 CLOSE TO CPU
REV = 1 3.3VS
R759 *0_04 PS8331_IN1_PEQ#
9,10,11,12,38 SMB_DATA_R
PS8331_IN1_AEQ# R90 *4.7K_04
3/29 ADD I2C ᒵሁᇞ PS8331 ᐙ᥼panel timing issue
PS8331_IN2_AEQ# R91 *4.7K_04
3.3VS
PS8331_IN1_PEQ# R78 *4.7K_04
U4
R77 *4.7K_04
cap near the PS8331B 5*9mm
PS8331B(U4)
INTEL EDP R434 *0_04
IEDP_TXP_0 C283 0.1u_10V_X7R_04 IEDP_TXP_0_R 1
IN1_D0P VDD3
60 3.3VS
IEDP_HPD 13 IEDP_TXN_0 C282 0.1u_10V_X7R_04 IEDP_TXN_0_R 2 59 PS8331_IN1_AEQ#
R420 0_04 3 IN1_D0N IN1_AEQ# 58 PS8331_IN2_AEQ#
39 SB_IEDP_HPD IEDP_TXP_1 IEDP_TXP_1_R IN1_HPD IN2_AEQ#
C281 0.1u_10V_X7R_04 4 57
IEDP_TXN_1 C280 0.1u_10V_X7R_04 IEDP_TXN_1_R 5 IN1_D1P GND 56 PS8331_PI0 L :PORT1 (INTEL) (DEFAULT)
3/31 HPD‫طޏ‬8331ᙁ‫נ‬ IEDP_TXP_2 C288 0.1u_10V_X7R_04 IEDP_TXP_2_R 6 IN1_D1N PI0 55 PS8331_PC1 H: PORT2 (NV)
IEDP_TXN_2 C287 0.1u_10V_X7R_04 IEDP_TXN_2_R 7 IN1_D2P PC1 54 PS8331_SW 3.3VS
IN1_D2N SW PS8331_SW 13,30,39,60
8 53 PS8331_CTL_EN
D02 IEDP_TXP_3 C279 0.1u_10V_X7R_04 IEDP_TXP_3_R 9 GND I2C_CTL_EN 52 PS8331_IN1_PEQ#
PS8331_IN2_PEQ# R71 *4.7K_04
IEDP_TXN_3 C278 0.1u_10V_X7R_04 IEDP_TXN_3_R 10 IN1_D3P IN1_PEQ/SDA_CTL 51 PS8331_IN2_PEQ# 3/29 ADD I2C ᒵሁᇞ PS8331 ᐙ᥼panel timing issue R70 *4.7K_04
C704 0.1u_10V_X7R_04 DEDP_D0_R 11 IN1_D3N IN2_PEQ/SCL_CTL
B NV EDP 29 DEDP_D0
C706 0.1u_10V_X7R_04 DEDP_D#0_R 12 IN2_D0P 50 PS8331_PD D02 B
29 DEDP_D#0 IN2_HPD IN2_D0N PD
R421 100K_04 13 49
C709 0.1u_10V_X7R_04 DEDP_D1_R 14 IN2_HPD VDD3 48 PS8331_CA_DET
3.3VS NEAR PIN 3.3VS
29 DEDP_D1 DEDP_D#1_R IN2_D1P CA_DET PS8331_CEXT PS8331_PI0
3/31 HPD‫طޏ‬8331ᙁ‫נ‬ C711 0.1u_10V_X7R_04 15 47 C255 2.2u_6.3V_X5R_04 R89 *4.7K_04
29 DEDP_D#1 DEDP_D2_R IN2_D1N CEXT
C712 0.1u_10V_X7R_04 16 46
29 DEDP_D2 DEDP_D#2_R IN2_D2P OUT_D0P DP_TXP0 13 R88 *4.7K_04
C713 0.1u_10V_X7R_04 17 45
29 DEDP_D#2 IN2_D2N OUT_D0N EDP_HPD DP_TXN0 13
18 44 EDP_HPD 13
C714 0.1u_10V_X7R_04 DEDP_D3_R 19 GND OUT_HPD 43
29 DEDP_D3 IN2_D3P OUT_D1P DP_TXP1 13 3.3VS
C717 0.1u_10V_X7R_04 DEDP_D#3_R 20 42
29 DEDP_D#3 IN2_D3N OUT_D1N DP_TXN1 13 R406
1V8_AON GND
41 EDP AUX PULL HI PS8331_PC0 R399 4.7K_04
3.3VS 21 40
VDD3 OUT_D2P DP_TXP2 13 *100K_04
22 39 R401 *4.7K_04
IN1_SDA OUT_D2N PS8331_PC0 DP_TXN2 13
23 38
24 IN1_SCL PC0 37
R449 IN2_SDA OUT_D3P DP_TXP3 13 3.3VS
25 36
IN2_SCL OUT_D3N DP_TXN3 13
eDP
10K_04 26
VDD3 VDD3
35 3.3VS NEAR PIN PS8331_PC1 R85 *4.7K_04
IEDP_AUX# C270 0.1u_10V_X7R_04 IEDP_AUX#_R 27 34 PS8331_REXT R67 4.99K_1%_04
IEDP_AUX C268 0.1u_10V_X7R_04 IEDP_AUX_R 28 IN1_AUXN REXT 33 R84 *4.7K_04
30 GPIO17_IFPD_HPD_R C262 0.1u_10V_X7R_04 DEDP_D_AUX#_SDA_R29 IN1_AUXP GND 32
29 DEDP_D_AUX#_SDA IN2_AUXN OUT_AUXP_SCL DP_AUX 13
D02 29 DEDP_D_AUX_SCL
C263 0.1u_10V_X7R_04 DEDP_D_AUX_SCL_R 30
IN2_AUXP OUT_AUXN_SDA
31
DP_AUX# 13
EDP L :PORT1 (INTEL)
3.3VS
C
H: PORT2 (NV) (DEFAULT)

100K_04 R69
B R469 *100K_04 DEDP_HPD 61 3.3VS PS8331_SW R81 *4.7K_04
DEDP_HPD 13 THERMAL_PAD
Q37 100K_04 R68
3/20 ආ᝜૞‫ޣ‬ၞၸ੡A2 R80 *4.7K_04
C746
C745
R468
BTN3904 PS8331BQFN60GTR-A2
E
M-SOT23-CBE QFN60-5X9MM 6-03-83316-031
NEAR PIN
A
3.3VS 3.3VS 3.3VS PS8331_CA_DET R64 1M_04 A
3.3VS 3.3VS
*220p_50V_NPO_04
220p_50V_NPO_04
100K_04
C276 C274 C253 C718 C723
0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04
PIN21 PIN26 PIN35 PIN49 PIN60 Title
[03] Processor 2/7-DISPLAY
16,27,28,30,31,32,33,39,67,68,70,71,72 1V8_AON Size Document Number Rev
2,7,64 VCCIO
9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 4 Processor 2/7
Schematic Diagrams
Processor 3/7
5 4 3 2 1
M_A_DQ[63:0] 9,10
?
SKYLAKE_HALO
U59B
11,12 M_B_DQ[63:0]
?
SKYLAKE_HALO BGA1440
U59A M_B_DQ0 BT11 AM9
BGA1440
M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_B_CLK_DDR0 11
M_A_DQ0 BR11 AN9
BR6 AG1 M_B_DQ2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_B_CLK_DDR#0 11
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CLK_DDR0 9 BT8 AM8
BT6 AG2 M_B_DQ3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] M_B_CLK_DDR#1 11
M_A_DQ2 DDR0_DQ[1] DDR0_CKN[0] M_A_CLK_DDR#0 9 BR8 AM7
BP3 AK1 M_B_DQ4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK_DDR1 11
M_A_DQ3 DDR0_DQ[2] DDR0_CKN[1] M_A_CLK_DDR#1 9 BP11 AM11
BR3 AK2 M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] M_B_CLK_DDR2 12
M_A_DQ4 DDR0_DQ[3] DDR0_CKP[1] M_A_CLK_DDR1 9 BN11 AM10
BN5 AL3 M_B_DQ6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] M_B_CLK_DDR#2 12
M_A_DQ5 DDR0_DQ[4] DDR0_CLKP[2] M_A_CLK_DDR2 10 BP8 AJ10
BP6 AK3 M_B_DQ7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] M_B_CLK_DDR3 12
M_A_DQ6 DDR0_DQ[5] DDR0_CLKN[2] M_A_CLK_DDR#2 10 BN8 AJ11
BP2 AL2 M_B_DQ8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3] M_B_CLK_DDR#3 12
M_A_DQ7 DDR0_DQ[6] DDR0_CLKP[3] M_A_CLK_DDR3 10 BL12
BN3 AL1 M_B_DQ9 DDR1_DQ[8]/DDR0_DQ[24]
D M_A_DQ8 DDR0_DQ[7] DDR0_CLKN[3] M_A_CLK_DDR#3 10 BL11 AT8 D
BL4 M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 11
M_A_DQ9 DDR0_DQ[8] BL8 AT10
BL5 AT1 M_B_DQ11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] M_B_CKE1 11
M_A_DQ10 DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 9 BJ8 AT7
BL2 AT2 M_B_DQ12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] M_B_CKE2 12
M_A_DQ11 DDR0_DQ[10] DDR0_CKE[1] M_A_CKE1 9 BJ11 AT11
BM1 AT3 M_B_DQ13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3] M_B_CKE3 12
M_A_DQ12 DDR0_DQ[11] DDR0_CKE[2] M_A_CKE2 10 BJ10
BK4 AT5 M_B_DQ14 DDR1_DQ[13]/DDR0_DQ[29]
M_A_DQ13 DDR0_DQ[12] DDR0_CKE[3] M_A_CKE3 10 BL7 AF11
BK5 M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS#0 11
M_A_DQ14 DDR0_DQ[13] BJ7 AE7
BK1 AD5 M_B_DQ16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] M_B_CS#1 11
M_A_DQ15 DDR0_DQ[14] DDR0_CS#[0] M_A_CS#0 9 BG11 AF10
BK2 AE2 M_B_DQ17 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] M_B_CS#2 12
M_A_DQ16 DDR0_DQ[15] DDR0_CS#[1] M_A_CS#1 9 BG10 AE10
BG4 AD2 M_B_DQ18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] M_B_CS#3 12
M_A_DQ17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] M_A_CS#2 10 BG8
BG5 AE5 M_B_DQ19 DDR1_DQ[18]/DDR0_DQ[50]
M_A_DQ18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_A_CS#3 10 BF8 AF7
BF4 M_B_DQ20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 11
M_A_DQ19 DDR0_DQ[18]/DDR0_DQ[34] BF11 AE8
BF5 AD3 M_B_DQ21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_B_ODT1 11
M_A_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 9 BF10 AE9
BG2 AE4 M_B_DQ22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] M_B_ODT2 12
M_A_DQ21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_A_ODT1 9 BG7 AE11
BG1 AE1 M_B_DQ23 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3] M_B_ODT3 12
M_A_DQ22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] M_A_ODT2 10 BF7
BF1 AD4 M_B_DQ24 DDR1_DQ[23]/DDR0_DQ[55]
M_A_DQ23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_A_ODT3 10 BB11 AH10
BF2 M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# 11,12
M_A_DQ24 DDR0_DQ[23]/DDR0_DQ[39] BC11 AH11
BD2 AH5 M_B_DQ26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_W E# 11,12
DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 9,10 BB8 AF8
M_A_DQ25 BD1 AH1 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# 11,12
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 9,10 M_B_DQ27 BC8
M_A_DQ26 BC4 AU1 DDR1_DQ[27]/DDR0_DQ[59]
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 9,10 M_B_DQ28 BC10 AH8
M_A_DQ27 BC5 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 11,12
DDR0_DQ[27]/DDR0_DQ[43] M_B_DQ29 BB10 AH9
M_A_DQ28 BD5 AH4 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 11,12
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# 9,10 M_B_DQ30 BC7 AR9
M_A_DQ29 BD4 AG4 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 11,12
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_W E# 9,10 M_B_DQ31 BB7
M_A_DQ30 BC1 AD1 DDR1_DQ[31]/DDR0_DQ[63]
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# 9,10 M_B_DQ32 AA11 AJ9
M_A_DQ31 BC2 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 11,12
DDR0_DQ[31]/DDR0_DQ[47] M_B_DQ33 AA10 AK6
M_A_DQ32 AB1 AH3 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 11,12
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 9,10 M_B_DQ34 AC11 AK5
M_A_DQ33 AB2 AP4 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 11,12
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 9,10 M_B_DQ35 AC10 AL5
M_A_DQ34 AA4 AN4 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 11,12
DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 9,10 M_B_DQ36 AA7 AL6
M_A_DQ35 AA5 AP5 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 11,12
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 9,10 M_B_DQ37 AA8 AM6
M_A_DQ36 AB5 AP2 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 11,12
C DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 9,10 M_B_DQ38 AC8 AN7 C
M_A_DQ37
Sheet 4 of 91
AB4 AP1 M_B_DQ39 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 11,12
M_A_DQ38 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 9,10 AC7 AN10
AA2 AP3 M_B_DQ40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 11,12
M_A_DQ39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_A6 9,10 W8 AN8
AA1 AN1 M_B_DQ41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 11,12
M_A_DQ40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 9,10 W7 AR11
V5 AN3 M_B_DQ42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A9 11,12
DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 9,10 V10 AH7
Processor 3/7
M_A_DQ41 V2 AT4 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 11,12
DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 9,10 M_B_DQ43 V11 AN11
M_A_DQ42 U1 AH2 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 11,12
DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 9,10 M_B_DQ44 W11 AR10
M_A_DQ43 U2 AN2 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 11,12
DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 9,10 M_B_DQ45 W10 AF9
M_A_DQ44 V1 AU4 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 11,12
DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 9,10 M_B_DQ46 V7 AR7
M_A_DQ45 V4 AE3 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 11,12
DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 9,10 M_B_DQ47 V8 AT9
M_A_DQ46 U5 AU2 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# 11,12
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 9,10 M_B_DQ48 R11
M_A_DQ47 U4 AU3 DDR1_DQ[48]
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# 9,10 M_B_DQ49 P11 AJ7
M_A_DQ48 R2 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY 11,12
DDR0_DQ[48]/DDR1_DQ[32] M_B_DQ50 P7 AR8
M_A_DQ49 P5 AG3 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# 11,12
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY 9,10 M_B_DQ51 R8
M_A_DQ50 R4 AU5 DDR1_DQ[51]
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# 9,10 M_B_DQ52 R10
M_A_DQ51 P4 DDR1_DQ[52] M_B_DQS#[3:0] 11,12
DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ53 P10 BP9 M_B_DQS#0
M_A_DQ52 R5 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2]
DDR0_DQ[52]/DDR1_DQ[36] M_A_DQS#[3:0] 9,10 M_B_DQ54 R7 BL9 M_B_DQS#1
M_A_DQ53 P2 BR5 M_A_DQS#0 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3]
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_B_DQ55 P8 BG9 M_B_DQS#2
M_A_DQ54 R1 BL3 M_A_DQS#1 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6]
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_B_DQ56 L11 BC9 M_B_DQS#3
M_A_DQ55 P1 BG3 M_A_DQS#2 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_B_DQS#[7:4] 11,12
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_B_DQ57 M11 AC9 M_B_DQS#4
M_A_DQ56 M4 BD3 M_A_DQS#3 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2]
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS[7:4] 9,10 M_B_DQ58 L7 W9 M_B_DQS#5
M_A_DQ57 M1 AB3 M_A_DQS4 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3]
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] M_B_DQ59 M8 R9 M_B_DQS#6
M_A_DQ58 L4 V3 M_A_DQS5 DDR1_DQ[59] DDR1_DQSN[6]
DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQ60 L10 M9 M_B_DQS#7
M_A_DQ59 L2 R3 M_A_DQS6 DDR1_DQ[60] DDR1_DQSN[7]
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M_B_DQ61 M10
M_A_DQ60 M5 M3 M_A_DQS7 DDR1_DQ[61] M_B_DQS[3:0] 11,12
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQ62 M7 BR9 M_B_DQS0
M_A_DQ61 M2 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2]
DDR0_DQ[61]/DDR1_DQ[45] M_A_DQS[3:0] 9,10 M_B_DQ63 L8 BJ9 M_B_DQS1
M_A_DQ62 L5 BP5 M_A_DQS0 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BF9 M_B_DQS2
M_A_DQ63 L1 BK3 M_A_DQS1 DDR1_DQSP[2]/DDR0_DQSP[6]
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_B_CB0 AW11 BB9 M_B_DQS3
BF3 M_A_DQS2 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS[7:4] 11,12
DDR0_DQSP[2]/DDR0_DQSP[4] M_B_CB1 AY11 AA9 M_B_DQS4
B M_A_CB0 BA2 BC3 M_A_DQS3 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] B
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS#[7:4] 9,10 M_B_CB2 AY8 V9 M_B_DQS5
M_A_CB1 BA1 AA3 M_A_DQS#4 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] M_B_CB3 AW8 P9 M_B_DQS6
M_A_CB2 AY4 U3 M_A_DQS#5 DDR1_ECC[3] DDR1_DQSP[6]
DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] M_B_CB4 AY10 L9 M_B_DQS7
M_A_CB3 AY5 P3 M_A_DQS#6 DDR1_ECC[4] DDR1_DQSP[7]
DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] M_B_CB5 AW10
M_A_CB4 BA5 L3 M_A_DQS#7 DDR1_ECC[5]
DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] M_B_CB6 AY7 AW9
M_A_CB5 BA4 DDR1_ECC[6] DDR1_DQSP[8]
DDR0_ECC[5] M_B_CB7 AW7 AY9
M_A_CB6 AY1 AY3 DDR1_ECC[7] DDR1_DQSN[8]
M_A_CB7 AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3
DDR0_ECC[7] DDR0_DQSN[8]
DDR CHANNEL B
CLOSE TO CPU
R574 121_1%_04 DDR_RCOMP0 G1 BN13
DDR_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA DIMM_CA_CPU_VREF_A 9
DDR CHANNEL A R588 75_1%_04 BP13 DIMM_DQ_CPU_VREF_A
R591 100_1%_04 DDR_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13
DDR_RCOMP[2] 2 OF 14 DDR1_VREF_DQ DIMM_DQ_CPU_VREF_B 11
1 OF 14 REV = 1
SKL_H_CPU
?
REV = 1
SKL_H_CPU
?
A A
Title
[04] Processor 3/7-DDR3L
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
Processor 3/7 B - 5
Schematic Diagrams
Processor 4/7
5 4 3 2 1
NEAR CPU Θ CFG[0]: Stall reset sequence after PCU

PLL lock until de-asserted:
1.0V_VCCST — 1 = (Default) Normal Operation;
No stall.
— 0 = Stall.
U59E
?
SKYLAKE_HALO Θ CFG[1]: Reserved configuration lane.
Θ CFG[2]: PCI Express* Static x16 Lane
BGA1440 Numbering Reversal.
R281 R285 40 PCH_CPU_BCLK_R_DP B31 BN25
A32 BCLKP CFG[0] BN27 — 1 = Normal operation
100_04 56.2_1%_04 40 PCH_CPU_BCLK_R_DN BCLKN CFG[1] BN26 CFG2 — 0 = Lane numbers reversed.
D35 CFG[2] BN28 Θ CFG[3]: Reserved configuration lane.
D 40 PCH_CPU_PCIBCLK_R_DP D
PCI_BCLKP CFG[3]
40 PCH_CPU_PCIBCLK_R_DN C36
PCI_BCLKN CFG[4]
BR20 CFG4 R677 1K_04 Θ CFG[4]: eDP enable:
BM20 — 1 = Disabled.
73,75 H_CPU_SVIDDAT CFG[5]
40 CPU_24MHZ_R_DP E31 BT20 — 0 = Enabled.
73,75 H_CPU_SVIDALRT# CLK24P CFG[6]
40 CPU_24MHZ_R_DN D31 BP20 Θ CFG[6:5]: PCI Express* Bifurcation
73,75 H_CPU_SVIDCLK CLK24N CFG[7] BR23
R284 CFG[8] BR22
— 00 = 1 x8, 2 x4 PCI Express*
CFG[9] BT23 — 01 = reserved
220_04 CFG[10] — 10 = 2 x8 PCI Express*
BT22
CFG[11] BM19 — 11 = 1 x16 PCI Express*
CFG[12] BR19 Θ CFG[7]: PEG Training:
CFG[13] BP19 — 1 = (default) PEG Train
CPU_VIDALERT_N BH31 CFG[14] BT19
VIDALERT# CFG[15]
immediately following RESET# de
BH32 assertion.
BH29 VIDSCK BN23
VIDSOUT CFG[17] — 0 = PEG Wait for BIOS for
H_PROCHOT# R679 499_1%_04 H_PROCHOT#_R BR30 BP23
65,73,75 H_PROCHOT# PROCHOT# CFG[16] training.
BP22
Θ CFG[19:8]: Reserved configuration
BT13 CFG[19] BN22

61 DDR_VTT_PG_CTRL DDR_VTT_CNTL CFG[18] lanes.
BR27 SKL_XDP_MBP_0
BPM#[0] BT27 SKL_XDP_MBP_1
BPM#[1] BM31 SKL_MBP_2
VCCST_PW RGD R188 60.4_1%_04 VCCST_PW RGD_CPU H13 BPM#[2] BT30 SKL_MBP_3
VCCST_PWRGD BPM#[3]
38 H_PW RGD BT31

PROCPWRGD H_TDO
Sheet 5 of 91 37 PLTRST_CPU_N BP35 BT28

BM34 RESET# PROC_TDO BL32
37 H_PM_SYNC PM_SYNC PROC_TDI 1.0V_VCCST
R680 20_1%_04 H_PM_DOW N_R BP31 BP28
37 H_PM_DOW N H_PECI_R PM_DOWN PROC_TMS H_TCK
R683 *12.1_1%_04 BT34 BR28
37 PCH_PECI PECI PROC_TCK
Processor 4/7 C R682 *0402_short J31 H_TDO R290 51_04 C

TO EC 44 H_PECI THERMTRIP# BP30 H_TRST#
37 PCH_THERMTRIP# PROC_TRST# H_TRST# 43
H_SKTOCC_N BR33 BL30 H_PREQ# H_TCK R678 51_04
39 H_SKTOCC_N SKTOCC# PROC_PREQ# H_PREQ# 43
PROC_SELECT# BN1 BP27 H_PRDY#
PROC_SELECT# PROC_PRDY# H_PRDY# 43
BM30
CATERR# BT25 CFG_RCOMP
CFG_RCOMP 3.3VA
H_SKTOCC_N R681 100K_04

5 OF 14 R674
SKL_H_CPU REV = 1 49.9_1%_04

?
1.0V_VCCST
VDD3 R135 VCCST_PWRGD

PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
1K_04
VCCST_PW RGD
1: (DEFAULT)NORMAL OPERATION;
R140
LANE# DEFINITION MATCHES
100K_04 CFG2 SOCKET PIN MAP DEFINITION
3
D 0: LANE REVERSAL
B C331 B
5 G *0.01u_16V_X7R_04
S Q13B
4
MTDK3S6R DISPLAY PORT PRESENCE STRAP
6
R143 0_04 2 G 1: DISABLED;

13,43,44,73,75 ALL_SYS_PW RGD S Q13A
NO PHYSICAL DISPLAY PORT ATTACHED
1
MTDK3S6R
C336 TO EMBEDDED DISPLAY PORT
*0.1u_10V_X7R_04 0: ENABLED;
CFG4 AN EXTERNAL DISPLAY
IS CONNECTED TO THE
PORT DEVICE
EMBEDDED
DISPLAY PORT
PCIE PORT BIFURCATION STRAPS
11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1.0DX_VCCSTG CFG[6:5] 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
H_PROCHOT# R684 1K_04
DEFENSIVE PULL DOWN SITE

D
Q23
A G C973 1: (Default) PEG Train immediately following xxRESETB de assertion A

44 H_PROCHOT_EC
2SK3018S3 CFG7 0: PEG Wait for BIOS for training
S
47p_50V_NPO_04
R688
100K_04 3.3VA 35,36,37,38,39,41,43,63 Title
CAD Note: Capacitor need to be placed
[05]Processor 4/7-CLK/JTAG/MISC
1.0DX_VCCSTG 7,65,66
close to buffer output pin 1.0V_VCCST 7,37,38,64,73,75 Size Document Number Rev
VDD3 30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72
VCCIO 2,3,7,64
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 6 Processor 4/7
Schematic Diagrams
Processor 5/7
5 4 3 2 1
PLACE CAPS AT BOARD EDGE

?
VCORE CPU_TOP_VCCCORE VCORE U59G SKYLAKE_HALO VCORE
?
SKYLAKE_HALO
U59J
BGA1440
BGA1440
AA13 V32
C522 C523 AA31 VCC VCC V33 BJ17
C562 C536 AA32 VCC VCC V34 BJ19 VCCOPC
VCC VCC VCCOPC
22u_6.3V_X6S_08
22u_6.3V_X6S_08
+ + AA33 V35 BJ20
AA34 VCC VCC V36 BK17 VCCOPC
VCC VCC VCCOPC
*EEFCX0J221YR
*EEFCX0J221YR
AA35 V37 BK19
AA36 VCC VCC V38 BK20 VCCOPC
D VCORE D
AA37 VCC VCC W13 BL16 VCCOPC
AA38 VCC VCC W14 BL17 VCCOPC
AB29 VCC VCC W29 BL18 VCCOPC
C505 C490 C489 C504 AB31 VCC VCC W31 BL20 VCCOPC
D02A
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ D02A AB35 VCC VCC W35 BM17 VCCOPC

(ᄵ৫ߓᑇ) 6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ VCC VCC VCCOPC
(ᄵ৫ߓᑇ) AB36 W36 BN17
AB37 VCC VCC W37 VCCOPC
AB38 VCC VCC W38 BJ23
AC13 VCC VCC Y29 BJ26 RSVD
AC14 VCC VCC Y30 BJ27 RSVD
AC29 VCC VCC Y31 BK23 RSVD
PLACE CAPS AT BACK VCC VCC RSVD
AC32 Y34 BL23
AC33 VCC VCC Y35 BL24 RSVD
VCORE
CPU_BACK_VCCCORE VCC VCC RSVD
AC34 Y36 BL25
AC35 VCC VCC L14 BL26 RSVD
AC36 VCC VCC P29 BL27 RSVD
AD13 VCC VCC P30 BL28 RSVD
C509 C508 C493 C510 C511 C492 C507 AD14 VCC VCC P31 BM24 RSVD
AD31 VCC VCC P32 RSVD
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
AD32 VCC VCC P33

AD33 VCC VCC P34 BL15
VCC VCC VCCOPC_SENSE
Sheet 6 of 91
AD34 P35 BM16
AD35 VCC VCC P36 VSSOPC_SENSE
AD36 VCC VCC R13 BL22
D02A BCN VCC VCC RSVD
C
ᄵ৫ߓᑇլߩ AD37 R31 BM22 C
AD38 VCC VCC R32 RSVD
thermal‫ޗޏ‬ᔆ
AE13
AE14
AE30
VCC
VCC
VCC
VCC
VCC
VCC
R33
R34
R35
BP15
BR15 VCCEOPIO
Processor 5/7
AE31 VCC VCC R36 BT15 VCCEOPIO
AE32 VCC VCC R37 VCCEOPIO
AE35 VCC VCC R38 BP16
AE36 VCC VCC T29 BR16 RSVD
AE37 VCC VCC T30 BT16 RSVD
VCORE AE38 VCC VCC T31 RSVD
AF35 VCC VCC T32
AF36 VCC VCC T35 BN15
AF37 VCC VCC T36 BM15 VCCEOPIO_SENSE
C519 C514 C515 C498 C517 C520 C484 C506 C472 C516 VCC VCC VSSEOPIO_SENSE
AF38 T37
K13 VCC VCC T38 BP17
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
K14 VCC VCC U29 BN16 RSVD

L13 VCC VCC U30 RSVD
N13 VCC VCC U31
N14 VCC VCC U32 BM14
N30 VCC VCC U33 BL14 VCC_OPC_1P8
N31 VCC VCC U34 VCC_OPC_1P8
N32 VCC VCC U35 BJ35
N35 VCC VCC U36 BJ36 RSVD
D02A BCN VCC VCC RSVD
ᄵ৫ߓᑇլߩΔthermal‫ޗޏ‬ᔆ N36 V13
N37 VCC VCC V14
N38 VCC VCC V31 AT13
P13 VCC VCC P14 AW13 ZVM#
VCC VCC MSM#
B AU13 B
AY13 ZVM2#
AG37 MSM2#
VCC_SENSE VCC_VCORE_SENSE 73
AG38 BT29
VSS_SENSE VSS_VCORE_SENSE 73 OPC_RCOMP
BR25
BP25 OPCE_RCOMP
7 OF 14 OPCE_RCOMP2
10 OF 14
SKL_H_CPU REV = 1 ?
SKL_H_CPU
REV = 1 ?
VCC_VCORE_SENSE R271 VSS_VCORE_SENSE

*49.9_1%_04
A A
VCORE 73,74
Title
[06] Processor 5/7-POWER1
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
Processor 5/7 B - 7
Schematic Diagrams
Processor 6/7
5 4 3 2 1
PLACE CAP BACKSIDE
VCCVDDQ_CLK 1.0V_VCCSFR 1.0V_VCCST

VCCSA VDDQ
?
SKYLAKE_HALO
U59I C481 C475 C473
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
BGA1440
J30 AA6
VCCSA VDDQ ?
SKYLAKE_HALO
K29 AE12 U59K
K30 VCCSA VDDQ AF5
K31 VCCSA VDDQ AF6 BGA1440
K32 VCCSA VDDQ AG5 D1 BM33

VCCSA VDDQ D02A BCN D02A BCN RSVD_TP RSVD_TP
D K33 AG9 ᄵ৫ߓᑇլߩ E1 BL33 D
VCCSA VDDQ ᄵ৫ߓᑇլߩ thermal‫ޗޏ‬ᔆ RSVD_TP RSVD_TP
K34 AJ12 thermal‫ޗޏ‬ᔆ E3
K35 VCCSA VDDQ AL11 D02A BCN E2 RSVD_TP BJ14
VCCSA VDDQ ᄵ৫ߓᑇլߩ RSVD_TP RSVD_TP
L31 AP6 thermal‫ޗޏ‬ᔆ BJ13
L32 VCCSA VDDQ AP7 BR1 RSVD_TP
L35 VCCSA VDDQ AR12 BT2 RSVD_TP BK28
VCCSA VDDQ 1.0DX_VCCSTG VCCSFR_OC RSVD_TP RSVD
L36 AR6 BJ28
L37 VCCSA VDDQ AT12 BN35 RSVD
L38 VCCSA VDDQ AW6 RSVD BJ18
VCCSA VDDQ C476 C477 C589 C583 VSS
M29 AY6 J24
M30 VCCSA VDDQ J5 H24 RSVD BJ16
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
M31 VCCSA VDDQ J6 BN33 RSVD RSVD_TP BK16

M32 VCCSA VDDQ K12 BL34 RSVD RSVD_TP
M33 VCCSA VDDQ K6 RSVD
M34 VCCSA VDDQ L12 N29 BK24
M35 VCCSA VDDQ L6 R14 RSVD RSVD_TP BJ24
VCCIO VCCSA VDDQ RSVD RSVD_TP
M36 R6 AE29
VCCSA VDDQ T6 AA14 RSVD BK21
VDDQ W6 VCCVDDQ_CLK D02A BCN D02A BCN RSVD RSVD BJ21
VDDQ ᄵ৫ߓᑇլߩ ᄵ৫ߓᑇլߩ RSVD
AG12 VCCSFR_OC thermal‫ޗޏ‬ᔆ thermal‫ޗޏ‬ᔆ R543 *0402_short A36
G15 VCCIO Y12 A37 RSVD BT17
G17 VCCIO VDDQC RSVD RSVD BR17
G19 VCCIO BH13 H23 RSVD
VCCIO VCCPLL_OC 43 PCH_2_CPU_TRIGGER PROC_TRIGIN
G21 G11 R189 30.1_1%_04 CPU_2_PCH_TRIGGER_R J23 BK18
Sheet 7 of 91 H15
H16
H17
VCCIO
VCCIO
VCCIO
VCCPLL_OC
H30
1.0V_VCCST
1.0DX_VCCSTG VCCFUSEPRG
43 CPU_2_PCH_TRIGGER
TP_SKL_F30
TP_SKL_E30
F30
E30
PROC_TRIGOUT
RSVD
VSS
RSVD_TP
BJ34
BJ33
H19 VCCIO VCCST RSVD RSVD_TP
Processor 6/7 C
H20
H21
H26
VCCIO
VCCIO
VCCIO
VCCSTG
H29
G30
R232 *28mil_short-p
NEAR TO CPU PIN 1.0V_VCCSFR
B30
C30 RSVD
RSVD G13
C
H27 VCCIO VCCSTG G3 RSVD AJ8

J15 VCCIO H28 VCCIO J3 RSVD RSVD BL31
J16 VCCIO VCCPLL J28 RSVD RSVD
J17 VCCIO VCCPLL AROUND_CPU B2
VCCIO R234 NCTF
J19 B38
J20 VCCIO M38 NCTF BP1
VCCIO VCCSA_SENSE VCCSA_SENSE 73 100_1%_04 VCCVDDQ_CLK VDDQ NCTF
J21 M37 BR35 BR2
VCCIO VSSSA_SENSE VSS_SA_SENSE 73 RSVD NCTF
J26 BR31 C1
J27 VCCIO H14 VCCIO_SENSE BH30 RSVD NCTF C38
VCCIO VCCIO_SENSE J14 VSS_IO_SENSE RSVD NCTF
VSSIO_SENSE R235 *28mil_short-p 11 OF 14
R233
SKL_H_CPU
REV = 1 ?
100_1%_04
9 OF 14
SKL_H_CPU REV = 1 ? PLACE CAP IN BOARD EDGE PLACE CAP IN BACK SIDE
CPU_TOP_VCCSA VCCSA CPU_BACK_VCCSA VCCSA
VCCSA
PLACE CAP BACKSIDE VCCSA VCCSA

C886
VDDQ VCCIO C890 C889 C876 C875 C873 C888 C874
22u_6.3V_X5R_08
B B
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
C899 C892
C549 C550 C501 C548 C502 C479 C480
22u_6.3V_X6S_08
22u_6.3V_X5R_08
C840
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
+
220u_6.3V_SMD-D
*EEFCX0J221YR
D02A BCN
ᄵ৫ߓᑇլߩ
thermal‫ޗޏ‬ᔆ D02A
D02A BCN
ᄵ৫ߓᑇլߩ 6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ 9,10,11,12,38,61,66 VDDQ
thermal‫ޗޏ‬ᔆ (ᄵ৫ߓᑇ) 2,3,64 VCCIO
73,74 VCCSA
5,65,66 1.0DX_VCCSTG
66 VCCSFR_OC
64 1.0V_VCCSFR
5,37,38,64,73,75 1.0V_VCCST
A A
Title
[07] Processor 6/7-POWER2
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 8 Processor 6/7
Schematic Diagrams
Processor 7/7
5 4 3 2 1
VCCGT ?
U59M SKYLAKE_HALO
VCCGT VCCGT SKYLAKE_HALO
? BGA1440 U59N
? SKYLAKE_HALO BB4 AK30 BGA1440
SKYLAKE_HALO U59L BB3 VSS VSS AK29 ?
SKYLAKE_HALO
U59F U59H AJ29
BGA1440 BB2 VSS VSS AK4
AJ30 VCCGT
Y38
BGA1440
K1 C17 C25 BB1 VSS VSS AJ38 BG34 BGA1440 AF29
AV29 AJ31 VCCGT
Y37 VSS VSS J36 C13 VSS VSS C23 BA38 VSS VSS AJ37 BG35 VCCGT VCCGTX AF30
VCCGT AV30 AJ32 VCCGT
Y14 VSS VSS J33 C9 VSS VSS C21 BA37 VSS VSS AJ6 BG36 VCCGT VCCGTX AF31
Y13 VSS VSS J32 BT32 VSS VSS C19 BA12 VSS VSS AJ5 BH33 VCCGT VCCGTX AF32
Y9 VSS VSS J18 BT21 VSS VSS C8 BA9 VSS VSS AJ2 BH36 VCCGT VCCGTX AG13
VCCGT AV35 AK31 VCCGT
Y8 VSS VSS J10 BT18 VSS VSS C5 BA8 VSS VSS AJ1 BH37 VCCGT VCCGTX AG14
VCCGT AV36 AK32 VCCGT
Y7 VSS VSS J7 BT14 VSS VSS BM29 BA7 VSS VSS AH34 BH38 VCCGT VCCGTX AG31
VCCGT AW14 AK33 VCCGT
W34 VSS VSS J4 BT12 VSS VSS BM25 BA6 VSS VSS AH33 BJ37 VCCGT VCCGTX AG32
W33 VSS VSS H35 BT9 VSS VSS BM18 B9 VSS ? VSS AH12 BJ38 VCCGT VCCGTX AG33 del
W12 VSS VSS H32 BT5 VSS VSS BM11 AY34 VSS VSS AH6 BL36 VCCGT VCCGTX AG34
W5 VSS VSS H25 BR36 VSS VSS BM8 AY33 VSS VSS AG30 BL37 VCCGT VCCGTX AG35
D VCCGT AW34 AK37 VCCGT D
W4 VSS VSS H22 BR34 VSS VSS BM7 AY14 VSS VSS AG29 BM36 VCCGT VCCGTX AG36
W3 VSS VSS H18 BR29 VSS VSS BM5 AY12 VSS VSS AG11 BM37 VCCGT VCCGTX AH13
VCCGT AW36 AL13 VCCGT
W2 VSS VSS H12 BR26 VSS VSS BM3 AW30 VSS VSS AG10 BN36 VCCGT VCCGTX AH14
W1 VSS VSS H11 BR24 VSS VSS BL38 AW29 VSS VSS AG8 BN37 VCCGT VCCGTX AH29
V30 VSS VSS G28 BR21 VSS VSS BL35 AW12 VSS VSS AG7 BN38 VCCGT VCCGTX AH30
VCCGT AY29 AL31 VCCGT
V29 VSS VSS G26 BR18 VSS VSS BL13 AW5 VSS VSS AG6 BP37 VCCGT VCCGTX AH31
V12 VSS VSS G24 BR14 VSS VSS BL6 AW4 VSS VSS AF14 BP38 VCCGT VCCGTX AH32
V6 VSS VSS G23 BR12 VSS VSS BK25 AW3 VSS VSS AF13 BR37 VCCGT VCCGTX AJ13
U38 VSS VSS G22 BR7 VSS VSS BK22 AW2 VSS VSS AF12 BT37 VCCGT VCCGTX AJ14
U37 VSS VSS G20 BP34 VSS VSS BK13 AW1 VSS VSS AF4 BE38 VCCGT VCCGTX
U6 VSS VSS G18 BP33 VSS VSS BK6 AV38 VSS VSS AF3 BF13 VCCGT
VCCGT AY37 AM13 VCCGT
T34 VSS VSS G16 BP29 VSS VSS BJ30 AV37 VSS VSS AF2 BF14 VCCGT
VCCGT AY38 AM14 VCCGT
T33 VSS VSS G14 BP26 VSS VSS BJ29 AU34 VSS VSS AF1 BF29 VCCGT
VCCGT BA13 AM29 VCCGT
T14 VSS VSS G12 BP24 VSS VSS BJ15 AU33 VSS VSS AE34 BF30 VCCGT
T13 VSS VSS G10 BP21 VSS VSS BJ12 AU12 VSS VSS AE33 BF31 VCCGT
T12 VSS VSS G9 BP18 VSS VSS BH11 AU11 VSS VSS AE6 BF32 VCCGT
T11 VSS VSS G8 BP14 VSS VSS BH10 AU10 VSS VSS AD30 BF35 VCCGT
T10 VSS VSS G6 BP12 VSS VSS BH7 AU9 VSS VSS AD29 BF36 VCCGT
VSS VSS VSS VSS VSS VSS VCCGT
T9 G5 BP7 BH6 AU8 AD12 BF37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA33 AM35
T8 G4 BN34 BH3 AU7 AD11 BF38 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA34 AM36
T7 F36 BN31 BH2 AU6 AD10 BG29 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA35 AN13
T5 F31 BN30 BG37 AT30 AD9 BG30 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA36 AN14
VSS VSS VSS VSS VSS VSS VCCGT BB13 AN31
T2 F25 BN21 BF34 AR38 AD6 BG33 VCCGT VCCGT
T1 F23 BN20 BF6 AR37 AC38 BC36 VCCGT VCCGT
R30 F21 BN19 BE30 AR14 AC37 BC37 VCCGT VCCGT
R29 F19 BN18 BE5 AR13 AC12 BC38 VCCGT VCCGT
R12 F17 BN14 BE4 AR5 AC6 BD13 VCCGT VCCGT
P38
P37
P12
P6
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F15
F13
F11
F9
BN12
BN9
BN7
BN4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BE3
BE2
BE1
BD38
AR4
AR3
AR2
AR1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AC5
AC4
AC3
AC2
BD14
BD29
BD30
BD31
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
BB35
BB36
BB37
BB38
BC29
AN37
AN38
AP13
AP14
AP29
VCCGT
VCCGT
VCCGT
VCCGT
Sheet 8 of 91
N34 F8 BN2 BD37 AP34 AC1 BD32 VCCGT VCCGT
Processor 7/7
VSS VSS VSS VSS VSS VSS VCCGT BC30 AP30
N33 F5 BM38 BD12 AP33 AB34 BD33 VCCGT VCCGT
C VSS VSS VSS VSS VSS VSS VCCGT BC35 AP35 C
N10 F2 BM27 BD8 AP10 AA30 BD36 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE33 AP36
N9 E38 BM26 BD7 AP9 AA29 BE31 VCCGT VCCGT
N8 E35 BM23 BD6 AP8 AA12 BE32 VCCGT VCCGT
N7 E34 BM21 BC33 AN30 A30 BE37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE36 AR29
N6 E9 BM13 BC14 AN29 A28 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS AR30
N5 E4 BM12 BC13 AN12 A26 VCCGT
VSS VSS VSS VSS VSS VSS 8 OF 14 AR31
N4 D33 BM9 BC6 AN6 A24 VCCGT
VSS VSS VSS VSS VSS VSS AR32
N3 D30 BM6 BB30 AN5 A22 SKL_H_CPU REV = 1 ? VCCGT
VSS VSS VSS VSS VSS VSS AR33 AH38
N2 D28 BM2 BB29 AM38 A20 VCCGT VCCGT_SENSE VSSGTX_SENSE VCCGT_SENSE 75
N1 D26 BL29 BB6 AM37 A18 VCCGT VSSGTX_SENSE
M14 D24 BK29 BB5 AM12 A16 VCCGT VSSGT_SENSE VCCGTX_SENSE VSSGT_SENSE 75
M13 D22 BK15 AM5 A14 VCCGT VCCGTX_SENSE
VSS VSS VSS VSS VSS AT14
M12 D20 BK14 AM4 A12 VCCGT
M6 D18 BJ32 AM3 A10 VCCGT
L34 D16 BJ31 AM2 A9 VCCGT
L33 D14 BJ25 AM1 A6 VCCGT
L30 D12 BJ22 AL34 VCCGT
VSS VSS VSS VSS AT35
L29 D10 BH14 AL33 VCCGT
VSS VSS VSS C2 VSS AT36
K38 D9 BH12 NCTFVSS AL14 B37 VCCGT
VSS VSS VSS BT36 VSS NCTFVSS AT37
K11 D6 BH9 NCTFVSS AL12 B3 VCCGT
VSS VSS VSS BT35 VSS NCTFVSS AT38
K10 D3 BH8 NCTFVSS AL10 A34 VCCGT
VSS VSS VSS BT4 VSS NCTFVSS AU14
K9 C37 BH5 NCTFVSS AL9 A4 VCCGT
VSS VSS VSS BT3 VSS NCTFVSS AU29
K8 C31 BH4 NCTFVSS AL8 A3 VCCGT
VSS VSS VSS BR38 VSS NCTFVSS AU30
K7 C29 BH1 NCTFVSS AL7 VCCGT
VSS VSS VSS VSS AU31
K5 C27 BG38 AL4 VCCGT
VSS VSS VSS VSS AU32
K4 BG13 VCCGT
VSS VSS AU35
K3 D38 BG12 VCCGT
VSS NCTFVSS VSS 13 OF 14 AU36
K2 BF33 VCCGT
VSS VSS AU37
BF12 SKL_H_CPU REV = 1 ? VCCGT
6 OF 14 VSS AU38
BE29 PLACE CAP IN BACK SIDE VCCGT
VSS 14 OF 14
SKL_H_CPU REV = 1 ? BE6
BD9 VSS VCCGT SKL_H_CPU REV = 1 ?
BC34 VSS CPU_BACK_VCCGT
BC12 VSS
BB12 VSS
VSS 12 OF 14
C556 C575 C571 C573 C572
SKL_H_CPU REV = 1 ?
B D02A B
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ
(ᄵ৫ߓᑇ)
PLACE CAP IN BOARD EDGE VCCGT

VCCGT VCCGT
CPU_TOP_VCCGT
C950 C529 C961 C585 C587 C586 C966 C527 C588 C960 C528 C951 C540 C541
C576 C539 C558 C538 C577 C557
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
C608 C595
+ +
*EEFCX0J221YR
*EEFCX0J221YR
D02A BCN
D02A BCN D02A BCN D02A BCN D02A BCN ᄵ৫ߓᑇլߩ
VCCGT ᄵ৫ߓᑇլߩ ᄵ৫ߓᑇլߩ ᄵ৫ߓᑇլߩ ᄵ৫ߓᑇլߩ thermal‫ޗޏ‬ᔆ
thermal‫ޗޏ‬ᔆ thermal‫ޗޏ‬ᔆ thermal‫ޗޏ‬ᔆ thermal‫ޗޏ‬ᔆ
D02A
(ᄵ৫ߓᑇ)
C574 C581 C580 C578 C566 C530 C534 C537 C563 C542 C584 C531 C568 C579 C553 C545 C532
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
D02A BCN
ᄵ৫ߓᑇլߩ
thermal‫ޗޏ‬ᔆ
A A
75,76 VCCGT Title
[08] Processor 7/7-POWER/GND
C P650RS 6-71-P65S0-D02C D02C
Date: Wednesday, September 07, 2016 Sheet 8 of 91

5 4 3 2 1
Processor 7/7 B - 9
Schematic Diagrams
DDR CHA SO-DIMM_0

5 4 3 2 1
VTT_MEM
Channel A SO-DIMM 0[RAM1] J_DIMMA_2A

RVS TYPE BOT Short
H=4mm
VDDQ
163
J_DIMMA_2B
258
2.5V
160 VDD19 VTT

159 VDD18
137 8 VDD17
4 M_A_CLK_DDR0 CK0_T DQ0 M_A_DQ5 4,10 154 259
139 7 VDD16 VPP2
4 M_A_CLK_DDR#0 CK0_C DQ1 M_A_DQ1 4,10 153 257
138 20 VDD15 VPP1
4 M_A_CLK_DDR1 CK1_T DQ2 M_A_DQ3 4,10 148
140 21 VDD14
4 M_A_CLK_DDR#1 CK1_C DQ3 M_A_DQ6 4,10 147
4 VDD13 3.3VS
DQ4 M_A_DQ4 4,10 142
109 3 VDD12
4 M_A_CKE0 CKE0 DQ5 M_A_DQ0 4,10 141
110 16 VDD11
D 4 M_A_CKE1 CKE1 DQ6 M_A_DQ2 4,10 136 255 D
17 VDD10 VDDSPD
DQ7 M_A_DQ7 4,10 135
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 149 28 VDD9
4 M_A_CS#0 S0* DQ8 M_A_DQ11 4,10 130
DDR4_DRAMRST# 157 29 VDD8
4 M_A_CS#1 S1* DQ9 M_A_DQ10 4,10 129 C317 C773
10,11,12,38 DDR4_DRAMRST# 41 VDD7
DQ10 M_A_DQ14 4,10 124
155 42 VDD6
4 M_A_ODT0 ODT0 DQ11 M_A_DQ12 4,10 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
161 24 VDD5
4 M_A_ODT1 ODT1 DQ12 M_A_DQ9 4,10 118
25 VDD4
DQ13 M_A_DQ8 4,10 117
115 38 VDD3
4,10 M_A_BG0 BG0 DQ14 M_A_DQ15 4,10 112
113 37 VDD2
4,10 M_A_BG1 BG1 DQ15 M_A_DQ13 4,10 111
150 50 VDD1
4,10 M_A_BA0 BA0 DQ16 M_A_DQ17 4,10
145 49
4,10 M_A_BA1 BA1 DQ17 M_A_DQ16 4,10 GND1
62 MT1
DQ18 M_A_DQ18 4,10 GND2

144 63 MT2
4,10 M_A_A0 A0 DQ19 M_A_DQ22 4,10
133 46 PLACE NEAR TO PIN
4,10 M_A_A1 A1 DQ20 M_A_DQ20 4,10
132 45
4,10 M_A_A2 A2 DQ21 M_A_DQ21 4,10 251 252
131 58 VSS VSS
4,10 M_A_A3 A3 DQ22 M_A_DQ19 4,10 247 248
PLACE THE CAP CLOSE TO SODIMM 128 59 VSS VSS
4,10 M_A_A4 A4 DQ23 M_A_DQ23 4,10 243 244
126 70 VSS VSS
DDR_VREFCA_CHA_DIMM 4,10 M_A_A5 A5 DQ24 M_A_DQ24 4,10 239 238
127 71 VSS VSS
4,10 M_A_A6 A6 DQ25 M_A_DQ25 4,10 235 234
122 83 VSS VSS
4,10 M_A_A7 A7 DQ26 M_A_DQ30 4,10 231 230
125 84 VSS VSS
Sheet 9 of 91 C912
0.1u_10V_X7R_04
C915
*2.2u_6.3V_X5R_04
4,10 M_A_A8
4,10 M_A_A9
4,10 M_A_A10
4,10 M_A_A11
121
146
120
A8
A9
A10_AP
A11
DQ27
DQ28
DQ29
DQ30
66
67
79
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ31
4,10
4,10
4,10
4,10
227
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
214
119 80 VSS VSS
DDR CHA SO- VDDQ 4,10 M_A_A12
4,10 M_A_A13
4,10 M_A_W E#
4,10 M_A_CAS#
158
151
156
A12
A13
A14_WE*
DQ31
DQ32
DQ33
174
173
187
M_A_DQ26
M_A_DQ33
M_A_DQ37
M_A_DQ38
4,10
4,10
4,10
4,10
209
205
201
197
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
196
152 A15_CAS* DQ34 186
DIMM_0 C 4,10 M_A_RAS# M_A_DQ35 4,10 193 VSS VSS 192 C

R641 A16_RAS* DQ35 170
M_A_DQ32 4,10 189 VSS VSS 188
DQ36 169
*240_1%_04 M_A_DQ36 4,10 185 VSS VSS 184
114 DQ37 183
4,10 M_A_ACT# M_A_DQ39 4,10 181 VSS VSS 180
ACT* DQ38 182
M_A_DQ34 4,10 175 VSS VSS 176
143 DQ39 195
4,10 DDR0_A_PARITY M_A_DQ41 4,10 171 VSS VSS 172
116 PARITY DQ40 194
4,10 DDR0_A_ALERT# M_A_DQ44 4,10 167 VSS VSS 168
134 ALERT* DQ41 207
37 DIMM0_CHA_EVENT# M_A_DQ42 4,10 107 VSS VSS 106
DDR4_DRAMRST# 108 EVENT* DQ42 208
M_A_DQ47 4,10 103 VSS VSS 102
RESET* DQ43 191
M_A_DQ45 4,10 99 VSS VSS 98
DDR_VREFCA_CHA_DIMM 164 DQ44 190
M_A_DQ40 4,10 93 VSS VSS 94
VREFCA DQ45 203
M_A_DQ46 4,10 89 VSS VSS 90
254 DQ46 204
3,10,11,12,38 SMB_DATA_R M_A_DQ43 4,10 85 VSS VSS 86
253 SDA DQ47 216
2.5V 3,10,11,12,38 SMB_CLK_R M_A_DQ52 4,10 81 VSS VSS 82
SCL DQ48 215
M_A_DQ50 4,10 77 VSS VSS 78
000 166
SA2
DQ49
DQ50
228
M_A_DQ51 4,10 73 VSS VSS 72
260 229 VSS VSS
SA1 DQ51 M_A_DQ55 4,10 69 68
256 211 VSS VSS
C312 C320 SA0 DQ52 M_A_DQ54 4,10 65 64
212 VSS VSS
DQ53 M_A_DQ48 4,10 61 60
224 VSS VSS
10u_6.3V_X5R_06 1u_6.3V_X5R_04 M_A_DQ49 4,10 57 56
CHA_DIMM0=000 DQ54
DQ55
225
M_A_DQ53 4,10 51 VSS VSS 52
92 237 VSS VSS
CHA_DIMM1=001 91 CB0_NC DQ56 236
M_A_DQ57 4,10 47
VSS VSS
48
CB1_NC DQ57 M_A_DQ61 4,10 43 44
VTT_MEM CHB_DIMM0=010 101
CB2_NC DQ58
249
M_A_DQ58 4,10 39 VSS VSS 40
105 250 VSS VSS
CHB_DIMM1=011 88 CB3_NC DQ59 232
M_A_DQ63
M_A_DQ60
4,10
4,10
35
31 VSS VSS
36
30
87 CB4_NC DQ60 233
M_A_DQ56 4,10 27 VSS VSS 26
100 CB5_NC DQ61 245
C752 C319 M_A_DQ62 4,10 23 VSS VSS 22
104 CB6_NC DQ62 246
M_A_DQ59 4,10 19 VSS VSS 18
CB7_NC DQ63
B 10u_6.3V_X5R_06 1u_6.3V_X5R_04 M_A_DQS[7:0] 4,10 15 VSS VSS 14 B
12 13 M_A_DQS0 VSS VSS
VDDQ DM0*/DBI0* DQS0_T 9 10
DM1*/DBI1* DQS1_T M_A_DQS2 5 6
54 55 VSS VSS
75 76 VSS VSS
VDDQ 178 DM3*/DBI3* DQS3_T 179 M_A_DQS4
199 DM4*/DBI4* DQS4_T 200 M_A_DQS5
220 DM5*/DBI5* DQS5_T 221 M_A_DQS6
DM6*/DBI6* DQS6_T M_A_DQS7 VDDQ D4AR0-26001-1P40
C1009 241 242
+
96 DM7*/DBI7* DQS7_T 97
330uF_2.5V_12m_6.6*6.6*4.2 DM8*/DBI8* DQS8_T
M_A_DQS#0 M_A_DQS#[7:0] 4,10
11
DQS0_C 32 M_A_DQS#1 R608
DQS1_C
DQS2_C
53
74
M_A_DQS#2
M_A_DQS#3 1K_1%_04
ᔾDIMMጤ
ጤឭ࣋
DQS3_C 177 M_A_DQS#4
DQS4_C 3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
198 M_A_DQS#5
DQS5_C 219 M_A_DQS#6 DDR_VREFCA_CHA_DIMM
VDDQ DQS6_C M_A_DQS#7 DDR_VREFCA_CHA_DIMM 10
240
DQS7_C 95 C385 C914
162 DQS8_C R609
165 S2*/C0 10u_6.3V_X5R_06 *0.1u_10V_X7R_04
C964 C980 C946 C958 S3*/C1 1K_1%_04
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 D4AR0-26001-1P40 D02

6-86-24260-000 R626 1.8_1%_04
VDDQ 4 DIMM_CA_CPU_VREF_A
A
D02 C929 A
0.022u_16V_X7R_04
C366 C525 C560 C569 C599 C594 C593 C543
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 R610

24.9_1%_04
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size Title
7,10,11,12,38,61,66 VDDQ [09] DDR3 CHA SO-DIMM_0
10,11,12,61 VTT_MEM
10,11,12,66 2.5V Size Document Number Rev
3,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 10 DDR CHA SO-DIMM_0

Schematic Diagrams
DDR CHA SO-DIMM_1

5 4 3 2 1
Channel A SO-DIMM 1[RAM3] STD TYPE

H=4mm TOP Close to CPU
J_DIMMA_1A
137 8
4 M_A_CLK_DDR2 CK0_T DQ0 M_A_DQ5 4,9
139 7
4 M_A_CLK_DDR#2 CK0_C DQ1 M_A_DQ1 4,9
138 20 VTT_MEM
4 M_A_CLK_DDR3 CK1_T DQ2 M_A_DQ3 4,9
140 21
4 M_A_CLK_DDR#3 CK1_C DQ3 M_A_DQ6 4,9
4 VDDQ J_DIMMA_1B
DQ4 M_A_DQ4 4,9
109 3
4 M_A_CKE2 CKE0 DQ5 M_A_DQ0 4,9 2.5V
D 110 16 D
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 4 M_A_CKE3 CKE1 DQ6 M_A_DQ2 4,9 163 258
17 VDD19 VTT
DDR4_DRAMRST# DQ7 M_A_DQ7 4,9 160
149 28 VDD18
9,11,12,38 DDR4_DRAMRST# 4 M_A_CS#2 S0* DQ8 M_A_DQ11 4,9 159
157 29 VDD17
4 M_A_CS#3 S1* DQ9 M_A_DQ10 4,9 154 259
41 VDD16 VPP2
DQ10 M_A_DQ14 4,9 153 257
155 42 VDD15 VPP1
4 M_A_ODT2 ODT0 DQ11 M_A_DQ12 4,9 148
161 24 VDD14
4 M_A_ODT3 ODT1 DQ12 M_A_DQ9 4,9 147
25 VDD13 3.3VS
DQ13 M_A_DQ8 4,9 142
115 38 VDD12
4,9 M_A_BG0 BG0 DQ14 M_A_DQ15 4,9 141
113 37 VDD11
4,9 M_A_BG1 BG1 DQ15 M_A_DQ13 4,9 136 255
150 50 VDD10 VDDSPD
4,9 M_A_BA0 BA0 DQ16 M_A_DQ17 4,9 135
145 49 VDD9
4,9 M_A_BA1 BA1 DQ17 M_A_DQ16 4,9 130
62 VDD8
DQ18 M_A_DQ18 4,9 129 C323 C322
144 63 VDD7
4,9 M_A_A0 A0 DQ19 M_A_DQ22 4,9 124
133 46 VDD6
4,9 M_A_A1 A1 DQ20 M_A_DQ20 4,9 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
PLACE THE CAP CLOSE TO SODIMM 132 45 VDD5
4,9 M_A_A2 A2 DQ21 M_A_DQ21 4,9 118
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size 131 58 VDD4
DDR_VREFCA_CHA_DIMM 4,9 M_A_A3 A3 DQ22 M_A_DQ19 4,9 117
128 59 VDD3
9 DDR_VREFCA_CHA_DIMM 4,9 M_A_A4 M_A_DQ23 4,9 112
126 A4 DQ23 70
4,9 M_A_A5 M_A_DQ24 4,9 111 VDD2
127 A5 DQ24 71
4,9 M_A_A6 M_A_DQ25 4,9 VDD1
C913 C462 122 A6 DQ25 83
D02 4,9 M_A_A7
125 A7 DQ26 84
M_A_DQ30 4,9 GND1
4,9 M_A_A8 M_A_DQ27 4,9 MT1 GND2
*0.1u_10V_X7R_04 10u_6.3V_X5R_06 121 A8 DQ27 66
4,9 M_A_A9 M_A_DQ28 4,9 MT2
146 A9 DQ28 67
4,9 M_A_A10 A10_AP DQ29 M_A_DQ29 4,9 PLACE NEAR TO PIN
120 79
4,9 M_A_A11 A11 DQ30 M_A_DQ31 4,9 251 252
119 80 VSS VSS
4,9 M_A_A12 A12 DQ31 M_A_DQ26 4,9 247 248
C
VDDQ
4,9 M_A_A13
4,9 M_A_W E#
4,9 M_A_CAS#
158
151
156
152
A13
A14_WE*
A15_CAS*
DQ32
DQ33
DQ34
174
173
187
186
M_A_DQ33
M_A_DQ37
M_A_DQ38
4,9
4,9
4,9
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
244
238
234 C
Sheet 10 of 91
4,9 M_A_RAS# M_A_DQ35 4,9 231 VSS VSS 230
R267
240_1%_04
4,9 M_A_ACT#
114
A16_RAS*
ACT*
DQ35
DQ36
DQ37
DQ38
170
169
183
M_A_DQ32
M_A_DQ36
M_A_DQ39
4,9
4,9
4,9
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
DDR CHA SO-
182 VSS VSS
DIMM_1
DQ39 M_A_DQ34 4,9 213 214
143 195 VSS VSS
4,9 DDR0_A_PARITY PARITY DQ40 M_A_DQ41 4,9 209 210
116 194 VSS VSS
4,9 DDR0_A_ALERT# ALERT* DQ41 M_A_DQ44 4,9 205 206
134 207 VSS VSS
37 DIMM1_CHA_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_A_DQ42 4,9 201 202
108 208 VSS VSS
RESET* DQ43 M_A_DQ47 4,9 197 196
191 VSS VSS
DDR_VREFCA_CHA_DIMM 164 DQ44 M_A_DQ45 4,9 193 192
190 VSS VSS
VREFCA DQ45 M_A_DQ40 4,9 189 188
203 VSS VSS
DQ46 M_A_DQ46 4,9 185 184
254 204 VSS VSS
3,9,11,12,38 SMB_DATA_R SDA DQ47 M_A_DQ43 4,9 181 180
253 216 VSS VSS
3,9,11,12,38 SMB_CLK_R SCL DQ48 M_A_DQ52 4,9 175 176
215 VSS VSS
M_A_DQ50 4,9 171 172
001 166
SA2
DQ49
DQ50
228
M_A_DQ51 4,9 167 VSS VSS 168
260 229 VSS VSS
SA1 DQ51 M_A_DQ55 4,9 107 106
3.3VS 256 211 VSS VSS
SA0 DQ52 M_A_DQ54 4,9 103 102
212 VSS VSS
DQ53 M_A_DQ48 4,9 99 98
224
CHA_DIMM0=000 DQ54 225
M_A_DQ49 4,9 93 VSS
VSS
VSS
VSS
94
DQ55 M_A_DQ53 4,9 89 90
CHA_DIMM1=001 92
CB0_NC DQ56
237
M_A_DQ57 4,9 85 VSS VSS 86
91 236 VSS VSS
CHB_DIMM0=010 101 CB1_NC DQ57 249
M_A_DQ61 4,9 81
VSS VSS
82
CB2_NC DQ58 M_A_DQ58 4,9 77 78
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_A_DQ63 4,9 73 VSS VSS 72
M_A_DQ60 4,9 69 VSS VSS 68
87 CB4_NC DQ60 233
M_A_DQ56 4,9 65 VSS VSS 64
100 CB5_NC DQ61 245
M_A_DQ62 4,9 61 VSS VSS 60
104 CB6_NC DQ62 246
M_A_DQ59 4,9 57 VSS VSS 56
B CB7_NC DQ63 B
M_A_DQS[7:0] 4,9 51 VSS VSS 52
2.5V VDDQ DM0*/DBI0* DQS0_T 47 48
54 55 VSS VSS
75 76 VSS VSS
178 179 VSS VSS
C311 C747 199 200 VSS VSS
220 221 VSS VSS
10u_6.3V_X5R_06 1u_6.3V_X5R_04 241 242 VSS VSS
DM7*/DBI7* DQS7_T 19 18
96 97 VSS VSS
DM8*/DBI8* DQS8_T 15 14
M_A_DQS#[7:0] 4,9 9 VSS VSS 10
11 M_A_DQS#0 VSS VSS
VTT_MEM DQS0_C M_A_DQS#1 5 6
32 VSS VSS
DQS1_C M_A_DQS#2 1 2
53 VSS VSS
DQS2_C 74 M_A_DQS#3
DQS3_C 177 M_A_DQS#4
C753 C321 DQS4_C 198 M_A_DQS#5
DQS5_C M_A_DQS#6 D4AS0-26001-1P40
219
10u_6.3V_X5R_06 1u_6.3V_X5R_04 DQS6_C 240 M_A_DQS#7
DQS7_C 95
162 DQS8_C
165 S2*/C0
S3*/C1
D4AS0-26001-1P40
6-86-24260-002
9,11,12,66 2.5V
A 7,9,11,12,38,61,66 VDDQ A
9,11,12,61 VTT_MEM
3,9,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
VDDQ
D02
C494 C403 C512 C469 C430 C582 C424 C485 Title

[10] DDR3 CHA SO-DIMM_1
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size

A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
DDR CHA SO-DIMM_1 B - 11

Schematic Diagrams
DDR CHB SO-DIMM_0

5 4 3 2 1
VTT_MEM
Channel B SO-DIMM 0[RAM2]RSV TYPE

H=8mm BOT High VDDQ
163
160
J_DIMMB_2B
VDD19 VTT
258
2.5V
J_DIMMB_2A 159 VDD18

154 VDD17 259
M_B_DQ4 M_B_DQ[63:0] 4,12 VDD16 VPP2
137 8 153 257
4 M_B_CLK_DDR0 CK0_T DQ0 M_B_DQ0 VDD15 VPP1
139 7 148
4 M_B_CLK_DDR#0 CK0_C DQ1 M_B_DQ7 VDD14
138 20 147 3.3VS
4 M_B_CLK_DDR1 CK1_T DQ2 M_B_DQ3 VDD13
140 21 142
D 4 M_B_CLK_DDR#1 CK1_C DQ3 M_B_DQ1 JY SWAP DDR NET VDD12 D
4 141
109 DQ4 3 M_B_DQ5 136 VDD11 255
4 M_B_CKE0 CKE0 DQ5 M_B_DQ6 VDD10 VDDSPD
110 16 135
4 M_B_CKE1 CKE1 DQ6 M_B_DQ2 VDD9
17 130
149 DQ7 28 M_B_DQ9 129 VDD8 C315 C775
4 M_B_CS#0 S0* DQ8 M_B_DQ8 VDD7
157 29 124
41 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
155 DQ10 42 M_B_DQ13 118 VDD5
4 M_B_ODT0 ODT0 DQ11 M_B_DQ14 VDD4
161 24 117
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 25 112
115 DQ13 38 M_B_DQ11 111 VDD2
DDR4_DRAMRST# 4,12 M_B_BG0 BG0 DQ14 VDD1
9,10,12,38 DDR4_DRAMRST# 113 37 M_B_DQ12
4,12 M_B_BG1 BG1 DQ15 M_B_DQ16
150 50 GND1
4,12 M_B_BA0 BA0 DQ16 M_B_DQ17 MT1

145 49 GND2
4,12 M_B_BA1 BA1 DQ17 M_B_DQ21 MT2
62 PLACE NEAR TO PIN
144 DQ18 63 M_B_DQ23
4,12 M_B_A0 A0 DQ19 M_B_DQ18
133 46 251 252
4,12 M_B_A1 A1 DQ20 M_B_DQ22 VSS VSS
132 45 247 248
131 58 243 244
128 59 239 238
126 70 235 234
127 71 231 230
Sheet 11 of 91 PLACE THE CAP CLOSE TO SODIMM

4,12 M_B_A6
4,12 M_B_A7
4,12 M_B_A8
4,12 M_B_A9
122
125
121
A6
A7
A8
A9
DQ25
DQ26
DQ27
DQ28
83
84
66
M_B_DQ31
M_B_DQ24
M_B_DQ25
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
146 67 M_B_DQ28 213 214
DDR CHB SO- C

DDR_VREFCA_CHB_DIMM
C896 C887
VDDQ
4,12 M_B_A10
4,12 M_B_A11
4,12 M_B_A12
4,12 M_B_A13
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
79
80
174
M_B_DQ26
M_B_DQ29
M_B_DQ35
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202 C
151 A13 DQ32 173 M_B_DQ39 197 VSS VSS 196
DIMM_0 0.1u_10V_X7R_04 *2.2u_6.3V_X5R_04
R637
4,12 M_B_W E#
4,12 M_B_CAS#
4,12 M_B_RAS#
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
187
186
170
M_B_DQ37
M_B_DQ32
M_B_DQ38
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
DQ36 169 M_B_DQ34 181 VSS VSS 180
240_1%_04 DQ37 M_B_DQ36 VSS VSS
114 183 175 176
4,12 M_B_ACT# ACT* DQ38 M_B_DQ33 VSS VSS
182 171 172
143 DQ39 195 M_B_DQ40 167 VSS VSS 168
4,12 DDR1_B_PARITY PARITY DQ40 M_B_DQ41 VSS VSS
116 194 107 106
4,12 DDR1_B_ALERT# DIMM0_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 103 102
37 DIMM0_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ42 VSS VSS
108 208 99 98
RESET* DQ43 191 M_B_DQ45 93 VSS VSS 94
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 89 VSS VSS 90
VREFCA DQ45 203 M_B_DQ43 85 VSS VSS 86
254 DQ46 204 M_B_DQ47 81 VSS VSS 82
2.5V 3,9,10,12,38 SMB_DATA_R SDA DQ47 VSS VSS
253 216 M_B_DQ48 77 78
3,9,10,12,38 SMB_CLK_R SCL DQ48 M_B_DQ52 VSS VSS
215 73 72
010 166
SA2
DQ49
DQ50
228 M_B_DQ53 69 VSS
VSS
VSS
VSS
68
260 229 M_B_DQ50 65 64
C748 C763 3.3VS SA1 DQ51 VSS VSS
256 211 M_B_DQ54 61 60
SA0 DQ52 212 M_B_DQ51 57 VSS VSS 56
10u_6.3V_X5R_06 1u_6.3V_X5R_04 DQ53 M_B_DQ49 VSS VSS
224 51 52
CHA_DIMM0=000 DQ54 225 M_B_DQ55 47 VSS VSS 48
CHA_DIMM1=001 92 DQ55 237 M_B_DQ62 43 VSS VSS 44
91 CB0_NC DQ56 236 M_B_DQ59 39 VSS VSS 40
VTT_MEM
CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ63 35 VSS VSS 36
CB2_NC DQ58 VSS VSS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_B_DQ56
M_B_DQ57
31
27 VSS VSS
30
26
B B
C751 C318 CB6_NC DQ62 M_B_DQ60 VSS VSS
104 246 15 14
CB7_NC DQ63 9 VSS VSS 10
10u_6.3V_X5R_06 1u_6.3V_X5R_04 M_B_DQS0 M_B_DQS[7:0] 4,12 VSS VSS
VDDQ 12 13 5 6
33 DM0*/DBI0* DQS0_T 34 M_B_DQS1 1 VSS VSS 2
54 DM1*/DBI1* DQS1_T 55 M_B_DQS2 VSS VSS
75 DM2*/DBI2* DQS2_T 76 M_B_DQS3
199 DM4*/DBI4* DQS4_T 200 M_B_DQS5 D4AR0-26001-1P80
DM6*/DBI6* DQS6_T PCB Footprint = DDR4_260P_RVS_H92_D4ARX
241 242 M_B_DQS7
96 DM7*/DBI7* DQS7_T 97 VDDQ
DM8*/DBI8* DQS8_T
M_B_DQS#0 M_B_DQS#[7:0] 4,12
11 D02
3,9,10,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS DQS0_C 32 M_B_DQS#1
DQS1_C M_B_DQS#2 C354
7,9,10,12,38,61,66 VDDQ 53 R566
9,10,12,61 VTT_MEM DQS2_C 74 M_B_DQS#3 3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
DQS3_C M_B_DQS#4 1K_1%_04 *10u_6.3V_X5R_06
9,10,12,66 2.5V 177
DQS4_C 198 M_B_DQS#5
DQS6_C
ᔾDIMMጤ
ጤឭ࣋
VDDQ 240 M_B_DQS#7
DQS7_C 95 C891
162 DQS8_C
S2*/C0 R575
165 *0.1u_10V_X7R_04
S3*/C1 1K_1%_04 DDR_VREFCA_CHB_DIMM
DDR_VREFCA_CHB_DIMM 12
C909 C971 C903 C955 C926
D4AR0-26001-1P80 C893 C881
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
PCB Footprint = DDR4_260P_RVS_H92_D4ARX
A R559 1.8_1%_04 *0.1u_10V_X7R_04 *0.1u_10V_X7R_04 A
6-86-24260-014 4 DIMM_DQ_CPU_VREF_B
C866
VDDQ
0.022u_16V_X7R_04
C944 C935 C823 C838 C794 C965 C993 C948 R554 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04
24.9_1%_04 [11] DDR4 CHB SO-DIMM_0
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 12 DDR CHB SO-DIMM_0

Schematic Diagrams
DDR CHB SO-DIMM_1

5 4 3 2 1
Channel B SO-DIMM 1[RAM4] J_DIMMB_1A

RVS TYPE
H=4mm TOP Distant
M_B_DQ4 M_B_DQ[63:0] 4,11 VTT_MEM

137 8
4 M_B_CLK_DDR2 CK0_T DQ0 M_B_DQ0
139 7
4 M_B_CLK_DDR#2 CK0_C DQ1 M_B_DQ7 VDDQ J_DIMMB_1B
138 20
4 M_B_CLK_DDR3 CK1_T DQ2 M_B_DQ3
140 21 2.5V
4 M_B_CLK_DDR#3 CK1_C DQ3 M_B_DQ1 JY SWAP DDR NET
4 163 258
109 DQ4 3 M_B_DQ5 160 VDD19 VTT
D 110 16 159 D
17 154 259
149 DQ7 28 M_B_DQ9 153 VDD16 VPP2 257
4 M_B_CS#2 S0* DQ8 M_B_DQ8 VDD15 VPP1
157 29 148
41 147 3.3VS
155 DQ10 42 M_B_DQ13 142 VDD13
161 24 141
25 136 255
115 DQ13 38 M_B_DQ11 135 VDD10 VDDSPD
4,11 M_B_BG0 BG0 DQ14 M_B_DQ12 VDD9
113 37 130
4,11 M_B_BG1 BG1 DQ15 M_B_DQ16 VDD8
150 50 129 C778 C316
4,11 M_B_BA0 BA0 DQ16 M_B_DQ17 VDD7
145 49 124
4,11 M_B_BA1 BA1 DQ17 M_B_DQ21 VDD6
62 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
144 DQ18 63 M_B_DQ23 118 VDD5
4,11 M_B_A0 A0 DQ19 M_B_DQ18 VDD4
133 46 117
4,11 M_B_A1
132 A1 DQ20 45 M_B_DQ22 112 VDD3
4,11 M_B_A2 A2 DQ21 M_B_DQ20 VDD2
131 58 111
4,11 M_B_A3 A3 DQ22 M_B_DQ19 VDD1
128 59
4,11 M_B_A4 A4 DQ23 M_B_DQ27
126 70 GND1
4,11 M_B_A5 A5 DQ24 M_B_DQ30 MT1
127 71 GND2
4,11 M_B_A6 A6 DQ25 M_B_DQ31 MT2
122 83
4,11 M_B_A7 A7 DQ26 M_B_DQ24 PLACE NEAR TO PIN
125 84
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 4,11 M_B_A8 A8 DQ27 M_B_DQ25
121 66 251 252
4,11 M_B_A9 A9 DQ28 VSS VSS
9,10,11,38 DDR4_DRAMRST#
DDR4_DRAMRST#
VDDQ
4,11 M_B_A10
4,11 M_B_A11
4,11 M_B_A12
146
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
67
79
80
174
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ35
247
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
248
244
238
234
Sheet 12 of 91
4,11 M_B_A13 A13 DQ32 VSS VSS
C
R640
4,11 M_B_W E#
4,11 M_B_CAS#
4,11 M_B_RAS#
151
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
173
187
186
170
M_B_DQ39
M_B_DQ37
M_B_DQ32
M_B_DQ38
231
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
230
226
222
218
C
DDR CHB SO-
DQ36 VSS VSS
240_1%_04
4,11 M_B_ACT#
114
143
ACT*
DQ37
DQ38
DQ39
169
183
182
195
M_B_DQ34
M_B_DQ36
M_B_DQ33
M_B_DQ40
213
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
214
210
206
202
DIMM_1
4,11 DDR1_B_PARITY PARITY DQ40 M_B_DQ41 VSS VSS
116 194 197 196
4,11 DDR1_B_ALERT# DIMM1_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 193 192
37 DIMM1_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ42 VSS VSS
108 208 189 188
RESET* DQ43 191 M_B_DQ45 185 VSS VSS 184
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 181 VSS VSS 180
VREFCA DQ45 203 M_B_DQ43 175 VSS VSS 176
254 DQ46 204 M_B_DQ47 171 VSS VSS 172
3,9,10,11,38 SMB_DATA_R SDA DQ47 M_B_DQ48 VSS VSS
253 216 167 168
3,9,10,11,38 SMB_CLK_R SCL DQ48 M_B_DQ52 VSS VSS
215 107 106
011 166
SA2
DQ49
DQ50
228 M_B_DQ53 103 VSS
VSS
VSS
VSS
102
PLACE THE CAP CLOSE TO SODIMM 260 229 M_B_DQ50 99 98
3.3VS SA1 DQ51 VSS VSS
256 211 M_B_DQ54 93 94
3.3VS SA0 DQ52 VSS VSS
DDR_VREFCA_CHB_DIMM 212 M_B_DQ51 89 90
11 DDR_VREFCA_CHB_DIMM DQ53 M_B_DQ49 VSS VSS
224 85 86
CHA_DIMM0=000 DQ54 225 M_B_DQ55 81 VSS VSS 82
C439 C455 CHA_DIMM1=001 92 DQ55 237 M_B_DQ62 77 VSS VSS 78
D02 91 CB0_NC DQ56 236 M_B_DQ59 73 VSS VSS 72
0.1u_10V_X7R_04 10u_6.3V_X5R_06 CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ63 69 VSS VSS 68
CB2_NC DQ58 VSS VSS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_B_DQ56
M_B_DQ57
65
61 VSS VSS
64
60
2.5V 3/18 ‫ޏ‬੡٥‫ش‬ற0603 size 104 CB6_NC DQ62 246 M_B_DQ60 47 VSS VSS 48
B CB7_NC DQ63 43 VSS VSS 44 B
M_B_DQS0 M_B_DQS[7:0] 4,11 VSS VSS
VDDQ 12 13 39 40
C749 C767 DM2*/DBI2* DQS2_T M_B_DQS3 VSS VSS
75 76 27 26
10u_6.3V_X5R_06 1u_6.3V_X5R_04 DM4*/DBI4* DQS4_T M_B_DQS5 VSS VSS
199 200 19 18
96 DM7*/DBI7* DQS7_T 97 5 VSS VSS 6
DM8*/DBI8* DQS8_T 1 VSS VSS 2
VTT_MEM M_B_DQS#[7:0] 4,11 VSS VSS
11 M_B_DQS#0
DQS0_C 32 M_B_DQS#1
DQS1_C 53 M_B_DQS#2
DQS2_C 74 M_B_DQS#3 D4AR0-26001-1P40
C750 C755 DQS3_C M_B_DQS#4
177
10u_6.3V_X5R_06 1u_6.3V_X5R_04 DQS5_C M_B_DQS#6
219
DQS7_C 95
162 DQS8_C
165 S2*/C0
VDDQ S3*/C1
D4AR0-26001-1P40 3,9,10,11,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS

6-86-24260-000 7,9,10,11,38,61,66 VDDQ
C949 C968 C972 C911 C941 9,10,11,61 VTT_MEM
9,10,11,66 2.5V
A 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 A
VDDQ
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
D02
C954 C900 C969 C790 C943 C931 C853 C607 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 *1u_6.3V_X5R_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06
[12] DDR4 CHB SO-DIMM_1
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
DDR CHB SO-DIMM_1 B - 13

Schematic Diagrams
Panel, Inverter
5 4 3 2 1
PANEL CONNECTOR (For coaxial cable) PANEL POWER

DEFAULT SHORT
2 1
PLVDD PJ31 2mm
2A Q35A
VIN *MTS3572G6 VLED
C697
1/28 NV CHECK , connect to J_LCD1_Pin1 4 3
R787 S2 D2
1u_6.3V_X5R_04
GSYNC
D02B C733 C729
G2
D02B NV recommend 10K_04 C1141
D02B J_LCD1 C734
*0.1u_50V_Y5V_06
*0.1u_50V_Y5V_06
FRAME_LOCK#_R NV recommend *0.22u_50V_Y5V_06
S D 1 *22u_6.3V_X5R_08
5
D 30 GPIO5_FRAME_LOCK# D
2 1
Q32 3.3VS 2 R94
3
3 *4.7K_06
2SK3018S3 1A 4
R447
G
GSYNC R387 5 4
6 5
VGA_ENAVDD 6 R453 *150K_1%_04
*100K_04 7
7 *100K_04
ࠌ‫ش‬CABLE൷ ൷‫چ‬ D02B HI_GND 9
8
8
‫ڼ‬ຝ։‫ؾ‬ছਢ٣༼ࠎPANEL࿯NV೚G sync,ਚ‫ؾ‬ছ࿏᧯ᒵሁਢլ‫ش‬೚ L9 FCM1005KF-121T03
10 9
ᏁᒔᎁGS੡3.3V 10
11 GND5 3.3V
11 GND5 R448
12 GND4
13 12 GND4 GND3
13 GND3 *100K_04
14 GND2
15 14 GND2 GND1
DEL LVDS SIGNAL R111 *0_04
6
15 GND1 38,43,44,45,46,51,53,63,64 SUSB# R109

16
16 Q35B
D1
17
17 *MTS3572G6 *10K_04
18 PANEL_VCC_EN R108
18 *0_04 PANEL_VCC_EN_R 1
C698 0.1u_10V_X7R_04 DRX0# 19 G1
6
3 DP_TXN0 19 D
S1
Sheet 13 of 91 3 DP_TXP0
C699
C700
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX0
DRX1#
20
21
22
20
21
5VS
LVDD_EN# 2G
Q6A
*MTDK3S6R
2
3 DP_TXN1 22 1 2 S
C702 0.1u_10V_X7R_04 DRX1 23
1
3
3 DP_TXP1 23 D
Panel, Inverter 3 DP_TXN2

3 DP_TXP2
C703
C705
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX2#
DRX2
24
25
26
27
24
25
26 3.3VS
PJ29
DEFAULT SHORT
*3mm
5G
S
Q6B
*MTDK3S6R
4
C707 0.1u_10V_X7R_04 DRX3# 28 27
3 DP_TXN3 28 1 2
3.3VS R398 *100K_04 C710 0.1u_10V_X7R_04 DRX3 29
3 DP_TXP3 29
C 30 PLVDD C
30 PJ30 3mm
C715 0.1u_10V_X7R_04 DAUX# 31 U38
3 DP_AUX# 31 2A
3 DP_AUX
C716 0.1u_10V_X7R_04 DAUX
GSYNC_ID_R
32
32 5 1 >80 mil
43 GSYNC_ID R400 1K_04 33 VIN VOUT
R66 *100K_04 BRIGHTNESS_R 34 33
INV_BLON 34 C694 4
VLED 35 VIN/SS
HPD_L 35 1u_6.3V_X5R_04 C696 C695 R386
36
36 3 2
2A 37 EN GND
37 *1u_6.3V_X5R_04 10u_6.3V_X5R_06 *100K_04
38
38 UP7553
39 PANEL_VCC_EN
39 R385
40
C724 C721 40
100K_04
LVDFH-04008-TP00+
0.1u_50V_Y5V_06 0.01u_50V_X7R_04 PCB Footprint = lvdfh-04008-tp
D02 current = 0.3A
P/N:6-21-44K00-040
3.3VS
4/1 del ቃఎpull down 4.7kሽॴ (ֆ‫ش‬ᒵሁ0325)
R126 100K_04
U8
2 12 C335 0.1u_16V_Y5V_04
37 NB_ENAVDD VGA_ENAVDD 0B0 VCC
11
32 VGA_ENAVDD 1B0 PANEL_VCC_EN
1
R395 *10K_04 R141 100K_04 A0
PLVDD 10 3
R127 *100K_04 S0 GND
5 9
37 BLON 0B1 VCC
BRIGHTNESS_R PANEL_PW M 8
R397 *0402_short 32 VGA_BKLTEN 1B1 BLON_R
4
R142 100K_04 7 A1 6
S1 GND
B B
PI5A3158BZAE
P/N = 6-03-53158-0J1
3,13,30,39,60 PS8331_SW
3.3VS
śɥ
L :PORT1 (INTEL) (DEFAULT) śɨ
H: PORT2 (NV)
C
A
D9
BAV99 RECTIFIER 3.3V
HPD_L R403 1K_04 EDP_HPD
EDP_HPD 3
3.3V
PANEL POWER
AC
R464 100K_04 U47C
14
C720
74LVC08APW U47B
14
9 74LVC08APW
0.1u_16V_Y5V_04 44 BKL_EN 3.3V
8 BLON1 4
BLON_R 10 6 BLON2
5
R460 100K_04
7
U47A
14
7
R463 *100K_04 SB_BLON 74LVC08APW
1
3 INV_BLON
43 SB_BLON
2
3.3V
ࠌ‫ش‬eDPழ,BRIGHTNESSऴ൷ U47D
14
7
൷ࠩEDP CONNECTOR 3.3VS
12
74LVC08APW R457 C740
44,59 LID_SW # 0.1u_10V_X7R_04
R61 100K_04 11 LID_SW #1 100K_04
U3
13
2 12 C217 0.1u_16V_Y5V_04
37 EDP_BRIGHTNESS 0B0 VCC
A 11 A
32 VGA_BKLPW M 1B0 PANEL_PW M
1
7
R60 100K_04 10 A0 3 DEL LVDS SIGNAL
S0 GND 5,43,44,73,75 ALL_SYS_PW RGD
5 9 R65
3 IEDP_HPD 0B1 VCC
3 DEDP_HPD 8 *10K_04
1B1 4 EDP_HPD
7 A1 6
3,13,30,39,60 PS8331_SW S1 GND 44,45,60,61,62,63,64,65,71,73,74,75,76 VIN Title
L :PORT1 (INTEL) (DEFAULT) PI5A3158BZAE

14,16,37,45,50,51,52,58,59,60,63,68,70,72 5VS [13]PANEL,INVERTER,CRT
2,31,46,47,49,54,58,60,61,63,64,66,67,71 3.3V
H: PORT2 (NV) P/N = 6-03-53158-0J1 Size Document Number Rev
3,9,10,11,12,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
śɥ A3 P650RS 6-71-P65S0-D02C D02C
śɨ
5 4 3 2 1
B - 14 Panel, Inverter
Schematic Diagrams
Mini DP Port E
5 4 3 2 1
R380
R379
*0_04
*0_04
Close to Display PORT mini-Display Port E (back)
1 2 MDP_PW R
29 MDP_E#3 D_MDP_E#3
C677 0.1u_10V_X7R_04 NV3V3 R376 0_04
D_MDP_E3 U36
4 3 C678 0.1u_10V_X7R_04
29 MDP_E3 3.3VS R383 *0_04 5 1
L36 *DVI2012F2SF-900T05_08-SHORT VIN VOUT
C41 լ‫ױ‬൅ C673
R382 *0_04 SY6288DAAC 2
R381 *0_04
*10u_6.3V_X5R_06 ᄎዥሽ GND 10u_6.3V_X5R_06
1 2
D C679 0.1u_10V_X7R_04 D
D_MDP_E2 4 3
4 3 C680 0.1u_10V_X7R_04 15,16,37,59,61,63 SUSB EN# OC#
29 MDP_E2
L37 *DVI2012F2SF-900T05_08-SHORT
uP7549UMA5-20
PCB Footprint = M-SOT23-5
R30 *0_04
R29 *0_04
4 3
C43 0.1u_10V_X7R_04
1 2 C44 0.1u_10V_X7R_04 D_MDP_E1 MDP_PW R
29 MDP_E1 SHIELD6
L7 *DVI2012F2SF-900T05_08-SHORT COMMON GND4
SHIELD5 GND3
R31 *0_04
R32 *0_04
1 2 D02B EMI
29 MDP_E0 D_MDP_E0 PWR
N100693498 C46 0.1u_10V_X7R_04 20
20
4 3 N100693492 C45 0.1u_10V_X7R_04 D_MDP_E#0 GND 19
29 MDP_E#0 DP_TDB_AUX#_E
19
L8 *DVI2012F2SF-900T05_08-SHORT 18 AUX_CHN
18
17
D_MDP_E#2J 17 LANE_2N AUX_CHP16 DP_TDB_AUX_E
16
D_MDP_E2J 15 LANE_2P
inductor for EMI 15
GND 14
D_MDP_E#3J
D_MDP_E3J
12
10
LANE_3N
LANE_3P
14
12
13
11
GND 13
LANE_1N 11 D_MDP_E#1J
Sheet 14 of 91
D_MDP_E1J 9
7
LANE_1P
GND
10
8
9
7
GND 8 Mini DP Port E
G_MDPE_CEC 6 CONFIG2
6
C G_MDPE_MODE 4 CONFIG1 LANE_0N 5 D_MDP_E#0J C
5
4
D_MDP_E0J 3 LANE_0P
3
1 HPD 2 MDP_E_HPD_R
GND 2 D02B
1/14 NV CHECK 1 J_MDP2 EMI
C17714-101
MDP_PW R C657 P/N = 6-20-42K00-210
R352
D02B SHIELD2 GND2
0.01u_16V_X7R_04
D1 SHIELD1 GND1
1M_04 EMI
BAT54CS3
3
PCB Footprint = C17714-120A8-L

MDP_PW R
C
Q2A Q2B
2
MTDK3S6R MTDK3S6R D02B

G
G
6 1 4 3 EMI
S
R362
D
100K_1%_04
1
C669 0.1u_10V_X7R_04 DP_TDB_AUX#_E

29 MDP_E_AUX#_SDA
C668 0.1u_10V_X7R_04 DP_TDB_AUX_E

29 MDP_E_AUX_SCL
‫ڇ‬dGPUழDDC / Q1A
MTDK3S6R
Q1B
MTDK3S6R R361 5VS
AUX 6 1 4 3
S
D
D
B
ਢMultiplax 100K_1%_04 B
G
2 G
PIN R19 5VS

5
10K_04
G_DP_MODE_R R353
3
D 10K_04 DP ESD W/O LEVELSHIFT ᏁՂ, NET ‫ױ‬SWAP

Q27B
MTDK3S6R G 5 D40
S
4
6
D D_MDP_E#2 6 5 D_MDP_E#2J
D_MDP_E2 7 4 D_MDP_E2J
G 2 G_MDPE_MODE 8 3
S D_MDP_E#3 9 2 D_MDP_E#3J
1
Q27A D_MDP_E3 10 1 D_MDP_E3J

MTDK3S6R
3/22 lay swap 3/22 lay swap
D02 DT1140-04LP-7
1/5 NV CHECK D4 3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD

TO DP_E
D_MDP_E#1 10 1 D_MDP_E#1J
R13 0_04 L4 FCM1005KF-121T03 MDP_E_HPD_R D_MDP_E1 9 2 D_MDP_E1J
32,39 G_DP_DHPD_E
AC
8 3
C20 D_MDP_E#0 7 4 D_MDP_E#0J
D2 D_MDP_E0 6 5 D_MDP_E0J
BAV99 RECTIFIER 220p_50V_NPO_04
A A
D02 DT1140-04LP-7
A
MDP_PW R
3,9,10,11,12,13,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
13,16,37,45,50,51,52,58,59,60,63,68,70,72 5VS Title
15,17,30,31,67,68,70,71 NV3V3 [14] MINI DP PORT E
A3 P650RS D02C
6-71-P65S0-D02C
5 4 3 2 1
Mini DP Port E B - 15
Schematic Diagrams
Mini DP Port F + PS8330B

5 4 3 2 1
AUX interception disable for Port y (y = 1, 2). Internal pull down

L: AUX interception enable, driver configuration is set by link
H: AUX interception disable, driver output with fixed 800mV and
M: AUX interception disable, driver output with fixed 400mV and
at ~150K‫ڻ‬, 3.3V I/O;
training (default)
0dB
0dB
PLEASE CLOSE TO CONNECTOR
mini-Display Port F (LEFT)
R597 *0_04 Close to Display PORT
MDP_F3#_RE 1 2
C902 0.1u_10V_X7R_04 D_MDP_F#3
Output swing adjustment for Port y (y = 1, 2). Internal pull down at ~150K‫ڻ‬, 3.3V I/O; MDP_F3_RE L41 4 3 C904 0.1u_10V_X7R_04 D_MDP_F3
L: default *DVI2012F2SF-900T05_08-SHORT
H: +20% R602 *0_04 3.3VS CLOSE TO J_MDP2 CONN
M: -16.7% MDP_F_PW R
U20
R607 *0_04
MDP_F2#_RE 5 1
1 2 VIN VOUT
D DESIGN NOTE:CFG0 C910 0.1u_10V_X7R_04 D_MDP_F#2
C478 լ‫ױ‬൅
D
Configuration pin for automatic EQ and MDP_F2_RE L42 4 3 C916 0.1u_10V_X7R_04 D_MDP_F2 SY6288DAAC 2 C474
Aux interception; Internal pull down at *DVI2012F2SF-900T05_08-SHORT
*10u_6.3V_X5R_06 ᄎዥሽ GND
R611 *0_04
~150Kohm,3.3V I/O 10u_6.3V_X5R_06
L: default, automatic EQ enable and Aux interception enable 4 3
R249 *0_04 14,16,37,59,61,63 SUSB EN# OC#
MDP_F1#_RE 4 3
H: automatic EQ disable and AUX interception enable C488 0.1u_10V_X7R_04 D_MDP_F#1 uP7549UMA5-20
M: automatic EQ disable and AUX interception MDP_F1_RE L17 1 2 C491 0.1u_10V_X7R_04 D_MDP_F1
disable,no pre-emphasis, 600mVpp swing *DVI2012F2SF-900T05_08-SHORT
R250 *0_04
DESIGN NOTE:CFG1 R265 *0_04

MDP_F0_RE 1 2
Configuration pin for auto test and input offset N133276441 C499 0.1u_10V_X7R_04 D_MDP_F0 COMMON SHIELD6 GND4
MDP_F0#_RE L18 D_MDP_F#0
cancellation,3.3V IO, internal pull up at~150K
4 3 N133276437 C495 0.1u_10V_X7R_04 SHIELD5 GND3

H: default, auto test disable and input offset cancellation *DVI2012F2SF-900T05_08-SHORT
R260 *0_04 MDP_F_PW R
enable
L: auto test enable and input offset cancellation enable inductor for EMI PWR 20
Sheet 15 of 91
20
GND 19
M: auto test disable and input offset cancellation disable DP_TDB_AUX#_F 18 AUX_CHN
19
18
17
D_MDP_F#2J 17 LANE_2N AUX_CHP16 DP_TDB_AUX_F
Mini DP Port F + DESIGN NOTE:PEQ 16

D_MDP_F2J 15 LANE_2P
15
R466 *0_04 GND 14
Programmalbe input equalization levels;internal pull 3.3VS 14
R471 0_04 GND 13
down at~150k ,3.3v I/O NV3V3 13
D_MDP_F#3J 12 LANE_3N
PS8330B
12
L: default, LEQ, compensate channel loss up to 12dB at D_MDP_F3J 10 LANE_3P LANE_1N 11 D_MDP_F#1J
C 11 C
HBR2 R470 R472 R465 D_MDP_F1J 9
10
LANE_1P 9
4.7K_04 4.7K_04 4.7K_04 7 GND 8
H: HEQ, compensate channel loss up to 15dB at HBR2 GND 8
7
M:LLEQ, compensate channel loss up to 5dB at HBR2 R625 5.1M_04 G_MDPF_CEC 6 CONFIG2
6
G_MDPF_MODE 4 CONFIG1 LANE_0N 5 D_MDP_F#0J
5
Q36
D
S
S
4
G G 2SK3018S3 D_MDP_F0J 3 LANE_0P
AO3415 AO3415 3
1 GND HPD 2 MDP_F_HPD_R
PS8330B Repeter
2
Q38 Q39 G IN_CAD_SRC R627 C930 1 J_MDP1
C17722-120A9-L
S
MDP_F_AUX#_SDA 1M_04
0.01u_16V_X7R_04
P/N = 6-21-14Q00-020
MDP_F_AUX_SCL PCB Footprint = C17722-120XX-L
EMI_GND2 SHIELD2 GND2
SHIELD1 GND1
Hybrid DDC/AUX
1/14 NV CHECK EMR6 *0_04 D02A
EMR10 *0_04
From NV DP_F
MDP_F_AUX#_SDA C330 0.1u_10V_X7R_04MDP_F_AUX#_SDA_R DP_TDB_AUX_F
29 MDP_F_AUX#_SDA
MDP_F_AUX_SCL C329 0.1u_10V_X7R_04MDP_F_AUX_SCL_R DP_TDB_AUX#_F ឭ࣋
EMIឭ
29 MDP_F_AUX_SCL EMI_GND2
3/23 lay ޲़ၴ,‫ޏ‬՛size
R136 10K_04 MDP_F_PW R

3.3VS
C324 3.3VS
D22 MDP_F_PW R
2.2u_6.3V_X5R_04
36
35
34
33
32
31
30
29
28
27
26
25
*BAT54CS3
3
U7
B V3P3 B
V3P3
V3P3
DNC(VDDD_DREG)(CEXT) AUTO-EQ(RSTN)(RST#)
SDA_DDC
SCL_DDC
GND
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA)AUX_SNKP
AUX_SNKN
ENABLE(ENABLE)(PD#)
C
From NV DP_F R219
100K_1%_04
A
close to P8830B 37
C310 0.1u_10V_X7R_04 IN0P_R 38 DNC 24
29 MDP_F0 DP_TDB_AUX#_F
2
C305 0.1u_10V_X7R_04 IN0N_R 39 IN0P GND 23 MDP_F0_RE
29 MDP_F#0 IN0N OUT0P
OP_1(SDA_CTL)(SDA_CTL/CFG0)
PS8330B_CFG1 40 22 MDP_F0#_RE
DP_TDB_AUX_F DP ESD W/O LEVELSHIFT ᏁՂ, NET ‫ױ‬SWAP
OP_0(SCL_CTL)(SCL_CTL/PEQ)
C301 0.1u_10V_X7R_04 IN1P_R 41 EQ(DNC)(CFG1) OUT0N 21

29 MDP_F1 IN1P DNC
OC_1(ADDR_EQ)(I2C_ADDR)
C300 0.1u_10V_X7R_04 IN1N_R 42 20 MDP_F1_RE

3/19 layout swap 3/19 layout swap
29 MDP_F#1 IN1N OUT1P MDP_F1#_RE D50
43 19 R224
C295 0.1u_10V_X7R_04 IN2P_R 44 DNC OUT1N 18
29 MDP_F2 IN2P GND D_MDP_F#2 6 5 D_MDP_F#2J
C294 0.1u_10V_X7R_04 IN2N_R 45 17 MDP_F2_RE 100K_1%_04 D_MDP_F2 D_MDP_F2J
29 MDP_F#2 7 4
CNTRL(DNC)(REXT)
46 IN2N OUT2P 16 MDP_F2#_RE

OC_0(DNC)(NC) OUT2N 8 3
C293 0.1u_10V_X7R_04 IN3P_R 47 15 D_MDP_F#3 D_MDP_F#3J
29 MDP_F3 IN3P DNC 9 2
C292 0.1u_10V_X7R_04 IN3N_R 48 14 MDP_F3_RE
D_MDP_F3 D_MDP_F3J
29 MDP_F#3 IN3N OUT3P MDP_F3#_RE 10 1
49 13
HGND OUT3N
CAD_SRC
CAD_SNK
HPD_SNK
1/5 NV CHECK D02 *DT1140-04LP-7

V3P3
V3P3
V3P3
TO PS8330B D27
PS8330B G_DP_DHPD_F R636 0_04 L43 FCM1005KF-121T03 MDP_F_HPD_R

D_MDP_F#1 10 1 D_MDP_F#1J
1
2
3
4
5
6
7
8
9
10
11
12
AC
3.3VS D_MDP_F1 9 2 D_MDP_F1J
G_DP_DHPD_F C933
8 3
2.2u_6.3V_X5R_04 C289 D51 D_MDP_F#0 D_MDP_F#0J
7 4
C290 C328 BAV99 RECTIFIER 220p_50V_NPO_04 D_MDP_F0 D_MDP_F0J
6 5
32,39 MDP_F_HPD
To PCH/NV IN_CAD_SRC
C
A A
R106 4.99K_1%_04 D02 *DT1140-04LP-7
0.1u_10V_X7R_04 0.01u_16V_X7R_04
R107 1M_04 G_MDPF_MODE 3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD
PS8330B_CFG0 *4.7K_04 MDP_F_PW R
R105 *4.7K_04 R100 3.3VS
R104
R458
*4.7K_04
*4.7K_04
PEQ
PS8330B_CFG1 *4.7K_04
*4.7K_04 R99
R459
3.3VS
3.3VS
Title
[15] MINI DP PORT F + PS8330B
14,17,30,31,67,68,70,71 NV3V3
3,9,10,11,12,13,14,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
13,14,16,37,45,50,51,52,58,59,60,63,68,70,72
3.3VS
5VS A3
6-71-P65S0-D02C D02C

5 4 3 2 1
B - 16 Mini DP Port F + PS8330B

Schematic Diagrams
HDMI
5 4 3 2 1
HDMI_5VS
HDMI CONNECTOR 3/21 ᖲዌ᧢‫ޓ‬੡SMT‫ش‬ற
HDMI_5VS
For ESD
5VS
J_HDMI1 HDMI Logo
U37
A
116E-1C001-20Y D02
5 1
VIN VOUT P/N = 6-21-13K20-019 D8 D7 D02A BCN
C681 լ‫ױ‬൅ C671 C27
PCB Footprint = c-116e-xx001-x0x RB751V-40(lision) RB751V-40(lision)
D SY6288DAAC 2 D
ᄎዥሽ
D02A BCN
C
*10u_6.3V_X5R_06
A
GND 22u_6.3V_X5R_08 22u_6.3V_X5R_08 HDMI Logo
C
4 3
15,37,59,61,63 SUSB EN# OC# HDMI_HPD-C
19 R28 R27 D6 D5 D41
AC
AC
AC
HOT PLUG DETECT
BAV99 RECTIFIER
BAV99 RECTIFIER
BAV99 RECTIFIER
uP7549UMA5-20 18
PCB Footprint = M-SOT23-5 +5V 17 2K_04 2K_04
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C HDMI_SCL-C
14 SCL
R369 RESERVED HDMI_CEC HDMI_SDA-C
DEL 13
TMDS_CLOCK-R R371 6.04_1%_04 TMDS_CLOCK TMDS_CLOCK#J 12 CEC
C672 *180_1%_04 TMDS CLOCK- HDMI_HPD-C
11
TMDS_CLOCK#-R R368 6.04_1%_04 TMDS_CLOCK# TMDS_CLOCKJ 10 CLK SHIELD
1.5P_50V_04
8
TMDS CLOCK+
TMDS DATA0-
9 TMDS_DATA0#J Sheet 16 of 91
D02A SHIELD0
DEL
5/30 EMI
TMDS_DATA1#J 6
TMDS DATA1-
TMDS DATA0+
7 TMDS_DATA0J
HDMI
TMDS_DATA1-R R16 6.04_1%_04 TMDS_DATA1 5
TMDS_DATA1J 4 SHIELD1
C TMDS_DATA1#-R R18 6.04_1%_04 TMDS_DATA1# TMDS DATA1+ 3 TMDS_DATA2#J C
R17 TMDS DATA2-
2
SHIELD2 1 TMDS_DATA2J
D02 3/23 lay swap *180_1%_04 D02 3/23 lay swap
TMDS DATA2+
3/23 lay swap
R373 DEL
GND1
GND2
GND3
GND4
TMDS_DATA0 R377 6.04_1%_04 TMDS_DATA0-R
4/1 del common choke L34/L5 (ֆ‫ش‬ᒵሁ0325) *180_1%_04
D02B D02B TMDS_DATA0# R375 6.04_1%_04 TMDS_DATA0#-R
ឭ࣋
GND1
GND2
GND3
GND4
EMI EMIឭ EMI
C37 0.1u_10V_X7R_04 TMDS_DATA2-R
29 HDMI_DATA2P 3/23 lay swap
29 HDMI_DATA2N
C42 0.1u_10V_X7R_04 TMDS_DATA2#-R D02
DEL
C31 0.1u_10V_X7R_04 TMDS_DATA1-R TMDS_DATA2 R23 6.04_1%_04 TMDS_DATA2-R
29 HDMI_DATA1P TMDS_DATA1#-R
C26 0.1u_10V_X7R_04
29 HDMI_DATA1N 1V8_AON TMDS_DATA2# R24 6.04_1%_04 TMDS_DATA2#-R
TMDS_DATA0-R D02B R21
C675 0.1u_10V_X7R_04
29 HDMI_DATA0P TMDS_DATA0#-R
C676 0.1u_10V_X7R_04 EMI
29 HDMI_DATA0N *180_1%_04
1V8_AON 4/1 del common choke L35/L6 (ֆ‫ش‬ᒵሁ0325)
C674 0.1u_10V_X7R_04 TMDS_CLOCK-R
29 HDMI_CLOCKP TMDS_CLOCK#-R
C670 0.1u_10V_X7R_04 R25 R34
B 29 HDMI_CLOCKN B
10K_04 10K_04
2
TMDS_DATA0#-R R378 499_1%_04
G TMDS_DATA0-R R374 499_1%_04
HDMI ESD W/O LEVELSHIFT ᏁՂ, NET 1 6 HDMI_SDA-C TMDS_DATA2#-R R26 499_1%_04
‫ױ‬SWAP D39 29 HDMI_CTRLDATA
S
D TMDS_DATA2-R R22 499_1%_04

5
TMDS_CLOCK# 6 5 TMDS_CLOCK#J Q3A TMDS_CLOCK#-R R367 499_1%_04

G
TMDS_CLOCK 7 4 TMDS_CLOCKJ MTDK3S6R TMDS_CLOCK-R R372 499_1%_04

8 3 4 3 HDMI_SCL-C TMDS_DATA1#-R R15 499_1%_04
29 HDMI_CTRLCLK
S
TMDS_DATA0# 9 2 TMDS_DATA0#J TMDS_DATA1-R R20 499_1%_04

Q3B
TMDS_DATA0 10 1 TMDS_DATA0J MTDK3S6R 3.3VS
GND_HDMI
D
DG P.273 recommend I2C_CLK/DAT 5VS
DT1140-04LP-7 D02 pull up 10k to 1V8_AON
D3 G
TMDS_DATA1# TMDS_DATA1#J R384
6 5
S
TMDS_DATA1 TMDS_DATA1J Q30
G
7 4 Q31
1M_04 2SK3018S3
8 3 2SK3018S3
TMDS_DATA2# 9 2 TMDS_DATA2#J
S D HDMI_HPD-C
A TMDS_DATA2 10 1 TMDS_DATA2J 32,39 HDMI_HPD A
3/22 lay swap 3/22 lay swap

DT1140-04LP-7 Title
D02 R14
3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD
3,27,28,30,31,32,33,39,67,68,70,71,72 1V8_AON
20K_04 [16] HDMI 2.0
3,9,10,11,12,13,14,15,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS Size Document Number Rev
13,14,37,45,50,51,52,58,59,60,63,68,70,72 5VS A4 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
HDMI B - 17
Schematic Diagrams
VGA PCI Express
1 2 3 4 5
D02A NV3V3
DG P.252 recommend CLKREQ , is OD pin ,
must have a 10k pull up to 1V8_AON
D02A R394
31,68 NVVDD_PWRGD
G
10K_04
40 PEG_CLKREQ#
D
Q34
S MTN2002ZS3
NV PCI EXPRESS
U39A
1/28 Cap follow reference board design , x6s
INS130817227
R396 BGA2152
COMMON under GPU Midway btw GPU&VR
*10K_04 1/23 PCI_EXPRESS
A PEX_VDD A
PEX_DVDD BB33
BK26 PEX_RST PEX_DVDD BB35
30,31 GPU_PEX_RST#
PEX_DVDD BB36 C121 C123 C113 C111 C67 C124 C63 C61
PEX_CLKREQ# BL26 PEX_CLKREQ PEX_DVDD BC33
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
4.7u_6.3V_X6S_06
4.7u_6.3V_X6S_06
10u_4V_X6S_06
22u_6.3V_X6S_08
PEX_DVDD BC35
VGA_PEXCLK BM26 PEX_REFCLK PEX_DVDD BC36
40 VGA_PEXCLK VGA_PEXCLK# BM27 PEX_REFCLK PEX_DVDD BD33
40 VGA_PEXCLK#
PEX_DVDD BD36
C405 0.22u_10V_X5R_04 PEX_RX0 BG26 PEX_TX0
2 PEG_RX0 PEX_RX0#
C411 0.22u_10V_X5R_04 BH26 PEX_TX0
2 PEG_RX#0
BL27 PEX_RX0 1/26 NV CHECK
2 PEG_TX0
BK27 PEX_RX0
2 PEG_TX#0
1V8_RUN
Sheet 17 of 91 C404 0.22u_10V_X5R_04 PEX_RX1 BF26 PEX_TX1 GND

2 PEG_RX1 PEX_RX1# DG P.91 recommend voltage
C399 0.22u_10V_X5R_04 BE26 PEX_TX1 PEX_HVDD BB26
2 PEG_RX#1
PEX_HVDD BB27
BK29 PEX_RX1 PEX_HVDD BB29
2 PEG_TX1
BL29 BB32 C142 C145 C161 C148 C164 C162 C732 C738 C739
VGA PCI Express 2 PEG_TX#1 PEX_RX1 PEX_HVDD

PEX_HVDD BC26
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
4.7u_6.3V_X6S_06
4.7u_6.3V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
22u_6.3V_X6S_08
C392 0.22u_10V_X5R_04 PEX_RX2 BF27 PEX_TX2 PEX_HVDD BC27
2 PEG_RX2 PEX_RX2#
C397 0.22u_10V_X5R_04 BG27 PEX_TX2 PEX_HVDD BC29
2 PEG_RX#2
PEX_HVDD BC30
BM29 PEX_RX2 PEX_HVDD BC32
2 PEG_TX2
BM30 PEX_RX2 PEX_HVDD BD27
2 PEG_TX#2
PEX_HVDD BD30
2 PEG_RX3 PEX_RX3#
C390 0.22u_10V_X5R_04 BH29 PEX_TX3
2 PEG_RX#3
BL30 PEX_RX3
2 PEG_TX3
BK30 PEX_RX3 GND
B 2 PEG_TX#3 B
C382 0.22u_10V_X5R_04 PEX_RX4 BF29 PEX_TX4
2 PEG_RX4 PEX_RX4#
C374 0.22u_10V_X5R_04 BE29 PEX_TX4
2 PEG_RX#4
BK32 PEX_RX4
2 PEG_TX4 1/26 NV CHECK
BL32 PEX_RX4
2 PEG_TX#4
C368 0.22u_10V_X5R_04 PEX_RX5 BF30 1V8_RUN
2 PEG_RX5 PEX_TX5
C371 0.22u_10V_X5R_04 PEX_RX5# BG30 PEX_TX5
2 PEG_RX#5 DG P.91 recommend voltage
PEX_PLL_HVDD BB30 PEX_PLL_HVDD_SVDD R50 0_04
BM32 PEX_RX5
2 PEG_TX5
BM33 PEX_RX5 C135
2 PEG_TX#5
0.1u_10V_X7R_04
2 PEG_RX6 PEX_RX6#
C367 0.22u_10V_X5R_04 BH32 PEX_TX6
2 PEG_RX#6
BL33 PEX_RX6
2 PEG_TX6
BK33 PEX_RX6
2 PEG_TX#6
2 PEG_RX7 PEX_RX7#
C359 0.22u_10V_X5R_04 BE32 PEX_TX7 GND
2 PEG_RX#7
BK35 PEX_RX7
2 PEG_TX7
BL35 PEX_RX7
2 PEG_TX#7
2 PEG_RX8 PEX_RX8#
C358 0.22u_10V_X5R_04 BG33 PEX_TX8
2 PEG_RX#8
BM35 PEX_RX8
2 PEG_TX8
BM36 PEX_RX8
2 PEG_TX#8
2 PEG_RX9 PEX_RX9#
C352 0.22u_10V_X5R_04 BH35 PEX_TX9
C 2 PEG_RX#9 C
BL36 PEX_RX9
2 PEG_TX9
BK36 PEX_RX9
2 PEG_TX#9
2 PEG_RX10 PEX_RX10#
C347 0.22u_10V_X5R_04 BE35 PEX_TX10
2 PEG_RX#10
BK38 PEX_RX10
2 PEG_TX10
BL38 PEX_RX10
2 PEG_TX#10
C346 0.22u_10V_X5R_04 BG36 PEX_TX11
2 PEG_RX#11
BM38 PEX_RX11
2 PEG_TX11
BM39 PEX_RX11
2 PEG_TX#11
C343 0.22u_10V_X5R_04 BH38 PEX_TX12
2 PEG_RX#12
BL39 PEX_RX12
2 PEG_TX12
BK39 PEX_RX12
2 PEG_TX#12
C338 0.22u_10V_X5R_04 BE38 PEX_TX13
2 PEG_RX#13
BK41 PEX_RX13
2 PEG_TX13
BL41 PEX_RX13
2 PEG_TX#13
C334 0.22u_10V_X5R_04 BG39 PEX_TX14
2 PEG_RX#14
BM41 PEX_RX14
2 PEG_TX14
BM42 PEX_RX14
D 2 PEG_TX#14 D
C332 0.22u_10V_X5R_04 PEX_RX15 BH41 PEX_TX15 14,15,30,31,67,68,70,71 NV3V3
2 PEG_RX15 PEX_RX15# 29,71 PEX_VDD
C327 0.22u_10V_X5R_04 BG41 PEX_TX15
2 PEG_RX#15 18,27,28,31,33,67 1V8_RUN
BL42 PEX_RX15 PEX_TERMP BL44 PEX_TERMP R45 2.49K_1%_04
2 PEG_TX15
BK42 PEX_RX15
2 PEG_TX#15
GND
Title
[17] VGA PCI EXPRESS
Custom P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5
B - 18 VGA PCI Express

Schematic Diagrams
VGA Frame Buffer Partition
1 2 3 4 5 6 7 8
U39C
U39B
INS127421140
BGA2152
COMMON
PAGE3: GPU FRAME BUFFER PARTITION A/B INS127422923
BGA2152
COMMON
3/23 FBB
2/23 FBA
FBB_D0 H32 FBB_D0 FBB_CMD0 B35 FBB_CMD0
A FBA_D0 U51 Y51 FBA_CMD0 FBA_DBI[7..0] FBB_DBI[7..0] FBB_D1 D32 A35 FBB_CMD1 A
FBA_D0 FBA_CMD0 FBA_DBI[7..0] 19 FBB_DBI[7..0] 20 FBB_D1 FBB_CMD1
FBA_D1 U48 FBA_D1 FBA_CMD1 Y52 FBA_CMD1 FBB_D2 A33 FBB_D2 FBB_CMD2 D35 FBB_CMD2
FBA_D2 U50 Y49 FBA_CMD2 FBA_EDC[7..0] FBB_EDC[7..0] FBB_D3 B32 A36 FBB_CMD3
FBA_D2 FBA_CMD2 FBA_EDC[7..0] 19 FBB_EDC[7..0] 20 FBB_D3 FBB_CMD3
FBA_D3 U49 FBA_D3 FBA_CMD3 AA52 FBA_CMD3 FBB_D4 E32 FBB_D4 FBB_CMD4 B36 FBB_CMD4
FBA_D4 R51 AA51 FBA_CMD4 FBA_CMD[31..0] FBB_CMD[31..0] FBB_D5 G32 C36 FBB_CMD5
FBA_D4 FBA_CMD4 FBA_CMD[31..0] 19 FBB_CMD[31..0] 20 FBB_D5 FBB_CMD5
FBA_D5 R50 FBA_D5 FBA_CMD5 AA50 FBA_CMD5 FBB_D6 J30 FBB_D6 FBB_CMD6 C38 FBB_CMD6
FBA_D6 R47 AC50 FBA_CMD6 FBA_D[63..0] FBB_D[63..0] FBB_D7 F32 B38 FBB_CMD7
FBA_D6 FBA_CMD6 FBA_D[63..0] 19 FBB_D[63..0] 20 FBB_D7 FBB_CMD7
FBA_D7 U46 FBA_D7 FBA_CMD7 AC51 FBA_CMD7 FBB_D8 H36 FBB_D8 FBB_CMD8 A38 FBB_CMD8
FBA_D8 V46 FBA_D8 FBA_CMD8 AC52 FBA_CMD8 FBB_D9 G36 FBB_D9 FBB_CMD9 D38 FBB_CMD9
FBA_D9 Y45 FBA_D9 FBA_CMD9 AC49 FBA_CMD9 FBB_D10 J36 FBB_D10 FBB_CMD10 A39 FBB_CMD10
FBA_D10 Y47 FBA_D10 FBA_CMD10 AD52 FBA_CMD10 FBB_D11 F36 FBB_D11 FBB_CMD11 B39 FBB_CMD11
FBA_D11 Y46 FBA_D11 FBA_CMD11 AD51 FBA_CMD11 FBB_D12 F33 FBB_D12 FBB_CMD12 C39 FBB_CMD12
FBA_D12 V50 FBA_D12 FBA_CMD12 AD50 FBA_CMD12 FBB_D13 D33 FBB_D13 FBB_CMD13 C41 FBB_CMD13
FBA_D13 V47 FBA_D13 FBA_CMD13 AF50 FBA_CMD13 FBB_D14 J32 FBB_D14 FBB_CMD14 B41 FBB_CMD14
FBA_D14 U52 AF51 FBA_CMD14 FBB_D15 G33 A41 FBB_CMD15
FBA_D15
FBA_D16
V51
FBA_D14
FBA_D15
FBA_CMD14
FBA_CMD15 AF52 FBA_CMD15
FBA_CMD16
GDDR5 Mode F Mapping FBB_D16
FBB_D17
E45
FBB_D15
FBB_D16
FBB_CMD15
FBB_CMD16 B49 FBB_CMD16
FBB_CMD17
AJ44 FBA_D16 FBA_CMD16 AN50 D45 FBB_D17 FBB_CMD17 A49
FBA_D17 AG48 AN51 FBA_CMD17 FBB_D18 F45 A48 FBB_CMD18
FBA_D18 AJ45
FBA_D17 FBA_CMD17
AN52 FBA_CMD18
GB3B-256 ch0 0..31 ch1 32..63 FBB_D19 G45
FBB_D18 FBB_CMD18
D47 FBB_CMD19
FBA_D18 FBA_CMD18 FBB_D19 FBB_CMD19
Sheet 18 of 91
FBA_D19 AG49 AM49 FBA_CMD19 FBB_D20 D42 A47 FBB_CMD20
FBA_D20 AF46
FBA_D19 FBA_CMD19
AM52 FBA_CMD20
CMD0 CAS* FBB_D21 E42
FBB_D20 FBB_CMD20
B47 FBB_CMD21
FBA_D21 AF47 AM51 FBA_CMD21 FBB_D22 F42 C47 FBB_CMD22
FBA_D22 AF48
FBA_D21 FBA_CMD21
AM50 FBA_CMD22
1.35V CMD1 CKE* FBB_D23 H41
FBB_D22 FBB_CMD22
C45 FBB_CMD23 1.35V
FBA_D23 AD47 AK50 FBA_CMD23 FBVDDQ FBB_D24 E41 B45 FBB_CMD24
FBA_D23 FBA_CMD23 CMD2 RST* FBB_D24 FBB_CMD24
FBA_D24
FBA_D25
FBA_D26
FBA_D27
AD49
AD48
AC46
AC47
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
AK51
AK52
AJ49
AJ52
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
CMD3
CMD4
RAS*
A1_A9
FBB_D25
FBB_D26
FBB_D27
FBB_D28
F39
E39
D39
F38
FBB_D25
FBB_D26
FBB_D27
FBB_D28
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
A45
D44
A44
B44
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBVDDQ
VGA Frame Buffer

FBA_D28 AA47 AJ51 FBA_CMD28 FBB_D29 E38 C44 FBB_CMD29
Partition
FBA_D29 AA46 AJ50 FBA_CMD29 R40 R43 FBB_D30 D36 C42 FBB_CMD30 R49 R44
FBA_D30 AA45
FBA_D29 FBA_CMD29
AG50 FBA_CMD30
CMD5 A0_A10 FBB_D31 E36
FBB_D30 FBB_CMD30
B42 FBB_CMD31
FBA_D30 FBA_CMD30 *60.4_1%_04 *60.4_1%_04 FBB_D31 FBB_CMD31 *60.4_1%_04 *60.4_1%_04
FBA_D31 Y44 AG51 FBA_CMD31 FBB_D32 M50 A42
FBA_D32 AW51
FBA_D31 FBA_CMD31
AG52
CMD6 A12_RFU FBB_D33 P48
FBB_D32 FBB_CMD32
D41
FBA_D33 BA52 AF49 FBB_D34 M51 C35 FBB_DEBUG0
FBA_D34 AW50
FBA_D33 FBA_CMD33
Y50 FBA_DEBUG0
CMD7 ABI* FBB_D35 M49
FBB_D34 FBB_CMD34
B50 FBB_DEBUG1
B
FBA_D34 FBA_CMD34 FBB_D35 FBB_CMD35 B
FBA_D35 BA51 AR50 FBA_DEBUG1 FBB_D36 P47
FBA_D36 BA50
FBA_D35 FBA_CMD35 CMD8 A6_A11 FBB_D37 P52
FBB_D36
FBA_D36 FBB_D37
FBA_D37 BB50 FBB_D38 R46
FBA_D38 BA49
FBA_D37 CMD9 A7_A8 FBB_D39 P46
FBB_D38
J35
FBA_D38 FBB_D39 FBB_DBG_RFU1
FBA_D39 AW49 AA44 FBB_D40 L50 J41
FBA_D40 AV48
FBA_D39 FBA_DBG_RFU1
AN44
CMD10 WE* FBB_D41 L51
FBB_D40 FBB_DBG_RFU2
FBA_D40 FBA_DBG_RFU2 FBB_D41
FBA_D41 AT49 FBB_D42 L52
FBA_D42 AT47
FBA_D41 CMD11 A5_BA1 FBB_D43 L49
FBB_D42
FBA_D42 FBB_D43
FBA_D43 AT48 FBB_D44 M46 H42 FBB_CLK0
FBA_D44 AT46
FBA_D43
AG45 FBA_CLK0 FB_CLK
CMD12 A4_BA2 FBB_D45 L47
FBB_D44 FBB_CLK0
G42 FBB_CLK0*
DP_FBB_CLK0 FB_CLK FBB_CLK0 20
FBA_D44 FBA_CLK0 DP_FBA_CLK0 FBA_CLK0 19 FBB_D45 FBB_CLK0 DP_FBB_CLK0 FB_CLK FBB_CLK0* 20
FBA_D45 AV51 AG46 FBA_CLK0* FB_CLK FBB_D46 M48 F47 FBB_CLK1
FBA_D46 AV52
FBA_D45 FBA_CLK0
AK46 FBA_CLK1
DP_FBA_CLK0
FB_CLK
FBA_CLK0* 19 CMD13 A2_BA0 FBB_D47 M47
FBB_D46 FBB_CLK1
E47 FBB_CLK1*
DP_FBB_CLK1 FB_CLK FBB_CLK1 20
FBA_D46 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1 19 FBB_D47 FBB_CLK1 DP_FBB_CLK1 FB_CLK FBB_CLK1* 20
FBA_D47 AV49 AK45 FBA_CLK1* FB_CLK FBB_D48 D48
FBA_D48 AJ48
FBA_D47 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1* 19 CMD14 A3_BA3 FBB_D49 C50
FBB_D48
FBA_D48 FBB_D49
FBA_D49 AJ46 FBB_D50 C48
FBA_D50 AJ47
FBA_D49 CMD15 CS* FBB_D51 C49
FBB_D50
FBA_D50 FBB_D51
FBA_D51 AK49 FBB_D52 E49
FBA_D52 AM47
FBA_D51 CMD16 CAS* FBB_D53 E50
FBB_D52
FBA_D52 FBB_D53
FBA_D53 AM46 FBB_D54 F49
FBA_D54 AN48
FBA_D53 CMD17 CKE* FBB_D55 F48
FBB_D54
FBA_D54 FBB_D55
FBA_D55 AN49 FBB_D56 F50 J33 FBB_WCK01
FBA_D56 AM44
FBA_D55
U45 FBA_WCK01 FB_WCK
CMD18 RST* FBB_D57 D52
FBB_D56 FBB_WCK01
H33 FBB_WCK01*
FBB_WCK01 FB_WCK FBB_WCK01 20
FBA_D56 FBA_WCK01 FBA_WCK01 FBA_WCK01 19 FBB_D57 FBB_WCK01 FBB_WCK01 FB_WCK FBB_WCK01* 20
FBA_D57 AM45 U44 FBA_WCK01* FB_WCK FBB_D58 J50 G35
FBA_D58 AN45
FBA_D57 FBA_WCK01
V45
FBA_WCK01 FBA_WCK01* 19 CMD19 RAS* FBB_D59 H48
FBB_D58 FBB_WCKB01
H35
FBA_D58 FBA_WCKB01 FBB_D59 FBB_WCKB01
FBA_D59 AN46 V44 FBB_D60 H51 J39 FBB_WCK23
FBA_D60 AR48
FBA_D59 FBA_WCKB01
AC45 FBA_WCK23 FB_WCK
CMD20 A1_A9 FBB_D61 J51
FBB_D60 FBB_WCK23
H39 FBB_WCK23*
FBA_D60 FBA_WCK23 FBA_WCK23 FBA_WCK23 19 FBB_D61 FBB_WCK23 FBB_WCK23 FB_WCK FBB_WCK23* 20
FBA_D61 AN47 AC44 FBA_WCK23* FB_WCK FBB_D62 H49 F41
FBA_D62 AR47
FBA_D61 FBA_WCK23
AD46
FBA_WCK23 FBA_WCK23* 19 CMD21 A0_A10 FBB_D63 H52
FBB_D62 FBB_WCKB23
G41
FBA_D62 FBA_WCKB23 FBB_D63 FBB_WCKB23
FBA_D63 AR46 AD45 L46 FBB_WCK45
FBA_D63 FBA_WCKB23
AV47 FBA_WCK45 FB_WCK
CMD22 A12_RFU FBB_WCK45
L45 FBB_WCK45*
FBA_WCK45 FBA_WCK45 FBA_WCK45 19 FBB_WCK45 FBB_WCK45 FB_WCK FBB_WCK45* 20
AV46 FBA_WCK45* FB_WCK FBB_DBI0 C32 M44
FBA_DBI0 U47
FBA_WCK45
AW48
FBA_WCK45 FBA_WCK45* 19 CMD23 ABI* FBB_DBI1 E33
FBB_DQM0 FBB_WCKB45
M45
FBA_DQM0 FBA_WCKB45 FBB_DQM1 FBB_WCKB45
FBA_DBI1 Y48 AW47 FBB_DBI2 E44 H47 FBB_WCK67
FBA_DBI2 AG47
FBA_DQM1 FBA_WCKB45
AR45 FBA_WCK67 FB_WCK
CMD24 A6_A11 FBB_DBI3 G39
FBB_DQM2 FBB_WCK67
H46 FBB_WCK67*
FBA_DQM2 FBA_WCK67 FBA_WCK67 FBA_WCK67 19 FBB_DQM3 FBB_WCK67 FBB_WCK67 FB_WCK FBB_WCK67* 20
FBA_DBI3 AC48 AR44 FBA_WCK67* FB_WCK FBB_DBI4 P49 J47
C
FBA_DBI4 BB51
FBA_DQM3 FBA_WCK67
AT45
FBA_WCK67 FBA_WCK67* 19 CMD25 A7_A8 FBB_DBI5 L48
FBB_DQM4 FBB_WCKB67
J46
C
FBA_DQM4 FBA_WCKB67 FBB_DQM5 FBB_WCKB67
FBA_DBI5 AV50 AT44 FBB_DBI6 D50
FBA_DBI6 AM48
FBA_DQM5 FBA_WCKB67 CMD26 WE* FBB_DBI7 H50
FBB_DQM6
FBA_DQM6 FBB_DQM7
FBA_DBI7 AR49 FBA_DQM7 CMD27 A5_BA1
FBB_EDC0 B33
FBA_EDC0 R48
CMD28 A4_BA2 FBB_EDC1 E35
FBB_DQS_WP0
FBA_DQS_WP0 FBB_DQS_WP1
FBA_EDC1 V48 FBB_EDC2 G44
FBA_EDC2 AF44
FBA_DQS_WP1 CMD29 A2_BA0 FBB_EDC3 H38
FBB_DQS_WP2
FBA_DQS_WP2 FBB_DQS_WP3
FBA_EDC3 AA48 FBB_EDC4 P50
FBA_EDC4 BB52
FBA_DQS_WP3 CMD30 A3_BA3 FBB_EDC5 J48
FBB_DQS_WP4
FBA_DQS_WP4 FBB_DQS_WP5 PLACE AT BALLS
FBA_EDC5 AT50 PLACE AT BALLS FBB_EDC6 D51
FBA_EDC6 AK48
FBA_DQS_WP5 CMD31 CS* FBB_EDC7 F51
FBB_DQS_WP6
L38 FB_PLL_AVDD
FBA_DQS_WP6 FBB_DQS_WP7 FBB_PLL_AVDD FB_PLL_AVDD 22
FBA_EDC7 AR51 FBA_DQS_WP7 FBA_PLL_AVDD AN42 FB_PLL_AVDD L11 . HCB1608KF-300T60 1V8_RUN
C216 C264 Y17 GND C88
W47 GND Y18 GND
W49 GND 0.1u_10V_X7R_04 22u_6.3V_X5R_08 Y19 GND
W51 GND Y20 GND 0.1u_10V_X7R_04
W6 GND D02A Y21 GND
W8 GND GND 6/8
MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆGND Y22 GND
Y14 GND
(ᄵ৫ߓᑇ) Y23 GND
Y15 GND Y24 GND GND
Y16 GND
FBVDDQ FBVDDQ
GND
FB_PLL_AVDD GND
AF42 FB_REFPLL_AVDD0
L29 FB_REFPLL_AVDD1
R5 R7 R36 R4
10K_04 10K_04 10K_04 10K_04
C84 C146
D 17,27,28,31,33,67 1V8_RUN D
FBA_CMD1 FBB_CMD1
0.1u_10V_X7R_04 0.1u_10V_X7R_04 FBA_CMD17 FBB_CMD17 19,20,21,22,23,24,25,27,33,72 FBVDDQ
FBA_CMD2 FBB_CMD2
FBA_CMD18 FBB_CMD18
GND R12 R11 R10 R35
10K_04 10K_04 10K_04 10K_04
Title
[18] VGA Frame Buffer Partition
GND GND

1 2 3 4 5 6 7 8
VGA Frame Buffer Partition B - 19

Schematic Diagrams
Frame Buffer Partition A

1 2 3 4 5 6 7 8
FBA_WCK01 FBA_CMD[31..0]
18 FBA_W CK01 FBA_WCK01* 18 FBA_CMD[31..0]
18
18
18
FBA_W CK01*
FBA_W CK23
FBA_W CK23*
FBA_WCK23
FBA_WCK23*
FBA_WCK45
18 FBA_D[63..0]
FBA_D[63..0]
FBA_DBI[7..0]
FRAME BUFFER PARTITION A
18 FBA_W CK45 FBA_WCK45* 18 FBA_DBI[7..0]
18 FBA_W CK45* FBA_WCK67 FBA_EDC[7..0]
18 FBA_W CK67 FBA_WCK67* 18 FBA_EDC[7..0] M8D
18 FBA_W CK67* INS115241755
BGA170
COMMON
A M9D NORMAL M8B A

INS115242370 INS115241858
BGA170_MIRR
FBA_D32 A4 DQ0 BGA170
COMMON FBA_D33 A2 DQ1 COMMON
FBA_D34 B4 DQ2
MIRRORED M9B
FBA_D35 B2 DQ3 FBA_CMD19 G3 RAS
INS115242074
x32 x16 BGA170_MIRR
FBA_D36 E4 DQ4 FBA_CMD16 L3 CAS
FBA_D0 V4 DQ0 COMMON FBA_D37 E2 DQ5 FBA_CMD26 L12 WE
NC
FBA_D1 V2 DQ1 FBA_D38 F4 DQ6 FBA_CMD31 G12 CS
NC
FBA_D2 T4 DQ2 FBA_CMD3 L3 RAS FBA_D39 F2 DQ7
NC
FBA_D3 T2 DQ3 FBA_CMD0 G3 CAS FBA_CMD23 J4 ABI
NC
FBA_D4 N4 DQ4 FBA_CMD10 G12 WE FBA_EDC4 C2 EDC0
NC
FBA_D5 N2 DQ5 FBA_CMD15 L12 CS FBA_DBI4 D2 DBI0 FBA_CMD21 H4 A0_A10
NC
FBA_D6 M4 DQ6 VREFD A10 FBA_CMD20 H5 A1_A9

NC
FBA_D7 M2 DQ7 FBA_CMD7 J4 ABI FBA_CMD29 H11 A2_BA0
NC
x32 x16 FBA_CMD30 H10 A3_BA3
FBA_EDC0 R2 EDC0 FBA_CMD5 K4 A0_A10 FBA_D40 A11 DQ8 FBA_CMD28 K11 A4_BA2
NC NC
FBA_DBI0 P2 DBI0 FBA_CMD4 K5 A1_A9 FBA_D41 A13 DQ9 FBA_CMD27 K10 A5_BA1
NC NC
FBA_CMD13 K11 A2_BA0 FBA_D42 B11 DQ10 FBA_CMD24 K5 A6_A11
NC
FBA_CMD14 K10 A3_BA3 FBA_D43 B13 DQ11 FBA_CMD25 K4 A7_A8
NC
VREFD V10 FBA_CMD12 H11 A4_BA2 FBA_D44 E11 DQ12 FBA_CMD22 J5 RFU_A12
NC
FBA_D8 V11 DQ8 FBA_CMD11 H10 A5_BA1 FBA_D45 E13 DQ13
Sheet 19 of 91
NC
FBA_D9 V13 DQ9 FBA_CMD8 H5 A6_A11 FBA_D46 F11 DQ14 NC
FBA_D10 T11 DQ10 FBA_CMD9 H4 A7_A8 FBA_D47 F13 DQ15 NC
FBA_D11 T13 DQ11 FBA_CMD6 J5 RFU_A12
FBA_D12 N11 DQ12 FBA_EDC5 C13 EDC1
Frame Buffer
GND
FBA_D13 N13 DQ13 FBA_DBI5 D13 DBI1 FBA_CMD18 J2 RESET
NC
FBA_D14 M11 DQ14 FBA_CMD17 J3 CKE
FBA_D15 M13 DQ15 FBA_W CK45 D4 WCK01
B FBA_W CK45* D5 J12 B
Partition A
WCK01 18 FBA_CLK1 CLK
FBA_EDC1 R13 EDC1 FBA_CMD2 J2 RESET J11 CLK
FBA_DBI1 FBA_CMD1 18 FBA_CLK1*
P13 DBI1 J3 CKE K4G80325FB-HC25
FBA_W CK01 P4 WCK01 J12 CLK R3 R8

FBA_W CK01* 18 FBA_CLK0 M8A
P5 WCK01 J11 CLK 40.2_1%_04 40.2_1%_04
18 FBA_CLK0* INS115241971
BGA170
K4G80325FB-HC25 COMMON
R6 R9
NORMAL
M9A 40.2_1%_04 40.2_1%_04
FBA_D48 V11 DQ16 A5 NC_RFU_A5
INS115242217
FBA_D49 C23
BGA170_MIRR V13 DQ17 V5 NC_RFU_V5
COMMON FBA_D50 T11 DQ18
FBA_D51 0.01u_50V_X7R_04
MIRRORED
T13 DQ19
A5 NC_RFU_A5 FBA_D52 N11 DQ20
C21 FBA_D53
x32 x16 V5 NC_RFU_V5 N13 DQ21
FBA_D16 A11 DQ16 FBA_D54 M11 DQ22
FBA_D17
NC 0.01u_50V_X7R_04 FBA_D55 GND
A13 DQ17 NC
M13 DQ23
FBA_D18 B11 DQ18
FBVDDQ
NC
FBA_D19 B13 DQ19 FBA_EDC6 R13 EDC2
NC
FBA_D20 E11 DQ20 FBA_DBI6 P13 DBI2
NC
FBA_D21 E13 GND V10
DQ21 NC VREFD 0.300
FBA_D22 F11 DQ22 R360 FBA_VREFC J14 VREFC
NC
FBA_D23 F13 DQ23 549_1%_04 x32 x16
NC
FBA_D56 V4 DQ24 FBA_ZQ2 J13 ZQ
NC
FBA_EDC2 C13 EDC2 0.300 FBA_D57 V2 DQ25 C667
GND NC
FBA_DBI2 D13 DBI2 FBA_VREFC J14 VREFC FBA_D58 T4 DQ26 J10 SEN
NC NC
820p_50V_X7R_04
FBA_D59 T2 R365
˙˕˔˲˩˥˘˙˖
DQ27 NC
FBA_ZQ0 J13 ZQ FBA_D60 N4 DQ28 121_1%_04
C C661 FBA_D61
NC
C
VREFD A10 N2 DQ29 K4G80325FB-HC25
FBA_D24 R366 FBA_D62
NC
A4 DQ24 J10 SEN M4 DQ30
1.33K_1%_04 NC
820p_50V_X7R_04
FBA_D25 A2 DQ25 FBA_D63 M2 DQ31

FBA_D26 R370 NC
B4 DQ26
FBA_D27 121_1%_04 FBA_EDC7
B2 DQ27 K4G80325FB-HC25 R2 EDC3 NC GND GND GND
FBA_D28 E4 DQ28 FBA_DBI7 P2 DBI3 NC
FBA_D29 E2 DQ29
FBA_D30 F4 DQ30 FBA_W CK67 P4 WCK23
FBA_D31 F2 DQ31 GND GND GND GND FBA_W CK67* P5 WCK23
FBA_EDC3 C2 EDC3 K4G80325FB-HC25

FBA_DBI3 D2 DBI3
FBA_W CK23 D4 WCK23

FBA_W CK23* D5 WCK23
K4G80325FB-HC25
0.300 FBA_VREF_L R359 931_1%_04 FBA_VREFC
D
Q29
G MTN2002ZS3
20,23,24,30 GPIO10_ALT_MEM_VREF
S
D 18,20,21,22,23,24,25,27,33,72 FBVDDQ D
GND
Title
[19] Frame Buffer Partition A
VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 20 Frame Buffer Partition A

Schematic Diagrams
Frame Buffer Partition B

1 2 3 4 5 6 7 8
FBB_WCK01 FBB_CMD[31..0]
18 FBB_W CK01 FBB_WCK01* 18 FBB_CMD[31..0]
18
18
18
FBB_W CK01*
FBB_W CK23
FBB_W CK23*
FBB_WCK23
FBB_WCK23*
FBB_WCK45
18 FBB_D[63..0]
FBB_D[63..0]
FBB_DBI[7..0]
FRAME BUFFER PARTITION B
18 FBB_W CK45 FBB_WCK45* 18 FBB_DBI[7..0]
18 FBB_W CK45* FBB_WCK67 FBB_EDC[7..0]
18 FBB_W CK67 FBB_WCK67* 18 FBB_EDC[7..0]
18 FBB_W CK67* M7B
M10B M7D INS115243542
M10D INS115243645 BGA170
INS115243758
A COMMON A
BGA170_MIRR BGA170
INS115243861
COMMON COMMON
BGA170_MIRR
COMMON FBB_CMD19 G3 RAS
FBB_CMD3 L3
NORMAL FBB_CMD16 L3
MIRRORED RAS CAS
FBB_CMD0 G3 CAS FBB_D32 A4 DQ0 FBB_CMD26 L12 WE
x32 x16 FBB_CMD10 G12 WE FBB_D33 A2 DQ1 FBB_CMD31 G12 CS
FBB_D0 V4 DQ0 FBB_CMD15 L12 CS FBB_D34 B4 DQ2
NC
FBB_D1 V2 DQ1 FBB_D35 B2 DQ3 FBB_CMD23 J4 ABI
NC
FBB_D2 T4 DQ2 FBB_CMD7 J4 ABI FBB_D36 E4 DQ4
NC
FBB_D3 T2 DQ3 FBB_D37 E2 DQ5 FBB_CMD21 H4 A0_A10
NC
FBB_D4 N4 DQ4 FBB_CMD5 K4 A0_A10 FBB_D38 F4 DQ6 FBB_CMD20 H5 A1_A9
NC
FBB_D5 N2 DQ5 FBB_CMD4 K5 A1_A9 FBB_D39 F2 DQ7 FBB_CMD29 H11 A2_BA0
NC
FBB_D6 M4 DQ6 FBB_CMD13 K11 A2_BA0 FBB_CMD30 H10 A3_BA3
NC
FBB_D7 M2 DQ7 FBB_CMD14 K10 A3_BA3 FBB_EDC4 C2 EDC0 FBB_CMD28 K11 A4_BA2
NC
FBB_CMD12 H11 A4_BA2 FBB_DBI4 D2 DBI0 FBB_CMD27 K10 A5_BA1
FBB_EDC0 R2 EDC0 FBB_CMD11 H10 A5_BA1 VREFD A10 FBB_CMD24 K5 A6_A11
NC
FBB_DBI0 P2 DBI0 FBB_CMD8 H5 A6_A11 FBB_CMD25 K4 A7_A8
NC
FBB_CMD9 H4 A7_A8 x32 x16 FBB_CMD22 J5 RFU_A12
FBB_CMD6 J5 RFU_A12 FBB_D40 A11 DQ8 NC
VREFD V10 FBB_D41 A13 DQ9 NC
FBB_D8 V11 DQ8 FBB_D42 B11 DQ10 NC
FBB_D9
FBB_D10
FBB_D11
FBB_D12
V13
T11
T13
N11
DQ9
DQ10
DQ11
FBB_CMD2 J2
FBB_D43
FBB_D44
FBB_D45
FBB_D46
B13
E11
E13
F11
DQ11
DQ12
DQ13
NC
NC
NC
FBB_CMD18
FBB_CMD17
J2
J3
RESET
Sheet 20 of 91
DQ12 RESET DQ14 NC CKE
FBB_D13
FBB_D14
FBB_D15
N13
M11
M13
DQ13
DQ14
DQ15 18 FBB_CLK0
FBB_CMD1 J3
J12
J11
CKE
CLK
FBB_D47
FBB_EDC5
FBB_DBI5
F13
C13
D13
DQ15
EDC1
NC
GND
18
18
FBB_CLK1
FBB_CLK1*
J12
J11
CLK
CLK
Frame Buffer
18 FBB_CLK0* CLK DBI1 NC
B FBB_EDC1
FBB_DBI1
FBB_W CK01
R13
P13
P4
EDC1
DBI1
R356 R357
FBB_W CK45
FBB_W CK45*
D4
D5
WCK01
WCK01
R1
40.2_1%_04
R2
40.2_1%_04
B
Partition B
WCK01
FBB_W CK01* P5 40.2_1%_04 40.2_1%_04 K4G80325FB-HC25
WCK01
M7A
K4G80325FB-HC25
INS115243964
BGA170 A5 NC_RFU_A5
M10A
A5 NC_RFU_A5 COMMON C16 V5 NC_RFU_V5
INS115244067
FBVDDQ C660 V5 NC_RFU_V5
BGA170_MIRR NORMAL
COMMON 0.01u_50V_X7R_04
0.01u_50V_X7R_04 FBB_D48 V11 DQ16
MIRRORED
FBB_D49 V13 DQ17
x32 x16 FBB_D50 T11 DQ18
FBB_D16 A11 DQ16 FBB_D51 T13 DQ19 GND
NC
FBB_D17 A13 DQ17 R355 GND FBB_D52 N11 DQ20
NC
FBB_D18 B11 DQ18 549_1%_04 FBB_D53 N13 DQ21
NC
FBB_D19 B13 DQ19 FBB_D54 M11 DQ22
NC
FBB_D20 E11 DQ20 FBB_D55 M13 DQ23 0.300
NC
FBB_D21 E13 DQ21 0.300 FBB_VREFC J14 VREFC
NC
FBB_D22 F11 DQ22 FBB_VREFC J14 VREFC FBB_EDC6 R13 EDC2
NC
FBB_D23 F13 DQ23 FBB_DBI6 P13 DBI2 FBB_ZQ2 J13 ZQ
NC
FBB_ZQ0 J13 ZQ VREFD V10 C664
FBB_EDC2 C13 EDC2 J10 SEN
GND
820p_50V_X7R_04
FBB_DBI2 D13 DBI2 J10 SEN x32 x16
NC
C659 R358 FBB_D56 V4 DQ24 R364
NC
1.33K_1%_04 R363 FBB_D57 V2 DQ25 121_1%_04 K4G80325FB-HC25
NC
VREFD A10 820p_50V_X7R_04 121_1%_04 K4G80325FB-HC25 FBB_D58 T4 DQ26 NC
FBB_D24 A4 DQ24 FBB_D59 T2 DQ27 NC
C FBB_D25 A2 FBB_D60 N4 C
DQ25 DQ28 NC
FBB_D26 B4 DQ26 FBB_D61 N2 DQ29 NC
FBB_D27 B2 DQ27 FBB_D62 M4 DQ30 NC
FBB_D28 E4 DQ28 GND GND GND GND FBB_D63 M2 DQ31 NC
FBB_D29 E2 DQ29
FBB_D30 F4 DQ30 FBB_EDC7 R2 EDC3 GND GND GND
NC
FBB_D31 F2 DQ31 FBB_DBI7 P2 DBI3 NC
FBB_EDC3 C2 EDC3 FBB_W CK67 P4 WCK23

FBB_DBI3 D2 DBI3 FBB_W CK67* P5 WCK23
FBB_W CK23 D4 WCK23 K4G80325FB-HC25

FBB_W CK23* D5 WCK23
K4G80325FB-HC25
FBB_VREF_H R354 931_1%_04 FBB_VREFC
0.300
D
Q28
G MTN2002ZS3
S
ངMT20022zs3 ற
6-15-20023-7b0
D D
18,19,21,22,23,24,25,27,33,72 FBVDDQ
GND
Title
[20] Frame Buffer Partition B
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
Frame Buffer Partition B B - 21

Schematic Diagrams
Frame Buffer Partition A_B

1 2 3 4 5 6 7 8
FRAME BUFFER PARTITION A/B DECOUPLING

FBVDDQ
FBVDDQ
DECOUPLING AROUND FBA MEMORIES (DQ0-DQ31) DECOUPLING AROUND FBA MEMORIES (DQ32-DQ63)
PLACE Under MEM PLACE Under MEM
SPARE SPARE
C33 C36 C30 C17 C25 C39 C19 C22 C40 C29 C28 C24 C666 C38 C32 C56 C57 C35 C663 C665
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
A A
GND GND
FBVDDQ FBVDDQ
C15
C3
C13
C2
C34
C655
C49
C656
C52
C47
C1 C8 C18 C4 C658 C5 C662 C51 C7 C48 C11 C14
1u x 10 1u x 10
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u x 6 10u x 6
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u x 5 22u x 5
Sheet 21 of 91
Frame Buffer FBVDDQ
M9C
INS136946535
BGA170_MIRR
COMMON
GND GND M8C
INS136949914
BGA170
COMMON FBVDDQ
FBVDDQ M10C
INS136953472
BGA170_MIRR
COMMON
GND M7C
INS136953786
BGA170
COMMON
GND
FBVDDQ
Partition A_B
B B
Mirrored Normal Mirrored Normal
SOE*/MF_VDD J1 J1 MF_VSS/SOE* SOE*/MF_VDD J1 J1 MF_VSS/SOE*
add 1k to VDD add 1k to VSS add 1k to VDD add 1k to VSS
C10
VDD VSS B10 B10 VSS VDD C10 C10
VDD VSS B10 B10 VSS VDD C10
C5
VDD VSS B5 B5 VSS VDD C5 C5
VDD VSS B5 B5 VSS VDD C5
D11
VDD VSS D10 D10 VSS VDD D11 D11
VDD VSS D10 D10 VSS VDD D11
G1
VDD VSS G10 G10 VSS VDD G1 G1
VDD VSS G10 G10 VSS VDD G1
G11
VDD VSS G5 G5 VSS VDD G11 G11
VDD VSS G5 G5 VSS VDD G11
G14
VDD VSS H1 H1 VSS VDD G14 G14
VDD VSS H1 H1 VSS VDD G14
G4
VDD VSS H14 H14 VSS VDD G4 G4
VDD VSS H14 H14 VSS VDD G4
L1
VDD VSS K1 K1 VSS VDD L1 L1
VDD VSS K1 K1 VSS VDD L1
L11
VDD VSS K14 K14 VSS VDD L11 L11
VDD VSS K14 K14 VSS VDD L11
L14
VDD VSS L10 L10 VSS VDD L14 L14
VDD VSS L10 L10 VSS VDD L14
L4
VDD VSS L5 L5 VSS VDD L4 L4
VDD VSS L5 L5 VSS VDD L4
P11
VDD VSS P10 P10 VSS VDD P11 P11
VDD VSS P10 P10 VSS VDD P11
R10
VDD VSS T10 T10 VSS VDD R10 R10
VDD VSS T10 T10 VSS VDD R10
R5
VDD VSS T5 T5 VSS VDD R5 R5
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1 VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1

VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5
C C
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1
VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12
VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3 VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3
K4G80325FB-HC25 K4G80325FB-HC25 K4G80325FB-HC25 K4G80325FB-HC25

D D
GND GND GND GND
18,19,20,22,23,24,25,27,33,72 FBVDDQ
Title
[21] Frame Buffer Partition A_B
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 22 Frame Buffer Partition A_B

Schematic Diagrams
GPU Frame Buffer Partition

1 2 3 4 5 6 7 8
FBD_DBI[7..0] FBD_CMD[31..0]
FBD_DBI[7..0] 24 FBD_CMD[31..0] 24
GPU FRAME BUFFER PARTITION C/D FBC_DBI[7..0]
FBC_DBI[7..0] 23
FBD_EDC[7..0]
FBD_EDC[7..0] 24
FBD_D[63..0]
FBD_D[63..0] 24
ϡP67RP Frame Dլ
լՂٙ
FBC_EDC[7..0]
U39D FBC_EDC[7..0] 23 U39E
INS127538168 FBC_CMD[31..0] INS127540031
BGA2152 FBC_CMD[31..0] 23 BGA2152
COMMON COMMON FBVDDQ
FBC_D[63..0]
4/23 FBC FBC_D[63..0] 23 5/23 FBD
FBC_D0 C6 FBC_D0 FBC_CMD0 C11 FBC_CMD0 FBVDDQ FBD_D0 AK8 FBD_D0 FBD_CMD0 AD2 FBD_CMD0
FBC_D1 D6 FBC_D1 FBC_CMD1 B11 FBC_CMD1 FBD_D1 AK4 FBD_D1 FBD_CMD1 AD1 FBD_CMD1
FBC_D2 A6 FBC_D2 FBC_CMD2 A11 FBC_CMD2 FBD_D2 AK2 FBD_D2 FBD_CMD2 AD4 FBD_CMD2
A FBC_D3 B6 FBC_D3 FBC_CMD3 D11 FBC_CMD3 FBD_D3 AK3 FBD_D3 FBD_CMD3 AC1 FBD_CMD3 R496 R163 A
FBC_D4 B4 FBC_D4 FBC_CMD4 A12 FBC_CMD4 FBD_D4 AK5 FBD_D4 FBD_CMD4 AC2 FBD_CMD4 10K_04
FBC_D5 FBC_CMD5 FBD_D5 FBD_CMD5 10K_04
A4 FBC_D5 FBC_CMD5 B12 AK6 FBD_D5 FBD_CMD5 AC3 FrameD
FBC_D6 FBC_CMD6 FBD_D6 FBD_CMD6 FrameD
B3 FBC_D6 FBC_CMD6 C12 R96 R47 AK9 FBD_D6 FBD_CMD6 AA3
FBC_D7 C4 FBC_D7 FBC_CMD7 C14 FBC_CMD7 10K_04 10K_04 FBD_D7 AK7 FBD_D7 FBD_CMD7 AA2 FBD_CMD7 FBD_CMD1
FBC_D8 D9 FBC_D8 FBC_CMD8 B14 FBC_CMD8 FBD_D8 AG4 FBD_D8 FBD_CMD8 AA1 FBD_CMD8 FBD_CMD17
FBC_D9 C9 FBC_D9 FBC_CMD9 A14 FBC_CMD9 FBD_D9 AF9 FBD_D9 FBD_CMD9 AA4 FBD_CMD9
FBC_D10 E9 FBC_D10 FBC_CMD10 D14 FBC_CMD10 FBC_CMD1 FBD_D10 AG6 FBD_D10 FBD_CMD10 Y1 FBD_CMD10 FBD_CMD2
FBC_D11 B9 FBC_D11 FBC_CMD11 A15 FBC_CMD11 FBC_CMD17 FBD_D11 AG7 FBD_D11 FBD_CMD11 Y2 FBD_CMD11 FBD_CMD18
FBC_D12 B8 FBC_D12 FBC_CMD12 B15 FBC_CMD12 FBD_D12 AJ4 FBD_D12 FBD_CMD12 Y3 FBD_CMD12
FBC_D13 A8 FBC_D13 FBC_CMD13 C15 FBC_CMD13 FBC_CMD2 FBD_D13 AJ5 FBD_D13 FBD_CMD13 V3 FBD_CMD13
FBC_D14 F6 FBC_D14 FBC_CMD14 C17 FBC_CMD14 FBC_CMD18 FBD_D14 AJ6 FBD_D14 FBD_CMD14 V2 FBD_CMD14 R156 R475
FBC_D15 E6 FBC_D15 FBC_CMD15 B17 FBC_CMD15 FBD_D15 AG5 FBD_D15 FBD_CMD15 V1 FBD_CMD15 10K_04 10K_04
FBC_D16 FBC_CMD16 FBD_D16 FBD_CMD16
F18 FBC_D16 FBC_CMD16 B24 Y6 FBD_D16 FBD_CMD16 L3 FrameD FrameD
FBC_D17 G18 FBC_D17 FBC_CMD17 A24 FBC_CMD17 R48 R97 FBD_D17 Y5 FBD_D17 FBD_CMD17 L2 FBD_CMD17
FBC_D18 E18 FBC_D18 FBC_CMD18 D23 FBC_CMD18 10K_04 10K_04 FBD_D18 V5 FBD_D18 FBD_CMD18 L1 FBD_CMD18
FBC_D19 H18 FBC_D19 FBC_CMD19 A23 FBC_CMD19 FBD_D19 Y4 FBD_D19 FBD_CMD19 M4 FBD_CMD19
FBC_D20 D15 FBC_D20 FBC_CMD20 B23 FBC_CMD20 FBD_D20 AA6 FBD_D20 FBD_CMD20 M1 FBD_CMD20
FBC_D21 E15 FBC_D21 FBC_CMD21 C23 FBC_CMD21 FBD_D21 AA5 FBD_D21 FBD_CMD21 M2 FBD_CMD21
FBC_D22 G17 FBC_D22 FBC_CMD22 C21 FBC_CMD22 FBD_D22 AC5 FBD_D22 FBD_CMD22 M3 FBD_CMD22 GND
FBC_D23 H17 FBC_D23 FBC_CMD23 B21 FBC_CMD23 FBD_D23 AC4 FBD_D23 FBD_CMD23 P3 FBD_CMD23
Sheet 22 of 91
J15 FBC_D24 FBC_CMD24 A21 AD7 FBD_D24 FBD_CMD24 P2 FBVDDQ
FBC_D25 H15 FBC_D25 FBC_CMD25 D20 FBC_CMD25 FBVDDQ GND FBD_D25 AC6 FBD_D25 FBD_CMD25 P1 FBD_CMD25
FBC_D26 E14 FBC_D26 FBC_CMD26 A20 FBC_CMD26 FBD_D26 AF6 FBD_D26 FBD_CMD26 R4 FBD_CMD26
FBC_D27 F14 FBC_D27 FBC_CMD27 B20 FBC_CMD27 FBD_D27 AD6 FBD_D27 FBD_CMD27 R1 FBD_CMD27
GPU Frame Buffer

FBC_D28 H11 FBC_D28 FBC_CMD28 C20 FBC_CMD28 FBD_D28 AF7 FBD_D28 FBD_CMD28 R2 FBD_CMD28
FBC_D29 G11 FBC_D29 FBC_CMD29 C18 FBC_CMD29 FBD_D29 AF8 FBD_D29 FBD_CMD29 R3 FBD_CMD29
FBC_D30 F11 FBC_D30 FBC_CMD30 B18 FBC_CMD30 R63 R51 FBD_D30 AF2 FBD_D30 FBD_CMD30 U3 FBD_CMD30 R119 R118
FBC_D31 E11 FBC_D31 FBC_CMD31 A18 FBC_CMD31 FBD_D31 AF3 FBD_D31 FBD_CMD31 U2 FBD_CMD31 *60.4_1%_04 *60.4_1%_04
B FBC_D32
FBC_D33
FBC_D34
FBC_D35
J29
F30
H29
G30
FBC_D32
FBC_D33
FBC_D34
FBC_CMD32
FBC_CMD33
FBC_CMD34
D17
A17
A9
C24
FBC_DEBUG0
FBC_DEBUG1
*60.4_1%_04 *60.4_1%_04 FBD_D32
FBD_D33
FBD_D34
FBD_D35
F4
E1
F3
F5
FBD_D32
FBD_D33
FBD_D34
FBD_CMD32
FBD_CMD33
FBD_CMD34
U1
V4
AD3
J3
FBD_DEBUG0
FBD_DEBUG1
B
Partition
FBC_D36 B30 FBC_D36 FBD_D36 D2 FBD_D36
FBC_D37 A30 FBC_D37 FBD_D37 D1 FBD_D37
FBC_D38 H30 FBC_D38 FBD_D38 C3 FBD_D38
FBC_D39 C30 FBC_D39 FBC_DBG_RFU1 J14 FBD_D39 C2 FBD_D39 FBD_DBG_RFU1 AC9
FBC_D40 D27 FBC_D40 FBC_DBG_RFU2 J23 FBD_D40 J5 FBD_D40 FBD_DBG_RFU2 P9
FBC_D41 J26 FBC_D41 FBD_D41 J4 FBD_D41
FBC_D42 F27 FBC_D42 FBD_D42 L8 FBD_D42
FBC_D43 G27 FBC_D43 FBD_D43 J2 FBD_D43
FBC_D44 C27 FBC_D44 FBC_CLK0 G15 FBC_CLK0 DP_FBC_CLK0 FB_CLK FBD_D44 F1 FBD_D44 FBD_CLK0 Y8
FBC_CLK0 23 FBD_CLK0 24
FBC_D45 B27 FBC_D45 FBC_CLK0 F15 FBC_CLK0* DP_FBC_CLK0 FB_CLK FBD_D45 F2 FBD_D45 FBD_CLK0 Y7
FBC_CLK0* 23 FBD_CLK0* 24
FBC_D46 A27 FBC_D46 FBC_CLK1 H21 FBC_CLK1 DP_FBC_CLK1 FB_CLK FBD_D46 H4 FBD_D46 FBD_CLK1 R8
FBC_CLK1 23 FBD_CLK1 24
FBC_D47 G29 FBC_D47 FBC_CLK1 J21 FBC_CLK1* DP_FBC_CLK1 FB_CLK FBD_D47 H5 FBD_D47 FBD_CLK1 R7
FBC_CLK1* 23 FBD_CLK1* 24
FBC_D48 H20 FBC_D48 FBD_D48 V7 FBD_D48
FBC_D49 D18 FBC_D49 FBD_D49 V8 FBD_D49
FBC_D50 G20 FBC_D50 FBD_D50 V6 FBD_D50
FBC_D51 E20 FBC_D51 FBD_D51 V9 FBD_D51
FBC_D52 F23 FBC_D52 FBD_D52 U4 FBD_D52
FBC_D53 E21 FBC_D53 FBD_D53 R5 FBD_D53
FBC_D54 D21 FBC_D54 FBD_D54 R6 FBD_D54
FBC_D55 E23 FBC_D55 FBD_D55 U8 FBD_D55
FBC_D56 G24 FBC_D56 FBC_WCK01 F8 FBC_W CK01 FBC_WCK01 FB_WCK FBD_D56 P6 FBD_D56 FBD_WCK01 AJ8
FBC_W CK01 23 FBD_W CK01 24
FBC_D57 H26 FBC_D57 FBC_WCK01 G8 FBC_W CK01* FBC_WCK01 FB_WCK FBD_D57 R9 FBD_D57 FBD_WCK01 AJ7
FBC_W CK01* 23 FBD_W CK01* 24
FBC_D58 F24 FBC_D58 FBC_WCKB01 G9 FBD_D58 P4 FBD_D58 FBD_WCKB01 AG8
FBC_D59 G26 FBC_D59 FBC_WCKB01 F9 FBD_D59 P5 FBD_D59 FBD_WCKB01 AG9
FBC_D60 F26 FBC_D60 FBC_WCK23 H12 FBC_W CK23 FBC_WCK23 FB_WCK FBD_D60 L7 FBD_D60 FBD_WCK23 AD8
C FBC_W CK23 23 FBD_W CK23 24 C
FBC_D61 D26 FBC_D61 FBC_WCK23 G12 FBC_W CK23* FBC_WCK23 FB_WCK FBD_D61 L6 FBD_D61 FBD_WCK23 AD9
FBC_D62 B26 FBC_D62 FBC_WCKB23 G14 FBD_D62 L4 FBD_D62 FBD_WCKB23 AC7
FBC_D63 C26 FBC_D63 FBC_WCKB23 H14 FBD_D63 L5 FBD_D63 FBD_WCKB23 AC8
FBC_WCK45 J27 FBC_W CK45 FBC_WCK45 FB_WCK FBD_WCK45 J6
FBC_WCK45 H27 FBC_W CK45* FBC_WCK45 FB_WCK FBD_WCK45 J7
FBC_DBI0 A5 FBC_DQM0 FBC_WCKB45 E29 FBD_DBI0 AJ1 FBD_DQM0 FBD_WCKB45 H7
FBC_DBI1 C8 FBC_DQM1 FBC_WCKB45 F29 FBD_DBI1 AG1 FBD_DQM1 FBD_WCKB45 H6
FBC_DBI2 J18 FBC_DQM2 FBC_WCK67 G23 FBC_W CK67 FBC_WCK67 FB_WCK FBD_DBI2 AA7 FBD_DQM2 FBD_WCK67 P8
FBC_DBI3 F12 FBC_DQM3 FBC_WCK67 H23 FBC_W CK67* FBC_WCK67 FB_WCK FBD_DBI3 AD5 FBD_DQM3 FBD_WCK67 P7
FBC_DBI4 D29 FBC_DQM4 FBC_WCKB67 H24 FBD_DBI4 D3 FBD_DQM4 FBD_WCKB67 M7
FBC_DBI5 E27 FBC_DQM5 FBC_WCKB67 J24 FBD_DBI5 H3 FBD_DQM5 FBD_WCKB67 M8
FBC_DBI6 F20 FBC_DQM6 FBD_DBI6 U5 FBD_DQM6
FBC_DBI7 E26 FBC_DQM7 FBD_DBI7 M9 FBD_DQM7
FBC_EDC0 D5 FBC_DQS_WP0 FBD_EDC0 AJ3 FBD_DQS_WP0

FBC_EDC1 D8 FBC_DQS_WP1 FBD_EDC1 AG2 FBD_DQS_WP1
FBC_EDC2 E17 FBC_DQS_WP2 FBD_EDC2 AA9 FBD_DQS_WP2
FBC_EDC3 E12 FBC_DQS_WP3 FBD_EDC3 AF4 FBD_DQS_WP3
FBC_EDC4 E30 FBC_DQS_WP4 FBD_EDC4 E3 FBD_DQS_WP4
FBC_EDC5 B29 FBC_DQS_WP5 FBD_EDC5 H2 FBD_DQS_WP5
FBC_EDC6 G21 FBC_DQS_WP6 FBD_EDC6 U6 FBD_DQS_WP6
FBC_EDC7 E24 FBC_DQS_WP7 FBC_PLL_AVDD L17 FBD_EDC7 M5 FBD_DQS_WP7 FBD_PLL_AVDD V11
FB_PLL_AVDD 18,22 FB_PLL_AVDD 18,22
Y25 GND C240 Y33 GND C101

Y26 GND Y34 GND
Y27 GND 0.1u_10V_X7R_04 Y35 GND 0.1u_10V_X7R_04
D
Y28 GND Y36 GND D
Y29 GND Y37 GND
Y30 GND Y38 GND GND
Y31 GND Y39 GND
Y32 GND GND Y9 GND
GND GND GP104 GP106
Title
18,22 FB_PLL_AVDD
[22] GPU Frame Buffer Partition
18,19,20,21,23,24,25,27,33,72 FBVDDQ FBD UNUSED Size Document Number Rev
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
GPU Frame Buffer Partition B - 23

Schematic Diagrams
Frame Buffer Partition C

1 2 3 4 5 6 7 8
22 FBC_CMD[31..0]
FBC_CMD[31..0]
FBC_D[63..0] 22 FBC_W CK01

FBC_WCK01
FBC_WCK01*
FRAME BUFFER PARTITION C
22 FBC_D[63..0] 22 FBC_W CK01* FBC_WCK23
FBC_DBI[7..0] 22 FBC_W CK23 FBC_WCK23*
22 FBC_DBI[7..0] 22 FBC_W CK23* FBC_WCK45
FBC_EDC[7..0] 22 FBC_W CK45 FBC_WCK45*
22 FBC_EDC[7..0] 22 FBC_W CK45* FBC_WCK67 M11D
22 FBC_W CK67 FBC_WCK67* INS115249753 M11B
22 FBC_W CK67* BGA170 INS115249537
COMMON
BGA170
COMMON
M12D NORMAL
A INS115249856 M12B A
BGA170_MIRR
FBC_D32 A4 DQ0 FBC_CMD19 G3 RAS
INS115249231
COMMON
BGA170_MIRR
FBC_D33 A2 DQ1 FBC_CMD16 L3 CAS
COMMON FBC_D34 B4 DQ2 FBC_CMD26 L12 WE
MIRRORED
FBC_D35 B2 DQ3 FBC_CMD31 G12 CS
x32 x16 FBC_CMD3 L3 RAS FBC_D36 E4 DQ4
FBC_D0 V4 DQ0 FBC_CMD0 G3 CAS FBC_D37 E2 DQ5 FBC_CMD23 J4 ABI
NC
FBC_D1 V2 DQ1 FBC_CMD10 G12 WE FBC_D38 F4 DQ6
NC
FBC_D2 T4 DQ2 FBC_CMD15 L12 CS FBC_D39 F2 DQ7 FBC_CMD21 H4 A0_A10
NC
FBC_D3 T2 DQ3 FBC_CMD20 H5 A1_A9
NC
FBC_D4 N4 DQ4 FBC_CMD7 J4 ABI FBC_EDC4 C2 EDC0 FBC_CMD29 H11 A2_BA0
NC
FBC_D5 N2 DQ5 FBC_DBI4 D2 DBI0 FBC_CMD30 H10 A3_BA3
NC
FBC_D6 M4 DQ6 FBC_CMD5 K4 A0_A10 VREFD A10 FBC_CMD28 K11 A4_BA2
NC
FBC_D7 M2 FBC_CMD4 K5 FBC_CMD27 K10
DQ7 NC A1_A9 A5_BA1

FBC_CMD13 K11 A2_BA0 x32 x16 FBC_CMD24 K5 A6_A11
FBC_EDC0 R2 EDC0 FBC_CMD14 K10 A3_BA3 FBC_D40 A11 DQ8 FBC_CMD25 K4 A7_A8
NC NC
FBC_DBI0 P2 DBI0 FBC_CMD12 H11 A4_BA2 FBC_D41 A13 DQ9 FBC_CMD22 J5 RFU_A12
NC NC
FBC_CMD11 H10 A5_BA1 FBC_D42 B11 DQ10 NC
FBC_CMD8 H5 A6_A11 FBC_D43 B13 DQ11 NC
VREFD V10 FBC_CMD9 H4 A7_A8 FBC_D44 E11 DQ12 NC
FBC_D8 V11 DQ8 FBC_CMD6 J5 RFU_A12 FBC_D45 E13 DQ13 NC
FBC_D9 V13 DQ9 FBC_D46 F11 DQ14 NC
Sheet 23 of 91
FBC_D10 T11 DQ10 FBC_D47 F13 DQ15 FBC_CMD18 J2 RESET
NC
FBC_D11 T13 DQ11 FBC_CMD17 J3 CKE
FBC_D12 N11 DQ12 FBC_EDC5 C13 EDC1 GND
FBC_D13 N13 DQ13 FBC_DBI5 D13 DBI1 J12 CLK
NC 22 FBC_CLK1
Frame Buffer B
FBC_D14
FBC_D15
FBC_EDC1
M11
M13
R13
DQ14
DQ15
FBC_CMD2
FBC_CMD1
J2
J3
J12
RESET
CKE FBC_W CK45
FBC_W CK45*
D4
D5
WCK01
WCK01
22 FBC_CLK1*
J11 CLK
B
EDC1 22 FBC_CLK0 CLK R55 R56
Partition C FBC_DBI1
FBC_W CK01
FBC_W CK01*
P13
P4
DBI1
WCK01
22 FBC_CLK0*
J11 CLK K4G80325FB-HC25
M11A
40.2_1%_04 40.2_1%_04
P5 WCK01 R58 R59 INS115249374

BGA170
K4G80325FB-HC25 40.2_1%_04 40.2_1%_04 COMMON A5 NC_RFU_A5
C199 V5 NC_RFU_V5
M12A NORMAL
INS115249650
BGA170_MIRR
FBC_D48 V11 DQ16 0.01u_50V_X7R_04
COMMON A5 NC_RFU_A5 FBC_D49 V13 DQ17
FBVDDQ C220 V5 NC_RFU_V5 FBC_D50 T11 DQ18
MIRRORED
FBC_D51 T13 DQ19
x32 x16 0.01u_50V_X7R_04 FBC_D52 N11 DQ20 GND
FBC_D16 A11 DQ16 FBC_D53 N13 DQ21
NC
FBC_D17 A13 DQ17 FBC_D54 M11 DQ22
NC
FBC_D18 B11 DQ18 FBC_D55 M13 DQ23
NC
FBC_D19 B13 DQ19 R390 GND 0.300
NC
FBC_D20 E11 DQ20 549_1%_04 FBC_EDC6 R13 EDC2 FBC_VREFC J14 VREFC
NC
FBC_D21 E13 DQ21 FBC_DBI6 P13 DBI2
NC
FBC_D22 F11 DQ22 VREFD V10 FBC_ZQ2 J13 ZQ
NC
FBC_D23 F13 DQ23 0.300
NC
FBC_VREFC J14 VREFC x32 x16 J10 SEN
FBC_EDC2 C13 EDC2 FBC_D56 V4 DQ24
FBC_DBI2
GND
FBC_ZQ0 FBC_D57
NC C708
D13 DBI2 NC
J13 ZQ V2 DQ25 NC
FBC_D58 T4 DQ26 R53 K4G80325FB-HC25
FBC_D59
NC 820p_50V_X7R_04
J10 SEN T2 DQ27 NC
121_1%_04
VREFD A10 FBC_D60 N4 DQ28 NC
FBC_D24 A4 DQ24 C701 R391 FBC_D61 N2 DQ29
C FBC_D25 R62 FBC_D62
NC
C
A2 DQ25 1.33K_1%_04 K4G80325FB-HC25 M4 DQ30
FBC_D26 121_1%_04 FBC_D63
NC
B4 DQ26 820p_50V_X7R_04 M2 DQ31 NC
FBC_D27 B2 GND GND GND
DQ27
FBC_D28 E4 DQ28 FBC_EDC7 R2 EDC3 NC
FBC_D29 E2 DQ29 FBC_DBI7 P2 DBI3 NC
FBC_D30 F4 DQ30
FBC_D31 F2 DQ31 GND GND GND GND FBC_W CK67 P4 WCK23
FBC_W CK67* P5 WCK23
FBC_EDC3 C2 EDC3
FBC_DBI3 D2 DBI3 K4G80325FB-HC25
FBC_W CK23 D4 WCK23

FBC_W CK23* D5 WCK23
K4G80325FB-HC25
0.300 FBC_VREF_L R392 931_1%_04 FBC_VREFC
D
D D
Q33
G MTN2002ZS3
S
GND Title
[23] Frame Buffer Partition C
VRAM=K4G80325FB-HC03, HC28 18,19,20,21,22,24,25,27,33,72 FBVDDQ A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 24 Frame Buffer Partition C

Schematic Diagrams
Frame Buffer Partition D

1 2 3 4 5
22 FBD_CMD[31..0]
FBD_CMD[31..0]
FBD_D[63..0] 22 FBD_W CK01

FBD_WCK01
FBD_WCK01*
FRAME BUFFER PARTITION D ϡP67RP Frame Dլ
լՂٙ (ᖞ
ᖞ଄լՂٙ)
22 FBD_D[63..0] 22 FBD_W CK01* FBD_WCK23
FBD_DBI[7..0] 22 FBD_W CK23 FBD_WCK23*
22 FBD_DBI[7..0] 22 FBD_W CK23* FBD_WCK45 M14D
FBDEDC[7..0]
22 FBD_W CK45 FBD_WCK45* INS115251069
22 FBD_EDC[7..0] 22 FBD_W CK45* BGA170
FBD_WCK67 COMMON
22 FBD_W CK67 FBD_WCK67*
22 FBD_W CK67* NORMAL
A A
FBD_D32 A4 DQ0
M13D M13B
FBD_D33 A2 DQ1
INS115251408 INS115251663
BGA170_MIRR BGA170_MIRR
FBD_D34 B4 DQ2 M14B
COMMON COMMON FBD_D35 B2 DQ3 INS115250966
FBD_D36 E4 DQ4 BGA170
MIRRORED
FBD_CMD3 L3 RAS FBD_D37 E2 DQ5 COMMON
x32 x16 FBD_CMD0 G3 CAS FBD_D38 F4 DQ6
FBD_D0 V4 DQ0 FBD_CMD10 G12 WE FBD_D39 F2 DQ7 FBD_CMD19 G3 RAS
NC
FBD_D1 V2 DQ1 FBD_CMD15 L12 CS FBD_CMD16 L3 CAS
NC
FBD_D2 T4 DQ2 FBD_EDC4 C2 EDC0 FBD_CMD26 L12 WE
NC
FBD_D3 T2 DQ3 FBD_CMD7 J4 ABI FBD_DBI4 D2 DBI0 FBD_CMD31 G12 CS
NC
FBD_D4 N4 DQ4 VREFD A10
NC
FBD_D5 N2 DQ5 FBD_CMD5 K4 A0_A10 FBD_CMD23 J4 ABI
NC
FBD_D6 M4 DQ6 FBD_CMD4 K5 A1_A9 x32 x16
NC
FBD_D7 M2 DQ7 FBD_CMD13 K11 A2_BA0 FBD_D40 A11 DQ8 FBD_CMD21 H4 A0_A10
NC NC
FBD_CMD14 K10 A3_BA3 FBD_D41 A13 DQ9 FBD_CMD20 H5 A1_A9
NC
FBD_EDC0 R2 EDC0 FBD_CMD12 H11 A4_BA2 FBD_D42 B11 DQ10 FBD_CMD29 H11 A2_BA0
NC NC
FBD_DBI0 P2 DBI0 FBD_CMD11 H10 A5_BA1 FBD_D43 B13 DQ11 FBD_CMD30 H10 A3_BA3
NC NC
FBD_CMD8 H5 A6_A11 FBD_D44 E11 DQ12 FBD_CMD28 K11 A4_BA2
NC
FBD_CMD9 H4 A7_A8 FBD_D45 E13 DQ13 FBD_CMD27 K10 A5_BA1
NC
VREFD V10 FBD_CMD6 J5 RFU_A12 FBD_D46 F11 DQ14 FBD_CMD24 K5 A6_A11
Sheet 24 of 91
NC
FBD_D8 V11 DQ8 FBD_D47 F13 DQ15 FBD_CMD25 K4 A7_A8
NC
FBD_D9 V13 DQ9 FBD_CMD22 J5 RFU_A12
FBD_D10 T11 DQ10 FBD_EDC5 C13 EDC1 GND
FBD_D11 T13 FBD_DBI5 D13
FBD_D12
FBD_D13
FBD_D14
N11
N13
M11
DQ11
DQ12
DQ13
DQ14
FBD_CMD2
FBD_CMD1
J2
J3
RESET
CKE
FBD_W CK45
FBD_W CK45*
D4
D5
DBI1
WCK01
WCK01
NC
Frame Buffer
FBD_D15 M13 FBD_CMD18 J2
Partition D
B DQ15 RESET B
J12 CLK K4G80325FB-HC25 FBD_CMD17 J3 CKE
FBD_EDC1 22 FBD_CLK0
R13 EDC1 J11 CLK FrameD
FBD_DBI1 22 FBD_CLK0*
P13 DBI1 J12 CLK
M14A 22 FBD_CLK1
J11 CLK
FBD_W CK01 INS115251172 22 FBD_CLK1*
P4 WCK01 BGA170
FBD_W CK01* R489 R484
P5 WCK01 COMMON
40.2_1%_04 40.2_1%_04
FrameD FrameD NORMAL R488 R483
K4G80325FB-HC25 40.2_1%_04 40.2_1%_04
FBD_D48 V11 DQ16
FrameD FrameD FrameD
FBD_D49 V13 DQ17
M13A FBD_D50
A5 NC_RFU_A5 T11 DQ18
INS115251285
BGA170_MIRR FBVDDQ C771 V5 NC_RFU_V5 FBD_D51 T13 DQ19
COMMON FBD_D52 N11 DQ20 A5 NC_RFU_A5
0.01u_50V_X7R_04 FBD_D53 N13 DQ21 C770 V5 NC_RFU_V5
MIRRORED
FrameD FBD_D54 M11 DQ22
x32 x16 FBD_D55 M13 DQ23 0.01u_50V_X7R_04
FBD_D16 A11 DQ16 FrameD
NC
FBD_D17 A13 DQ17 R494 GND FBD_EDC6 R13 EDC2
NC
FBD_D18 B11 DQ18 549_1%_04 FBD_DBI6 P13 DBI2
NC
FBD_D19 B13 DQ19 FrameD VREFD V10 GND
NC
FBD_D20 E11 DQ20 NC
FBD_D21 E13 DQ21 0.300 x32 x16
NC
FBD_D22 F11 DQ22 FBD_VREFC J14 VREFC FBD_D56 V4 DQ24
NC NC
FBD_D23 F13 DQ23 FBD_D57 V2 DQ25 0.300
NC NC
FBD_ZQ0 J13 ZQ FBD_D58 T4 DQ26 FBD_VREFC J14 VREFC
NC
FBD_EDC2 C13 EDC2 FBD_D59 T2 DQ27
GND NC
FBD_DBI2 D13 DBI2 J10 SEN FBD_D60 N4 DQ28 FBD_ZQ2 J13 ZQ
NC NC
FBD_D61 N2 DQ29
C C789 FBD_D62
NC
C
M4 DQ30 J10 SEN
R492 R491 FBD_D63
NC
VREFD A10 K4G80325FB-HC25 M2 DQ31
FBD_D24 820p_50V_X7R_04 1.33K_1%_04 121_1%_04 NC
A4 DQ24 FrameD C788
FBD_D25 FrameD FrameD FrameD FBD_EDC7 R490
A2 DQ25 R2 EDC3 K4G80325FB-HC25
FBD_D26 FBD_DBI7
NC 121_1%_04
B4 DQ26 P2 DBI3 820p_50V_X7R_04 FrameD
FBD_D27
NC FrameD
B2 DQ27 FrameD
FBD_D28 E4 DQ28 FBD_W CK67 P4 WCK23
FBD_D29 E2 DQ29 GND GND GND GND FBD_W CK67* P5 WCK23
FBD_D30 F4 DQ30
FBD_D31 F2 DQ31 K4G80325FB-HC25
FrameD GND GND GND
FBD_EDC3 C2 EDC3
FBD_DBI3 D2 DBI3
FBD_W CK23 D4 WCK23

FBD_W CK23* D5 WCK23
K4G80325FB-HC25
0.300 FBD_VREF_L R493 931_1%_04 FBD_VREFC
FrameD
D
FrameD
Q42
G MTN2002ZS3
FrameD
S
GND
D D
18,19,20,21,22,23,25,27,33,72 FBVDDQ
Title
[24] Frame Buffer Partition D
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5
Frame Buffer Partition D B - 25

Schematic Diagrams
Frame Buffer Partition C_D

1 2 3 4 5 6 7 8
FRAME BUFFER PARTITION C/D DECOUPLING FBVDDQ

ϡP670RP Frame Dլ
լՂٙ
FBVDDQ DECOUPLING AROUND FBC MEMORIES (DQ32-DQ63) PLACE Under MEM
DECOUPLING AROUND FBC MEMORIES (DQ0-DQ31) PLACE Under MEM
C768 C342 C337 C810 C762 C759 C769 C811 C783 C781
C147 C179 C99 C180 C98 C285 C251 C284 C250 C267
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
FrameD
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
A A
GND
GND
FBVDDQ
C829
C308
C828
C827
C761
FBVDDQ
C80
C189
C272
C229
C291
C799 C803 C345 C805 C822 C800
C271 C248 C188 C132 C165 C275
1u x 10
FrameD
10u_6.3V_X5R_06
FrameD
10u_6.3V_X5R_06
FrameD
10u_6.3V_X5R_06
FrameD
10u_6.3V_X5R_06
FrameD
10u_6.3V_X5R_06
FrameD
10u_6.3V_X5R_06
FrameD
22u_6.3V_X5R_08
FrameD
22u_6.3V_X5R_08
FrameD
22u_6.3V_X5R_08
FrameD
22u_6.3V_X5R_08
FrameD
22u_6.3V_X5R_08
1u x 10 10u x 6
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u x 6 22u x 5
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u x 5
Sheet 25 of 91 GND GND

GND GND
Frame Buffer
M14C M13C
M12C M11C INS136961647 INS136961333
INS136957723 INS136957409 BGA170 BGA170_MIRR
COMMON COMMON
BGA170_MIRR BGA170
COMMON COMMON FBVDDQ
Normal Mirrored
Partition C_D B FBVDDQ FBVDDQ B
Mirrored Normal J1 MF_VSS/SOE* J1 SOE*/MF_VDD
SOE*/MF_VDD J1 J1 MF_VSS/SOE* add 1k to VSS add 1k to VDD
add 1k to VDD add 1k to VSS B10 VSS VDD C10 C10 VDD VSS B10
C10
VDD VSS B10 B10 VSS VDD C10 B5 VSS VDD C5 C5 VDD VSS B5
C5
VDD VSS B5 B5 VSS VDD C5 D10 VSS VDD D11 D11 VDD VSS D10
D11
VDD VSS D10 D10 VSS VDD D11 G10 VSS VDD G1 G1 VDD VSS G10
G1
VDD VSS G10 G10 VSS VDD G1 G5 VSS VDD G11 G11 VDD VSS G5
G11
VDD VSS G5 G5 VSS VDD G11 H1 VSS VDD G14 G14 VDD VSS H1
G14
VDD VSS H1 H1 VSS VDD G14 H14 VSS VDD G4 G4 VDD VSS H14
G4
VDD VSS H14 H14 VSS VDD G4 K1 VSS VDD L1 L1 VDD VSS K1
L1
VDD VSS K1 K1 VSS VDD L1 K14 VSS VDD L11 L11 VDD VSS K14
L11
VDD VSS K14 K14 VSS VDD L11 L10 VSS VDD L14 L14 VDD VSS L10
L14
VDD VSS L10 L10 VSS VDD L14 L5 VSS VDD L4 L4 VDD VSS L5
L4
VDD VSS L5 L5 VSS VDD L4 P10 VSS VDD P11 P11 VDD VSS P10
P11
VDD VSS P10 P10 VSS VDD P11 T10 VSS VDD R10 R10 VDD VSS T10
R10
VDD VSS T10 T10 VSS VDD R10 T5 VSS VDD R5 R5 VDD VSS T5
R5
A1 VSSQ VDDQ B1 B1 VDDQ VSSQ A1
VDDQ B1 VSSQ A1 A1 VSSQ VDDQ B1 A12 VSSQ VDDQ B12 B12 VDDQ VSSQ A12
VDDQB12 VSSQ A12 A12 VSSQ VDDQ B12 A14 VSSQ VDDQ B14 B14 VDDQ VSSQ A14
VDDQB14 VSSQ A14 A14 VSSQ VDDQ B14 A3 VSSQ VDDQ B3 B3 VDDQ VSSQ A3
VDDQ B3 VSSQ A3 A3 VSSQ VDDQ B3 C1 VSSQ VDDQ D1 D1 VDDQ VSSQ C1
VDDQD1 VSSQ C1 C1 VSSQ VDDQ D1 C11 VSSQ VDDQ D12 D12 VDDQ VSSQ C11
D12
VDDQ VSSQ C11 C11 VSSQ VDDQ D12 C12 VSSQ VDDQ D14 D14 VDDQ VSSQ C12
D14
VDDQ VSSQ C12 C12 VSSQ VDDQ D14 C14 VSSQ VDDQ D3 D3 VDDQ VSSQ C14
VDDQD3 VSSQ C14 C14 VSSQ VDDQ D3 C3 VSSQ VDDQ E10 E10 VDDQ VSSQ C3
VDDQE10 VSSQ C3 C3 VSSQ VDDQ E10 C4 VSSQ VDDQ E5 E5 VDDQ VSSQ C4
VDDQ E5 VSSQ C4 C4 VSSQ VDDQ E5 E1 VSSQ VDDQ F1 F1 VDDQ VSSQ E1
C C
VDDQ F1 VSSQ E1 E1 VSSQ VDDQ F1 E12 VSSQ VDDQ F12 F12 VDDQ VSSQ E12
VDDQF12 VSSQ E12 E12 VSSQ VDDQ F12 E14 VSSQ VDDQ F14 F14 VDDQ VSSQ E14
VDDQF14 VSSQ E14 E14 VSSQ VDDQ F14 E3 VSSQ VDDQ F3 F3 VDDQ VSSQ E3
VDDQ F3 VSSQ E3 E3 VSSQ VDDQ F3 F10 VSSQ VDDQ G13 G13 VDDQ VSSQ F10
G13
VDDQ VSSQ F10 F10 VSSQ VDDQ G13 F5 VSSQ VDDQ G2 G2 VDDQ VSSQ F5
VDDQG2 VSSQ F5 F5 VSSQ VDDQ G2 H13 VSSQ VDDQ H12 H12 VDDQ VSSQ H13
H12
VDDQ VSSQ H13 H13 VSSQ VDDQ H12 H2 VSSQ VDDQ H3 H3 VDDQ VSSQ H2
VDDQH3 VSSQ H2 H2 VSSQ VDDQ H3 K13 VSSQ VDDQ K12 K12 VDDQ VSSQ K13
VDDQK12 VSSQ K13 K13 VSSQ VDDQ K12 K2 VSSQ VDDQ K3 K3 VDDQ VSSQ K2
VDDQ K3 VSSQ K2 K2 VSSQ VDDQ K3 M10 VSSQ VDDQ L13 L13 VDDQ VSSQ M10
VDDQL13 VSSQ M10 M10 VSSQ VDDQ L13 M5 VSSQ VDDQ L2 L2 VDDQ VSSQ M5
VDDQ L2 VSSQ M5 M5 VSSQ VDDQ L2 N1 VSSQ VDDQ M1 M1 VDDQ VSSQ N1
VDDQM1 VSSQ N1 N1 VSSQ VDDQ M1 N12 VSSQ VDDQ M12 M12 VDDQ VSSQ N12
M12
VDDQ VSSQ N12 N12 VSSQ VDDQ M12 N14 VSSQ VDDQ M14 M14 VDDQ VSSQ N14
M14
VDDQ VSSQ N14 N14 VSSQ VDDQ M14 N3 VSSQ VDDQ M3 M3 VDDQ VSSQ N3
VDDQM3 VSSQ N3 N3 VSSQ VDDQ M3 R1 VSSQ VDDQ N10 N10 VDDQ VSSQ R1
N10
VDDQ VSSQ R1 R1 VSSQ VDDQ N10 R11 VSSQ VDDQ N5 N5 VDDQ VSSQ R11
VDDQN5 VSSQ R11 R11 VSSQ VDDQ N5 R12 VSSQ VDDQ P1 P1 VDDQ VSSQ R12
VDDQ P1 VSSQ R12 R12 VSSQ VDDQ P1 R14 VSSQ VDDQ P12 P12 VDDQ VSSQ R14
VDDQP12 VSSQ R14 R14 VSSQ VDDQ P12 R3 VSSQ VDDQ P14 P14 VDDQ VSSQ R3
VDDQP14 VSSQ R3 R3 VSSQ VDDQ P14 R4 VSSQ VDDQ P3 P3 VDDQ VSSQ R4
VDDQ P3 VSSQ R4 R4 VSSQ VDDQ P3 V1 VSSQ VDDQ T1 T1 VDDQ VSSQ V1
VDDQ T1 VSSQ V1 V1 VSSQ VDDQ T1 V12 VSSQ VDDQ T12 T12 VDDQ VSSQ V12
VDDQT12 VSSQ V12 V12 VSSQ VDDQ T12 V14 VSSQ VDDQ T14 T14 VDDQ VSSQ V14
VDDQT14 VSSQ V14 V14 VSSQ VDDQ T14 V3 VSSQ VDDQ T3 T3 VDDQ VSSQ V3
VDDQ T3 VSSQ V3 V3 VSSQ VDDQ T3
K4G80325FB-HC25 K4G80325FB-HC25
K4G80325FB-HC25 K4G80325FB-HC25 FrameD FrameD
D GND GND D
GND GND
Title
18,19,20,21,22,23,24,27,33,72 FBVDDQ
[25] Frame Buffer Partition C_D
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 26 Frame Buffer Partition C_D

GPU Decoupling 1 B - 27
Schematic Diagrams
GPU Decoupling 1
Sheet 26 of 91
D
A
D02C
C160
Rev
4.7u_6.3V_X6S_06
GND
91
NVVDDS
C156
4.7u_6.3V_X6S_06
2/2 change to X6S
8
8
of
C848
6-71-P65S0-D02C
47u_6.3V_X5R_08
26
C815
330uF_2.5V_12m_6.6*6.6*4.2
NVVDDS
[26] GPU Decoupling1
Sheet
x2 4.7UF 0603 X6S
C133 C177 C157 C150 C176
x1 47uF X5R 0805

Near GPU
10u_4V_X6S_06
GND
C106 C127 C129 C117 C136 C120 C227 C183 C208 C114 C115 C116 C172 C137 C104 C128 C178 C196 C125 C130
Wednesday, September 07, 2016

x11 10uF X6S 0603
1u_6.3V_X6S_04
GND
10u_4V_X6S_06
x49 1uF X6S 0402
1u_6.3V_X6S_04
x1 330uF
7
10u_4V_X6S_06
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
1u_6.3V_X6S_04
10u_4V_X6S_06
Document Number
1u_6.3V_X6S_04
10u_6.3V_X5R_06
1u_6.3V_X6S_04
C119 C171 C138 C214 C139 C173 C92 C140 C194 C198 C212 C195 C170 C184 C126
P650RS
C59
10u_4V_X6S_06 1u_6.3V_X6S_04 1u_6.3V_X6S_04

GND
NVVDD
C174 C110 C109 C192 C228 C206 C225 C193 C118 C210 C197 C182 C185 C181
C159 C141 C134 C96
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

GND
GPU DECOUPLING1
10u_6.3V_X5R_06
Date:
Size
Title
A4
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
6
6
D02
10u_4V_X6S_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
10u_6.3V_X5R_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
10u_4V_X6S_06
NVVDDS
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
NVVDD
C58
NVVDD
10u_4V_X6S_06 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

1/12 NV CHECK
6/8 MEଥ‫ޏ‬
(ᄵ৫ߓᑇ)
33,70
33,68,69
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
ሽ୲‫ޗ‬ᔆ
D02A
PLACE Under GPU

5
5
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
C55
22u_6.3V_X6S_08 1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

GND
x4 22uF X5R 0805
x2 47uF X5R 0805
C50
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

22u_6.3V_X5R_08
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

C187 C77
47u_6.3V_X5R_08
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
D02A
(ᄵ৫ߓᑇ)
47u_6.3V_X5R_08
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
C131 C78
4
4
22u_6.3V_X6S_08
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
NVVDD
NVVDD
22u_6.3V_X6S_08
VGA Support inside
x2 330uF
C690 C688 C682 C684 C683 C691 10u_4V_X6S_06
GND
2/15 del *330U_2V_D2_D x 2
3
3
C207
C205 C224
PLACE Under GPU
10u_4V_X6S_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04
GND
GND
10u_4V_X6S_06
C94
1u_6.3V_X6S_04 1u_6.3V_X6S_04
C152 C686 C687
10u_4V_X6S_06 10u_4V_X6S_06
GND
NVVDD PLACE Near GPU
GPU Decoupling 1
C298 C215 C299 C151 C105 C103 C213 C95
C107 C108 C211 C97

1u_6.3V_X6S_04 1u_6.3V_X6S_04
10u_4V_X6S_06 10u_4V_X6S_06
3/3 NV check 4.7u change to 10u
2/2 change to X6S

1u_6.3V_X6S_04 1u_6.3V_X6S_04
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04
C154 C65
C70
2
2
10u_4V_X6S_06 10u_4V_X6S_06
D01A
1u_6.3V_X6S_04 1u_6.3V_X6S_04
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
x16 1uF X6S 0402

x4 10uF X6S 0603
C60
10u_4V_X6S_06 10u_4V_X6S_06
C209 C226 C155 C93

10u_4V_X6S_06 1u_6.3V_X6S_04
NVVDDS
C693 C692 C153 C62
C685 C689 C158 C68

x9 4.7uF 0603 X6S 10u_4V_X6S_06 10u_4V_X6S_06
x12 10uF 0603 X6S

10u_4V_X6S_06 1u_6.3V_X6S_04
10u_4V_X6S_06 10u_4V_X6S_06
10u_6.3V_X5R_06 1u_6.3V_X6S_04
10u_4V_X6S_06 10u_4V_X6S_06 10u_4V_X6S_06 1u_6.3V_X6S_04
NVVDDS
1
1
10u_4V_X6S_06 10u_4V_X6S_06
D02
NVVDD
D
A
B
Schematic Diagrams
GPU Decoupling 2
1 2 3 4 5 6 7 8
FBVDDQ
FBVDDQ PLACE Under GPU 1V8_RUN
GPU DECOUPLING
Partition A x2 10uF, x6 1uF 1V8_AON
C73 C74 C191 C143 C87 C91 C149 C233

C726 C731 C728 C256 C237 C257 C238 C236 C247 C239 C252 C259 C223 C241
10u_4V_X6S_06
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
A A
4.7u_6.3V_X6S_06
4.7u_6.3V_X6S_06
4.7u_6.3V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
4.7u_6.3V_X6S_06
1u_6.3V_X6S_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
Partition B x2 10uF, x6 1uF GND
C112 C64 C122 C82 C202 C90 C102 C235

GND GND
Sheet 27 of 91
10u_6.3V_X5R_06
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
FBVDDQ
GPU Decoupling 2 B
x4 10uF PLACE Near GPU B
C144 C72 C258 C75
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
10u_4V_X6S_06
D02 3/18 ‫ޏ‬੡٥‫ش‬ற0603 size
Partition C x2 10uF, x6 1uF GND
C79 C249 C219 C86 C89 C230 C243 C81 2/2 change to X6S
10u_4V_X6S_06
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
GND
FBVDDQ
MID-FREQ CERAMICS
C x9 22uF X6S 0805 C
Partition D x2 10uF, x6 1uF GND

C100 C307 C277 C169 C66 C71 C222 C76 C69
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
22u_6.3V_X6S_08
C163 C201 C83 C231 C244 C232 C234 C245
10u_6.3V_X5R_06
10u_4V_X6S_06
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
D02 GND
3/18 ‫ޏ‬੡٥‫ش‬ற0603 size GND
Total : 18,19,20,21,22,23,24,25,33,72 FBVDDQ
D D
x24 1uF 3,16,28,30,31,32,33,39,67,68,70,71,72 1V8_AON
x8 10uF 17,18,28,31,33,67 1V8_RUN
Title
[27] GPU Decoupling2
A4 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 28 GPU Decoupling 2
Schematic Diagrams
Straps & XTAL

1 2 3 4 5
DG P.114 Note: PLL power rails

trace rounting to GPU BGA ball
U39S
INS130841599
XTAL
BGA2152
30ohm ESR 10mohm bead must be 12~16 mil wide. COMMON
29 GPU_PLLVDD 14/23 XTAL/PLL
L38 . HCB1608KF-300T60 40mil GPU_PLLVDD BD12 SP_PLLVDD

1V8_RUN
Near to GPU R79 0_06 20mil BC12 VID_PLLVDD
C727 C730
C260 C265 C266
22u_6.3V_X5R_08 4.7u_6.3V_X6S_06
C269
0.1u_10V_X7R_04
47u_6.3V_X5R_08
10u_6.3V_X5R_06
A A
0.1u_10V_X7R_04
GND
U42 GPCPLL_AVDD0
Strap 2 Strap 1 Strap 0 RAMCFG[4:0]
0 0 0 0 (0x0000) 1/26 NV CHECK Default GPU under GPU near AF11 GPCPLL_AVDD1
1V8_AON
0 0 1 1 (0x0001) GND
40mil BB24 XS_PLLVDD
0 1 0 2 (0x0002)
C242
C254
C246
C261
C166
C85
0 1 1 3 (0x0003)
1 0 0 4 (0x0004) R102
*100K_04
1 0 1 5 (0x0005)
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
1 1 0 6 (0x0006) 1/12 NV CHECK
1 1 1 7 (0x0007)
0 0 M 8 (0x0008) XTALSSIN BJ6 XTALSSIN XTALOUTBUFF BK6 XTALOUTBUFF
0 M 0 9 (0x0009) BL6 XTALIN XTALOUT BM6

0 M 1 10 (0x000A)
Sheet 28 of 91
R75 R101
0 1 M 11 (0x000B) 10K_04 10K_04
X1
M 0 0 12 (0x000C) GPU under XTALOUT 1/5 NV CHECK
4 3
B
M
M
0
1
1
0
13 (0x000D)
14 (0x000E)
GND
C736
XTALIN
GND
1
U83-076_27MHZ
2
GND
C735
B Straps and XTAL
M 1 1 15 (0x000F) GND fsx3m
GND
1 0 M 16 (0x0010) 12p_50V_NPO_04 12p_50V_NPO_04
1
1
M
M
0
1
17 (0x0011)
18 (0x0012)
3/29 ଥ‫إ‬PDA BUG XTAL
6-22-27R00-1BG
GND 6-22-27R00-1BH GND
1 1 M 19 (0x0013)
0 M M 20 (0x0014) 1 = HIGH : Tied to 1.8V
M 0 M 21 (0x0015) M = Middle : Tied to 0.9V
M M 0 22 (0x0016) 0 = Low : Tied to 0V
M M 1 23 (0x0017)
M 1 M 24 (0x0018)
1 M M 25 (0x0019)
M M M 26 (0x001A) 1:Enable 0:Disable
SOR 0/1/2/3 ENABLE
MULTI-LEVEL STRAPS
Strap 2 Strap 1 Strap 0 RAMCFG[4:0]
0 0 0 00000 1V8_AON
0 1 0 00010
0 1 1 00011
1 1 0 00110 STRAP[0:2] R437 R438 R439 R441 R440 R436
Setting RAM type
1 1 1 00111 1= SMB_ALT_ADDR Enable 1V8_AON
*100K_04
*100K_04
*100K_04
100K_04
*100K_04
100K_04
GSYNC
C 0= SMB_ALT_ADDR Disable 1/26 NV CHECK Pull down C
ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0]
0 0 0 1111 1= DEVID_SEL Rebrand 30 STRAP0
0 0 1 1110 0= DEVID_SEL Orignal 30 STRAP1
0 1 0 1101 2016/7/15 Update R442 R415 R422
100K_1%_04 *100K_1%_04 *100K_1%_04 30 STRAP2
0 1 1 1100 1= PCIE_CFG Low Power
1 0 0 1011 0= PCIE_CFG High Power D02B 30 STRAP3
30 VGA_ROM_SI aduio playback
1 0 1 1010 1= VGA_DEVICE Enable 30 STRAP4
30 VGA_ROM_SO
strapping L
1 1 1 1000 0= VGA_DEVICE Disable 30 STRAP5
1 1 M 0000 30 VGA_ROM_SCLK
Strap5 R425 R426 R427 R429 R428 R424
Strap 5 Strap 4 Strap 3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE eDP = L
NONGSYNC
100K_04
R446 R414 R435
Gsync= H
100K_04
100K_04
100K_04
*100K_04
100K_04
0 0 0 0 0 0 0 *100K_1%_04 100K_1%_04 100K_1%_04
0 0 1 eDP ID 0 0 0 1
0 1 0 1/26 NV CHECK 0 0 1 0
0 1 1 0 1 0 0
1 0 0 0 0 1 1 GND
DG P.65 recommend strap resistor 5%
1 0 1 GSYNC ID 0 1 0 0 or better , voltage use 1V8_AON GND
DG P.73 recommend Pull down resistor 100k
1 1 0 0 1 0 1 14,15,17,30,31,67,68,70,71 NV3V3
1 1 1 0 1 1 0 17,18,27,31,33,67 1V8_RUN
3,16,27,30,31,32,33,39,67,68,70,71,72 1V8_AON
D
1 1 1 0 1 1 1 D
0 0 M 1 0 0 0
0 M 0 1 0 0 1 Setting RAM type Strap
0 M 1 1 0 1 0 default Samsung K4G80325FB-HC25 B-die 0 X 0 4000MHz 256Mx32
0
M
1
0
M
0
1
1
0
1
1
0
1
0
Micron
Hynix
MT51J256M32HF-80:A
H5GQ8H24MJR-R4C
A-die 0 X 1
M-die 0 X 2
4000MHz 256Mx32
4000MHz 256Mx32
Title
M 0 1 1 1 0 1 [28] STRAPS and XTAL
M 1 0 1 1 1 0 Size Document Number Rev
M 1 1 1 1 1 1 A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5
Straps & XTAL B - 29

Schematic Diagrams
IFP I/O Interface

1 2 3 4 5
U39V U39U
IFP I/O INTERFACE INS133234907

BGA2152
COMMON
11/23 MIOA
INS133234980
BGA2152
COMMON
12/23 MIOB
U39N
INS127648990
BGA2152 MIOAD0 AN9 MIOBD0 AT3
COMMON MIOAD1 AM2 MIOBD1 AV6
MIOAD2 AN7 MIOBD2 AT2
MIOAD3 AN6 MIOBD3 AT1
7/23 IFPAB AR1 AW6
MIOAD4 MIOBD4
MIOAD5 AR6 MIOBD5 AV2
DL-DVI DVI/HDMI DP
MIOAD6 AR5 MIOBD6 AV1
MIOAD7 AM8 MIOBD7 AV3
MIOAD8 AN3 MIOBD8 AW3
IFPA_AUX BH11
SDA SDA MIOAD9 AR8 MIOBD9 BA8
IFPA_AUX BG11
SCL SCL
MIOAD10 AR3 MIOBD10 AW7
A AM5 MIOACAL_PD_VDDQ MIOAD11 AR2 AV7 MIOBCAL_PD_VDDQ MIOBD11 BB8 A
IFPA_L3 BF21
TXC TXC AM6 MIOACAL_PU_GND AV8 MIOBCAL_PU_GND
BD23 IFPAB_RSET IFPA_L3 BG21
TXC TXC
IFPA_L2 BG23
TXD0 TXD0 AM7 MIOA_VREF AW9 MIOB_VREF
TXD0 TXD0 IFPA_L2 BH23
BD21 IFPAB_PLLVDD
IFPA_L1 BF23
TXD1 TXD1
TXD1 TXD1 IFPA_L1 BE23
MIOA_CTL3 AT7 MIOB_CTL3 BB7

MIOA_HSYNC AM1 MIOB_HSYNC AV5
TXD2 TXD2 IFPA_L0 BF24
MIOA_VSYNC AR7 MIOB_VSYNC BA7
TXD2 TXD2 IFPA_L0 BG24
MIOA_DE AN1 MIOB_DE AW2
GP104 GP106
MIOA_CLKOUT AN2 MIOB_CLKOUT AW1
MIOA_CLKIN AM3 MIOB_CLKIN AT6

IFPB_AUX BG12 MIOB UNUSED
SDA
IF_IOVDD
SCL IFPB_AUX BH12 U39R
INS127649613
BGA2152
HDMI
Sheet 29 of 91 IF_IOVDD BB17
BB15
IFP_IOVDD
IFP_IOVDD
TXC
TXC
IFPB_L3
IFPB_L3
BL18
BK18
DG P.245 requires IFPx_RSET
Pull down 1K_1% resistor
R57 1K_1%_04 BD20
COMMON
8/23 IFPC
IFPCD_RSET
GND
IFP I/O Interface BB18

BB20
IFP_IOVDD
IFP_IOVDD
TXD3
TXD3
TXD0
TXD0
IFPB_L2
IFPB_L2
BK20
BL20
28 GPU_PLLVDD
L10
40 mil
IF_PLLVDD
. HCB1608KF-300T60
PLACE AT BALLS
BD18 IFPCD_PLLVDD
DVI/HDMI
SDA
DP
IFPC_AUX BL9
BK9
˛˗ˠ˜
HDMI_CTRLDATA 16
BM20 SCL IFPC_AUX HDMI_CTRLCLK 16
TXD4 TXD1 IFPB_L1 C203
B IFPB_L1 BM21 B
1/28 NV CHECK TXD4 TXD1
0.1u_10V_X7R_04 IFPC_L3 BF17
TXC HDMI_CLOCKN 16
IFPC_L3 BE17
TXD5 TXD2 IFPB_L0 BL21 TXC HDMI_CLOCKP 16
TXD5 TXD2 IFPB_L0 BK21
GND IFPC_L2 BF18
TXD0 HDMI_DATA0N 16
BG18
IFPAB TXD0 IFPC_L2 HDMI_DATA0P 16
IFPC BG20
TXD1 IFPC_L1 HDMI_DATA1N 16
TXD1 IFPC_L1 BH20
HDMI_DATA1P 16
IFPC_L0 BF20
TXD2 HDMI_DATA2N 16
PLACE Under GPU PLACE Near GPU IFPC_L0 BE20
PEX_VDD IF_IOVDD TXD2 HDMI_DATA2P 16
R52 0_06 IF_IOVDD 20 mil BB21 IFP_IOVDD

R54 0_06 BB23 IFP_IOVDD
C167 C218 C204
GND 1/26 NV CHECK
4.7u_6.3V_X6S_06 1u_6.3V_X5R_04 0.1u_10V_X7R_04
U39P
INS128002456
BGA2152
COMMON
DP R402 R405 GND GND
DG P.245 requires IFPx_RSET 10/23 IFPE 100K_04 100K_04
Pull down 1K_1% resistor
̀˼́˼ʳʳ˗ˣ˲˘
DVI/HDMI DP
GND
U39Q
GND
R393 1K_1%_04 BD17 IFPEF_RSET SDA IFPE_AUX
IFPE_AUX
BL8
BK8
MDP_E_AUX#_SDA 14
INS127649903
BGA2152
COMMON
eDP
SCL MDP_E_AUX_SCL 14
9/23 IFPD
PLACE AT BALLS R72 R73
BG14
IF_PLLVDD 20 mil BD15 IFPEF_PLLVDD
TXC
TXC
IFPE_L3
IFPE_L3 BH14
MDP_E#3 14
MDP_E3 14 DVI/HDMI DP 100K_04 100K_04
˸˗ˣ˲˗
C BF14 C
C221 TXD0 IFPE_L2 MDP_E#2 14
TXD0 IFPE_L2 BE14
MDP_E2 14 IFPD_AUX BF11
SDA DEDP_D_AUX#_SDA 3
0.1u_10V_X7R_04 IFPD_AUX BE11
TXD1 IFPE_L1 BF15 SCL DEDP_D_AUX_SCL 3
MDP_E#1 14
TXD1 IFPE_L1 BG15
MDP_E1 14
IFPE BM14
GND BG17 TXC IFPD_L3 DEDP_D#3 3
TXD2 IFPE_L0 MDP_E#0 14 BM15
BH17 TXC IFPD_L3 DEDP_D3 3
TXD2 IFPE_L0 MDP_E0 14
IFPD_L2 BL15
TXD0 DEDP_D#2 3
IFPD_L2 BK15
TXD0 DEDP_D2 3
BC18 IFP_IOVDD IFPD BK17
BC20 TXD1 IFPD_L1 DEDP_D#1 3
IFP_IOVDD BL17
TXD1 IFPD_L1 DEDP_D1 3
IFPD_L0 BM17
TXD2 DEDP_D#0 3
GND IFPD_L0 BM18
PLACE Under GPU TXD2 DEDP_D0 3
U39O
INS128002153
BGA2152
DP IF_IOVDD 20 mil BC15 IFP_IOVDD
COMMON BC17 IFP_IOVDD
R86 R92
6/23 IFPF C190 C200
100K_04 100K_04
DVI/HDMI DP 1u_6.3V_X5R_04 0.1u_10V_X7R_04
̀˼́˼ʳʳ˗ˣ˲˙
PLACE Near GPU PLACE Under GPU BC21 BM9
IFP_IOVDD SDA IFPF_AUX MDP_F_AUX#_SDA 15
IF_IOVDD 20 mil BC23 IFP_IOVDD IFPF_AUX BM8 GND GND
SCL MDP_F_AUX_SCL 15
C168 C186 C175
IFPF_L3 BK11
TXC MDP_F#3 15
4.7u_6.3V_X6S_06 0.1u_10V_X7R_04 0.1u_10V_X7R_04 IFPF_L3 BL11
TXC MDP_F3 15
IFPF_L2 BM11
TXD0 MDP_F#2 15
IFPF_L2 BM12
D TXD0 MDP_F2 15 D
GND GND
IFPF_L1 BL12
TXD1 MDP_F#1 15
IFPF_L1 BK12
TXD1 MDP_F1 15
IFPF_L0 BK14
TXD2 MDP_F#0 15
IFPF TXD2 IFPF_L0 BL14
MDP_F0 15
17,71 PEX_VDD
Title
[29] IFP I/O Interface

1 2 3 4 5
B - 30 IFP I/O Interface

Schematic Diagrams
Misc - GPIO, I2C and ROM

1 2 3 4 5 6 7 8
U39T
INS136854842 DG P.78 recommend ROM_CS Pull up 10K
BGA2152
COMMON
MISC: GPIO, I2C, and ROM 1V8_AON VBIOS ROM 4M 1V8_AON
VBIOS ROM 8M
15/23 MISC 2
(OPTIMUS) (DGPU)
ROM_CS BJ4 VGA_ROM_CS# 1V8_AON
1V8_AON
ROM_SI BK2 VGA_ROM_SI R416 R404
VGA_ROM_SI 28
ROM_SO BK4 VGA_ROM_SO U42 U40
VGA_ROM_SO 28
BL3 STRAP0 ROM_SCLK BK3 VGA_ROM_SCLK 10K_04 7 HOLD VCC 8 10K_04 7 HOLD VCC 8
28 STRAP0 VGA_ROM_SCLK 28
BL4 STRAP1 3 WP 3 WP
28 STRAP1 IVGA_ROM_CS# IVGA_ROM_CS#_R 1 DVGA_ROM_CS# R407 DVGA_ROM_CS#_R 1
BM4 STRAP2 R418 33_04 CS 33_04 CS
28 STRAP2
BM5 STRAP3 C725
28 STRAP3 VGA_ROM_SI IVGA_ROM_SI VGA_ROM_SI DVGA_ROM_SI
A BK5 STRAP4 R419 33_04 5 SI 0.1u_16V_Y5V_04 R412 33_04 5 SI C719 A
28 STRAP4 IVGA_ROM_SO IVGA_ROM_SO_R DVGA_ROM_SO R408 DVGA_ROM_SO_R
BJ5 STRAP5 R413 0_04 2 SO 0_04 2 SO 0.1u_16V_Y5V_04
28 STRAP5 VGA_ROM_SCLK R430 IVGA_ROM_SCLK VGA_ROM_SCLK R410 DVGA_ROM_SCLK
33_04 6 SCK GND 4 33_04 6 SCK GND 4
W 25Q40EW 1.8V W 25Q80EW SNIG

BUFRST BF9 GPU_BUFRST* PCB Footprint = M-SO8 PCB Footprint = M-SO8
M WIN:6-04-02540-A71 M WIN:6-04-02580-A71
S GD:6-04-02540-491 1/26 NV CHECK DEL S MX:6-04-25803-A70
1/26 NV CHECK DEL
3/30 ‫ޏ‬੡՛‫ץ‬ᇘ
D02 3/29 ‫ޏ‬੡՛‫ץ‬ᇘ D02
1V8_AON
U41
0.1u_16V_Y5V_04 C722 12 2 IVGA_ROM_CS#
VCC 0B0 11 DVGA_ROM_CS# L :PORT1 (INTEL)
VGA_ROM_CS# 1 1B0 H: PORT2 (NV)
A0
Sheet 30 of 91
3 10 R409 0_04
GND S0 PS8331_SW 3,13,39,60
9 5 IVGA_ROM_SO
VCC 0B1 8 DVGA_ROM_SO
1B1 R411
Misc - GPIO, I2C

VGA_ROM_SO 4
6 A1 7 *12K_04
GND S1
0.1u_16V_Y5V_04 C273 PI5A3158BZAE
GND
U39W Q4A P/N = 6-03-53158-0J1
and ROM
2
INS136855062 R82 10K_04 MTDK3S6R
G
B BGA2152
COMMON
NV3V3
śɥ B
13/23 MISC 1 NV3V3 R93 2.2K_04 1 6 SMC_VGA_THERM

SMC_VGA_THERM 44,45,56,60 śɨ
R83 2.2K_04
D
5
1/27 NV CHECK
G
OVERT# BG5 OVERT I2CS_SCL BJ8 SMC_VGA_THERM1
31 OVERT#
I2CS_SDA BH8 SMD_VGA_THERM1 4 3 SMD_VGA_THERM
SMD_VGA_THERM 44,45,56,60 1V8_AON
S Q4B
D
TS_VREF BF12 TS_VREF
T6 MTDK3S6R U6
I2CC_SCL BG9 I2CC_SCL
I2CC_SCL 71 SN74LV1T32DCKR
5
I2CC_SDA BH9 I2CC_SDA
I2CC_SDA 71
1
GPIO12_AC_DETECT_R VBATT_BOOST# 44
4
I2CB_SCL BG8 R710 2K_04 1V8_AON 2
AC/BATL# 65
I2CB_SDA BF8 R711 2K_04
3/2 NV CHECK 1V8_AON
3
BJ1 THERMDN D01A
1V8_AON
BJ2 THERMDP R432 R431 GPIO12 ٦ᒔᎁਢpull hi 10K or 100K ,
DG is 100K
10K_04 10K_04
3/8 ଥ‫إ‬լՂٙ R444 10K_04 GPIO4_1V8_MAIN_EN
R452 10K_04 GPIO5_FRAME_LOCK#
GPIO0 BD6
GPIO1_GC6_FB_EN GPIO0_NVVDD_PW M_VID 68 D01A
GPIO1 BB5 R443 0_04
GPIO2_GPU_EVENT# GC6_FB_EN 32 R110 10K_04 GPIO9_THERM_ALERT#
GPIO2 BD1
GPIO3_PS_NVVDDS_VID 1/5 NV CHECK R120 100K_04 GPIO12_AC_DETECT_R
GPIO3 BE4 D42 A C RB751V-40(lision)
GPIO4_1V8_MAIN_EN GPIO3_PS_NVVDDS_VID 70 GPU_EVENT# 39
GPIO4 BE1
GPIO5_FRAME_LOCK# GPIO4_1V8_MAIN_EN 31,32 R115 10K_04 OVERT#
GPIO5 BG2
GPIO6_NVVDD_PSI# GPIO5_FRAME_LOCK# 13
C GPIO6 BD2 VDD3 C
GPIO7_BL_PW M_GPU GPIO6_NVVDD_PSI# 68,70
GPIO7 BD7
GPIO8_MEM_VDD_CTL GPIO7_BL_PW M_GPU 32
BK24 JTAG_TCK GPIO8 BH4
GPIO9_THERM_ALERT# GPIO8_MEM_VDD_CTL 72 R98 4.7K_04 SMC_VGA_THERM
BL23 JTAG_TMS GPIO9 BJ3
GPIO10_ALT_MEM_VREF R87 4.7K_04 SMD_VGA_THERM
BM23 JTAG_TDI GPIO10 BD3
GPIO11_PPEN GPIO10_ALT_MEM_VREF 19,20,23,24
BM24 JTAG_TDO GPIO11 BH3
JTAG_TRST* GPIO12_AC_DETECT_R GPIO11_PPEN 32
BL24 JTAG_TRST GPIO12 BE6
GPIO13 BB1 GPIO13_BLEN
GPIO13_BLEN 32 5/23 DEL Q9, R112
GPIO14 BG4 NV3V3 DG P.261 use 2.2k pull-up
R388 BG1 ‫ܔ‬ೈቃఎሿٙΔ྇֟VIA
NVJTAG_SELBK23
GPIO15
GPIO16_SYS_PEX_RST_MON#
on both I2C_SDA/SCL
10K_04 NVJTAG_SEL GPIO16 BE2
GPIO17 BH1 R117 2.2K_04 I2CC_SCL
GPIO17_IFPD_HPD_R 3
GPIO18 BE3 R116 2.2K_04 I2CC_SDA
GPIO18_IFPE_HPD_R 32 D02A
GPIO19 BD4
C296 470p_50V_X7R_04
GPIO20 BE5
GPIO21_RASTER_SYNC0 GPIO20_NVVDDS_PSI 70 C297 470p_50V_X7R_04
GPIO21 BA5
R389
GND GPIO22 BB6
10K_04 BG3 GPIO23_GPU_PEX_RST_HOLD#
GPIO23
1/12 NV CHECK GPIO24 BD5
GPIO24_IFPF_HPD_R 32
GPIO25 BB2 GPIO7_BL_PW M_GPU R95 100K_04
GPIO26 BE7 GPIO8_MEM_VDD_CTL R74 10K_04
GPIO27 BA4 1/5 NV CHECK GPIO10_ALT_MEM_VREF
GPIO28_OC_W ARN# GPIO27_IFPC_HPD_R 32 R76 100K_04
GND GPIO28 BB4 GPIO11_PPEN
GPIO28_OC_W ARN# 71 R451 100K_04
GPIO29 BA3 GPIO21_RASTER_SYNC0
GPIO29_NVVDD_PH1 68 R423 100K_04
GPIO30 BB3
GPIO31_RFU BA2 D02A 4/20 NV reserve
GPIO32_RFU BA1
1V8_AON
D 1V8_AON 14,15,17,31,67,68,70,71 NV3V3 D
5,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
R461 10K_04 U45 17,18,27,28,31,33,67 1V8_RUN
5
*SN74LV1T08DCKR 3,16,27,28,31,32,33,39,67,68,70,71,72 1V8_AON

GPIO23_GPU_PEX_RST_HOLD# 1
GPIO16_SYS_PEX_RST_MON# R433 *0_04 2

4 GPU_PEX_RST#
GPU_PEX_RST# 17,31 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
R445 0_04 Title
39 PERSTB# [30] Misc-GPIO_I2C_ROM
3
R467 100K_04

1/12 NV CHECK R462 0_04 A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
Misc - GPIO, I2C and ROM B - 31

Schematic Diagrams
NVIDIA Power Sequence
1 2 3 4 5 6 7 8
D02A 4/29 reserve ᓳtiming‫ ش‬3.3VS

3.3VS 1V8_RUN_EN
3.3VS C1121 *0.1u_10V_X7R_04 C340 0.1u_10V_X7R_04
5
U9
R776
NVVDD POWER GOOD LOOPBACK
5
NV3V3 1 SN74LV1T32DCKR
1V8_AON_PW RGD 1 4 R753 0_04 NV_1V8RUN_EN
67 1V8_AON_PW RGD 10K_04 NV_1V8RUN_EN 67
4 2
5
2 1.8V 3.3VS
1 U77
30,32 GPIO4_1V8_MAIN_EN 4 GFX_ON 3.3V
74AHC1G08GW R103 10K_04
3
17,30 GPU_PEX_RST#
5
2
3
39,44,60,67 DGPU_PW R_EN U80 OVERT#
1.8V 1 D10 OVERT# 30
SN74LV1T08DCKR 4 D01A
D
BAT54AN3
3
A 2 3/7 ଥ‫إ‬footprint A
37 GPPG2_PCH_1V8RUN_EN U75 1 C Q8
3.3V NVVDD_PW RGD_LOOP_OVERT G
PCH GPIO *74AHC1G08GW A 3 2SK3018S3
2 C
S
D
D
NVVDD_PW RGD R114 *0_04
Q7 Q5
3.3VS 3.3VS R113 0_04 G 2SK3018S3 G 2SK3018S3
4/25 modify timing 20k change to 1k 70 NVVDDS_PW RGD
ᓳᖞNV3V3 PWR ON SEQ(3.4msĺ544us)
S
3.3VS 0.1u_10V_X7R_04 C314 U10
74AHC1G08GW C A NV_NV3V3_EN
5
R766 1V8_AON_PW RGD D76 RB751V-40(lision) GC6_FB_EN_R
1
5/10 ᓳᖞNV SEQ 10K_04 C1117
4 PS_NV3V3_EN R749 1K_1%_04 R767 0_04 NV_NV3V3_EN
3.3VS NV_NV3V3_EN 67
0.1u_10V_X7R_04 2 3.3VS
R765
3.3V
D02A 10K_1%_04 D02 C1119
3
6
D Q57A 0.1u_10V_X7R_04
5
C1118
Sheet 31 of 91 2 G
S
MTDK3S6R
GFX_ON
1
2
4
1
2
4 1V8_RUN
1
0.01u_50V_X7R_04 U78 37 GPPG9_PCH_NV3V3_EN U73 1V8_AON
1.8V 3.3V
3
D SN74LV1T32DCKR PCH GPIO *74AHC1G08GW
NVIDIA Power D02A
3
NV3V3
NVVDD_PW RGD 5 G
S 4/25 modify timing 0.47u change to 0.1u 3.3V U76
Q57B *SLG4U41161 D02A
4
20
19
18
༼ছNV3V3 PWR OFF timing(13.7msĺ7ms)
MTDK3S6R
Sequence 1 17 NV_PEXVDD_EN
GPI
GPI(1.8V)
GPI(1.8V)
VDD GPO
GFX_ON 2 16 OVERT#
3.3VS GPI GPI
D02A
B 5/10 ᓳᖞNV_ENVDD_ENं‫ݮ‬ΔU71‫ؘ‬ႊࠌ‫ ش‬1.8V‫ش‬றΔթ౨ฤ‫ٽ‬NV SEQ NV_FBVDDQ_EN_AND R762 *0_04 3 15 NV_NV3V3_EN B
0.1u_10V_X7R_04 C1116 U71 NV_FBVDDQ_EN GPO GPO
D02A R763 *0_04
SN74LV1T08DCKR
5
37 GPPG10_PCH_NVVDD_EN R783 *0_04 1
NVVDD_EN NVVDD_PW RGD 4
GPI GPO
14 NV_1V8RUN_EN
R784 0_04 4 NV_NVVDD_EN NVVDDS_PW RGD 5 13 NV_NVVDD_EN

PCH GPIO NV_NVVDD_EN 68,69 GPI GPO
2
1.8V PEX_VDD_PW RGD 6 12 NV_NVVDDS_EN
A C GPI GPO
9 GPI(1.8V)
3.3VS
3
RB751V-40(lision) D78 1V8_AON_PW RGD 7 11
C780 GPI GND D02A
0.1u_10V_X7R_04 R773 10K_1%_04 R774 0_04 R775 *0_04
8 GPI
10 GPI
3.3VS
D02A C1120 D02A
0.01u_50V_X7R_04
D02A 3.3VS C1115
D77 R770 0.1u_10V_X7R_04 GC6_FB_EN_R 31,32,39
BAT54AN3 1K_1%_04 U12 GPIO4_1V8_MAIN_EN
SN74LV1T08DCKR D15
5
5
GFX_ON 1 C
A 3 1
BAT54AN3
37 GPPG11_PCH_NVVDDS_EN 1
NVVDDS_EN DGPU_PW RGD 32,72
OVERT# 2 C 4 1 C 4 NV_NVVDDS_EN
PCH GPIO NV_NVVDDS_EN 70
2 A 3 2
U72
1.8V R771 2 C 3.3V
*74AHC1G08GW
3
3
*100K_04 R170
C812 20K_1%_04
NV_1V8RUN_EN R171 10K_1%_04 0.22u_10V_X5R_04
R772 0_04
D02
NV_NVVDDS_EN_CTL 70
C 4/25 modify timing 15k change to 10k
ലNVVDDS༼ছ(2.25msĺ1.79ms) HW POWER DOWN SEQUENCE
NV_1V8RUN_EN NV_NVVDDS_EN
C
NV_NV3V3_EN
C427
3.3VS 0.1u_10V_X7R_04
3.3VS
NV_PEXVDD_EN
D
D
U79 U19
5
NV_EN_DOW N Q16 NV_EN_DOW N Q41

SN74LV1T32DCKR 74AHC1G08GW G Q18 G
5
GFX_ON 1 44 NV_EN_DOW N 2SK3018S3 NV_EN_DOW N G 2SK3018S3

4 1 2SK3018S3
S
S
NVVDDS_PW RGD 2 4 R750 0_04 NV_PEXVDD_EN
NVVDD_PW RGD 2 NV_PEXVDD_EN 71 D02A D02A
1.8V C807
3.3V 3.3VS *0.1u_10V_X7R_04
3
1
4
2 NV_NVVDD_EN NV_PEXVDD_EN NV_FBVDDQ_EN
37 GPPG0_PCH_PEXVDD_EN U74
3.3V
PCH GPIO *74AHC1G08GW
3
D
NV_EN_DOW N G Q17 NV_EN_DOW N G Q19 NV_EN_DOW N G Q14
2SK3018S3 2SK3018S3 2SK3018S3
S
3.3VS
NV_FBVDDQ_EN D02A D02A D02A
*0.1u_10V_X7R_04 C418
3.3VS
D
U18 D
NVVDD_PW RGD R192 0_04 *74AHC1G08GW C377 0.1u_10V_X7R_04
5
17,68 NVVDD_PW RGD

5
PEX_VDD_PW RGD R191 *0_04 1

71 PEX_VDD_PW RGD
4 NV_FBVDDQ_EN_AND
1
R193 *0_04 2 4 NV_FBVDDQ_EN
37 GPPG1_PCH_FBVDDQ_EN NV_FBVDDQ_EN 72
3.3V 2
PCH GPIO U15
1.8V
3
SN74LV1T32DCKR
D02 2,13,46,47,49,54,58,60,61,63,64,66,67,71 3.3V
3
3,16,27,28,30,32,33,39,67,68,70,71,72 1V8_AON
R183 0_04 3,9,10,11,12,13,14,15,16,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS Title
R195 *10K_04 R194 *0_04

5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3 [31] NVIDIA POWER SEQUENCE
3.3VS 14,15,17,30,67,68,70,71 NV3V3
17,18,27,28,33,67 1V8_RUN Size Document Number Rev
From NV 31,32,39 GC6_FB_EN_R
GC6_FB_EN_R

1 2 3 4 5 6 7 8
B - 32 NVIDIA Power Sequence

Schematic Diagrams
GPIO Level Shift
1 2 3 4 5 6 7 8
NVIDIA GPIO LEVEL SHIFT 3.3VS

D02
3.3VS
D02A R744
D02A 100K_04
3.3VS R745
3.3VS Q55A 100K_04
39 DGPU_PW RGD_R
MTDK3S6R
6
C744 0.1u_10V_X7R_04 D
A C286 0.1u_10V_X7R_04 A
1V8 in 3V3 out G2
5
1V8 in 5 3V3 out 1
S
1
Q55B
1 30,32 GC6_FB_EN
3
4 D MTDK3S6R
4 GC6_FB_EN_R 31,39
VGA_BKLPW M 13 2
2 G5
30 GPIO7_BL_PW M_GPU U43
U5 S DGPU_PW RGD 31,72
SN74LV1T08DCKR R786
SN74LV1T08DCKR
4
3
*100K_04
D02A 3/18 ଥ‫إ‬ᒵሁ
3.3VS
D02
D02A
D02A
3.3VS R751
3.3VS
Sheet 32 of 91
100K_04
3.3VS
C742 0.1u_10V_X7R_04
38 GPIO4_1V8_MAIN_EN_R
Q56A
MTDK3S6R
R752
100K_04
GPIO Level Shift
6
R455 D
1V8 in 3V3 out *10K_04
5
G2
1 C743 0.1u_10V_X7R_04 S
30 GPIO13_BLEN
1
Q56B
4 R450 10K_04
3
VGA_BKLTEN 13 D MTDK3S6R
B 2 B
5
U44 G5
1
SN74LV1T08DCKR 30,32 GC6_FB_EN S GPIO4_1V8_MAIN_EN 30,31
4
3
VGA_ENAVDD 13
4
2
30 GPIO11_PPEN
U46 3/18 ଥ‫إ‬ᒵሁ
SN74LV1T32DCKR
3
1V8 in 3V3 out
1/12 NV CHECK
1V8_AON 1V8_AON 1V8_AON
R121 R122 R125

10K_04 10K_04 10K_04
C HDMI DP_E DP_F C
30 GPIO27_IFPC_HPD_R 30 GPIO18_IFPE_HPD_R 30 GPIO24_IFPF_HPD_R
FROM HDMI CONN FROM DP_E FROM 8330B_RE

C
C
B R124 100K_04 B R128 100K_04 B R134 100K_04
HDMI_HPD 16,39 G_DP_DHPD_E 14,39 MDP_F_HPD 15,39
Q11 Q10 Q12
C302
C303
R123
C313
C306
R129
C309
C304
R133
BTN3904 BTN3904 BTN3904
E
E
M-SOT23-CBE M-SOT23-CBE M-SOT23-CBE
DG P.290 recommend
*220p_50V_NPO_04
220p_50V_NPO_04
*220p_50V_NPO_04
220p_50V_NPO_04
*220p_50V_NPO_04
220p_50V_NPO_04
100K_04
100K_04
100K_04
D D
3,16,27,28,30,31,33,39,67,68,70,71,72 1V8_AON ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

3,9,10,11,12,13,14,15,16,31,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
Title
[32] NVIDIA GPIO LEVEL SHIFT
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
GPIO Level Shift B - 33

Schematic Diagrams
GPU NVVDD, FBVDDQ

1 2 3 4 5 6 7 8
U39F U39G U39H

NVVDD INS127547041
BGA2152
COMMON
NVVDD
NVVDD
INS127550888
BGA2152
COMMON
NVVDD
FBVDDQ
INS127611495
BGA2152
COMMON FBVDDQ GPU NVVDD, FBVDDQ
18/21 VDD_1/2 19/23 VDD_2/2 20/23 FBVDDQ
AA14 VDD VDD AG22 AP21 VDD VDD BB45 AA10 FBVDDQ FBVDDQ AT43 U39J
AA15 VDD VDD AG23 AP22 VDD VDD BB46 AA11 FBVDDQ FBVDDQ K12
INS127602129
AA16 VDD VDD AG40 AP23 VDD VDD BB47 AA42 FBVDDQ FBVDDQ K14 BGA2152
AA17 VDD VDD AH14 AP30 VDD VDD BB48 AA43 FBVDDQ FBVDDQ K15 COMMON
AA18 VDD VDD AH15 AP31 VDD VDD BC38 AC10 FBVDDQ FBVDDQ K17 NVVDDS 23/23 VDDS
NVVDDS
AA19 VDD VDD AH16 AP32 VDD VDD BC39 AC11 FBVDDQ FBVDDQ K18
AA20 VDD VDD AH17 AP33 VDD VDD BC40 AC42 FBVDDQ FBVDDQ K20
AA21 VDD VDD AH18 AP34 VDD VDD BC41 AC43 FBVDDQ FBVDDQ K21 AP27 VDDS VDDS AC14
AA22 VDD VDD AH19 AR13 VDD VDD BC45 AD10 FBVDDQ FBVDDQ K23 AP28 VDDS VDDS AC15
A AA23 VDD VDD AH20 AR40 VDD VDD BC47 AD11 FBVDDQ FBVDDQ K24 AP29 VDDS VDDS AC16 A
AA24 VDD VDD AH21 AT14 VDD VDD BC49 AD42 FBVDDQ FBVDDQ K26 AP35 VDDS VDDS AC17
AA25 VDD VDD AH22 AT15 VDD VDD BD39 AD43 FBVDDQ FBVDDQ K27 AP36 VDDS VDDS AC18
AA26 VDD VDD AH23 AT16 VDD VDD BD41 AF10 FBVDDQ FBVDDQ K29 AP37 VDDS VDDS AC24
AA27 VDD VDD AH24 AT17 VDD VDD BD46 AF43 FBVDDQ FBVDDQ K30 AP38 VDDS VDDS AC25
AA28 VDD VDD AH25 AT18 VDD VDD BD47 AG10 FBVDDQ FBVDDQ K32 AP39 VDDS VDDS AC26
AA29 VDD VDD AH26 AT19 VDD VDD BD48 AG11 FBVDDQ FBVDDQ K33 AV14 VDDS VDDS AC27
AA32 VDD VDD AH29 AT22 VDD VDD BD51 AJ10 FBVDDQ FBVDDQ K38 AV17 VDDS VDDS AC35
AA33 VDD VDD AH30 AT23 VDD VDD BE41 AJ11 FBVDDQ FBVDDQ K39 AV18 VDDS VDDS AC36
AA34 VDD VDD AH31 AT24 VDD VDD BE42 AJ42 FBVDDQ FBVDDQ K41 AV24 VDDS VDDS AC37
AA35 VDD VDD AH32 AT25 VDD VDD BE43 AJ43 FBVDDQ FBVDDQ L14 AV25 VDDS VDDS AC38
AA36 VDD VDD AH33 AT26 VDD VDD BE46 AK10 FBVDDQ FBVDDQ L15 AV26 VDDS VDDS AC39
AA37 VDD VDD AH34 AT27 VDD VDD BE47 AK11 FBVDDQ FBVDDQ L18 AV27 VDDS VDDS AF14
AB13 VDD VDD AH37 AT30 VDD VDD BE50 AM42 FBVDDQ FBVDDQ L23 AV35 VDDS VDDS AF17
AB40 VDD VDD AH38 AT31 VDD VDD BE51 AM43 FBVDDQ FBVDDQ L24 AV36 VDDS VDDS AF18
AC19 VDD VDD AH39 AT32 VDD VDD BE52 AN43 FBVDDQ FBVDDQ L26 AV37 VDDS VDDS AF24
AC20 AK19 AT33 BF42 AR42 L27 AV38 AF25
Sheet 33 of 91 AC21
AC22
AC23
AC30
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AK20
AK21
AK22
AK23
AT34
AT35
AT36
AT37
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BF44
BF45
BF47
BF49
AR43
R42
R43
U10
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
L30
L32
L33
L35
AV39
R14
R15
R16
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
AF26
AG27
AG28
AG29
VDD VDD VDD VDD FBVDDQ FBVDDQ VDDS VDDS
GPU NVVDD, AC31

AC32
AC33
AC34
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AK30
AK31
AK32
AK33
AT38
AT39
AT42
AU43
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BF51
BG43
BG44
U16
U11
U43
V10
V42
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
L36
L39
M10
M43
R17
R18
R24
R25
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
AG35
AG36
AG37
AG38
AE14 VDD VDD AK34 AV19 VDD VDD U17 V43 FBVDDQ FBVDDQ P10 R26 VDDS VDDS AG39
FBVDDQ AE15
AE16
AE17
AE18
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AL13
AL40
AM14
AM15
AV20
AV21
AV22
AV23
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
U18
U19
U20
U21
Y10
Y11
Y42
Y43
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
P11
P42
P43
R10 PLACE WEST EDGE OF FBD
R27
R28
R29
R35
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
AK14
AK15
AK16
AK17
AE19 VDD VDD AM16 AV30 VDD VDD U22 FBVDDQ R11 R36 VDDS VDDS AK18
B AE20 AM17 AV31 U23 R37 AK24 B
VDD VDD VDD VDD R38 *2.2_04 VDDS VDDS
FBVDDQ
AE21 VDD VDD AM18 AV32 VDD VDD U24 R38 VDDS VDDS AK25
AE22 VDD VDD AM19 AV33 VDD VDD U25 R39 VDDS VDDS AK26
AE23 VDD VDD AM20 AV34 VDD VDD U26 W14 VDDS VDDS AK27
AE24 VDD VDD AM21 AV42 VDD VDD U27 FBVDDQ_SENSE E52 FBVDDQ_SENSE_R49 R37 2.2_04 FBVDDQ_SENSE W15 VDDS VDDS AK28
FBVDDQ_SENSE 71,72
AE25 VDD VDD AM22 AV43 VDD VDD U28 W16 VDDS VDDS AK29
AE26 VDD VDD AM23 AV44 VDD VDD U29 R39 *2.2_04 FBVDDQ_SENSE_RTN W17 VDDS VDDS AK35
GND FBVDDQ_SENSE_RTN 71,72
AE27 VDD VDD AM24 AW13 VDD VDD U30 W18 VDDS VDDS AK36
AE28 VDD VDD AM25 AW40 VDD VDD U31 FB_VREF P45 FB_VREF_PROBE PLACE NEAR U1 PIN E52 W24 VDDS VDDS AK37
AE31 VDD VDD AM28 AW44 VDD VDD U34 FBVDDQ W27 VDDS VDDS AP14
AE32 VDD VDD AM29 AW45 VDD VDD U35 W28 VDDS VDDS AP15
AE33 VDD VDD AM30 AY14 VDD VDD U36 W29 VDDS VDDS AP16
AE34 VDD VDD AM31 AY18 VDD VDD U37 FB_CAL_PD_VDDQ R44 FB_CAL_PD_VDDQ R46 40.2_1%_04 W35 VDDS VDDS AP17
AE35 VDD VDD AM32 AY22 VDD VDD U38 W36 VDDS VDDS AP18
AE36 VDD VDD AM33 AY26 VDD VDD U39 FB_CAL_PU_GND P44 FB_CAL_PU_GND R41 40.2_1%_04 W37 VDDS VDDS AP24
AE37 VDD VDD AM34 AY27 VDD VDD V13 W38 VDDS VDDS AP25
AE38 VDD VDD AM35 AY31 VDD VDD V40 FB_CALTERM_GND R45 FB_CAL_TERM_GND R42 60.4_1%_04 W39 VDDS VDDS AP26
AE39 VDD VDD AM36 AY35 VDD VDD W19
AF13 VDD VDD AM37 AY39 VDD VDD W20
AF30 VDD VDD AM38 AY43 VDD VDD W21
AF31 VDD VDD AM39 AY45 VDD VDD W22 GND
AF32 VDD VDD AP19 BA43 VDD VDD W23
AF33 VDD VDD AP20 BA44 VDD VDD W30
AF34 VDD VDD BK52 BA45 VDD VDD W31 VDDS_SENSE BM45
GPU_VDDS_SENSE 70
AF40 VDD VDD BL46 BA46 VDD VDD W32 GNDS_SENSE BM44
GPU_GNDS_SENSE 70
AG13 VDD VDD BL47 BA47 VDD VDD W33
AG19 VDD VDD BL48 BB38 VDD VDD W34
AG20 VDD VDD BL49 BB39 VDD
AG21 VDD VDD BL50
BG45 VDD VDD BL51
BG46 VDD VDD BL52
BG47 VDD VDD BM47
C BG48 VDD VDD BM48 C
BG49 VDD VDD BM49
BG50 VDD VDD BM50
BG51 VDD VDD BM51
BG52 VDD VDD N14
BH44 VDD VDD N18
BH45 VDD VDD N22
BH47 VDD VDD N26
BH48 VDD VDD N27
BH49 VDD VDD N31
BH50 VDD VDD N35 NVVDD_SENSE BK45
GPU_NVVDD_SENSE 68,71
BH51 VDD VDD N39 GND_SENSE BL45
GPU_GND_SENSE 68,71
BH52 VDD VDD P13
BJ44 VDD VDD P40
BJ45 VDD VDD R19
BJ46 VDD VDD R20
BJ47 VDD VDD R21
U39I
BJ48 VDD VDD R22
INS127599917
BJ49 VDD VDD R23 BGA2152
COMMON 1V8_AON
BJ50 VDD VDD R30
BJ51 VDD VDD R31 21/23 NC/1V8
BJ52 VDD VDD R32
BK47 VDD VDD R33 AT9 NC 1V8_AON BA10
BK48 VDD VDD R34 BA6 NC 1V8_AON BB14
BK49 VDD VDD U14 BA9 NC 1V8_AON BC14
BK50 VDD VDD U15 BD14 NC
BK51 VDD BE12 NC
BG6 NC
BH6 NC 1V8_RUN
BJ11 NC
BJ9 NC
BK44 NC
VDD18 AM10
VDD18 AM11
VDD18 AN10
D AN11 D
VDD18
VDD18 AR10
VDD18 AR11
VDD18 AT10
VDD18 AT11
VDD18 AV10
VDD18 AV11
VDD18 AW10 3,16,27,28,30,31,32,39,67,68,70,71,72 1V8_AON
VDD18 AW11 17,18,27,28,31,67 1V8_RUN
18,19,20,21,22,23,24,25,27,72 FBVDDQ
26,68,69 NVVDD Title
26,70 NVVDDS [33] GPU NVVDD, FBVDDQ

1 2 3 4 5 6 7 8
B - 34 GPU NVVDD, FBVDDQ

Schematic Diagrams
GPU GND
1 2 3 4 5 6 7 8
U39K U39L U39M

INS127621373 INS127622592 INS127623759
BGA2152 BGA2152 BGA2152
COMMON COMMON COMMON
16/23 GND_1/3 17/23 GND_2/3 22/23 GND_3/3
A2
A26
GND
GND
GND
GND
AH6
AH8
AR20
AR21
GND
GND
GND
GND
B52
B7
BL43
BL5
GND
GND
GND
GND
N6
N8
GPU GND
A29 GND GND AJ14 AR22 GND GND BA48 BL7 GND GND P14
A3 GND GND AJ15 AR23 GND GND BB49 BM2 GND GND P15
A32 GND GND AJ16 AR24 GND GND BC13 BM3 GND GND P16
A50 GND GND AJ17 AR25 GND GND BC16 C1 GND GND P17
A51 GND GND AJ18 AR26 GND GND BC19 C29 GND GND P18
AA49 GND GND AJ19 AR27 GND GND BC2 C33 GND GND P19
AA8 GND GND AJ2 AR28 GND GND BC22 C5 GND GND P20
A A
AB10 GND GND AJ20 AR29 GND GND BC25 C51 GND GND P21
AB14 GND GND AJ21 AR30 GND GND BC28 C52 GND GND P22
AB15 GND GND AJ22 AR31 GND GND BC31 D10 GND GND P23
AB21 GND GND AJ29 AR38 GND GND BD26 D25 GND GND P30
AB26 GND GND AJ34 AT4 GND GND BD52 D37 GND GND P35
AB27 AJ35 AT5 BE10 D4 P36
GND GND GND GND GND GND
AB28 GND GND AJ36 AT51 GND GND BE13 D40 GND GND P37
AB31 GND GND AJ39 AU10 GND GND BE18 D49 GND GND P51
Sheet 34 of 91
AB32 GND GND AJ9 AU14 GND GND BE19 D7 GND GND R49
AB33 GND GND AK1 AU15 GND GND BE21 E2 GND GND R52
AB34 GND GND AK44 AU16 GND GND BE22 E4 GND GND T10
AB35 GND GND AK47 AU17 GND GND BE24 E48 GND GND T14
AB36 GND GND AL10 AU18 GND GND BE25 E5 GND GND T15
AB37
AB38
AB39
AB4
GND
GND
GND
GND
GND
GND
GND
GND
AL14
AL15
AL16
AL17
AU19
AU2
AU20
AU21
GND
GND
GND
GND
GND
GND
GND
GND
BE27
BE28
BE30
BE31
E51
E8
F10
F13
GND
GND
GND
GND
GND
GND
GND
GND
T16
T17
T18
T19
GPU GND
AB43 GND GND AL18 AU22 GND GND BE33 F16 GND GND T2
B AB6 GND GND AL22 AU27 GND GND BE40 F25 GND GND T24 B
AB8 GND GND AL23 AU28 GND GND BF2 F28 GND GND T25
AD14 GND GND AL24 AU29 GND GND BF4 F31 GND GND T26
AD17 GND GND AL27 AU32 GND GND BG10 F37 GND GND T29
AD24 GND GND AL34 AU39 GND GND BG31 G2 GND GND T36
AD30 GND GND AL4 AU6 GND GND BH15 G6 GND GND T45
AD31 GND GND AL43 AU8 GND GND BH18 H1 GND GND T47
AD32 GND GND AL45 AV4 GND GND BH2 H10 GND GND T49
AD35 GND GND AL51 AW14 GND GND BH27 H19 GND GND T8
AD36 GND GND AL6 AW15 GND GND BH30 H22 GND GND U7
AD37 GND GND AL8 AW16 GND GND BH33 H25 GND GND U9
AD38 GND GND AM4 AW17 GND GND BH36 H28 GND GND V14
AD39 GND GND AM9 AW18 GND GND BH39 H31 GND GND V15
AD44 GND GND AN14 AW19 GND GND BH42 H34 GND GND V16
AE10 GND GND AN15 AW20 GND GND BH5 H37 GND GND V17
AE2 GND GND AN16 AW21 GND GND BJ10 H40 GND GND V18
AE4 GND GND AN17 AW22 GND GND BJ12 H43 GND GND V19
AE43 GND GND AN18 AW23 GND GND BJ13 J1 GND GND V20
C AE49 AN21 AW26 BJ16 J20 V23 C
GND GND GND GND GND GND
AF1 GND GND AN25 AW30 GND GND BJ20 K13 GND GND V27
AF5 GND GND AN4 AY10 GND GND BJ35 K51 GND GND W10
AG14 GND GND AN5 AY2 GND GND BJ36 K6 GND GND W2
AG15 GND GND AN8 AY4 GND GND BJ37 K8 GND GND W4
AG16 GND GND AP10 AY47 GND GND BJ38 M52 GND GND W43
AG17 GND GND AP2 AY49 GND GND BJ39 M6 GND GND W45
AG18 GND GND AP4 AY51 GND GND BJ40 N10 GND
AG26 GND GND AP47 B1 GND GND BJ43 N43 GND
AG3 AP49 B10 BJ7 N45 GND
GND GND GND GND GND
AG30 GND GND AP51 B13 GND GND BK1 N47 GND
AG31 GND GND AP6 B16 GND GND BL1 N49 GND
AG32 GND GND AP8 B19 GND GND BL10 N51 GND
AG33 GND GND AR14 B2 GND GND BL13 BL40 GND
AG34 GND GND AR15 B22 GND GND BL16
D AG44 GND GND AR16 B25 GND GND BL19 D
AH10 GND GND AR17 B28 GND GND BL2
AH2 GND GND AR18 B31 GND GND BL22 GND
AH4 GND GND AR19 B34 GND GND BL25
AH43 GND GND BL37 B37 GND GND BL28
AH45 GND GND BD24 B40 GND GND BL31
AH47 GND GND BC24 B43 GND GND BL34
AH49 B46 B5
GND GND GND
AH51 GND B48 GND GND B51
Title
GND GND GND GND [34] GPU GND

1 2 3 4 5 6 7 8
GPU GND B - 35
Schematic Diagrams
PCH 1/9
5 4 3 2 1
BOOT HALT JTAG ODT ESPI FLASH SHARING MODE

ENABLE:LOW DISABLE:LOW MASTER ATTACHED FLASH SHARING:LOW
SLAVE ATTACEHD FLASH SHARING:HIGH
(INTERNAL WEAK PD) (INTERNAL WEAK PU) (INTERNAL WEAK PD)
3.3VA
R592
*4.7K_04
SPI_SI_R SPI_SO_R GPP_H_12 GPP_G_14_GSXDIN:
DMI AC COUPLING FULL VOLTAGE MODE
WHEN SAMPLED LOW 3.3VS
D R573 R576 Modify(on TBT),6/13 Tim D
*4.7K_04 *4.7K_04 SPT-H_PCH TBCIO_PLUG_EVENT R258 *10K_04
U52A
R526 *0_04 BD17 BB27 PLT_RST# 39

44,47,60 LAN_W AKEUP# GPP_A11/PME# GPP_B13/PLTRST#
AG15 TBT_FRC_PW R
CONSENT STRAP PESONALITY STRAP RSVD P43 TBT_FRC_PW R 53
AG14 GPP_G16/GSXCLK TBCIO_PLUG_EVENT
ENABLE:LOW ENABLE:LOW RSVD R39 TBCIO_PLUG_EVENT 53
AF17 GPP_G12/GSXDOUT
(INTERNAL WEAK PU) (INTERNAL WEAK PU) RSVD R36
AE17 GPP_G13/GSXSLOAD GPP_G_14_GSXDIN
RSVD R42
GPP_G14/GSXDIN R41
AR19 GPP_G15/GSXSRESET#
TP2 3.3VS
AN17
TP1
AF41 EXTTS_SNI_DRV0_PCH R634 8.2K_04
SPI_SI_R BB29 GPP_E3/CPU_GP0
SPI0_MOSI AE44 TCH_PNL_INTR_N R618 10K_04
SPI_SO_R BE30 GPP_E7/CPU_GP1
SPI0_MISO BC23 BT_RF_KILL_R_N
SPI_CS_0#
Sheet 35 of 91
BD31 GPP_B3/CPU_GP2 EXTTS_SNI_DRV1_PCH R545
SPI_SCLK_R SPI0_CS0# BD24 8.2K_04
SPI_IO2 SPI_IO3 BC31 GPP_B4/CPU_GP3
AW31 SPI0_CLK
SPI0_CS1# BC36 SML4ALERT#
SPI_W P# R568 33_04 SPI_IO2 BC29 GPP_H18/SML4ALERT# BE34 SML4DATA
PCH 1/9 R561

*4.7K_04
R587
*1K_04
SPI_HOLD#
VDD3
R586
R217
33_04
*2.2K_04
SPI_IO3
SPI_CS2#
BD30
AT31
AN36
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
GPP_H14/SML3DATA
BD39
BB36
BA35
SML4CLK
SML3ALERT#
SML3DATA
60 PCH_AUDIO_DET GPP_D1/SPI1_CLK BC35 SML3CLK
AL39 GPP_H13/SML3CLK GPP_H_12
55 TBTA_ACE_GPIO2 GPP_D0/SPI1_CS# BD35
AN41 GPP_H12/SML2ALERT#
55 TBTA_ACE_GPIO3 GPP_D3/SPI1_MOSI AW35 SML2DATA
AN38 GPP_H11/SML2DATA
55 TBTA_ACE_GPIO0 GPP_D2/SPI1_MISO BD34 SML2CLK
AH43 GPP_H10/SML2CLK
55 TBTA_MRESET GPP_D22/SPI1_IO3
AG44 BE11 R506 1M_04 VCC_RTC
C 55,56 TBTA_ACE_GPIO7 GPP_D21/SPI1_IO2 INTRUDER# C
QJHT 1 OF 12 REV = 1.3
For ITE IT8587B Test

HSPI_MSI R600 0_04 SPI_SI_R
B 44 HSPI_MSI HSPI_MSO SPI_SO_R B
R646 0_04
44 HSPI_MSO HSPI_SCLK SPI_SCLK_R
R598 0_04
44 HSPI_SCLK HSPI_CE# SPI_CS_0#
R644 0_04
44 HSPI_CE#
SPI_* = 1"~6.5"
RTC Wake UP
VDD3
BIOS + ME ROM 8MB
U57
8 5 SPI_SI_M R601 33_04 SPI_SI_R
VDD SI
2 SPI_SO_M R647 33_04 SPI_SO_R
C483 SO
R648 3.3K_1%_04 SPI_W P# 3 1 SPI_CS0# R645 0_04 SPI_CS_0#
0.1u_16V_Y5V_04 WP# CE#
6 SPI_SCLK_M R599 33_04 SPI_SCLK_R
SCK
R238 3.3K_1%_04 SPI_HOLD# 7 4
HOLD# VSS
GD25B64CSIGR
A A
64M
GD:6-04-02564-A75
MXIC:6-04-25647-490
WINBOND: 6-04-02564-470
Title
3.3VA 5,36,37,38,39,41,43,63 [35] PCH 1/12-SPI/SMBUS
VCC_RTC 38,41
Size Document Number
3.3VS 3,9,10,11,12,13,14,15,16,31,32,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 Rev
VDD3 5,30,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 36 PCH 1/9
Schematic Diagrams
PCH 2/9
5 4 3 2 1
SPT-H_PCH
U52B
L27
2 DMI_MT_IR_0_DN DMI_RXN0 AF5 USB_PN1 46
N27 USB2N_1
2
2 DMI_MT_IR_0_DP
DMI_IT_MR_0_DN
C27 DMI_RXP0
USB2P_1
AG7
AD5
USB_PP1 46 USB3 PORT1, ؐ, C h a r g e r
B27 DMI_TXN0
2 DMI_IT_MR_0_DP USB2N_2 AD7
E24 DMI_TXP0
2 DMI_MT_IR_1_DN USB2P_2 AG8
G24 DMI_RXN1
2 DMI_MT_IR_1_DP USB2N_3 AG10
B28 DMI_RXP1
2 DMI_IT_MR_1_DN USB2P_3 AE1
DMI_TXN1
2 DMI_IT_MR_1_DP
A28
G27 DMI_TXP1 DMI
USB2N_4 AE2
USB_PN4
USB_PP4
60
60
USB3 PORT4, ‫׳‬
2 DMI_MT_IR_2_DN USB2P_4 AC2
E26 DMI_RXN2 USB_PN5 47
2 DMI_MT_IR_2_DP USB2N_5 AC3 D02
B29 DMI_RXP2 USB_PP5 47
D 2 DMI_IT_MR_2_DN USB2P_5 AF2 D
C29 DMI_TXN2 USB_PN6 49
2 DMI_IT_MR_2_DP USB2N_6 AF3
L29 DMI_TXP2
USB2P_6 AB3
USB_PP6 49 3G
2 DMI_MT_IR_3_DN DMI_RXN3 USB_PN7 60
K29 USB2N_7
2 DMI_MT_IR_3_DP DMI_RXP3 USB 2.0 AB2 USB_PP7 60 FINGER
B30 USB2P_7
2 DMI_IT_MR_3_DN DMI_TXN3 AL8 USB_PN8 47
A30 USB2N_8
2 DMI_IT_MR_3_DP DMI_TXP3 AL7 USB_PP8 47 NGFF WIGIG/WLAN +BT
USB2P_8 AA1
R513 100_1%_04 PCIECOMP_N B18 USB2N_9 USB_PN9 58
PCIECOMP_P PCIE_RCOMPN AA2 USB_PP9 58 CCD
C17 USB2P_9
PCIE_RCOMPP AJ8
USB2N_10 AJ7
H15 USB2P_10 W2
53 PCIE_RXN1_TBT PCIE1_RXN/USB3_7_RXN USB2N_11
G15 W3
53 PCIE_RXP1_TBT PCIE1_RXP/USB3_7_RXP USB2P_11
C824 0.22u_10V_X5R_04 PCIETXN1 A16 AD3
53 PCIE_TXN1_TBT PCIE1_TXN/USB3_7_TXN USB2N_12
C814 0.22u_10V_X5R_04 PCIETXP1 B16 AD2
PCIe/USB 3
53 PCIE_TXP1_TBT PCIE1_TXP/USB3_7_TXP USB2P_12
C826 0.22u_10V_X5R_04 PCIETXN2 B19 V2
53 PCIE_TXN2_TBT PCIE2_TXN/USB3_8_TXN USB2N_13 3.3VA
C834 0.22u_10V_X5R_04 PCIETXP2 C19 V1
53 PCIE_TXP2_TBT PCIE2_TXP/USB3_8_TXP USB2P_13 RN4
E17 AJ11
53 PCIE_RXN2_TBT PCIE2_RXN/USB3_8_RXN USB2N_14 10K_8P4R_04
G17 AJ13 USB_OC2#
53 PCIE_RXP2_TBT PCIE2_RXP/USB3_8_RXP USB2P_14 1 8
L17 VISACH2_D3
53 PCIE_RXN3_TBT PCIE3_RXN/USB3_9_RXN 2 7
K17 USB_OC1#
53 PCIE_RXP3_TBT PCIE3_RXP/USB3_9_RXP 3 6
C845 0.22u_10V_X5R_04 PCIETXN3 B20 USB_OC0#
Sheet 36 of 91
53 PCIE_TXN3_TBT PCIE3_TXN/USB3_9_TXN 4 5
C850 0.22u_10V_X5R_04 PCIETXP3 C20 USB_OC0#
53 PCIE_TXP3_TBT PCIE3_TXP/USB3_9_TXP AD43
E20 GPP_E9/USB2_OC0# USB_OC1# RN2
53 PCIE_RXN4_TBT PCIE4_RXN/USB3_10_RXN AD42
G19 GPP_E10/USB2_OC1# USB_OC2# 10K_8P4R_04
53 PCIE_RXP4_TBT PCIE4_RXP/USB3_10_RXP AD39 USB_OC5#
C856 0.22u_10V_X5R_04 PCIETXN4 B21 GPP_E11/USB2_OC2# 1 8
PCH 2/9
53 PCIE_TXN4_TBT PCIE4_TXN/USB3_10_TXN AC44 VISACH2_D3
C865 0.22u_10V_X5R_04 PCIETXP4 A21 GPP_E12/USB2_OC3# USB_OC6# 2 7
53 PCIE_TXP4_TBT PCIE4_TXP/USB3_10_TXP Y43 USB_OC4#
K19 GPP_F15/USB2_OCB_4 USB_OC7# 3 6
60 PCIE_RXN5_GLAN PCIE5_RXN Y41 USB_OC5#
L19 GPP_F16/USB2_OCB_5 USB_OC4# 4 5
60 PCIE_RXP5_GLAN PCIE5_RXP W44 USB_OC6#
C867 0.1u_10V_X7R_04 PCIETXN5 D22 GPP_F17/USB2_OCB_6
C GLAN 60 PCIE_TXN5_GLAN
C869 0.1u_10V_X7R_04 PCIETXP5 C22 PCIE5_TXN
GPP_F18/USB2_OCB_7
W43 USB_OC7# C
60 PCIE_TXP5_GLAN PCIE5_TXP
G22
60 PCIE_RXN6_SD40 PCIE6_RXN
E22 DESIGN NOTE:
60 PCIE_RXP6_SD40 PCIE6_RXP AG3 USB2_COMP R479 113_1%_04
C871 *0.1u_10V_X7R_04 PCIETXN6 B22 USB2_COMP USB2 COMP RES: PLACE WITHIN 1 INCH
SD4.0 60 PCIE_TXN6_SD40
C879 *0.1u_10V_X7R_04 PCIETXP6 A23 PCIE6_TXN
USB2_VBUSSENSE
AD10 USB2_VBUSSENSE R172 1K_04
60 PCIE_TXP6_SD40 PCIE6_TXP AB13
L22 RSVD_AB13
47 PCIE_RXN7_W LAN PCIE7_RXN AG2 USB2_ID R474 1K_04
K22 USB2_ID
47 PCIE_RXP7_W LAN PCIE7_RXP
C23
WLAN 47 PCIE_TXN7_W LAN
B23 PCIE7_TXN
47 PCIE_TXP7_W LAN PCIE7_TXP
K24 BD14
47 PCIE_RXN8_W IGIG PCIE8_RXN GPD7/RSVD
L24
47 PCIE_RXP8_W IGIG PCIE8_RXP
WiGig 47 PCIE_TXN8_W IGIG
C24
PCIE8_TXN
B24
47 PCIE_TXP8_W IGIG PCIE8_TXP
B B
5,35,37,38,39,41,43,63 3.3VA
A A
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
Title
[36] PCH 2/12-DMI/PCIE/USB2.0
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
PCH 2/9 B - 37
Schematic Diagrams
PCH 3/9
5 4 3 2 1
BIOS RECOVERY PCH_RSVD

SPT-H_PCH
ENABLE :LOW U52C
BIOS SET GPIO pin
3.3VS 3.3VS NV power on/off timing
CL_CLK1 AV2
T14 CL_DATA1 AV3 CL_CLK G31
PCIE9_RXN/SATA0A_RXN PCIE_RXN9_SATA0A_RXN_SSD 48
T61 CL_RST#1 AW2 CL_DATA CLINK H31
PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SATA0A_RXP_SSD 48
R257 R244 D02 T15
R44
CL_RST#
PCIE9_TXN/SATA0A_TXN
C31
B31
PCIE_TXN9_SATA0A_TXN_SSD 48
PCIE_TXP9_SATA0A_TXP_SSD 48
SSD_1
67 GPPG8_PCH_1V8AON_EN PCIE9_TXP/SATA0A_TXP
10K_04 10K_04 R43 GPP_G8/FAN_PWM_0
31 GPPG9_PCH_NV3V3_EN GPP_G9/FAN_PWM_1
BIOS_REC PCH_RSVD 3/21 Signal modify 31 GPPG10_PCH_NVVDD_EN U39 G29
GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN PCIE_RXN10_SSD 48
31 GPPG11_PCH_NVVDDS_EN N42 E29
GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP PCIE_RXP10_SSD 48
C32
D
31 GPPG2_PCH_1V8RUN_EN
31 GPPG0_PCH_PEXVDD_EN U43
FAN PCIE10_TXN/SATA1A_TXN
PCIE10_TXP/SATA1A_TXP
B32
PCIE_TXN10_SSD 48
PCIE_TXP10_SSD 48
SSD_1 D
U42 GPP_G0/FAN_TACH_0
31 GPPG1_PCH_FBVDDQ_EN GPP_G1/FAN_TACH_1 F41 SATA_RXN2
U41 PCIE15_RXN/SATA2_RXN SATA_RXP2
GPP_G2/FAN_TACH_2 E41
44 SCI# C
D53
A SCI#_R M44
RB751V-40(lision) U36 GPP_G3/FAN_TACH_3
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
B39
A39
SATA_TXN2
SATA_TXP2
main HDD 3.3VS
DEL net PS8338B_SW (no TBT funcyion) P44 GPP_G4/FAN_TACH_4
GFX SELECT TABLE PCIE15_TXP/SATA2_TXP
C A SW I#_R T45 GPP_G5/FAN_TACH_5
NORMAL GFX:LOW 44 SW I# GPP_G6/FAN_TACH_6 D43
D55 RB751V-40(lision) T44 SATA_RXN3 60
PCIe/SATA
PCIE16_RXN/SATA3_RXN E42
CUSTOMER GFX:HIGH GPP_G7/FAN_TACH_7 SATA_RXP3 60
PCIE16_RXP/SATA3_RXP
3.3VS 48 PCIE_TXP11_SSD
B33
C33 PCIE11_TXP
PCIE16_TXN/SATA3_TXN
A41
A40
SATA_TXN3 60
SATA_TXP3 60
2nd HDD SATAGP0
SATAGP2
R242
R259
43K_04
43K_04
48 PCIE_TXN11_SSD PCIE16_TXP/SATA3_TXP SATAGP3 R241 43K_04
PCIE11_TXN
SSD_1 48 PCIE_RXP11_SSD
48 PCIE_RXN11_SSD
K31
L31 PCIE11_RXP
PCIE17_RXN/SATA4_RXN
H42
H40
PCIE_RXN17_SATA4_RXN_SSD2_R
PCIE_RXP17_SATA4_RXP_SSD2_R
R620 PCIE11_RXN PCH_SATAHDD_LED# R619 10K_04
PCIE17_RXP/SATA4_RXP E45 PCIE_TXN17_SATA4_TXN_SSD2_R
BIOS_REC AB33 PCIE17_TXN/SATA4_TXN SCI#_R R631 10K_04
GPP_F10/SCLOCK F45 PCIE_TXP17_SATA4_TXP_SSD2_R
*10K_04 PCH_RSVD AB35 PCIE17_TXP/SATA4_TXP

GP39_GFX_CRB_DETECT AA44 GPP_F11/SLOAD 3.3VA
GP39_GFX_CRB_DETECT
MFG_MODE AA45 GPP_F13/SDATAOUT0
GPP_F12/SDATAOUT1
PCIE18_RXN/SATA5_RXN
K37
G37
PCIE_RXN18_SSD2
PCIE_RXP18_SSD2
48
48
SSD_2 SW I#_R R622 10K_04
SATA1B_TXN_R B38 PCIE18_RXP/SATA5_RXP G45
R630 SATA1B_TXP_R PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN PCIE_TXN18_SSD2 48
C38 G44
10K_04 SSD_2(SATA) SATA1B_RXN_R
SATA1B_RXP_R
D39
E37
PCIE14_TXP/SATA1B_TXP
PCIE14_RXN/SATA1B_RXN
PCIE18_TXP/SATA5_TXP
AD44 PCH_SATAHDD_LED#
PCIE_TXP18_SSD2 48
PCIE14_RXP/SATA1B_RXP GPP_E8/SATALED# PCH_SATAHDD_LED# 60

AG36 SATAGP0 SATAGP0 48
C36
Sheet 37 of 91
GPP_E0/SATAXPCIE0/SATAGP0 AG35 SATAGP1
B36 PCIE13_TXN/SATA0B_TXN
GPP_E1/SATAXPCIE1/SATAGP1 AG39 SATAGP2
G35 PCIE13_TXP/SATA0B_TXP
MFG_MODE PCIE13_RXN/SATA0B_RXN
GPP_E2/SATAXPCIE2/SATAGP2 AD35 SATAGP3 SATAGP 0,1,4
E35 GPP_F0/SATAXPCIE3/SATAGP3 H: SATA 1.0V_VCCST
PCIE13_RXP/SATA0B_RXP AD31 SATAGP4
PCH 3/9 C
3.3VS
48 PCIE_TXP12_SSD
48 PCIE_TXN12_SSD
A35
B35 PCIE12_TXP
PCIE12_TXN
GPP_F1/SATAXPCIE4/SATAGP4
AD38
AC43
AB44
L: PCIe
C
R621
SSD_1 48 PCIE_RXP12_SSD
48 PCIE_RXN12_SSD
H33
G33 PCIE12_RXP
W36 R138
PCIE12_RXN EDP_BRIGHTNESS 13
J45 GPP_F21/EDP_BKLTCTL W35
*10K_04 48 PCIE_TXP20_SSD2 PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN BLON 13 1K_04
K44 W42 NB_ENAVDD 13
MFG_MODE 48 PCIE_TXN20_SSD2 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
N38
48 PCIE_RXP20_SSD2 PCIE20_RXP/SATA7_RXP HOST PCH_THERMTRIP#_R PCH_THERMTRIP#
N39 AJ3 R160 604_1%_04 PCH_THERMTRIP# 5
48 PCIE_RXN20_SSD2 PCIE20_RXN/SATA7_RXN THERMTRIP#
SSD_2 48
48
PCIE_TXP19_SSD2
PCIE_TXN19_SSD2
H44
H43 PCIE19_TXP/SATA6_TXP PECI
AL3
AJ4
PCH_PECI
H_PM_SYNC_R R151 30.1_1%_04 H_PM_SYNC 5
PCH_PECI 5
L39 PCIE19_TXN/SATA6_TXN PM_SYNC AK2
48 PCIE_RXP19_SSD2 PCIE19_RXP/SATA6_RXP PLTRST_PROC# PLTRST_CPU_N 5
L37 AH2 H_PM_DOW N 5
48 PCIE_RXN19_SSD2 PCIE19_RXN/SATA6_RXN PM_DOWN
R154
QJHT 3 OF 12 REV = 1.3 *10K_04
D02C
PCH= HM170 , resistor Stuff
Default
SATAGP1 R253 0_04
SATA1B_RXN_R R594 0_04 3.3VS
SATA1B_RXP_R R595 0_04
SATA1B_TXN_R R605 0_04
B SATA1B_TXP_R R604 0_04 B
R246
43K_04
Ꮑ‫إ‬હᦤ࣋
layoutᏁ SATAGP 0,1,4
J_SATA2
SATA PORT2 H: SATA
L: PCIe
SATAGP4 R237 *0_04 SATAGP_SSD2 48
S1 PCIE_RXN17_SATA4_RXN_SSD2_R
SATA_TXP2 R221 *0_04
S2 SATATXP2 C1060 0.01u_16V_X7R_04 PCIE_RXP17_SATA4_RXP_SSD2_R PCIE_RXN17_SATA4_RXN_SSD2 48
SATA_TXN2 R222 *0_04
S3 SATATXN2 C1059 0.01u_16V_X7R_04 PCIE_TXN17_SATA4_TXN_SSD2_R PCIE_RXP17_SATA4_RXP_SSD2 48
R231 *0_04
S4 PCIE_TXP17_SATA4_TXP_SSD2_R PCIE_TXN17_SATA4_TXN_SSD2 48
SATA_RXN2 R230 *0_04
S5 SATARXN2 C1058 0.01u_16V_X7R_04 PCIE_TXP17_SATA4_TXP_SSD2 48
S6 SATARXP2 C1057 0.01u_16V_X7R_04 SATA_RXP2
S7 PCH= CM236 , resistor Stuff
3.3VS Del RTD3
P1
P2
P3 C1056 C1055
PLACE CLOSE TO PCH
P4 PCH_THERMTRIP# R147 *1K_04
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 DIMM0_CHA_EVENT# 9
P6
R144 *1K_04
P7 5VS DIMM0_CHB_EVENT# 11
P8 D02C R139 *1K_04
P9 DIMM1_CHA_EVENT# 10
P10
R146 *1K_04
P11 DIMM1_CHB_EVENT# 12
P12 C1053 C1054 C1052
P13
5,35,36,38,39,41,43,63 3.3VA
A
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 A
3,9,10,11,12,13,14,15,16,31,32,35,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
P15
13,14,16,45,50,51,52,58,59,60,63,68,70,72 5VS
5,7,38,64,73,75 1.0V_VCCST
GND1
GND2
47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 5V
H=5.3mm
TBF0-02104-0021A
TBF0-02104-0021A
Title
PCB Footprint = 193705-1
PN = 6-21-43740-022
[37] PCH 3/12-PCIE/SATA/HOST
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 38 PCH 3/9
Schematic Diagrams
PCH 4/9
5 4 3 2 1
SPT-H_PCH
VDD3 U52D
BA9 BB17 ISH_GP_6_R

50 HDA_BITCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF# PM_CLKRUN#
BD8 AW22
SKLऱVCCRTC૞‫ޣ‬՛࣍3.2V‫א‬Հ 50 HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# 58
BE7
(Skarkbay‫ױ‬3.3V) ࢬ‫א‬PDG৬ᤜආ‫אش‬Հሽሁ(1.5K,45.3K)ࠡଖ‫ױ‬ᓳᖞ 50 HDA_SDIN0 HDA_SDI0
BC8 AR15
R263 1.5K_1%_04 R262 45.3K_1%_04 HDA_SDI1 GPD11/LANPHYPC
HDA_SDOUT BB7 AV13
38,50 HDA_SDOUT HDA_SDO GPD9/SLP_WLAN#
D
˅˃̀˼˿̆ 50 HDA_SYNC
BD9
HDA_SYNC ຏवBIOS๻ࡳPIN D
VCC_RTC BC14 DDR4_DRAMRST#
D23 DRAM_RESET#
BD1 BD23 DESIGN NOTE: '0' 1.35V
1 A BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 '1' 1.2V
C 3 RSVD_BE2 GPP_B1 AR27
CLOSE TO PCH AUDIO GPP_B0 DDR_VOL_SEL 61
2 A R477 30.1_1%_04 AUD_AZACPU_SDO AM1 N44
3 AUD_AZACPU_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE ‫ޏ‬ፖP870DMԫᑌ‫ش‬GPP_B0
AN2 AN24
RTC_VBAT_1
3 AUD_AZACPU_SDI DISPA_SDI GPP_B11

BAT54CS3 R473 30.1_1%_04 AUD_AZACPU_SCLK_R AM2 AY1 SYS_PW ROK 43
C482 R514 R504 3 AUD_AZACPU_SCLK DISPA_BCLK SYS_PWROK
˄˃̀˼˿̆ 20K_1%_04 20K_1%_04 BC13 PCIE_W AKE#
1u_6.3V_X5R_04 AL42 WAKE# PCIE_W AKE# 53,60
32 GPIO4_1V8_MAIN_EN_R GPP_D8/I2S0_SCLK BC15 SLP_A#
AN42 GPD6/SLP_A# PM_SLP_LAN#
3/15 ADD D02C GPP_D7/I2S0_RXD AV15
D02 AM43 SLP_LAN#
GPP_D6/I2S0_TXD BC26
AJ33 GPP_B12/SLP_S0#
R261 56 TBTB_ACE_GPIO0 GPP_D5/I2S0_SFRM AW15
AH44 GPD4/SLP_S3# SUSB# 13,43,44,45,46,51,53,63,64
GPP_D20/DMIC_DATA0 BD15
1
C820 AJ35 GPD5/SLP_S4# SUSC# 44,61,64,66
1K_04 GPP_D19/DMIC_CLK0 BA13
JOPEN1 AJ38 GPD10/SLP_S5#
1u_6.3V_X5R_04 *OPEN_10mil-1MM AJ42 GPP_D18/DMIC_DATA1
GPP_D17/DMIC_CLK1 AN15 SUS_CLK SUS_CLK 47
J_CBAT1 GPD8/SUSCLK BD13 PM_BATLOW #
2
GPD0/BATLOW# BB19 SUS_PW R_ACK# R532 *0_04
1 GPP_A15/SUSACK# SUS_PW R_ACK#_EC 44
RTC_RST# BC10 BD19 SUSW ARN#
2 SRTC_RST# BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
50271-0020N-001 SRTCRST#
P/N = 6-20-43130-102 AW11 BD11 LAN_W AKE#
PCB Footprint = 85204-02R C831
1u_6.3V_X5R_04
RSMRST# R174
43 PM_PCH_PW ROK
44 RSMRST#
*0402_short
RSMRST#
PCH_DPW ROK
BA11
AV11
PCH_PWROK
RSMRST#
GPD2/LAN_WAKE#
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
BB15
BB13
AT13
AC_PRESENT
SLP_SUS#_R R180
PW R_BTN#
AC_PRESENT
*0_04
PW R_BTN# 44
44
EC_SLP_SUS# 44,62,63,64 Sheet 38 of 91
DSW_PWROK AW1 SYS_RESET#
PCH 4/9
SKIN_THRM_SNSR_ALERT_N BB41 SYS_RESET#
GPP_C2/SMBALERT# BD26 PCH_SPKR
SMBUS
SMB_CLK AW44 GPP_B14/SPKR PCH_SPKR 50
58,60,61 SMB_CLK GPP_C0/SMBCLK AM3
C SMB_DATA BB43 PROCPWRGD H_PW RGD 5 C
58,60,61 SMB_DATA GPP_C1/SMBDATA
GPP_C5 BA40
GPP_C5/SML0ALERT# AT2 ITP_PMODE 2/19 ‫ܔ‬ሿٙ
SML0_CLK AY44 ITP_PMODE 1.0V_VCCST
GPP_C3/SML0CLK AR3 PCH_JTAGX
SML0_DATA BB39 JTAGX
GPP_C4/SML0DATA JTAG AR2 PCH_JTAG_TMS
PCH_HOT_GNSS_DISABLE AT27 JTAG_TMS
GPP_B23/SML1ALERT#/PCHHOT# AP1 PCH_JTAG_TDO R476 51_04
R612 *0_04 SMC_CPU_THERM_R
AW42 JTAG_TDO
44 SMC_CPU_THERM GPP_C6/SML1CLK AP2 PCH_JTAG_TDI
SMD_CPU_THERM AW45 JTAG_TDI
44 SMD_CPU_THERM GPP_C7/SML1DATA AN3 PCH_JTAG_TCK R485 51_04
JTAG_TCK
SUSW ARN# R530 0_04 SUS_PW R_ACK#

3.3VS
3.3VA
RN3
1K_8P4R_04
SMC_CPU_THERM_R 1 8
DRAM_RST# VDDQ SMD_CPU_THERM 2 7
R254 R255 SMB_CLK 3 6
SMB_DATA 4 5
1K_04 1K_04
2
Q20A R198
G
MTDK3S6R 470_04
1 6 SMB_CLK
3,9,10,11,12 SMB_CLK_R
S
SML0_CLK R606 499_1%_04

5
Q20B DDR4_DRAMRST#
DDR4_DRAMRST# 9,10,11,12
G
MTDK3S6R SML0_DATA R596 499_1%_04

4 3 SMB_DATA
3,9,10,11,12 SMB_DATA_R
S
C389 SUSW ARN# R531 1K_04

B *0.1u_10V_X7R_04 B
Flash Descriptor Security Overide

Low = Disabled-(Default)
High = Enabled
VDD3
R155 1K_04
ME_W E 44 PCIE_W AKE# R184 1K_04
A C HDA_SDOUT AC_PRESENT R187 10K_04

HDA_SDOUT 38,50
D14 RB751V-40(lision)
PM_BATLOW # R515 8.2K_04
ESPI/LPC SELECT STARP TOP SWAP OVERRIDE STRAP EXI BOOT STALL BYPASS 3.3VS
LPC : LOW (DEFAULT) SWAP ENABLE: HIGH ENABLE:HIGH
eSPI: HIGH SWAP DISABLE(DEFAULT): LOW (INTERNAL WEAK PD) PM_CLKRUN# R196 8.2K_04
(INTERNAL WEAK PD) (INTERNAL WEAK PD) SYS_RESET# R487 10K_04
3.3VA 3.3VS 3.3VA TLS CONFIDENTITALITY RSMRST# R169 10K_04
ENABLE: HIGH
A
(INTERNAL WEAK PD) SUS_CLK R177 *1.5K_04 A
R225 R556 R203 KW>>sZE>/^>t,E^DW>>Kt

*4.7K_04 150K_1%_04 *4.7K_04
GPP_C5 PCH_SPKR PCH_HOT_GNSS_DISABLE
3.3VA R223 *4.7K_04 SKIN_THRM_SNSR_ALERT_N 3.3VA 5,35,36,37,39,41,43,63
1.0V_VCCST 5,7,37,64,73,75 Title
VCC_RTC 35,41
VDDQ 7,9,10,11,12,61,66
[38] PCH 4/12-HDA/SMBUS/RTC
3.3V 2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
VDD3 5,30,35,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
PCH 4/9 B - 39
Schematic Diagrams
PCH 5/9
5 4 3 2 1
D D
U52E
R157 100K_04 SPT-H_PCH
BB3
FROM DP REDRIVER AW4 GPP_I7/DDPC_CTRLCLK
15,32 MDP_F_HPD GPP_I0/DDPB_HPD0 BD6
AY2 GPP_I8/DDPC_CTRLDATA 3.3VS
16,32 HDMI_HPD GPP_I1/DDPC_HPD1 BA5
FROM DP AV4 GPP_I5/DDPB_CTRLCLK BC4
14,32 G_DP_DHPD_E GPP_I2/DDPD_HPD2

BA4 GPP_I6/DDPB_CTRLDATA
GPP_I3/DDPE_HPD3 BE5
R164 100K_04 GPP_I9/DDPD_CTRLCLK BE6 DGPU_SELECT# R593
GPP_I10/DDPD_CTRLDATA 10K_04
Y44 H_SKTOCC_N 5 DGPU_PRSNT#
GPP_F14 R623 10K_04
V44
GPP_F23 DGPU_RST#_PCH DGPU_PW R_EN 31,44,60,67
W39
BD7 GPP_F22
3 SB_IEDP_HPD GPP_I4/EDP_HPD L43 DGPU_PRSNT# D02 3/18 del R638
GPP_G23 L44 DGPU_PW RGD_RR R632 0_04
R168 GPP_G22 DGPU_PW RGD_R 32
Sheet 39 of 91 100K_04 GPP_G21

GPP_G20
GPP_H23
U35
R35
BD36
GC6_FB_EN_R
GPU_EVENT#
DGPU_SELECT#
GC6_FB_EN_R
GPU_EVENT#
31,32
30
PCH 5/9 C
C
SPT-H_PCH
U52F
C11 AT22
LPC/eSPI
46 USB3_TXN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD0 44,58
B11 AV22
46 USB3_TXP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD1 44,58
USB3 PORT1, ؐ, C h a r g e r 46 USB3_RXN1
B7
A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2
AT19
BD16
LPC_AD2 44,58
46 USB3_RXP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 44,58
B12
49 USB3_TXN2 USB3_2_TXN/SSIC_1_TXN
A12 BE16 LPC_FRAME# 44,58
49 USB3_TXP2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# 3.3VS
4G LTE C8 BA17 SERIRQ SERIRQ 44,58
49 USB3_RXN2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQA#
B8 AW17
49 USB3_RXP2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# SB_KBCRST#
AT17
B15 GPP_A0/RCIN#/ESPI_ALERT1# SB_KBCRST# 44 SERIRQ R178 10K_04
USB3_6_TXN BC18 SB_KBCRST# R179
C15 GPP_A14/SUS_STAT#/ESPI_RESET# 10K_04
K15 USB3_6_TXP
USB3_6_RXN
USB
K13 BC17 CLK_PCI_KBC_R R525 22_04
USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK PCLK_KBC 44
AV19 CLK_PCI_TPM_R R182 22_04 24 Mhz
B14 GPP_A10/CLKOUT_LPC1 PCLK_TPM 58
D02 47 USB3_TXN5
C14 USB3_5_TXN
47 USB3_TXP5 USB3_5_TXP M45
G13 GPP_G19/SMI#
47 USB3_RXN5 USB3_5_RXN N43
H13 GPP_G18/NMI#
47 USB3_RXP5 USB3_5_RXP
B B
D13
USB3_3_TXP/SSIC_2_TXP AE45 PCH_MUTE# 51
C13 GPP_E6/DEVSLP2
USB3_3_TXN/SSIC_2_TXN AG43
A9 GPP_E5/DEVSLP1
USB3_3_RXP/SSIC_2_RXP AG42
B10 GPP_E4/DEVSLP0
USB3_3_RXN/SSIC_2_RXN AB39 PS8331_SW _R R245 0_04 PS8331_SW 3,13,30,60
GPP_F9/DEVSLP7 AB36 3.3VA
SATA
B13 GPP_F8/DEVSLP6
60 USB3_TXP4 USB3_4_TXP AB43 L :PORT1 (INTEL) (DEFAULT)
5
A14 GPP_F7/DEVSLP5
60 USB3_TXN4 USB3_4_TXN AB42 H: PORT2 (NV)
USB3 PORT4, ‫׳‬ 60 USB3_RXP4
G11
E11 USB3_4_RXP
GPP_F6/DEVSLP4 AB41
1
4
60 USB3_RXN4 GPP_F5/DEVSLP3
USB3_4_RXN 2
U22
QJHT 6 OF 12 REV = 1.3 *MC74VHC1G08DFT2G
3
KBLED_DET 59
1V8_AON BUF_PLT_RST# 3.3VS

PERSTB# 1V8 out 3V3 in U24
C521 0.1u_10V_X7R_04
74AHC1G08GW
5
U23
5
SN74LV1T08DCKR 1
DGPU_RST#_PCH 5,35,36,37,38,41,43,63 3.3VA
1 4
PLT_RST# BUF_PLT_RST# 44,47,48,53,58,60
4 2 3,16,27,28,30,31,32,33,67,68,70,71,72 1V8_AON
30 PERSTB# PLT_RST#
2 PLT_RST# 35 17,18,27,28,31,33,67 1V8_RUN
A R273 R274 3,9,10,11,12,13,14,15,16,31,32,35,37,38,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS A
3
13,14,16,37,45,50,51,52,58,59,60,63,68,70,72 5VS
3
10K_04 R272 100K_04 5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
100K_04
Title
[39] PCH 5_6/12-DPP/ESPI/USB3.0
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 40 PCH 5/9
Schematic Diagrams
PCH 6/9
5 4 3 2 1
W 76-147_24MHZ
C784 24MHZ
12p_50V_NPO_04 fsx3m
6-22-24R00-1B9
6-22-24R00-1BA
1
4
R495
X2
1M_04
2
3
C793
12p_50V_NPO_04
SPT-H_PCH
U52G
D D
RTC (10 MOHM RES): DO NOT CHANGE TO 0402 AR17
GPP_A16/CLKOUT_48
L1 PCH_XDP_CLK_DN
G1 CLKOUT_ITPXDP PCH_XDP_CLK_DP
5 CPU_24MHZ_R_DP CLKOUT_CPUNSSC_P L2
C787 5 CPU_24MHZ_R_DN F1 CLKOUT_ITPXDP_P
32.768KhzᏁࡉSOC or PCH ‫ٵ‬ԫ૿լ‫ؚױ‬VIA 15p_50V_NPO_04 CLKOUT_CPUNSSC J1
, XTALՀֱլ‫ڶױ‬POWER or ॾᇆ CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK_R_DN 5
G2 J2
2015/10/08 5 PCH_CPU_BCLK_R_DP CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_R_DP 5
5 PCH_CPU_BCLK_R_DN H2
CLKOUT_CPUBCLK
N7
2
1
X3 R500 A5 CLKOUT_PCIE_N0 CLK_PCIE_TBT# 53
XTAL24_OUT N8
A6 CLKOUT_PCIE_P0 CLK_PCIE_TBT 53
10M_04 XTAL24_IN
XCLK_RBIAS L7
VDD1.0 R480 2.7K_1%_04 E1 CLKOUT_PCIE_N1 L5
3
4
C809 1TJS125DJ4A420P_32.768KHz XCLK_BIASREF
CLKOUT_PCIE_P1
15p_50V_NPO_04 CM200S RTC_X1 BC9
RTC_X2 RTCX1 D3
BD10 CLKOUT_PCIE_N2
RTCX2 F2
CLKOUT_PCIE_P2
32.768KHZ R552 0_04 TBT_CLKREQ#_R BC24
53 TBT_CLKREQ# GPP_B5/SRCCLKREQ0# E5
6-22-32R76-0B2 AW24 CLKOUT_PCIE_N3
3.3VS 3/17 ‫ޏ‬Ղٙ (ᇞTBTᅝᖲംᠲ) GPP_B6/SRCCLKREQ1# G4
RN1 6-22-32R76-0BJ PCIECLKRQ2# AT24 CLKOUT_PCIE_P3
10K_8P4R_04 D02 PCIECLKRQ3# BD25 GPP_B7/SRCCLKREQ2#
LAN_CLKREQ# W IGIG_CLKREQ# GPP_B8/SRCCLKREQ3# D5
1 8 BB24 CLKOUT_PCIE_N4 CLK_PCIE_W IGIG# 47
47 W IGIG_CLKREQ# LAN_CLKREQ# GPP_B9/SRCCLKREQ4# E6
2 7 D02A BE25 CLKOUT_PCIE_P4 CLK_PCIE_W IGIG 47
SSD2_CLKREQ# 5/12 ࠷௣LAYOUT‫ޏ‬ՂR202 60 LAN_CLKREQ# W LAN_CLKREQ# GPP_B10/SRCCLKREQ5#
3 6 AT33
SSD_CLKREQ# 47 W LAN_CLKREQ# SD40_CLKREQ# GPP_H0/SRCCLKREQ6# D8
4 5 AR31 CLKOUT_PCIE_N5 CLK_PCIE_GLAN# 60
60 SD40_CLKREQ# PEG_CLKREQ# GPP_H1/SRCCLKREQ7# D7
BD32 CLKOUT_PCIE_P5 CLK_PCIE_GLAN 60
Sheet 40 of 91
D02A 5/12 RF Recommend 17 PEG_CLKREQ# GPP_H2/SRCCLKREQ8#
SSD_CLKREQ# BC32
R557 10K_04 W IGIG_CLKREQ# 48 SSD_CLKREQ# GPP_H3/SRCCLKREQ9# R8
SSD2_CLKREQ# BB31 CLKOUT_PCIE_N6 CLK_PCIE_W LAN# 47
R226 *10K_04 SD40_CLKREQ# 48 SSD2_CLKREQ# GPP_H4/SRCCLKREQ10# R7
BC33 CLKOUT_PCIE_P6 CLK_PCIE_W LAN 47
C BA33 GPP_H5/SRCCLKREQ11# C
PCH 6/9
2/1 DEL reversed GPP_H6/SRCCLKREQ12# U5
AW33 CLKOUT_PCIE_N7 CLK_PCIE_SD40# 60
GPP_H7/SRCCLKREQ13# U7
BB33 CLKOUT_PCIE_P7 CLK_PCIE_SD40 60
BD33 GPP_H8/SRCCLKREQ14#
R589 10K_04 PEG_CLKREQ# GPP_H9/SRCCLKREQ15# W10
CLKOUT_PCIE_N8 VGA_PEXCLK# 17
W11 VGA_PEXCLK 17
R13 CLKOUT_PCIE_P8
R553 *100K_04 TBT_CLKREQ#_R R11 CLKOUT_PCIE_N15
D02 CLKOUT_PCIE_P15 N3
CLKOUT_PCIE_N9 CLK_PCIE_SSD# 48
3/17 ‫ޏ‬լՂٙ (ᇞTBTᅝᖲംᠲ) N2
P1 CLKOUT_PCIE_P9 CLK_PCIE_SSD 48
R2 CLKOUT_PCIE_N14
CLKOUT_PCIE_P14 P3
CLKOUT_PCIE_N10 CLK_PCIE_SSD2# 48
PCI-E CLK Usage P2
W7 CLKOUT_PCIE_P10 CLK_PCIE_SSD2 48
Y5 CLKOUT_PCIE_N13
CLKOUT_PCIE_P13 R3
CLKOUT_PCIE_N11 R4
5 GLAN U2 CLKOUT_PCIE_P11
6 WLAN U3 CLKOUT_PCIE_N12
CLKOUT_PCIE_P12
8 PEG(NV)
9 SSD (X 4 LANE) QJHT 7 OF 12 REV = 1.3
14 SSD (X 2 LANE)
B B
A VDD1.0 41,64,66 A
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
VDD3 5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72
Title
[40] PCH 7/12-CLKOUT
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
PCH 6/9 B - 41
Schematic Diagrams
PCH 7/9
5 4 3 2 1
D D
VDD1.0
VDD3
VDD1.0 SPT-H_PCH
U52H
eSPI:1.8V
2.899A AA23 3.3VA LPC:3.3V
AA26 VCCPRIM_1P0
VCCPRIM_1P0 ዥሽ
AA28 AL22 0.0908A 3.3VA
VCCPRIM_1P0 VCCPRIM_1P0
CORE
AC23 C393
AC26 VCCPRIM_1P0 BA24 0.403A 3.3VA
AC28 VCCPRIM_1P0 VCCDSW_3P3 0.1u_10V_X7R_04 C414
R216 *0_04 VCCPRIM_1P0 BA31 0.082A
VCCGPIO
AE23 VCCPGPPA 3.3VA
VCCPRIM_1P0 CLOSE TO PCH
CLOSE TO PCH C429 AE26 BC42 0.229A (1-3 mm) 0.1u_10V_X7R_04 C461
(3-5 mm) Y23 VCCPRIM_1P0 VCCPGPPBCH BD40
VCCPRIM_1P0 VCCPGPPBCH CLOSE TO PCH
1u_6.3V_X5R_04 Y25 AJ41 0.114A (1-3 mm) 0.1u_10V_X7R_04
VCCPRIM_1P0 VCCPGPPEF
Sheet 41 of 91
+VCCDSW _1P0 0.0454A BA29 AL41 CLOSE TO PCH
DCPDSW_1P0 VCCPGPPEF AD41 0.065A (1-3 mm)
0.021A N17 VCCPGPPG AN5 0.2875A
VCCCLK1 VCCPRIM_3P3 3.3VA
0.05A R19 VDD1.0
VCCCLK3
PCH 7/9 0.024A

0.137A
U20
V17
R17
VCCCLK4
VCCCLK2
VCCCLK2
VCCPRIM_1P0
VCCATS
AD15
AD13
BA20
0.0061A
0.007A
0.0002A
C376
1u_6.3V_X5R_04
3.3VS C351
0.1u_10V_X7R_04
CLOSE TO PCH
CLOSE TO PCH
VDD1.0 L12 . HCB1608KF-121T30 +VCCF24_1P0_L 0.006A K2
K3 VCCCLK5
VCCRTCPRIM_3P3 BA22 0.0002A CLOSE TO PCH (1-3 mm)
C360 VCCRTC BA26 +VCC_RTCEXT_CAP (3-5 mm)
C357 VCCCLK5
C DCPRTC 3.3VA C
+VCCMPHY_1P0 C425
*22u_6.3V_X5R_06 3.53A U21 C348 C362
1u_6.3V_X5R_04 VCCMPHY_1P0 AJ20
MPHY
U23 VCCPRIM_1P0 1u_6.3V_X5R_04
VCCMPHY_1P0 AJ21 1u_6.3V_X5R_04 0.1u_10V_X7R_04
CLOSE TO PCH U25 VCCPRIM_1P0 CLOSE TO PCH
(3-5 mm) VCCMPHY_1P0 AJ23 (3-5 mm)
U26 VCCPRIM_1P0
VDD1.0 VCCMPHY_1P0 AJ25 VDD1.0
CLOSE TO PCH
V26 VCCPRIM_1P0 (1-3 mm)
C379 +VCCAMPHYPLL_1P0 0.11A A43 VCCMPHY_1P0 VCC_RTC
C426 VCCMPHYPLL_1P0
B43 BE41 0.029A
VDD3 C416 C413
22u_6.3V_X5R_08 1u_6.3V_X5R_04 C44 VCCMPHYPLL_1P0 VCCSPI BE43
VCCPCIE3PLL_1P0 VCCSPI 1u_6.3V_X5R_04 0.1u_10V_X7R_04
CLOSE TO PCH C45 BE42
VCCPCIE3PLL_1P0 VCCSPI
(3-5 mm) 0.030A V28 BC44 0.078A
VCCAPLLEBB_1P0 VCCPGPPD
L16 . HCB1608KF-121T30 0.533A AC17 BA45
USB
0.012A AJ5 VCCPRIM_1P0 VCCPGPPD BC45
C486 C487 VCCUSB2PLL_1P0 VCCPGPPD
C470 AL5 BB45
0.033A AN19 VCCUSB2PLL_1P0 VCCPGPPD +V3.3A_V1.8A_VCCPGPPD 2 1
VCCHDAPLL_1P0 3.3VA
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06 1u_6.3V_X5R_04 0.075A BA15
BD3 0.0811A PJ18 1mm DEFAULE Ղ
VCCPRIM_3P3 BE3
CLOSE TO PCH VCCHDA
W15 VCCPRIM_3P3 BE4
(3-5 mm) VCCDSW_3P3 VCCPRIM_3P3 3.3VA
C384 C378
VDD1.0 1u_6.3V_X5R_04 0.1u_10V_X7R_04
CLOSE TO PCH
C391 (3-5 mm) CLOSE TO PCH
1u_6.3V_X5R_04 (3-5 mm)
+VCCAAZPLL_1P0
B VDD1.0 L15 . HCB1608KF-121T30 B
3.3VA
VDD3
C356
0.1u_10V_X7R_04
40,64,66 VDD1.0
5,30,35,38,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS
35,38 VCC_RTC
5,35,36,37,38,39,43,63 3.3VA
A A
Title
[41] PCH 8/12-POWER
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 42 PCH 7/9
Schematic Diagrams
PCH 8/9
5 U52I 4 SPT-H_PCH
U52L
3 2 1
SPT-H_PCH
AC18 AR5
AN4 VSS VSS AR7 C42 AB11
AN10 VSS VSS U15 D10 VSS VSS AB7
BE14 VSS VSS AL4 D12 VSS VSS AB14
BE18 VSS VSS AE29 D15 VSS VSS AB31
BE32 VSS VSS AF18 D19 VSS VSS AB4
BE37 VSS VSS AF20 D21 VSS VSS AB5
BE40 VSS VSS AF21 D24 VSS VSS AC1
BE9 VSS VSS AF23 D25 VSS VSS AC20
VSS VSS VSS VSS
D C10
C2 VSS VSS
AF25
AF26
D27
D29 VSS VSS
AC21
AC25
D
C28 VSS VSS AF28 D30 VSS VSS AC29
C37 VSS VSS AF29 D31 VSS VSS AC45
J7 VSS VSS AG11 D33 VSS VSS AB8
K10 VSS VSS AG13 D35 VSS VSS AD11
K27 VSS VSS AG31 D36 VSS VSS AD14
K33 VSS VSS AG32 E13 VSS VSS AB15
K36 VSS VSS AG33 E15 VSS VSS AD32
K43 VSS VSS AH1 F44 VSS VSS AD4
L12 VSS VSS AH17 F8 VSS VSS AD8
L13 VSS VSS AH18 G42 VSS VSS AE18
L15 VSS VSS AH20 G9 VSS VSS AE20
L4 VSS VSS AH21 H17 VSS VSS AE21
M35 VSS VSS AH26 H24 VSS VSS AL10
M42 VSS VSS AH28 H27 VSS VSS AL11
N10
N15
N19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AH29
AH45
AJ10
H29
H3
H35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL13
AL17
AL19
Sheet 42 of 91
N22 AJ14 J10 AL24
N24
N35
N36
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ15
AJ17
AJ18
J11
J3
J39
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL29
AL32
AL33
PCH 8/9
N4 AJ26 J5 AL38
N41 VSS VSS AJ28 T42 VSS VSS AM15
VSS VSS VSS VSS
C N5
P17 VSS VSS
AJ29
AJ31
U10
U11 VSS VSS
AM17
AM19 C
P19 VSS VSS AJ32 U14 VSS VSS AM22
P22 VSS VSS AJ36 U17 VSS VSS AM24
P45 VSS VSS AK4 U18 VSS VSS AM27
R10 VSS VSS AK42 U28 VSS VSS AM29
R14 VSS VSS AU7 U29 VSS VSS AM45
R22 VSS VSS AV17 U31 VSS VSS AN11
T1 VSS VSS AV6 U8 VSS VSS AN7
T2 VSS VSS AW13 V18 VSS VSS AN8
T4 VSS VSS AW19 V20 VSS VSS AP11
Y18 VSS VSS AW29 V21 VSS VSS AP4
Y20 VSS VSS AW37 V23 VSS VSS AR33
Y21 VSS VSS AW9 V25 VSS VSS AR34
Y26 VSS VSS AY38 V29 VSS VSS AR42
Y28 VSS VSS AY45 V3 VSS VSS AR9
Y29 VSS VSS B25 V45 VSS VSS AT10
A18 VSS VSS B3 W14 VSS VSS AT15
A37 VSS VSS B6 W33 VSS VSS AU1
AA17 VSS VSS BA1 W38 VSS VSS AU35
AA18 VSS VSS BB11 W4 VSS VSS AU36
AA20 VSS VSS BB16 W8 VSS VSS AU39
AA21 VSS VSS BB21 Y17 VSS VSS AU45
AA25 VSS VSS BB25 VSS VSS C4
B AA29 VSS
VSS
VSS
VSS
BB30 VSS B
AA4 BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43 12 OF 12
VSS VSS
9 OF 12 QJHT REV = 1.3
QJHT REV = 1.3
A A
Title
[42] PCH 9_12/12-VSS
A3 P650RS 6-71-P65S0-D02C D02C
5 4 3 2 1
PCH 8/9 B - 43
Schematic Diagrams
PCH 9/9
NO REBOOT STARP 5 4 3 2 1
ENABLE: HIGH U52J SPT-H_PCH
(INTERNAL WEAK PD)
3.3VS
BD2 AR22 RSVD22

BD45 VSS RSVD W13
R562 VSS RSVD
BD44 U13
BE44 VSS RSVD
*4.7K_04 VSS P31
D45 RSVD
LPSS_GSPI0_MOSI VSS N31
A42 RSVD
B45 VSS P27
B44 VSS RSVD R27
P65x: 00 P67x: 10
A4 VSS RSVD N29 ID2 ID1 ID2 ID1
D A3 VSS
VSS
RSVD
RSVD
P29 D
B2 AN29 R239 R628 R239 R628
A2 VSS RSVD R24 H H
B1 VSS RSVD P24
NC NC 10K_04 NC
BB1 VSS RSVD
VSS AT3 PCH_XDP_PREQ#_R R481 *0_04
BOOT STARP BC1 PREQ# AT4 PCH_XDP_PRDY#_R R482 *0_04
H_PREQ# 5
L R251 R613 L R251 R613
A44 VSS H_PRDY# 5
ENABLE:LPC IS SELECT VSS
PRDY# AY5 H_TRST#_R R158 *0_04 10K_04 10K_04 NC 10K_04
(INTERNAL WEAK PD) CPU_TRST# H_TRST# 5
C1 AL2 PCH_2_CPU_TRIGGER_R R486 30.1_1%_04
3.3VA RSVD PCH_TRIGOUT PCH_2_CPU_TRIGGER 7
D1 AK1 CPU_2_PCH_TRIGGER 7
RSVD PCH_TRIGIN
BOARD_ID[2:1]
BIOS setting P650Rx:00
R218
QJHT 10 OF 12 REV = 1.3
GSYNC_DET GSYNC_ID P670Rx:10
*4.7K_04 3.3VS 3.3VS

EDP H H
LPSS_GSPI1_MOSI
GSYNC L H
P670Rx R239
R628
10K_04
U52K SPT-H_PCH NVSR-GSYNC L L
EDP: H
ᏁՂٙ P67 *10K_04
LPSS_GSPI1_MOSI AT29 GSYNC: L
Sheet 43 of 91 44 SMI# D21 C A
RB751V-40(lision)
SMI#_RR
AR29
AV29
BC27
GPP_B22/GSPI1_MOSI
GPP_B21/GSPI1_MISO
GPP_B20/GSPI1_CLK
GPP_D9
GPP_D10
GPP_D11
AL44
AL36
AL35
AJ39
BOARD_ID1
BOARD_ID2
GSYNC_DET 3.3VS
GPP_B19/GSPI1_CS#
PCH 9/9 SMI# ‫ط‬GPP_G19ฝ۟ GPP_B20 , BIOS૞‫ޣ‬ LPSS_GSPI0_MOSI GPP_D12 TPM_DET 58

BD28 P650Rx R251 R613
BD27 GPP_B18/GSPI0_MOSI AJ43 BOARD_ID3 3.3VS 10K_04
GPP_B16 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# BOARD_ID4 ᏁՂٙ 10K_04
C GPP_B15
AW27
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
AL43
AK44
NVSR-DD : H
NVSR-GSYNC: L
R252
100K_04
P65
C
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL AK45 NONGSYNC
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA R616
AV44
BA41 GPP_C9/UART0_TXD 100K_04
AU44 GPP_C8/UART0_RXD D02
AV43 GPP_C11/UART0_CTS# 3/22 del Q21 3.3VS 3.3VS
GPP_C10/UART0_RTS# GSYNC_ID 13
AU41 BC38 R240
AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38 R629 100K_04
AT43 GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA GSYNC
GPP_C13/UART1_TXD/ISH_UART1_TXD *100K_04 R615 R617
AU43 BD38
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BE39 R629 reverse *10K_04 *10K_04
UART2_CTS# AN43 GPP_H21/ISH_I2C1_SDA
UART2_RTS# AN44 GPP_C23/UART2_CTS# BOARD_ID3
DEBUG GPP_C22/UART2_RTS# 2/1 NV recommend add GSYNC_ID
TX -> D+ R236 *0_06 UART2_TXD AR39 3.3VS BOARD_ID4
UART2_RXD AR45 GPP_C21/UART2_TXD BC22 DGPU_PW M_SELECT#
RX -> D- GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 SMI#_RR R210 10K_04
AR41 GPP_A22/ISH_GP4 BE21 R614 R633
60 PCH_SCL_ESS GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 D02A
AR44 BD22
60 PCH_SDA_ESS GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 4/8 follow common del *10K_04
AR38 BD21 VDD3 *10K_04
AT42 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BB22 SB_BLON
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 SB_BLON 13
BC19 SB_BLON
AM44 GPP_A17/ISH_GP7 R546 *10K_04
AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
QJHT 11 OF 12 REV = 1.3
B B
EC DELAY ALL_SYS_PWRGD 200ms VDD3

VDD3 =PM_PWROK
VDD3
44 PM_PW ROK
U25B U25D
14
14
74LVC08APW U25C 74LVC08APW
14
4 74LVC08APW 12
73 VCORE_PG DELAY_PW RGD
R269 *0_04 6 9 11 SYS_PW ROK_R R275 1K_04
SYS_PW ROK 38
VDD3 5 8 13
75 VCCGT_PG ALL_SYS_PW RGD 10
7
R270
7
10K_04
U25A
14
74LVC08APW
1
64 VCCIO_PW RGD ALL_SYS_PW RGD
3 PM_PCH_PW ROK 38
ALL_SYS_PW RGD 5,13,44,73,75
2
13,38,44,45,46,51,53,63,64 SUSB#
TO VR_ON & EC
7
A R266 C503 A
10K_04 *0.1u_10V_X7R_04
ON
Title
5,35,36,37,38,39,41,63 3.3VA
[43] PCH 10_11/12-UART/I2C/GPIO
5,30,35,38,41,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,44,45,47,48,50,51,54,58,59,60,63,67,73,75
VDD3
3.3VS
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 44 PCH 9/9
Schematic Diagrams
KBC IT8587
5 4 3 2 1
VDD3
IT8587(Follow IT8991 PIN Define) KBC_AVDD L44

P670RS_RP J_KB2
85208-24051
P67
MODEL_ID RA R293 10K_04
VGA Chipset
N17E-G1
RB (PL)
R294
10K
RA (PH)
R293
X
N17EG2
HCB1005KF-121T20
. KB-SI0 4 N17E-G2 10K 10K
VDD3 VDD3 RB R294
KB-SI1 5 10K_04
C956 C625 C976 C963 C962 KB-SI2 6 N17E-G3 x 10K
KB-SI3 8
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 KB-SI4 11
KB-SI5 12
KB-SI6 14
C1016 KB-SI7 15
D KBC_AGND D
L47 HCB1005KF-121T20 0.1u_16V_Y5V_04 KB-SO0 1
. KB-SO1 2
3.3VS P650RS D03A
KB-SO2 3
EMI Solution 1 J_KB1 24 J_KB1 KB-SO3 7 R292 *100K_04 OPTION (‫᧢אױ‬೯ࠉEC༼ࠎऱEXECL।)
59 KBLIGHT_ADJ
114
121
127
85208-24051 KB-SO4 9 ‫ڇآ‬EXECL।խऱ‫פ‬౨‫ټࡎ۩۞אױ‬
11
26
50
92
74
3
U62A P65 KB-SO5 10
KB-SO6 13 U62B AUTO_LOAD_MODE
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC
AVCC
VBAT
10 58 KB-SI0 4 KB-SO7 16 DSx
39,58 LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 KB-SI1 5 KB-SO8 17 76 100 R664 10K_04 VDD3
39,58 LPC_AD1 GPM1/LAD1 KSI1/AFD# 38 SUS_PW R_ACK#_EC GPJ0/TACH2 5VT/SSCE0#/GPG2
8 60 KB-SI2 6 KB-SO9 18 80
39,58 LPC_AD2 GPM2/LAD2 KSI2/INIT# 59 VGA_FAN2 GPJ4/DAC4/DCD0#
7 61 KB-SI3 8 KB-SO10 19 81 2/1 ଥ‫إ‬
39,58 LPC_AD3 GPM3/LAD3 KSI3/SLIN# 59 VGA_FAN1 GPJ5/DAC5/RIG0#
13 62 KB-SI4 11 KB-SO11 20
39 PCLK_KBC GPM4/LPCCLK KSI4
6 LPC 63 KB-SI5 12 KB-SO12 21 78 56
39,58 LPC_FRAME# GPM5/LFRAME# KSI5 GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3 KB-SO16 45
5 64 KB-SI6 14 KB-SO13 22 57
39,58 SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5 KB-SO17 45
22 65 KB-SI7 15 KB-SO14 23 68
39,47,48,53,58,60 BUF_PLT_RST# GPD2/LPCRST#/5VT KSI7 38 ME_W E GPI2/ADC2
K/B MATRIX KB-SO15 24
R700 100K_04 KBC_W RESET# 14 36 KB-SO0 1 IT8587
VDD3 WRST# KSO0/PD0
C1018 0.1u_16V_Y5V_04 37 KB-SO1 2 VBATT_BOOST# 71 93
KSO1/PD1 30 VBATT_BOOST# GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 SUSB# 13,38,43,45,46,51,53,63,64
126 38 KB-SO2 3 72
60
HP_DET GPB5/GA20 KSO2/PD2 59 VGASEN_SEL GPI6/ADC6/DSR1#
3/21 ADD ESS board ۘᖲ‫ܑܒ‬pin 4 39 KB-SO3 7 94
D02 65 AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 SUSC# 38,61,64,66
16 40 KB-SO4 9
60 LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4
20 41 KB-SO5 10
38 AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5
43 SMI#
23
15 GPD3/ECSCI#/5VT
KSO6/PD6
KSO7/PD7
KSO8/ACK#
42
43
44
45
KB-SO6
KB-SO7
KB-SO8
KB-SO9
13
16
17
18
30,45,56,60 SMC_VGA_THERM
30,45,56,60 SMD_VGA_THERM
115
116
118
GPC1/SMCLK1/5VT
GPC2/SMDAT1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
5VT/ID5/GPH5
96
97
98
99
EC_AUDIO_DET
W LAN_EN 47
3G_RST# 49
60
Sheet 44 of 91
37 SCI# GPD4/ECSMI# KSO9/BUSY 38 SMD_CPU_THERM GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6 W IGIG_PW R_EN 47
C
51 KBC_MUTE#
77
GPJ1
DAC KSO10/PE
KSO11/ERR#
KSO12/SLCT
46
51
52
53
KB-SO10
KB-SO11
KB-SO12
KB-SO13
19
20
21
22
60 EC_SSD_LED#
24
GPA0/PWM0/5VT
5VT/EGAD/GPE1
5VT/EGCS#/GPE2
82
83
84
KB-DET
R662 0_04
P670RG-M_TPLED 60
KB-DET 45
C
KBC IT8587
59 CPU_FAN
C957
CPU_FAN
0.1u_16V_Y5V_04
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
KB-SO14
KB-SO15
23
24
60 LED_SCROLL#
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48 D02A 6/8 Ղٙ
DGPU_PW R_EN 31,39,60,67
KSO15 60 LED_NUM# GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN 59

ADC 30 119
BAT_DET 60 LED_CAP# GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PW RGD 5,13,43,73,75
66
67 GPI0/ADC0 2
65 BAT_VOLT GPI1/ADC1 CK32KE/GPJ7 3G_PW R_EN 49
69 128
2 THERM_VOLT GPI3/ADC3 CK32K/GPJ6
70 125
65 TOTAL_CUR GPI4/ADC4 46,62,63 DD_ON GPE4/PWRSW
106
MODEL_ID 5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN 58
73 EC_SLP_SUS#_R
GPI7/ADC7/CTS1# IT8587E/FX
107 4/1 del ቃఎpull hiሽॴ
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 3G_EN 49 R703 0_04
SMBUS EC_SLP_SUS# 38,62,63,64
44,65 SMC_BAT
R672 47_04 SMC_BAT_EC 110
GPB3/SMCLK0/5VT D02 RSMRST# PCH & EC ‫׽‬ᏁPULL DOWNԫ
ԫᢰ,ᖗ
ᖗ1 R702 *10K_04
R676 47_04 SMD_BAT_EC 111 95 VDD3
44,65 SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN 13 ‫ޏ‬Ղٙ, (‫ڕ‬
DEFAULT‫ޏ‬ ‫ڶ޲ڕ‬Ղٙ, RTC౛
౛ሽመՕ) R701 10K_04
R689 *0_04 EC_PECI 117 R693 10K_04
38 SMC_CPU_THERM GPF6/SMCLK2/PECI EC_RSMRST#
R690 43_1%_04 35 VDD3
5 H_PECI 5VT/RTS1#/GPE5 17
5VT/LPCPD#/GPE6 SB_KBCRST# 39
C990 5p_50V_NPO_04
PWM 47 VBATT_BOOST# R660 *10K_04
sky lake‫ܫ‬व૞՛࣍10p 1/4/2016 TACH0A/GPD6 CPU_FANSEN 59
25
50 KBC_BEEP GPA1/PWM1/5VT
31 120
60 LED_BAT_CHG GPA5/PWM5/5VT TMRI0/GPC4 LOT6_CHG 65 3G_RST#
32 124 R663 10K_04
60 LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PW ROK 43
34
60 LED_PW R GPA7/PWM7/RIG1#/5VT DEBUG PORT SMC_BAT R671 1.5K_04
PS/2 123 SMD_BAT R675 1.5K_04
CTX0/TMA0/GPB2 LAN_W AKEUP# 35,47,60 J_80DEBUG1 BAT_DET
80CLK 85 R296 10K_1%_04
B 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT KB-DET R659 100K_04 B
GPF2/PS2CLK1/DTR0#/5VT 19 1 80CLK
5VT/L80HLAT/BAO/GPE0 SW I# 37 2
86 3IN1 BAT_VOLT
46,62,63 USB_CHARGE_EN GPF1/PS2DAT0/TMB1/5VT 3 C959 1u_6.3V_X5R_04
88 VDD3
47 BT_EN GPF3/PS2DAT1/RTS0#/5VT 4
112
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 PMOSFET_CONTROL# 65 D02
89 *85204-04001
58 TP_CLK GPF4/PS2CLK2/5VT
90 PCB Footprint = 85205-0400M
58 TP_DATA GPF5/PS2DAT2/5VT VDD3
3/18 ଥ‫شޏ‬ற
WAKE UP
18 C
63 PW R_SW # GPD0/RI1#
21 AC
13,59 LID_SW # GPD1/RI2#/5VT 44,65 SMC_BAT
D57 A
101 ALSPI_CE# R665 0_04 BAV99 RECTIFIER
5VT/FSCE#/GPG3 ALSPI_MSI R666 HSPI_CE# 35
GP INTERRUPT 102 0_04 C
5VT/FMOSI/GPG4 ALSPI_MSO R668 HSPI_MSI 35
33 103 0_04 AC
38 PW R_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 ALSPI_SCLK R667 HSPI_MSO 35 44,65 SMD_BAT
105 0_04 D58 A
5VT/FSCK/GPG7 HSPI_SCLK 35
UART BAV99 RECTIFIER
108 104 C
45 EC_CTRL_EN# GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 AIRPLAN_LED# 60
109 AC
5 H_PROCHOT_EC GPB1/TXD/SOUT0/5VT 65 BAT_DET
D35 A
VDD3 BAV99 RECTIFIER
VCORE
AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
VDD3 VDD3
R310
IT8587E/FX U66
12
1
27
49
91
113
122
75
5
47K_04 74AHC1G08GW
R311 1
A
4
D
RSMRST# 38 A
C1017 R661 47K_04 EC_RSMRST# 2
*20mil_short-p 2/26 follow common Q52
0.1u_16V_Y5V_04 G 2SK3018S3
31 NV_EN_DOW N
3
C
D36
KBC_AGND C A R313 90.9K_1%_04 B Q25
VIN
BTN3904
ZD5231BS2 C617 M-SOT23-CBE Title
[44] KBC 8587
E
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 D01A R317

VDD3 5,30,35,38,41,43,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 *0.1u_16V_Y5V_04
20K_1%_04 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
VIN 13,45,60,61,62,63,64,65,71,73,74,75,76 A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
KBC IT8587 B - 45
Schematic Diagrams
RGB KB Only
5 4 3 2 1
RGB KB Only Ղٙ
P650RSՂ
ஞൾPJ33 layoutᏁࣹრtraceᐈ৫
J_KBLED1
3.3VS KB_5VS 2A 1
3/31 R654 ‫ޏ‬լՂٙ,R655 ‫ޏ‬Ղٙ(ቃ߻ዥሽ)
2
D02 U61 C591 KBZONE1_R 3
R654 *0_06 KB_VDD 32 7 KBZONE1_B KBZONE1_G 4
KB_5VS VDD LED0 4.7u_25V_X5R_08 5
D 8 KBZONE1_R KBZONE1_B D
3.3VS R655 0_06 LED1 KBZONE1_G P65 KBZONE2_R 6 NC2
10
2 LED2 KBZONE2_G 7
C952 A0 KBZONE2_B KBZONE2_B 8 NC1
3 11
0.1u_10V_X5R_04 A1 LED3 KBZONE2_R KBZONE3_R 9
R652 4 12 J_KB1_1
*10K_04 5 A2 LED4 13 KBZONE2_G P65 KBZONE3_G 10
6 A3 LED5 KB-SO16 KBZONE3_B 11
A4 KBZONE3_B 44 KB-SO16 1 12
28 15 KB-SO17
A5 LED6 KBZONE3_R 44 KB-SO17 2 NC1
29 16 FP225H-012S10M
A6 LED7 17 KBZONE3_G KB-DET 3 NC2 P65
LED8 44 KB-DET 4 M:6-20-94K50-012
3/31 Q49/R650/R651 ‫ޏ‬լՂٙ (SMBUSၲᣂլՂٙ) R658 *0_04 27
44 EC_CTRL_EN# OE# S:6-20-94K60-012
30 18 FP215H-004S1BM
Ղ൷ᤛCONN Հ൷ᤛCONN
31 SCL LED9 20 PCB Footprint = 85201-0405R
SDA LED10 21 6-20-94A30-004
1 LED11
R653 9 VSS 22
R650 R651 VSS LED12
0_04 14 23
*10K_04 *10K_04 VSS LED13
19 25
Ղٙ
VSS LED14
24 26
P670RS/RPՂ
2
Q49A VSS LED16
*MTDK3S6R
G
SMC_VGA_THERM_R PCA9622
6 1
S
ஞൾPJ33 layoutᏁࣹრtraceᐈ৫
5
Q49B
Sheet 45 of 91 *MTDK3S6R
J_KBLED2
G
3 4 SMD_VGA_THERM_R KB_5VS 2A 1
30,44,56,60 SMD_VGA_THERM
S
2
3
RGB KB only C
R656
R657
0_04
0_04
C592
4.7u_25V_X5R_08
P67
KBZONE1_R
KBZONE1_G
KBZONE1_B
KBZONE2_R
4
5
6 NC2
C
KBZONE2_G 7
3/31 R656/R657 ‫ޏ‬Ղٙ (ऴ൷൷SMBUS) 8 NC1
J_KB2_2 KBZONE2_B
D02A KBZONE3_R 9
P67 KBZONE3_G 10
KB-SO16 KBZONE3_B 11
KEYBOARD BACKLIGHT POWER KB-SO17
KB-DET
1
2
3
4
NC1
NC2
12
FP225H-012S10M
P67
M:6-20-94K50-012
FP215H-004S1BM S:6-20-94K60-012
D02A 5/3 լՂٙ Ղ൷ᤛCONN PCB Footprint = 85201-0405R
6-20-94A30-004 Հ൷ᤛCONN
PR348
*180K_1%_04 VIN
PU18 *G5383A
25
23 VIN_PAD 3
TON VIN 17 PC300 PC310 PC309
VIN 18
VIN 2/17 modify
19
VIN *1u_25V_X5R_06 *4.7u_25V_X5R_08 *4.7u_25V_X5R_08
20 DEFAULT SHORT
VIN 21 PR360
VIN 5VS PJ54
*1.5_04
BST
22
PC284
1
2mm
2
KB_5VS/3A
B 3/1 04 change to 06 size G5383A_V5V 2 PL17 KB_5VS_R KB_5VS B
V5V *0.1u_10V_X5R_04 *TMPC0402HP-4R7MG-Z02 PJ50
C942
LX
8 1 2 3A 1 2
D01A 9
LX
PC295
PC315
PC304
PC287
10 *2mm
*4.7u_6.3V_X5R_06 LX
1 16
PJ44 *CV-40mil AGND LX PR343 *1K_04
26
1 2 LX_PAD
13,38,43,44,46,51,53,63,64 SUSB# PC275
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*0.1u_50V_Y5V_06
RGB_KB_GND *0.1u_25V_X7R_06
PJ43 *CV-40mil 6
PR323 *100K_041 2 5 PGND 11 PC276
VDD3 EN PGND
2/20 modify 12 *100p_50V_NPO_04
PGND 13
PC270 PGND 14
PGND 15
PGND PC282
D02 *0.1u_10V_X5R_04
3/31 ᓳᖞtiming *1000p_50V_X7R_04
G5383A_V5V PR324 *100K_04 4

PGOOD
KB_5VS_PG
PR334
24
FB
*47K_1%_04
7
NC
PR333
A PR325 *28mil_short-p *10K_1%_04 A
RGB_KB_GND
RGB_KB_GND ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
13,44,60,61,62,63,64,65,71,73,74,75,76 VIN [45] RGB KB Only
13,14,16,37,50,51,52,58,59,60,63,68,70,72 5VS
2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 3.3V Size Document Number Rev
5,30,35,38,41,43,44,47,59,60,62,63,64,65,66,67,68,69,70,71,72
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,47,48,50,51,54,58,59,60,63,67,73,75
VDD3
3.3VS
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 46 RGB KB Only
Schematic Diagrams
USB Charger
1 2 3 4 5
3.3V
USB3.0 re-driver
R327 *0_04
R326 *4.7K_04
R325 *4.7K_04
R324 2K_1%_04
A A
6
U31
25
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
R322 *4.7K_04 I2C_SDA_P1 24 GND 7 I2C_SCK_P1 R323 *4.7K_04
SMB_DATA SMB_SCK
TXN1 0.1u_10V_X7R_04 C634 23 8 C633 0.1u_10V_X7R_04 USB3_TXN1
TX1- RX1- USB3_TXN1 39 VDD5 VDD5
TXP1 0.1u_10V_X7R_04 C632 22 9 C631 0.1u_10V_X7R_04 USB3_TXP1
TX1+ RX+ USB3_TXP1 39
21 10 EMC3 EMC4
To Conn. TYPE_IND# CHIP_EN# From PCH
RXN1 0.1u_10V_X7R_04 C624 20 11 C621 0.1u_10V_X7R_04 USB3_RXN1 *100p_50V_NPO_04 *0.1u_16V_Y5V_04
Reserverd
RX2- TX2- USB3_RXN1 39
SW_B
EQ_B
USB3_RXP1
DE_B
RXP1 0.1u_10V_X7R_04 C619 19 12 C618 0.1u_10V_X7R_04
GND
VCC
RX2+ TX2+ USB3_RXP1 39
3.3V
18
17
16
15
14
13
ASM1464
PCB Footprint = QFN24-4X4MM
3.3V
Sheet 46 of 91
R304 *0_04 R301 *4.7K_04
B R305
R306
*4.7K_04
*4.7K_04
C639 C611 C638 B
USB Charger
R307 *0_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
USB3.0 PORT1 (MBؐ
ؐ)
VDD5 USBVCC_CH 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬

U63
5 1
VIN VOUT
C604 C977 D02 + C629
2 C979 C978
10u_6.3V_X5R_06 GND EEFCX0J221YR 22u_6.3V_X5R_08 22u_6.3V_X5R_08
0.1u_16V_Y5V_04
USB_DD_ON# 4 3
EN# OC# 220u,6.3V,ESR=15mȍ,H=1.9mm
uP7549UMA5-20
J_USB3_2
SLG55593VTR USB Charging PORT TXP1_J 9

1 SSTX+ SHIELD
GND1
GND3
Standard-A
TXN1_J 8 VBUS SHIELD
USB_PN1_J 2 SSTX-
4 D-
USB_PP1_J 3 GND
VDD5 D+
RXP1_J 6
C 7 SSRX+ GND4 C
W/ USB CHARGER 44,62,63 USB_CHARGE_EN

R686
100K_04
USB3.0 Max Trace length
RXN1_J 5 GND_D SHIELD
SSRX- SHIELD
GND2
C107KX-909H9-L
USB_DD_ON# Follow Design Guide PCB Footprint = C107KX-909H9-L
VDD5 R673 P/N = 6-21-B4A50-009
1M_04
D33
6
PRE#_R 2 G 10 1 D02
R669 S Q50A 9 2 3/15 USB3.0 connect ‫شޏ‬UBS3.1 connect‫ش‬ற (ME change)
1
10K_04 MTDK3S6R 8 3
C975 USB_PN1_A L28 4 3 USB_PN1_CON 7 4 USB_PN1_J
3
R280 *0_04 D USB_PP1_CON 6 5 USB_PP1_J

13,38,43,44,45,51,53,63,64 SUSB# USB_PP1_A
U28 Default Low5 0.1u_16V_Y5V_04 1 2
R279 0_04 8 1 PRE# G *W CM2012F2S-161T03-short
44,62,63 DD_ON CB PRE# S Q50B D02 DT1140-04LP-7
4
USB_PN1 7 2 USB_PN1_A MTDK3S6R

36 USB_PN1 TDM DM R298 3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD
USB_PP1 6 3 USB_PP1_A 100K_04
36 USB_PP1 TDP DP
GND
D60
VDD5 5 4
VCC CDP
C967 SLG55593VTR RXN1 10 1 RXN1_J
9
PCB Footprint = TDFN8-2X2MM RXP1 9 2 RXP1_J

0.1u_16V_Y5V_04 ‫ؾ‬ছࠌ‫ڼش‬றSLG55593VTR 8 3
TXN1 7 4 TXN1_J
:6-02-55593-9D0 TXP1_J
D TXP1 6 5 D
PRE# R685 *0_04 USB_DD_ON#

D02 DT1140-04LP-7
Title
VDD5 62,63,64
[46] USB CHARGER
5V 37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 Size Document Number Rev
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
3.3V 2,13,31,47,49,54,58,60,61,63,64,66,67,71 A3 6-71-P65S0-D02C D02C

1 2 3 4 5
USB Charger B - 47
Schematic Diagrams
M.2 WiGig/WLAN + BT
5 4 3 2 1
J_W LAN1
40 mil
75 74
GND14 3.3V3 4/29 follow common, change net W IGIG_3.3V
73 72
40 CLK_PCIE_W IGIG# Reserved/REFCLKN1 3.3V2
WLAN+BT/WIGIG 40 CLK_PCIE_W IGIG
36 PCIE_RXN8_W IGIG
CAP CLOSE TO M.2 CONN
71
69
67
65
Reserved/REFCLKP1
GND13
Reserved/PERn1
PEWake1#(IO)(0/3.3V)
CLKREQ1#(IO)(0/3.3V)
PERST1#(IO)(0/3.3V)
70
68
66
64
R590
R785
*0_04
*10K_04
LAN_W AKEUP# 35,44,47,60
W IGIG_CLKREQ# 40
D02A
C895
0.1u_16V_Y5V_04
36 PCIE_RXP8_W IGIG Reserved/PERp1 Reserved1 3.3V D02A
WiGig 63 62
C880 0.1u_10V_X7R_04 PETN1 61 GND12 ALERT#(O)(0/3.3V) 60 R571 10K_04
36 PCIE_TXN8_W IGIG Reserved/PETn1 I2C CLK(I)(0/3.3V) W IGIG_3.3V
Θ Wi-Fi: PCIe v2.1 Gen1 D02A 36 PCIE_TXP8_W IGIG
C878 0.1u_10V_X7R_04 PETP1 59
Reserved/PETp1 I2C DATA(IO)(0/3.3V)
58 R564 10K_04
Θ BT: USB 2.0 R565 *0_04
57
55 GND11 W_DISABLE#1(I)(0/3.3V)
56
54
R572 0_04
W LAN_EN 44
Θ WiGig IO: PCIe v2.1 Gen2 35,44,47,60 LAN_W AKEUP# W LAN_CLKREQ# 53 PEWake0#(IO) Reserved/W_DISABLE#2(I)(0/3.3V) 52
BT_EN 44
D 40 W LAN_CLKREQ# CLKREQ0#(IO) PERST0#(I)(0/3.3V) BUF_PLT_RST# 39,44,48,53,58,60 D
4/29 follow common, change net 3.3VS R202 10K_04 51 50
GND10 SUSCLK(32Khz)(I)(0/3.3V) SUS_CLK 38
D02A 49 48
40 CLK_PCIE_W LAN# REFCLKN0 COEX1(I/O)1.8V
47 46
40 CLK_PCIE_W LAN REFCLKP0 COEX2(I/O)1.8V
CAP CLOSE TO M.2 CONN 45 44
43 GND9 COEX3(I/O)1.8V 42
36 PCIE_RXN7_W LAN PERn0 VENDOR DEFINED2 T76 W IGIG_3.3V
41 40
36 PCIE_RXP7_W LAN PERp0 VENDOR DEFINED1 T71 D02A
39 38
WLAN GND8 VENDOR DEFINED0 T72
C857 0.1u_10V_X7R_04 PETN0 37 36
36 PCIE_TXN7_W LAN PETn0 GND6
C852 0.1u_10V_X7R_04 PETP0 35 34
36 PCIE_TXP7_W LAN PETp0 DP_ML0p
33 32 C1123 C1122
31 GND7 DP_ML0n 30
DP_HPD(IO)(0/3.3V) GND6
D02A 29 28 ႃխྒྷរ BOT
27 GND5 DP_ML1p 26
5/23 follow ٥‫ش‬ᒵሁΔ‫ܔ‬ೈPJ40
22u_6.3V_X5R_08
22u_6.3V_X5R_08
VDD3 25 DP_ML2p DP_ML1n 24 W LAN_EN
W IGIG_3.3V R712 *10K_04 W LAN_CLKREQ# DP_ML2n GND4
W IGIG_3.3V 23 22
U50 BT_EN
>120 mil >120 mil 21 GND3 DP_AUXp 20
5 1 DP_ML3p DP_AUXn W IGIG_PW R_EN
VIN VOUT 19 18
D01A 3/3 RF૞‫ޣ‬ቃఎ 17 DP_ML3n GND2 16
4 DP_MLDIR GND (In)/3.3V (Out)/NC LED#2(I)(OD) W IGIG_3.3V
C797 VIN/SS C795
3 2
1u_6.3V_X5R_04 EN GND 0.1u_16V_Y5V_04 A KEY
UP7553
7 6
GND1 LED#1(O)(OD)
Sheet 47 of 91 44 W IGIG_PW R_EN

M: NCT3522U -- 6-02-03522-9C0
S: G5243A ---- 6-02-05243-9C0
AP2821KTR-G1 6-02-02821-9C0
36
36
USB_PN8
USB_PP8
5
3
1
USB_D-
USB_D+
GND0
3.3V1
3.3V0
4
2
C798
40 mil
W IGIG_3.3V
close the M2 connect
4/29 follow common design
൷ࠩEC ,ႊፖECᒔᎁ
M.2 WiGig/WLAN + C
NFSA0-S6701-TP40
P/N = 6-21-84K20-075
PCB Footprint = NXSA0-S67XX-XX40
22u_6.3V_X5R_08 C
BT ᓮᒔᎁᖲዌࠌ‫ش‬ऱConnector
PCB Footprintᓮ
USB3.0 re-driver USB3.0 PORT5 ؐ)

(MBؐ
USBVCC3.0_6
3.3V
C1089
C1090
*4.7K_04
*4.7K_04
C1088
C1091
*0_04
2K_1%_04
D02 5V
C524
10u_6.3V_X5R_06
5
VIN VOUT
GND
U60
1
2
100 MIL
C535
0.1u_16V_Y5V_04
3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
+ C953
EEFCX0J221YR
220u,6.3V,ESR=15mȍ,H=1.9mm
4 3
GND EN# OC#
uP7549UMA5-20
D02
GND
2A/90mohm
GND GND
1
6
U69 R642 *0402_short
60,61,63 DD_ON#
25
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
C1094 *4.7K_04 SDA_P4 24 GND 7 SCK_P4 C1098 *4.7K_04
GND SMB_DATA SMB_SCK GND
B TXN5 0.1u_10V_X7R_04 C1095 23 8 C1099 0.1u_10V_X7R_04 C947 22u_6.3V_X5R_08 B
TX1- RX1- USB3_TXN5 39
TXP5 0.1u_10V_X7R_04 C1097 22 9 C1100 0.1u_10V_X7R_04 USBVCC3.0_6 C526 22u_6.3V_X5R_08 GND
TX1+ RX+ USB3_TXP5 39
21 10
To Conn. TYPE_IND# CHIP_EN# GND From PCH J_USB3_1
RXN5 0.1u_10V_X7R_04 C1102 20 11 C1103 0.1u_10V_X7R_04
CLOSE TO CONNECTOR
Reserverd
RX2- TX2- USB3_RXN5 39 TXP5_J 9 GND1
Standard-A
SSTX+ SHIELD
SW_B
‫࠷ڂ‬௣co-lay, ‫࠷ޡٵ‬௣ሽ୲
EQ_B
DE_B
RXP5 0.1u_10V_X7R_04 C1105 19 12 C1106 0.1u_10V_X7R_04 1

GND
VCC
RX2+ TX2+ USB3_RXP5 39 TXN5_J VBUS

8
USB_PN5_J 2 SSTX-
3.3V 4 D-
18
17
16
15
14
13
ASM1464 3.3V USB_PP5_J 3 GND

PCB Footprint = QFN24-4X4MM RXP5_J 6 D+
7 SSRX+
RXN5_J 5 GND_D GND2
C1108 C1109 C1110 SSRX- SHIELD
C1111 *0_04 C1112 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 USB3.0 Max Trace length C107KX-909H9-L GND
C1107 *4.7K_04 Follow Design Guide P/N = 6-21-B4A50-009
C1113 *4.7K_04 GND PCB Footprint = C107KX-909H9-L
C1114 *0_04 3/15 USB3.0 connect ‫شޏ‬UBS3.1 connect‫ش‬ற (ME change)
3/22 lay swap D73 3/22 lay swap
3/22 lay swap GND
GND USB_PP5_CON 10 USB_PP5_J
4 3 1
36 USB_PP5 USB_PN5_CON 9 USB_PN5_J
L50 2
1 2 8 3
࠷௣co-lay, ‫ྤڂ‬layout़
़ၴ 36 USB_PN5
*W CM2012F2S-161T03-short
GND
7 4
GND 37,50,55,59,60,61,63,66,67,69,71,73,74,75,76
2,13,31,46,49,54,58,60,61,63,64,66,67,71
5V
3.3V
A 6 5 A
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,48,50,51,54,58,59,60,63,67,73,75 3.3VS
5,30,35,38,41,43,44,45,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
D02 DT1140-04LP-7
D74
TXP5 10 1 TXP5_J
TXN5 9 2 TXN5_J
Title
RXP5
GND 8
7
3
4
GND
RXP5_J [47] M.2 WIGIG/WLAN +BT
RXN5 6 5 RXN5_J
D02 DT1140-04LP-7
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 48
Schematic Diagrams
M.2 PCIE4X SSD

5 4 3 2 1
3.3VS
>120 mil
NGFF_M (M2) SSD_1 (PCIE 4X) 37 SATAGP0 R687
J_SSD1
C1029 C1034
3.3VS
C1038
75
D
SATAGP0 10K_04 73 GND13 74 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
L: PCIe 71 GND12 3.3V8 72
H: SATA G PCIE_SATA_0 69 GND11 3.3V7 70
Q51 67 PEDET(NC-PCIe/GND-SATA) 3.3V6 68 GND GND
S
2SK3018S3 NC18 SUSCLK(32Khz)(O) GND
M KEY
D 57 58 D
55 GND10 NC17 56
40 CLK_PCIE_SSD REFCLKP NC16
53 54
40 CLK_PCIE_SSD# REFCLKN PEWake#(IO)
51 52
PCIE_TXP9_SATA0A_TXP_SSD_R GND9 CLKREQ#(IO) SSD_CLKREQ# 40
C988 0.22u_10V_X5R_04 49 50
37 PCIE_TXP9_SATA0A_TXP_SSD PCIE_TXN9_SATA0A_TXN_SSD_R PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 39,44,47,48,53,58,60
C987 0.22u_10V_X5R_04 47 48
37 PCIE_TXN9_SATA0A_TXN_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
37 PCIE_RXN9_SATA0A_RXN_SSD PERp0/SATA-B- NC13
41 42
37 PCIE_RXP9_SATA0A_RXP_SSD PERn0/SATA-B+ NC12
39 40
C986 0.22u_10V_X5R_04 PCIE_TXP10_SSD_R 37 GND7 NC11 38
37 PCIE_TXP10_SSD PCIE_TXN10_SSD_R PETp1 DEVSLP(O)
C985 0.22u_10V_X5R_04 35 36
37 PCIE_TXN10_SSD PETn1 NC10
33 34
31 GND6 NC9 32
37 PCIE_RXP10_SSD PERp1 NC8
29 30 >120 mil
37 PCIE_RXN10_SSD PERn1 NC7
27 28 3.3VS
C984 0.22u_10V_X5R_04 PCIE_TXP11_SSD_R 25 GND5 NC6 26
37 PCIE_TXP11_SSD PCIE_TXN11_SSD_R PETp2 NC5
C983 0.22u_10V_X5R_04 23 24 C1033 C1032 C1036
37 PCIE_TXN11_SSD PETn2 NC4
21 22
19 GND4 NC3 20 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
37 PCIE_RXP11_SSD PERp2 NC2
17 18
37 PCIE_RXN11_SSD PERn2 3.3V5
15 16
C982 0.22u_10V_X5R_04 PCIE_TXP12_SSD_R 13 GND3 3.3V4 14 GND GND GND
37 PCIE_TXP12_SSD PETp3 3.3V3
37 PCIE_TXN12_SSD
37 PCIE_RXP12_SSD
C981 0.22u_10V_X5R_04 PCIE_TXN12_SSD_R 11
9
7
PETn3
GND2
PERp3
3.3V2
DAS/DSS#(I)(OD)
NC1
12
10
8
M2M_SSD_LED#R Sheet 48 of 91
5 6 80 mils
M.2 PCIE4X SSD
37 PCIE_RXN12_SSD PERn3 NC0
3 4 3.3VS
close to J_SSD2 conn 1 GND1 3.3V1 2
C GND0 3.3V0 C
C1031
NFSM0-S6701-TP64 0.1u_10V_X7R_04
P/N = 6-21-84KE0-075
GND PCB Footprint = NXSM0-S67XX-XX40
ᓮᒔᎁᖲዌࠌ‫ش‬ऱConnector
PCB Footprintᓮ
GND
NGFF_M (M2) SSD_2 (PCIE 4X) 3.3VS
J_SSD2
>120 mil
3.3VS
R321 C1050 C647 C646
37 SATAGP_SSD2
75
(OPTION BOM for CM236 PCH MUST BE STUFF)
D
10K_04 73 GND13 74 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
71 GND12 3.3V8 72
SATAGP4 GND11 3.3V7
G PCIE_SATA_SSD2 69 70
H: SATA PEDET(NC-PCIe/GND-SATA) 3.3V6
Q24 67 68 GND GND
L: PCIE
S
2SK3018S3 NC18 SUSCLK(32Khz)(O) GND
M KEY
PCH= HM170,cap Stuff
Default 57 58
55 GND10 NC17 56
40 CLK_PCIE_SSD2 close to J_SSD2 conn REFCLKP NC16
53 54
40 CLK_PCIE_SSD2# REFCLKN PEWake#(IO)
51 52
B PCIE_TXP17/SATA1B_SW GND9 CLKREQ#(IO) SSD2_CLKREQ# 40 B
C1020 0.01u_16V_X7R_04 49 50
37 PCIE_TXP17_SATA4_TXP_SSD2 PCIE_TXN17/SATA1B_SW PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# 39,44,47,48,53,58,60
C1019 0.01u_16V_X7R_04 47 48
37 PCIE_TXN17_SATA4_TXN_SSD2 PETn0/SATA-A- NC15
45 46
C1021 0.01u_16V_X7R_04 PCIE_RXN17/SATA1B_SW 43 GND8 NC14 44
37 PCIE_RXN17_SATA4_RXN_SSD2 PCIE_RXP17/SATA1B_SW PERp0/SATA-B- NC13
C1025 0.01u_16V_X7R_04 41 42
37 PCIE_RXP17_SATA4_RXP_SSD2 PERn0/SATA-B+ NC12
39 40
C1030 *0.22u_10V_X5R_04 PCIE_TXP18_SSD2_R 37 GND7 NC11 38
37 PCIE_TXP18_SSD2 PCIE_TXN18_SSD2_R PETp1 DEVSLP(O)
C1035 *0.22u_10V_X5R_04 35 36
37 PCIE_TXN18_SSD2 PETn1 NC10
33 34
31 GND6 NC9 32
37 PCIE_RXP18_SSD2 PERp1 NC8
29 30 >120 mil
37 PCIE_RXN18_SSD2 PERn1 NC7
27 28 3.3VS
C1043 *0.22u_10V_X5R_04 PCIE_TXP19_SSD2_R 25 GND5 NC6 26
37 PCIE_TXP19_SSD2 PCIE_TXN19_SSD2_R PETp2 NC5
C1046 *0.22u_10V_X5R_04 23 24 C630 C1049 C636
37 PCIE_TXN19_SSD2 PETn2 NC4
21 22
19 GND4 NC3 20 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
17 18
37 PCIE_RXN19_SSD2 PERn2 3.3V5
15 16
C1047 *0.22u_10V_X5R_04 PCIE_TXP20_SSD2_R 13 GND3 3.3V4 14 GND GND GND
37 PCIE_TXP20_SSD2 PCIE_TXN20_SSD2_R PETp3 3.3V3
C1048 *0.22u_10V_X5R_04 11 12
37 PCIE_TXN20_SSD2 PETn3 3.3V2 M2M_SSD_LED#R2
9 10
7 GND2 DAS/DSS#(I)(OD) 8
5 6 80 mils
37 PCIE_RXN20_SSD2 PERn3 NC0
3 4 3.3VS
PCH= CM236,cap Stuff 1 GND1 3.3V1 2
C1020,C1019 ‫ޏ‬Ղ 0.22u_10V_X5R_04 GND0 3.3V0
C1021,C1025 ‫ޏ‬Ղ0ᑛ ᑛࡥ C622
close to J_SSD2 conn NFSM0-S6701-TP64 0.1u_10V_X7R_04
A P/N = 6-21-84KE0-075 A
GND PCB Footprint = NXSM0-S67XX-XX40
PCB Footprintᓮ
GND
SKL DG P.397 recommend AC caps close to M.2 conn
Title
[48] M.2 PCIE4X SSD_1/SSD_2
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS Size Document Number Rev
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
M.2 PCIE4X SSD B - 49

Schematic Diagrams
M.2 3G/LTE
5 4 3 2 1
3G /LTE CARD USB3.0

լՂٙ
Only P670RS 3Gլ 3G_3.3V
CURRENT2Aழ,DON'T DROP BELOW 3.135V
80 mils
D02A GJ_3G1 3G GC14 220u_6.3V_6.3*6.3*4.2
3G
+
75 74 GC12 0.1u_16V_Y5V_04 GND
73 CONFIG_2 3.3V4 72 3G
4/8 follow common del 71 GND10 3.3V3 70 GC13 0.1u_16V_Y5V_04
69 GND9 3.3V2 68 3G
D D
GR1 *0_04 67 CONFIG_1 SUSCLK(32Khz)(O) 66
44 3G_RST# Reset#(O)1.8V SIM Detect(O) SIM_DET 60
3G 65 64 M.2 3G/4G-LTE module SIM Detect
CHECK BIOS 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62 GC6
GC4 ANTCTL2(I)1.8V COEX2(I/O)1.8V Pin 66Δփຝ੡1.8V with
& EC, 1.8V LEVEL 61 60 Pull-upሽॴ
*33p_50V_NPO_04 ANTCTL1(I)1.8V COEX3(I/O)1.8V
CLOSED 59 58 470p_50V_X7R_04
3G ANTCTL0(I)1.8V NC1
CONNECTOR 57 56 3G
55 GND8 NC0 54
GND 53 REFCLKP PEWake#(IO) 52 GND
51 REFCLKN CLKREQ#(IO) 50
49 GND7 PERST#(O) 48 GR5 *10K_04
PETp0/SATA-A+ GPIO_4(IO)1.8V 3.3V
47 46 3G
45 PETn0/SATA-A- GPIO_3(IO)1.8V 44 4/8 RF৬ᤜቃఎ
DEL 43 GND6 GPIO_2(IO)1.8V 42
41 PERp0/SATA-B- GPIO_1(IO)1.8V 40
Close to J_3G1 PERn0/SATA-B+ GPIO_0(IO)1.8V
39 38
GC8 0.1u_10V_X7R_04 1 GL1 3G 2 USB3_TXP2_R 37 GND5 DEVSLP(O) 36 UIM_PW R
39 USB3_TXP2 USB3_TXN2_R PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) UIM_DATA UIM_PW R 60
3G 35 34
PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) UIM_CLK UIM_DATA 60
GC7 0.1u_10V_X7R_04 4 3 33 32 GC11
39 USB3_TXN2 USB3_RXP2_R GND4 UIM_CLK(I) UIM_RST UIM_CLK 60
3G *W CM2012F2S-SHORT 31 30
USB3_RXN2_R PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) UIM_RST 60
4G LTE 29 28 0.1u_16V_Y5V_04
1 GL2 3G 2 27 PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V 26 GPS_DISABLE# GR6 0_04 3G
39 USB3_RXP2 BODYSAR_N GND3 GPIO_10(IO)1.8V
25 24
3G_W AKE# GPIO_12(IO)1.8V GPIO_7(IO)1.8V 3G
4 3 23 22 GND
39 USB3_RXN2 GPIO_11(IO)1.8V GPIO_6(IO)1.8V
Sheet 49 of 91 *W CM2012F2S-SHORT
BODYSAR‫ࣨؓ࣍ش׽‬
4/8 follow common del
D02A
21
CONFIG_0 GPIO_5(IO)1.8V
20 GND
HUAWEI MU736 ‫ױ‬൷࠹3.3V

3G_WAKE#ቃఎլՂ,‫ڂ܀‬੡EC޲Pinࢬ‫ޏא‬੡լ൷ B KEY
M.2 3G/LTE C
36 USB_PN6
1 GL3 3G 2
11
9 GND2
USB_D-
GPIO_9/DAS/DSS#(I)(OD)
W_DISABLE#1(O)
10
8
M2B_3GSSD_LED#R
PW R_ON_OFF 3G_EN 44
C
7 6 GR9 10K_04
4 3 5 USB_D+ Full_Card_Power_Off#(O)1.8V 4 3G
36 USB_PP6 GND1 3.3V1 80 mils
*W CM2012F2S-SHORT 3 2
GND0 3.3V0 3G_3.3V
1
4/8 follow common del CONFIG_3
+ GC1 GC3 GC5
D02A NFSB0-S6701-TP64 EEFCX0J221YR 10u_6.3V_X5R_06
0.1u_16V_Y5V_04
P/N = 6-21-84KD0-075 3G 3G
3G
GND PCB Footprint = NXSB0-S67XX-XX40 220u,6.3V,ESR=15mȍ,H=1.9mm
PCB Footprintᓮ
GND GND
D02
ႃխྒྷរ BOT
3G_EN
GPS_DISABLE#
3G_PW R_EN
3G_3.3V
Windows 8 3G_POWEREN
B
3G POWER Always hi.
3G_3.3V
B
>120 mil >120 mil Default լՂٙ

4 3 3G_PW R_EN
3.3V S2 D2
GQ1A
G2
MTS3572G6 GC2
GC9 0.1u_16V_Y5V_04 3G
5
0.1u_16V_Y5V_04
3G
3G GR7
GC10
*100_06
GR3 GR2 3G
1u_6.3V_X5R_04
100K_04 10_06
3G PW R_ON_OFF
3G 3G
GR4 330K_04
D
6
3G
GR8
D1
*12K_06
G GQ2
3G_PW R_EN 3G
1 GQ1B 2SK3018S3
44 3G_PW R_EN
S
G1 MTS3572G6 3G
S1
3G
2
GND
A A
13,14,16,37,45,50,51,52,58,59,60,63,68,70,72
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
5VS
3.3VS ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 5V Title
2,13,31,46,47,54,58,60,61,63,64,66,67,71 3.3V [49] M.2 3G / LTE
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 50 M.2 3G/LTE
Schematic Diagrams
Realtek ALC898
5 4 3 2 1
C1026 0.1u_16V_Y5V_04
Layout Note: C596 0.1u_16V_Y5V_04
U43 pin 1 ~ pin 11 and pin 47 and pin 48 BOM Note: C565 0.1u_16V_Y5V_04
are Digital signals. C555 0.1u_16V_Y5V_04
The others are Analog signals. 1. P650RS,P670RS= ALC898+ESS
898: Ղٙ C590 0.1u_16V_Y5V_04
2. P670RP=ALC982+3D_AMP 892: լՂٙ
reltek check 898: Ղٙ C1124 *0.1u_16V_Y5V_04
892: լՂٙ
3.3VS_AUD realtek check C1126 *0.1u_16V_Y5V_04
3.3VS 5VS_AUD
40mil 40mil C1125 *HCB1005KF-121T20
Layout Note: L48 HCB1005KF-121T20 L46 *HCB1005KF-121T20
5VS FCM1005KF-601T03
D (1)MIC1-L (U13.21) (2)MIC1-R (U13.22) R286 0_04 D
(3)LINE-L (U13.23) (4)LINE-R (U13.24) C1037 C1023 C1028 C1022 C1027 C997 C1011 C1000
C1005 ALC898: 0ohm, ALC892: 600ȍ,
ࡌ໮‫ؘ‬ႊ‫ ៿ץ‬AUDG, ‫׊‬ᕣၦᝩ‫܍‬ሀ။ 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 10u_6.3V_X5R_06
1u_6.3V_X5R_04
D02B Background noise
+5VS & +VIN plane. ALC898
ALC898
AUDG
MIC2-VREFO
AUDG AUDG AUDG
AUDG
25
38
898: Ղٙ0R
1
9
892: ՂٙHCB1005KF-121T20 U32 898: լՂٙ
892: Ղٙ R691 MIC1-VREFO-L
reltek check
DVDD1
LDO_OUT1
LDO_OUT2
DVDD-IO
DVSS
MIC_CLK HCB1005KF-121T20 1 2 L33 realtek check
58 MIC_CLK MIC_DATA *2.2K_04
HCB1005KF-121T20 1 2 L32 C602 1u_6.3V_X5R_04 D02C
58 MIC_DATA R299
C645 47p_50V_NPO_04 2 ALC892 ᇞެ3D AMP௛ଃ INT_MIC_OUT
C1024 10u_6.3V_X5R_06 4 GPIO0/DMIC-CLK/SPDIFO_2* 27 C601 10u_6.3V_X5R_06
GPIO1/DMIC_DAT VREF ALC892ழΔC601լՂٙΔC602Ղ1U 2.2K_04
C644 47p_50V_NPO_04 3 ALC898
REGREF C1003
MIC1_L_M
R167 22_04 HDA_SDOUT_R 5 28 MIC1-VREFO-L AUDG
38 HDA_SDOUT SDATA-OUT MIC1-VREFO-L *330p_50V_X7R_04
L14 FCM1005MF-300T03 R176 22_04 6 32 MIC1-VREFO-R
38 HDA_BITCLK BIT-CLK VREFO-B(2) C598
R334 22_04 HDA_SDIN0_R 8
38 HDA_SDIN0 SDATA-IN
R162 22_04 HDA_SYNC_R 10 39
DIGITAL
SRUW$
38 HDA_SYNC SYNC SURR-L AUDG *680p_50V_X5R_04
R161 22_04 HDA_RST#_R 11 41
38 HDA_RST# RESET# SURR-R
Max: 0.5inch EAPD_MODE 47 30 MIC2-VREFO
51 EAPD_MODE SPDIFI/EAPD VREFO-F T116 D02A AUDG
PC BEEP 31
VREFO-E AL898_VREFO 60 4/28 ଥ‫ޏ‬ESS bo sound ംᠲ
44 KBC_BEEP
D61
1 A
2 A
C
60
3 BEEPR705
R706
SPDIFO
47K_04
4.7K_04
C1039 1u_6.3V_X5R_04
48
12
SPDIF-OUT
PCBEEP SRUW' FRONT-OUT-L

FRONT-OUT-R
35
36
FRONT_L
FRONT_R
51,52
51,52
MIC1-VREFO-R Sheet 50 of 91
38 PCH_SPKR
C BAT54CS3
C1040 *0.1u_10V_X5R_04
60 JD_SENSEA
898: Ղٙ0R
892: լՂٙ
reltek check 13
34 Sense A
SRUW( LINE2-L
LINE2-R
14
15
43
HEADPHONE-L
HEADPHONE-R
60
60
R692
2.2K_04
C
Realtek ALC898
ANALOG SRUW*
60 JD_SENSEB Sense B CENTER
L30 5VS_AUD R695 ALC898 0_04 44 C1010 10u_6.3V_X5R_06 R697 75_1%_04 MIC1_R_M
LFE SIDE_L 60
HCB1005KF-121T20 37 C1015 10u_6.3V_X5R_06 R699 75_1%_04
T118 LDO_IN VRP SIDE-L_R SIDE_R 60
29 45
5V LDO-IN
SRUW+ SIDE-R
SIDE-L 46 SIDE-R_R AL898_GPIO33 60
C995 *0.1u_16V_Y5V_04
C1004
C
C637 *4.7u_6.3V_X5R_06 MIC2_L 16

D59 ALC889 INT_MIC_OUT R328 *1K_04 INT_MIC_R C635 *4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L
SRUW) 33
INTERNAL PU 50K
C1001 *10u_6.3V_X5R_06
*680p_50V_X5R_04
*ZD5231BS2 լՂٙ. C603

22u_6.3V_X5R_08 18
MIC2-R GPIO2
40 JDREF R314 20K_1%_04
CD-L JDREF AUDG AUDG
19 AUDG
A
20 CD-GND 23 R309 *5.1K_1%_04

CD-R
SRUW& LINE1-R
LINE1-L 24
AVSS1
AVSS2
AUDG MIC1_L_M R315
AUDG 75_04 C628 4.7u_6.3V_X5R_06 MIC1_L_M_R 21
SRUW%
60 MIC1_L_M MIC1_R_M R303 MIC1-L
Connect standby power(for 75_04 C614 4.7u_6.3V_X5R_06 MIC1_R_M_R 22 C623 *100p_50V_NPO_04
60 MIC1_R_M MIC1-R
pop noise)
ALC898
26
42
ALC892/898
* ALC892:Pin2->GPIO0/DMIC_CLK/SPDIFO_2;Pin3->REGREF;Pin4->GPIO1/DMIC_DATA;Pin29->LDOVDD
* ALC898:Pin2->GPIO0/DMIC_CLK/SPDIFO_2;Pin3->REGREF;Pin4->GPIO1/DMIC_DATA;Pin29->LDOVDD
AUDG
D02A
B
5VS 4/15 ᇞlot3 bug , ‫ޏ‬੡5VS
3/1 change
PR532
110K
PR533
100K
OUTPUT
+12.2V/-12.0V
+15V/ -15V PWM (-300mA/+400mA) B
PL26 D01A 88.7K 80.6K +14.8V/-15.0V
HCB1005KF-121T20 PL24 ALC898 PL27 +15V
ALC898 TMPC0402HP-4R7MG-Z02 CPI160809UF-1R0M 4/15 ᐗ೸৬ᤜ Add ferrite bead
9
8
1 2 PD29 A
ALC898
C CSOD140SH .
D02A
3 7 ALC898
PC398
PC399
PC400
PC401
2 6 PU26 ALC898 PC420 0.1u_25V_X7R_06

PR531
1 5 TPS65131RGER
PC397 1M_1%_04
PQ69 ALC898
ALC898
10u_25V_X5R_08
ALC898
10u_25V_X5R_08
ALC898
10u_25V_X5R_08
ALC898
10u_25V_X5R_08
ALC898
1 23
4
EMB20P03V 4.7u_6.3V_X5R_06
ALC898 ALC898 INP1 VPOS 2/23 value follow P870DM2
3/2 change 24 22
ESS_PGND INP2 FBP
17
VREF PR532
7 88.7K_1%_04
BSW PR533
ALC898
80.6K_1%_04
5
P670RP W/3D AMP լՂٙ

4/26 ଥ‫إ‬value੡100_04ፖBOMԫી INN1 ALC898
6
INN2 16
PR534 4/20 ᒵሁଥ‫ޏ‬ FBN
100_04 ESS_PGND ESS_PGND
ALC898 4 PR535
VIN PC403
D02A 1M_1%_04 D02A BCN PC405 ALC898 TPS65131RGER_Pin 9,11
PC402
PC404
PR554
D02 ALC898 0.022u_16V_X7R_04
0_04
15
*0.022u_16V_X7R_04 ESS_PGND HIGH = Enable POWER SAVE Mode
ALC898 VNEG ALC898 ቃ߻-15V ೯‫܂‬ฆൄ
PW _SAVE 8 13
PL28 -15V LOW = Disable 2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 3.3V
ALC898
4.7u_6.3V_X5R_06
ALC898
0.1u_10V_X7R_04
ENP OUTN1 CPI160809UF-1R0M

9 14 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,51,54,58,59,60,63,67,73,75 3.3VS
A
PR537
10 PSP OUTN2 C A
PD30
. 37,47,55,59,60,61,63,66,67,69,71,73,74,75,76 5V A
ENN D02A
TMPC0402HP-4R7MG-Z02
11 18 13,14,16,37,45,51,52,58,59,60,63,68,70,72 5VS
PC406 10u_25V_X5R_08
PC407 10u_25V_X5R_08
PC408 10u_25V_X5R_08
PC409 10u_25V_X5R_08
PC421 0.1u_25V_X7R_06
*0_04 PSN CN CSOD140SH ALC898 13,44,45,60,61,62,63,64,65,71,73,74,75,76 VIN

qfn24-4x4mm-tps6513x ALC898
2
ALC898
PL25 ALC898
21
PR538 CP
0.01u_16V_X7R_04
PC410
4700p_50V_X7R_04
PC411
D02 TPS65131
0_04
ALC898
ALC898
ALC898
ALC898
ALC898
G-PAD
ALC898
19 2
NC1
NC2
ESS_PGND AGND PGND1 3

D02A PGND2 Title
[50] CODEC Realtek ALC898
ALC898
ALC898
PR536 *28mil_short-p
R778 *0_04
1
60 TPS65131PS
ALC898
12
20
25
ALC898 Size Document Number Rev

4/28 ଥ‫ޏ‬ESS bo sound ംᠲ
ESS_PGND ESS_PGND
ESS_PGND
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
Realtek ALC898 B - 51
Schematic Diagrams
TPA2008D2
5 4 3 2 1
AMP_5VS
L45
The volume control.the gain range is from TPA2008D2 HCB1608KF-121T30
-80db(Vvolume=5V) to +20db(Vvolume=0V) with 5VS
64 steps precise control. P2P BA20550 C994 C996 C1006
(TSSOP24) 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
D U30 D
AUDG AUDG AUDG
AMP_EN 3 20 ROUTP L27 . FCM1005KF-121T03 ROUT+
SHUTDOWN ROUTP
AUDG C992 2.2u_6.3V_X5R_04 22 21 20 Mil J_SPK1

20 Mil BYPASS PVDDR1
FRONT_R R302 3.01K_1%_04 C606 24 17 ROUTN L26 FCM1005KF-121T03 ROUT- 1
50,52 FRONT_R RINN ROUTN
. 2
0.1u_10V_X7R_04 P65
3
AUDG C989 0.1u_10V_X7R_04 23 16 20 Mil

RINP PVDDR2 4
6 18 85204-04001
for SUBWOOFER ଃၦᓳᖞ‫ش‬ PGNDL1 PGNDR1 6-20-43130-104
7 19
20 Mil PGNDL2 PGNDR2 20 Mil
ROUT+ 52
Sheet 51 of 91 50,52 FRONT_L
FRONT_L R300 3.01K_1%_04 C605
0.1u_10V_X7R_04
1
LINN LOUTP
5 LOUTP L24 . FCM1005KF-121T03 LOUT+
ROUT- 52
LOUT+ 52
AUDG C991 0.1u_10V_X7R_04 2 9
TPA2008D2 5VS R318 6.98K_1%_04 14
LINP PVDDL1
4
LOUT- 52
On VOLUME PVDDL2
C
AUDG R319 10K_1%_04 15 13 C
NC VDD
Thermal_Pad
20 Mil ROUT+
10 8 LOUTN L23 . FCM1005KF-121T03 LOUT- ROUT-
COSC LOUTN LOUT+
11 12 LOUT- 2/16 add
ROSC AGND
C547 1000p_50V_X7R_04
C554 1000p_50V_X7R_04
C564 1000p_50V_X7R_04
C570 1000p_50V_X7R_04
C1008 R698 TPA2008D2
25
220p_50V_NPO_04 120K_04
AUDG
AUDG
AUDG AUDG
3.3VS
B B
Speaker wire length less than 8000mils , It don't need LC Filter.
C1041 SPKOUTR+,R-,L+,L- Trace width
R331
*0.1u_10V_X5R_04 Speaker 4 ohm------> 30mils, Via hole----->C40D20.
100K_1%_04
C A
13,38,43,44,45,46,53,63,64 SUSB#
39 PCH_MUTE#
C
D38 RB751V-40(lision)
A
AUDIO AMP Enable
D37 *RB751V-40(lision) U33
5
74AHC1G08GW
50 EAPD_MODE R764 0_04 1
4 AMP_EN
AMP_EN 52 13,14,16,37,45,50,52,58,59,60,63,68,70,72 5VS
2
44 KBC_MUTE# 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,54,58,59,60,63,67,73,75 3.3VS
C1042
3/31 ቃఎ(‫ڂ‬898ᄎࢮlow)
3
*0.1u_16V_Y5V_04
A A
C970 C1012
Title
1000p_50V_X7R_04 0.1u_16V_Y5V_04
[51] TPA2008D2
EMI AUDG/DGND೴։ Size Document Number Rev
AUDG A4 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 52 TPA2008D2
Schematic Diagrams
Subwoofer
5 4 3 2 1
P670Sx ONLY SR15 2.2_04

Subwoofer
SC15 2200p_50V_X7R_04
Subwoofer
GND
SAMP_PW R
SAMP_PW R
SEMC2
SC12 SC11 SC8 SC6
SC7 SC26
SD1 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *1000p_50V_X7R_04
SR13 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
SAMPPW R_SW Subwoofer Subwoofer Subwoofer Subwoofer Subwoofer
D 5VS SL1 . 2.2uH_4*4*2.0 A C 10K_04 Subwoofer Subwoofer D
Subwoofer Subwoofer
10
16
26
32
SU2 SU1
1
FMS3004-AS-H AUDG_2 AUDG_2 AUDG_2 AUDG_2 AUDG_2
Subwoofer GND
VLDO
LVDDN
LVPPD
RVDDP
RVDDN
SC17
8 6 17 21 SOSCIN SR5 *10K_04
10u_6.3V_X5R_06 IN LX1 51 AMP_EN SD OSCIN
7 SR6 0_04 19 20 Subwoofer
Subwoofer SR18 *0402_short
SAMPPW R_FREQ9 LX2 MUTE OSOC
Subwoofer
GND_Thermal
FREQ SR17 130K_1%_06
Subwoofer 2 AUDG_2 SJ_SPK1
GND SR42 10_04SAMPPW R_EN 3 FB Subwoofer SC4 0.1u_10V_X7R_04 Subwoofer 6 11 20 Mil
SHDN AUDG_2 RINN ROUTP1 51 ROUT+ 1
Subwoofer 12 51 ROUT-
SC18 10 1 SR16 SC5 0.1u_10V_X7R_04 Subwoofer 7 ROUTP2 2 P670Sx SPK
GND
GND
SS COMP RINP 51 LOUT+ 3
*10u_6.3V_X5R_06 18K_1%_06 13 51 LOUT-
Subwoofer Subwoofer 2CH_SUBW OOFER_RC SC2 0.1u_10V_X7R_04 Subwoofer 4 RGND 4
SC40 LINN
G5110 14 85204-04001
4
5
11 ROUTN1
15000p_50V_X7R_06 AUDG_2 SC1 0.1u_10V_X7R_04 Subwoofer 3 APA2607QBI 15 Subwoofer
Subwoofer LINP ROUTN2 6-20-43130-104
Subwoofer Subwoofer
GND SPFLAG 18 31 SJ_SUBW OOF1
GND SGAIN1_R 25 PFLAG LOUTP2 30 SUBW OOFER+ SL2 HCB1005KF-121T20
SR19 GAIN1 LOUTP1 40 mil 2
GND SGAIN0_R 24 Subwoofer
100K_04 SDRC1_R GAIN0 1
GND 23 29
Subwoofer SAMP_3V3LDO SDRC0_R DRC1 LGND
22 40 mil 88266-02001
DRC0 27 SUBW OOFER- SL3 HCB1005KF-121T20 Subwoofer
LOUTN1
Case_GND
SC21
SC22
SC19 SC20 2 28 Subwoofer 6-20-63120-102
3V3LDO LOUTN2
Sheet 52 of 91
330p_50V_X7R_04 10p_50V_NPO_04 Speaker:
AGND
VREF
Subwoofer Subwoofer SR21 18K_1%_04 SPMAX 9
Subwoofer PMAX ٥‫ش‬6-23-5P15E-0W3
4ȍ,
Subwoofer
1000p_50V_X7R_04
Subwoofer
1000p_50V_X7R_04
D02 SAMP_PW R
SC23
SR20 typ=2.5W
Subwoofer
33
SAMP_3V3LDO 10K_04
C GND
0.1u_10V_X7R_04
Subwoofer max=4W C
ᓳᖞGAINଖ Subwoofer
SC3
+ SC14 SC24 SC25
0.1u_10V_X7R_04
4.7u_25V_X5R_08 4.7u_25V_X5R_08
Subwoofer *220u_25V_V_B
SR9 SR10 SR11 SR12 SR8 AUDG_2 AUDG_2 Subwoofer Subwoofer
Subwoofer
10K_04 10K_04 *10K_04 *10K_04 120K_04
Subwoofer Subwoofer Subwoofer Subwoofer Subwoofer D01A
AUDG_2 AUDG_2 AUDG_2
SGAIN1_R AUDG_2 AUDG_2

SGAIN0_R
SDRC1_R FRONT_R SC34 Subwoofer
50,51 FRONT_R
SDRC0_R
*0.1u_16V_Y5V_04 20 Mil
SPFLAG
FRONT_L SC33 Subwoofer SR41 *3.24K_1%_04 SR40 *15.4K_1%_04 2CH_SUBW OOFER_RC
50,51 FRONT_L
Subwoofer Subwoofer SR31 *0402_short
*0.1u_16V_Y5V_04
SR1 SR2 SR3 SR4 SR7
SC16
SC39
SC10
SC30
Subwoofer
*10K_04 *10K_04 10K_04 10K_04 *120K_04 SC38
SEMC1
Subwoofer Subwoofer Subwoofer Subwoofer Subwoofer *0.1u_10V_X5R_04 GND
*1000p_50V_X7R_04
Subwoofer
Subwoofer
Subwoofer
0.1u_16V_Y5V_04
Subwoofer
1000p_50V_X7R_04
Subwoofer
0.1u_16V_Y5V_04
Subwoofer
0.1u_16V_Y5V_04
AUDG_2
AUDG_2 AUDG_2 AUDG_2 AUDG_2 AUDG_2

AUDG_2
B B
SR25 100K_04 SAMP_PW R AUDG_2

SAMP_PW R
Subwoofer
8
FRONT_R 30K_1%_04
SR24 3 SR26 FILTER SC37 0.47u_6.3V_X5R_04
FC: 300Hz
V+
SC32 Subwoofer + 2.37K_1%_04 Subwoofer

0.1u_10V_X7R_04 1 SUB_R SR22 *0_04 SAMP_PW R
Subwoofer SR23 OUT Subwoofer Subwoofer
SR14 SR39
8
100K_04 2 SU3A
V-
- 1.27K_1%_04 1.27K_1%_04
Subwoofer LM358G SC28 0.1u_10V_X7R_04 SOUTPUT1 SINPUT2+ 5 SUB Woofer out
V+
Subwoofer Subwoofer Subwoofer Subwoofer +
4
SAMP_PW R 7 2CH_SUBW OOFER_RC

AUDG_2 SR37 SC36 OUT
SR36 SR27 SC9 SU4B
8
AUDG_2 SU4A *4.3K_1%_04 0.1u_10V_X7R_04 6
V-
SUB_L 2.37K_1%_04 2.37K_1%_04 *0.1u_16V_Y5V_04 - LM358G
3 LM358G Subwoofer Subwoofer Subwoofer SR32
V+
+ Subwoofer
Subwoofer Subwoofer Subwoofer 0_04
4
SR34 100K_04 SAMP_PW R 1 Subwoofer
SAMP_PW R OUT
Subwoofer AUDG_2
8
SC27 SR28 SC29 2 AUDG_2

V-
FRONT_L SR35 30K_1%_04 5 *0.1u_10V_X5R_04 *4.3K_1%_04 0.1u_10V_X7R_04 - SR30 SAMP_PW R SAMP_PW R AUDG_2 SINPUT2- SR38 *100K_04
V+
SC31 Subwoofer + Subwoofer Subwoofer Subwoofer 0_04 Subwoofer

4
0.1u_10V_X7R_04 7 Subwoofer
Subwoofer SR33 OUT
100K_04 6 SU3B AUDG_2 SC13 SC35 AUDG_2
V-
Subwoofer - LM358G 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04

Subwoofer AUDG_2 AUDG_2 Subwoofer Subwoofer
4
SR29
A *100K_04 A
AUDG_2 AUDG_2 Subwoofer
AUDG_2 AUDG_2
AUDG_2
Title
[52] P670RS SUBWOOFER_S
13,14,16,37,45,50,51,58,59,60,63,68,70,72 5VS Size Document Number Rev
A3 6-71-P65S0-D02C D02C

5 4 3 2 1
Subwoofer B - 53
Schematic Diagrams
AR_TBT
5 4 3 2 1
XTAL NOTE:
X4 SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
TBT_XTAL_25_IN SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
GND 2 1
TBT_XTAL_25_OUT
SNK1_DDC_clk ?connect to 100k PD.
3 4 GND
Y23 V23 PET0_P C927 0.22u_10V_X5R_04
36 PCIE_TXP1_TBT PCIE_RX0_P PCIE_TX0_P PET0_N PCIE_RXP1_TBT 36
C918 FSX3L 25MHZ C906 Y22 V22 C917 0.22u_10V_X5R_04
CPU PCIE RX
36 PCIE_TXN1_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN1_TBT 36
6.8p_50V_NPO_04 6.8p_50V_NPO_04 T23 P23 PET1_P C919 0.22u_10V_X5R_04
CPU PCIE TX
T22 P22 C920 0.22u_10V_X5R_04
PCIe GEN3
6-07-6R834-1A0 36 PCIE_TXN2_TBT PCIE_RX1_N PCIE_TX1_N PCIE_RXN2_TBT 36
3/29 ଥ‫إ‬PDA BUG M23 K23 PET2_P C921 0.22u_10V_X5R_04
M22 K22 C922 0.22u_10V_X5R_04
D GND 36 PCIE_TXN3_TBT PCIE_RX2_N PCIE_TX2_N PCIE_RXN3_TBT 36 D
H23 F23 PET3_P C924 0.22u_10V_X5R_04
VCC3V3_FLASH H22 F22 C923 0.22u_10V_X5R_04
AR/PPS COMMON FLASH 36 PCIE_TXN4_TBT PCIE_RX3_N PCIE_TX3_N PCIE_RXN4_TBT 36
V19 L4 BUF_PLT_RST#_AR
40 CLK_PCIE_TBT PCIE_REFCLK_100_IN_P PERST_N
T19
40 CLK_PCIE_TBT# PCIE_REFCLK_100_IN_N PCIe_RBIAS
AC5 N16 R220 3.01K_1%_04 GND
C905 40 TBT_CLKREQ# PCIE_CLKREQ_N PCIE_RBIAS
AB7 R2
R603 R549 0.1u_10V_X7R_04 R550 R551 DPSNK0_ML0_P DPSRC_ML0_P
AC7 R1 VCC3V3_SX_SYS
DPSNK0_ML0_N DPSRC_ML0_N
3.3K_1%_04
3.3K_1%_04
AB9 N2 ሶዥሽ,6/11 Tim
Addሶ
3.3K_1%_04
3.3K_1%_04
GND DPSNK0_ML1_P DPSRC_ML1_P
AC9 N1
DPSNK0_ML1_N DPSRC_ML1_N U13
5
SOURCE PORT 0
U54
SINK PORT 0
AB11 L2 1
8 5 TBT_EE_DI DPSNK0_ML2_P DPSRC_ML2_P BUF_PLT_RST#_AR 4
VDD SI AC11 L1
DPSNK0_ML2_N DPSRC_ML2_N 2
2 TBT_EE_DO BUF_PLT_RST# 39,44,47,48,58,60
SO AB13 J2
AC13 DPSNK0_ML3_P DPSRC_ML3_P J1
TBT_EE_W P_N 3 1TBT_EE_CS_N
3
DPSNK0_ML3_N DPSRC_ML3_N 74AHC1G08GW
WP# CE#
Y11 W19
6TBT_EE_CLK DPSNK0_AUX_P DPSRC_AUX_P
SCK W11 Y19 GND
DPSNK0_AUX_N DPSRC_AUX_N
Sheet 53 of 91 TBT_HOLD_N 7
HOLD#
W 25Q80DV
VSS
4
AA2
Y5
DPSNK0_HPD DPSRC_HPD
G1
N6
TBT_SRC_HPD
DPSRC_RBIAS R205 14K_1%_04

GND DPSNK0_DDC_CLK DPSRC_RBIAS GND
AR_TBT C
R4
AB15
AC15
DPSNK0_DDC_DATA
DPSNK1_ML0_P
GPIO_0
GPIO_1
U1
U2
V1
TBT_I2C_SDA
TBT_I2C_SCL
TBT_EE_W P_N
TBT_I2C_SDA
TBT_I2C_SCL
55,56
55,56 C
DPSNK1_ML0_N GPIO_2
LC GPIO
V2 TBT_TMU_CLK_OUT
AB17 GPIO_3 W1 PCIE_W AKE#
TBT_CLKREQ# R560 10K_04 DPSNK1_ML1_P GPIO_4 PCIE_W AKE# 38,60
VCC3V3_S0_SYS AC17 W2 TBCIO_PLUG_EVENT
DPSNK1_ML1_N GPIO_5 TBCIO_PLUG_EVENT 35
Y1 TBT_HDMI_DDC_DATA
AB19 GPIO_6 Y2 TBT_HDMI_DDC_CLK
DPSNK1_ML2_P GPIO_7 D02
SINK PORT 1
AC19 AA1 TBT_SRC_CFG1 VCC3V3_SX_SYS
TBT_I2C_SDA R519 2.2K_1%_04 DPSNK1_ML2_N GPIO_8 J4 TBTA_I2C_INT
VCC3V3_SX_SYS POC_GPIO_0 TBTA_I2C_INT 55
TBT_I2C_SCL R518 2.2K_1%_04 AB21 E2 TBTB_I2C_INT
DPSNK1_ML3_P POC_GPIO_1 TBTB_I2C_INT 56
POC GPIO
PCIE_W AKE# R517 *10K_04 AC21 D4 RTD3_USB_PW R_EN
DPSNK1_ML3_N POC_GPIO_2 U14
5
TBCIO_PLUG_EVENT R516 10K_04 H4 TBT_FRC_PW R
POC_GPIO_3 TBT_FRC_PW R 35
TBT_SLP_S3_N R522 10K_04 Y12 F2 TBT_BATLOW _N 1
TBT_BATLOW _N R520 10K_04 W12 DPSNK1_AUX_P POC_GPIO_4 D2 TBT_SLP_S3_N 4
TBTA_I2C_INT R200 10K_04 DPSNK1_AUX_N POC_GPIO_5 F1 RTD3_CIO_PW R_EN 2
POC_GPIO_6 SUSB# 13,38,43,44,45,46,51,63,
TBTB_I2C_INT R521 10K_04 DPSNK1_HPD Y6
DPSNK1_HPD E1 TBT_TEST_EN R541 100_04 GND
3
TBT_SNK1_DDC_CLK TEST_EN 74AHC1G08GW
Y8
DPSNK1_DDC_CLK
Misc
SINK0_CFG1 N4 AB5 TBT_TEST_PW G R567 100_04
DPSNK1_DDC_DATA TEST_PWR_GOOD GND
GND R227 14K_1%_04 DPSNK_RBIAS Y18 F4 TBT_RESET_N 55
DPSNK_RBIAS RESET_N
C419 *10K_04 TBT_TDI Y4 D22 TBT_XTAL_25_IN
TBT_HDMI_DDC_DATA R536 100K_04 VCC3V3_LC TDI XTAL_25_IN
C421 *10K_04 TBT_TMS V4 D23 TBT_XTAL_25_OUT
TBT_HDMI_DDC_CLK R535 100K_04 TMS XTAL_25_OUT
C422 *10K_04 TBT_TCK T4
TBT_TMU_CLK_OUT R537 100K_04 TCK
C420 *10K_04 TBT_TDO W4 MISC AB3
TBT_FRC_PW R R201 100K_04 TDO EE_DI TBT_EE_DI 55
RTD3_CIO_PW R_EN AC4 TBT_EE_DO 55
R540 100K_04 +/-0.5% R206 4.75K_0.5%_04 TBT_RBIAS H6 EE_DO AC3
RTD3_USB_PW R_EN R204 100K_04 7/30 RBIAS EE_CS_N TBT_EE_CS_N 55
TBT_RSENSE J6 AB4
DPSNK1_HPD R207 100K_04 RSENSE EE_CLK TBT_EE_CLK 55
B B
TBTA_LSRX A15 B7
R209 1M_04 57 TBTA_CA2HD_1_P PA_RX1_P PB_RX1_P TBTB_CA2HD_1_P 57
TBTA_LSTX B15 A7
R212 1M_04 57 TBTA_CA2HD_1_N PA_RX1_N PB_RX1_N TBTB_CA2HD_1_N 57
TBTA_HPD R185 100K_04
TBT_SNK1_DDC_CLK C898 0.22u_10V_X5R_04 TBTA_TX1_P A17 A9 TBTB_TX1_P 0.22u_10V_X5R_04 C1084
R211 100K_04 57 TBTA_HD2CA_1_P PA_TX1_P PB_TX1_P TBTB_HD2CA_1_P 57
C894 0.22u_10V_X5R_04 TBTA_TX1_N B17 B9 TBTB_TX1_N 0.22u_10V_X5R_04 C1082
TBT USB TYPE C, Port B

SINK0_CFG1 R199 100K_04 57 TBTA_HD2CA_1_N PA_TX1_N PB_TX1_N TBTB_HD2CA_1_N 57
TBT USB TYPE C, Port A
TBTB_LSTX R569 1M_04

TBTB_LSRX C897 0.22u_10V_X5R_04 TBTA_TX0_P A19 A11 TBTB_TX0_P 0.22u_10V_X5R_04 C1086
R577 1M_04 57 TBTA_HD2CA_0_P PA_TX0_P PB_TX0_P TBTB_HD2CA_0_P 57
TBTB_HPD C901 0.22u_10V_X5R_04 TBTA_TX0_N B19 B11 TBTB_TX0_N 0.22u_10V_X5R_04 C1083
R538 100K_04 57 TBTA_HD2CA_0_N PA_TX0_N PB_TX0_N TBTB_HD2CA_0_N 57
B21 A13
TBT PORTS
57 TBTA_CA2HD_0_P PA_RX0_P PB_RX0_P TBTB_CA2HD_0_P 57
A21 B13
NOTE: GND 57 TBTA_CA2HD_0_N PA_RX0_N PB_RX0_N TBTB_CA2HD_0_N 57
Port A
Port B
DPSRC NOT IS USE:STUFF C457 0.1u_10V_X7R_04 TBTA_AUX_P Y15 Y16 TBTB_AUX_P 0.1u_10V_X7R_04 C1087
DPSRC IS USE:NO STUFF. 55 TBTA_DPSRC_AUX_P TBTA_AUX_N PA_DPSRC_AUX_P PB_DPSRC_AUX_P TBTB_AUX_N TBTB_DPSRC_AUX_P 56
3/16 Tim C459 0.1u_10V_X7R_04 W15 W16 0.1u_10V_X7R_04 C1085
55 TBTA_DPSRC_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N TBTB_DPSRC_AUX_N 56
TBT_SRC_CFG1R534 1M_04
E20 E19
55 TBTA_USB2_D_P PA_USB2_D_P PB_USB2_D_P TBTB_USB2_D_P 56
TBT_SRC_HPD R539 D20 D19
1M_04 55 TBTA_USB2_D_N PA_USB2_D_N PB_USB2_D_N TBTB_USB2_D_N 56
TBTA_LSTX A5 B4 TBTB_LSTX
55 TBTA_LSTX TBTA_LSRX PA_LSTX PB_LSTX TBTB_LSRX TBTB_LSTX 56
A4 B5
D02
POC
GND 55 TBTA_LSRX TBTA_HPD PA_LSRX PB_LSRX TBTB_HPD TBTB_LSRX 56
M4 G2
55 TBTA_HPD PA_DPSRC_HPD PB_DPSRC_HPD TBTB_HPD 56
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW: R228 499_1%_04 PA_USB2_RBIAS H19 F19 PB_USB2_RBIAS R229 499_1%_04
GPIO | TERMINATION | Power Rail GND PA_USB2_RBIAS PB_USB2_RBIAS GND
---------------------------------------------------- AC23 D6
GPIO_0 | 10K PU | VCC3V3_LC DEBUG PINs: AB23 THERMDA MONDC_SVR
GPIO_1 | 10K PU | VCC3V3_LC THERMDA A23
GPIO_2 | 100K PD | PIN | TERMINATION V18 ATEST_P B23
A ------------------------------- PCIE_ATEST ATEST_N 54 VCC3V3_LC A
GPIO_3 | 100k PD | 55,56 VCC3V3_FLASH
GPIO_4 | 10K PU | VCC3V3_LC MONDC_SVR | GND AC1 DEBUG E18
MONDC_DPSNK_0 | GND TEST_EDM USB2_ATEST 54,55,56 VCC3V3_SX_SYS
GPIO_5 | 10K PU | VCC3V3_LC 54 VCC3V3_S0_SYS
GPIO_6 | 100K PD | MONDC_DPSNK_1 | GND L15 W13
N15 FUSE_VQPS_64 MONDC_DPSNK_0
MONDC_DPSRC | GND
GPIO_7 | 100K PD | FUSE_VQPS_128 W18
GPIO_8 | 100K PD | MONDC_CIO_0 | GND MONDC_DPSNK_1
MONDC_CIO_1 | GND C23
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX C22 MONDC_CIO_0 AB2
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX TEST_EDM | GND NC_C22 MONDC_DPSRC Title
POC_GPIO_2 | 100K PD | FUSE_VQPS_64 | GND U55A
[53] P650RS AR_TBT
POC_GPIO_3 | 100K PD | FUSE_VQPS_128 | GND DSL6540
ATEST_P/N | FLOATING Size Document Number Rev
POC_GPIO_4
POC_GPIO_5
| 10K
| 10K
PU
PU
| VCC3V3_TBT_SX
| VCC3V3_TBT_SX USB2_ATEST | FLOATING
GND 6-03-06540-060 GND
A3 P650RS 6-71-P65S0-D02C D02C
POC_GPIO_6 | 100K PD | PCIE_ATEST | FLOATING Date: W ednesday, September 07, 2016 Sheet 53 of 91
5 4 3 2 1
B - 54 AR_TBT
Schematic Diagrams
AR_Power
5 4 3 2 1
VCC0V9_DP VCC3V3_LC VCC3V3_SX_SYS VCC3V3_S0_SYS
VCC3V3_S0
C428 C870
C862 C859 C861 C860
C435
0.1u_10V_X7R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
R13
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
R6
H9
F8
VCC0V9_DP
L8 GND GND A2 GND
VCC3P3_S0
VCC3P3_LC
VCC3P3_SX
VCC3P3A
L11 VCC0P9_DP VCC3P3_SVR A3 GND
L12 VCC0P9_DP VCC3P3_SVR B3
C448 C444 C445 C443 C446 C447 C440 M8 VCC0P9_DP VCC3P3_SVR
T11 VCC0P9_DP
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 T12 VCC0P9_DP L9 VCC0V9_SVR 120MIL
D D
L6 VCC0P9_DP VCC0P9_SVR M9
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12 C438 C453 C452 C436 C437 C451 C432
V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
GND VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA
VCC0V9_PCIE V13 F12
VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13
M13 VCC0P9_SVR_ANA F15
VCC0V9_USB M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9
VCC0P9_PCIE VCC0P9_SVR_SENSE 3/3 ՠᐗംᠲរ ଥ‫إ‬footprint GND
M16
L19 VCC0P9_PCIE XFL4012-601MEC ᑑုጸ‫ۥ‬௃௃:Share same GND plane with SVR_VSS of AR
N19 VCC0P9_ANA_PCIE_1 C1 TBT_SVR_IND L39 PCB Footprint = xfl4012-2
C450 C449 L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
VCC0V9_USB
M18 VCC0P9_ANA_PCIE_2 SVR_IND D1
1u_6.3V_X5R_04 1u_6.3V_X5R_04 N18 VCC0P9_ANA_PCIE_2 SVR_IND D01A
VCC
VCC0P9_ANA_PCIE_2 C843 C842 C841
VCC0V9_CIO R15 A1
VCC0P9_USB SVR_VSS 47u_6.3V_X5R_08 47u_6.3V_X5R_08 47u_6.3V_X5R_08
R16 B1
VCC0P9_USB SVR_VSS B2
GND R8 SVR_VSS
R9 VCC0P9_CIO
VCC0V9_PCIE
R11
R12
VCC0P9_CIO
VCC0P9_CIO
VCC0P9_CIO VCC0P9_LVR
VCC0P9_LVR
F18
H18
VCC0V9_LVR_OUT
GND
Sheet 54 of 91
VCC3V3_ANA_PCIE L16 J11 C463 C468 C458 C442
C467 C466 C464 C465

C460
VCC3V3_ANA_USB2
C454
J16
A6
VCC3P3_ANA_PCIE
VCC3P3_ANA_USB2
VSS_ANA
VCC0P9_LVR
VCC0P9_LVR_SENSE
VSS_ANA
H11
V5
10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04 AR_Power
A8 V6
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
C 1u_6.3V_X5R_04 1u_6.3V_X5R_04 A10 V8 C
A12 VSS_ANA VSS_ANA V9
A14 VSS_ANA VSS_ANA V15 GND
GND GND A16 VSS_ANA VSS_ANA V16
A18 VSS_ANA VSS_ANA V20
GND VSS_ANA VSS_ANA
A20 W5
A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
VCC0V9_CIO VSS_ANA VSS_ANA
B8 W9
C434 C441 C431 VSS_ANA VSS_ANA
B16 Y9
B18 VSS_ANA VSS_ANA Y13
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
B20 Y20
B22 VSS_ANA VSS_ANA AA22
D8 VSS_ANA VSS_ANA AA23
D9 VSS_ANA VSS_ANA AB6
GND D11 VSS_ANA VSS_ANA AB8
GND
E8 VSS_ANA VSS_ANA AB20
E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
B E22 VSS_ANA VSS_ANA AC12 B
DEFAULT SHORT VSS_ANA VSS_ANA
F9 AC16
PJ16 VSS_ANA VSS_ANA
F16 AC18
2mm VSS_ANA VSS_ANA
F20 AC20
120MIL 1 2 VSS_ANA VSS_ANA
3.3V G22 AC22
VCC3V3_SX_SYS G23 VSS_ANA VSS_ANA D5
H1 VSS_ANA VSS E4
R213 0_06 H2 VSS_ANA VSS E5
H12 VSS_ANA VSS E6
H13 VSS_ANA VSS F5
H15 VSS_ANA VSS F6
PJ17 VCC3V3_S0 L40 VCC3V3_S0_SYS VSS_ANA VSS
H16 H5
*2mm CPI160809UF-1R0M VSS_ANA VSS
H20 H8
3.3VS
120MIL 1 2 . J5 VSS_ANA VSS J8
J18 VSS_ANA VSS J12
J19 VSS_ANA VSS J13
C456 C877 C885 VSS_ANA VSS
J20 J15
J22 VSS_ANA VSS L13
1u_6.3V_X5R_04 47u_6.3V_X5R_08 47u_6.3V_X5R_08 VSS_ANA VSS
J23 M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
GND GND GND VSS_ANA VSS
L20 N11
L22 VSS_ANA VSS N12
L23 VSS_ANA VSS N13
M1 VSS_ANA VSS T6
M2 VSS_ANA VSS T8
VSS_ANA VSS 53 VCC3V3_LC
A
M5 T9 53,55,56 VCC3V3_SX_SYS A
M19 VSS_ANA VSS T13
VSS_ANA VSS 53 VCC3V3_S0_SYS
M20 T15 2,13,31,46,47,49,58,60,61,63,64,66,67,71 3.3V
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA VSS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,58,59,60,63,67,73,75 3.3VS

N20 T18
VSS_ANA VSS
N22 AB1
N23 VSS_ANA VSS AC2
VSS_ANA VSS
U55B Title
[54] P650RS AR_Power
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23
DSL6540
6-03-06540-060 Size Document Number Rev

A3 P650RS 6-71-P65S0-D02C D02C
GND
5 4 3 2 1
AR_Power B - 55
Schematic Diagrams
TPS65982
5 4 3 2 1
TBTA_VBUS
VCC5V0_SYS
80Ohm, 0.01Ohm DCR, 8A Idc
L13
HCB2012KF-800T80
C370 C369 C387 C386 GND

22u_6.3V_X5R_08 C388
TBTA_LDO_BMC 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08
VCC1V8D_TBTA_LDO 1u_25V_X5R_06
0_04
0_04
VCC1V8A_TBTA_LDO
GND GND GND GND 2/4 Tim
D GND D
C882 C872 C884
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 close to pin,1/14
R555
R542
C402
GND GND GND GND
VCC_HV_SYS_1
0.1u_10V_X7R_04
VCC3V3_SX_SYS
NOTE:
1u_6.3V_X5R_04
GND
C433
C396
C423
D02A 10u_6.3V_X5R_06 PAY ATTENTION SYMBOL
10u_6.3V_X5R_06 R781 OF TPS65982 BASED ON DS R0.92
H10
C11
D11
A11
B11
B10
A10
0_04
H1
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
GND
GND
F1
GND AND MIGHT BE FUTURE CHANGES.
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8D
LDO_BMC
LDO_1V8A
PP_CABLE
SENSEN
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
4/28 TI recommend use I2C Pull dowm resistor I2C_ADDR
D1
53,56 TBT_I2C_SDA I2C_SDA1
D2
53,56 TBT_I2C_SCL I2C_SCL1
C1
53 TBTA_I2C_INT I2C_IRQ1Z
Sheet 55 of 91 D02 56 ACE_I2C_SDA2

56 ACE_I2C_SCL2 TBTA_I2C_IRQ2Z
A5
B5
B6
I2C_SDA2
I2C_SCL2
3A 3A
H11
56 TBTA_I2C_IRQ2Z I2C_IRQ2Z VBUS
TPS65982 35 TBTA_ACE_GPIO0
R579 *0_04 GPIO_0 B2
C2 GPIO_0
GPIO_1
VBUS
VBUS
VBUS
J10
J11
K11
C R524 *0_04 D10 C
35 TBTA_ACE_GPIO2 GPIO_2 C883
R510 *0_04 G11 H2
3/15
35 TBTA_ACE_GPIO3
R737‫ޏ‬Ղٙ 53 TBTA_HPD
C10
E10
GPIO_3
GPIO_4
GPIO_5
Primary VOUT_3V3
1u_6.3V_X5R_04
GND
VCC3V3_FLASH
D02 R737 0_04 G10 G1

56 TBTA_ACE_GPIO6 GPIO_6 LDO_3V3
R186 *0_04 GPIO_7 D7
35,56 TBTA_ACE_GPIO7 GPIO_7
H6
D02 56 TBTB_I2C_IRQ2Z GPIO_8 C415
K6 TBTA_USB2_TP 57
C_USB_TP 10u_6.3V_X5R_06
A3 L6 TBTA_USB2_TN 57
53 TBT_EE_CLK SPI_CLK C_USB_TN
B4
TO AP SPI ROM 53 TBT_EE_DI SPI_MOSI
A4
53 TBT_EE_DO SPI_MISO
B3 GND
53 TBT_EE_CS_N SPI_SS_Z
L5
53 TBTA_USB2_D_P USB_RP_P
K5 K7 TBTA_USB2_BP 57
53 TBTA_USB2_D_N USB_RP_N C_USB_BP L7 TBTA_USB2_BN 57
E2 C_USB_BN
D02 56 UART_MOSI UART_TX
F2 TBTA_CC2 57
56 UART_MISO UART_RX TBTA_CC1 57
GND R748 1M_04
F4 L9 TBTA_CC1 C847 220p_50V_NPO_04
SWD_DAT C_CC1 GND
G4 L10 TBTA_CC2 C832 220p_50V_NPO_04
SWD_CLK C_CC2
WHEN CONNECT BUSPOWERZ TO GND,
CONNECT ALSO RPD_Gn to C_CCn
R507 *0_04 E11 K9
35 TBTA_MRESET M_RESET RPD_G1 K10
GND R508 100K_04 RPD_G2
VCC3V3_FLASH
E4 TBTA_DBG_CTL1 R215 10K_04
B L4 DEBUG_CTL1 D5 TBTA_DBG_CTL2 R214 10K_04 B
53 TBTA_LSTX LSX_R2P DEBUG_CTL2
K4
53 TBTA_LSRX LSX_P2R
R558 100K_04 TBTA_DIG_AUD_P L3
R563 100K_04 TBTA_DIG_AUD_N K3 DEBUG3 K8
GND DEBUG4 C_SBU1 TBTA_SBU1 57
R570 100K_04 TBTA_DEBUG1 L2 L8 TBTA_SBU2 57
R585 100K_04 TBTA_DEBUG2 K2 DEBUG1 C_SBU2
GND DEBUG2
Add,3/12 Tim
J1
53 TBTA_DPSRC_AUX_P AUX_P
J2 F11 R509 0_04
53 TBTA_DPSRC_AUX_N AUX_N RESETZ TBT_RESET_N 53
F10
VCC3V3_FLASH R583 100K_04 BUSPOWERZ TBTA_SS
H7
R584 100K_04 TBTA_ROSC SS
G2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R_OSC
C406
GND
R582 U53
R755 100K_04
A1
B8
D6
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
VCC3V3_FLASH 0.22u_10V_X5R_04
15K_0.1%_04 TPS65982ABZQZ
R523 0_04
D02
TI৬ᤜ,2/5 Tim
GND GND
VCC3V3_SX_SYS
GND
R580 *10K_04 GPIO_0

GPIO_7 5V PJ10 VCC5V0_SYS
A R197 *10K_04 A
3mm
3/15 R511‫ޏ‬Ղٙ 1 2
D02
GND R511 10K_04 TBTA_ACE_GPIO6 DEFAULT
VCC3V3_SX_SYS D02 D02 56 VCC5V0_SYS Title
R743 100K_04 TBTA_I2C_IRQ2Z
R756 *3.3K_04 ACE_I2C_SDA2
VCC3V3_FLASH 57 TBTA_VBUS
53,56 VCC3V3_FLASH
[55] P650RS TPS65982
R757 *3.3K_04 ACE_I2C_SCL2 53,54,56 VCC3V3_SX_SYS Size Document Number Rev
37,47,50,59,60,61,63,66,67,69,71,73,74,75,76 5V A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 56 TPS65982
Schematic Diagrams
TPS65982-1
5 4 3 2 1
TBTB_VBUS
VCC5V0_SYS
80Ohm, 0.01Ohm DCR, 8A Idc L49
HCB2012KF-800T80
C1068 C1069 C1070 C1071 GND

22u_6.3V_X5R_08 C1073
TBTB_LDO_BMC 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6.3V_X5R_08
VCC1V8D_TBTB_LDO 1u_25V_X5R_06
0_04
0_04
D C1065 C1066
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04
VCC1V8A_TBTB_LDO
C1067
2.2u_6.3V_X5R_04
GND GND GND
close to pin,1/14
GND
GND
2/4 Tim
D02 D
R719
R717
C1076
GND GND GND GND
VCC_HV_SYS_2
0.1u_10V_X7R_04
VCC3V3_SX_SYS VCC3V3_SX_SYS
NOTE:
1u_6.3V_X5R_04
GND
C1061
C1077
D02
Q58A
D02A
10u_6.3V_X5R_06 PAY ATTENTION SYMBOL
G2
3/21 ADD reserve *MTDK3S6R C1062
ACE_I2C_SCL2
10u_6.3V_X5R_06 R782 OF TPS65982 BASED ON DS R0.92
H10
C11
D11
6 1
A11
B11
B10
A10
*0_04
H1
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
GND
GND AND MIGHT BE FUTURE CHANGES.
G5
D
TO EC Q58B GND F1
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8D
LDO_BMC
LDO_1V8A
PP_CABLE
SENSEP
SENSEN
PP_HV
PP_HV
PP_HV
PP_HV
*MTDK3S6R ACE_I2C_SDA2 4/28 TI recommend reserve I2C Pull dowm resistor I2C_ADDR
3 4
30,44,45,60 SMD_VGA_THERM D1
53,55 TBT_I2C_SDA I2C_SDA1
D2
53,55 TBT_I2C_SCL
D
C1 I2C_SCL1
53 TBTB_I2C_INT I2C_IRQ1Z
55
55 ACE_I2C_SDA2
55 ACE_I2C_SCL2
TBTB_I2C_IRQ2Z
ACE_I2C_SDA2
ACE_I2C_SCL2
TBTB_I2C_IRQ2Z
A5
B5
B6
I2C_SDA2
I2C_SCL2
I2C_IRQ2Z
3A 3A
VBUS
H11
Sheet 56 of 91
J10
TPS65982-1
3/15 R728‫ޏ‬Ղٙ VBUS
R728 GPIO_0_B B2
0_04 J11
38 TBTB_ACE_GPIO0 GPIO_0 VBUS
C2 K11
D10 GPIO_1 VBUS
D02 GPIO_2 C1063
C
53 TBTB_HPD
3/15 DEL R713,R731,R736 G11
C10
E10
GPIO_3
GPIO_4
Secondary VOUT_3V3
H2
1u_6.3V_X5R_04
GND
VCC3V3_TBTB_LDO
C
D02 G10 GPIO_5 G1

55 TBTA_ACE_GPIO6 GPIO_6 LDO_3V3
R715 *0_04 GPIO_7_B D7
35,55 TBTA_ACE_GPIO7 GPIO_7
H6
55 TBTA_I2C_IRQ2Z GPIO_8 C1064
K6 TBTB_USB2_TP 57
C_USB_TP 10u_6.3V_X5R_06
R738 100K_04 TBTB_SPI_CLK A3 L6 TBTB_USB2_TN 57
R739 100K_04 TBTB_SPI_MOSI B4 SPI_CLK C_USB_TN
GND SPI_MOSI
R740 100K_04 TBTB_SPI_MISO A4
R741 3.3K_1%_04TBTB_SPI_SS_Z B3 SPI_MISO GND
VCC3V3_TBTB_LDO SPI_SS_Z
L5
53 TBTB_USB2_D_P USB_RP_P
K5 K7 TBTB_USB2_BP 57
53 TBTB_USB2_D_N USB_RP_N C_USB_BP L7
C_USB_BN TBTB_USB2_BN 57
E2
55 UART_MISO UART_TX
F2
55 UART_MOSI UART_RX
GND R724 1M_04
D02 F4 L9 TBTB_CC1
SWD_DAT C_CC1 TBTB_CC1 57
G4 L10 TBTB_CC2
SWD_CLK C_CC2 TBTB_CC2 57
WHEN CONNECT BUSPOWERZ TO GND,
C1075
C1074
CONNECT ALSO RPD_Gn to C_CCn
R730 100K_04 TBTB_MRESET E11 K9
GND M_RESET RPD_G1 K10
220p_50V_NPO_04
220p_50V_NPO_04
RPD_G2
VCC3V3_TBTB_LDO
E4 TBTB_DBG_CTL1 R714 10K_04
L4 DEBUG_CTL1 D5 TBTB_DBG_CTL2 R718 10K_04
B 53 TBTB_LSTX LSX_R2P DEBUG_CTL2 B
K4
53 TBTB_LSRX LSX_P2R
R716 100K_04 TBTB_DIG_AUD_P L3
R721 100K_04 TBTB_DIG_AUD_N K3 DEBUG3 K8
GND DEBUG4 C_SBU1 TBTB_SBU1 57
R725 100K_04 TBTB_DEBUG1 L2 L8 TBTB_SBU2 57
R727 100K_04 TBTB_DEBUG2 K2 DEBUG1 C_SBU2 GND
GND DEBUG2
J1
53 TBTB_DPSRC_AUX_P AUX_P
J2 F11
53 TBTB_DPSRC_AUX_N AUX_N RESETZ
F10
VCC3V3_FLASH R735 100K_04 BUSPOWERZ TBTB_SS
H7
R734 100K_04 TBTB_ROSC SS
G2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
R_OSC GND
C1072
GND
R733 U67
R754 100K_04
A1
B8
D6
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
VCC3V3_TBTB_LDO 0.22u_10V_X5R_04
15K_0.1%_04 TPS65982ABZQZ
D02 R723 0_04
TI৬ᤜ,2/5 Tim
GND GND GND
VCC3V3_SX_SYS
A R729 *10K_04 GPIO_0_B A

R720 *10K_04 GPIO_7_B
3/15
D02
DEL R732
Title
R742 100K_04 TBTB_I2C_IRQ2Z 55 VCC5V0_SYS [56] TPS65982-1

VCC3V3_TBTB_LDO 57 TBTB_VBUS Size Document Number Rev
53,55 VCC3V3_FLASH
53,54,55 VCC3V3_SX_SYS
A3 P650RS 6-71-P65S0-D02C D02C
37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 5V Date: W ednesday, September 07, 2016 Sheet 56 of 91

5 4 3 2 1
TPS65982-1 B - 57
Schematic Diagrams
AR_Conn Type A/C
5 4 3 2 1
53 TBTA_CA2HD_1_P
TBTA_CA2HD_1_P TBTA_VBUS
ؐ, Port A
AR_TYPE_C, MBؐ
TBTA_CA2HD_1_N
53 TBTA_CA2HD_1_N
53 TBTA_HD2CA_0_N
TBTA_HD2CA_0_N
GND D16 A C CSOD140SH 150 mil
TBTA_HD2CA_0_P
53 TBTA_HD2CA_0_P J_TYPEC1
UCF3T-21S01-0P11
1
Y
A1 B12
TEA10402V15A0
D17
TEA10402V15A0
D18
TEA10402V15A0
D19
TEA10402V15A0
D20
GND GND
D D
TBTA_HD2CA_0_P A2 B11 TBTA_CA2HD_0_P
TBTA_HD2CA_0_N A3 TX0_P RX0_P B10 TBTA_CA2HD_0_N
TX0_N RX0_N
2
GND C851 1u_25V_X5R_06 A4 B9 C864 1u_25V_X5R_06 GND
VBUS VBUS
TBTA_CC1_J A5 B8 TBTA_SBU2_J
CC1 SBU2
GND GND GND GND TBTA_USB2_TP_J TBTA_USB2_BN_J
A6 B7
TBTA_USB2_TN_J A7 USB2_P_T USB2_N_B B6 TBTA_USB2_BP_J
TBTA_CA2HD_0_P
53 TBTA_CA2HD_0_P USB2_N_T USB2_P_B

TBTA_CA2HD_0_N
53 TBTA_CA2HD_0_N TBTA_SBU1_J A8 B5 TBTA_CC2_J
SBU1 CC2
TBTA_HD2CA_1_N
53 TBTA_HD2CA_1_N TBTA_HD2CA_1_P GND C868 1u_25V_X5R_06 A9 B4 C844 1u_25V_X5R_06 GND
53 TBTA_HD2CA_1_P VBUS VBUS
TBTA_CA2HD_1_N A10 B3 TBTA_HD2CA_1_N
1
TBTA_CA2HD_1_P A11 RX1_N TX1_N B2 TBTA_HD2CA_1_P
RX1_P TX1_P
CGND
CGND
CGND
CGND
TEA10402V15A0
D49
TEA10402V15A0
D48
TEA10402V15A0
D43
TEA10402V15A0
D44
A12 B1
Sheet 57 of 91 GND GND
GND1
GND2
GND3
GND4
2
2
EMI_GND2 6-21-B4K30-024
EMR4 *0_08
AR_Conn Type A/C EMR9 0_08
GND GND
D46
GND GND
D47
ឭ࣋ D02AEMI_GND2
EMIឭ
D02 DT1140-04LP-7 3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD D02 DT1140-04LP-7
C C
10 1 TBTA_SBU2_J 10 1 TBTA_USB2_TP_J
55 TBTA_SBU2 55 TBTA_USB2_TP
9 2 TBTA_SBU1_J 9 2 TBTA_USB2_TN_J
55 TBTA_SBU1 55 TBTA_USB2_TN
GND 8 3 GND GND 8 3 GND
7 4 TBTA_CC1_J 7 4 TBTA_USB2_BP_J
55 TBTA_CC1 55 TBTA_USB2_BP
6 5 TBTA_CC2_J 6 5 TBTA_USB2_BN_J
55 TBTA_CC2 55 TBTA_USB2_BN
6-24-40001-003 6-24-40001-003
ؐ, Port B
AR_TYPE_C, MBؐ
TBTB_CA2HD_1_P TBTB_VBUS
53 TBTB_CA2HD_1_P TBTB_CA2HD_1_N
53 TBTB_CA2HD_1_N
53 TBTB_HD2CA_0_N
TBTB_HD2CA_0_N
GND D72 A C CSOD140SH 150 mil
TBTB_HD2CA_0_P
53 TBTB_HD2CA_0_P J_TYPEC2
UCF3T-21S01-0P11
1
B Y B
A1 B12
TEA10402V15A0
D69
TEA10402V15A0
D62
TEA10402V15A0
D63
TEA10402V15A0
D65
GND GND
TBTB_HD2CA_0_P A2 B11 TBTB_CA2HD_0_P
TBTB_HD2CA_0_N A3 TX0_P RX0_P B10 TBTB_CA2HD_0_N
TX0_N RX0_N
2
GND C1079 1u_25V_X5R_06 A4 B9 C1080 1u_25V_X5R_06 GND

VBUS VBUS
TBTB_CC1_J A5 B8 TBTB_SBU2_J
CC1 SBU2
GND GND GND GND TBTB_USB2_TP_J TBTB_USB2_BN_J
A6 B7
TBTB_USB2_TN_J A7 USB2_P_T USB2_N_B B6 TBTB_USB2_BP_J
TBTB_CA2HD_0_P USB2_N_T USB2_P_B
53 TBTB_CA2HD_0_P TBTB_CA2HD_0_N
53 TBTB_CA2HD_0_N TBTB_SBU1_J A8 B5 TBTB_CC2_J
SBU1 CC2
TBTB_HD2CA_1_N
53 TBTB_HD2CA_1_N TBTB_HD2CA_1_P GND C1081 1u_25V_X5R_06 A9 B4 C1078 1u_25V_X5R_06 GND
53 TBTB_HD2CA_1_P VBUS VBUS
TBTB_CA2HD_1_N A10 B3 TBTB_HD2CA_1_N
1
TBTB_CA2HD_1_P A11 RX1_N TX1_N B2 TBTB_HD2CA_1_P

RX1_P TX1_P
CGND
CGND
CGND
CGND
TEA10402V15A0
D67
TEA10402V15A0
D66
TEA10402V15A0
D68
TEA10402V15A0
D64
A12 B1
GND GND
GND1
GND2
GND3
GND4
2
EMI_GND2 6-21-B4K30-024
3/23 EMI ADD EMR16 *0_04
EMR15 *0_04
A
GND GND
D71
GND GND
D70 ឭ࣋
EMIឭ EMI_GND2 55 TBTA_VBUS A
DT1140-04LP-7 D02 DT1140-04LP-7 56 TBTB_VBUS
D02 37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 5V
56 TBTB_SBU2
56 TBTB_SBU1
56 TBTB_CC1
56 TBTB_CC2
GND
10
9
8
7
6
1
2
3
4
5
GND
TBTB_SBU2_J
TBTB_SBU1_J
TBTB_CC1_J
TBTB_CC2_J
56 TBTB_USB2_TP
56 TBTB_USB2_TN
56 TBTB_USB2_BP
56 TBTB_USB2_BN
GND
10
9
8
7
6
1
2
3
4
5
GND
TBTB_USB2_TP_J
TBTB_USB2_TN_J
TBTB_USB2_BP_J
TBTB_USB2_BN_J
D02 Title
2,13,31,46,47,49,54,58,60,61,63,64,66,67,71
[57] P650RS AR_CONN TYPE_A/C
3.3V
PCB Footprint = dfn10-2_5x1mm-short PCB Footprint = dfn10-2_5x1mm-short

6-24-40001-003 6-24-40001-003 Size Document Number Rev
A3 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 58 AR_Conn Type A/C

Schematic Diagrams
TPM, CCD, TP
5 4 3 2 1
SLB9665TT(SLB9660 ઌ‫ &)ٵ‬NPCT650 COLAY

TPM_PW R
FOR TP TP_VCC
R707 GPIO
100K_04 H: W / TPM (Ղ R707 ) TP_VCC
TPM R333 R332 C648
L: W/O TPM (Ղ R704 ) TPM_PW R R335 0_04 3.3VS
TPM_DET 43 10K_04 10K_04 *10u_6.3V_X5R_06
R338 *0_04 3.3V R336 *0_04 5VS
TP_CLK
R704 TP_DATA
C1045 C1044 C643 1u_6.3V_X5R_04
100K_04 D02A
R341 0_04 3.3VS
NONTPM J_TP1
D U34 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 C640 0.1u_10V_X7R_04 C642 C641 D
26 5 PIN5
39,44 LPC_AD0 LAD0 VDD1 1 TP_DATA
23 10 PIN5 47p_50V_NPO_04 47p_50V_NPO_04
39,44 LPC_AD1 LAD1 VDD2 2 TP_CLK TP_DATA 44
20 19
39,44 LPC_AD2 LAD2 VDD3 3 TP_CLK 44
17 24 3.3VS
39,44 LPC_AD3 LAD3 VDD4 4 TP_SMB_DAT 4/8 ‫ޏ‬ፖֆ‫ش‬ᒵሁԫી TP_VCC
ࣹრPCLK_TPM‫ۭڶڕ‬ሽॴ‫ڶ‬ՂTPMழᏁ৬BOM 21 C649 C653 C652 5 TP_SMB_CLK
39 PCLK_TPM LCLK TPM 6
22 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 50501-0060N-001
39,44 LPC_FRAME# BUF_PLT_RST# LFRAME#
16 88511-06L
39,44,47,48,53,60 BUF_PLT_RST# LRESET#_1 6-20-94K30-106
LRESET# 9 PIN10 PIN19 PIN24
27 LRESET#_2 R330 R329
39,44 SERIRQ SERIRQ
TPM_PP 7 6 TPM_GPIO 2.2K_04 2.2K_04
PP GPIO
2
Q26A
G
R337 4.7K_04 1 MTDK3S6R
2 NC_1 TP_SMB_CLK 1 6
NC_2 SMB_CLK 38,60,61
D
3
NC_3
5
8 Q26B
NC_4 SMBUS address: 0x2C
G
12 4 MTDK3S6R
13 NC_5 GND_1 11 TP_SMB_DAT 4 3
NC_6 GND_2 SMB_DATA 38,60,61
D
14 18
38 PM_CLKRUN#
R348 *0_04 CLKRUN# 15
LPCPD#_TPM 28
NC_7
NC_8
NC_9
GND_3
GND_4
25
M1
*M-MARK
M5
*M-MARK
M3
*M-MARK
M6
*M-MARK
Sheet 58 of 91
SLB9665TT_5.51 BUF_PLT_RST# R345 *0_04 LRESET# H27 H19 H26 H20 H16 H11
TPM D02A
5/23 ଥ‫ޏ‬TPM FWठ‫ء‬Δ៱றᇆDISABLE R340 *10K_04
*H8_0D4_4 *H8_0D4_4 *H8_0D4_4 *H8_0D4_4 *H6_5B9_5D2_8 *H8_0D3_0
5/10 ᖲዌ
TPM, CCD, TP
C 6-03-09655-0H1 ࠷௣ᝅ֞H56 C
LPC_SIRQ & PM_CLKRUN# ᒔᎁPCHጤ
ጤᏁPULL HIGH
D02A
M16 M4 M2 M15
3/17 ᖲዌ᧢‫֞ޓ‬உ *M-MARK *M-MARK *M-MARK *M-MARK
H6 H8 H9 H7 H35
*H6_0B5_0D4_4 *H6_0D4_4 *H6_0D4_4 *H6_0D4_4 *h5_0d2_8
CCD ٠ᖂរ
CCD_PW R H43 H1 H2 H42

U1
1A 1A 48 mil *C111D111N *C111D111N *C111D111N *C111D111N
3.3VS 4 1 3/17 del H36,H37
5 VIN VOUT
VIN D02
C10
C6
1u_6.3V_X5R_04 CCD_EN3 2 H15 H31 H5
EN GND 2.2u_6.3V_X5R_04 2 2 2
UP7553 5 5 5
M-SOT23-5 3 1 3 1 3 1
4 4 4
44 CCD_EN
*MTH8_0D2_8 *MTH8_0D2_8 *MTH8_0D2_8
From KBC default HI
B
Port 9 L1 2
H39
2
H3
2
H14
H29 B
1 2 5 5 5 2
36 USB_PN9 1 1 1
3 3 3 5
4 3 4 4 4 3 1
36 USB_PP9
*W CM2012F2S-SHORT J_CCD1 4
*MTH8_0D2_8 *MTH8_0D2_8 *MTH8_0D2_8
1 PCB Footprint = MTH8_0D2_8 *MTH8_0D2_8
2
L3 C12 47p_50V_NPO_04 3
HCB1005KF-121T20 4
MIC_DATA_L 3.3VS 5
1 2 H44 H17 H10 H30 2/26 change
50 MIC_DATA MIC_CLK_L 6
1 2 *H10_0D5_5 *H6_5B9_5D2_8 *H6_5B7_0D2_8 *H4_2D2_2 H12 H13
50 MIC_CLK 7 *H4_2D2_2 2
HCB1005KF-121T20 C9 47p_50V_NPO_04 8 5
L2 3 1
87213-0800G
2/18 jy modify 4
BEAD & CAP FOR EMI 6-20-44A00-108
*MTH8_0D2_8
MAIN: 6-20-44A00-108
2ND: 6-21-C3A00-108
EMI_GND2 EMI_GND2 ឭ࣋
EMIឭ
2/18 jy modify
ᎭਪBOT૿
૿ Ꭽਪ TOP૿
૿ Ꭽਪ BOT૿
૿ Ꭽਪ TOP૿
૿ Ꭽਪ BOT૿
૿ D02 Ꭽਪ TOP૿
૿ ᎭਪBOT૿
૿ Ꭽਪ BOT૿
૿
D1 A1 A2 F1 A3 A5 A4 E3 E2 E1 E5 E4 B4 B3 C1 B1 13,14,16,37,45,50,51,52,59,60,63,68,70,72 5VS
A D02A D02A H24 D02A 2,13,31,46,47,49,54,60,61,63,64,66,67,71 3.3V A
H18 H21 H28 H25 H40 H47 H41 H34 H32 H33 H46 H45 H23 H22 H4
H7_5B5_7D3_7 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,59,60,63,67,73,75 3.3VS
H7_5B5_7D3_7 H7_5D3_7 H7_5D3_7 *H7_5B9_5D3_2 *H7_5B9_5D3_2 H7_5D3_7 H7_0B7_2D3_2
H7_5B5_7D3_7
H7_5B5_7D3_7
H7_5B5_7D3_7
H7_5B5_7D3_7
H7_5B5_7D3_7
H7_5D3_7 H7_5D3_7 H7_5D3_7 37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76 5V

5/10 modify footprint
3G
ᖲዌ࠷௣ᎭਪլՂٙ
Title
5/10 modify footprint 5/10 modify footprint
D02A [58] TPM, CCD, TP
5/10 modify footprint
NGFF WLAN USB LAN Board NGFF 3G HDD Board NGFF SSD P67 KB P65 KB PCH PAD Size Document Number Rev
6-34-P750S-010 6-34-M56AS-011-1 6-34-M350S-020 6-34-M56AS-011-1 6-34-D90C0-021-1 6-34-T80VS-022 6-36-00380-25C-1 6-34-T80VS-022 A3
P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
TPM, CCD, TP B - 59
Schematic Diagrams
Fan, LID, KB LED

5 4 3 2 1
VGA FAN CONTROL-Selector CPU FAN CONTROL

5VS
FON1# 1
U48
8
LID SWITCH IC
2 FON GND 7 VDD3
5VS 3 VIN GND 6
C326 C325 4 VOUT GND 5 R33 100K_04
VSET GND
D U26 1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A U2 D
2 12 C513 0.1u_16V_Y5V_04 1 2
11 0B0 VCC CPU_FAN 44
CPU_FAN VCC OUT LID_SW # 13,44
GND
1B0
1
1
10 A0 3 5VS_CPU_FAN D01A C54 C53 D79
S0 GND J_FAN1
3
VGA_FAN2SEN AH9249NTR-G1
5 9 0.1u_16V_Y5V_04 *100p_50V_NPO_04
VGA_FAN1SEN 8 0B1 VCC 1 *V15AVLC0402
1B1 4 C741 2
VGA_FANSEN 44
2
7 A1 6 3
44 VGASEN_SEL S1 GND 10u_6.3V_X5R_06 50273-0037N-001
PI5A3158BZAE 6-20-41130-003 GND GND GND GND D02A
P/N = 6-03-53158-0J1 3/3 ME change
śɥ 44 CPU_FANSEN
J_FAN1 6-02-09249-LC0 PSU1, PSU2

śɨ
3
R454 4.7K_04 3
3.3VS
1
1 2
Sheet 59 of 91 VGA FAN1 CONTROL ‫ػ‬٠LED KEY BOARD W HITEKB

. *HCB1608KF-121T30
լՂٙ)
5VS L29 KB_LED_PW R
(Medionլ C600
Fan, LID, KB LED C

5VS
VFAN1ON# 1
U56
FON GND
8
3.3VS
2/26 լՂٙ
P650Rx P670RX
10u_6.3V_X5R_06
W HITEKB
C
2 7 D01A GPIO D02A D02A
3 VIN GND 6 J_LEDKB1 J_LEDKB2 5VS U64
VOUT GND R243 H: W / KB_LED
C908 C907 4 5 FON-KB 1 8
VSET GND *10K_04 L: W/O KB_LED 6 KB_LED_PW R 6 KB_LED_PW R
2 FON GND 7
1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A 5 5 3 VIN GND 6
4 4 KB_LED_PW R VOUT GND
4 5
VGA_FAN1 44
VGA_FAN1 KBLED_DET 39 3
2
3
2
C974
0.1u_16V_Y5V_04
VSET
NCT3940S-A
GND
5VS_VGA_FAN1 1 1 W HITEKB
R256 W HITEKB
J_VFAN1 *10K_04 50501-0060N-001 50501-0060N-001
KBLIGHT_ADJ 44
P65 P67W HITE
1
2 6-20-94K30-106 6-20-94K30-106
C928
3
10u_6.3V_X5R_06 85204-03001
6-20-23120-003
VGA_FAN1SEN J_FAN1
3
D02B
R268 4.7K_04
3.3VS
1
B
VGA FAN2 CONTROL B
5VS U27
VFAN2ON# 1 8
2 FON GND 7
3 VIN GND 6
C559 C561 4 VOUT GND 5
Del RTD3
VSET GND
1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A
VGA_FAN2 44
VGA_FAN2
5VS_VGA_FAN2
J_VFAN2
1
C552 2
3
10u_6.3V_X5R_06 88266-03001
6-20-63130-103
VGA_FAN2SEN J_FAN1
3
R649 4.7K_04
3.3VS
1
A A
SATA3_5VS 60
VDD3 5,30,35,38,41,43,44,45,47,60,62,63,64,65,66,67,68,69,70,71,72 Title
VIN 13,44,45,60,61,62,63,64,65,71,73,74,75,76 [59] FAN, LID, KB LED
3.3VS 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,60,63,67,73,75
3.3V 2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 Size Document Number Rev
5VS 13,14,16,37,45,50,51,52,58,60,63,68,70,72
5V 37,47,50,55,60,61,63,66,67,69,71,73,74,75,76
A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
B - 60 Fan, LID, KB LED

Schematic Diagrams
Connector
5 4 3 2 1
3.3VS
J_LAN1
LED BOARD
J_LED1
C936
LAN BOARD 5V
C500 C518
1
3
5
1
3
2
4
2
4
6
USB_PN4
USB_PP4
36
36
12 LED_ACIN 44 *0.01u_16V_X7R_04 ܶUSB3.0x2, PHONE JACK)

(ܶ 10u_6.3V_X5R_06 0.1u_16V_Y5V_04
7
9
5
7
6
8
8
10
USB3_TXN4 39
11 LED_PW R 44 9 10 USB3_TXP4 39
11 12
10 LED_BAT_CHG 44 11 12 USB3_RXN4 39
13 14
9 LED_BAT_FULL 44 13 14 USB3_RXP4 39
NC1 15 16
8 LED_NUM# 44 15 16
17 18
7 LED_CAP# 44 3.3VS 3.3V VDD3 17 18
NC2 R247 0_04 PS8331_SW 3,13,30,39 19 20
6 LED_SCROLL# 44 19 20
21 22
5 AIRPLAN_LED# 44 C567 C546 C533 21 22
D R248 *0_04 23 24 D
4 LED_HDD# DGPU_PW R_EN 31,39,44,67 23 24
25 26
3 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 25 26
GND 27 28
2 29 27 28 30
1 3.3VS 29 30
31 32
FP225H-012S10M 33 31 32 34
33 34 CLK_PCIE_GLAN# 40
PCB Footprint = fp225-012g 3.3VS VDD3 35 36
35 36 CLK_PCIE_GLAN 40
37 38
MAIN: 6-20-94K50-012 ᓮEC PIN24ಬ‫ُנ‬SSD 39 37 38 40
2ND: 6-20-94K60-012 39 40 PCIE_TXN5_GLAN 36
LED೯‫܂‬ऱਐ‫ق‬ΔຘመAPຏवBIOS ‫ܫڇ‬वEC ೚‫נ‬೯‫܂‬ 41
41 42
42
PCIE_TXP5_GLAN 36
43 44
5
3.3V 43 44 PCIE_RXN5_GLAN 36
45 46
1 45 46 PCIE_RXP5_GLAN 36
LED_HDD# EC_SSD_LED# 44 47 48
4 47 48
49 50
2 49 50 SIM_DET 49
PCH_SATAHDD_LED# 37 51 52
51 52 LAN_CLKREQ# 40
53 54
U21
POWER BTN BOARD 49 UIM_PW R
55 53 54 56
PCIE_W AKE# 38,53
3
74AHC1G08GW 49 UIM_DATA 55 56 LAN_W AKEUP# 35,44,47

57 58
49 UIM_CLK 57 58 BUF_PLT_RST# 39,44,47,48,53,58
59 60 DD_ON# 47,61,63
49 UIM_RST 59 60
CONN 3.3VS 3.3VS

61
63
65
67
61
63
65
62
64
66
62
64
66
68
CLK_PCIE_SD40# 40
CLK_PCIE_SD40 40
J_BTN1
1
J_BTN1
1
69
71
73
67
69
71
68
70
72
70
72
74
PCIE_TXN6_SD40
PCIE_TXP6_SD40
36
36
Sheet 60 of 91
73 74 PCIE_RXN6_SD40 36
75 76
63 M_BTN#
2
3
4
NC1
NC2
4 77
79
75
77
76
78
78
80
PCIE_RXP6_SD40 36
Connector
C
Audio Jack BOARD
5VS_PW R 3VS_PW R
FP226H-004S10M
PCB Footprint = JXT_FP226H-004XXAM
MAIN: 6-20-94A40-004
79 80
50185-08041-001
PCB Footprint = 50185-0804X
SD40_CLKREQ# 40 C
29
27
J_AUDIO1 ALC892
29 30
30
28 5VS
Co-lay 2ND: 6-20-94A60-004
6-21-C2400-240
27 28
25
25 26
26 R-A/M CONNECT 5VS D02A 5VS_PW R 3VS_PW R D02A 3.3VS 5VS_PWR 3VS_PWR
23 24
21 23 24 22 J_AUDIO_PIN32 R788 0_04 5V 3.3V
19 21 22 20 HEADPHONE-R
AUDG ALC898 L20 . HCB1608KF-121T30 L21 HCB1005KF-121T20 ALC898 5VS 5V 3VS 3V
JD_SENSEA 19 20
JD_SENSEB
17
15 17 18
18
16
HEADPHONE-L
HP_DET
D02B RSVD.
ALC892 L19 . HCB1608KF-121T30 L22 *HCB1005KF-121T20
MIC1_R_M 15 16 AUDIO_DET
D02 4/25 ESS board ሽᄭ‫ޏ‬൷VSሽ for lot 3 /Energy Star 6.X test
L20 L19 L21 L22
13 14
MIC1_L_M 11 13 14 12 5/10 L19, L20‫ޏ‬0603
11 12
D02A
SPDIFO 9 10 SYS_CLK
9 10 2/26 modify ESS V X V X
SIDE_R 7 8 SYS_DATA
SIDE_L 5 7 8 6
5V 5VS_PW R D02C
5 6 D01A U81 30mils
3 4 3D X V X X
3 4 HP_JSGND_EN 1 5
1 2 R287 1M_04 VIN IN VOUT
1 2 2
ALC892 GND C1145
88107-30001 R1
6-21-41A00-215
R790 AUDIO_DET
GND AUDG R789 10K_04 3D_PW R 3 4 300K_1%_04 1u_6.3V_X5R_04
SHDN# SET H=ESS board
ჸ಻3D AMP՛
՛ࣨՂ‫ڼ‬೴ሿٙ(J_AUDIO2) C1144 C1142 NCT3705U-A
3D_PW R 3D_PW R
L=3D AMP board
3D_PW R from EC
44 EC_AUDIO_DET R277 0_04 AUDIO_DET
SMB_CLK SYS_CLK 1u_6.3V_X5R_04 *0.01u_16V_X7R_04 C
38,58,61 SMB_CLK R708 0_04 ALC892 R2 35 PCH_AUDIO_DET R278 *0_04
SMB_DATA SYS_DATA 2/26 modify 3D_PW R 3D_PW R
38,58,61 SMB_DATA R709 0_04 ALC892
B C1143 R791 from PCH B
D01A 100K_1%_04
*0.01u_16V_X7R_04 3D_PW R SPDIFO
3D_PW R
2/5 EMI check EMC10

VOUT=1.25(1+R1/R2)
5VS_PW R
J_AUDIO2 ALC898
3VS_PW R VDD3
Rsvd. լՂٙ R1=300K, R2=100K 100p_50V_NPO_04
39 40 VOUT=5V alway Ղٙ,close to J_AUDIO2
37 39 40 38 GND
35 37 38 36 5VS R276
35 36 D02B
33 34 100K_04
33 34 RSVD.
31
29 31
29
32
30
32
30
J_AUDIO_PIN32
HEADPHONE-R
HEADPHONE-R
ALC898
50 HDD BOARD
50
50
JD_SENSEA
JD_SENSEB
50 MIC1_R_M
JD_SENSEA
JD_SENSEB
MIC1_R_M
MIC1_L_M
27
25
23
21
27
25
23
28
26
24
28
26
24
22
HEADPHONE-L
HP_DET
AUDIO_DET
HEADPHONE-L
HP_DET 44
50
D02
2
J_SATA1
2 1
1
FP
50 MIC1_L_M 21 22 TPS65131PS 50 4 3 3.3VS
SPDIFO 19 20 SYS_CLK 4 3
50 SPDIFO 19 20 6 5
50 SIDE_R
SIDE_R 17 18 SYS_DATA 3/21 ADD ESS board ۘᖲ‫ܑܒ‬pin 6 5 SATA_TXP3 37
SIDE_L 17 18 8 7
50 SIDE_L 15 16 2/26 modify 8 7 J_FP1
15 16 10 9 30mil 30mil
13
11 13 14
14
12
D01A
HP_JSGND_EN R777 ALC898 12 10 9 11
SATA_TXN3 37
1
L31 .FCM1005KF-121T03
AL898_VREFO 50 14 12 11 13
11 12 5V SATA_RXN3 37 NC1 2
D02A 0_04 4/28 ଥ‫ޏ‬ESS bo sound ംᠲ 40mil 16 14 13 15 3 USB_PN7 36
5V 16 15 NC2
18 17 4 USB_PP7 36
+15V 9 10 40Pin & 30Pin Conn Co-layout ࡐࡳPin 18 17 SATA_RXP3 37
9 10 5VS 20 19
+15V 7 8 ፖPin8,10ૹᦤᙑၲ, Pin8,10 ᧢‫ګ‬NC Pin. C1051 20 19 FP226H-004S10M
7 8 22 21
5 6 D02C 22 21 PCB Footprint = JXT_FP226H-004XXAM
5 6 24 23 M:6-20-94A40-004
-15V 3 4 *10u_6.3V_X5R_06 24 23 P670RG-M_TPLED 44
3 4 AL898_GPIO33 50 26 25 S:6-20-94A60-004
-15V 1 2 26 25
A 1 2 28 27 A
30 28 27 29
D01A 88107-40001 30 29 3.3VS
6-20-41A30-220 50185-03041-001
GND AUDG
PCB Footprint = 50185-0304X
ჸ಻ESS՛
՛ࣨՂ‫ڼ‬೴ሿٙ(J_AUDIO1)
SYS_CLK 2/26 modify 2,13,31,46,47,49,54,58,61,63,64,66,67,71 3.3V Title
ALC898 R282 0_04
from EC SMBUS 30,44,45,56
30,44,45,56
SMC_VGA_THERM
SMD_VGA_THERM
ALC898 R283 0_04 SYS_DATA 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,63,67,73,75
37,47,50,55,59,61,63,66,67,69,71,73,74,75,76
3.3VS
5V
[60] CONNECTOR
ALC898 R288 *0_04 13,14,16,37,45,50,51,52,58,59,63,68,70,72 5VS Size Document Number Rev
43 PCH_SCL_ESS D01A
from PCH I2C 43 PCH_SDA_ESS
ALC898 R289 *0_04 5,30,35,38,41,43,44,45,47,59,62,63,64,65,66,67,68,69,70,71,72
13,44,45,61,62,63,64,65,71,73,74,75,76
VDD3
VIN A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
Connector B - 61
Schematic Diagrams
DDR 1.2V / 0.6VS

5 4 3 2 1
2A
DDR4: 1.2V/0.6VS 5V A
PD24
C
PQ68
MDU1516 PC393 PC389
VIN
D
ழΔUP6163
DDR4ழ ULTRASO-8
EEEFZ1E101P
PU23 100u_25v_SMD
լ‫ױ‬൅6-02-05616-CQ0ᅝ
ᅝ2ND
0.1u_50V_Y5V_06
UP6163 RB0540S2 G
VDDQ_R +
S
VTT_MEM(0.6V) PC368
23
VLDOIN VBST
22
PC371 0.1u_10V_X7R_04 1.2V
DEFAULT SHORT
D 2 1
2A 10u_6.3V_X5R_06
24 21
EMR13
VDDQ_R
13A D
VTT_MEM VTT DRVH DEFAULT SHORT
PL21
PJ56 2mm 0_06 BCIHP0730-1R0M PJ61
1 20 1 2 1 2
PC363 VTTGND LL VDDQ
PC354 PC364
PR465 EMR14 8mm
22u_6.3V_X5R_08 *10u_6.3V_X5R_06 *10u_6.3V_X5R_06 0_06 2 19
VTTSNS DRVL PQ63 EMC9 PC390 PR464 *0.003_12
C
0_06 +
PD26 CSOD140SH
MDU1512
330uF_2.5V_12m_6.6*6.6*4.2
3 18 ULTRASO-8 2200p_50V_X7R_04
D
PR198 0_06 GND PGND 17 PR514 0_06
VDDQ_R CS_GND
5V 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
5V PR202 *0_04 4 16 PR510 6.49K_1%_04 G
EMR12
A
MODE CS
S
PR201 *0_04 15 2.2_06
PC359 0.1u_10V_X7R_04 5 PVCC5 14 PR513 2.2_04
VTTREF VCC5
5V PR463 0_06 6 13 PC170 PC381

COMP PGOOD 3.3V
1u_10V_Y5V_06
1u_10V_Y5V_06
EE D02
PR462
PR216 *22_04 8 11 PR478
VTT_MEM VDDQSNS S5
*1000p_50V_X7R_04
PC358
Sheet 61 of 91 PR512 0_06
D
9 10
VDDQSET S3 47K_04
*10_04
PQ14
DDR 1.2V / 0.6VS
*1000p_50V_X7R_04
VTTEN_R G
GND
VDDQSET
NC
NC
*2SK3018S3 PR511 *0_04
VDDQ_PW RGD 64
PC355
C C
12
25
PR497
5V PR489 4.75K_1%_04 3/31 power modify
*10K_1%_04
3/31 power modify
PR494 8.06K_1%_06
PC370 *100p_50V_NPO_04
3.3V
EE PR212 10K_04 VTTEN PR500 68K_1%_04

5V 5V
3.3V
D
PR229
PC166
D
PQ13 PQ65 PQ64 PC373
VTTEN_R 100K_04
PR228 *0_04 G *0.1u_16V_Y5V_04 PR506 100K_04 G 2SK3018S3
14,15,16,37,59,63 SUSB 0.1u_10V_X7R_04
2SK3018S3 G PR230 VDDQ_PW RGD
D
S
S
1
PR220 10K_04 *2SK3018S3
D
5V
S
1
PQ67 PJ64 100K_04 PQ20
G
C
PJ26 *CV-40mil
38,44,64,66 SUSC#
*CV-40mil 2SK3018S3 G 2SK3018S3
PR232 1K_04 B PQ16
2
S
5 DDR_VTT_PG_CTRL
BTN3904
2
S
PR217
C
M-SOT23-CBE
100_04
E
C626
47,60,63 DD_ON# VDDQ_R B PQ15
0.01u_16V_X7R_04
BTN3904
ON
E
B M-SOT23-CBE B
1.35V/1.5V ֊ངᒵሁթᏁᖄԵ
,໢ԫሽᄭ‫ء଺ش‬IC PG
ሽᚘࠉTABLE
DDR GPIO OUTPUT VOLTAGE SELECT
TO DDR PWM FB Pin
PR488 NOTE:DDR PWM։ᚘሽॴᏁ٦ᒔᎁᓳᖞ
GPIO DDR Vout *0_04
VDDQSET PR467 PR473
PU22 0_04 0_04
LO 1.35V PR468 10_04 1 8 VDDQSET
5V VCC OUT
2 7
3 BUS_SEL NC 6 PC366 *1u_6.3V_X5R_04
HI 1.2V 5V GND NC
PC361 R1 4 5
PR490 PR479 SDA SCL
1u_6.3V_X5R_04 3/31 power modify
3/31 power modify 10K_04 UP1804AMA8
3.3V 22K_1%_04
PR502 0_04 SMB_CLK 38,58,60
PR505
PR501 0_04 SMB_DATA 38,58,60
D
PR496 100K_04
1
DEFAULT PR495 *0_04 TO PCH

PQ62 PJ63
A G PR487 R2 A
*CV-40mil 3/31 power modify
*100K_04 MTN7002ZHS3 *0_04
D
from PCH PJ59

2
1
1 2 G PJ60
38 DDR_VOL_SEL
D01A PQ61 *CV-40mil
S
1mm
2SK3018S3
2
9,10,11,12,66 2.5V
Short PR483 37,47,50,55,59,60,63,66,67,69,71,73,74,75,76 5V Title
10K_04 3/4 power change 13,44,45,60,62,63,64,65,71,73,74,75,76 VIN [61] DDR 1.2V/0.6VS
7,9,10,11,12,38,66 VDDQ
2,13,31,46,47,49,54,58,60,63,64,66,67,71 3.3V Size Document Number Rev
9,10,11,12 VTT_MEM A3 P650RS 6-71-P65S0-D02C D02C
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71,72 VDD3
5 4 3 2 1
B - 62 DDR 1.2V / 0.6VS

Schematic Diagrams
VDD3, VDD5
5 4 3 2 1
D D
VREF
PR293 *0_04 PR297 0_04

PC249
1u_10V_Y5V_06
PR291 PR308 4/7 power change value

EN_3V EN_5V
PC126
2/19 power change 130K_1%_04 80.6K_1%_04 PC135
1000p_50V_X7R_04 1000p_50V_X7R_04 VIN
100u_25v_SMD
1
PU15
3/1 power Add VREG3 D02 5A
3A
EN2
TONSEL
VFB2
VFB1
EN1
VREF
VIN PC289 PC290
*EEEFZ1E101P
D01A PC412 PC241 PC246 PC245 PC247 7 24 EE
EEEFZ1E101P
VO2 VO1 100u_25v_SMD
+ + VDD3_5_POK 64
PC280
+ +
Sheet 62 of 91
0.1u_50V_Y5V_06
PC244
*4.7u_25V_X5R_08
*4.7u_25V_X5R_08
EEEFZ1E101P
EEEFZ1E101P
8 23 PR310 10K_04 SYS5V 0.1u_50V_Y5V_06
VDD3 1u_10V_X7R_06
9
LDO3 POK
22 PC255 0.1u_10V_X7R_04
VDD5 VDD3, VDD5
D
BOOT2 BOOT1
5
5
5
5
PC243 TPS51125ARGER
C 10A PQ36 0.1u_10V_X7R_04 PQ51 C
VDD3 SYS3V
MDV1526URH 4 10
UGATE2 UGATE1
21 G MDU1516
SYS5V
10 A VDD5
PL14 ULTRASO-8 PL19
3
2
1
S
PJ41 BCIHP0730-4R7M EMC2 BCIH1040-2R2M PJ62
6-02-51125-CQ1 3/28 ᇞEVT BUG, over spec
2 1 2 1 *1000p_50V_X7R_04 11 20 2 1 1 2
PHASE2 PHASE1
5mm PQ35 EMC8 5mm
R1
C
5
5
5
5
PC130
for EMI
12 19
FM5822 PD23
DEFAULT SHORT MDV1524URH *1000p_50V_X7R_04 DEFAULT SHORT
GND PAD
SKIPSEL
C
PR138 *0.003_12 PC127 PD7 LGATE2 LGATE1 PC133 PR146

R1
VCLK
LDO5
4 G *1000p_50V_X7R_04 30.1K_1%_06
GND
PR509 *0.003_12
EN0
VIN
0.1u_16V_Y5V_04
PC242 PR141
3
2
1
PQ54
S
+
100p_50V_NPO_04
13K_1%_06 CSOD140SH for EMI
PC362
MDU1512
A
D02
220u_6.3V_6.3*6.3*4.2
EMR5
EMR11
*5.1_06
13
14
25
15
16
17
18
ULTRASO-8
A
*5.1_06 PC377
+
PR296
EN_ALL R2 0.1u_16V_Y5V_04
R2
220u_6.3V_6.3*6.3*4.2
PR148 PR149 PR145
PR142 *680K_1%_04 19.1K_1%_06
PR298
19.1K_1%_06
VREF PR305 0_04 0_04 *0_04
PR143 *0_04
D02A Vout=2*(1+R1/R2) VREG5
2.2_06
5/25 ᇞEVT BUG, CCDሽᚘመ‫= ܅‬2*(1+13K/19.1K) PR144 *0_04 Vout=2*(1+R1/R2)
=3.36 VIN1
VREG5 =2*(1+30.1K/18.7K)
PD20
PC248
PC131 =5.219
B C A 1u_10V_X7R_06 B
VIN
4.7u_25V_X5R_08
RB751V-40(lision)
EE PR292 *0_04 EN_3V

VREG5
EN_3V5V
Qpxfs!po!WEE40WEE6 PR295 0_04 EN_5V
QXN PR315
AC_IN VDD5 լՂٙ
6
10K_04 D
PQ40A
DD_ON_EN_VDD 2 G
PQ40B 3 S MTDK3S6R
D 1
MTDK3S6R
1
PR316
5 G PJ42
44,46,63 DD_ON S *CV-40mil
100K_04
4
2
D
G
44,46,63 USB_CHARGE_EN
A PQ41 A
S
2SK3018S3
D
38,44,63,64 EC_SLP_SUS#
PQ42
G DMFWP!DP/!!ᙔϺႝတ
64 VREG5
S
*2SK3018S3 Title
5,30,35,38,41,43,44,45,47,59,60,63,64,65,66,67,68,69,70,71,72 VDD3
46,63,64 VDD5
[62] VDD3,VDD5
63 VIN1 Size Document Number Rev
13,44,45,60,61,63,64,65,71,73,74,75,76 VIN A3 P650RS 6-71-P65S0-D02C D02C
5 4 3 2 1
VDD3, VDD5 B - 63
Schematic Diagrams
5V, 5VS, 3.3V, 3.3VS, 3.3VA

1 2 3 4 5
VIN1
U35
VIN VA VIN1 R339 10K_04 1 8 R344 100K_04 DD_ON
VA VA VIN1
R343 1_1%_06 2 7 R342 *100K_04
VIN VIN DD_ON_LATCH USB_CHARGE_EN 44,46,62
C654 C651 C650
R346 10K_04 3 6 R350 10K_04 VDD3
60 M_BTN# M_BTN# PWR_SW#
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06
R349 *100K_04 4 5 R347 1K_1%_04
INSTANT-ON GND PW R_SW # 44
USB_CHARGE_EN R351 1K_1%_04 P2808B0
Clost to P2808B0
VDD3
A A
C819 U51 G5016
3.3VA 0.1u_16V_Y5V_04 1
2 IN1
IN1
IN2
IN2
6
7
VDD3 VDD3 3.3VA 3A 13

14 OUT1 OUT2
8
9
C804 OUT1 OUT2
12 10
PR306 PR155 VDD3 0.1u_16V_Y5V_04 CT1 CT2
VBIAS
R498
GND
GND
EN1
EN2
10K_04 10K_04 100_04 C796
220p_50V_NPO_04
DD_ON# SUSB R505
DD_ON# 47,60,61 SUSB 14,15,16,37,59,61
15
11
5
100K_04
6
PQ39 PQ43 Q43A D
R499
G 2SK3018S3 PC250 G 2SK3018S3 PC137 2G 10K_04
44,46,62 DD_ON 13,38,43,44,45,46,51,53,64 SUSB# S 3.3VA_ON
MTDK3S6R VDD3
1
38,44,62,64 EC_SLP_SUS#
S
*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
3
PR294 PR326 Q43B D C833 C818
1u_6.3V_X5R_04
100K_04 100K_04 3.3VA_ON 5G R512 *10K_04 *0.1u_10V_X7R_04
VDD3
Sheet 63 of 91 MTDK3S6R S
4
5V, 5VS, 3.3V, B B
3.3VS, 3.3VA
VDD5 VDD5
C620 U65 G5016 C999
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
5V
5V 6A 13
2 IN1
IN1
IN2
IN2
7
8 6A
5VS 5VS
14 OUT1 OUT2 9
C1013 OUT1 OUT2 C998
R696 D02A BCN 12 10 R694
ᇞ3D ၲᖲᛳၴPOP Noise CT1 CT2 D02
100_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 100_04
VBIAS
GND
GND
EN1
EN2
C1007 C1002
220p_50V_NPO_04 470p_50V_X7R_04 Q53
D
Q54 PR226 10K_04 VDD3_R 1 2 2 1 VDD3_R 2SK3018S3
VDD3
15
11
5
DD_ON# G 2SK3018S3 PJ27 *CV-40mil PJ25*CV-40mil G SUSB
DEFAULT SHORT R320 R308 DEFAULT SHORT
S
S
D02A BCN 10K_04 10K_04
ᇞ3D ၲᖲᛳၴPOP Noise
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB#
VDD5
PJ28 1mm C627 C1014 C615 PJ24 1mm
EMI EMI 1u_6.3V_X5R_04
close Q4 close PU5 *0.1u_10V_X7R_04 *0.1u_10V_X7R_04
close PRS1 VIN VIN VIN ON
VIN SUSB#_EN 66
C
ON C
C737 C613 C355 VDD3 VDD3

C945
C932 U58 G5016 C934
1000p_50V_X7R_04
0.01u_50V_X7R_04
0.01u_50V_X7R_04
1000p_50V_X7R_04
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
6A
2 IN1
IN1
IN2
IN2
7
6A
3.3VS
3.3V 3.3V
C938
13
14 OUT1
OUT1
OUT2
OUT2
8
9
C937
3.3VS
12 10 VDD3
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04 R643
close PJ43
VBIAS
R639 *100_04
GND
GND
EN1
EN2
*100_04 C940 C939
220p_50V_NPO_04 330p_50V_NPO_04 R635
*100K_04
15
11
6
D Q48A
D
Q47
R624 G2
DD_ON# G *2SK3018S3 10K_04 S *MTDK3S6R
1
DD_ON_EN 3.3VS_ON R264 10K_04 SUSB#_EN
VDD3
S
3
D Q48B
C925 C497 C496
1u_6.3V_X5R_04 G5 3.3VS_ON
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 S *MTDK3S6R
4
D D
5,35,36,37,38,39,41,43 3.3VA
13,44,45,60,61,62,64,65,71,73,74,75,76
7,9,10,11,12,38,61,66
VIN
VDDQ ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
Title
62 VIN1
65 VA
46,62,64
5,30,35,38,41,43,44,45,47,59,60,62,64,65,66,67,68,69,70,71,72
VDD5
VDD3
[63] 5V,5VS,3.3V,3.3VS,3.3VA
37,47,50,55,59,60,61,66,67,69,71,73,74,75,76 5V Size Document Number Rev
13,14,16,37,45,50,51,52,58,59,60,68,70,72
2,13,31,46,47,49,54,58,60,61,64,66,67,71
5VS
3.3V A3 P650RS 6-71-P65S0-D02C D02C
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,67,73,75 3.3VS Date: W ednesday, September 07, 2016 Sheet 63 of 91
1 2 3 4 5
B - 64 5V, 5VS, 3.3V, 3.3VS, 3.3VA

Schematic Diagrams
Power 1.0V, VCCIO
1 2 3 4 5
EE For CV test VIN

1A
VDD3
PR285 100K_04
PJ34
1 2
*CV-40mil
PR132 820K_1%_06
VDD1.0
PC112 15u_25V_SMD-B2 PC115 PC113
1 2 VDD1.0_EN 6-11-15612-8B0 PC114
62 VDD3_5_POK 6-11-15612-8B1 +
PJ37 *1mm PU8
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
15u_25V_SMD-B2
*TEPSLB21E156M8R
PC229
PR133 PC116
0_06 0.1u_10V_X7R_04
A 15 13 A
*0.01u_16V_X7R_04 EN_PSV BST
1 2
2
3
4
38,44,62,63 EC_SLP_SUS#
VTT_SELECT VTT VR Output Voltages
PJ36 1mm G5602_5V 16
TON DH
12
1 PL10
V1.0A
10A VDD1.0
low 1.1 V DEFAULT SHORT
BCIHP0730-3R3M
high (V1.1S_VTT) 1.05 V PR130 1 11 9 2 1 1 2
VOUT LX
6-19-41001-73J
2.2_04 8 PJ11 6mm
2 10 PR129 1.74K_1%_04
VCC ILIM EMC1
PR290 *0.003_12
*1000p_50V_X7R_04
5
6
7
PC117 PC118
3 9
C
VFB VDD G5602_5V *330U_2V_D2_D 330U_2V_D2_D
PC111 PQ33 for EMI
PD6
MDU5693 COMMON COMMON
D02
1u_6.3V_X5R_04 4 8 20% 20%
PGOOD DL 2V 2V 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
EMR3 AL POLYMER AL POLYMER
CSOD140SH
PC228 *5.1_06
A
3.0A@105C 3.0A@105C
M-SOD123
6 7 0.009R 0.009R
AGND PGND 17 1u_6.3V_X5R_04 SMD_7343 SMD_7343
PGND 2/19 power change
NC
NC
Sheet 64 of 91
14
VDD3 PR286 10K_04 G5602R41U
B
VDD1.0_PW RGD
B
Power 1.0V, VCCIO
3.3V
G5602_5V PR128 36K_1%_04
VREG5 DEFAULT SHORT
20mil 2 1 20mil
PC110 *15p_50V_NPO_04 3.3V
PJ8 1mm R478
VDD5 10K_04
20mil 2 1 20mil ON
PR127 VCCIO_PW RGD
PJ9 *1mm
100K_1%_04 VCCIO_PW RGD 43
R497
0.75*(1+36K/100K)=1.02 10K_04
D
Q40 C765
VCCIO G
2SK3018S3 *0.01u_16V_X7R_04
S
R527
1
B Q45
NOTE: 100K_04 BTN3904 PJ39
E
C837 M-SOT23-CBE *CV-40mil
1.0V_VCCST Ton need <10ms
2
G5016 TURN-ON TIME=1.21ms VDD1.0 VDD1.0 0.022u_16V_X7R_04
DEFAULT SHORT
C821 G5016 U17 C835
C 2 1 C
1.0V_VCCSFR
0.1u_16V_Y5V_04 6 1 0.1u_16V_Y5V_04
1.0V_VCCST
1mm
2
PJ14
1
1.0V 1A
7
8
IN2
IN2
IN1
IN1
2
13 6A
DEFAULT SHORT
1 2
VCCIO VCCIO
9 OUT2 OUT1 14
1mm PJ13 C401 OUT2 OUT1 C400 PJ12
C395 C394 VDD3
10 12 3mm
0.1u_16V_Y5V_04 CT2 CT1 0.1u_16V_Y5V_04 R528
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
VDD3
VBIAS
*100_04
GND
GND
R181
EN2
EN1
C408 C407
*100_04 220p_50V_NPO_04 R503
220p_50V_NPO_04
R502 *100K_04
5
11
15
6
D Q44A
*100K_04
6
Q15A D
R175 R166 G2
68K_1%_04 10K_04 S *MTDK3S6R
2G
1
SUSC# VCCIO_EN
*MTDK3S6R S38,44,61,66 SUSC#
3
D
1
C813 Q44B
C375
3
Q15B D VDD3
G5 VCCIO_EN
VCCIO_EN 66 S
C365 1u_6.3V_X5R_04 0.1u_10V_X7R_04 *MTDK3S6R
SUSC# 5G
4
S VREG5 62
*MTDK3S6R
4
0.1u_10V_X7R_04 VDD1.0 40,41,66

VDD3 VCCIO 2,3,7
VDD3 5,30,35,38,41,43,44,45,47,59,60,62,63,65,66,67,68,69,70,7
VIN 13,44,45,60,61,62,63,65,71,73,74,75,76
0.1u_10V_X7R_04 C361 VDD5 46,62,63
D 1.0V_VCCSFR 7 D
5
DEFAULT SHORT 1.0V_VCCST 5,7,37,38,73,75

1 5V 37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76
VDD1.0_PW RGD VDDQ_PW RGD 61
1 2 1 2 4 3.3V 2,13,31,46,47,49,54,58,60,61,63,66,67,71
2
SUSB# 13,38,43,44,45,46,51,53,63
PJ35 *CV-40mil PJ38 1mm
U49
3
For CV test 74AHC1G08GW

Title
[64] POWER 1.0V,VCCIO
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5
Power 1.0V, VCCIO B - 65

Schematic Diagrams
AC_In, Charger
1 2 3 4 5
VA
470K_04
PC182
SMART CHARGER
0.1u_50V_Y5V_06
PR239
VIN
4
A A
1 5
8A V_BAT
2 6
9 3 7 PR223
8 PQ57 8
7 3 EMB20P03V 9
6 2 PC190 PQ19 20K_04
D01A
12A 5 1
3/2 change PC191 EMB20P03V 3/2 change
EML1
4
1500p_50V_04
2/19 power change
HCB2012KF-800T80
0.1u_50V_Y5V_06
9 1 5
8 2 6
3/3 del dc-jack
EML3 7 3 PQ56 3 7
HCB2012KF-800T80 6 2 EMB20P03V 8
4/1 power modify 0.02_1%
5 1 9
PQ18
VA PRS7 4/25 power modify PD25 ‫ޏ‬լՂٙ EMB20P03V PRS2
EML2
4
J_DC_JACK1 HCB2012KF-800T80 VA1 6-19-41001-680
0.01_1%_32 *0.01_1%_32
1
230w 9
PD25 *FMS3004-AS-H
PL23
G1/G2 2 GND1 PC192

8
7 3
PRS6
C A
BCIHP-0730 8R2M
PRS1 3A
GND GND2 PC2 PC1 PR243 6 2
PR197
GND 0.01_1%_32 0.01_1%_32
0_04
5 1 PR526 PD27 PC180 PC181
C
D02A *470K_04
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
207B07BHB0A PQ55 PC379 PC384 PC376 PC380 2.2_04 PC183 PC175 PC187
0.1u_50V_Y5V_06
1
FMS3004-AS-H
0_04
PCB Footprint = 2DC-G213-B48 EMB20P03V PC365 PC392 PC189 PC188
PR236
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
6-20-B3J10-003 + PR525 PC184 PC185
4.7u_25V_X5R_08
4.7u_25V_X5R_08
PR529
100K_04
PC395
Sheet 65 of 91
4.7u_25V_X5R_08
EEEFZ1E101P
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
0_04
1500p_50V_04
1000p_50V_X7R_04
0_04
2
A
4700p_50V_X7R_04
PR235
PR192
AC_In, Charger PR242

15K_1%_04
PC177
PC391 PC394
34
14
15
16
17
18
19
24
25
26
20
21
22
23
27
33
PC178 PC179 4700p_50V_X7R_04
B 4700p_50V_X7R_04 B
Battery Voltage:
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
GNDP
GNDP
GNDP
LX
LX
LX
LX
LX
LX
*0_06 4700p_50V_X7R_04 4700p_50V_X7R_04 0.22u_16V_X7R_06
VA PD28
S D A
MDL914S2
C
PR530
VAC ICHP
4 ICHP 12V~16.8V
BST 13 1 ICHM J_BAT1
PQ22 10_06 BST ICHM
PR240 MTE1K0P15KN3 C A VDDP 29 11 PR519 330_04 1
G
VDDP SDA 2
300K_1%_04 PD9 MDL914S2 IACM 32 10 PR520 330_04 SMC_BAT PL3 HCB1005KF-121T20 3
IACM PU25 SCL SMD_BAT PL2 HCB1005KF-121T20 4
C
IACP 31 OZ8685LN-A3 6 IAC1 5
IACP IAC 44 BAT_DET 6
6-02-08685-CQ1 PD13 PD11 PD14 PD12
PQ12 G PR181 100K_1%_04 AC AV 9 1.0DX_VCCSTG 7
ACAV 8
SS1040WG
*MMSZ5232BS
*MMSZ5232BS
PR241 MTN7002ZHS3
PR517
SS1040WG
EMC5
30 12 50458-00801-002
A
100K_1%_04 VAC PROCHOT# 6-21-63900-108
*51_04
PMON
COMP
GNDA
GNDA
EMC6
PSYS
5
FBV
D01A PQ23 PR221 PC396 IBSET
D
30p_50V_NPO_04
3/4 power change 2SK3018S3 PC174 PR518 *0_04
H_PROCHOT# 5,73,75 SMC_BAT 44
EMC7
100K_04
28
35
8
1000p_50V_X7R_04
30p_50V_NPO_04
G PR174 0_04 1u_25V_X5R_06
44 LOT6_CHG 44 PMOSFET_CONTROL#
S
PR527
PR528
PC186 PR522 PR231
PR227
30p_50V_NPO_04
Hi-----Battery in Charge 33_1%_04 V_BAT
Low-----Battery remove no
4.7u_25V_X5R_08
charge EC GPIO PD pin 470K_04 100K_1%_04 SMD_BAT 44
PC385 PR225
27K_1%_04
PC387 24.9K_1%_04 PR524 10_04
*0_04
TOTAL_CUR 44
4.7u_6.3V_X5R_06
0.1u_10V_X7R_04
PR523
PC388
PC352
24K_1%_04
47p_50V_NPO_04 1u_25V_X5R_06
GND_SIGNAL BAT DET(BATTERY INTERNAL) :
PR178
C
GND_SIGNAL GND_SIGNAL Option close to EC
2S / 5K / NT1912 C
*0_04 PR224 2S / 10K / NT1908

73 PSYS *28mil_short-p
3S / 2K
PR237 3S/2800mAH / 4.02K
GND_SIGNAL
VDD3 10K_1%_04 4S / 390
4S/2800mAH /7.15K
PR176
10K_04
AC/BATL# 30
D
VDD3
2SK3018S3
G PQ10
S
PR175
PQ21 PR234
47K_04
MTE1K0P15KN3 300K_1%_04
V_BAT S D
BAT_VOLT 44
AC_IN# 44
C
PD8
C
PR238 PR233 PC176
C A PR177 10K_04 B PQ9
G
VA PD10
100K_04 60.4K_1%_04 0.1u_16V_Y5V_04 *RB0540S2
ZD5245BS2 BTN3904
E
M-SOT23-CBE
PR171
A
D
D02A modify 10K_04
AC_IN
G PQ17
VDD3
2SK3018S3
S
D D
Title
5,7,66 1.0DX_VCCSTG
63 VA
[65] AC_IN,CHARGER
5,30,35,38,41,43,44,45,47,59,60,62,63,64,66,67,68,69,70,71,72 VDD3 Size Document Number Rev
13,44,45,60,61,62,63,64,71,73,74,75,76 VIN

1 2 3 4 5
B - 66 AC_In, Charger
Schematic Diagrams
1.0DX_VCCSTG/VCCSFR_OC/2.5V
5 4 3 2 1
NOTE:
1.0DX_VCCSTG TURN-ON need <65us
M5938 TURN-ON TIME=60us 1.0DX_VCCSTG DEFAULT SHORT
1 2 1.0DX_VCCSTG
VCCSFR_OC DEFAULT SHORT
1 2 VCCSFR_OC
VDD1.0 VDDQ
U16 PJ15 1mm U29 PJ22 1mm
1A 9 8 1A 1A 9 8 1A
C398 C380 VIN VOUT C412 C610 C609 VIN VOUT C597
7 7
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT VOUT
D 6 6 D
VOUT VDD3 VOUT R291
R548 VDD3
5 5
VOUT VOUT *100_04
*100_04
M5938BRD1U M5938BRD1U
R501
*100K_04 R297
6
R529 4.7K_04 Q46A D *100K_04
64 VCCIO_EN
6
Q22A D
2G
SUSB#_EN R547 *4.7K_04 VCCSTG_EN 2 4 *MTDK3S6R S SUSB#_EN R316 0_04 VCCSFROC_EN 2 4 2G
63 SUSB#_EN 5V 5V
1
EN VBIAS EN VBIAS *MTDK3S6R S
1
3
R1 Q46B D
R312
3
C858 Q22B D
R533 VCCSTG_EN 5G R1
10K_04 S *10K_04 VCCSFROC_EN
0.1u_10V_X7R_04 *MTDK3S6R 5G
4
C373 C616 *MTDK3S6R S
4
A
A
1u_6.3V_X5R_04
1u_6.3V_X5R_04
D1 D34
D45 D1
RB0540S2 *RB0540S2
Sheet 66 of 91
C
C
1 3 1 3
GATE GND GATE GND
C C1
C372
6-15-59381-7B0
C1
C612
6-15-59381-7B0
C
1.0DX_VCCSTG/
*1 VOUT rising time can be speed up if adding
VCCSFR_OC/2.5V
*0.01u_10V_X7R_04 *0.01u_16V_X7R_04 *1 VOUT rising time can be speed up if adding
R1 & D1 network between EN and GATE R1 & D1 network between EN and GATE
*2 VOUT rising time can be slow down if adding *2 VOUT rising time can be slow down if adding
C1 between GATE and GND C1 between GATE and GND
Layout trace 2A after jumper

D02 5V
PC415
3.3V
PU14
1u_6.3V_X5R_04
2.5V/3A
3A 3
VIN VCNTL
4 S_2.5V PJ6 2.5V
B
PC413 PC414 PR541 47K_04 2.5V_PG 1
POK VOUT
6 3A 1 2
B
10u_6.3V_X5R_06 0.1u_10V_X5R_04 5
NC 3mm
DEFAULT SHORT 2 PR542 PC416 PC417 PC418
EN
1 2 8 7
Ra 21.5K_1%_04 82p_50V_NPO_04 22u_6.3V_X5R_06 *10u_6.3V_X5R_06
38,44,61,64 SUSC# GND VFB
9
PJ65 1mm GND
G9661-25ADJF11U
PR544 10K_04 1 2 PR545

3.3V
Rb Vout = 0.8V ( 1 + Ra / Rb )
PJ4 *CV-40mil PC419 10K_1%_04
For CV test *0.1u_10V_X7R_04 2.52V = 0.8V ( 1 + 21.5/ 10 )
3/18 ආ᝜૞‫ޓ᧢ޣ‬ආ‫ش‬LDO‫ش‬ற power check
A A
2,13,31,46,47,49,54,58,60,61,63,64,67,71 3.3V
13,44,45,60,61,62,63,64,65,71,73,74,75,76 VIN
9,10,11,12 2.5V
7,9,10,11,12,38,61 VDDQ
7 VCCSFR_OC Title
37,47,50,55,59,60,61,63,67,69,71,73,74,75,76 5V [66]1.0DX_VCCSTG/VCCSFR_OC/2.5V
5,7,65 1.0DX_VCCSTG
40,41,64 VDD1.0 Size Document Number Rev
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,67,68,69,70,71,72 VDD3 A3 P650RS 6-71-P65S0-D02C D02C

5 4 3 2 1
1.0DX_VCCSTG/VCCSFR_OC/2.5V B - 67
Schematic Diagrams
1V8_RUN/AON, NV3V3
1 2 3 4 5 6 7 8
5V
2A
PC211
22u_6.3V_X5R_08
PR266
10_06
4/7 power change value
PC215
0.1u_10V_X7R_04
PR280
10K_1%_04
1V8_AON
PU12
EM5841BVT
3Amps @ 1.8V
3.3V PR107 10K_04 GND DFN10
0.200 COMMON PR282
PR283 *160K_04
GND
GND
D01A *0.003_12
31 1V8_AON_PW RGD 9 PGOOD VIN 3 1V8_AON
Default PR278 *0_04 DGPU_PW R_EN_R 10
OpenVReg
PC222 *0.01u_16V_X7R_04 4A PL8
A 31,39,44,60 DGPU_PW R_EN EN/FS A
3.3VS BOOT/NC 8 0.400 1 2 1 2 3A
BCIHP0412-R47M
2 VCC PC102 PC98 PJ33 PC218
5
SW 6 3mm
22u_6.3V_X5R_08
22u_6.3V_X5R_08
0.1u_10V_X7R_04
1 PC223 SW 7
4 PC213 GND 4
2 *0.22u_10V_X5R_04 1 FB GND 5
37 GPPG8_PCH_1V8AON_EN
U70 0.1u_10V_X7R_04 THERM 11
SN74LV1T32DCKR PC217 3300p_50V_X7R_04 PR272 0_04 PR276 0_04
3
M:6-02-05841-CD0
D02 S:6-02-08071-CD0
GND GND
4/20 ආ᝜૞‫ޣ‬ᖄԵ2ND GND
D02 GND Rt PR275 20K_1%_04
VDD3
PR277
Vout= Vref * (1+(Rt/Rb)) Rb PR274 10K_1%_04
GND
GND
1.8V= 0.6 * (1+(20K/10K)) 100_04
4/7 power change value PR284
100K_04
6
PQ32A D
MTDK3S6R
2G
Sheet 67 of 91_Run S
1
3
DEFAULT SHORT PQ32B D
1V8_RUN/AON, 1V8_AON
1V8_RUN 1 2 1V8_RUN
DGPU_PW R_EN_R
MTDK3S6R
5G
S
4
B PU13 PJ32 2mm D02A 5/23 ‫ף‬ՕJumper NV VGA B
NV3V3 PC100
3A
PC101
9
VIN VOUT
8
7
PC214
3A AON Voltage: 0.9A
RUN Voltage : 2.3A
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT
6
VOUT VDD3
PR104
5
VOUT
100_04
M5938BRD1U
PR111
100K_04
6
PQ7A D
3/14 ‫ޏ‬լՂٙ (adjust timeing) MTDK3S6R
Default 2G
1.8V_RUN_EN
D02 2 4 S
PR120 0_04 5V
31 NV_1V8RUN_EN
1
EN VBIAS
3
R1 PQ7B D
PC106 MTDK3S6R
PR121
5G
*10K_04 S
*0.1u_10V_X7R_04
4
PC226
1u_6.3V_X5R_04
D1
PD17 1.8V_RUN_EN
*RB0540S2
C
C C1 C
*0.01u_10V_X7R_04 PC225 1 3
GATE GND
DEFAULT SHORT
6-15-59381-7B0 NV3V3 1 2 NV3V3
PU6 PJ5 2mm D02A 5/23 ‫ף‬ՕJumper
3.3V PR109 0_06 1A 9 8 1A

PC96 PC95 VIN VOUT PC97
7
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT VDD3
PR103
6
VOUT 100_04
5
VOUT PR102
100K_04
6
M5938BRD1U PQ6A D
MTDK3S6R
2G
S
1
3
PQ6B D
PR117 0_04 NV_NV3V3_EN_R 2 4
31 NV_NV3V3_EN EN VBIAS 5V MTDK3S6R
Default 5G
D02 R1 S
PC104
4
PR118
3/21 DEL PD5 *10K_04
0.1u_10V_X7R_04
D PC103 D
D02 NV_NV3V3_EN_R
1u_6.3V_X5R_04
D1
2,13,31,46,47,49,54,58,60,61,63,64,66,71 3.3V PD4
3/14 ‫ޏ‬լՂٙ (adjust timeing) *RB0540S2
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,73,75 3.3VS
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,68,69,70,71,72 VDD3
C
C1
37,47,50,55,59,60,61,63,66,69,71,73,74,75,76 5V
*0.01u_10V_X7R_04 PC105 1 3 Title
14,15,17,30,31,68,70,71
17,18,27,28,31,33
NV3V3
1V8_RUN
GATE GND [67] 1V8_RUN/AON , NV3V3
3,16,27,28,30,31,32,33,39,68,70,71,72 1V8_AON
6-15-59381-7B0 Size Document Number Rev
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 68 1V8_RUN/AON, NV3V3
Schematic Diagrams
NVVDD Phase 1 & 2

1 2 3 4 5 6 7 8
PW R_SRC_NV PW R_SRC_NV_FB
0.400 PRS3
10A 1 4
4/20 NV/power change PR90Ղٙ 2 3
71 PW R_SRC_NV_VINN_R PW R_SRC_NV_VINP_R 71
RL1632T4F-B-R005-FNH
D02
D02 COMMON
1V8_AON PR91 10K_1%_04
1% 1206
PR90 0_04 6-13-R0051-15C
30,70 GPIO6_NVVDD_PSI# PW R_SRC_NV
PR79 *10K_1%_04
layout 1pcs B2 ૹᦤ2PCS 0805 size
PJ2
PC206
PC207
PC62
PC66
PC64
PC81
PC76
PC77
*CV-40mil
A 1 2 PR96 100K_04 VDD3 A
+ D02A + D02A
PR88 *0_04 PR65 0_04
*4.7u_25V_X5R_08
*4.7u_25V_X5R_08
25TQC15MYFB
*4.7u_25V_X5R_08
*4.7u_25V_X5R_08
25TQC15MYFB
1V8_AON D02A
1u_25V_X7R_06
1u_25V_X7R_06
PR78 *0_04 PR92 0_04
NV_NVVDD_EN 31,69
30 GPIO0_NVVDD_PW M_VID
UP9509_VREF PC89 0.01u_50V_X7R_04 D02A

PC227 D1 1 D1 1
UP9509_FBDRTN 4700p_50V_X7R_04 PR68 PC72 EMIᇞNV PWR NOISE 2 2
1u_16V_X7R_06 D02A BCN
20.5K_1%_04
PR546 2.2_04
INS136515880 INS136515287 0.6V~1.2V
PR71 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON NVVDD
UP9509_REFADJ 6.19K_1%_04 PR259 PL6
S1 S1
PR70 D2
4
6 D2
4
6
CMME104T-R22MS
1 2 30A
8 8
4/26 power ᇞrestartംᠲ 100K_1%_04
4.32K_1%_04 PC208 PR255 7 7
,PC85լՂٙ PR6
0.1u_25V_X7R_06 0_04
C
PR69 16.5K_1%_04
place at MOSFET side
D02 PR256 5 G2
PQ29
CSD87350Q5D 5 G2
PQ28
CSD87350Q5D
PD31 2.2_1%_06
Sheet 68 of 91
CSOD140SH
PR76 PC220 PC85
0_04
S2 9 S2 9 ”NP-A”ਢNO PASTEMASK
PC28
A
B
309_1%_04 *0.01u_50V_X7R_04 *4700p_50V_X7R_04
2200p_50V_X7R_04
3/7 co-layլՂٙ
,ࢬ‫א‬ଥ‫إ‬footprint੡PASTEMASK
B
NVVDD Phase 1 & 2
UP9509_FBDRTN PU4
7
1
3/25 ଺50v‫ޏ‬16V ംpower
PR59 300K_1%_04
UGATE1
BOOST1
REFIN
VID
PSI
EN
PW R_SRC_NV
PR57 *82K_1%_04 UP9509_REFADJ 6 24 PH1_UPI_9509 PW M3_1 69 PR49
REFADJ PHASE1
4/26 power ᇞrestartംᠲ PC63 *0.1u_16V_X7R_04 D02 UP9509_VREF 8 23
,PC63լՂٙ VREF LGATE1 20K_1%_04
5VCC PR43 5VS
PW R_SRC_NV layout 1pcs B2 ૹᦤ2PCS 0805 size
UP9509_VREF PR45 *0_04 PR52 *51K_1%_04 9 22
TON PWM3 2.2_06 2/4 power change X7R
33,71 GPU_GND_SENSE
PR97 0_04 UP9509_FBDRTN 10 UP9509PQAG 21 5VCC
FBDRTN PVCC
PC36
PC39
PC41
PC38
PC37
PC40
PR93 100_04 11 20 PC69 PC203 PC202
FB LGATE2
UGATE2
PGOOD
PR82 PC82 BOOT2

ISEN3
ISEN2
ISEN1
1u_25V_X7R_06
1u_25V_X7R_06
*0_04 *33p_50V_NPO_04 12 19
GND
COMP PHASE2 1u_16V_X7R_06 + +

PR98 0_04
33,71 GPU_NVVDD_SENSE
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
*25TQC15MYFB
*25TQC15MYFB
NVVDD PR95 100_04
25
13
14
15
16
17
18
PH2_UPI_9509
PR94
UGATE2_UPI_9509
1K_1%_04
PR83
լՂٙ/G2Ղ
G1լ Ղٙ
*0_04 D1 1 D1 1
PR273 2 2
499_1%_04
C PC83 INS136515829 INS136515528 C
69 PH3_UPI_9509 UGATE2_UPI_9509 PR260 3 G1 MLP08
3 G1 MLP08 DCR 0.6m ohm NVVDD
N17EG2 COMMON COMMON
1000p_50V_X7R_04 PR548 PR258 PL5
2.2_04 S1 S1
PC79 PH2_UPI_9509 PR279 499_1%_04 0_04
D02A BCN D2
4
6 D2
4
6
CMME104T-R22MS
1 2 30A
PR84 *4700p_50V_X7R_04 PR75 EMIᇞNV PWR NOISE 8 8
PR35 PH1_UPI_9509 PR547 499_1%_04 100K_1%_04 7 7
*0_04
15K_1%_04 PR261 PC209 PR11
C
*51K_1%_04
PR89 10K_04 0_04 0.1u_25V_X7R_06 place at MOSFET side PQ27 PQ26 PD32
D02 NV3V3 2.2_1%_06
4/26 power ᇞrestartംᠲ 5 G2 CSD87350Q5D 5 G2 CSD87350Q5D
CSOD140SH
,PR75 51K change to 15K 17,31 NVVDD_PW RGD
PR265 S2 9 S2 9 PC48
A
0_04 2200p_50V_X7R_04
1V8_AON D02A
PR48 Output Voltage Ramp Up Time Test
4/20 NV reserve D02
15K 150us 1ms PR48
15K_1%_04
PR552 20K 500us 1.5ms N17EG2
PH1_UPI_9509 *10K_04
PR553 30K 1ms 4/25 modify timing *0 change to 15k
*0_04 ᓳᖞNVVDDՂ֒඙෷(1.5msĺ150us)
D PR550 GPIO29_NVVDD_PH1 30 OPEN 1.5ms 2ms D
*30.1K_04
D
70,71,72 PW R_SRC_NV_FB
PQ70
3,16,27,28,30,31,32,33,39,67,70,71,72 1V8_AON
G *MTN2002ZS3
14,15,17,30,31,67,70,71 NV3V3
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,69,70,71,72 VDD3
S
PR551 13,14,16,37,45,50,51,52,58,59,60,63,70,72 5VS

*10K_04 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75 3.3VS Title
2,13,31,46,47,49,54,58,60,61,63,64,66,67,71
37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76
3.3V
5V
[68] NVVDD PHASE 1~2
69 PW R_SRC_NV
26,33,69 NVVDD A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
NVVDD Phase 1 & 2 B - 69

Schematic Diagrams
NVVDD Phase 3~4

1 2 3 4 5 6 7 8
լՂٙ/G2Ղ
Ղٙ
PW R_SRC_NV
5V
G1լ layout 1pcs B2 ૹᦤ2PCS 0805 size
PC35
PC30
PC32
PC33
PC31
PC34
PR46
PC205 PC204
2.2_06
N17EG2
PD1
1u_25V_X7R_06
N17EG2
1u_25V_X7R_06
N17EG2
+ +
NVVDD
GPU DECOUPLING
A MDL914S2 A
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*25TQC15MYFB
*25TQC15MYFB
A C 120A 6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ
(ᄵ৫ߓᑇ)
PC61 NVVDD
PC58 N17EG2 D02A
2.2u_16V_X5R_06 N17EG2
0.1u_25V_X7R_06 RESERVE
N17EG2
PH3_UPI_9509 68 PC23 2/11 Stanley
PR27
1K_1%_04 PU2 N17EG2 PR33 PC15 PC90 PC12
N17EG2 UP1909PDN8 0_04 D1 1 D1 1
+
N17EG2 2 2 470u_2V_SMD-V 22u_6.3V_X5R_08 22u_6.3V_X6S_08 *22u_6.3V_X5R_08
6 2 D02A BCN EMIᇞNV PWR NOISE D02A
VCC BST INS136516994 INS136516943 6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ
7 1
PR23 2.2_04 N17EG2
3 G1 MLP08
3 G1 MLP08 DCR 0.6m ohm 0.6V~1.2V (ᄵ৫ߓᑇ) PC17 PC5 PC4
EN DRVH COMMON COMMON PC195
PL4 NVVDD D02A

3 8 PH3_UPI_9509 S1 4 S1 4 CMME104T-R22MS 22u_6.3V_X5R_08 22u_6.3V_X5R_08 *22u_6.3V_X5R_08
+
68 PW M3_1 PWM SW PR257 D2 6 D2 6 1 2 30A
4 5 100K_1%_04 8 8 N17EG2 PC6
GND
PR556 PGND DRVL *470u_2V_SMD-V PC13
N17EG2 7 7 PC7
0_04 4.5m ohm
”NP-A”ਢNO PASTEMASK 22u_6.3V_X5R_08 *22u_6.3V_X5R_08
C
PR252
D02A N17E-G1 22u_6.3V_X5R_08
9
place at MOSFET side 2.2_1%_06 3/7 co-layլՂٙ PC80
PQ24 PQ25 PD33
N17EG2
5 G2 CSD87350Q5D 5 G2 CSD87350Q5D ,ࢬ‫א‬ଥ‫إ‬footprint੡PASTEMASK PC8
+
PC14
N17EG2
CSOD140SH
Sheet 69 of 91 թՂٙ
G1թ S2
N17EG2
9 S2
N17EG2
9 PC199 22u_6.3V_X5R_08
PC16
*22u_6.3V_X5R_08
A
470u_2V_SMD-V 22u_6.3V_X5R_08
2200p_50V_X7R_04 4.5m ohm
NVVDD Phase 3~4

N17EG2
PC9
PC10
PC3
22u_6.3V_X5R_08
22u_6.3V_X5R_08
+
B B
PC11
*470u_2V_SMD-V PC24
PR54
*0_04
N17EG2
P650RS/P670RS = G2 Phase 4.5m ohm
PC22
22u_6.3V_X5R_08
22u_6.3V_X5R_08
P670RP6 = G1 Phase PC25
+
22u_6.3V_X5R_08
470u_2V_SMD-V
D02A
4.5m ohm
PC193
PC21
22u_6.3V_X5R_08
+
NVVDD NVVDDS D02 470u_2V_SMD-V PC197
3/24 change footprint (for ՠᐗംᠲ)
G1 => 2 + 1 4.5m ohm
PC20
22u_6.3V_X5R_08
G2 => 3 + 2 (default)
+
PC194
470u_2V_SMD-V 22u_6.3V_X5R_08
4.5m ohm
PC19
PC65
+
C NVVDD 22u_6.3V_X6S_08 D02A C
470u_2V_SMD-V
࣋ሽᒵሁ 4.5m ohm
(ᄵ৫ߓᑇ)
PC196
PC18
լՂٙ/G2Ղ
Ղٙ
22u_6.3V_X5R_08
+
VDD3
PR1
15_1%_06
PR2
15_1%_06
PR3
15_1%_06
PR4
15_1%_06
G1լ 470u_2V_SMD-V
N17EG2
4.5m ohm
PC68 22u_6.3V_X5R_08 x 28 pcs
10u_6.3V_X5R_06 PC26
+
PR5
2K_04 PQ1 470u_2V_SMD-V
5
5
5
5
QM3006M3 4.5m ohm

4 470u_2V_SMD-V x 10 pcs
1
2
3
D
PQ2
2SK3018S3
PR26 0_04 G PC27
31,68 NV_NVVDD_EN
*10u_6.3V_X5R_06
S
D D
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,70,71,72
13,14,16,37,45,50,51,52,58,59,60,63,68,70,72
3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
VDD3
5VS
3.3VS
2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 3.3V Title
37,47,50,55,59,60,61,63,66,67,71,73,74,75,76 5V [69] NVVDD PHASE 3~4
68 PW R_SRC_NV Size Document Number Rev
26,33,68 NVVDD A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 70 NVVDD Phase 3~4

Schematic Diagrams
NVVDDS
1 2 3 4 5 6 7 8
NVVDDS PHASE PJ48

NVVDDS FOR N17_VGA
*CV-40mil
1V8_AON 2 1 PR353 100K_04 VDD3
PJ47 D02 4/25 modify timing close change to open

*CV-40mil ᓳᖞNVVDDS ENABLEॾᇆ
PR339 Default 2/25 power check
2 1 PR354 4.7K_04 1V8_AON
*0_04 D01A
A A
PR161 0_04 1666_DGPU_ON PR358 10K_04 NV_NVVDDS_EN PW R_SRC_NVVDDS PW R_SRC_NV_FB
30 GPIO3_PS_NVVDDS_VID NV_NVVDDS_EN 31
PC299 0.400 PRS5
PR340 1 4
լՂٙ/G2Ղ
Ղٙ
10A
*10K_04
1200p_50V_X7R_04
G1լ 71 PW R_SRC_NVS_VINN_R 2 3
RL1632T4F-B-R005-FNH
PW R_SRC_NVS_VINNP_R 71
4/7 power change to 10K Ղٙ COMMON
1% 1206
N17EG2 PW R_SRC_NVVDDS
PR162 10K_1%_04 1V8_AON D02
D02
NVVDDS_VREF PR357 *0_04
GPIO20_NVVDDS_PSI 30 5A 3/24 DEL PC3418
1/27 NV CHECK,POWER OK PR555 0_04
PC140 GPIO6_NVVDD_PSI# 30,68
PC317
PC344
PC345
PC328
PC319
PC321
PC330
PC329
N17EG2
1500p_50V_04
PR165 D02A
PR157 PC298 5/4 NV recommend design ৬ᤜ , ‫ߨޏ‬GPIO6
+ +
20.5K_1%_04 0_04
0.1u_50V_Y5V_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X5R_06
4.7u_25V_X5R_06
4.7u_25V_X5R_06
4.7u_25V_X5R_06
4.7u_25V_X5R_06
PC342
PC357
PR160 N17EG1 *47p_50V_NPO_04
UP1666_REFADJ 6.19K_1%_04 PC145
PR370 1u_6.3V_X5R_04
թՂٙ
*15u_25V_SMD-B2
*15u_25V_SMD-B2
PR369 16.5K_1%_04
4.32K_1%_04
G1թ
EMI
D1 1
2
INS128770026
D1 1
2
INS128769612
Sheet 70 of 91
3 G1 3 G1
NVVDDS
UGATE1_UPI_1666 MLP08 MLP08
PR371 COMMON COMMON
*20mil_Short-p 0.6V~1.2V
PR356 PC285 PC297 PR397 S1 4 S1 4
PR372 PC296 PR373 100K_04 D2 6 D2 6 PL15 NVVDDS
B 309_1%_04 *0.01u_50V_X7R_04 4700p_50V_X7R_04 0_04 0.1u_25V_X7R_06 0_04 8 8 CMME104T-R22MS B
7 7 25A 50A
PQ47 PQ46
C
PR180
PC231
PC234
PC240
PC239
PC235
G1լ
*CSD87350Q5D CSD87350Q5D
6/1 pwr cost down PD21 PR328
N17EG1=80.6K
լՂٙ/G2Ղ
PU20 5 G2 D02A 5 G2 + + + +
7
CSOD140SH
N17EG2=88.7K 5.1_06
0.1u_10V_X7R_04
330U_2V_D2_D
330U_2V_D2_D
330U_2V_D2_D
N17EG2
330U_2V_D2_D
S2 9 S2 9
UGATE1
BOOST1
REFIN
VID
PSI
EN
PR182 *500K_04
A
PW R_SRC_NVVDDS PR385
PR180 88.7K_1%_04 UP1666_REFADJ 6 20 LX1_UPI_1666 PC268
N17EG1=80.6K REFADJ PHASE1 *0_04
PC149 *0.01u_50V_X7R_04 NVVDDS_VREF 8 19 220p_50V_NPO_04
Ղٙ
VREF LGATE1
NVVDDS_VREF PR173
PR170 0_04 9 UP1666QQKF
45.3K_1%_04 FS/OC PW R_SRC_NVVDDS
33 GPU_GNDS_SENSE PR169 0_04 UP1666_FBDRTN 10 18 PVCC_UPI_1666 PR398 2.2_04
FBDRTN PVCC 5VS
PR179 100_04 11 17
FB LGATE2 D02 D02
UGATE2
PC333
PC320
PC331
PC332
PC322
PC346
PGOOD
PR405 PC335 PC316

BOOT2
*0_04 *33p_50V_NPO_04 12 16
GND
COMP PHASE2 3/24 DEL PC343

PR382 0_04 1u_6.3V_X5R_04 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
33 GPU_VDDS_SENSE +
N17EG2
0.1u_50V_Y5V_06
N17EG2
4.7u_25V_X5R_06
N17EG2
4.7u_25V_X5R_06
N17EG2
4.7u_25V_X5R_06
N17EG2
4.7u_25V_X5R_06
N17EG2
*15u_25V_SMD-B2
PR386 100_04
21
13
14
15
NVVDDS 1 2 PR402
PJ49 *CV-40mil 1K_1%_04 qfn20-3x3mm-rt8816 EMI D1 1 D1 1
PR394 2 2
*0_04 PR442 N17EG2
C *20mil_Short-p INS128769738 INS128770060 C
31 NVVDDS_PW RGD
UGATE2_UPI_1666 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
PC338 PC350
PR441 10K_04 PR396 S1 4 S1 4
NV3V3
*4700p_50V_X7R_04 1000p_50V_X7R_04 100K_04 D2 6 D2 6 PL16
PR440 PR421
0_04 N17EG2
N17EG2 8
7
8
7 25A CMME104T-R22MS
15R ‫ڶ׽‬06޲‫ڶ‬08size
*51K_1%_04
PR404 PR429 PR439 PQ48 N17EG2 PQ49 N17EG2
C
*CSD87350Q5D CSD87350Q5D
*0_04 *15.8K_1%_04 51K_1%_04 PR436 PC339 6/1 pwr cost down N17EG2 PD22 PR329
0_04 5 G2 D02A 5 G2 5.1_06
N17EG2
CSOD140SH
N17EG2 0.1u_25V_X7R_06 N17EG2 VDD3 PR361 PR344 PR367 PR338
N17EG2 S2 9 S2 9
A
PR406 Output Voltage Ramp Up Time PR406
15_1%_06 15_1%_06 15_1%_06 15_1%_06
PR438 PC269
30K 150us 62K_1%_04 220p_50V_NPO_04
0_04 D02 N17EG2
62K 450us PR428
G2 Phase ‫ڼ‬೴഑ᒵሁՂٙ 2K_04
5
5
5
5
120K 900us PC341
4/25 modify timing *0 change to 62k 10u_6.3V_X5R_06 PQ45

OPEN 1.5ms 4
ᓳᖞNVVDDSՂ֒඙෷(1.5msĺ450us) QM3006M3
1
2
3
NVVDDS G1 => ՂٙPR406,PR157
D
PQ52
2SK3018S3
D02
NVVDDS G2 => ՂٙPR406,լ
լՂٙPR157
PR384 0_04 G PC306
31 NV_NVVDDS_EN_CTL
*10u_6.3V_X5R_06
S
D D
68,71,72 PW R_SRC_NV_FB
68,69 PW R_SRC_NV
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,71,72 VDD3 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
P650RS/P670RS = G2 Phase 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73,75
2,13,31,46,47,49,54,58,60,61,63,64,66,67,71
13,14,16,37,45,50,51,52,58,59,60,63,68,72
3.3VS
3.3V
5VS
Title
[70] NVVDDS
P670RP6 = G1 Phase 3,16,27,28,30,31,32,33,39,67,68,71,72 1V8_AON
26,33 NVVDDS
14,15,17,30,31,67,68,71 NV3V3
Size
A3
Document Number
P650RS 6-71-P65S0-D02C
Rev
D02C

1 2 3 4 5 6 7 8
NVVDDS B - 71
Schematic Diagrams
PEX_VDD
1 2 3 4 5 6 7 8
5V
Open VREG Type 0 PEX_VDD
1A
PC201 PC200
2.6Amps @ 1.0V
PR25 4/7 power change value = EM5841BVT PR16
22u_6.3V_X5R_08 10_06 PU1 0.1u_10V_X7R_04 10K_1%_04
EM5841BVT
GND DFN10
0.200 COMMON
PR19 10K_04 D02 PR18 *160K_04 D01A
GND
3.3V GND
9 PGOOD VIN 3 PEX_VDD
31 PEX_VDD_PWRGD
OpenVReg
PEXVDD_EN 10 PC52 *0.01u_16V_X7R_04 4A PL1
A
3/17 del PR21 D02
EN/FS
BOOT/NC 8 0.400 1 2 PEX_VDD_R 1 2 4.5A A
BCIHP0412-R47M
PC56 2 VCC PC51 PC50 PJ1 PC29
SW 6 3mm
22u_6.3V_X5R_08
22u_6.3V_X5R_08
0.1u_10V_X7R_04
0.1u_10V_X7R_04 SW 7
PC54 GND 4 PEX_VDD_R
1 FB GND 5
4/25 modify timing *0.22u change to 0.1u D02
ᓳᖞPEX_VDD RC, delay PEXVDD_EN 0.1u_10V_X7R_04 THERM 11 D02A
PR42 0_04 PR50 0_04
GND PC59 3300p_50V_X7R_04 VDD3
M:6-02-05841-CD0
S:6-02-08071-CD0 4/20 NV/power change Ղٙ PR51 5/5 change to 0603,
100_06 ቃ߻રሽੌլߩᗈᄤ
D02
GND 4/20 ආ᝜૞‫ޣ‬ᖄԵ2ND GND
D02
PR36
Rt PR31 6.8K_1%_04
PR20
10K_1%_04 PQ3A
6
100K_04 D
NV_PEXVDD_EN Vout= Vref * (1+(Rt/Rb)) GND
MTDK3S6R
NV_PEXVDD_EN 31 Rb PR29 10K_1%_04
GND
Default
1.008V= 0.6 * (1+(6.8K/10K)) PS6_FB_RR_PEXVDD 2G

4/25 modify timing 0 change to 10k S
1
ᓳᖞPEX_VDD RC, delay PEXVDD_EN PR30 *10_1%_04 PS6_FB_MARGIN_PEXVDD
D02 PQ3B
3
D
MTDK3S6R
Cold boot/Optimus: 1V8_AONĺ1V8_RUNĺNVVDDĺNVVDDS ĺPEX_VDDĺFBVDDQ PEXVDD_EN 5G

S
4
GC6 2.1 Exit: 1V8_RUNĺNVVDD_LĺNVVDD_SĺPEX_VDD or 1V8_RUNĺNVVDD_LĺNVVDD_S & PEX_VDD 3/17 del PR43
Sheet 71 of 91 PWR_SRC_NV_FB VIN

NV3V3
PEX_VDD B
1V8_AON
1V8_MAIN
0.400
10A 4
3
PRS4
1 10A
2
0.400
PWR_SRC_VINP_R PR106 10_1%_04 PWR_SRC_VINP

PU7
INS128476380
QFN16
COMMON
NV3V3
PC109
PR123
B
RL1632T4F-B-R005-FNH 12 *10K_04
COMMON PC99 VIN1P 4 0.01u_16V_X7R_04
GC6_FB_EN NVVDD 1% 1206 GND
PR108 665K_1%_04 VS GND
10u_6.3V_X5R_06 SCL 6
VR Complex NVVDDS 11 VIN1N SDA 7
PWR_SRC_VINN_R PR101 10_1%_04 PWR_SRC_VINN
1V8_MAIN_EN PEX&1.05V A0 5 I2CC_SCL
1/12 NV CHECK I2CC_SCL 30,71
FBVDD/Q I2CC_SDA
I2CC_SDA 30,71
PR114 10_1%_04 VIN2P 15 VIN2P
68 PWR_SRC_NV_VINP_R PC107
PWR_SRC_IMON_A0 PR122 10K_04
PR116 665K_1%_04
GND 10u_6.3V_X5R_06 14 VIN2N
NVVDD Place resistors close to IC
PR112 10_1%_04 VIN2N
GPU_PWR_EN 68 PWR_SRC_NV_VINN_R
GND
GPU_EVENT# PR125 10_1%_04 SNN_VIN3P 2 VIN3P PV 10 PWR_SRC_VALID

13 SNN_TC
TC
PC108 16 SNN_VPU
GPU GPU_RST# EC/PCH 70 PWR_SRC_NVS_VINNP_R
10u_6.3V_X5R_06
VPU
PR124 665K_1%_04
SYS_PEX_RST_MON# PLATFORM_RST# GND SNN_VIN3N 1 VIN3N
NVVDDS 68,69 PWR_SRC_NV
PR119 10_1%_04
GPU_PEX_RST_HOLD# 70 PWR_SRC_NVS_VINN_R 68,70,72 PWR_SRC_NV_FB
8 WARN 17,29 PEX_VDD
3
GC6 2.1 Control Signals 9 CRIT
GND
PAD 17
13,44,45,60,61,62,63,64,65,73,74,75,76 VIN
2,13,31,46,47,49,54,58,60,61,63,64,66,67 3.3V
1.1V8_MAIN_EN 1V8_AON
37,47,50,55,59,60,61,63,66,67,69,73,74,75,76 5V
2.GC6_FB_EN INA3221AIRGV
3,16,27,28,30,31,32,33,39,67,68,70,72 1V8_AON
PWR_SRC_WARN* 5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,72 VDD3
3.GPU_EVENT# PR115 10K_04 PR113 0_04 GND
14,15,17,30,31,67,68,70 NV3V3
C C
4.GPU_PEX_RST_HOLD# PR105 10K_04 PWR_SRC_CRTCAL* PR110 0_04 GPIO28_OC_WARN# 30
5.SYS_PEX_RST_MON# D02A
GPU_PEX_RST# 5/4 NV recommend ‫ޏ‬Ղٙ POWER RAIL State in GC6
1V8_AON ON
GPU_PWR_EN 1V8_MAIN OFF

EN PGOOD
(SYSTEM) GC6 2.1 - VR Complex
1V8_AON 1. GPU_PWR_EN PEX&1.05V OFF
2. 1V8_MAIN_EN
1V8_AON 3. GC6_FB_EN NVVDD OFF
DG P.93 note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.
NVVDDS OFF
N17E POWER ON SEQUENCE POWER OFF SEQUENCE FBVDD/Q ON
net PCH_GPIO Voltage
PGOOD EN PGOOD
DGPU_PWR_EN (GPP_F23) (1V8_AON) I2CC_SCL
EN
PEX&1.05V 30,71 I2CC_SCL
I2CC_SDA
1V8_MAIN_EN 1V8_MAIN GPPG8_PCH_1V8RUN_EN (GPP_G8) (1V8_MAIN) 30,71 I2CC_SDA
GPU GPU_GND_SENSE
33,68 GPU_GND_SENSE
GPPG9_PCH_NV3V3_EN (GPP_G9) (NV3V3) 33,68 GPU_NVVDD_SENSE
GPU_NVVDD_SENSE
D EN PGOOD D
FBVDDQ_SENSE
33,72 FBVDDQ_SENSE
NVVDD GPPG10_PCH_NVVDD_EN (GPP_G10) (NVVDD) FBVDDQ_SENSE_RTN
33,72 FBVDDQ_SENSE_RTN
PS2_FBVDDQ_FB
72 PS2_FBVDDQ_FB
GPPG11_PCH_NVVDDS_EN (GPP_G11) (NVVDDS)
GPPG0_PCH_PEXVDD_EN (GPP_G0) (PEX_VDD) ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

EN PGOOD Title
FBVDDQ [71] PEX_VDD

FBVDD/Q Size Document Number Rev
GC6_FB_EN Custom P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
B - 72
Schematic Diagrams
FBVDDQ
1 2 3 4 5 6 7 8
PAGE72: 1V8_AON
PJ51
FBVDDQ, and MXM Mounting Holes PR430

2
*CV-40mil
1 PR411 100K_04 VDD3
FBVDDQ FOR N17_VGA
*0_04 D02 3/16 del PR403 (power check)
PR431 *0_04 PR390 20K_1%_04 NV_FBVDDQ_EN

NV_FBVDDQ_EN 31 Default
FB_ON
PR435 4/25 modify timing 10k change to 20k , *1500p change to 0.1u
PC326
ᓳᖞFBVDDQ RC, delay FBVDDQ_EN
A *10K_04 A
0.1u_10V_X7R_04
4/7 power change լՂٙ PW R_SRC_NV_FB

3/14 19.6k change to 4.99k (power change) D02A
UP1666_VREF
3A
D02 PR415 1K_04 1V8_AON
PC356
PC252
PC264
PC278
PC273
PC277
3/28 power modify *4700p_50V_X7R_04 PR444 D02
D02 PR416
4.99K_1%_04 + +
PR443
0.1u_50V_Y5V_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
*15u_25V_SMD-B2
*15u_25V_SMD-B2
UP1666_VREFADJ *0_04
*3.92K_1%_04
PC348
PR459 1u_6.3V_X5R_04
3/14 0_04 change to 10k (power change) D1 1
2 phase լՂٙ (power check)
3/14 41.2k change to 40.2k (power change)
10K_04 3/18
EMI 2
FBVDDQ_REFIN PR395
PR452 40.2K_1%_04 INS131150407
*20mil_Short-p
UGATE1 3 G1 MLP08
COMMON
1.35V
Sheet 72 of 91
4
PR446 PC351 PC347 PR147 S1
D02A BCN PR393 PC301 PR376 100K_04 6 PL13 FBVDDQ
D2
12.1K_1%_04 *0.01u_50V_X7R_04 2200p_50V_X7R_04 0_04 0.1u_25V_X7R_06 0_04 8 BCIH0735-R22N
3/14 0_04 change to 12.1k (power change) 7 15A 30A
ᓳᖞFBVDDQ Switch time
FBVDDQ
C
D02
PC123
PC124
PC233
PC125
PC232
PQ38 PD18 PR139
3/14 power change net PU21 5 G2 CSD87350Q5D + + + +
CSOD140SH
B 5.1_06 B
D02
0.1u_10V_X7R_04
470u_2V_SMD-V
330U_2V_D2_D
470u_2V_SMD-V
330U_2V_D2_D
S2 9
UGATE1
BOOST1
REFIN
VID
PSI
EN
PR466 *500K_04
A
PW R_SRC_NV_FB PR167
PR457 88.7K_1%_04 UP1666_VREFADJ 6 20 LX1 PC128
REFADJ PHASE1 *0_04
D02 PC349 *0.01u_50V_X7R_04 UP1666_VREF 8 19 220p_50V_NPO_04
VREF LGATE1
UP1666_VREF PR445 0_04 PR454 45.3K_1%_04 9
FS/OC UP1666QQKF PW R_SRC_NV_FB
PR458 0_04 FBDRTN 10 18 PVCC PR377 2.2_04 D02A D02A
33,71 FBVDDQ_SENSE_RTN FBDRTN PVCC 5VS
PR437 100_04 11 17
FB LGATE2
UGATE2
PC132
PC279
PC257
PC259
PC271
PGOOD
PR449 PC340 PC302
BOOT2
*0_04 *33p_50V_NPO_04 12 16 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
GND
PR456 0_04 COMP PHASE2 1u_6.3V_X5R_04

33,71 FBVDDQ_SENSE
0.1u_50V_Y5V_06
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
4.7u_25V_X7R_08
PR451 100_04
qfn20-3x3mm-rt8816
21
13
14
15
PR447
FBVDDQ 1 2
PJ55 *CV-40mil
1K_1%_04 EMI
D1 1
2
PR549
0_04 PR399
D02 PR448 INS128875340
*20mil_Short-p
*0_04 UGATE2 3 G1 MLP08
COMMON
PS2_FBVDDQ_FB 71
PR311 S1 4
PR364 100K_04 D2 6 PL12
PC337 PC334 D02 0_04 8 BCIH0735-R22N
C
*4700p_50V_X7R_04 1000p_50V_X7R_04
7 15A C
1V8_AON PQ37
C
PR412
CSD87350Q5D
PR391 PC303 PD19 PR140
PR450 PR432 PR433
*75K_04 5 G2
CSOD140SH
0_04 0.1u_25V_X7R_06 5.1_06
*0_04 *15.8K_1%_04 51K_1%_04 PR540
S2 9 PR151 PR152 PR154 PR150
A
PR168
10K_04
PC129 15_1%_06 15_1%_06 15_1%_06 15_1%_06
*0_04
DGPU_PW RGD 31,32 220p_50V_NPO_04
PR434
VDD3
0_04
FBVDDQ_REFIN
PR164
PC147 2K_04
5
5
5
5
1V8_AON 1V8_AON 10u_6.3V_X5R_06
Vout = Vref * (1 + Rtop / Rbot) PR453 3/14 40.2k change to 78.8k (power change) PQ8
3/25 PR477լՂٙ 1.55V = 0.704V * (1 + (24.3K/20K)) 4 QM3006M3
D02 78.7K_1%_04
1.35V = 0.6096V * (1 + 24.3k/20K)
1
2
3
D
PR477 PR484 0_04
PR482
NV_FBVDDQ_EN PR172 0_04 G PC139
*1K_1%_04
PR539 10K_04 3/14 power 4.32k change to 0_04 *10u_6.3V_X5R_06
C
PQ11
S
*0_04 D02A
D02 PC353 2SK3018S3
D
B PQ60 D
BTN3904 *0.01u_50V_X7R_04
from NV H = 1.55V
3/14 ADD follow NV ֆቹ M-SOT23-CBE
C
L = 1.35V
5,30,35,38,41,43,44,45,47,59,60,62,63,64,65,66,67,68,69,70,71 VDD3
PR472 0_04 B PR493
30 GPIO8_MEM_VDD_CTL 68,70,71 PW R_SRC_NV_FB
PQ58
BTN3904
*10K_1%_04
13,14,16,37,45,50,51,52,58,59,60,63,68,70
13,44,45,60,61,62,63,64,65,71,73,74,75,76
5VS
VIN ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
E
M-SOT23-CBE 2,13,31,46,47,49,54,58,60,61,63,64,66,67,71 3.3V Title

PC360
0.01u_50V_X7R_04
37,47,50,55,59,60,61,63,66,67,69,71,73,74,75,76
18,19,20,21,22,23,24,25,27,33
5V
FBVDDQ
[72] FBVDDQ
3,16,27,28,30,31,32,33,39,67,68,70,71 1V8_AON Size Document Number Rev
17,18,27,28,31,33,67 1V8_RUN
A3 P650RS 6-71-P65S0-D02C D02C

1 2 3 4 5 6 7 8
FBVDDQ B - 73
Schematic Diagrams
VCC_Core & VCCSA

8 7 6 5 4 3 2 1
VCORE_PROG
EE 3.3VS
,QWHO6.</$.(,09332:(5&.73+$6( 5V VIN
2+1
CONFIGURATION
3.3VS 1.0V_VCCST
PR342
PR349
PR158 1K_1%_04 13K_1%_04
4/13 ଥ‫إ‬footprint
PR422
PR362 PR409 2.2_06
D02A PR387 PR366 PR380 PC293
100K_04 *1K_1%_04
D 100K_04 1u_6.3V_X5R_04 D
PC283
PC138
0.01u_50V_X7R_04
1
4.7u_6.3V_X5R_06
*CV-40mil
PC288 PC314 PU17
100_04 45.3_1%_04 *45.3_1%_04 PUT CLOSE
TO PWM VCORE_VBOOT/ADDR
DEFAULT SHORT
PJ53
*0.1u_16V_X7R_04 *0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0 DEFAULT SHORT
6X6 52PIN QFN PR378
9
2
PJ52 1mm PR365
1
3 10_04
VCC
VRMP
SDIO H_CPU_SVIDDAT 5,75 *CV-40mil
1 2 2 5 49.9_1%_04 PJ46
5,13,43,44,75 ALL_SYS_PW RGD EN SCLK H_CPU_SVIDCLK 5,75
4 0_04 PJ45
ALERT# H_CPU_SVIDALRT# 5,75 1mm
PR379
2
PR363 0_04 6 35
43 VCORE_PG VRDY DRVON DRVON1 74
34
PWM1 PW M11 74
50 38 CSN11 VCORE VBOOT
DIFF CSN1 CSN11 74

2200p_50V_X7R_04 39 PR368 *100K_1%_04
PR425 PC336 PR401 PC324 48 CSP1 SET AT 0V, PR341 PR332
COMP PR374 SVID
47.5_1%_04 3.01K_1%_04 CSP11 PC294
470p_50V_X7R_04 74 CSP11 15K_1%_04 21.5K_1%_04
5.1K_1%_04 0.033u_16V_X7R_04 ADDRESS=00h
PR410 1K_1%_04 PC308 33
VCORE PWM2 PW M21 74
47p_50V_NPO_04 49 40 CSN21
FB CSN2 CSN21 74
41 PR383
CSP2 *100K_1%_04
PR388
PR407 CSP21 PC305
Sheet 73 of 91 PR426
100_04
PWM3
CSN3
32
42
74 CSP21
5.1K_1%_04
5V
0.033u_16V_X7R_04 VCORE_IMAX
0_04 51 43 PR159 2K_1%_04
VCC_Core & C
6 VCC_VCORE_SENSE
PR427
0_04
PC311
PR392
1K_1%_04 52
VSP CSP3
VCORE C
6 VSS_VCORE_SENSE VSN 31 IMAX SET
VCCSA PR408
1000p_50V_X7R_04 PC312
4700p_50V_X7R_04
PWM2A
CSN2A
CSP2A
24
23 PR153 2K_1%_04
AT 68A
PR346
53.6K_1%_04
100_04
1
IOUT 45 PR163 102K_1%_06 CSP11
CSSUM PR418 PR417
VCORE PORTION
PC313 47 36K_1%_04 150K_1%_04 PR166 102K_1%_06 CSP21 VCCSA_VBOOTA/ADDRA
PR414 CSCOMP
26.1K_1%_04 VCORE_PROG 10 1 2 PC323
470p_50V_X7R_04 VCORE_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR389 PRT5 *220p_50V_NPO_04
VCORE_IMAX 36 VBOOT/ADDR ILIM 16.2K_1%_04 100k_1%_04_NTC PC307
ICCMAX 1000p_50V_X7R_04 VCCSA VBOOT
CSREF
44 PR413 10_04 CSN11 SET AT 1.05V,
SVID PR327
16 PR400 10_04 CSN21
PR309 PR301 PC253 DIFFA ADDRESS=02h
PC254 52.3K_1%_04
47.5_1%_04 3.01K_1%_04 18
COMPA PC325
470p_50V_X7R_04 2200p_50V_X7R_04
VCCSA
PR302 1K_1%_04 PC262 1000p_50V_X7R_04
47p_50V_NPO_04 17
FBA
PR312
30
100_04 PWM1A PW M1A 74
26 CSN1A
B CSN1A CSN1A 74 PW M1A B
25 PR320 *100K_1%_04
CSP1A
PR319
PR303 0_04 15 CSP1A PC258
7 VCCSA_SENSE VSPA 74 CSP1A
PC260 5.1K_1%_04 0.022u_16V_X7R_04
PR322 VCCSA
7 VSS_SA_SENSE
PR304 0_04 1K_1%_04 14
VSNA CSSUMA
21 PR307 82K_1%_06 CSP1A IMAX SET PR156
36K_1%_04 PR299 AT 11A
1000p_50V_X7R_04 PC267 19 PR300
CSCOMPA 8.66K_1%_04
PR313
150K_1%_04
100_04 4700p_50V_X7R_04 1
PRT2 2
100k_1%_04_NTCPC256 *100p_50V_NPO_04
PR321
20
13 ILIMA PC251 820p_50V_X7R_04
IOUTA 12.7K_1%_04
22 PR314 10_04 CSN1A
PR330 CSREFA
1.0V_VCCST PC272
470p_50V_X7R_04
26.1K_1%_04 PC261
VCCSA_VBOOTA/ADDRA 27
PR336 29 VBOOTA/ADDRA 1000p_50V_X7R_04
PSYS SA PORTION
*1K_04 PR345 10K_1%_04
65 PSYS 13,44,45,60,61,62,63,64,65,71,74,75,76 VIN
PR335 *100_04 12
5,65,75 H_PROCHOT# VRHOT 37,47,50,55,59,60,61,63,66,67,69,71,74,75,76 5V
11
ROSC TSENSEA 7,74 VCCSA
EPAD
37
TSENSE 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,75 3.3VS
5,7,37,38,64,75 1.0V_VCCST
PR337
6,74 VCORE
A PR359 A
8
53
4.12K_1%_04 PUT CLOSE
4.12K_1%_04 PC281
TO VCCSA
1
0.1u_16V_X7R_04 PRT3
HOT SPOT
1
PUT CLOSE PRT4 PC286 PR350

0.1u_16V_X7R_04 BOTTOM PAD PR331 100k_1%_04_NTC
TO VCORE
2
PR355 Work F=
HOT SPOT 100k_1%_04_NTC 20K_1%_04
CONNECT TO 9.31K_1%_04 Title
430Khz [73] VCC_CORE & VCCSA
2
9.31K_1%_04 GND Through

5 VIAs
A3 P650RS 6-71-P65S0-D02C D02C

8 7 6 5 4 3 2 1
B - 74 VCC_Core & VCCSA

Schematic Diagrams
VCore Output Stage
8 7 6 5 4 3 2 1
DEFAULT SHORT VCCVIN

VIN
5V 2
PJ19
1 7A VCORE & VCCSA OUTPUT STAGE
1
PC265 PC148 PC144 PC165
1
PC263
5mm +
1u_25V_X5R_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*25TQC15MYFB
+
*25TQC15MYFB
PR188 *0.003_12
2
PR317 PC274
2.2_06 PR318
2.2_06
0.22u_16V_X7R_06
PU16
D NCP81151MNTBG 1 1 D
D1 D1
2 2
1 8 PR352 1_1%_06
BST HG INS118403478 INS118404489
2 PR351 10K_06 3 G1 MLP08

3 G1 MLP08 6-19-41001-043
73 PW M11 PWM SW 7 COMMON COMMON
PL18
4
3 S1 S1 CMME063T-R15MS0R907
73,74 DRVON1 EN GND 6
D2 6 D2 6 2 1
VCORE
4 5 8 8 PCB Footprint = BCIHP0735A
VCC LG
7 7 0V~1.2V/68A
*20mil_Short-p
PR423 *20mil_Short-p
PAD PC422
PR375
2.2_1%_06
PC266 D02A
*2200p_50V_X7R_04 PQ44 D02A PQ50
2.2u_6.3V_X5R_04 5 G2 *CSD87350Q5D 5 G2 CSD87350Q5D
5/23 PWRቃఎ PC291
S2 9 S2 9
2200p_50V_X7R_04 ”NP-A”ਢNO PASTEMASK
PR424
BOTTOM PAD 3/7 co-layլՂٙ
CONNECT TO D01A
GND Through
4 VIAs 73
73
CSP11
CSN11
Sheet 74 of 91
VCCVIN
VCore Output
1
PC155 PC168 PC164 PC146
+
4.7u_25V_X5R_08
4.7u_25V_X5R_08
Stage
1u_25V_X5R_06
5V
*25TQC15MYFB
C C
2
PC327
PR381
PR347 2.2_06
2.2_06 0.22u_16V_X7R_06
PU19
D1 1
NCP81151MNTBG D1 1
2
2
1 8 PR420 1_1%_06 INS118408163
BST HG INS118411338
3 G1 MLP08 6-19-41001-043
2 PR419 10K_06 3 G1 MLP08 COMMON
73 PW M21 PWM SW 7 COMMON PL20
OS-CON
4
S1 CMME063T-R15MS0R907
4
3 S1
73,74 DRVON1 EN GND 6 D2 6 2 1
D2 6
8 PCB Footprint = BCIHP0735A
8
4
VCC LG
5 7 D02
*20mil_Short-p
*20mil_Short-p
7
PR499
2.2_1%_06
PAD PC423
PC292 D02A PC161 PC152 PC134 PC136 6-11-3371P-AB1
PQ53 D02A + + + +
*2200p_50V_X7R_04 PQ59
5 G2 *CSD87350Q5D
2.2u_6.3V_X5R_04 5 G2 CSD87350Q5D
330U_2V_D2_D
330U_2V_D2_D
330U_2V_D2_D
330U_2V_D2_D
5/23 PWRቃఎ PC372
S2 9
S2 9
2200p_50V_X7R_04
PR486
PR485
BOTTOM PAD D01A
CONNECT TO
GND Through
”NP-A”ਢNO PASTEMASK
4 VIAs
B 3/7 co-layլՂٙ 3/24 change footprint (for ՠᐗംᠲ) B
73 CSP21
73 CSN21
VIN DEFAULT SHORT VSAVIN
PJ7
2 1 1A
PC119 PC120
1mm
5V
4.7u_25V_X5R_08
4.7u_25V_X5R_08
PR131 *0.003_12
PC230
PR289
PR137 2.2_06
2.2_06 0.22u_16V_X7R_06
PU9
NCP81151MNTBG
2
3
4
PR135 1_1%_06 VCCSA

1
BST HG
8
1 PL11 10A
2 PR134 10K_06 BCIHP0730-R47M
73 PW M1A PWM SW 7
9 2 1
3 GND 6
PCB Footprint = BCIHP0735A
73,74 DRVON1 EN 8A
8 13,44,45,60,61,62,63,64,65,71,73,75,76 VIN
PC238 PC236 PC237 6,73 VCORE

PR136
2.2_1%_06
4 5
A VCC LG A
7,73 VCCSA
PAD PC424
5
6
7
2200p_50V_X7R_04
PC122 D02A 37,47,50,55,59,60,61,63,66,67,69,71,73,75,76 5V

*22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
*2200p_50V_X7R_04 PQ34
2.2u_6.3V_X5R_04 MDU5693
PC121
BOTTOM PAD
5/23 PWRቃఎ
D01A
CONNECT TO Title
GND Through
4 VIAs
[74] VCORE OUTPUT STAGE
73 CSP1A
73 CSN1A
”NP-A”ਢNO PASTEMASK
3/7 co-layլՂٙ
A3 P650RS 6-71-P65S0-D02C D02C
,ࢬ‫א‬ଥ‫إ‬footprint੡PASTEMASK Date: W ednesday, September 07, 2016 Sheet 74 of 91

8 7 6 5 4 3 2 1
VCore Output Stage B - 75

Schematic Diagrams
VCCGT
8 7 6 5 4 3 2 1
,QWHO6.</$.(,09332:(5&.73+$6(
EE 3.3VS
3.3VS 5V VIN 1.0V_VCCST
PR213
PR480 1K_1%_04
PR470
D PR204 PR461 D
100K_04 *1K_1%_04 2.2_06 PR474 PR492 PR481 PC375
100K_04
1u_6.3V_X5R_04
PC374
PC169
1
*CV-40mil 0.01u_50V_X7R_04 *100_04 *45.3_1%_04 *45.3_1%_04 PUT CLOSE VCCGT_PROG
PC167 PC369 4.7u_6.3V_X5R_06
PU10 TO PWM
PJ58
DEFAULT SHORT *0.1u_16V_X7R_04 0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0 PR203
9
6X6 52PIN QFN 1+0
2
PJ57 1mm PR207
3 PR491 10_04 CONFIGURATION
VCC
VRMP
1 2 2 SDIO 5 H_CPU_SVIDDAT 5,73
49.9_1%_04
5,13,43,44,73 ALL_SYS_PWRGD EN SCLK H_CPU_SVIDCLK 5,73
4 0_04
ALERT# H_CPU_SVIDALRT# 5,73
PR215
PR208 0_04 6 35
43 VCCGT_PG VRDY DRVON DRVON2 76
34 19.1K_1%_04
50 PW M1 38 CSN12 PWM12 76
DIFF CSN1 CSN12 76
PR185 PC151 PR184 39 PR194 *100K_1%_04
PC150 48 CSP1
47.5_1%_04 4.02K_1%_04
COMP CSP12 PR193 PC159
2200p_50V_X7R_04 76 CSP12
470p_50V_X7R_04 5.1K_1%_04 0.033u_16V_X7R_04
PC154 33 5V
VCCGT PW M2
PR195 1K_1%_04 47p_50V_NPO_04 49 40
FB CSN2 41 PR475 2K_1%_04
CSP2 VCCGT_VBOOT/ADDR
Sheet 75 of 91 PR190
100_04
PW M3
32
DEFAULT SHORT
1
PR186 42
CSN3 *CV-40mil
0_04 51 43 PR476 2K_1%_04 PJ20
VCCGT 8 VCCGT_SENSE
PR187
PC158
1000p_50V_X7R_04
VSP CSP3
1mm
PJ21
2
C 0_04 52 C
8 VSSGT_SENSE VSN 31
PR196
PC160 PW M2A 24 VCCGT VBOOT
1K_1%_04 CSN2A 23 SET AT 0V,
PR191 PR219 2K_1%_04 PR211 PR214
4700p_50V_X7R_04 CSP2A
100_04 SVID
41.2K_1%_04 49.9K_1%_04
ADDRESS=00h
1
IOUT 45 PR183 68K_1%_06 CSP12
CSSUM
VCORE PORTION PR460 PR455
PC162 47 36K_1%_04 150K_1%_04
PR199 CSCOMP
30.1K_1%_04 VCCGT_PROG 10 1 2 PC157 *220p_50V_NPO_04 VCCGT_IMAX
VCCGT_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR471
470p_50V_X7R_04 PRT7
VCCGT_IMAX 36 VBOOT/ADDR ILIM 8.06K_1%_04
100k_1%_04_NTC
ICCMAX PC153 1000p_50V_X7R_04
44 PR189 10_04 CSN12
CSREF
VCCGT
16 PC156
DIFFA IMAX SET PR206
18 1000p_50V_X7R_04 AT 55A
COMPA 15.8K_1%_04
17 5V
FBA
30
PW M1A 26
CSN1A 25 PR218 2K_1%_04
CSP1A
B B
15
VSPA
14 21
VSNA CSSUMA
19
CSCOMPA
20
13 ILIMA
IOUTA 22
1.0V_VCCST CSREFA
27
29 VBOOTA/ADDRA
PR504 PR209 20K_1%_04
PSYS SA PORTION
*1K_04
PR503 *100_04 12
5,65,73 H_PROCHOT# VRHOT 11
TSENSEA
ROSC
EPAD
37
TSENSE
PR205
53
4.12K_1%_04
1
A PUT CLOSE PRT6 PC163 PR210 A

TO VCORE 0.1u_16V_X7R_04 Work F= 37,47,50,55,59,60,61,63,66,67,69,71,73,74,76 5V
HOT SPOT
PR200 430Khz 20K_1%_04 BOTTOM PAD 13,44,45,60,61,62,63,64,65,71,73,74,76 VIN
100k_1%_04_NTC 5,7,37,38,64,73 1.0V_VCCST
CONNECT TO
2
9.31K_1%_04 3,9,10,11,12,13,14,15,16,31,32,35,37,38,39,40,41,43,44,45,47,48,50,51,54,58,59,60,63,67,73 3.3VS

GND Through 8,76 VCCGT
5 VIAs
Title
[75] VCCGT

8 7 6 5 4 3 2 1
B - 76 VCCGT
Schematic Diagrams
VCCGT Output Stage
8 7 6 5 4 3 2 1
PR222 *0.003_12
DEFAULT SHORT VGTVIN
VIN
PJ23
2 1 2A
PC173 PC171 PC383
D
5mm D
5V
4.7u_25V_X5R_08
1u_25V_X5R_06
4.7u_25V_X5R_08
PR498
PC378
PR469 2.2_06
0.22u_16V_X7R_06
2.2_06 D1 1
PU24 2
NCP81151MNTBG
PR508
INS136512057
1_1%_06
1 8 3 G1 MLP08
COMMON
BST HG PL22 6-19-41001-043
20A
4
2 PR507 S1 CMME063T-R15MS0R907
75 PWM12 PWM SW 7
10K_1%_04 D2 6 2 1 2/22 power change value to 330u (଺470u)
VCCGT
8 PCB Footprint = BCIHP0735A
PC142
PC141
PC143
3 GND 6
75 DRVON2
4
EN
5
7 PR521
PC382 PC172 Sheet 76 of 91
VCC LG + +
PAD PC425 PQ66
2.2_1%_06
*20mil_Short-p *20mil_Short-p
VCCGT Output
22u_6.3V_X6S_08
22u_6.3V_X6S_08
*22u_6.3V_X5R_08
330U_2V_D2_D
*330U_2V_D2_D
PC367 D02A 5 G2 CSD87350Q5D PC386
C
2.2u_6.3V_X5R_04
*2200p_50V_X7R_04
S2 9 2200p_50V_X7R_04
PR516 D01A PR515
C Stage
5/23 PWRቃఎ
BOTTOM PAD D02
CONNECT TO 75 CSP12
GND Through
4 VIAs 75 CSN12 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬
”NP-A”ਢNO PASTEMASK D02A
3/7 co-layլՂٙ (ᄵ৫ߓᑇ)
B B
A A
Title
[76] VCCGT OUTPUT STAGE
A4 P650RS 6-71-P65S0-D02C D02C

8 7 6 5 4 3 2 1
VCCGT Output Stage B - 77

Schematic Diagrams
Audio Board P65_ESS_A 1/3

5 4 3 2 1
3/2 change 3.3V SUPPLY

ESS DAC (ES9018-2M) 3.3V DAC SUPPLY 3.3V DAC SUPPLY
A_5V A_ESS_VCCA A_5V A_ESS_AVCC_L A_5V A_ESS_AVCC_R
D01A AU11 AU5 AU1
6 1 6 1 6 1
5 VIN VOUT 2 AL9 HCB1005KF-121T20 5 VIN VOUT 2 ES9018K2M Pin15 5 VIN VOUT 2 ES9018K2M Pin16
NC NC A_3.3V A_ESS_DVCC NC NC NC NC ES9016K2M Pin16
4 3 4 3 4 3
EN GND 7 EN GND 7 EN GND 7
Thermal Pad AC51 Thermal Pad Thermal Pad
AC50
LP5900SD-3.3/NOPB 4.7u_6.3V_X5R_06 AC37 LP5900SD-3.3/NOPB AC30 AC20 LP5900SD-3.3/NOPB AC21
1u_6.3V_X5R_04 AGND ESS9018
1u_6.3V_X5R_04 4.7u_6.3V_X5R_06 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06
D D
ESS9018 ESS9018
AGND AGND A_ESS_DVCC
AGND
A_ESS_VCCA AGND AGND
2/22 ଥ‫ إ‬AC35
A_ESS_AVCC_R
2.2u_6.3V_X5R_04 A_ESS_AVCC_L ᐗ೸৬ᤜᗑ‫م‬3V power,ᒔ
ᒔঅSNRய
ய౨
ES9018K2M_Pin21
AU4
Ղٙ
21
20
19
18
17
16
15
Voltage level ~1.2V
ES9018K2M AU4=ES9018K2M => AU1,AU5Ղ
Ղٙ,(AU5լ
լՂٙ)
ESS9018/9016
AVCC_L
DVDD
DGND
NC
DVCC
VCCA
AVCC_R
AU4=ES9016K2M => AU1Ղ
DAC Voltage level ~ 1.28V

22 14 ADACL# 78
4/28 AR18‫ޏ‬լՂٙ (ଥ‫ޏ‬ESS bo sound ംᠲ) 23 NC DACLB 13
GPIO2 DACL ADACL 78
AGND AR23 47K_04 24 12
AR35 47K_04 25 GPIO1 AGND_L 11 AR29 10K_04
AR26 47K_04 26 DATA2 AGND_R 10
DATA1 DACRB ADACR# 78
ASPDIFO_HP AR22 20_1%_04ASPDIFO_HP_R 27 9
DATA_CLK DACR ADACR 78
A_ESS_DVCC AR16 47K_04 28 8 A_ESS_DVCC
Sheet 77 of 91 RESETB AGND 3/22 ᐙ᥼sample rale,᧢‫ޓ‬੡4.7u
XI(MCLK)
AR18 *0_04
78 AOP1622_EN D02 AR34 AU8
DGND
ADDR
EPAD
RESETB AAUDG 75_04 1 5
SDA
SCL
D02A 2 NC Vcc
XO
NC
AC27 4.7u_6.3V_X5R_06
Audio Board D02 AC15

4.7u_6.3V_X5R_06 PCB Footprint = qfn28-5x5mm-es9018
79 ASPDIFO
3
A
4 ASPDIFO_HP
29
1
2
3
4
5
6
7
GND Y
3/22 ᐙ᥼sample rale,᧢‫ޓ‬੡4.7u AR28 AR40
SN74AHC1GU04
P65_ESS_A 1/3 75_04 AC46

C 100K_04 C
PCB Footprint = R-PDSO-G5 4.7u_6.3V_X5R_06
AGND 74AHC1GU04DCK
AGND A9018_XTAL_XI
ASMB_CLK_9018 2/21 ଥ‫إ‬footprint
78 ASMB_CLK_9018 A9018_XTAL_XO AR13 *0_04
൷SV3S700A 78 ASMB_DATA_9018
ASMB_DATA_9018 AGND AGND
AGND AGND
A_ESS_DVCC AR51 47K_04 ADDR
AGND AR52 *0_04
AGND
ADDR: VCC = 0X90
ADDR: GND = 0X92
ADD :0X92
A_3.3V
AQ2A
from PCH or EC I2C G2
MTDK3S6R
6 1 ASMB_CLK_9018
79 ASYS_CLK
ASMB_DATA_9018
G5
D
D01A AQ2B
D01A
B MTDK3S6R 3 4 B
79 ASYS_DATA
D
3/3 swap
2/25 ‫ޏ‬ፖbom
A9018_XTAL_XO
AR17 499K_1%_1/16W _04 A9018_XTAL_XI
1 2 AGND
ᓮࠌ‫ش‬+/-25ppm‫א‬
Crystalᓮ ‫א‬փ
AGND 4 3
AR55,AC35,AC36 AR36 *28mil_short-p
AX1 FSX3M 50.000000M18FDO ႊ಻‫ٽ‬Crystal๵௑ଥ‫ޏ‬
PCB Footprint = HSX321G
oscillator AGND AAUDG
AC17 AC24
20p_50V_NPO_04 20p_50V_NPO_04
CLOSE TO ES9018 78 A_ESS_AVCC_L

A_ESS_DVCC A_ESS_VCCA A_ESS_AVCC_R A_ESS_AVCC_L 78 A_ESS_AVCC_R
AGND AGND
AC48
AC34
AC19
AC36
A 78,79 A_3.3V A
78,79 A_5V
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
Title
[77] AUDIO BOARD_P65_ESS_A 1/3
AGND
AGND AGND AGND A3 P650RS 6-71-P65S8-D02B D02B
Date: Thursday, July 28, 2016 Sheet 77 of 91

5 4 3 2 1
B - 78 Audio Board P65_ESS_A 1/3

Schematic Diagrams
5 4 3 2 1
5/26 AR15, AR32, AR38, AR8

Change to 825_1%_04 for SNR= -122dB
AC16 2200p_50V_NPO_06
Amplifier (LM49720+OPA1622) AR15 806_0.1%_04 D02B BCN

AAUDG
AC26 2200p_50V_NPO_06
D02B
AR32 806_0.1%_04 1/30 ESS WeiKeng check
A_A-15V AR140 100_06 A_-15V
AR27 AC23 D02B BCN
A_+15V A_-15V
100_1%_04 470p_50V_NPO_04 AR141 100_06
A_A+15V A_+15V
Vout(peak)=[15-(-15)]*2÷ʌ=19.1(Vpk)
Vout(rms) = 19.1÷2¥2=6.72 (Vrms) 600 ȍ HP Full-Scale setting
4
D Follow٥‫ش‬ᒵሁ AU2 D
AR24 2.7K_0.1%_04 D02B BCN ᏺ墿ሽॴ݁‫ޏ‬੡0.1%
V-
V+
AR32,AR35 POS/NEG Vpk-pk OUTPUT(Vrms) Watt(mW)
D02B BCN AR41,AR44 VOLTAGE
A_ESS_AVCC_L ALEFT_IN# AR31 806_0.1%_04 ALEFT_IN#_R 10 768ȍ +-15V 24.1V 8.51V 120mW
A_A+15V A_A-15V INA# - 9 ARELAY-LC D02A
ALEFT_IN AR14 806_0.1%_04 ALEFT_IN_R 1 + OUTA 825ȍ +-15V 21.3V 7.55V 95mW
D02B INA
4
AU7 931ȍ +-12V 19.0V 6.71V 75mW
AR42 ARIGHT_IN AR7 806_0.1%_04 ARIGHT_IN_R 5
V-
V+
INB - 7 ARELAY-RC
10K_1%_04 OUTB
2 ARIGHT_IN# AR37 806_0.1%_04 ARIGHT_IN#_R 6 +
ESS9018 77 ADACL# INA# INB#
- 1 ALEFT_IN D02A
LME49720_L 3 + OUTA 11 A_-15V
INA AR60 10K_04 AOP_EN 8 Thermal pad 3
close to AU3_Pin3
A_3.3V EN GND AAUDG

AC29
5 OPA1622
AR41 INB - 7 ALEFT_IN# PCB Footprint = pson10-3x3mm-opa1622
6.34K_1%_04 6 + OUTB
77 ADACL INB# AC52 D02B BCN
ESS9018
1u_25V_X7R_06
ESS9018 AR38 806_0.1%_04 4/28 DEL ଥ‫ޏ‬ESS bo sound ംᠲ

D02A 0.22u_16V_Y5V_04 1/30 ESS WeiKeng check
AR47
LME49720
PCB Footprint = sop8-154mil-lem49720
2.7K_0.1%_04 D02B BCN
AGND
AC28
AR8
D02B BCN
2200p_50V_NPO_06
806_0.1%_04 AAUDG
Sheet 78 of 91
AAUDG
AR45
100_1%_04
AC39
4/28 ଥ‫ޏ‬ESS bo sound issue AC13 2200p_50V_NPO_06
Audio Board
470p_50V_NPO_04
C
AU4 AR59 AR41 AR42 AC29 AU5 AC37 AC30

C
P65_ESS_A 2/3
D02A AR59
լՂٙ,(AR41,AR42,AC29Ղ
AU4=ES9018K2M => AR59լ Ղٙ) 9018 X 6.34K_1%_04 10K_1%_04 1u_25V_X7R_06 LP5900 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06
Ղٙ,(AR41,AR42,AC29լ
լՂٙ)
0_04
ESS9016 AU4=ES9016K2M => AR59Ղ
9016 0_04 X X X X X X
4/20 ᐗ೸৬ᤜቃఎ
AR49 AC40
100_1%_04 470p_50V_NPO_04
ALC898 : SENSE_A -> GPIO HIGH TO LOW ALC898_GPIO(5V) SV3S700A_GPIO Y (READ) OPA1622 EN
S700A : GPIO HIGH TO LOW AFTER DETECTING INTERNAL PU 50K OD(PU10K) (SV700A/HP ON) (H ENABLE) REMARK
D02B BCN
A_ESS_AVCC_R
AR48
A_A+15V
2.7K_0.1%_04
A_A-15V
SV3S700A OPA1622 ENABLE: SV700A LOW AND RC DELAY
ALC898(DOS) : S/PDIF 30% VOLUME OUTPUT
H H H L UNPLUG(NC)
H -> L H -> L L H PLUG(600/32 ohm)

D02B
ACP AC33 0.1u_10V_X7R_04 ACN
8
AU6 AC31 0.1u_10V_X7R_04 AGND

AR21 A_3.3V
V-
V+
10K_1%_04 AR39 4.7K_1%_04 AGND

2 A_3.3V
77 ADACR# INA# AC45 10u_6.3V_X5R_06 ACN
- 1 ARIGHT_IN
LME49720_R 3 + OUTA AC44 0.1u_16V_Y5V_04 A_3.3V AC32 1u_6.3V_X5R_04
INA AGND
D02A 4/28 DEL ଥ‫ޏ‬ESS bo sound ംᠲ
close to AU6_Pin3
13
14
15
16
AC22
5 AGND
VEE
CN
REXT
VERF
INB - ARIGHT_IN# AR25 AR19 ASV3S700A_CH0
AR20 7 1 12
B 6.34K_1%_04 6 + OUTB 2.2K_04 2.2K_04 VDD CH0 B
77 ADACR INB#
1u_25V_X7R_06
ACP 2 11 ASV3S700A_CH1
CP CH1
LME49720 3 GND 9 AR53 22_1%_04
77 ASMB_CLK_9018 SCL CH2
ADC_LDO
PCB Footprint = sop8-154mil-lem49720
4 8 AR10 499_1%_04
D02 3/23 ‫ޏ‬੡٥‫ش‬ற MTDK3S6R
D02B BCN 77 ASMB_DATA_9018 SDA CH3
AR30 2.7K_0.1%_04
GPIO
FLT
17 AU3
EN
GND SV3S700A VQFN-16P AGND ASV3S700A_CH1
AR33 A_5V
AAUDG AC25
10
100_1%_04 3/23 del AGND PCB Footprint = qfn16-3x3mm-sv3s700a AHEADPHONE-LC 79
470p_50V_NPO_04 AR139
ARELAY-LC
A_3.3V AR12 10K_04 AS700A_GPIO
0_04
4
A_5V AC14 AC18
C
D02A 4/28 DEL ଥ‫ޏ‬ESS bo sound ംᠲ 1u_6.3V_X5R_04 4.7u_6.3V_X5R_06 +
4
AD7
AR43 CSOD140SH
AU17
5
*10K_04 AGND -
A
UD2-5NU
5
A_A+15V A_A-15V A_A+15V A_A-15V ATPS65131PS 79
D
AQ4 Ꮑ൷ࠩMB TPS65131 PIN9,11 ARELAY-RC

D02B *2SK3018S3
D
G AQ8
AHEADPHONE-RC 79
AC41
AC47
AC43
AC38
ARELAY G 2SK3018S3 ASV3S700A_CH0

A A
A_3.3V
AGND
S
AR54 *100K_04 AC49 0.1u_10V_X7R_04
1u_25V_X7R_06
1u_25V_X7R_06
1u_25V_X7R_06
1u_25V_X7R_06
A_3.3V AGND
AGND
AR56 100K_04
5
AGND
AR44 *0_04 AOP_EN
79 AAL898_VREFO AR57 0_04 1
4 AR50 *0_04
Ꮑ൷ࠩMB CODEC PIN31 AS700A_GPIO AOP1622_EN 77 Title
2
77 A_ESS_AVCC_L 3.3V
AR55 0_04 ARELAY
HIGH>0.85V
77 A_ESS_AVCC_R AU10 LOW <0.78V
3
77,79 A_3.3V 74AHC1G08GW Size Document Number Rev

AAUDG AAUDG AAUDG AAUDG 77,79 A_5V
AGND
A3 P650RS 6-71-P65S8-D02B D02B
5 4 3 2 1
Audio Board P65_ESS_A 2/3 B - 79

Schematic Diagrams

5 4 3 2 1
5/16 Follow٥‫ش‬ᒵሁ
6-24-30003-009 D02B
AGND 1 2
AD3 AVLC5S02100
AD1 D02
3/21 ADD ESS board ۘᖲ‫ܑܒ‬pin AHP_DET 1 A
C 3 3/18 Add (follow P870DM2)
AAL898_GPIO33 2 A
D D
BAT54CS3 1 AJ_SPDIF1
A_5V A_3.3V AR6 0_04 AL4 FCM1005KF-121T03 L AHP-LC 2
78 AHEADPHONE-LC
AJ_AUDIO1 AR3 0_04 AL3 FCM1005KF-121T03 AHP-RC 3
39 40
78 AHEADPHONE-RC R AHP_SENSE 4
37 39 40 38 A_5VS 5
37 38 A_5VS A_AUDG
35 36
35 36 AC4 AC3
33
33 34
34 AR1 AR2 D02B A
31 32 4/28 ଥ‫ޏ‬ESS bo sound ംᠲ B DRIVE
31 32 D02 100p_50V_NPO_04 100p_50V_NPO_04
29 30 C IC
AJD_SENSEA 27 29 30 28 22K_04 22K_04 TX

27 28
D02A
AJD_SENSEB 25 26 AHP_DET AC8
25 26 AAUDIO_DET TOJ-0015STR2-2-H4-PA9T-J
AMIC1-R 23 24
23 24 A_AUDG A_AUDG P/N = 6-20-B2820-005
AMIC1-L 21 22 ATPS65131PS 78 A_AUDG A_AUDG 0.1u_16V_Y5V_04
21 22 PCB Footprint = TOJ-001ST-2-H4
ASPDIFO 19 20
ASIDE_R 19 20 ASYS_CLK 77
17 18
ASPDIFO
Sheet 79 of 91 ASIDE_L 15
13
17
15
13
18
16
14
16
14
ASYS_DATA 77
3/1 change D01A
77 ASPDIFO
AL1 FCM1005KF-121T03
11 12
Audio Board C
2/26 modify
11 12 AAL898_VREFO 78
D02A
AR9
AC7
AGND
C
220_04 33p_50V_NPO_04
9 10
P65_ESS_A 3/3 A_+15V
A_+15V 7
5
9
7
10
8
8
6
4/28 ଥ‫ޏ‬ESS bo sound ംᠲ 2/18 headphone/spdif signal swap
3 5 6 4 AAL898_GPIO33
A_-15V 3 4 AGND AGND
A_-15V 1 2
1 2 AJ_MIC1
50238-0407N-001 D02A 5
AGND 6-20-41A40-220 4/20 net ଥ‫إ‬ AMIC_SENSE 4
D01A A_AUDG
AMIC1-R AL2 FCM1005KF-121T03 3
6
STR CONNECT AMIC1-L AL6 FCM1005KF-121T03 2
1
AC6 AC9 JK06006BQ7648
PCB Footprint = 2SJ-T351-018-A
100p_50V_NPO_04 100p_50V_NPO_04 M:6-20-B28L0-006
S:6-20-B28M0-006
A_AUDG A_AUDG A_AUDG
B D01A ASIDE_SENSE D02 AJ_SIDE1

B
ASIDE_DET 5
un-plug low A_AUDG
4
ASIDE_R AL7 FCM1005KF-121T03 R 3
6
ASIDE_L AL5 FCM1005KF-121T03 L 2
AJD_SENSEA 1
AR11 20K_1%_04 AMIC_SENSE
JK06006BQ7648
AR5 39.2K_1%_04 AHP_SENSE
AJD_SENSEB AC2 AC10 PCB Footprint = 2SJ-T351-018-A
AR4 5.1K_1%_04 ASIDE_SENSE
680p_50V_X7R_04 680p_50V_X7R_04 M:6-20-B28L0-006
S:6-20-B28M0-006
A_AUDG A_AUDG
D02B
AC12 0.1u_16V_Y5V_04
1AR *0_04 4AR *0_04
77,78 A_3.3V
AC11 0.1u_16V_Y5V_04 AH2 AH1 AH4 AH3 77,78 A_5V
*H4_2D2_2 *H4_2D2_2 *H7_5D2_8 *H7_5D2_8
2AR *0_04 5AR *0_04
AR58 0_06
D02
A A
AC1 0.1u_16V_Y5V_04
3AR *0_04 6AR *0_04
AGND A_AUDG Title

3/29 DEL AC5 , ADD AR58 (ᐗ೸DEBUG) AGND AGND AGND AGND
A4 P650RS 6-71-P65S8-D02B D02B
5 4 3 2 1
B - 80 Audio Board P65_ESS_A 3/3

Schematic Diagrams
Audio Board P67_3DAMP_E

5 4 3 2 1
3D HeadPhone AMP D02A

E3D_HP_L
E_5V
Del 615 co-lay
E3D_HP_L ER16 54.9_1%_04 EHEADPHONE-LC
EC7 EC11 EC23 EC28 EC25 E3D_HP_R ER13 54.9_1%_04 EHEADPHONE-RC

+
2.2u_6.3V_X5R_04
0.1u_16V_Y5V_04
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
220u_6.3V_SMD-D
EEFCX0J221YR
D EHP_JSGND D
16
15
14
13
EU1
OUTL
VDD
JD
SGND
EC3 0.01u_16V_X7R_04
EHEADPHONE-L E_HP_L ER18 470_04 E_HP_INL 1 12 EC2 0.01u_16V_X7R_04

EC20 2 INL C2_3DL 11 E_AUDG
1u_16V_X7R_06 3 VREF C1_3DL 10 ER3 15_1%_04 EHP_JSGND
REXT PGND E_AUDG
EHEADPHONE-R E_HP_R ER17 470_04 E_HP_INR 4 VSS 9
INR C1_SDR ‫ڼ‬ຝ։ૉ‫ڶ‬՛ࣨᓮ࣋࣍M/B PWR OFF, HP_JSGND=0V
C2_3DR
EC21 EC1 0.01u_16V_X7R_04
PWR ON, HP_JSGND=2.5V
OUTA
EC17
EC15
EC16
1u_16V_X7R_06
SDA
SCL
17
D
EC5 0.01u_16V_X7R_04
VSS QB
SV3H612V EHP_JSGND_EN G
5
6
7
8
EQ2
pin SV3H612 SV3H615 From SMBUS RC MTN7002ZHS3
2200p_50V_X7R_04
2200p_50V_X7R_04
1u_6.3V_X5R_04
D
E_AUDG
S
QA ER2
EHP_SCL ER4 22_1%_04 ESYS_CLK
13 SGND JD EHP_SDA ER6 22_1%_04 ESYS_DATA
EHP_JSGND G 1M_04
EQ1 E_AUDG
S
14 JD VDD MTN7002ZHS3
15 VDD LS-IN
EC6
EC8
10p_50V_NPO_04
10p_50V_NPO_04
EGND EGND
Sheet 80 of 91
C E3D_HP_R
EGND SV3H615 ARa Ղ0ohm (AUDIO/B)
SV3H612 QA,QB MTN7002ZHS3, RB,RC 1Mohm C Audio Board
E_AUDG D02A Del 615 co-lay
P67_3DAMP_E
E_5V E_3.3VS EHP_SENSE
EJ_AUDIO1
D
29 30
29 30 E_5VS D01A EQ3
27 28
27 28 2SK3018S3 G
25 26
23 25 26 24 D02B
S
21 23 24 22 ER27 0_04
21 22 E_AUDG RSVD. EJ_SPDIF1
19 20 EHEADPHONE-R
EJD_SENSEA 19 20 E_AUDG 1
17 18 EHEADPHONE-L
EJD_SENSEB 15 17 18 16
D02 EHEADPHONE-LC EL7 FCM1005KF-121T03 2
15 16 E_AUDIO_DET EHEADPHONE-RC EL6 FCM1005KF-121T03 3
EMIC1-R 13 14 EGND
13 14 4
EMIC1-L 11 12 D02A
11 12 ESYS_CLK ER26 47K_04 5
ESPDIFO 9 10 ER23 ER20
ESIDE_R 7 9 10 8 ESYS_DATA EC29 EC30 E_5VS
ESIDE_L 7 8 A
5 6 DRIVE
5 6 D01A E_AUDG B
3 4 22K_04 22K_04 100p_50V_NPO_04 100p_50V_NPO_04
3 4 EHP_JSGND_EN C IC
1 2 TX
1 2
EC13
E_AUDG E_AUDG E_AUDG E_AUDG TOJ-0015STR2-2-H4-PA9T-J
50238-0307N-001 ଥ‫إ‬pin1‫ۯ‬ᆜ 0.1u_16V_Y5V_04
P/N = 6-20-B2820-005
PCB Footprint = 87126-30-06 ESPDIFO EL1 FCM1005KF-121T03 PCB Footprint = TOJ-001ST-2-H4
6-20-51A40-215
B EGND E_AUDG B
M:6-20-51A40-215 EC12
S:6-20-51A50-215 ER8
EGND
220_04 33p_50V_NPO_04
STR CONNECT EHP_JSGND D02A Del 615 co-lay
EJD_SENSEA ER19 20K_1%_04 EMIC_SENSE
EGND EGND
D02A
ER25 39.2K_1%_04 EHP_SENSE
EJD_SENSEB ER11 5.1K_1%_04 ESIDE_SENSE
5/17 ჺᠦࠟଡPHONE JACKխၴ
ESIDE_SENSE EJ_MIC1
EH3 EH2 EH4 EH1 EJ_SIDE1
*H4_2D2_2 *H4_2D2_2 *H7_5D2_8 *H7_5D2_8 D01A 5
E_AUDG 5 EMIC_SENSE 4
4
ESIDE_R EMIC1-R EL5 FCM1005KF-121T03 3
EL3 FCM1005KF-121T03 3
6
6
ESIDE_L EMIC1-L EL4 FCM1005KF-121T03 2
EL2 FCM1005KF-121T03 2
1
1
3/2 change HP/SPDIF signal EC18 EC19 JK06006BQ7648
JK06006BQ7648
PCB Footprint = 2SJ-T351-018-A
EC9 EC10 PCB Footprint = 2SJ-T351-018-A
EGND EGND EGND EGND 100p_50V_NPO_04 100p_50V_NPO_04 P/N = 6-20-B28L0-006
680p_50V_X7R_04 P/N = 6-20-B28L0-006
vendor P/N = 2SJ-T351-018
E_AUDG 680p_50V_X7R_04 vendor P/N = 2SJ-T351-018
D02A BCN E_AUDG
ᇞBackground noise M:6-20-B28L0-006 E_AUDG E_AUDG E_AUDG M:6-20-B28L0-006
A S:6-20-B28M0-006 A
EC24 0_04 S:6-20-B28M0-006
1ER *0_04 4ER *0_04
EC14 0.1u_16V_Y5V_04
D02A BCN 2ER *0_04 5ER *0_04
EC22 0_04 ᇞBackground noise
EC4 0.1u_16V_Y5V_04
3ER *0_04 6ER *0_04 Title
EGND E_AUDG
[80] AUDIO BOARD_P67_3DAMP_E
A3 P650RS 6-71-P67P8-D02B D02B
5 4 3 2 1
Audio Board P67_3DAMP_E B - 81

Schematic Diagrams
P650RS Power Board
5 4 3 2 1
B3.3VS
BJ_BTN1
D B3.3VS D
1
BM_BTN# 2 NC1
3 NC2
4
FP226H-004S10M 20mil
PCB Footprint = fp226h-004xxxm_r BR1
220_1%_04
BGND
20mil
B_SW1 20mil BC1

5
Sheet 81 of 91 POWER BUTTON
B_SW1
1
3
2
4
*0.1u_16V_Y5V_04
P650RS Power 3
TJE-532-Q-T/R
1
6
BM_BTN#
BGND P670RG-M
4 2
Board POWER SWITCH LED
C C
5
6
1
PCB Footprint = tje-53x-q
A
BD2 BC2
A
BD1 NON-Medion
BGND 0.1u_50V_Y5V_06 BD3 Medion
*V15AVLC0402 BLUE RE2*0.8 2P
VARISTOR P/N = RY-SP190DNB84-5/1X BLUE RE2*0.8 2P
2
6-24-30003-006 P650Rx, P670Rx P/N = RY-SP190DNB84-5/1X
C
POWER SWITCH P670Rx-M
C
BGND LED POWER SWITCH
LED
P2808A1, ‫ߪء‬ᄎᗈᄤ, P2808A1 BGND BGND
ኙ࿜ D26 mounted VARISTOR.
6-53-3050B-B41 100g
B B
3
1BR *0_04 4BR *0_04

6
2BR *0_04 5BR *0_04
3BR *0_04 6BR *0_04

BH4 BH2
BH1 BH3
*H2_2B4_0D2_2 *H2_2B4_0D2_2
2 2
5 5
A 3 1 3 1 A
4 4
4
*MTH7_0D2_3 *MTH7_0D2_3 Title

[81] P650RS POWER BOARD_B
BGND BGND
BGND Size Document Number Rev
A4 P650RS 6-71-P65SC-D02 D02

5 4 3 2 1
B - 82 P650RS Power Board

Schematic Diagrams
P650RS HDD Board

5 4 3 2 1
HJ_MB1
SATA PORT1 HGND 2
4 2 1
1
3
HGND
6 4 3 5 HSATA_TXP1
HJ_SATA1 6 5
8 7
S1 8 7 HSATA_TXN1
H_SATA_TXP1 10 9
S2 10 9
H_SATA_TXN1 12 11
S3 12 11 HSATA_RXN1
14 13
S4 14 13
H_SATA_RXN1 H_5V 16 15
S5 16 15 HSATA_RXP1
H_SATA_RXP1 18 17
S6 18 17
H_5VS 20 19
S7 20 19
22 21
D H_3.3VS 22 21 HP670RG-M_TPLED D
24 23
26 24 23 25
P1 26 25 H_3.3VS
28 27
P2 28 27
30 29
P3 HC14 HC11 30 29
P4
51049-03041-001
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06
P/N = 6-21-C2420-215
P6
PCB Footprint = 50008-0304X-A
P7 H_5VS
P8 HGND HGND 3/28 ଥ‫إ‬footprint,ՠᐗ૞‫ޣ‬ HDD D02A
NC1 P9 D02
NC2 P10
P11
P12 HC10 HC20 HC9 + HC6
HGND P13 EEFCX0J221YR
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06
P15 220u_6.3V_SMD-D
For P670Rx-M TP LED Ղٙ

51824-0227A-001
220u,6.3V,ESR=15mȍ,H=1.9mm
P/N = 6-20-437J0-022
PCB Footprint = 50887-0220A-XXX HGND
HGND
5
HU2
1 100 mil
H5V_TPLED
HJ_LEDTP1
Sheet 82 of 91
H_5V
P650RS HDD Board
VIN VOUT 6
HC15 HC8 HC3 5
C 4 C
2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 3
Medion_TPLED Medion_TPLED Medion_TPLED 2
4 3 1
HGND EN# OC# 50501-0060N-001
HP670RG-M_TPLED uP7549UMA5-20 6-20-94K30-106
PCB Footprint = M-SOT23-5 Medion_TPLED
Medion_TPLED HGND HGND
H_3.3VS
SATA re-driver HGND HR10 *0_04 HR9 0_04
HC13 HC7 HC12
0.01u_16V_X7R_04 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 HR11

4.7K_04
PIN6 PIN10 PIN16 Note:
HGND HGND HGND Close to Re-driver IC
10
16
20
Port 1
6
HU1
B 7 B
VCC33
VCC33
VCC33
VCC33
EN HC19 0.01u_16V_X7R_04 H_SATA_TXP1

HSATA_TXP1 HC5 0.01u_16V_X7R_04 1 15 HTXP1
HSATA_TXN1 HC2 0.01u_16V_X7R_04 2 AIP AOP 14 HTXN1 HC18 0.01u_16V_X7R_04 H_SATA_TXN1
AIN AON
From PCH HOST DEVICE
HSATA_RXN1 HC1 0.01u_16V_X7R_04 4 12 HRXN1 HC17 0.01u_16V_X7R_04 H_SATA_RXN1 To Conn.
HSATA_RXP1 HC4 0.01u_16V_X7R_04 5 BON BIN 11 HRXP1
BOP BIP HC16 0.01u_16V_X7R_04 H_SATA_RXP1
SMB_SCK
SMB_SDA
Note:
Close to Re-driver IC
T-PAD
REXT
DE_B
DE_A
GND
GND
H_3.3VS ASM1466_new
8
17
21
3
13
18
19
co-lay, place under SN75LVCP601 HR14 *100K_04

HR21 *100K_04 HR13 *100K_04
HSATA_TXP1 HR4 *0_04 HR8 *0_04 HTXP1 HR18 *100K_04 HR17 *100K_04 H_3.3VS
HSATA_TXN1 HR2 *0_04 HR7 *0_04 HTXN1 HR15 *0_04 HGND
HR20 *0_04
HSATA_RXN1 HR1 *0_04 HR6 *0_04 HRXN1
HR12 *0_04
HSATA_RXP1 HR3 *0_04 HR5 *0_04 HRXP1 HR16 *0_04
HR19 2K_1%_04
HGND
A HGND A
HH2 HH1 HH3 HH4

2/2 ADD *h7_0d2_8 *H6_3D2_3 *H6_3D2_3 *H6_3D2_3
1HR *0_04 4HR *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

2HR *0_04 5HR *0_04 Title
[82] P650RS HDD BOARD_H
3HR *0_04 6HR *0_04
HGND HGND HGND HGND
A3 P650RS 6-71-P65SN-D02A D02A

5 4 3 2 1
P650RS HDD Board B - 83

Schematic Diagrams
P650RS LED Board

5 4 3 2 1
LJ_LED1 D01A 3/3 follow P670RP D01A 3/3 follow P670RP

LLED_ACIN
12 LLED_PWR D02A D02A
11 LLED_BAT_CHG LD9 LD10
D 10 LLED_BAT_FULL LLED_ACIN LR3 680_04 1 2 LLED_BAT_CHG LR1 680_04 1 2 D
NC1 9 LLED_NUM#
8 LLED_CAP# Oragne UHY Oragne UHY
NC2 7 LLED_SCROLL#
6 L_WLAN_AIRPLANE# LLED_PWR
UYG LLED_BAT_FULL
UYG
LR4 330_04 3 4 LR2 330_04 3 4
5 L_dGPU_LED
4 LSATA_LED# Green RY-SP195UHYUYG4
Green RY-SP195UHYUYG4
3
2 LED_GND
1 L_3.3VS AC IN/POWER ON LED BAT CHARGE/FULL LED
‫إ‬ᅃ ‫إ‬ᅃ
FP225H-012S10M LED_GND
PCB Footprint = fp225-012g LED_GND
M:6-20-94K50-012 1LR *0_04 4LR *0_04
S:6-20-94K60-012
2LR *0_04 5LR *0_04
L_3.3VS
Sheet 83 of 91 3LR *0_04 6LR *0_04
P650RS LED Board C C
LR11
LR9 LR8 LR7 LR6 LR5
220_04 D01A
220_04 220_04 220_04 220_04 220_04
A
A
‫إ‬ᅃ
LD6 LD5 LD4 LD3 LD2 LD1
RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M

dGPU LED SCROLL CAPS LOCK NUM LOCK AIRPLANE LED HDD LED
LOCK LED LED
C
C
LR14 *0_04
LED
LLED_SCROLL# LLED_CAP# LLED_NUM# L_WLAN_AIRPLANE# LSATA_LED#
C
B B L_dGPU_LED B
LQ1
DTC114EUA
E
LLED_PWR D01A 3/8 ֞உଥ‫إ‬

LED_GND 4/29 follow common design
LLED_ACIN
LLED_BAT_FULL LH1 LH4 LH3 LH2
*H2_2B4_0D2_2 *H2_2B4_0D2_2 *H6_0D2_3 *H6_0D2_3
LLED_BAT_CHG
1
D02A
LD11 LD12 LD13 LD14
*V15AVLC0402 *V15AVLC0402 *V15AVLC0402 *V15AVLC0402

LED_GND LED_GND LED_GND LED_GND
2
2
A A
ᔾLEDጤ
ጤឭ࣋
LED_GND LED_GND LED_GND LED_GND
Title
[83] P650RS LED BOARD_L
A4 P650RS 6-71-P65S4-D02 D02
5 4 3 2 1
B - 84 P650RS LED Board

Schematic Diagrams
P650RS FP Board
5 4 3 2 1
NOTE: MODE
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE
1 30
D EGND MODE D
2 29 FUSB_PP
F3.3V AVDD DP FJ1
3 28 FUSB_PN F2.5V 1 2
F2.5V DVDD DN 3 4
F3.3V 4 27 F3.3V FMOSI 5 6
VDDIO UVDD FMCLK 7 8 FLED1
FLED1 5 26 FMCS FMCS 9 10 FLED2
LED1 SPI_CS FMISO 11 12 FDISCON
FMOSI 6 25 FMISO 13 14
SPI_MOSI SPI_MISO F_XIN 15 16
FMCLK 7 24 FLED2 F_XOUT 17 18
SPI_CLK LED2 F_RST_N 19 20
FDISCON 8 23 21 22 FUSB_PN
DISCON DVSS_1 F3.3V F3.3V 23 24 FUSB_PP
9 22
F_XOUT 10
UVSS AVSS_1
21 F_XIN
SPNZ-24S1-B-017-1-R
P/N = 6-21-41700-212
Sheet 84 of 91
XO XI
F2.5V 11
DVDD_1 AVSS
20
FGND FGND
P650RS FP Board
C C
F3.3V 12 19 F3.3V
RVDD AVDD_1
F_RST_N 13 18
RESETN CLK_SEL NOTE: CLK_SEL
14 17 CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
DVSS EGND_2 CLK_SEL=LOW , FREQ=48MHz OSC
15 16
SGND EGND_1
ES603-WB
FGND PCB Footprint = es603-lga30-1 D01A FGND
ES603-LGA30 : 6-03-00603-0N0 3/3 ଥ‫ޏ‬footprint ՠᐗംᠲរଥ‫إ‬

PCB Footprint:
ES603-LGA30 CHANGE ES603-LGA30-1
2015/8/10
B B
லᢰլ‫ྒྷףױ‬រ,‫א‬
**GU1ல ‫܍א‬Ղٙ৵࿍ሁ
FJ1
1 23 23 1
2 24 24 2
BOTTON VIEW TOP VIEW
A A
Title
[84] P650SS FP BOARD_F
A4 P650RS 6-71-P65SF-D01A D02

5 4 3 2 1
P650RS FP Board B - 85
Schematic Diagrams
P650RS Click Board

5 4 3 2 1
T_TP_VCC
ழΔ‫׽‬Ղ‫ڼ‬೴ሿٙ
T3.3V
TJ_CLICK
W/O FPழ TJ_TP1
TL1 1 T_TP_BTN_L 1 T_TP_CLK

NC1 2 2 T_TP_DATA
TO BOTTOM/B
.
FCM1005KF-121T03 NC2 3 T_TP_BTN_R 3 T_TP_BTN_L
4 4
FP226H-004S10M
TO T/P 5
T_TP_BTN_R
JXT_FP226H-004XXAM TGND
Ꭽਪ BOT૿
૿
8 PIN 6
7
T_TP_SMB_CLK
1
TJ_FP1 M:6-20-94A40-004 T_TP_VCC T_TP_SMB_DAT
S:6-20-94A60-004 8 TD3 TD4
1 G1 G2
TJ_MB FP225H-008S11M
2 TH1 TH2
*V15AVLC0402
*V15AVLC0402
D
NC1 TR7 27.4_1%_04 TUSB_PN10 fp225h-008gxxxm_r TGND D
NC2 3 TUSB_PP10 1 T_TP_DATA H3_7B7_0D3_7 H3_7B7_0D3_7
TR6 27.4_1%_04 6-20-94K30-108 TD1 TD2
4 2 T_TP_CLK TC8
2
3
TO M/B
*V15AVLC0402
*V15AVLC0402
FP226H-004S10M TGND
PCB Footprint = fp226h-004xxxm_r 4 T_TP_SMB_DAT 0.1u_10V_X7R_04
M:6-20-94A40-004 5 T_TP_SMB_CLK
2
S:6-20-94A60-004 6 TGND
FP225H-006S10M
TGND 2/17 me modify value
fp225h-006xxxm_R
M:6-20-94K10-006 TGND TGND
TGND
It is strongly recommended that the TESD_GND has S:6-20-94K00-006 CLICK B'D
a dedicated connection to the system chassis or 6-34-M72SS-010-1
cable shield.
TH4 TH3
*H3_0D3_0 *H3_0D3_0
T3.3V
TU1
6 1
VP NC
TC9 5 2
NC VN
0.1u_10V_X7R_04 TUSB_PP10 4 3 TUSB_PN10
Sheet 85 of 91 TGND
CH2 CH1
CM1293A-02SO
TGND
P650RS Click C
FOR ESD, ᔾ२FFC CONNECTORឭ࣋ C
Board
T_XIN TJ_FPB1
TR1 1M_04 T_XOUT T2.5V 1 2

3 4
TGND TMOSI 5 6
3 4 TMCLK 7 8 TLED1
TGND TMCS 9 10 TLED2
2 1 TMISO 11 12 TDISCON
TX1 13 14 NOTE: MODE
TC4 HSX321G_12Mhz TC5 T_XIN 15 16 MODE=HIGH (NC) , USB MODE
T_XOUT 17 18 MODE=LOW , SPI MODE
15p_50V_NPO_04 15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN10
T3.3V 23 24 TUSB_PP10
*CON24A
TGND TGND QPOFZ-24R2-XD-Z-LD
TGND Place Botton TGND

B B
T2.5V T3.3V
TLED1 TR2 10K_04
TC2 TC7 TC1 TC6 TLED2 TR3 10K_04
0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06
TGND NOTE: CLK_SEL

CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
CLK_SEL=LOW , FREQ=48MHz OSC
TGND TGND
T3.3V
CLOSE TO SENSOR POWER PIN
S
G TDISCON 1TR *0_04 4TR *0_04
TQ1 2TR *0_04 5TR *0_04

AO3415
D
3TR *0_04 6TR *0_04
TUSB_PP10 TR5 1.5K_04
A A
TR4 47K_04 T_RST_N

T3.3V
TC3
1u_6.3V_X5R_04
Title
[85] P650RS CLICK BOARD_T
TGND Size Document Number Rev
A3
P650RS 6-71-P65S2-D02 D02

5 4 3 2 1
B - 86 P650RS Click Board

Schematic Diagrams
P650RS USB Board 1/3

1 2 3 4 5 6 7 8
LAN (RTL8411B) Switching Regulator close to PIN48 2 IN 1 SOCKET

(>20mil) Ra KVDD10 ࣨՂStandard PUSH PUSH CARD READER
KRSET KR30 2.49K_1%_04 KREGOUT KR33 0_06 KVDD10 KJ_CARD1
KGND (>20mil) KSD_D2/MS_CLK_R P9
KR31 *1K_04 SD_DATA2
KXTAL2 KGND KSD_D3/MS_D3_R P1
KR24 10K_04 SD_DATA3
KAVDD33
KAVDD33
KR25 1M_04 KXTAL1 KSD_CMD/MS_D2_R P2
KVDD10
KR23 *0402_short SD_CMD
A KGND
FOR S5 WAKE UP ON LAN P3 A
1 2 SD_VSS1
T124
KGND
C
KD2
A
RB751S-40C2
KPCIE_W AKE# 88 ழ: La,Ca,Cb լՂٙ,RaՂ
LDO Modeழ Ղٙ KVCC_CARD P4
4 3 SD_VDD
TO SB PCH WAKE#. ၦขᒔᎁ৵ሽॴ,‫ޏ‬
‫ޏ‬SHORTሿ
ሿٙ
KSD_CD#
KLED_CR
KX1 C286-001_25MHZ KLAN_W AKEUP# KC38 KSD_CLK/MS_D0_R P5
KLAN_W AKEUP# 88
KXTAL2
KXTAL1
KC40 SD_CLK
KEECS
PCB Footprint = FSX3M
KC39 TO EC8587 PIN123 LAN_WAKEUP# 0.1u_16V_Y5V_04 P6
SD_VSS2
10p_50V_NPO_04 KLED1/GPO T123
10p_50V_NPO_04 KLED2 T122 KSD_D0/MS_D1_R P7
KGND SD_DATA0
BIOS pulls high or low to GPO pin, KSD_D1_R P8
48
47
46
45
44
43
42
41
40
39
38
37
KGND KGND KU3 Pkease refer to LAN/PHY Disable SD_DATA1 GND1
Application Note. KMS_BS/SD_W P# WP GND1 GND2
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED2
LED1/GPO
LV_CEN
HV_GIGA
LED_CR
RSET
LANWAKEB
49 KSD_CD# CD SD_WP GND2
E_PAD COM SD_C/D
COM
KR37 1K_04 K3.3VS KGND
KC41 CS1R-201-H-N
KGND 0.1u_16V_Y5V_04 KGND PCB Footprint = CS1R-201-H-N
KR36 K3.3VS
KGND 6-21-A4400-112
15K_04
KLAN_MDIP0 1 36 KREGOUT
MDIP0 REG_OUT KREGOUT
KLAN_MDIN0 2 35 Remind that R109 using the KSD_CMD/MS_D2 KR50 0_04 KSD_CMD/MS_D2_R
MDIN0 VDDREG KD3V3 main power (S0 power).
KVDD10 3 34 KENSW REG KR43
KLAN_MDIP1 AVDD10 ENSWREG KSD_D0/MS_D1 KSD_D0/MS_D1_R
KLAN_MDIN1
KLAN_MDIP2
KLAN_MDIN2
4
5
6
7
MDIP1
MDIN1
MDIP2
VDD1
VD33
ISOLATEBPIN
33
32
31
30
KISOLATEB
KPERSTB KR44
KVDD10
KAVDD33
*0402_short
KGND *10K_04
KSD_D1
KR48
KR47
0_04
0_04 KSD_D1_R Sheet 86 of 91

MDIN2 RTL8411B PERSTBPIN KBUF_PLT_RST# 88
P650RS USB Board

8 29 KCLKREQB KR38 0_04 KSD_D2/MS_CLK KR53 0_04 KSD_D2/MS_CLK_R
KVDD10 AVDD10 CLKREQBPIN KLAN_CLKREQ# 88
KLAN_MDIP3 9 28 KMS_BS/SD_W P#
B KLAN_MDIN3 10 MDIP3 QFN48 MS_BS/SD_WP# 27 KVDD33/18
‫ڕ‬լࠌ‫ױش‬ឰၲ,࣍
LAN_CLKREQ#‫ڕ‬ ࣍PCHጤ
ጤऴ൷PULL DOWN KSD_CLK/MS_D0 KR49 0_04 KSD_CLK/MS_D0_R B
11 MDIN3 DV33_18 26 KRTL8411B_HSON KC42 0.1u_10V_X7R_04
KAVDD33 HV_GIGA HSON KPCIE_RXN5_GLAN 88
K3.3VS 12
VDD3 HSOP
25 KRTL8411B_HSOP KC44 0.1u_10V_X7R_04
capacitors must be close to pin side.

KPCIE_RXP5_GLAN 88
KSD_D3/MS_D3
ৱEMIᒔ
ᒔᎁ‫ݙ‬,‫ޏ‬
KR51
‫ޏ‬SHORT Close to chip

0_04 KSD_D3/MS_D3_R
ߨփᐋ. 1/3
SD_CMD/MS_D2
KC19
SD_CLK/MS_D0
SD_D2/MS_CLK
KC15
SD_D0/MS_D1
SD_D3/MS_D3
*5p_50V_NPO_04
REFCLK_N
REFCLK_P
CARD_3V3
0.1u_16V_Y5V_04
PIN12
VDDTX
SD_D1
GIGA LAN KAVDD33

HSIN
PULL HIGH: SWR Mode

HSIP
KGND
KENSW REG KR34 *0_04
RTL8411B
13
14
15
16
17
18
19
20
21
22
23
24
KR35 *28mil_short-p KGND

KSD_CMD/MS_D2
KCARD_3V3 KCLK_PCIE_GLAN# 88
KSD_CLK/MS_D0
KSD_D2/MS_CLK
PULL LOW: LDO Mode

KSD_D0/MS_D1
KSD_D3/MS_D3
KCLK_PCIE_GLAN 88
KGND
KEVDD10
KPCIE_TXN5_GLAN 88
KSD_D1
KPCIE_TXP5_GLAN 88
KCARD_3V3 KVCC_CARD
Near Cardreader CONN
KVDD10 KVDD10 KVDD10 KVDD10 KR52 0.2R_5%_06 40 mil ૻ೏
KVCC_CARD
KC48 KC35 KC36 KC37
KC8 KC13 KC10 KC9 SD Card Remove
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04
C 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
Fall time less than C
PIN3 PIN8 PIN32 PIN46 1 ms when SD
PIN13
KGND card remove.
KGND KGND KGND KGND KGND
KVDD33/18 KVDD33/18 Near Cardreader CONN

KC16 KC14 KR29 0_04 ᐗ೸৬ᤜቃఎ
*2.2u_6.3V_X5R_04 KR28 0_04
Pin#27 0.1u_16V_Y5V_04 4 KL1 3 KDLMX1-
Pin#27
1 2 KDLMX1+
KGND KGND KL2 *W CM2012F2S-161T03 1KR *0_04 4KR *0_04
KEVDD10 KR46 0_04 KJ_RJ1
KLAN_MDIN0 12 13 KLMX1- KR45 0_04 KDLMX1+ 1 GND1 2KR *0_04 5KR *0_04
KR54 0_06 KLAN_MDIP0 11 TD4- MX4- 14 KLMX1+ 4 KL5 3 KDLMX2- KDLMX1- 2 DA+ shield GND2
KVDD10 KLAN_MDIN1 TD4+ MX4+ DA- shield
9 16 KLMX2- KDLMX2+ 3 3KR *0_04 6KR *0_04
KC20 KC49 KLAN_MDIP1 8 TD3- MX3- 17 KLMX2+ 1 2 KDLMX2+ KDLMX2- 6 DB+
TD3+ MX3+ *W CM2012F2S-161T03 DB- KCHASSIS_GND
VDD3 meet rising time 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 KR40 0_04
PIN20 PIN20 KLAN_MDIN2 6 19 KLMX3- KR39 0_04 KDLMX3+ 4
>1ms KLAN_MDIP2 5 TD2- MX2- 20 KLMX3+ 4 KL3 3 KDLMX3- KDLMX3- 5 DC+
KGND KGND KAVDD33 KLAN_MDIN3 3 TD2+ MX2+ 22 KLMX4- KDLMX4+ 7 DC-
KLAN_MDIP3 TD1- MX1- DD+ 87,88 K3.3V
2 23 KLMX4+ 1 2 KDLMX3+ KDLMX4- 8
TD1+ MX1+ DD- 88 K3.3VS
KVDD3 KR26 *28mil_short-p KR27 *28mil_short-p *W CM2012F2S-161T03
10 15 KR42 0_04 P JS-08SO1B
KC12 KC7 KC11 7 TCT4 MCT4 18 KR41 0_04 P/N = 6-21-B40C0-008
4 TCT3 MCT3 21 4 KL4 3 KDLMX4- PCB Footprint = PJS-08SL3B
D
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
40 mil 1 TCT2 MCT2 24
D
PIN11 PIN32 PIN48 TCT1 MCT1 1 2 KDLMX4+

NS892402 *W CM2012F2S-161T03
KGND KGND KGND KC43 KNMCT_4 KNMCT_R
KR5 75_1%_04
60 mil KD3V3 KNMCT_3 KR6 75_1%_04
0.01u_16V_X7R_04 KNMCT_2 KR7 75_1%_04 KC46
KR32 *28mil_short-p KNMCT_1 KR8 75_1%_04 Title
KC45 0.1u_16V_Y5V_04
LDO Mode
KC18 *0.1u_16V_Y5V_04
10P_2KV_NPO_12 [86] P650RS USB BOARD_K 1/3
D02A
KGND KC47 0.01u_50V_X7R_04 2/18 ADD 6/2 EMI Size Document Number Rev
A3 6-71-P65S3-D02A D02A
ᐗ೸৬ᤜቃఎ KC17 *0.01u_50V_X7R_04 KR9 *0_04 KGND KCHASSIS_GND
1 2 3 4 5 6 7 8
P650RS USB Board 1/3 B - 87

Schematic Diagrams

5 4 3 2 1
K3.3V
USB3.0 re-driver USB3.0 PORT4 ‫׳‬Հ)
(MB‫׳‬
KR18 *0_04
KR16 *4.7K_04 KUSBVCC3.0_6
KR14 *4.7K_04
D KU2 100 MIL D
KR12 2K_1%_04 5 1
K5V VIN VOUT
KC50
KC34 2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04
KGND KGND 4 3
EN# OC#
6
KU1 KGND
25 From PCH uP7549UMA5-20
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
KR20 *4.7K_04 K_SDA_P4 24 GND 7 K_SCK_P4 KR10 *4.7K_04 KGND
KGND SMB_DATA SMB_SCK KGND PCB Footprint = M-SOT23-5
2A/90mohm
KTXN4 0.1u_10V_X7R_04 KC30 23 8 KC21 0.1u_10V_X7R_04
TX1- RX1- KUSB3_TXN4 88
KR22 *0402_short
88 KDD_ON#
KTXP4 0.1u_10V_X7R_04 KC31 22 9 KC22 0.1u_10V_X7R_04
TX1+ RX+ KUSB3_TXP4 88
21 10
To Conn. KGND
TYPE_IND# CHIP_EN# KC28 22u_6.3V_X5R_08

KRXN4 0.1u_10V_X7R_04 KC32 20 11 KC23 0.1u_10V_X7R_04
Reserverd
RX2- TX2- KUSB3_RXN4 88
KC27 22u_6.3V_X5R_08 KGND
KUSBVCC3.0_6
SW_B
EQ_B
DE_B
KRXP4 0.1u_10V_X7R_04 KC33 19 12 KC24 0.1u_10V_X7R_04
GND
VCC
RX2+ TX2+ KUSB3_RXP4 88
CLOSE TO CONNECTOR KJ_USB3_1
18
17
16
15
14
13
ASM1464 K3.3V KTXP4_J 9 GND1
Standard-A
SSTX+ SHIELD
PCB Footprint = QFN24-4X4MM K3.3V
‫࠷ڂ‬௣co-lay, ‫࠷ޡٵ‬௣ሽ୲ 1
Sheet 87 of 91 KTXN4_J
KUSB_PN4_J
8
2
4
VBUS
SSTX-
D-
KUSB_PP4_J 3 GND
P650RS USB Board

C C
KR13 *0_04 KR11 *4.7K_04 KC26 KC29 KC25 KRXP4_J 6 D+
KR15 *4.7K_04 7 SSRX+
KR17 *4.7K_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04 KRXN4_J 5 GND_D GND2
SSRX- SHIELD
2/3 KR19 *0_04
USB3.0 Max Trace length UB251H-009G11M KGND

KGND Follow Design Guide P/N = 6-20-B4Z10-009
KGND KGND PCB Footprint = 317AH09FZTS4T4CX
KD3 M:6-20-B4Z10-009
࠷௣co-lay, ‫ྤڂ‬layout़
़ၴ S:6-20-B4Z40-109
4 3 KUSB_PN4_CON10 1 KUSB_PN4_J
88 KUSB_PN4 KUSB_PP4_CON 9 KUSB_PP4_J
KL6 2
1 2 KGND 8 3 KGND
88 KUSB_PP4
*W CM2012F2S-161T03-short 7 4
6 5
D02 DT1140-04LP-7
KD1
KTXP4 10 1 KTXP4_J
KTXN4 9 2 KTXN4_J
KGND 8 3 KGND
KRXP4 7 4 KRXP4_J
KRXN4 6 5 KRXN4_J
B D02 DT1140-04LP-7 B
ழ
Layoutழ
հࢬ‫ॾڶ‬ᇆᒵ‫ף‬ษ(10mil)
1. SIMհ
2. ࢬ‫ॾڶ‬ᇆᒵհၴ‫ף‬GND
SIM CONN 3. SIM hold ‫᧯ء‬؄ࡌ‫ף‬GND໮ ໮៥
4.SIM CONN ᔾ२ MINI CARD CONN
KR1 *4.7K_04 հ‫ޢ‬ԫॾᇆᒵऱLayoutၒ
5. SIMհ ၒᒵᏁ՛࣍10ֆ
ֆ։.
KJ_SIM1
KDETECT_SW KR2 0_04
88 KDETECT_SW
(TOP VIEW) KR3
KR4 SW1 C8 *0402_short
*0402_short C4 DETECT_SW UIM_MCMD C7 KUIM_DATA_R KUIM_DATA
KUIM_CLK KUIM_CLK_R UIM_DATA UIM_I/O KUIM_VPP KUIM_DATA 88
C3 C6
88 KUIM_CLK KUIM_RST UIM_CLK UIM_VPP
C2 C5
88 KUIM_RST UIM_RST UIM_GND
C1
GNG
GND
GND
GND
KUIM_PW R UIM_PWR
88 KUIM_PW R
MSMPS-SN2(01T)
GND1
GND2
GND3
GND4
KC6
*22p_50V_NPO_04
A K5V 88 A
K3.3V 88
PCB Footprint = msmps-s02-xxr
K3.3VS 86,88
KGND P/N = 6-86-2B010-004 KGND
MSMPS-SN2(01T)
Title
[87] P650RS USB BOARD_K 2/3
A3 P650RS 6-71-P65S3-D02A D02A

5 4 3 2 1
B - 88 P650RS USB Board 2/3

Schematic Diagrams

5 4 3 2 1
KVDD3
LAN BOARD
ܶUSB3.0x2, PHONE JACK, SIM)
(ܶ
KC3 KJ_MB1
K5V 1 2
0.1u_16V_Y5V_04 1 2 KUSB_PN4 87
D 3 4 D
3 4 KUSB_PP4 87
KC1 KC2 5 6
7 5 6 8
7 8 KUSB3_TXN4 87
2.2u_6.3V_X5R_04 0.1u_16V_Y5V_04 9 10
KGND 9 10 KUSB3_TXP4 87
11 12
11 12 KUSB3_RXN4 87
13 14
13 14 KUSB3_RXP4 87
KGND KGND 15 16
17 15 16 18
19 17 18 20
K3.3V K3.3VS 21 19 20 22
23 21 22 24
23 24
25 26
KC4 KC5 27 25 26 28
29 27 28 30
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 31 29 30 32
33 31 32 34
33 34 KCLK_PCIE_GLAN# 86
35 36
KGND KGND
KVDD3
37
39
35
37
36
38
38
40
KCLK_PCIE_GLAN 86
Sheet 88 of 91
39 40 KPCIE_TXN5_GLAN 86
41 42
C
K3.3V 43
45
41
43
42
44
44
46
KPCIE_TXP5_GLAN
KPCIE_RXN5_GLAN
86
86
C P650RS USB Board
45 46 KPCIE_RXP5_GLAN 86
47
49 47
49
48
50
48
50
KDETECT_SW 87
3/3
51 52
51 52 KLAN_CLKREQ# 86
53 54
87 KUIM_PWR 53 54 KPCIE_WAKE# 86
55 56
87 KUIM_DATA 55 56 KLAN_WAKEUP# 86
57 58
87 KUIM_CLK 57 58 KBUF_PLT_RST# 86
59 60
87 KUIM_RST 59 60 KDD_ON# 87
61 62
63 61 62 64 KCLK_PCIE_SD40
K3.3VS 63 64
65 66 KCLK_PCIE_SD40#
67 65 66 68
69 67 68 70 KPCIE_RXN6_SD40
71 69 70 72 KPCIE_RXP6_SD40
73 71 72 74 KPCIE_TXN6_SD40 reserved SD40
75 73 74 76 KPCIE_TXP6_SD40
77 75 76 78
79 77 78 80 KSD40_CLKREQ#
79 80
B 51049-08041-001 B
6-21-C1400-240 KGND
KH2 KH1 KGND PCB Footprint = 51049-0804X-A
*H7_0B7_5D2_2 *H7_0B7_5D2_2
65USB D02A
2/18 del kh16
5/10 ᖲዌ
࠷௣ᝅ֞KH4
D02A
KGND KGND
KH7 KH3 KH5 KH6

KH8 *H7_5D2_8 Del KH9 *H4_2D2_2 Del KH10 *H4_2D2_2 *H4_2D2_2
*H7_5D2_8 5/10 ᖲዌ 5/10 ᖲዌ
֊ೈࣨ‫ޗ‬ ֊ೈࣨ‫ޗ‬ K5V 87
K3.3V 87
K3.3VS 86
D02A D02A
KR21 *0_04
A A
KGND KGND
KGND
KCHASSIS_GND Title
[88] P650RS USB BOARD_K 3/3
A4 P650RS 6-71-P65S3-D02A D02A

5 4 3 2 1

Schematic Diagrams
P670RS LED Board

5 4 3 2 1
YD1
YLED_ACIN YR4 330_04 YD1_1 1 2
YJ_MB
Oragne UHY
YLED_ACIN 2016/7/22
12 YLED_PWR YLED_PWR YD1_3
UYG
YR9 330_04 3 4
11 YLED_BAT_CHG
10 YLED_BAT_FULL
D02A Green RY-SP195UHYUYG4
9
D NC1
8
YLED_NUM# YLED_PWR trace ‫ף‬ษ AC IN/POWER ON LED D
YLED_CAP#
NC2 7 YLED_SCROLL# Y_GND
6 Y_WLAN_AIRPLANE#
5 Y_dGPU_LED
4 YSATA_LED#
3 YD2
2 Y_GND
YLED_BAT_CHG YR7 330_04 YD8_1 1 2
1 Y_3.3VS
FP225H-012S10M
Oragne UHY
PCB Footprint = fp225-012g UYG

YLED_BAT_FULL YR1 330_04 YD8_3 3 4
Green RY-SP195UHYUYG4
BAT CHARGE/FULL LED
Y_GND
Sheet 89 of 91 Y_3.3VS
P670RS LED Board C C
YR11 YR14 YR13 YR15 YR12 YR6
220_04 220_04 220_04 220_04 220_04 220_04
SCROLL AIRPLANE
A
A
LOCK CAPS LOCK NUM LOCK dGPU LED
YD7
LED
YD6
LED YD5
LED YD3 HDD LED YD4 LED
YD8
RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M
C
C
YR5 *0_04
C
YLED_SCROLL# YLED_CAP# YLED_NUM# YSATA_LED# Y_WLAN_AIRPLANE#
B B Y_dGPU_LED B
YQ1
DTC114EUA
E
Y_GND
YH4 YH3
YLED_PWR YH1 YH2
2 2
*H2_5B4_0D2_5 *H2_3B4_0D2_3
YLED_ACIN 5 5
3 1 3 1
YLED_BAT_FULL 4 4
YLED_BAT_CHG
*MTH2_3B7_0D2_3 *MTH2_3B7_0D2_3
1
1
D02A
YD10 YD11 YD12 YD13
Y_GND Y_GND Y_GND
A *V15AVLC0402 *V15AVLC0402 *V15AVLC0402 *V15AVLC0402 A
2
2
1YR *0_04 4YR *0_04 Title
ᔾLEDጤ
ጤឭ࣋
Y_GND Y_GND Y_GND Y_GND 2YR *0_04 5YR *0_04
[89] P670RS LED BOARD_Y
3YR *0_04 6YR *0_04 A4 P650RS 6-71-P67S4-D02A D02A
5 4 3 2 1
B - 90 P670RS LED Board

Schematic Diagrams

1 2 3 4 5 6 7 8
LAN (RTL8411B) Switching Regulator close to PIN48

Ra
Crystal ‫شޏ‬5032 SIZE 2 IN 1 SOCKET
meet realtek Freq tolerance 50ppm
ZRSET ZR26 2.49K_1%_04
ZGND
(>20mil) (>20mil) ZVDD10
ࣨՂStandard PUSH PUSH CARD READER
ZR24 *1K_04 ZREGOUT ZR3 0_06 ZVDD10
ZJ_CARD1
ZXTAL2 ZGND
ZR27 10K_04 ZSD_D2/MS_CLK_R P9
ZAVDD33
ZAVDD33 SD_DATA2
ZR25 1M_04 ZXTAL1
ZVDD10
FOR S5 WAKE UP ON LAN ZSD_D3/MS_D3_R P1
SD_DATA3
1 2 ZGND
ZT3
C A ZSD_CMD/MS_D2_R P2
ZPCIE_W AKE# 91 SD_CMD
A ZD3 RB751S-40C2 A
ZGND 4 3 TO SB PCH WAKE#.
ழ: La,Ca,Cb լՂٙ,RaՂ
LDO Modeழ Ղٙ P3
SD_VSS1
ZSD_CD#
ZLED_CR
ZX1 C286-001_25MHZ ZLAN_W AKEUP#
ZLAN_W AKEUP# 91
ZXTAL2
ZXTAL1
ၦขᒔᎁ৵ሽॴ,‫ޏ‬
‫ޏ‬SHORTሿ
ሿٙ
ZEECS
PCB Footprint = FSX3M P4
ZC31 ZC30 TO EC8587 PIN123 LAN_WAKEUP# ZVCC_CARD SD_VDD
ZLED1/GPO ZT2 ZC38 ZSD_CLK/MS_D0_R P5
10p_50V_NPO_04 ZLED2 ZT1 SD_CLK
10p_50V_NPO_04
0.1u_16V_Y5V_04 P6
48 SD_VSS2
47
46
45
44
43
42
41
40
39
38
37
3/29 ଥ‫إ‬PDA BUG
ZGND ZGND ZU2 BIOS pulls high or low to GPO pin, ZSD_D0/MS_D1_R P7
Pkease refer to LAN/PHY Disable ZGND SD_DATA0
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED2
LED1/GPO
LV_CEN
HV_GIGA
LED_CR
RSET
LANWAKEB
49 Application Note. ZSD_D1_R P8
E_PAD SD_DATA1 GND1
ZR16 1K_04 ZMS_BS/SD_W P# WP GND1 GND2
Z3.3VS SD_WP GND2
ZC10 Z3.3VS ZSD_CD# CD
ZGND 0.1u_16V_Y5V_04 COM SD_C/D
COM
ZGND ZR17
ZGND
15K_04 CS1R-201-H-N
ZLAN_MDIP0 1 36 ZREGOUT ZR13 ZGND PCB Footprint = CS1R-201-H-N
MDIP0 REG_OUT ZREGOUT
ZLAN_MDIN0 2 35 Remind that R109 using the
MDIN0 VDDREG ZD3V3 main power (S0 power). 6-21-A4400-112
ZVDD10 3 34 ZENSW REG *10K_04
ZLAN_MDIP1 4 AVDD10 ENSWREG 33
MDIP1 VDD1 ZVDD10
ZLAN_MDIN1 5 32 ZGND ZSD_CMD/MS_D2 ZR45 0_04 ZSD_CMD/MS_D2_R
MDIN1 VD33 ZAVDD33
ZLAN_MDIP2 6 31 ZISOLATEB
MDIP2 ISOLATEBPIN
ZVDD10
ZLAN_MDIN2
ZLAN_MDIP3
ZLAN_MDIN3
7
8
9
MDIN2
AVDD10
MDIP3 QFN48
PERSTBPIN
CLKREQBPIN
MS_BS/SD_WP#
30
29
28
ZPERSTB
ZCLKREQB
ZR14
ZMS_BS/SD_W P#
*0402_short
ZBUF_PLT_RST#
‫ڕ‬լࠌ‫ױش‬ឰၲ,࣍
LAN_CLKREQ#‫ڕ‬
91
࣍PCHጤ
ጤऴ൷PULL DOWN
ZR11 0_04 ZLAN_CLKREQ# 91
ZSD_D0/MS_D1
ZSD_D1
ZR42
ZR43
0_04
0_04
ZSD_D0/MS_D1_R
ZSD_D1_R
Sheet 90 of 91
10 27 ZVDD33/18
B
ZAVDD33
Z3.3VS
11
12
MDIN3
HV_GIGA
VDD3
DV33_18
HSON
HSOP
26
25
ZRTL8411B_HSON
ZRTL8411B_HSOP
ZC21
ZC20
0.1u_10V_X7R_04
0.1u_10V_X7R_04
ZPCIE_RXN5_GLAN
ZPCIE_RXP5_GLAN
91
91
ZSD_D2/MS_CLK ZR47
ZSD_CLK/MS_D0 ZR44
0_04
0_04
ZSD_D2/MS_CLK_R
ZSD_CLK/MS_D0_R
B P670RS USB Board
capacitors must be close to pin side.
SD_CMD/MS_D2
1/2
SD_CLK/MS_D0
SD_D2/MS_CLK
ZC1 ZSD_D3/MS_D3 ZR46 0_04 ZSD_D3/MS_D3_R

SD_D0/MS_D1
SD_D3/MS_D3
ߨփᐋ.
REFCLK_N
REFCLK_P
CARD_3V3
0.1u_16V_Y5V_04
PIN12 PULL HIGH: SWR Mode ZAVDD33 ৱEMIᒔ
ᒔᎁ‫ݙ‬,‫ޏ‬
‫ޏ‬SHORT ZC41
Close to chip
VDDTX
SD_D1
*5p_50V_NPO_04
ZENSW REG ZR19 *0_04
HSIN
HSIP
ZGND
RTL8411B
GIGA LAN ZR20 0_04
13
14
15
16
17
18
19
20
21
22
23
24
PULL LOW: LDO Mode ZGND

ZSD_CMD/MS_D2
ZCARD_3V3 ZCLK_PCIE_GLAN# 91
ZSD_CLK/MS_D0
ZSD_D2/MS_CLK
ZSD_D0/MS_D1
ZSD_D3/MS_D3
ZCLK_PCIE_GLAN 91
ZGND
ZEVDD10
ZPCIE_TXN5_GLAN 91 ZVCC_CARD ZCARD_3V3

Near Cardreader CONN
ZSD_D1
ZPCIE_TXP5_GLAN 91
ZR48 0.2R_5%_06 40 mil
ZVCC_CARD
ZC39 ZC42 ZC40
ZVDD10 ZVDD10 ZVDD10 ZVDD10 SD Card Remove
0.1u_16V_Y5V_04 4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04
PIN13 Fall time less than
ZC9 ZC7 ZC8 ZC5 1 ms when SD
ZGND card remove.
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 ZGND
PIN3 PIN8 PIN32 PIN46
C Near Cardreader CONN C
ZGND ZGND ZGND ZGND
2016/7/22
ZVDD33/18 ZVDD33/18 ZR31 0_04
ZR34 0_04 D02B
4 ZL6 3 ZDLMX1-
ZC23 ZC22 ฝၲZC9ॵ
ॵ२‫ػ‬ዪ೴഑փྒྷរ
1 2 ZDLMX1+
*4.7u_6.3V_X5R_06 0.1u_16V_Y5V_04 *W CM2012F2S-161T03
Pin#27 Pin#27 ZL4 ZR18 0_04
ZR22 0_04 ZJ_RJ1
ZGND ZGND ZLAN_MDIN0 12 13 ZLMX1- 4 ZL5 3 ZDLMX2- ZDLMX1+ 1 GND1
ZEVDD10 ZLAN_MDIP0 11 TD4- MX4- 14 ZLMX1+ ZDLMX1- 2 DA+ shield GND2
ZLAN_MDIN1 9 TD4+ MX4+ 16 ZLMX2- 1 2 ZDLMX2+ ZDLMX2+ 3 DA- shield
ZR1 0_06 ZLAN_MDIP1 8 TD3- MX3- 17 ZLMX2+ *W CM2012F2S-161T03 ZDLMX2- 6 DB+
ZVDD10 TD3+ MX3+ DB-
ZR10 0_04
ZC2 ZC3 ZR12 0_04
ZLAN_MDIN2 6 19 ZLMX3- 4 ZL3 3 ZDLMX3- ZDLMX3+ 4 Z_CHASSIS_GND
0.1u_16V_Y5V_04 1u_6.3V_X5R_04 ZLAN_MDIP2 5 TD2- MX2- 20 ZLMX3+ ZDLMX3- 5 DC+
VDD3 meet rising time PIN20 PIN20 ZLAN_MDIN3 TD2+ MX2+ DC-
3 22 ZLMX4- 1 2 ZDLMX3+ ZDLMX4+ 7
>1ms ZLAN_MDIP3 2 TD1- MX1- 23 ZLMX4+ *W CM2012F2S-161T03 ZDLMX4- 8 DD+ 91 ZVDD3
ZGND ZGND ZAVDD33 TD1+ MX1+ ZR6 0_04 DD-
91 Z3.3VS
10 15 ZR7 0_04 P JS-08SO1B
ZR49 *28mil_short-p ZR2 *28mil_short-p 7 TCT4 MCT4 18 4 ZL2 3 ZDLMX4- P/N = 6-21-B40C0-008
ZVDD3 TCT3 MCT3
4 21 PCB Footprint = PJS-08SL3B
ZC4 ZC6 ZC11 1 TCT2 MCT2 24 1 2 ZDLMX4+ medion
TCT1 MCT1 *W CM2012F2S-161T03 1ZR *0_04 4ZR *0_04
ZJ_RJ1
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 NS892402 ZL4 Medionႊ‫ޏ‬റ‫ش‬ற
PIN11 PIN32 PIN48 ZC28 medion ZNMCT_4 ZR28 75_1%_04 ZNMCT_R 2ZR *0_04 5ZR *0_04
D Medionႊ‫ޏ‬റ‫ش‬ற ZNMCT_3 PJS-08KABLXB D
ZR15 75_1%_04 ZC14
ZGND ZGND ZGND 0.01u_16V_X7R_04
GST5009 LF ZNMCT_2 ZR9 75_1%_04 6-21-B40D0-008 3ZR *0_04 6ZR *0_04
ZD3V3 6-19-41001-239 ZNMCT_1 ZR5 75_1%_04 10P_2KV_NPO_12
60 mil
40 mil D02A
ZR23 *28mil_short-p
LDO Mode
ZC12
ZC16
0.1u_16V_Y5V_04
*0.1u_16V_Y5V_04
6/2 EMI
Title
ZC32 0.01u_50V_X7R_04 ZR39 *0_04 Z_CHASSIS_GND [90] P670RS USB BOARD_Z 1/2
ZGND
ZC19 *0.01u_50V_X7R_04 Size Document Number Rev
ZGND A3 6-71-P67S3-D02C D02C
ᐗ೸৬ᤜቃఎ Date: Thursday, September 08, 2016 Sheet 90 of 91
1 2 3 4 5 6 7 8

Schematic Diagrams

5 4 3 2 1
Z3.3V
USB3.0 re-driver USB3.0 PORT4 ‫׳‬Ղ)
(MB‫׳‬
ZR30 *0_04
ZR35 *4.7K_04 ZUSBVCC3.0_6
ZR38 *4.7K_04
ZU1 100 MIL
ZR40 2K_1%_04 5 1
Z5V VIN VOUT
ZC15
D ZC13 2 D
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04
ZGND ZGND 4 3
EN# OC#
6
ZU3 ZGND
25 uP7549UMA5-20
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
ZR21 *4.7K_04 Z_SDA_P4 24 GND 7 Z_SCK_P4 ZR41 *4.7K_04 ZR4 *0402_short PCB Footprint = M-SOT23-5 ZGND
ZGND SMB_DATA SMB_SCK ZGND 91 ZDD_ON#
2A/90mohm
ZTXN4 0.1u_10V_X7R_04 ZC24 23 8 ZC34 0.1u_10V_X7R_04 ZUSB3_TXN4
TX1- RX1-
ZTXP4 0.1u_10V_X7R_04 ZC25 22 9 ZC35 0.1u_10V_X7R_04 ZUSB3_TXP4
TX1+ RX+
21 10 ZC18 22u_6.3V_X5R_08
To Conn. TYPE_IND# CHIP_EN# ZGND From PCH
ZRXN4 0.1u_10V_X7R_04 ZC26 20 11 ZC36 0.1u_10V_X7R_04 ZUSB3_RXN4 ZC17 22u_6.3V_X5R_08
Reserverd
RX2- TX2- ZUSBVCC3.0_6 ZGND
SW_B
EQ_B
ZUSB3_RXP4
DE_B
ZRXP4 0.1u_10V_X7R_04 ZC27 19 12 ZC37 0.1u_10V_X7R_04
GND
VCC
RX2+ TX2+ ZJ_USB3_1
ZTXP4_J 9 GND1
18
17
16
15
14
13
Standard-A
ASM1464 Z3.3V 1 SSTX+ SHIELD
PCB Footprint = QFN24-4X4MM Z3.3V ZTXN4_J 8 VBUS
ZUSB_PN4_J 2 SSTX-
4 D-
ZUSB_PP4_J 3 GND
D+
Sheet 91 of 91 ZR36 *0_04 ZR37

ZR33
ZR32
*4.7K_04
*4.7K_04
*4.7K_04
ZC29
0.01u_16V_X7R_04
ZC44
0.1u_10V_X7R_04
ZC33
1u_6.3V_X5R_04
ZRXP4_J
ZRXN4_J
6
7
5
SSRX+
GND_D
SSRX- SHIELD
GND2
C 2/3 ME‫شޏ‬ற C
P670RS USB Board ZR29 *0_04

USB3.0 Max Trace length
Follow Design Guide
UB251H-009G11M
P/N = 6-20-B4Z10-009
ZGND ZGND PCB Footprint = 317AH09FZTS4T4CX ZGND
2/2 ࠷௣co-lay, ‫ྤڂ‬layout़

़ၴ
ZGND
CLOSE TO CONNECTOR ZD1

M:6-20-B4Z10-009
S:6-20-B4Z40-109
ZD2
ZUSB_PN4 1 ZL1 2 ZUSB_PN4_CON 6 5 ZUSB_PN4_J ZTXP4 6 5 ZTXP4_J

ZUSB_PP4_CON 7 4 ZUSB_PP4_J ZTXN4 7 4 ZTXN4_J
ZUSB_PP4 4 3 8 3 8 3
ZGND ZGND ZGND ZGND
9 2 ZRXP4 9 2 ZRXP4_J
*W CM2012F2S-161T03-short 10 1 ZRXN4 10 1 ZRXN4_J
2/22 ZL1_Pin1/4 swap
D02 DT1140-04LP-7 3/18 ආ᝜৬ᤜࠌ‫ش‬20KV ESD D02 DT1140-04LP-7
LAN BOARD
ܶUSB3.0x2, PHONE JACK, SIM)
(ܶ ZH3
ZH4 ZH1 ZH7 ZH6
ZJ_MB1 2
2 2 2 2
ZUSB_PN4 5
Z5V 1 2 1 5 5 5 5
1 2 ZUSB_PP4 3 1 1 1 1
3 4 3 3 3 3
3 4 4
B ZC47 ZC48 5 6 4 4 4 4 B
ZVDD3 7 5 6 8 ZUSB3_TXN4
7 8 ZUSB3_TXP4 *MTH8_0D2_8
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 9 10 ZR8 *0_04 *MTH8_0D2_8 *MTH10_0D2_8 *MTH5_0D2_3 *MTH5_0D2_3
11 9 10 12 ZUSB3_RXN4
ZC46 13 11 12 14 ZUSB3_RXP4
ZGND ZGND 15 13 14 16
15 16 ZGND
0.1u_16V_Y5V_04 17 18 Z_CHASSIS_GND
19 17 18 20
21 19 20 22
23 21 22 24 DEL USB3.0_XX3 ZH2
ZH5
23 24 *H5_5D2_5
ZGND 25 26 *H5_0D2_5
27 25 26 28
29 27 28 30
31 29 30 32
33 31 32 34
Z3.3V Z3.3VS 33 34 ZCLK_PCIE_GLAN# 90
ZVDD3 35 36
35 36 ZCLK_PCIE_GLAN 90
37 38
39 37 38 40
39 40 ZPCIE_TXN5_GLAN 90 ZGND
ZC45 ZC43 41 42
41 42 ZPCIE_TXP5_GLAN 90
Z3.3V 43 44
43 44 ZPCIE_RXN5_GLAN 90
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 45 46
45 46 ZPCIE_RXP5_GLAN 90
47 48
49 47 48 50
51 49 50 52
51 52 ZLAN_CLKREQ# 90
ZGND ZGND 53 54
53 54 ZPCIE_W AKE# 90
55 56
55 56 ZLAN_W AKEUP# 90
57 58
57 58 ZBUF_PLT_RST# 90
59 60
59 60 ZDD_ON# 91
61 62
61 62 ZCLK_PCIE_SD40 ZVDD3 90
A
Z3.3VS 63 64 A
65 63 64 66 ZCLK_PCIE_SD40#
65 66 Z3.3VS 90
67 68
69 67 68 70 ZPCIE_RXN6_SD40
71 69 70 72 ZPCIE_RXP6_SD40
73
75
71
73
75
72
74
76
74
76
ZPCIE_TXN6_SD40
ZPCIE_TXP6_SD40 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
77 78 Title
77 78
79
79 80
80 ZSD40_CLKREQ#
[91] P670RS USB BOARD_Z 2/2
51049-08041-001 Size Document Number Rev
reserved SD40
ZGND PCB Footprint = 51049-0804X-A ZGND
A3 P650RS 6-71-P67S3-D02C D02C
67USB D02C Date: Thursday, September 08, 2016 Sheet 91 of 91
5 4 3 2 1
B - 92 P670RS USB Board 2/2

CLEVO P670HP6 (-G) P671HP6 (-G) (P670HP6 Skylake) 6-71-P65P0-D02A

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CLEVO P670HP6 (-G) P671HP6 (-G) (P670HP6 Skylake) 6-71-P65P0-D02A

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Schematic Diagrams

Appendix B: Schematic Diagrams

Diagram - Page Diagram - Page Diagram - Page Diagram - Page

Frame Buffer Partition C - Page B - 24 M.2 WiGig/WLAN + BT - Page B - 48 PEX_VDD - Page B - 72

System Block Diagram

P670 3DAMP AUDIO BOARD

P650 HDD BOARD N17E-G1 6,3GB H-processor <=4.5"

6-71-P67S4-D02A SHEET 89 H Platform OPA1622

Diagram 6-71-P67S3-D02C NEW SHEET 90,91 SHEET 45

Date: Thursday, September 08, 2016 Sheet 1 of 91

B - 2 System Block Diagram

E25 B25 PEG_TX_0 C863 0.22u_10V_X5R_04

R578 24.9_1%_04 PEG_COMP G2

Date: W ednesday, September 07, 2016 Sheet 2 of 91

AUD_AZACPU_SDI_R R190 20_1%_04

H: PORT2 (NV) (DEFAULT)

M-SOT23-CBE QFN60-5X9MM 6-03-83316-031

Date: W ednesday, September 07, 2016 Sheet 3 of 91

Date: W ednesday, September 07, 2016 Sheet 4 of 91

NEAR CPU Θ CFG[0]: Stall reset sequence after PCU

BT13 CFG[19] BN22

38 H_PW RGD BT31

Sheet 5 of 91 37 PLTRST_CPU_N BP35 BT28

Processor 4/7 C R682 *0402_short J31 H_TDO R290 51_04 C

H_SKTOCC_N R681 100K_04

SKL_H_CPU REV = 1 49.9_1%_04

VDD3 R135 VCCST_PWRGD

R143 0_04 2 G 1: DISABLED;

11: (Default) x16 - Device 1 functions 1 and 2 disabled

DEFENSIVE PULL DOWN SITE

A G C973 1: (Default) PEG Train immediately following xxRESETB de assertion A

Date: W ednesday, September 07, 2016 Sheet 5 of 91

PLACE CAPS AT BOARD EDGE

6/8 MEଥ‫ޏ‬ሽ୲‫ޗ‬ᔆ D02A AB35 VCC VCC W35 BM17 VCCOPC

AD32 VCC VCC P33

K14 VCC VCC U29 BN16 RSVD

VCC_VCORE_SENSE R271 VSS_VCORE_SENSE

Date: W ednesday, September 07, 2016 Sheet 6 of 91

PLACE CAP BACKSIDE

VCCVDDQ_CLK 1.0V_VCCSFR 1.0V_VCCST

K32 VCCSA VDDQ AG5 D1 BM33

M31 VCCSA VDDQ J6 BN33 RSVD RSVD_TP BK16

H27 VCCIO VCCSTG G3 RSVD AJ8

PLACE CAP BACKSIDE VCCSA VCCSA

Date: W ednesday, September 07, 2016 Sheet 7 of 91

PLACE CAP IN BOARD EDGE VCCGT

Date: Wednesday, September 07, 2016 Sheet 8 of 91

DDR CHA SO-DIMM_0

Channel A SO-DIMM 0[RAM1] J_DIMMA_2A

160 VDD19 VTT

DQ18 M_A_DQ18 4,10 GND2

DIMM_0 C 4,10 M_A_RAS# M_A_DQ35 4,10 193 VSS VSS 192 C

10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 D4AR0-26001-1P40 D02

10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 R610

Date: W ednesday, September 07, 2016 Sheet 9 of 91

B - 10 DDR CHA SO-DIMM_0

DDR CHA SO-DIMM_1

Channel A SO-DIMM 1[RAM3] STD TYPE

C494 C403 C512 C469 C430 C582 C424 C485 Title

3/18 ‫ޏ‬੡٥‫ش‬ற0603 size

Date: W ednesday, September 07, 2016 Sheet 10 of 91

DDR CHA SO-DIMM_1 B - 11

DDR CHB SO-DIMM_0