EtherCAT Device Protocol

ESM Terminology CoE Process data

EtherCAT State Machine (ESM) CoE Object Dictionary (OD) Modular Device Profile (MDP) Process data configuration
The EtherCAT State Machine defines a step-by-step set-up of each individual RxPDO Assigment
RxPDOs
Request
Write
The OD is based on CANopen® and provides a structure for any EtherCAT device. Each object is The MDP provides a basic structure for any EtherCAT slave to organize physical or logical The EtherCAT process data configuration allows very flexible PDO description. PDO configuration can be either fixed, selectable or configurable. When using MDP objects, inputs
obj0x1C12
EtherCAT slave device and indicates available functionalities. A device can re- RxPDO Mapping
obj0x7000 ff. Download
MBoxOut
Outputs
Out addressed by a 16-bit index and can have up to 255 object entries, addressed by an 8-bit sub- modules within the device, based on the CoE OD. The slave’s data is grouped based on its (obj0x6000 – 0x6FFF) and outputs (obj0x7000 – 0x7FFF) are mapped to PDO Mapping objects (obj0x1600 – 0x16FF for RxPDO Mapping and obj0x1A00 – 0x1BFF for TxPDO Mapping) and assigned
obj0x1600 ff.
ject a state request from the master and signal an error with an error indica- index (SI). The following Object Codes are distinguished: physical structure and/or logical/software structure. The MDP structure is based on so-called to the respective SM via obj0x1C12 (SM2) and obj0x1C13 (SM3) for PDO Assignment. PDO Mapping and PDO Assignment objects are used by complex devices (with online and offline OD) as well

Master

Slave
tion (error flag in AL Status register) and a related error code (AL Status Code VARIABLE: Sl0 only modules. A module has an assigned index range, typically: as by simple devices (only in the EtherCAT Slave Information file).
register). The state request, state response and error response is exchanged ARRAY*: all entries have the same data type and name except SI0 1 RxPDO, 1 TxPDO (PdoIncrement = 1)
TxPDO Assigment TxPDOs Response
via the ESC AL Control register (reg0x0120), AL Status register (reg0x0130) and obj0x1C13
0x6000 ff. Inputs RECORD*: entries may have different data types and names 16 objects (with up to 255 entries per object) per functional index area (inputs, outputs,
In TxPDO Mapping
obj
Upload Example: PDO Mapping and PDO Assignment
AL Status Code register (reg0x0134). The ESM specifies the slave behavior, obj0x1A00 ff.
MBoxIn Read *SI0 defines the highest supported subindex. SI1 always has a 16-bit offset. configuration, information, diagnosis) (IndexIncrement = 16).
while the master adopts it respectively. The ESM description below outlines Information which is not specific for a module is organized in the 0xFxxx Device index area. This example shows a fixed output mapping. The input mapping is selectable; either mapping A or B can be sassigned to SM3 via obj0x1C13
the basic actions for each state transition: commands sent by the master CoE base data types (excerpt)
Outputs (SM2) Inputs (SM3)
and (local) behavior of the connected devices. Value Data Type Value Data Type Value Data Type Value Data Type CoE Object Dictionary structure, incl. MDP structure
obj 0x1C12:1 obj 0x1C13:1
0x0001 BOOL/BIT 0x0006 UINT 0x000B ARRAY of UINT 0x001F WORD General OD structure, MDP structure (0x6000 ff.) and attributes of the functional index areas: 0x1600: SI 1 to 5
obj 0x1A00: SI 1 to 4
obj obj 0x1A01: SI 1 to 2
0x0002 SINT 0x0007 UDINT 0x0011 LREAL 0x0020 DWORD
INIT (reg0x0120/reg0x0130 = 0x1): Only access to ESC registers MDP Device OD Area OD Index Range Fixed mapping Mapping A Mapping B
0x0003 INT 0x0008 REAL 0x0015 LINT 0x0260 ARRAY of INT
Object Dictionary Module 0 Module 1 … Module n Communication index area 0x1000 – 0x1FFF
Master Master 0x0004 DINT 0x0009 STRING(n) 0x001B ULINT 0x0261 ARRAY of SINT
Communication area (0x1000 – 0x1FFF) RxPDO Mapping 0x1600 – 0x17FF
Clear: Configuration registers, e.g.: Clear: SM0 for Mailbox Out (reg0x0800 – 0x0807) 0x0005 USINT 0x000A ARRAY of BYTE 0x001E BYTE 0x0262 ARRAY of DINT obj0x7000:1 Cycle count obj0x6000:1 Status Ch.1 obj 0x6000:1 Status Ch.1
e.g. object 0x1000, 0x1018, 0x10F3 TxPDO Mapping 0x1A00 – 0x1BFF
FMMUs (reg0x0600 – 0x06FF) SM1 for Mailbox In (reg0x0808 – 0x080F) obj0x7000:2 Control Ch.1 obj0x6000:2 Sample Ch.1 obj 0x6000:2 Sample Ch.1
Reference: ETG.1020 – Base Data Types RxPDOs (0x1600 – 0x17FF) 0x1600 0x1601 ... 0x16nn RxPDO Assignment 0x1C12 obj0x7000:3 Sample Ch.1 obj0x6000:3 Time stamp Ch.1
SyncManagers (SM) (reg0x0800 – 0x087F)
Set: Fixed Physical Address (reg0x0010) TxPDOs (0x1A00 – 0x1BFF) 0x1A00 0x1A01 ... 0x1Ann TxPDO Assignment 0x1C13 obj0x7000:4 Control Ch.2
CoE SDO (Service Data Object) services obj0x7000:5 Sample Ch.2
SM0 for Mailbox Out (reg0x0800 – 0x0807) Manufacturer specific area (0x2000 – 0x5FFF) Modules index area 0x6000 – 0xAFFF
SM1 for Mailbox In (reg0x0808 – 0x080F) Upload Upload
Input area (0x6000 – 0x6FFF) 0x6000 – 0x600F 0x6010 – 0x601F ... 0x6nn0 – 0x6nnF Input area 0x6000 – 0x6FFF
If DC: DC System Time setup:
Delay compensation (reg0x0900, reg0x0928) Request Download Download Response Tx-mappable, read-only Output area 0x7000 – 0x7FFF
Offset compensation (reg0x0918, reg0x0920) Output area (0x7000 – 0x7FFF) 0x7000 – 0x700F 0x7010 – 0x701F ... 0x7nn0 – 0x7nnF Device index area 0xF000 – 0xFFFF
OD List OD List
Static drift compensation (~15.000 times) (reg0x0910)

Master

Slave
Rx-mappable, read-writeable
Info Object Desc. Object Desc. Info
Configuration area (0x8000 – 0x8FFF) 0x8000 – 0x800F 0x8010 – 0x801F ... 0x8nn0 – 0x8nnF
Slave Slave References: ETG.1000.5 – Process data interaction | ETG.1000.6 – Object Dictionary | ETG.5001.1 – PDO Mapping and PDO Assign
Entry Desc. Entry Desc. read-writeable, usually not mappable
Verify: Mailbox SyncManager settings Stop: Mailbox communication (STOP_MBX_HANDLER)
Start: Mailbox communication (START_MBX_HANDLER) Abort Information area (0x9000 – 0x9FFF) 0x9000 – 0x900F 0x9010 – 0x901F ... 0x9nn0 – 0x9nnF
Confirm: State request to PRE-OPERATIONAL read-only, usually not mappable DC unit and synchronization
SDO services are used to read from and write to the online OD of the slave in a confirmed Diagnosis area (0xA000 – 0xAFFF) 0xA000 – 0xA00F 0xA010 – 0xA01F ... 0xAnn0 – 0xAnnF
PRE-OPERATIONAL (reg0x0120/reg0x0130 = 0x2): Mailbox communication available BOOT (0x3): optional Distributed Clocks (DC) and synchronization Synchronization modes
fashion. They are also used to read the OD structure. The master sends an SDO request, the Device area (0xF000 – 0xFFFF)
e.g. object 0xF000, 0xF010, 0xF030, 0xF050 Synchronization of master and slave applications is based on a common time Applications may require different degrees of synchronization which is reflected by the different
Master Master slave sends either an SDO Response or an SDO Abort. The following SDO Request/Response
Set: Configuration objects via SDO, e.g.: Clear: SM2 for outputs (reg0x0810 – 0x0817) in the network (DC System Time). The synchronization modes define how this EtherCAT synchronization modes. The basic operation for DC modes is setup via reg0x0980 – 0x0981.
services are defined:
RxPDO / TxPDO Assignment (obj0x1C12 / obj0x1C13) SM3 for inputs (reg0x0818 – 0x081F) Reference: ETG.5001 – MDP Device model common time is used to synchronize the local applications. The SYNC/LATCH Additional information is provided by the SyncManager Parameter objects obj0x1C32 for SM2 and
SDO Upload: read object/object entry from online OD
RxPDO / TxPDO Mapping (reg0x1A00 – 0x1BFF / reg0x1600 – 0x17FF) FMMU0 (maps outputs) (reg0x0600 – 0x060F) unit is used to generate SYNC/LATCH events based on the System Time. obj0x1C33 for SM3 (incl. minimum cycle time, calc and copy time, error counters).
SM2 for outputs (reg0x0810 – 0x0817) FMMU1 (maps inputs) (reg0x0610 – 0x061F)
SDO Download: write object/object entry from online OD
Profiles
SM3 for inputs (reg0x0818 – 0x081F) Disable: Distributed Clocks (reg0x0980) Get OD List: returns all object indexes of the online OD
The major part of profiles is based on the CoE OD (incl. range 0x6000 ff.), while there are MDP- DC System Time Free Run: Application is triggered by local clock and runs independently μC
FMMU0 (maps outputs) (reg0x0600 – 0x060F) Get Object Description: returns object name/code, data type and max. number of entries
FMMU1 (maps inputs) (reg0x0610 – 0x061F) based profiles and the IEC61800 drive profiles (incl. “DS402”). The 32-bit profile number is pro- from EtherCAT cycle. ESI element Device:Dc is not available and obj0x1C32/3 is PDI
Get Entry Description: returns value info, data type, bit length, access rights of an entry The System Time is a 64-bit ns-based time starting 01.01.2000, 0:00h, or a 32-bit

ESC
Local
If DC: Configure SYNC/LATCH unit: vided by the slave via Obj0x1000, Obj0xF010 and via ESI element Device:Profile or Module:Profile. optional if only Free Run is supported.
Reference: ETG.1000.5 – CoE service specification | ETG.1000.6 – CoE coding time respectively. After setting up the DC time, master and slaves share the Appl.
Set SYNC cycle time (reg0x09A0 – 0x09A7)
Bit 0-15 is the device profile number (e.g. 5003 for Semi Device Profile). Bit 16-31 is the module same time base. The first DC slave behind the master is used as the reference
Set DC start time (reg0x0990 – 0x0997)
(reg0x0980 – 0x0981)
profile number (e.g. 2020 Mass Flow Controller). Important profiles are: clock. Each slave device has a local copy of the System Time stored in reg0x0910.
Set DC SYNC OUT unit SDO Command SDO Services SM-Synchronous: Application is synchronized with the SM2 (SM3) event, μC
Set DC LATCH IN unit (reg0x09A8 – 0x09A9) ETG.5001.1 – General MDP Device Model Specification:
Specifier 0x02: SDO Request 0x03: SDO Response 0x08: SDO Info which is generated when process data is written to SM2 (read from SM3). PDI

References: ETG.1000.5 – AR ( Application Relationship)

Start continuous drift compensation (reg0x0910 – 0x0917) Basic structure for any EtherCAT slave
Start: Cyclic process data
0x00 Download Segmented Upload Segmented Events are mapped to global IRQ or polled from reg0x0220. ESI element
ETG.5001.3 – MDP Fieldbus Gateway Profile Specification:

ESC
0x01 Download Download Segmented Get OD List Req. DC System Time setup (1-3) and continuous drift compensation (4) Device:Dc is not available if only SM-Synchronous is supported. If both, Global IRQ
Incl. profiles for EtherCAT masters, Profibus DP, CAN, CANopen, DeviceNet Local
Slave Slave 0x02 Upload Upload Get OD List Resp. SM-Synchronous and DC-Synchronous are supported, then it is indicated in Appl.
ETG.5001.4 – MDP Safety Module Specification:
Verify: Process data SyncManager settings, PDO Mapping/Assignment Stop: Cyclic process data 0x03 Upload Segmented Download Get Object Description Req. the ESI by Dc:AssignActivate = "#x0000"

ETG.1000.6 – AL state machine

Incl. profiles for FSoE Digital I/O connection, FSoE Safety Drive Profile, FSoE Master syncronization of applications
Start: Input update (START_INPUT_HANDLER)
0x04 Abort Transfer Get Object Description Resp. ETG.5003 – Semi Device Profile:
Provide: Valid Inputs PLC Appl. Appl. Appl. DC-Synchronous: Application is synchronized using DC-based interrupt μC
0x05 Get Entry Description Req. Based on MDP structures, incl. profiles for mass flow controllers, temperature controllers,

ETG.1000.4 – Attributes
Confirm: State request to SAFE-OPERATIONAL xRMW signals (SYNC0, SYNC1; ns-accuracy), generated by the SYNC/LATCH unit.
0x06 Get Entry Description Resp. pressure gauges, valves, chillers, pumps, RF DC generators ESC (ref. clock) ESC ESC

ETG.2000 – InfoType
Among many other DC modes, the following two show basic concepts: PDI
SAFE-OPERATIONAL (reg0x0120/reg0x0130 = 0x4): Process data available, outputs still in safe state 0x07 Master 0x0910 ff. 0x0910 ff. 0x0910 ff.
SDO Info Error Req. ETG.6010 – Implementation Directive for CiA402 Drive Profile (IEC61800-7-201) reg reg reg
SYNC0: triggers the complete processing of the local cycle (see Minimum
reg0x0990 ff. reg0x0990 ff. reg0x0990 ff.

Master Cycle Time) Global IRQ Local

ESC
establishing common time base
Provide: Valid outputs SM2 and SYNC0 (even higher synchronization accuracy of the output Appl.
Slave structure and EtherCAT Slave Controller (ESC) event): SM2 event triggers reading of output data from SM2, processing, SYNCx
Slave Slave 1. Propagation Delay: write to reg0x0900 latches receive times on all ports; read writing values to hardware drivers; then the SYNC0 event is used to acti-
The ESC processes the EtherCAT frames on the fly in hardware and implements the functionalities of the data link layer (DLL). Those include SyncManagers (SM), Fieldbus Memory Management
Verify: Synchronization with DC, if required Stop: Output update (STOP_OUTPUT_HANDLER) latched times, calculate delays; write individual values to reg0x0928 vate output drivers. ESI element Dc:AssignActivate = "#x0300" for SYNC0
Units (FMMU) and DC unit. Typically, EtherCAT slaves implement the application layer (AL) functionalities such as the ESM, parameter handling and process data handling on a μC – such slaves are
Start: Output update (START_OUTPUT_HANDLER) 2. Offset: read individual local times; calculate offset to time reference; event generation
Confirm: State request to OPERATIONAL called “complex device”. Only for very simple I/O devices without parameters and without necessary AL error handling, the I/O hardware drivers are connected directly to the digital I/O interface of
write individual offsets values to reg0x0920 Frame jitter
the ESC – such slaves are called “simple device”.
3. Static Drift: read System Time from reference clock and write to individual
OPERATIONAL (reg0x0120/reg0x0130 = 0x8): Input and output process data available The block diagram combines elements of the slave’s hardware structure, functional entities of the ESC, software structure and protocol elements. Frames Frame Frame
DC slaves via multiple (~15.000) xRMW datagrams
State transition/default timeout: PreopTimeout (3000ms) SafeopOPTimeout (10000ms) BackToSafeopTimeout (200ms) BackTolnitTimeout (5000ms) 4. Continuous Drift: distribute System Time (xRMW) together with cyclic
Interrupt SM2/3 event SYNC0 SM2/3 event SYNC0
frames, e.g. every ms to keep deviation of distributed times small
AoE EoE FoE SoE CoE Process
ESM
Frame processing and examples 0x01 0x02 0x08 0x10 0x03 data Reference: ETG.1000.4 – Distributed clock Free Run
Application Application Application Application
Local Clock
Communication principle µC AL SM-Synchronous
Application Application

μC
EtherCAT communication is always initiated by the master by sending frames via its Ethernet interface. Those are processed on the fly by the ESC. Processing within the ESC works in a Minimum Cycle Time µs-jitter
Mailbox service (read, write)
“roundabout” fashion: Behind the EtherCAT Processing Unit (EPU) the frame is forwarded to the next port (and, if open, sent out to be processed by other slaves), while the returning frame DC-Synchronous with SYNC0
Application Application
is sent back to the master via port 0. Port 0 shall always be the IN port of the slave device. The topology always forms a logical ring, and neither frame collision nor congestion can occur by ns-jitter
design. Throughput time can be calculated precisely, and errors can be detected easily via status and error counter registers (reg0x0100, reg0x0300 – 0x0313). SM access Process Activate Mailbox
...
Latch Process SM access
DC-Synchronous with SM2 and SYNC0 Application Application
Reference: ETG.1000.5/6 PDI (Physical Device Interface) SYNCx LATCHx
read outputs outputs outputs service inputs inputs write inputs
ns-jitter activate outputs activate outputs
Reference: ETG.1000.4 – Frame processing principles
Reference: ETG.1020 – Synchronzation Reference: ETG.1020 – Synchronzation | ETG.2000 – DC
Frame structure Logical ring Frame processing and forw. order
Slave Information Interface ESC memory DC unit
48 bit Datagram ex. 1: Read/write access to registers
Ethernet header

Destination MAC address

(SII; EEPROM)
Master
Registers Dual-ported RAM SM and FMMU
Source MAC address 48 bit EPU PORT 3 ESC Configuration SYNC/LATCH unit
0x0000 - 0x0FFF SyncManager (SM)
Configured Station Alias Mailbox Process data
Data

Value read from / to be written to register DC control

EtherType (0x88A4) 16 bit CRC SMs coordinate access to the ESC memory from both sides, EtherCAT and Register Mailbox Process data
PORT 1
PORT 0

ESC Identity PDI. This ensures data consistency. In case of mailbox communication
Info (128 Bytes)

11 bit 0x0800 ff. Phys. start Length Direction,

EtherCAT header

Length Vendor ID reg

SM0 (Mailbox Out) SM1 (Mailbox In) SM2 (outputs) SM3 (inputs) it ensures that mailbox messages are not overwritten (1-buffer mode). SM0 SM1 SM2* SM3*
Datagram ex. 2: Mailbox communication, Product Code address Buffer No.
Reserved 1 bit In case of process data communication it ensures that process data can
CoE SDO Service (via SM0, SM1) Revision Number 0x0800 0x0802 0x0804 Out, 1-buffer
PORT 2 always be written to the memory by EtherCAT and can always be read by
Serial Number ESC 0x0600 ff. 0x0808 0x080A 0x080C In, 1-buffer
PDI side and vice versa (3-buffer mode). SyncManager 2/3 length is equal
reg
Type (0x01) 4 bit Length of Mailbox Service Data 16 bit FMMU0 FMMU1 DLL
Hardware Delays
0x0810 0x0812 0x0814 Out, 3-buffer
Bootstrap MBX SM Configuration 0x0900 ff. to the Rx/TxPDO length so that buffers internally are swapped once data
8 bit
reg
Command Address 16 bit 0x0818 0x081A 0x081C In, 3-buffer
Standard MBX SM Configuration was completely written/read.
EtherCAT Processing Unit (EPU)
Index 8 bit Channel 6 bit Strings Reference: ETG.1000.4 – Sync manager *physical memory = 3 times Rx/TxPDO length
Mailbox header

Specific port and error registers General

Address 32 bit Priority 2 bit FMMU Auto-forwarder and loopback
Port Fieldbus Memory Managment Unit (FMMU)
Categories
Datagram header

Register SM
11 bit 0 1 2 3
Length 4 bit Typically, logical commands (LRD, LWR, LRW) are used for process data exchange: A single Lxx command addresses one or multiple slaves. The FMMUs of the individual slaves are configured
Ethernet frame (IEEE802.3): 64-1518 Bytes (up to 1522 Bytes if VLAN is used)

Mailbox Type (e.g. CoE) RxPDO

DL Control 0x0100 – 0x0103 TxPDO during start-up to map the data from the EtherCAT command (logical address space) to the physical memory and vice versa. FMMUs are configured via registers starting at reg0x0600, see also
Port 0 (in) Port 1 (out) Port 2 (out) Port 3 (out)
reg
Reserved 3 bit Count 3 bit DL Status reg 0x0110 – 0x0111 DC example 3.
Frame Error Counter 0x0300 0x0302 0x0304 0x0306 ...
Circulating 1 bit Reserved 1 bit reg reg reg reg
Reference: ETG.1000.4 – Fieldbus memory management unit
Phys. Error Counter reg 0x0301 reg 0x0303 reg 0x0305 reg 0x0307 Reference: ETG.2010 Reference: ETG.1000.3/4 PhL
NEXT 1 bit Number 9 bit 0x0310 0x0311 0x0312 0x0313
Protocol header

Link Lost Counter reg reg reg reg

IRQ 16 bit Reserved 3 bit

Datagram 1

Datagram example 1: read/write access to register Datagram example 2: Mailbox communication, CoE SDO Service (via SM0, SM1) Datagram example 3: Process data exchange (FMMU) Commands
Data

SDO Service (e.g. Request, Response) 4 bit

EtherCAT frame
Ethernet data

In this example ESM register 0x0120, 0x0130, 0x0134 are written and read for state machine interactions. In this example an SDO Download Request is written to SM0 Mailbox Out and the response/abort is read from SM1 Mailbox In: A value is In this example process data is exchanged cyclically using a Logical Read Write command (LRW) EtherCAT commands (datagrams) address one or several slaves. Node
Size indicator 1 bit successfully downloaded to the configuration object obj0x8000:01 in case 1 and an abort is returned in case 2 with Abort Code 0x06090031 and mapped by FMMUs to and from the slave’s DPRAM (SM2/3). addressing (APxx, FPxx) logical addressing (Lxx) and broadcast address-
“Value of parameter written too high”. ing (Bxx) is possible. With each successfull read/write interaction every
Transfer type 1 bit Datagram slave increments the Working Counter (WKC).
Mailbox Service Data

Datagram Slave (ADP0x03E9) Slave 1 Slave n

Slave address 1001 (ADP0x03E9)
Data block size of the object 2 bit µC µC Specifier Cmd Description
Data

ESC µC
Command Address (position | offset) WKC processed by ESC 0x00 NOP No operation
Complete Access 1 bit Command Address (position | offset) Value WKC 0x01 APRD Auto increment physical read
ESC ESC

Reference: ETG.1000.4 – Fieldbus memory management unit

AL Control AL Status AL Status Code
Type Service Specifier Index SI Data processed by µC 0x02 APWR Auto increment physical write
SDO Command Specificer (e.g. Upload) 3 bit State request to PREOP reg0x0120 reg0x0130 reg0x0134
DPRAM DPRAM 0x03 APRW Auto increment physical read write
FPWR 0x03E9 | ADO0x0120 0x02 0x0000 Upload Request SM2 SM3 SM2 0x04 FPRD Configured address physical read
Object index 16 bit ADP

(8 Bytes) (5 Bytes) (4 Bytes) 0x05

Reference: ETG.1000.4 – EtherCAT frame structure

Reference: ETG.1000.4 – EtherCAT frame structure

FPWR Configured address physical write

ETG.1000.4 – Error detection overview

0x02 0x01 0x0000 FPWR 0x03E9 | ADO0x1000 0x0000
0x8000 0x01
Reference: ETG.1000.6 – Protocol State Machine

ADP CoE Req. Upload MBX_Main() 0x1800 0x1C00 0x1800 0x06 FPRW Configured address physical read write
Subindex 8 bit Req. PREOP INIT state No error
obj ADO ADO ADO
Check MBX SM settings

Working Counter 16 bit MailboxServiceInd() 0x07 BRD Broadcast read

0x0001 Configuration: FMMU0 FMMU1 FMMU0
Complete size 32 bit 0x08 BWR Broadcast write
COE_ServiceInd() Log. start address 0x06y0: 0x1000000 0x1000000 0x1000008
Case 1: Successful state change 0x0001 reg
0x09
Master

BRW Broadcast read write

Datagram 2

Length (Byte) reg0x06y4: 0x08 0x05 0x04

Master

Data of the object SDOS_Sdolnd()

Check MBX SM settings

0x0A LRD Logical memory read

Case 1: Upload Response Phys. start address reg0x06y8: 0x1800 0x1C00 0x1800
FPRD ADP 0x03E9 | ADO0x0130 0x0000 OBJ_Read() Direction reg0x06yB: 0x02 (write) 0x01 (read) 0x02 (write) 0x0B LWR Logical memory write
Datagram ex. 3: Process data exchange FPRD ADP 0x03E9 | ADO0x1080 0x0000 0x0C LRW Logical memory read write
y: FMMU number (0x0...0xF)

ETG.1000.6 – SDO
0x02 0x0000
0x02
(via SM2, SM3) PREOP state No error SdoRes()
0x0D ARMW Auto increment physical read multiple write
OK OK 0x0E FRMW Configured address physical read multiple write
Value of process data 1 0x02, 0x0000 0x0001
CoE Resp. Upload 0x8000 0x01 0x0001
...

Case 2: Rejected state change

obj
LRW 0x1.000.000 8 Byte data 4 Byte data WKC
Value of process data 2 Case 2: Abort Transfer Outputs (8 Bytes) Working Counter
Data

Inputs (5 Bytes) Command Action Increment

FPRD ADP0x03E9 | ADO0x0130 0x0000 FPRD 0x03E9 | ADO0x1080 0x0000
Padding … ADP
0x1.000.000 0x1.000.008
0x11 0x0016 xRD Successful read +1
0x01 INIT state, Invalid mailbox SdoRes() xWR Successful write +1
Frame Check Sequence (FCS) 32 bit Value of process data n Not OK Not OK
Error indication configuration xRW Successful read +1
0x11, 0x0016 0x0001 CoE Req. Abort 0x8000 0x01 0x6090031 0x0001 WKC+5 Successful write +2
References: ETG.1000.4 – EtherCAT frame structure | ETG.1000.6 – CoE coding obj

Specification: www.ethercat.org/etg<spec.number (4 digits)> Knowledge Base: www.ethercat.org/kb Developers Forum: www.ethercat.org/forum