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WPMD3002

WPMD3002

Dual P-Channel, -30V, -4.9A, Power MOSFET Http//:www.willsemi.com

VDS (V) Rds(on) (ȍ)


0.049@ VGS=-10V
-30
0.070@ VGS=-4.5V

Descriptions
SOP-8L
The WPMD3002 is the Dual P-Channel logic
mode power field effect transistors are produced using
high cell density, DMOS trench technology. This high
density process is especially tailored to minimize
on-state resistance. These devices are particularly
suited for low voltage application, notebook computer
power management and other battery powered circuits
where high-side switching. Pin configuration (Top view)

Features
WPM3002
YYWW
z Super high density cell design for extremely low
RDS(ON)

z Exceptional on-resistance and maximum DC WPM3002 = Device Code


current capability YY = Year
WW = Week
z SOP-8L package design
Marking
Applications

z Power Management in Note book Order information

z Portable Equipment
Device Package Shipping
z Battery Powered System
WPMD3002-8/TR SOP-8L 2500/Reel&Tape
z DC/DC Converter

z Load Switch

z DSC

z LCD Display inverter

Will Semiconductor Ltd. 1 Dec,2011 - Rev.1. 2


WPMD3002
Absolute Maximum ratings

Parameter Symbol 10 S Steady State Unit


Drain-Source Voltage VDS -30
V
Gate-Source Voltage VGS ±20
TA=25°C -4.9 -3.8
Continuous Drain Current a ID A
TA=70°C -3.9 -3.0
TA=25°C 1.9 1.1
Maximum Power Dissipation a PD W
TA=70°C 1.2 0.7
TA=25°C -4.5 -3.6
Continuous Drain Current b ID A
TA=70°C -3.6 -2.9
TA=25°C 1.6 1.0
Maximum Power Dissipation b PD W
TA=70°C 1.0 0.6
Pulsed Drain Current c IDM -30 A
Operating Junction Temperature TJ 150 °C
Lead Temperature TL 260 °C
Storage Temperature Range Tstg -55 to 150 °C

Thermal resistance ratings

Single Operation
Parameter Symbol Typical Maximum Unit
t ” 10 s 56 65
Junction-to-Ambient Thermal Resistance a RșJA
Steady State 87 105
t ” 10 s 64 76 °C/W
Junction-to-Ambient Thermal Resistance b RșJA
Steady State 96 115
Junction-to-Case Thermal Resistance Steady State RșJC 32 40
Dual Operation
t ” 10 s 61 70
Junction-to-Ambient Thermal Resistance a RșJA
Steady State 92 112
t ” 10 s 69 82 °C/W
Junction-to-Ambient Thermal Resistance b RșJA
Steady State 102 120
Junction-to-Case Thermal Resistance Steady State RșJC 36 45

a Surface mounted on FR4 Board using 1 square inch pad size, 1oz copper
b Surface mounted on FR4 board using minimum pad size, 1oz copper
c Repetitive rating, pulse width limited by junction temperature, tp=10μs, Duty Cycle=1%
d Repetitive rating, pulse width limited by junction temperature TJ=150°C.

Will Semiconductor Ltd. 2 Dec,2011 - Rev.1. 2


WPMD3002
Electronics Characteristics (Ta=25oC, unless otherwise noted)

Parameter Symbol Test Conditions Min Typ Max Unit


OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage BVDSS VGS = 0 V, ID = -250uA -30 V
Zero Gate Voltage Drain Current IDSS VDS = -24 V, VGS = 0V -1 uA
Gate-to-source Leakage Current IGSS VDS = 0 V, VGS = ±20V ±100 nA
ON CHARACTERISTICS
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250uA -1.5 -1.9 -2.5 V
VGS = -10V, ID = -4.9A 49 60
VGS = -10V, ID = -3.0A 49 60 mŸ
Drain-to-source On-resistance RDS(on)
VGS = -4.5V, ID = -4.0A 70 90
VGS = -4.5V, ID= -3.0A 70 90
Forward Transconductance gFS VDS = -15 V, ID = -3.0A 5.0 S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance CISS 670
VGS = 0 V, f = 1.0 MHz, VDS =
Output Capacitance COSS 75 pF
-15 V
Reverse Transfer Capacitance CRSS 62
Total Gate Charge QG(TOT) 14.0
Threshold Gate Charge QG(TH) VGS = -10 V, VDS = -15 V, 1.31
nC
Gate-to-Source Charge QGS ID = -4.9 A 1.80
Gate-to-Drain Charge QGD 1.60
SWITCHING CHARACTERISTICS
Turn-On Delay Time td(ON) 6.8
Rise Time tr VGS = -10 V, VDS = -15V, 3.2
ns
Turn-Off Delay Time td(OFF) RL=5.0 Ÿ , RG=15 Ÿ 25.2
Fall Time tf 4.4
BODY DIODE CHARACTERISTICS
Forward Voltage VSD VGS = 0 V, IS = -1.0A -0.55 -0.78 -1.50 V

Will Semiconductor Ltd. 3 Dec,2011 - Rev.1. 2


WPMD3002
Typical Characteristics (Ta=25oC, unless otherwise noted)
20 15

VGS= -10V VDS= -5V


-IDS_Drain to Source Current (A)

16 12

-IDS - Drain Current (A)


VGS= -4.5V T=-50 C
0

0
T=25 C
12 9
VGS= -4.0V

8 6 0
T=125 C
VGS= -3.0V
4 3

0
0 1 2 3 4 5 6 0
0 1 2 3 4 5 6
-VDS_Drain to Source Voltage (V)
-VGS - Gate to Drain Voltage (V)

Output characteristics Transfer characteristics

200 140
RDS(on)- On-Resistance (m:)
RDS(on)- On-Resistance (m:)

120
150
100

VGS= -4.5V
100 80 IDS= -4.9A

VGS= -10V 60
50
IDS=-3A
40

0 20
2 4 6 8 10 12 14 2 3 4 5 6 7 8 9 10
-IDS-Drain to Source Current (A) -VGS-Gate to Source Voltage(V)

On-Resistance vs. Drain current On-Resistance vs. Gate-to-Source voltage

80 2.4
-VGS(TH) - Threshold Voltage (V)

70 VGS= -10V DS
I = -4.9A 2.2 IDS= -250uA
RDS(on)- On-Resistance (m:)

60 2.0

50 1.8

40 1.6

30 1.4

20 1.2
-50 0 50 100 150 -25 0 25 50 75 100 125 150
0
Temperature ( C) Temperature ( C)
0

On-Resistance vs. Junction temperature Threshold voltage vs. Temperature

Will Semiconductor Ltd. 4 Dec,2011 - Rev.1. 2


WPMD3002

1000 1000

-ISD - Source to Drain Current (A)


VGS=0V f=1MHZ
800 800
C-Capacitance (pF)

0
T=150 C
600 600

400
Crss 400
Cout 0
T=25 C
200 Cin
200

0
0 4 8 12 16 20 0.3 0.4 0.5 0.6 0.7 0.8 0.9
-VDS - Drain to Source Voltage (V) -VSD - Source to Drain Voltage(V)

Capacitance Body diode forward voltage

50
100.0 TJ(Max)=150°C
TA=25°C
40
10Ps
RDS(ON)
10.0 limited
-ID (Amps)
Power (W)

30
100Ps

20
1ms
1.0 1s
10ms
10s
10 0.1s
DC
0.1
0.1 1 10 100
0 -VDS (Volts)
10-3 10-2 10-1 1 10 100 600
Time (s)

Single pulse power Safe operating power

1
Normalized Effective Transient

Duty Cycle = 0.5


Thermal Impedance

0.2
Notes:
0.1
0.1 PDM
0.05
t1
t2
t1
0.02 1. Duty Cycle, D =
t2
2. Per Unit Base = R thJA = 87 °C/W
3. T JM - TA = PDMZthJA(t)
Single Pulse 4. Surface Mounted
0.01
10-4 10-3 10-2 10-1 1 10 100 600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient

Will Semiconductor Ltd. 4 Dec,2011 - Rev.1. 2


WPMD3002
Package outline dimensions
SOP-8L

Dimensions in millimeter
Symbol
Min. Typ. Max.
A 1.47 1.60 1.73
A1 0.10 0.25
A2 1.45
b 0.33 0.41 0.51
C 0.19 0.20 0.25
D 4.80 4.85 4.95
E 5.80 6.00 6.20
E1 3.80 3.90 4.00
e 1.27
L 0.38 0.71 1.27
\ 0.076
© 0e 8e

Will Semiconductor Ltd. 6 Dec,2011 - Rev.1. 2

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