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5 4 3 2 1

Power
VCORE
Page 80

F83Vf MonteVina BLOCK DIAGRAM System


Page 81
D D
1.5VS & 1.05VS
Page 82

DDR & VTT


CPU Page 83
MEROM / PENRYN
1.8VS
Page 3~5 Page 84

FSB 1066MHz VGA_VCORE


Page 85
LVDS Page 45
NVIDIA Charger
PCIE x16 DDR3 1066MHz Dual Channel DDR3 Page 88
CRT Page 46
N10P-GV2 PM-45 SO-DIMM X 2 Detect
HDMI Page 90
Page 48
Page 7 ~ 9
C Page 70~79 Page 10~15 Load Switch C

Page 91
x4 DMI
Power Protect
10/100 LAN Page 92

PCI-E LAN PCI-E LPC Power Protect


AR8132 33MHz Debug Conn.
Page 93
Page 44
Page 33 ~ 34
ICH9-M EC ITE8512 SPI ROM
Page 30
Page 30 ~ 31

Page 20 ~ 24

SATA
NEWCARD

Page 53
SATA HDD
B B

Page 51

Azalia AUDIO AMP


SATA ODD RLT ALC269 Page 37

Page 36
AUDIO JACK &
Page 51 MIC Page 38
USB
USB 2.0
USB CCD
X4
FAN + SENSOR Page 52 Page 45

Page 50
BLUE TOOTH
Power On Sequence Module
Page 02 Page 61

PWR / EXGATE Switch


A
Page 55 Card Reader 4 in 1 Card A

Alcor AU6433 Reader


PWR Discharge Page 40 Page 40
Page 57
Finger Printer
(NO STUFF) Title : Block Diagram
PEGATRON COMPUTER INC Engineer: Zack Kuo
Page 63
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 1 of 100
5 4 3 2 1
5 4 3 2 1

Reset
IC
D D

PWRSW#_EC 6 Power On
2 SWITCH
+5VA
AC_BAT_SYS 1 7 PM_PWRBTN#
+3VA_EC SLP_S4#
+3VA EC
To EC
+3VA_EC 5 PM_RSMRST# ICH9
IT8511E SLP_S3#
3 VSUS_ON
VRMPWRGD
EC_CLK_EN
CL_PWROK
13 PWROK
+3VSUS 4 VSUS_GD#
+5VSUS

SUSB_ON
SUSC_ON
+12VSUS

PLT_RST#

H_PWRGD
8 16

ALL_SYSTEM_PWRGD
16
SUSC_ON
C
+1.5V C

+3V
+5V
+12V 17

CPU_PWRGD
H_CPURST#
10 15 PM45 PENRYN
CL_PWROK
ICH8_PWROK
PWROK
12
+VGA_VCORE
+1.8VS 14
+1.25VS
CLK_PWRGD
+2.5VS CLK
9 +3VS Gen.
+5VS CLK_PWRGD asserted when both
SUSB_ON
+12VS PM_SUSB# and VRM_PWRGD are
high.

B B

Delay 11 CPU_VRON Power On Sequence


99ms
+VCORE
1 17

A A

Title : Power Sequence


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 2 of 100
5 4 3 2 1
5 4 3 2 1

H_D#[63:0]
<10> H_D#[63:0]

H_A#[35:3]
<10> H_A#[35:3]

H_REQ#[4:0]
<10> H_REQ#[4:0]
D D
T0318

T0319

1
U0301A U0301B

1
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# <10> D[0]# D[32]#

ADDR GROUP 0
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# <10> D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# <10> D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
A[6]# D[3]# D[35]#

DATA GRP 0
H_A#7 M3 H5 H_D#4 F23 V23 H_D#36
A[7]# DEFER# H_DEFER# <10> D[4]# D[36]#
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# <10> D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# <10> D[6]# D[38]#
H_A#10 N3 H_D#7 E23 U23 H_D#39
H_A#11 A[10]# +VCCP_CPU H_D#8 D[7]# D[39]# H_D#40
P5 F1 K24 Y25
A[11]# BR0# H_BR0# <10> QC D[8]# D[40]#

DATA GRP 2
H_A#12 P2 H_D#9 G24 W22 H_D#41
A[12]# D[9]# D[41]#

CONTROL
H_A#13 L2 D20 H_IERR# R0309 1 2 49.9Ohm H_D#10 J24 Y23 H_D#42
H_A#14 A[13]# IERR# H_D#11 D[10]# D[42]# H_D#43
P4 A[14]# INIT# B3 H_INIT# <20> J23 D[11]# D[43]# W24
H_A#15 P1 H_D#12 H22 W25 H_D#44
H_A#16 A[15]# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# <10> F26 D[13]# D[45]# AA23
M1 H_D#14 K22 AA24 H_D#46
<10> H_ADSTB#0 ADSTB[0]# D[14]# D[46]#
C1 H_D#15 H23 AB25 H_D#47
RESET# H_CPURST# <10> D[15]# D[47]#
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 <10> <10> H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 <10>
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 <10> <10> H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 <10>
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 <10> <10> H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 <10>
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# <10>
H_REQ#4 L1 REQ[4]# H_D#16 H_D#48
HIT# G6 H_HIT# <10> N22 D[16]# D[48]# AE24
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# <10> D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# XDP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
ADDR GROUP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#
QC

DATA GRP 1
H_A#21 U4 AD1 XDP_BPM#2 H_D#21 M24 AC26 H_D#53 Comp 0,2: Zo=25 Ohm, trace length < 0.5"
H_A#22 A[21]# XDP/ITP SIGNALS BPM[2]# XDP_BPM#3 H_D#22 D[21]# D[53]# H_D#54
Y5 AC4 L22 AD20
H_A#23 U1
A[22]# BPM[3]#
AC2 H_PRDY# H_D#23 M23
D[22]# D[54]#
AE22 H_D#55 Comp 1,3: Z0=50 Ohm, trace length < 0.5"
H_A#24 A[23]# PRDY# H_PREQ# H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 H_TCK H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK H_TDI H_D#26 D[25]# D[57]# H_D#58
C T3 AA6 P22 AE21 C

DATA GRP 3
A[26]# TDI D[26]# D[58]#
H_A#27
H_A#28
H_A#29
W2
W5
Y4
A[27]#
A[28]#
A[29]#
TDO
TMS
TRST#
AB3
AB5
AB6
H_TDO
H_TMS
H_TRST#
+VCCP_CPU H_D#27
H_D#28
H_D#29
T24
R24
L25
D[27]#
D[28]#
D[29]#
D[59]#
D[60]#
D[61]#
AD21
AC22
AD23
H_D#59
H_D#60
H_D#61
DC Comp 0,2: Zo=27.4 Ohm, trace length < 0.5"
Comp 1,3: Z0=55 Ohm, trace length < 0.5"

2
H_A#30 U2 C20 H_DBR# H_D#30 T25 AF22 H_D#62
H_A#31 A[30]# DBR# R0315 H_D#31 D[30]# D[62]# H_D#63
V4 A[31]# N25 D[31]# D[63]# AC23
H_A#32 W3 1KOhm L26 AE25
A[32]# <10> H_DSTBN#1 DSTBN[1]# DSTBN[3]# H_DSTBN#3 <10>
H_A#33 AA4 THERMAL 1% M26 AF24
A[33]# <10> H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 <10>
H_A#34 AB2 N24 AC20
<10> H_DINV#1 H_DINV#3 <10>

1
H_A#35 A[34]# DINV[1]# DINV[3]#
AA3 A[35]# PROCHOT# D21 H_PROCHOT_S#
V1 A24 GTL_REF AD26 R26 H_COMP0 R0311 1 2 24.9Ohm 1%
<10> H_ADSTB#1 ADSTB[1]# THRMDA CPU_THRM_DA <50> GTLREF COMP[0]
T0320 1 B25 R0317 2 @ 1% 1 1KOhm C23 MISC U26 H_COMP1 R0312 1 2 49.9Ohm 1%
THRMDC CPU_THRM_DC <50> TEST1 COMP[1]

2
A6 R0318 2 @ 1% 1 1KOhm D25 AA1 H_COMP2 R0313 1 2 24.9Ohm 1%
<20> H_A20M# A20M# TEST2 COMP[2]

1
ICH

A5 C7 R0316 T0304 1 C24 Y1 H_COMP3 R0314 1 2 49.9Ohm 1%


<20> H_FERR# FERR# THERMTRIP# H_THRMTRIP# <5,11,20,32> TEST3 COMP[3]
C4 C0301 2KOhm T0305 1 AF26
<20> H_IGNNE# IGNNE# TEST4
T0321 1 1 T0302 0.1UF/10V 1% T0306 1 AF1 E5 H_DPRSTP# <11,20,80>

2
@ T0307 TEST5 DPRSTP#
<20> H_STPCLK# D5 CLK_CPU_BCLK <29> 1 A26 B5 H_DPSLP# <20>

1
STPCLK# TEST6 DPSLP#
2

<20> H_INTR C6 LINT0 H CLK DPWR# D24 H_DPWR# <10>


B4 A22 R0339 B22 D6
<20> H_NMI LINT1 BCLK[0] <29> CPU_BSEL0 BSEL[0] PWRGOOD H_PWRGD <20>
A3 A21 100Ohm B23 D7
<20> H_SMI# SMI# BCLK[1] <29> CPU_BSEL1 BSEL[1] SLP# H_CPUSLP# <10>
1% @ C21 AE6
<29> CPU_BSEL2 BSEL[2] PSI# PM_PSI# <80>
T0308 1 BPM_2[1]# M4 RSVD1 CLK_CPU_BCLK# <29>
1

T0309 1 BPM_2[0]# N5 RSVD2 1 Zo=55 Ohm, 0.5" max SOCKET478B


T310 1CPU_THRM_DA_QC T2 RSVD3 T0303
T311 1CPU_THRM_DC_QC V3 RSVD4 for GTL_REF BCLK FSB BSEL2 BSEL1 BSEL0
RESERVED

T0312 1 BPM_2[2]# B2 RSVD5


T0313 1 C3 RSVD6 166 667 L H H
T0314 1 D2
+VCCP_CPU 2 1% 1 GTL_REF2 D22 RSVD7 200 800 L H L
R0335 1KOhm H_TDO_M RSVD8
D3 RSVD9
@ H_TDI_M
2 1%
F6 RSVD10 Default Strapping When Not Used
R0336
1
1.74KOHM +VCCP_CPU
266 1067 L L L
@
2 1 SOCKET478B
C0302 0.1UF/10V +3VS H_PRDY# 5 RN0301C
56Ohm 6 +VCCP_CPU
@ H_PREQ# 7 RN0301D
56Ohm 8
2

H_TDI 3 RN0301B
B +VCCP_CPU 56Ohm 4 B
R0332 H_TDO R0304 1 @ 2 54.9Ohm 1%
3

2
3 H_TMS 1 RN0301A
D 100KOhm 56Ohm 2
Q0303 @ R0310
2

2N7002 H_DBR# R0306 1 @ 2 1KOhm 1% H_PROCHOT_S# 68Ohm


+3VS
1

@ 11 R0334
G 10KOhm H_TCK R0307 1 2 54.9Ohm 1% @

1
S 2 3 @ H_TRST# R0308 1 2 54.9Ohm 1% <30> PWRLIMIT# 2 1
2

C D0301 RB751V-40
1

3
Q0302 B 1 1 2 3
GTLREF_CTRL <4> D
PMBS3904 R0333 10KOhm Q0301
@ E @ H2N7002
2 11
Place R0304 & R0306 for XDP function G
THRO_CPU <30>
S 2

QC

2
+VCCP_CPU

H_TDI_M R0337 1 2 54.9Ohm 1% @


H_TDO_M R0338 1 2 54.9Ohm 1% @

XDP_BPM#0 R0321 1 2 54.9Ohm 1% @


XDP_BPM#1 R0301 1 2 54.9Ohm 1% @
XDP_BPM#2 R0322 1 2 54.9Ohm 1% @
XDP_BPM#3 R0323 1 2 54.9Ohm 1% @

A A

Title : Penryn(1)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 3 of 100
5 4 3 2 1
5 4 3 2 1

U0301D
A4 VSS1 VSS82 P6
A8 VSS2 VSS83 P21
A11 VSS3 VSS84 P24
+VCORE +VCORE A14 R2
VSS4 VSS85
A16 VSS5 VSS86 R5
U0301C A19 R22
VSS6 VSS87
A7 VCC1 VCC68 AB20 A23 VSS7 VSS88 R25
A9 VCC2 VCC69 AB7 AF2 VSS8 VSS89 T1
D
A10 VCC3 VCC70 AC7 B6 VSS9 VSS90 T4 D
A12 VCC4 VCC71 AC9 B8 VSS10 VSS91 T23
A13 VCC5 VCC72 AC12 B11 VSS11 VSS92 T26
A15 VCC6 VCC73 AC13 B13 VSS12 VSS93 U3
A17 VCC7 VCC74 AC15 B16 VSS13 VSS94 U6
A18 VCC8 VCC75 AC17 B19 VSS14 VSS95 U21
A20 VCC9 VCC76 AC18 B21 VSS15 VSS96 U24
B7 VCC10 VCC77 AD7 B24 VSS16 VSS97 V2
B9 VCC11 VCC78 AD9 C5 VSS17 VSS98 V5
B10 VCC12 VCC79 AD10 C8 VSS18 VSS99 V22
B12 VCC13 VCC80 AD12 C11 VSS19 VSS100 V25
B14 VCC14 VCC81 AD14 C14 VSS20 VSS101 W1
B15 VCC15 VCC82 AD15 C16 VSS21 VSS102 W4
B17 VCC16 VCC83 AD17 C19 VSS22 VSS103 W23
B18 VCC17 VCC84 AD18 C2 VSS23 VSS104 W26
B20 VCC18 VCC85 AE9 C22 VSS24 VSS105 Y3
C9 VCC19 VCC86 AE10 C25 VSS25 VSS106 Y6
C10 VCC20 VCC87 AE12 D1 VSS26 VSS107 Y21
C12 VCC21 VCC88 AE13 D4 VSS27 VSS108 Y24
C13 AE15 R0403 1 @ 2 0Ohm D8 AA2
VCC22 VCC89 VSS28 VSS109
C15 VCC23 VCC90 AE17 D11 VSS29 VSS110 AA5
C17 AE18 D13 AA8 R0405 1 @ 2 0Ohm
VCC24 VCC91 VSS30 VSS111
C18 VCC25 VCC92 AE20 D16 VSS31 VSS112 AA11
D9 VCC26 VCC93 AF9 D19 VSS32 VSS113 AA14
D10 VCC27 VCC94 AF10 D23 VSS33 VSS114 AA16
D12 VCC28 VCC95 AF12 D26 VSS34 VSS115 AA19
D14 VCC29 VCC96 AF14 E3 VSS35 VSS116 AA22
D15 VCC30 VCC97 AF15 E6 VSS36 VSS117 AA25
D17 VCC31 VCC98 AF17 E8 VSS37 VSS118 AB1
D18 VCC32 VCC99 AF18 E11 VSS38 VSS119 AB4
E7 VCC33 VCC100 AF20 E14 VSS39 VSS120 AB8
E9 SL401 E16 AB11
VCC34 GTLREF_CTRL_R VSS40 VSS121
E10 VCC35 VCCP1 G21 +VCCP_CPU <3> GTLREF_CTRL 1 2 E19 VSS41 VSS122 AB13
E12 VCC36 VCCP2 V6 E21 VSS42 VSS123 AB16
E13 J6 R0402 E24 AB19
VCC37 VCCP3 VSS43 VSS124
E15 VCC38 VCCP4 K6 F5 VSS44 VSS125 AB23
E17 VCC39 VCCP5 M6 1 @ 2 GTLREF_CTRL_R F8 VSS45 VSS126 AB26
E18 J21 R0404 0Ohm F11 AC3
VCC40 VCCP6 VSS46 VSS127
C E20 VCC41 VCCP7 K21 F13 VSS47 VSS128 AC6 C
F7 M21 +1.5VS F16 AC8 R0406 1 @ 2 0Ohm
VCC42 VCCP8 VSS48 VSS129
F9 VCC43 VCCP9 N21 F19 VSS49 VSS130 AC11
F10 VCC44 VCCP10 N6 Max: 130 mA F2 VSS50 VSS131 AC14
F12 VCC45 VCCP11 R21 F22 VSS51 VSS132 AC16
F14 VCC46 VCCP12 R6 F25 VSS52 VSS133 AC19

1
F15 VCC47 VCCP13 T21 G4 VSS53 VSS134 AC21
F17 T6 C0402 C0401 G1 AC24
VCC48 VCCP14 10UF/6.3V VSS54 VSS135
F18 V21 0.01UF/16V G23 AD2

2
VCC49 VCCP15 @ VSS55 VSS136
F20 VCC50 VCCP16 W21 G26 VSS56 VSS137 AD5
1 @ 2 AA7 VCC51 H3 VSS57 VSS138 AD8
R0409 0Ohm AA9 B26 H6 AD11
VCC52 VCCA1 VSS58 VSS139
AA10 VCC53 VCCA2 C26 H21 VSS59 VSS140 AD13
AA12 VCC54 VR_VID[0:6] <80> H24 VSS60 VSS141 AD16
AA13 AD6 VR_VID0 J2 AD19
VCC55 VID[0] VR_VID1 VSS61 VSS142
AA15 VCC56 VID[1] AF5 J5 VSS62 VSS143 AD22
AA17 AE5 VR_VID2 J22 AD25
VCC57 VID[2] VR_VID3 VSS63 VSS144
AA18 VCC58 VID[3] AF4 J25 VSS64 VSS145 AE1
AA20 AE3 VR_VID4 K1 AE4 R0407
VCC59 VID[4] VR_VID5 VSS65 VSS146 BPM_2[3]# 1 @
AB9 VCC60 VID[5] AF3 K4 VSS66 VSS147 AE8 2
AC10 AE2 VR_VID6 K23 AE11 0Ohm
VCC61 VID[6] VSS67 VSS148
AB10 VCC62 K26 VSS68 VSS149 AE14
AB12 VCC63 L3 VSS69 VSS150 AE16
AB14 VCC64 VCCSENSE AF7 1 2 +VCORE L6 VSS70 VSS151 AE19
AB15 R0401 100Ohm 1% L21 AE23
VCC65 VSS71 VSS152
AB17 VCC66 VCCSENSE <80> L24 VSS72 VSS153 AE26
AB18 VCC67 VSSSENSE AE7 VSSSENSE <80> M2 VSS73 VSS154 A2
M5 VSS74 VSS155 AF6
1

SOCKET478B M22 AF8


VSS75 VSS156
M25 VSS76 VSS157 AF11
R0402 N1 AF13
100Ohm VSS77 VSS158
N4 VSS78 VSS159 AF16
1% N23 AF19
2

VSS79 VSS160
N26 VSS80 VSS161 AF21
P3 VSS81 VSS162 A25
VSS163 AF25

SOCKET478B
B B

A A

Title : Penryn(2)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 4 of 100
5 4 3 2 1
5 4 3 2 1

+VCORE +VCCP Decoupling Capacitor


38A for Penryn
(Place near CPU) +VCCP_CPU
+VCCP

Max: 4500 mA

1
D D
C0508 C0531 C0518 C0515 C0523 C0502 C0530 C0521 C0519 C0527

1
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V +

1
@ @ @ @ @ @ @ CE0501
C0514 C0538 C0535 C0534 C0537 C0536 C0533
0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 10UF/6.3V

2
100UF/2.5V @ @ @
1

1
C0525 C0517 C0524 C0528 C0522 C0511 C0520 C0503 C0510 C0509
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V Decoupling guide from Intel
2

2
@ @ @ @ @ @ @ @

VCORE 22uF/10V r 10uF * 32pcs


330uF/2V * 6pcs
VCCP 0.1uF * 6pcs
1

1
C0512 C0539 C0516 C0504 C0507 C0501 C0506 C0513 C0526 C0529 150uF * 1pcs ?
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
10uF * 1pcs ?
2

2
@ @ @ @ @

+VCORE Mid-Frequency Capacitor


Intel: 22UF *32
1

C0505 C0532 F83Vf: 10UF*12


10UF/6.3V 10UF/6.3V
+VCCP Decoupling Capacitor
2

@ @
Intel: 270UF *1, 0.1UF *6
F3S: 100UF *1, 0.1UF *3
V1V: ?

C C

+VCCP

+VCCP

1
R0504 R0505
49.9KOhm
330Ohm

2
@ @
1 2 Q0503
C0542 0.1UF/16V @

1 B
2N7002
@

S 2
FORCE_OFF#

D
B <3,11,20,32> H_THRMTRIP# 2 3 FORCE_OFF# <91,92> B

3
C
2
E

3
Q0502

G
1
PMBS3904

1
@
<11,21,30,33,41,53,70> BUF_PLT_RST#

Thermal Trip signal (From CPU to ICH-9M and sequence)

A A

Title : CPU Decouple


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 5 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : CPU_***
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 6 of 100
5 4 3 2 1
5 4 3 2 1

M_A_DQ[63:0] <12>
U701A U701B
<12> M_A_A[14:0]
5 M_A_DQ5
DQ0 M_A_DQ1 RX701
DQ1 7
M_A_A0 98 15 M_A_DQ7 <11> PM_EXTTS#0 2 1 198 2
M_A_A1 A0 DQ2 M_A_DQ6 EVENT# VSS1
D
97 A1 DQ3 17 VSS2 3 D
M_A_A2 96 4 M_A_DQ0 0Ohm @ 8
M_A_A3 A2 DQ4 M_A_DQ4 VSS3
95 A3 DQ5 6 207 GND1 VSS4 9
M_A_A4 92 16 M_A_DQ2 208 13
M_A_A5 A4 DQ6 M_A_DQ3 GND2 VSS5
91 A5 DQ7 18 VSS6 14
M_A_A6 90 21 M_A_DQ12 19
M_A_A7 A6 DQ8 M_A_DQ8 VSS7
86 A7 DQ9 23 77 NC1 VSS8 20
M_A_A8 89 33 M_A_DQ10 122 25
M_A_A9 A8 DQ10 M_A_DQ15 NC2 VSS9
85 A9 DQ11 35 VSS10 26
M_A_A10 107 22 M_A_DQ13 205 31
M_A_A11 A10/AP DQ12 M_A_DQ9 NP_NC1 VSS11
84 A11 DQ13 24 206 NP_NC2 VSS12 32
M_A_A12 83 34 M_A_DQ11 37
M_A_A13 A12/BC# DQ14 M_A_DQ14 VSS13
119 A13 DQ15 36 <11> M_ODT0 116 ODT0 VSS14 38
M_A_A14 80 39 M_A_DQ16 120 43
A14 DQ16 <11> M_ODT1 ODT1 VSS15
78 41 M_A_DQ17 44
A15 DQ17 M_A_DQ19 VSS16
DQ18 51 VSS17 48
53 M_A_DQ22 110 49
DQ19 <12> M_A_RAS# RAS# VSS18
109 40 M_A_DQ18 30 54
<12> M_A_BS0 BA0 DQ20 <8,11> M_DRAMRST# RESET# VSS19
108 42 M_A_DQ20 55
<12> M_A_BS1 BA1 DQ21 VSS20
79 50 M_A_DQ21 114 60
<12> M_A_BS2 BA2 DQ22 <11> M_CS#0 S#0 VSS21
52 M_A_DQ23 121 61
DQ23 <11> M_CS#1 S#1 VSS22
57 M_A_DQ28 65
DQ24 M_A_DQ29 VSS23
DQ25 59 197 SA0 VSS24 66
115 67 M_A_DQ30 201 71
<12> M_A_CAS# CAS# DQ26 SA1 VSS25
103 69 M_A_DQ31 72
<11> M_CLK_DDR0# CK#0 DQ27 VSS26
104 56 M_A_DQ24 127
<11> M_CLK_DDR1# CK#1 DQ28 VSS27
101 58 M_A_DQ25 202 128
<11> M_CLK_DDR0 CK0 DQ29 <8,24,29,44,53> SMB_CLK_S SCL VSS28
102 68 M_A_DQ27 200 133
<11> M_CLK_DDR1 CK1 DQ30 <8,24,29,44,53> SMB_DAT_S SDA VSS29
73 70 M_A_DQ26 134
<11> M_CKE0 CKE0 DQ31 VSS30
74 129 M_A_DQ32 138
<11> M_CKE1 CKE1 DQ32 VSS31
131 M_A_DQ37 125 139
DQ33 M_A_DQ38 TEST VSS32
<12> M_A_DM[0:7] DQ34 141 VSS33 144
M_A_DM0 11 143 M_A_DQ39 145
M_A_DM1 DM0 DQ35 M_A_DQ33 VSS34
28 DM1 DQ36 130 75 VDD1 VSS35 150
M_A_DM2 46 132 M_A_DQ36 76 151
M_A_DM3 DM2 DQ37 M_A_DQ34 +1.5V_DDR3 VDD2 VSS36
63 DM3 DQ38 140 81 VDD3 VSS37 155
M_A_DM4 136 142 M_A_DQ35 82 156
M_A_DM5 DM4 DQ39 M_A_DQ44 VDD4 VSS38
153 DM5 DQ40 147 87 VDD5 VSS39 161
C M_A_DM6 170 149 M_A_DQ45 88 162 C
M_A_DM7 DM6 DQ41 M_A_DQ47 VDD6 VSS40
187 DM7 DQ42 157 93 VDD7 VSS41 167

1
159 M_A_DQ46 94 168
DQ43 M_A_DQ40 C702 C703 C704 C705 VDD8 VSS42
<12> M_A_DQS[0:7] DQ44 146 99 VDD9 VSS43 172
M_A_DQS0 12 148 M_A_DQ41 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 100 173

2
M_A_DQS1 DQS0 DQ45 M_A_DQ42 @ @ VDD10 VSS44
29 DQS1 DQ46 158 105 VDD11 VSS45 178
M_A_DQS2 47 160 M_A_DQ43 +3VS 106 179
M_A_DQS3 DQS2 DQ47 M_A_DQ53 VDD12 VSS46
64 DQS3 DQ48 163 111 VDD13 VSS47 184
M_A_DQS4 137 165 M_A_DQ48 112 185
M_A_DQS5 DQS4 DQ49 M_A_DQ54 VDD14 VSS48
154 DQS5 DQ50 175 117 VDD15 VSS49 189
M_A_DQS6 171 177 M_A_DQ52 118 190 +0.75V
DQS6 DQ51 VDD16 VSS50

1
M_A_DQS7 188 164 M_A_DQ49 C706 @ @ 123 195
DQS7 DQ52 M_A_DQ50 C707 VDD17 VSS51
DQ53 166 124 VDD18 VSS52 196
174 M_A_DQ51 2.2UF/6.3V 0.1UF/10V
<12> M_A_DQS#[0:7]

2
M_A_DQS#0 DQ54 M_A_DQ55
10 DQS#0 DQ55 176
M_A_DQS#1 27 181 M_A_DQ60 199 203
M_A_DQS#2 DQS#1 DQ56 M_A_DQ61 +0.75V M_VREFCA_DIMM0 VDDSPD VTT1
45 DQS#2 DQ57 183 VTT2 204
M_A_DQS#3 62 191 M_A_DQ59 SL701
M_A_DQS#4 DQS#3 DQ58 M_A_DQ57
135 DQS#4 DQ59 193 1 2 126 VREFCA
M_A_DQS#5 152 180 M_A_DQ56 1
M_A_DQS#6 DQS#5 DQ60 M_A_DQ63 R0603 VREFDQ M_A_WE# <12>
169 DQS#6 DQ61 182 WE# 113

1
M_A_DQS#7 186 192 M_A_DQ58 C708
DQS#7 DQ62 M_A_DQ62 @ C709
DQ63 194
2.2UF/6.3V 0.1UF/10V DDR3_DIMM_204P

2
DDR3_DIMM_204P
DDR3 DIMM 204P 0.6mm 9.2H REV
1202-003V000 +0.75V M_VREFDQ_DIMM0
SL702
1 2

1
R0603 C710
M_CLK_DDR0 @ C711
2.2UF/6.3V 0.1UF/10V

2
2

C712
10PF/50V
@
1

B B
M_CLK_DDR0# +0.75V
+1.5V_DDR3
1

+ M_CLK_DDR1
CE701

1
100UF/2V C714 C715 C716
2

@ C713 @ @ @ C717 @ C718 @ C719 C720


2

10PF/50V 10UF/10V 10UF/10V 10UF/10V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
@
1

M_CLK_DDR1#

+1.5V_DDR3

+1.5V_DDR3 +1.5V
1

C701 @ C721 @ C722 @ C723 C724 C725


10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V
2

A A

Title : DIMM0
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 7 of 100
5 4 3 2 1
5 4 3 2 1

U801B
M_B_DQ[0:63] <12>
RX801
<11> PM_EXTTS#1 2 1 198 EVENT# VSS1 2
<12> M_B_A[0:14] U801A 3
M_B_DQ4 0Ohm @ VSS2
DQ0 5 VSS3 8
7 M_B_DQ1 207 9
M_B_A0 DQ1 M_B_DQ7 GND1 VSS4
D
98 A0 DQ2 15 208 GND2 VSS5 13 D
M_B_A1 97 17 M_B_DQ3 14
M_B_A2 A1 DQ3 M_B_DQ5 VSS6
96 A2 DQ4 4 VSS7 19
M_B_A3 95 6 M_B_DQ0 77 20
M_B_A4 A3 DQ5 M_B_DQ2 NC1 VSS8
92 A4 DQ6 16 122 NC2 VSS9 25
M_B_A5 91 18 M_B_DQ6 26
M_B_A6 A5 DQ7 M_B_DQ9 VSS10
90 A6 DQ8 21 205 NP_NC1 VSS11 31
M_B_A7 86 23 M_B_DQ8 206 32
M_B_A8 A7 DQ9 M_B_DQ14 NP_NC2 VSS12
89 A8 DQ10 33 VSS13 37
M_B_A9 85 35 M_B_DQ15 116 38
A9 DQ11 <11> M_ODT2 ODT0 VSS14
M_B_A10 107 22 M_B_DQ13 120 43
A10/AP DQ12 <11> M_ODT3 ODT1 VSS15
M_B_A11 84 24 M_B_DQ12 44
M_B_A12 A11 DQ13 M_B_DQ11 VSS16
83 A12/BC# DQ14 34 VSS17 48
M_B_A13 119 36 M_B_DQ10 110 49
A13 DQ15 <12> M_B_RAS# RAS# VSS18
M_B_A14 80 39 M_B_DQ20 30 54
A14 DQ16 <7,11> M_DRAMRST# RESET# VSS19
78 41 M_B_DQ21 55
A15 DQ17 M_B_DQ22 VSS20
DQ18 51 <11> M_CS#2 114 S#0 VSS21 60
53 M_B_DQ23 121 61
DQ19 <11> M_CS#3 S#1 VSS22
109 40 M_B_DQ16 65
<12> M_B_BS0 BA0 DQ20 VSS23
108 42 M_B_DQ17 +3VS 197 66
<12> M_B_BS1 BA1 DQ21 SA0 VSS24
79 50 M_B_DQ18 201 71
<12> M_B_BS2 BA2 DQ22 SA1 VSS25
52 M_B_DQ19 72
DQ23 M_B_DQ28 VSS26
DQ24 57 VSS27 127
59 M_B_DQ29 202 128
DQ25 <7,24,29,44,53> SMB_CLK_S SCL VSS28
115 67 M_B_DQ26 200 133
<12> M_B_CAS# CAS# DQ26 <7,24,29,44,53> SMB_DAT_S SDA VSS29
103 69 M_B_DQ30 134
<11> M_CLK_DDR2# CK#0 DQ27 VSS30
104 56 M_B_DQ24 138
<11> M_CLK_DDR3# CK#1 DQ28 VSS31
101 58 M_B_DQ25 125 139
<11> M_CLK_DDR2 CK0 DQ29 TEST VSS32
102 68 M_B_DQ27 144
<11> M_CLK_DDR3 CK1 DQ30 VSS33
73 70 M_B_DQ31 145
<11> M_CKE2 CKE0 DQ31 VSS34
74 129 M_B_DQ32 75 150
<11> M_CKE3 CKE1 DQ32 VDD1 VSS35
131 M_B_DQ36 76 151
DQ33 M_B_DQ34 +1.5V_DDR3 VDD2 VSS36
<12> M_B_DM[0:7] DQ34 141 81 VDD3 VSS37 155
M_B_DM0 11 143 M_B_DQ39 82 156
M_B_DM1 DM0 DQ35 M_B_DQ37 VDD4 VSS38
28 DM1 DQ36 130 87 VDD5 VSS39 161
M_B_DM2 46 132 M_B_DQ33 88 162
M_B_DM3 DM2 DQ37 M_B_DQ38 VDD6 VSS40
63 DM3 DQ38 140 93 VDD7 VSS41 167

1
M_B_DM4 136 142 M_B_DQ35 94 168
M_B_DM5 DM4 DQ39 M_B_DQ41 C802 C803 C804 C805 VDD8 VSS42
C 153 DM5 DQ40 147 99 VDD9 VSS43 172 C
M_B_DM6 170 149 M_B_DQ44 +3VS 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 100 173

2
M_B_DM7 DM6 DQ41 M_B_DQ47 @ @ VDD10 VSS44
187 DM7 DQ42 157 105 VDD11 VSS45 178
159 M_B_DQ42 106 179
DQ43 M_B_DQ40 VDD12 VSS46
<12> M_B_DQS[0:7] DQ44 146 111 VDD13 VSS47 184
M_B_DQS0 12 148 M_B_DQ45 112 185
DQS0 DQ45 VDD14 VSS48

1
M_B_DQS1 29 158 M_B_DQ43 C806 @ @ 117 189
M_B_DQS2 DQS1 DQ46 M_B_DQ46 C807 VDD15 VSS49 +0.75V
47 DQS2 DQ47 160 118 VDD16 VSS50 190
M_B_DQS3 64 163 M_B_DQ48 2.2UF/6.3V 0.1UF/10V 123 195

2
M_B_DQS4 DQS3 DQ48 M_B_DQ53 VDD17 VSS51
137 DQS4 DQ49 165 124 VDD18 VSS52 196
M_B_DQS5 154 175 M_B_DQ55
M_B_DQS6 DQS5 DQ50 M_B_DQ49
171 DQS6 DQ51 177
M_B_DQS7 188 164 M_B_DQ50 199 203
DQS7 DQ52 M_B_DQ52 +0.75V M_VREFCA_DIMM1 VDDSPD VTT1
DQ53 166 VTT2 204
174 M_B_DQ51 SL801
<12> M_B_DQS#[0:7] DQ54
M_B_DQS#0 10 176 M_B_DQ54 1 2 126
M_B_DQS#1 DQS#0 DQ55 M_B_DQ60 VREFCA
27 DQS#1 DQ56 181 1 VREFDQ
M_B_DQS#2 45 183 M_B_DQ61 R0603 113 M_B_WE# <12>
DQS#2 DQ57 WE#

1
M_B_DQS#3 62 191 M_B_DQ63 C808
M_B_DQS#4 DQS#3 DQ58 M_B_DQ57 C809
135 DQS#4 DQ59 193
M_B_DQS#5 152 180 M_B_DQ56 2.2UF/6.3V 0.1UF/10V DDR3_DIMM_204P

2
M_B_DQS#6 DQS#5 DQ60 M_B_DQ58 @
169 DQS#6 DQ61 182
M_B_DQS#7 186 192 M_B_DQ59
DQS#7 DQ62 M_B_DQ62
DQ63 194
+0.75V M_VREFDQ_DIMM1
SL802
DDR3_DIMM_204P 1 2
DDR3 DIMM 204P 0.6mm 5.2H REV.

1
1202-003U000 R0603 C810 +0.75V
C811
2.2UF/6.3V 0.1UF/10V

2
@

1
C812 C813 C814
@ @ @ C815 C816 C817 C818
10UF/10V 10UF/10V 10UF/10V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V

2
@ @
B +1.5V_DDR3 B
1

+
CE801
100UF/2V M_CLK_DDR2
@
2

C801
10PF/50V
@
1

M_CLK_DDR2#
+1.5V_DDR3

M_CLK_DDR3
1

C825
C819 C820 C821 C822 C823 C824 10PF/50V
10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V 10UF/6.3V @
2

@ @ @
M_CLK_DDR3#

A A

Title : DIMM1
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 8 of 100
5 4 3 2 1
5 4 3 2 1

D D

M_VREF_MCH <7,8,11>

M_VREFCA_DIMM0

M_VREFCA_DIMM1

R901
1 2

0Ohm
+1.5V_DDR3 +5V @

1
C902
1

0.1UF/10V
R902 @

2
2KOhm
@

5
U901
2

1 V+
+
C 4 C
1

1
3 -
1

C901 R903 V- R904


2KOhm LMV321AS5X_NL 0Ohm
2

0.1UF/10V @ @
2

@ @
2

2
R905
1 2

0Ohm
@
+1.5V_DDR3 +5V
1

C903
1

0.1UF/10V
R906 @
2

2KOhm
@ M_VREFDQ_DIMM0
5

U902
2

1 V+
+
4
1

3 -
1

C904 R907 V-
2KOhm LMV321AS5X_NL
2

B M_VREFDQ_DIMM1 B
0.1UF/10V @ @
2

@
2

A A

Title : DIMM_TERM
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 9 of 100
5 4 3 2 1
5 4 3 2 1

U1001A
A14 H_A#3
H_D#0 H_A#_3 H_A#4
F2 H_D#_0 H_A#_4 C15
H_D#1 G8 F16 H_A#5
H_D#2 H_D#_1 H_A#_5 H_A#6
D F8 H_D#_2 H_A#_6 H13 D
H_D#3 E6 C18 H_A#7
H_D#4 H_D#_3 H_A#_7 H_A#8
G2 H_D#_4 H_A#_8 M16
H_D#5 H6 J13 H_A#9
H_D#6 H_D#_5 H_A#_9 H_A#10
H2 H_D#_6 H_A#_10 P16
H_D#7 F6 R16 H_A#11
H_D#8 H_D#_7 H_A#_11 H_A#12
D4 H_D#_8 H_A#_12 N17
H_D#9 H3 M13 H_A#13
H_D#10 H_D#_9 H_A#_13 H_A#14
M9 H_D#_10 H_A#_14 E17
R1001 H_D#11 M11 P17 H_A#15
16.9Ohm H_D#12 H_D#_11 H_A#_15 H_A#16
J1 H_D#_12 H_A#_16 F17
1% H_D#13 J2 G20 H_A#17
H_RCOMP H_D#14 H_D#_13 H_A#_17 H_A#18
1 2 N12 H_D#_14 H_A#_18 B19
H_D#15 J6 J16 H_A#19
H_D#16 H_D#_15 H_A#_19 H_A#20
P2 H_D#_16 H_A#_20 E20
H_D#17 L2 H16 H_A#21
H_D#18 H_D#_17 H_A#_21 H_A#22
R2 H_D#_18 H_A#_22 J20
H_D#19 N9 L17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
L6 H_D#_20 H_A#_24 A17
H_D#21 M5 B17 H_A#25
H_D#22 H_D#_21 H_A#_25 H_A#26
J3 H_D#_22 H_A#_26 L16
H_D#23 N2 C21 H_A#27 H_A#[35:3]
H_D#_23 H_A#_27 <3> H_A#[35:3]
H_D#24 R1 J17 H_A#28
H_D#25 H_D#_24 H_A#_28 H_A#29
N5 H_D#_25 H_A#_29 H20
H_D#26 N6 B18 H_A#30 H_REQ#[4:0]
H_D#_26 H_A#_30 <3> H_REQ#[4:0]
H_D#27 P13 K17 H_A#31
H_D#28 H_D#_27 H_A#_31 H_A#32
N8 H_D#_28 H_A#_32 B20
H_D#29 L7 F21 H_A#33 H_D#[63:0]
H_D#_29 H_A#_33 <3> H_D#[63:0]
H_D#30 N10 K21 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
M3 H_D#_31 H_A#_35 L20
H_D#32 Y3
C
H_D#33 H_D#_32 C
AD14 H_D#_33 H_ADS# H12 H_ADS# <3>
+VCCP_GMCH H_D#34 Y6 B16
H_D#_34 H_ADSTB#_0 H_ADSTB#0 <3>
H_D#35 Y10 G17
H_D#_35 H_ADSTB#_1 H_ADSTB#1 <3>
H_D#36 Y12 A9
H_D#_36 H_BNR# H_BNR# <3>
2

HOST
H_D#37 Y14 F11
H_D#_37 H_BPRI# H_BPRI# <3>
R1004 H_D#38 Y7 G12
H_D#_38 H_BREQ# H_BR0# <3>
221Ohm H_D#39 W2 E9
H_D#_39 H_DEFER# H_DEFER# <3>
H_D#40 AA8 B10
H_D#_40 H_DBSY# H_DBSY# <3>
H_D#41 Y9 AH7 CLK_MCH_BCLK <29>
1

H_D#42 H_D#_41 HPLL_CLK


AA13 H_D#_42 HPLL_CLK# AH6 CLK_MCH_BCLK# <29>
H_SWING H_D#43 AA9 J11
H_D#_43 H_DPWR# H_DPWR# <3>
H_D#44 AA11 F9
H_D#_44 H_DRDY# H_DRDY# <3>
2

H_D#45 AD11 H9
H_D#_45 H_HIT# H_HIT# <3>
1

R1005 H_D#46 AD10 E12


H_D#_46 H_HITM# H_HITM# <3>
75Ohm C1002 H_D#47 AD13 H11
H_D#_47 H_LOCK# H_LOCK# <3>
1% 0.1UF/10V H_D#48 AE12 C9 H_TRDY# <3>
2

H_D#49 H_D#_48 H_TRDY#


AE9
1

H_D#50 H_D#_49
AA2 H_D#_50
H_D#51 AD8
H_D#52 H_D#_51
AA3 H_D#_52
H_D#53 AD3 J8
H_D#_53 H_DINV#_0 H_DINV#0 <3>
H_D#54 AD7 L3
H_D#_54 H_DINV#_1 H_DINV#1 <3>
H_D#55 AE14 Y13
H_D#_55 H_DINV#_2 H_DINV#2 <3>
H_D#56 AF3 Y1
H_D#_56 H_DINV#_3 H_DINV#3 <3>
H_D#57 AC1
H_D#58 H_D#_57
AE3 H_D#_58 H_DSTBN#_0 L10 H_DSTBN#0 <3>
H_D#59 AC3 M7
H_D#_59 H_DSTBN#_1 H_DSTBN#1 <3>
H_D#60 AE11 AA5
H_D#_60 H_DSTBN#_2 H_DSTBN#2 <3>
H_D#61 AE8 AE6
H_D#_61 H_DSTBN#_3 H_DSTBN#3 <3>
H_D#62 AG2
H_D#63 H_D#_62
B AD6 H_D#_63 H_DSTBP#_0 L9 H_DSTBP#0 <3> B

H_DSTBP#_1 M8 H_DSTBP#1 <3>


H_DSTBP#_2 AA6 H_DSTBP#2 <3>
H_SWING C5 AE5
H_SWING H_DSTBP#_3 H_DSTBP#3 <3>
H_RCOMP E3 H_RCOMP H_REQ#0
H_REQ#_0 B15
+VCCP_GMCH T1001 H_REQ#1
H_REQ#_1 K13
F13 H_REQ#2
H_REQ#_2 H_REQ#3
B13
1

H_REQ#_3
2

C12 B14 H_REQ#4


<3> H_CPURST# H_CPURST# H_REQ#_4
R1008 E11
<3> H_CPUSLP# H_CPUSLP#
1KOhm B6
H_RS#_0 H_RS#0 <3>
1% F12
H_RS#_1 H_RS#1 <3>
C8 H_RS#2 <3>
1

HVREF H_RS#_2
A11 H_AVREF
B11 H_DVREF
2
1

R1007 CANTIGA_CHIPSET
C1001 2KOhm
0.1UF/10V 1%
2

Cap 0.1uF within 100 mils from GMCH

A A

Title : Cantiga -- CPU (1)


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 10 of 100
5 4 3 2 1
5 4 3 2 1
U1001B

M36 RSVD1
N36 RSVD2 SA_CK_0 AP24 M_CLK_DDR0 <7>
R33 AT21

CONTROL/COMPENSATION
RSVD3 SA_CK_1 M_CLK_DDR1 <7>
T33 RSVD4 SB_CK_0 AV24 M_CLK_DDR2 <8>
AH9 RSVD5 SB_CK_1 AU20 M_CLK_DDR3 <8>
AH10 U1001C
RSVD6
AH12 RSVD7 SA_CK#_0 AR24 M_CLK_DDR0# <7>
AH13 RSVD8 SA_CK#_1 AR21 M_CLK_DDR1# <7>
K12 AU24 +VCC_PEG
RSVD9 SB_CK#_0 M_CLK_DDR2# <8>
T1105 1 AL34 AV20 L32
RSVD10 SB_CK#_1 M_CLK_DDR3# <8> L_BKLT_CTRL
T1116 1 AK34 G32 T37 PEGCOMP 1 1% 2
T1118 RSVD11 L_BKLT_EN PEG_COMPI R1101 49.9Ohm
1 AN35 RSVD12 SA_CKE_0 BC28 M_CKE0 <7> M32 L_CTRL_CLK PEG_COMPO T36
T1119 1 AM35 AY28
RSVD13 SA_CKE_1 M_CKE1 <7>
D T24 RSVD14 SB_CKE_0 AY36 M_CKE2 <8> M33 L_CTRL_DATA PCIENB_RXN[15:0] <70> D
BB36 K33 H44 PCIENB_RXN0
SB_CKE_1 M_CKE3 <8> L_DDC_CLK PEG_RX#_0

RSVD
SL1101 B31 J33 J46 PCIENB_RXN1
+1.5V RSVD15 L_DDC_DATA PEG_RX#_1 PCIENB_RXN2
1 2 AJ6 RSVD16 SA_CS#_0 BA17 M_CS#0 <7> PEG_RX#_2 L44
M1 AY16 L40 PCIENB_RXN3
RSVD17 SA_CS#_1 M_CS#1 <7> PEG_RX#_3
2

R0402 AV16 M29 N41 PCIENB_RXN4


SB_CS#_0 M_CS#2 <8> L_VDD_EN PEG_RX#_4
AR13 C44 P48 PCIENB_RXN5
SB_CS#_1 M_CS#3 <8> LVDS_IBG PEG_RX#_5
R1105 AY21 B43 N44 PCIENB_RXN6
1KOhm RSVD20 LVDS_VBG PEG_RX#_6 PCIENB_RXN7
SA_ODT_0 BD17 M_ODT0 <7> E37 LVDS_VREFH PEG_RX#_7 T43
1% AY17 +1.5V E38 U43 PCIENB_RXN8
M_ODT1 <7>
1

SA_ODT_1 LVDS_VREFL PEG_RX#_8

LVDS
A47 BF15 C41 Y43 PCIENB_RXN9
RSVD21 SB_ODT_0 M_ODT2 <8> LVDSA_CLK# PEG_RX#_9
SM_RCOMP_VOH BG23 AY13 C40 Y48 PCIENB_RXN10
RSVD22 SB_ODT_1 M_ODT3 <8> LVDSA_CLK PEG_RX#_10
BF23 B37 Y36 PCIENB_RXN11
RSVD23 LVDSB_CLK# PEG_RX#_11
1

C1101 C1102 BH18 BG22 M_RCOMP R1112 1 2 80.6Ohm 1% A37 AA43 PCIENB_RXN12
RSVD24 SM_RCOMP LVDSB_CLK PEG_RX#_12
2

2.2UF/6.3V 0.01UF/16V BF18 BH21 M_RCOMP# R1117 1 2 80.6Ohm 1% AD37 PCIENB_RXN13


RSVD25 SM_RCOMP# PEG_RX#_13 PCIENB_RXN14
H47 AC47
2

R1106 SM_RCOMP_VOH LVDSA_DATA#_0 PEG_RX#_14 PCIENB_RXN15


SM_RCOMP_VOH BF28 E46 LVDSA_DATA#_1 PEG_RX#_15 AD39
3.01KOHM BH28 SM_RCOMP_VOL +0.75V G40 PCIENB_RXP[15:0] <70>

DDR
1% SM_RCOMP_VOL SL1105 1 LVDSA_DATA#_2 PCIENB_RXP0
2 R0402 A40 H43

GRAPHICS
1

SM_RCOMP_VOL LVDSA_DATA#_3 PEG_RX_0 PCIENB_RXP1


SM_VREF AV42 M_VREF_MCH <7,8,9> PEG_RX_1 J44
AR36 H48 L43 PCIENB_RXP2
SM_PWROK DDR_PWRGD <83,92> LVDSA_DATA_0 PEG_RX_2
2

BF17 1 2 D45 L41 PCIENB_RXP3


SM_REXT LVDSA_DATA_1 PEG_RX_3
1

C1103 C1104 BC36 R1121 499Ohm 1% F40 N40 PCIENB_RXP4


SM_DRAMRST# M_DRAMRST# <7,8> LVDSA_DATA_2 PEG_RX_4
R1107 2.2UF/6.3V 0.01UF/16V B40 P47 PCIENB_RXP5
LVDSA_DATA_3 PEG_RX_5

1
1KOhm B38 N43 PCIENB_RXP6
2

1% DPLL_REF_CLK C1105 PEG_RX_6 PCIENB_RXP7


A38 A41 T42
1

DPLL_REF_CLK# 0.01UF/16V LVDSB_DATA#_0 PEG_RX_7 PCIENB_RXP8


E41 H38 U42

2
DPLL_REF_SSCLK @ LVDSB_DATA#_1 PEG_RX_8 PCIENB_RXP9

CLK
DPLL_REF_SSCLK# F41 G37 LVDSB_DATA#_2 PEG_RX_9 Y42
J37 W47 PCIENB_RXP10
LVDSB_DATA#_3 PEG_RX_10 PCIENB_RXP11
PEG_CLK F43 CLK_MCH_3GPLL <29> PEG_RX_11 Y37
E43 B42 AA42 PCIENB_RXP12
C PEG_CLK# CLK_MCH_3GPLL# <29> LVDSB_DATA_0 PEG_RX_12 C
G38 AD36 PCIENB_RXP13
LVDSB_DATA_1 PEG_RX_13 PCIENB_RXP14
F37 LVDSB_DATA_2 PEG_RX_14 AC48

PCI-EXPRESS
K37 AD40 PCIENB_RXP15
LVDSB_DATA_3 PEG_RX_15
DMI_RXN_0 AE41 DMI_TXN0 <21>
DMI_RXN_1 AE37 DMI_TXN1 <21> PEG_TX#_0 J41 PCIENB_TXN0 CX1138 1 2 0.1UF/10V PCIEG_RXN0
DMI_RXN_2 AE47 DMI_TXN2 <21> PEG_TX#_1 M46 PCIENB_TXN1 CX1121 1 2 0.1UF/10V PCIEG_RXN1
DMI_RXN_3 AH39 DMI_TXN3 <21> F25 TVA_DAC PEG_TX#_2 M47 PCIENB_TXN2 CX1148 1 2 0.1UF/10V PCIEG_RXN2
H25 TVB_DAC PEG_TX#_3 M40 PCIENB_TXN3 CX1134 1 2 0.1UF/10V PCIEG_RXN3
DMI_RXP_0 AE40 DMI_TXP0 <21> K25 TVC_DAC PEG_TX#_4 M42 PCIENB_TXN4 CX1147 1 2 0.1UF/10V PCIEG_RXN4

TV
<29> MCH_BSEL0 T25 CFG_0 DMI_RXP_1 AE38 DMI_TXP1 <21> PEG_TX#_5 R48 PCIENB_TXN5 CX1143 1 2 0.1UF/10V PCIEG_RXN5
<29> MCH_BSEL1 R25 CFG_1 DMI_RXP_2 AE48 DMI_TXP2 <21> H24 TV_RTN PEG_TX#_6 N38 PCIENB_TXN6 CX1133 1 2 0.1UF/10V PCIEG_RXN6
<29> MCH_BSEL2 P25 CFG_2 DMI_RXP_3 AH40 DMI_TXP3 <21> PEG_TX#_7 T40 PCIENB_TXN7 CX1144 1 2 0.1UF/10V PCIEG_RXN7
T1102 1 P20 CFG_3 PEG_TX#_8 U37 PCIENB_TXN8 CX1137 1 2 0.1UF/10V PCIEG_RXN8
T1101 1 P24 CFG_4 DMI_TXN_0 AE35 DMI_RXN0 <21> PEG_TX#_9 U40 PCIENB_TXN9 CX1117 1 2 0.1UF/10V PCIEG_RXN9
<15> MCH_CFG_5 C25 CFG_5 DMI_TXN_1 AE43 DMI_RXN1 <21> C31 TV_DCONSEL_0 PEG_TX#_10 Y40 PCIENB_TXN10 CX1118 1 2 0.1UF/10V PCIEG_RXN10
<15> MCH_CFG_6 N24 CFG_6 DMI_TXN_2 AE46 DMI_RXN2 <21> E32 TV_DCONSEL_1 PEG_TX#_11 AA46 PCIENB_TXN11 CX1120 1 2 0.1UF/10V PCIEG_RXN11
<15> MCH_CFG_7 M24 CFG_7 DMI_TXN_3 AH42 DMI_RXN3 <21> PEG_TX#_12 AA37 PCIENB_TXN12 CX1122 1 2 0.1UF/10V PCIEG_RXN12
DMI

T1115 1 E21 CFG_8 PEG_TX#_13 AA40 PCIENB_TXN13 CX1146 1 2 0.1UF/10V PCIEG_RXN13


CFG

<15> MCH_CFG_9 C23 CFG_9 DMI_TXP_0 AD35 DMI_RXP0 <21> PEG_TX#_14 AD43 PCIENB_TXN14 CX1140 1 2 0.1UF/10V PCIEG_RXN14
<15> MCH_CFG_10 C24 CFG_10 DMI_TXP_1 AE44 DMI_RXP1 <21> PEG_TX#_15 AC46 PCIENB_TXN15 CX1119 1 2 0.1UF/10V PCIEG_RXN15
T1107 1 N21 AF46
CFG_11 DMI_TXP_2 DMI_RXP2 <21>
<15> MCH_CFG_12 P21 CFG_12 DMI_TXP_3 AH43 DMI_RXP3 <21> E28 CRT_BLUE PEG_TX_0 J42 PCIENB_TXP0 CX1127 1 2 0.1UF/10V PCIEG_RXP0
<15> MCH_CFG_13 T21 CFG_13 PEG_TX_1 L46 PCIENB_TXP1 CX1145 1 2 0.1UF/10V PCIEG_RXP1
T1103 1 R20 CFG_14 G28 CRT_GREEN PEG_TX_2 M48 PCIENB_TXP2 CX1128 1 2 0.1UF/10V PCIEG_RXP2
T1108 1 M20 CFG_15 PEG_TX_3 M39 PCIENB_TXP3 CX1142 1 2 0.1UF/10V PCIEG_RXP3
<15> MCH_CFG_16 L21 CFG_16 J28 CRT_RED PEG_TX_4 M43 PCIENB_TXP4 CX1139 1 2 0.1UF/10V PCIEG_RXP4

VGA
GRAPHICS VID

T1104 1 H21 R47 PCIENB_TXP5 CX1125 1 2 0.1UF/10V PCIEG_RXP5


CFG_17 PEG_TX_5
T1109 1 P29 CFG_18 G29 CRT_IRTN PEG_TX_6 N37 PCIENB_TXP6 CX1123 1 2 0.1UF/10V PCIEG_RXP6
<15> MCH_CFG_19 R28 CFG_19 PEG_TX_7 T39 PCIENB_TXP7 CX1124 1 2 0.1UF/10V PCIEG_RXP7
<15> MCH_CFG_20 T28 CFG_20 GFX_VID_0 B33 H32 CRT_DDC_CLK PEG_TX_8 U36 PCIENB_TXP8 CX1135 1 2 0.1UF/10V PCIEG_RXP8
B
GFX_VID_1 B32 J32 CRT_DDC_DATA PEG_TX_9 U39 PCIENB_TXP9 CX1126 1 2 0.1UF/10V PCIEG_RXP9 B

GFX_VID_2 G33 J29 CRT_HSYNC PEG_TX_10 Y39 PCIENB_TXP10 CX1141 1 2 0.1UF/10V PCIEG_RXP10
GFX_VID_3 F33 E29 CRT_TVO_IREF PEG_TX_11 Y46 PCIENB_TXP11 CX1131 1 2 0.1UF/10V PCIEG_RXP11
<22> PM_SYNC#
SL1102 1 2 R0402 R29 PM_SYNC# GFX_VID_4 E33 L29 CRT_VSYNC PEG_TX_12 AA36 PCIENB_TXP12 CX1129 1 2 0.1UF/10V PCIEG_RXP12
<3,20,80> H_DPRSTP# B7 PM_DPRSTP# PEG_TX_13 AA39 PCIENB_TXP13 CX1130 1 2 0.1UF/10V PCIEG_RXP13
PM_EXTTS#0 N33 AD42 PCIENB_TXP14 CX1136 1 2 0.1UF/10V PCIEG_RXP14
<7> PM_EXTTS#0 PM_EXT_TS#_0 PEG_TX_14
PM_EXTTS#1 P32 AD46 PCIENB_TXP15 CX1132 1 2 0.1UF/10V PCIEG_RXP15
<8> PM_EXTTS#1 PM_EXT_TS#_1 PEG_TX_15
PM

SL1103 1 2 R0402 AT40 C34


<22,30> PM_PWROK PWROK GFX_VR_EN
AT11 +VCCP_GMCH
RSTIN# PCIEG_RXN[15:0] <70>
1 2 T20 CANTIGA_CHIPSET
<5,21,30,33,41,53,70> BUF_PLT_RST# THERMTRIP#
RX1101 100Ohm R32 DPRSLPVR 2 PCIEG_RXP[15:0] <70>
<3,5,20,32> H_THRMTRIP#
SL1104 1 2 R0402 AH37
<22,80> PM_DPRSLPVR CL_CLK CL_CLK0 <22>
AH36 R1108
CL_DATA CL_DATA0 <22>
BG48 AN36 PM_PWROK 1KOhm
ME

+3VS NC_1 CL_PWROK 1%


BF48 AJ35 CL_RST#0 <22>
1

NC_2 CL_RST# CL_VREF


BD48 NC_3 CL_VREF AH34
BC48 NC_4
1

R1103 2 1 10KOhm PM_EXTTS#0 BH47 NC_5


R1104 2 1 10KOhm PM_EXTTS#1 BG47 NC_6
C1106 R1102
BE47 N28 0.1UF/10V 499Ohm
2

NC_7 DDPC_CTRLCLK 1%
BH46 NC_8 DDPC_CTRLDATA M28
BF46 G36
1

NC_9 SDVO_CTRLCLK
NC

BG45 NC_10 SDVO_CTRLDATA E36


BH44 K36 1 T1120
NC_11 CLKREQ#
MISC

BH43 NC_12 ICH_SYNC# H36 MCH_ICH_SYNC# <22> +VCCP_GMCH


BH6 NC_13
BH5 1 T1117
NC_14
BG4 NC_15 TSATN# B12 2 1
BH3 R1126 56OHM
NC_16
A
BF3 NC_17 A
BH2 NC_18
BG2 NC_19 HDA_BCLK B28
BE2 NC_20 HDA_RST# B30
BG1 NC_21 HDA_SDI B29
HDA

BF1 NC_22 HDA_SDO C29


BD1 NC_23 HDA_SYNC A28
BC1 NC_24
F1 NC_25 Title : Cantiga-DDR2/PEG(2)
CANTIGA_CHIPSET PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 11 of 100
5 4 3 2 1
5 4 3 2 1

D D

<7> M_A_DQ[0:63] <8> M_B_DQ[0:63]


U1001D U1001E
M_A_DQ0 AJ38 BD21 M_B_DQ0 AK47 BC16
SA_DQ_0 SA_BS_0 M_A_BS0 <7> SB_DQ_0 SB_BS_0 M_B_BS0 <8>
M_A_DQ1 AJ41 BG18 M_B_DQ1 AH46 BB17
SA_DQ_1 SA_BS_1 M_A_BS1 <7> SB_DQ_1 SB_BS_1 M_B_BS1 <8>
M_A_DQ2 AN38 AT25 M_B_DQ2 AP47 BB33
SA_DQ_2 SA_BS_2 M_A_BS2 <7> SB_DQ_2 SB_BS_2 M_B_BS2 <8>
M_A_DQ3 AM38 M_B_DQ3 AP46
M_A_DQ4 AJ36 SA_DQ_3 M_B_DQ4 SB_DQ_3
SA_DQ_4 SA_RAS# BB20 M_A_RAS# <7> AJ46 SB_DQ_4
M_A_DQ5 AJ40 BD20 M_B_DQ5 AJ48 AU17
SA_DQ_5 SA_CAS# M_A_CAS# <7> SB_DQ_5 SB_RAS# M_B_RAS# <8>
M_A_DQ6 AM44 AY20 M_B_DQ6 AM48 BG16
SA_DQ_6 SA_WE# M_A_WE# <7> SB_DQ_6 SB_CAS# M_B_CAS# <8>
M_A_DQ7 AM42 M_B_DQ7 AP48 BF14
SA_DQ_7 SB_DQ_7 SB_WE# M_B_WE# <8>
M_A_DQ8 AN43 M_B_DQ8 AU47
M_A_DQ9 AN44 SA_DQ_8 M_B_DQ9 SB_DQ_8
SA_DQ_9 AU46 SB_DQ_9
M_A_DQ10 AU40 M_B_DQ10 BA48
SA_DQ_10 M_A_DM[0..7] <7> SB_DQ_10
M_A_DQ11 AT38 AM37 M_A_DM0 M_B_DQ11 AY48
SA_DQ_11 SA_DM_0 SB_DQ_11 M_B_DM[0:7] <8>
M_A_DQ12 AN41 AT41 M_A_DM1 M_B_DQ12 AT47 AM47 M_B_DM0
M_A_DQ13 AN39 SA_DQ_12 SA_DM_1 M_A_DM2 M_B_DQ13 SB_DQ_12 SB_DM_0 M_B_DM1
SA_DQ_13 SA_DM_2 AY41 AR47 SB_DQ_13 SB_DM_1 AY47
M_A_DQ14 AU44 AU39 M_A_DM3 M_B_DQ14 BA47 BD40 M_B_DM2
M_A_DQ15 AU42 SA_DQ_14 SA_DM_3 M_A_DM4 M_B_DQ15 SB_DQ_14 SB_DM_2 M_B_DM3
SA_DQ_15 SA_DM_4 BB12 BC47 SB_DQ_15 SB_DM_3 BF35
M_A_DQ16 AV39 AY6 M_A_DM5 M_B_DQ16 BC46 BG11 M_B_DM4
M_A_DQ17 AY44 SA_DQ_16 SA_DM_5 M_A_DM6 M_B_DQ17 SB_DQ_16 SB_DM_4 M_B_DM5
SA_DQ_17 SA_DM_6 AT7 BC44 SB_DQ_17 SB_DM_5 BA3

A
M_A_DQ18 BA40 AJ5 M_A_DM7 M_B_DQ18 BG43 AP1 M_B_DM6

B
M_A_DQ19 BD43 SA_DQ_18 SA_DM_7 M_B_DQ19 SB_DQ_18 SB_DM_6 M_B_DM7
SA_DQ_19 M_A_DQS[0:7] <7> BF43 SB_DQ_19 SB_DM_7 AK2
M_A_DQ20 AV41 AJ44 M_A_DQS0 M_B_DQ20 BE45
SA_DQ_20 SA_DQS_0 SB_DQ_20 M_B_DQS[0:7] <8>
M_A_DQ21 AY43 AT44 M_A_DQS1 M_B_DQ21 BC41 AL47 M_B_DQS0
M_A_DQ22 BB41 SA_DQ_21 SA_DQS_1 M_A_DQS2 M_B_DQ22 SB_DQ_21 SB_DQS_0 M_B_DQS1
SA_DQ_22 SA_DQS_2 BA43 BF40 SB_DQ_22 SB_DQS_1 AV48
MEMORY
M_A_DQ23 BC40 M_A_DQS3 M_B_DQ23 M_B_DQS2

MEMORY
SA_DQ_23 SA_DQS_3 BC37 BF41 SB_DQ_23 SB_DQS_2 BG41
M_A_DQ24 AY37 AW12 M_A_DQS4 M_B_DQ24 BG38 BG37 M_B_DQS3
M_A_DQ25 BD38 SA_DQ_24 SA_DQS_4 M_A_DQS5 M_B_DQ25 SB_DQ_24 SB_DQS_3 M_B_DQS4
SA_DQ_25 SA_DQS_5 BC8 BF38 SB_DQ_25 SB_DQS_4 BH9
M_A_DQ26 AV37 AU8 M_A_DQS6 M_B_DQ26 BH35 BB2 M_B_DQS5
C
M_A_DQ27 AT36 SA_DQ_26 SA_DQS_6 M_A_DQS7 M_B_DQ27 SB_DQ_26 SB_DQS_5 M_B_DQS6 C
SA_DQ_27 SA_DQS_7 AM7 M_A_DQS#[0:7] <7> BG35 SB_DQ_27 SB_DQS_6 AU1
M_A_DQ28 AY38 AJ43 M_A_DQS#0 M_B_DQ28 BH40 AN6 M_B_DQS7
SA_DQ_28 SA_DQS#_0 SB_DQ_28 SB_DQS_7 M_B_DQS#[0:7] <8>
M_A_DQ29 BB38 AT43 M_A_DQS#1 M_B_DQ29 BG39 AL46 M_B_DQS#0
M_A_DQ30 AV36 SA_DQ_29 SA_DQS#_1 M_A_DQS#2 M_B_DQ30 SB_DQ_29 SB_DQS#_0 M_B_DQS#1
SA_DQ_30 SA_DQS#_2 BA44 BG34 SB_DQ_30 SB_DQS#_1 AV47
M_A_DQ31AW36 BD37 M_A_DQS#3 M_B_DQ31 BH34 BH41 M_B_DQS#2
M_A_DQ32 BD13 SA_DQ_31 SA_DQS#_3 M_A_DQS#4 M_B_DQ32 SB_DQ_31 SB_DQS#_2 M_B_DQS#3
SA_DQ_32 SA_DQS#_4 AY12 BH14 SB_DQ_32 SB_DQS#_3 BH37
M_A_DQ33 AU11 BD8 M_A_DQS#5 M_B_DQ33 BG12 BG9 M_B_DQS#4
M_A_DQ34 BC11 SA_DQ_33 SA_DQS#_5 M_A_DQS#6 M_B_DQ34 SB_DQ_33 SB_DQS#_4 M_B_DQS#5
SA_DQ_34 SA_DQS#_6 AU9 BH11 SB_DQ_34 SB_DQS#_5 BC2
M_A_DQ35 BA12 AM8 M_A_DQS#7 M_B_DQ35 BG8 AT2 M_B_DQS#6
SYSTEM

M_A_DQ36 AU13 SA_DQ_35 SA_DQS#_7 M_B_DQ36 SB_DQ_35 SB_DQS#_6 M_B_DQS#7

SYSTEM
SA_DQ_36 M_A_A[0:14] <7> BH12 SB_DQ_36 SB_DQS#_7 AN5
M_A_DQ37 AV13 BA21 M_A_A0 M_B_DQ37 BF11
SA_DQ_37 SA_MA_0 SB_DQ_37 M_B_A[0:14] <8>
M_A_DQ38 BD12 BC24 M_A_A1 M_B_DQ38 BF8 AV17 M_B_A0
M_A_DQ39 BC12 SA_DQ_38 SA_MA_1 M_A_A2 M_B_DQ39 SB_DQ_38 SB_MA_0 M_B_A1
SA_DQ_39 SA_MA_2 BG24 BG7 SB_DQ_39 SB_MA_1 BA25
M_A_DQ40 BB9 BH24 M_A_A3 M_B_DQ40 BC5 BC25 M_B_A2
M_A_DQ41 BA9 SA_DQ_40 SA_MA_3 M_A_A4 M_B_DQ41 SB_DQ_40 SB_MA_2 M_B_A3
SA_DQ_41 SA_MA_4 BG25 BC6 SB_DQ_41 SB_MA_3 AU25
M_A_DQ42 AU10 BA24 M_A_A5 M_B_DQ42 AY3 AW25 M_B_A4
M_A_DQ43 AV9 SA_DQ_42 SA_MA_5 M_A_A6 M_B_DQ43 SB_DQ_42 SB_MA_4 M_B_A5
SA_DQ_43 SA_MA_6 BD24 AY1 SB_DQ_43 SB_MA_5 BB28
M_A_DQ44 BA11 BG27 M_A_A7 M_B_DQ44 BF6 AU28 M_B_A6
M_A_DQ45 BD9 SA_DQ_44 SA_MA_7 M_A_A8 M_B_DQ45 SB_DQ_44 SB_MA_6 M_B_A7
SA_DQ_45 SA_MA_8 BF25 BF5 SB_DQ_45 SB_MA_7 AW28
M_A_DQ46 AY8 AW24 M_A_A9 M_B_DQ46 BA1 AT33 M_B_A8
M_A_DQ47 BA6 SA_DQ_46 SA_MA_9 M_A_A10 M_B_DQ47 SB_DQ_46 SB_MA_8 M_B_A9
SA_DQ_47 SA_MA_10 BC21 BD3 SB_DQ_47 SB_MA_9 BD33
M_A_DQ48 AV5 M_A_A11 M_B_DQ48 M_B_A10
DDR

SA_DQ_48 SA_MA_11 BG26 AV2 SB_DQ_48 SB_MA_10 BB16


M_A_DQ49 AV7 M_A_A12 M_B_DQ49 M_B_A11

DDR
SA_DQ_49 SA_MA_12 BH26 AU3 SB_DQ_49 SB_MA_11 AW33
M_A_DQ50 AT9 BH17 M_A_A13 M_B_DQ50 AR3 AY33 M_B_A12
M_A_DQ51 AN8 SA_DQ_50 SA_MA_13 M_A_A14 M_B_DQ51 SB_DQ_50 SB_MA_12 M_B_A13
SA_DQ_51 SA_MA_14 AY25 AN2 SB_DQ_51 SB_MA_13 BH15
M_A_DQ52 AU5 M_B_DQ52 AY2 AU33 M_B_A14
M_A_DQ53 AU6 SA_DQ_52 M_B_DQ53 SB_DQ_52 SB_MA_14
SA_DQ_53 AV1 SB_DQ_53
M_A_DQ54 AT5 M_B_DQ54 AP3
M_A_DQ55 AN10 SA_DQ_54 M_B_DQ55 SB_DQ_54
SA_DQ_55 AR1 SB_DQ_55
M_A_DQ56 AM11 M_B_DQ56 AL1
M_A_DQ57 AM5 SA_DQ_56 M_B_DQ57 SB_DQ_56
B
SA_DQ_57 AL2 SB_DQ_57
B
M_A_DQ58 AJ9 M_B_DQ58 AJ1
M_A_DQ59 AJ8 SA_DQ_58 M_B_DQ59 SB_DQ_58
SA_DQ_59 AH1 SB_DQ_59
M_A_DQ60 AN12 M_B_DQ60 AM2
M_A_DQ61 AM13 SA_DQ_60 M_B_DQ61 SB_DQ_60
SA_DQ_61 AM3 SB_DQ_61
M_A_DQ62 AJ11 M_B_DQ62 AH3
M_A_DQ63 AJ12 SA_DQ_62 M_B_DQ63 SB_DQ_62
SA_DQ_63 AJ3 SB_DQ_63
CANTIGA_CHIPSET CANTIGA_CHIPSET

A A

Title : Cantiga--DDR2 bus (3)


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 12 of 100
5 4 3 2 1
5 4 3 2 1

U1001G
+1.5V_GMCH

AP33 VCC_SM_1 VCC_AXG_NCTF_1 W28


AN33 V28 U1001F
VCC_SM_2 VCC_AXG_NCTF_2
BH32 W26

Max: 3000 mA
VCC_SM_3 VCC_AXG_NCTF_3 +VCCP +VCCP_GMCH
BG32 VCC_SM_4 VCC_AXG_NCTF_4 V26
BF32 VCC_SM_5 VCC_AXG_NCTF_5 W25 Max: 1211 mA
BD32 VCC_SM_6 VCC_AXG_NCTF_6 V25 AG34 VCC_1
BC32 VCC_SM_7 VCC_AXG_NCTF_7 W24 AC34 VCC_2

1
BB32 VCC_SM_8 VCC_AXG_NCTF_8 V24 + AB34 VCC_3

1
BA32 W23 CE1301 AA34
VCC_SM_9 VCC_AXG_NCTF_9 C1302 C1303 C1304 C1305 VCC_4
AY32 VCC_SM_10 VCC_AXG_NCTF_10 V23 100UF/2V Y34 VCC_5
D AW32 AM21 22UF/6.3V 0.22UF/6.3V 0.22UF/6.3V 0.1UF/10V V34 D

2
VCC_SM_11 VCC_AXG_NCTF_11 VCC_6
AV32 VCC_SM_12 VCC_AXG_NCTF_12 AL21 U34 VCC_7
AU32 VCC_SM_13 VCC_AXG_NCTF_13 AK21 AM33 VCC_8
AT32 VCC_SM_14 VCC_AXG_NCTF_14 W21 AK33 VCC_9
AR32 VCC_SM_15 VCC_AXG_NCTF_15 V21 AJ33 VCC_10

POWER
AP32 VCC_SM_16 VCC_AXG_NCTF_16 U21 AG33 VCC_11
AN32 VCC_SM_17 VCC_AXG_NCTF_17 AM20 AF33 VCC_12
BH31 VCC_SM_18 VCC_AXG_NCTF_18 AK20
BG31 VCC_SM_19 VCC_AXG_NCTF_19 W20 AE33 VCC_13

VCC CORE
BF31 VCC_SM_20 VCC_AXG_NCTF_20 U20 AC33 VCC_14
BG30 VCC_SM_21 VCC_AXG_NCTF_21 AM19 AA33 VCC_15
BH29 VCC_SM_22 VCC_AXG_NCTF_22 AL19 Y33 VCC_16
BG29 VCC_SM_23 VCC_AXG_NCTF_23 AK19 W33 VCC_17
BF29 VCC_SM_24 VCC_AXG_NCTF_24 AJ19 V33 VCC_18
BD29 VCC_SM_25 VCC_AXG_NCTF_25 AH19 U33 VCC_19

VCC SM
BC29 VCC_SM_26 VCC_AXG_NCTF_26 AG19 AH28 VCC_20
BB29 VCC_SM_27 VCC_AXG_NCTF_27 AF19 AF28 VCC_21
BA29 VCC_SM_28 VCC_AXG_NCTF_28 AE19 AC28 VCC_22
AY29 VCC_SM_29 VCC_AXG_NCTF_29 AB19 AA28 VCC_23
AW29 VCC_SM_30 VCC_AXG_NCTF_30 AA19 AJ26 VCC_24
AV29 VCC_SM_31 VCC_AXG_NCTF_31 Y19 AG26 VCC_25
AU29 VCC_SM_32 VCC_AXG_NCTF_32 W19 AE26 VCC_26
AT29 VCC_SM_33 VCC_AXG_NCTF_33 V19 AC26 VCC_27
AR29 U19 +1.5V +1.5V_GMCH AH25
VCC_SM_34 VCC_AXG_NCTF_34 VCC_28
AP29 VCC_SM_35 VCC_AXG_NCTF_35 AM17 Max: 4140 mA AG25 VCC_29
VCC_AXG_NCTF_36 AK17 AF25 VCC_30
BA36 VCC_SM_36/NC VCC_AXG_NCTF_37 AH17 AG24 VCC_31

1
BB24 VCC_SM_37/NC VCC_AXG_NCTF_38 AG17 + AJ23 VCC_32

1
BD16 AF17 CE1302 C1308 AH23
VCC_SM_38/NC VCC_AXG_NCTF_39 C1306 C1307 VCC_33 +VCCP_GMCH

POWER
BB21 VCC_SM_39/NC VCC_AXG_NCTF_40 AE17 100UF/2V AF23 VCC_34
AW16 AC17 22UF/6.3V 22UF/6.3V AM32

2
C VCC_SM_40/NC VCC_AXG_NCTF_41 0.1UF/10V VCC_NCTF_1 C
AW13 VCC_SM_41/NC VCC_AXG_NCTF_42 AB17 T32 VCC_35 VCC_NCTF_2 AL32
AT13 VCC_SM_42/NC VCC_AXG_NCTF_43 Y17 VCC_NCTF_3 AK32
VCC_AXG_NCTF_44 W17 VCC_NCTF_4 AJ32
V17 AH32
VCC GFX NCTF

VCC_AXG_NCTF_45 VCC_NCTF_5
VCC_AXG_NCTF_46 AM16 VCC_NCTF_6 AG32
Y26 VCC_AXG_1 VCC_AXG_NCTF_47 AL16 VCC_NCTF_7 AE32
AE25 VCC_AXG_2 VCC_AXG_NCTF_48 AK16 VCC_NCTF_8 AC32
AB25 VCC_AXG_3 VCC_AXG_NCTF_49 AJ16 VCC_NCTF_9 AA32
AA25 VCC_AXG_4 VCC_AXG_NCTF_50 AH16 VCC_NCTF_10 Y32
AE24 VCC_AXG_5 VCC_AXG_NCTF_51 AG16 VCC_NCTF_11 W32
AC24 VCC_AXG_6 VCC_AXG_NCTF_52 AF16 VCC_NCTF_12 U32
AA24 VCC_AXG_7 VCC_AXG_NCTF_53 AE16 VCC_NCTF_13 AM30
Y24 VCC_AXG_8 VCC_AXG_NCTF_54 AC16 VCC_NCTF_14 AL30
AE23 VCC_AXG_9 VCC_AXG_NCTF_55 AB16 VCC_NCTF_15 AK30
AC23 VCC_AXG_10 VCC_AXG_NCTF_56 AA16 VCC_NCTF_16 AH30
AB23 VCC_AXG_11 VCC_AXG_NCTF_57 Y16 VCC_NCTF_17 AG30
AA23 VCC_AXG_12 VCC_AXG_NCTF_58 W16 VCC_NCTF_18 AF30
AJ21 VCC_AXG_13 VCC_AXG_NCTF_59 V16 VCC_NCTF_19 AE30
AG21 VCC_AXG_14 VCC_AXG_NCTF_60 U16 VCC_NCTF_20 AC30
AE21 VCC_AXG_15 VCC_NCTF_21 AB30
AC21 VCC_AXG_16 VCC_NCTF_22 AA30
AA21 VCC_AXG_17 VCC_NCTF_23 Y30
Y21 VCC_AXG_18 VCC_NCTF_24 W30

VCC NCTF
AH20 VCC_AXG_19 VCC_NCTF_25 V30
AF20 VCC_AXG_20 VCC_NCTF_26 U30
AE20 VCC_AXG_21 VCC_NCTF_27 AL29
AC20 VCC_AXG_22 VCC_NCTF_28 AK29
AB20 VCC_AXG_23 VCC_NCTF_29 AJ29
AA20 VCC_AXG_24 VCC_NCTF_30 AH29
T17 VCC_AXG_25 VCC_NCTF_31 AG29
B T16 VCC_AXG_26 VCC_NCTF_32 AE29 B
AM15 VCC_AXG_27 VCC_NCTF_33 AC29
AL15 VCC_AXG_28 VCC_NCTF_34 AA29
AE15 VCC_AXG_29 VCC_NCTF_35 Y29
AJ15 VCC_AXG_30 VCC_NCTF_36 W29
AH15 VCC_AXG_31 VCC_NCTF_37 V29
AG15 VCC_AXG_32 VCC_NCTF_38 AL28
AF15 VCC_AXG_33 VCC_NCTF_39 AK28
AB15 VCC_AXG_34 VCC_NCTF_40 AL26
AA15 VCC_AXG_35 VCC_NCTF_41 AK26
VCC GFX

Y15 VCC_AXG_36 VCC_NCTF_42 AK25


V15 VCC_AXG_37 VCC_NCTF_43 AK24
U15 VCC_AXG_38 VCC_NCTF_44 AK23
AN14 VCC_AXG_39
AM14 VCC_AXG_40
U14 VCC_AXG_41 VCC_SM_LF1 AV44
VCC SM LF

T14 VCC_AXG_42 VCC_SM_LF2 BA37


VCC_SM_LF3 AM40
VCC_SM_LF4 AV21
AY5 CANTIGA_CHIPSET
VCC_SM_LF5
VCC_SM_LF6 AM10
VCC_SM_LF7 BB13
1

T1301 1 AJ14 C1309 C1310 C1311 C1312 C1313 C1314 C1301


T1302 VCC_AXG_SENSE 0.1UF/10V 0.1UF/10V 0.22UF/6.3V 0.22UF/6.3V 0.47UF/6.3V 1UF/6.3V 1UF/6.3V
1 AH14
2

VSS_AXG_SENSE

A A

CANTIGA_CHIPSET

Title : Cantiga--POWER (4)


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 13 of 100
5 4 3 2 1
5 4 3 2 1

+VCCP_GMCH
L1403 852mA
120Ohm/100Mhz SL1409
D 1 2 +VCCP_GMCH_VTT 1 2 +VCCP_GMCH D
+VCCP_PEGPLL
U1001H

1
+ R0805
U13 C1450 C1463 C1404 CE1401
VTT_1
1

1
T13 4.7UF/6.3V 4.7UF/6.3V 0.47UF/6.3V 100UF/2.5V

2
C1407 C1412 VTT_2
B27 U12

2
10UF/6.3V 0.1UF/10V VCCA_CRT_DAC_1 VTT_3
A26 T12
2

2
VCCA_CRT_DAC_2 VTT_4
VTT_5 U11
L1404 T11
120Ohm/100Mhz VTT_6
A25 U10

CRT
VCCA_DAC_BG VTT_7
1 2 +VCCP_HPLL B25 VSSA_DAC_BG VTT_8 T10
VTT_9 U9
VTT_10 T9
1

1
VTT_11 U8
C1419 C1446 F47 T8
0.1UF/10V VCC_DPLLA VTT_12
4.7UF/6.3V U7

VTT
2

2
VTT_13
L48 VCC_DPLLB VTT_14 T7
VTT_15 U6
L1405 24mA AD1 T6

PLL
+VCCP_HPLL VCCA_HPLL VTT_16
120Ohm/100Mhz U5
VTT_17
1 2 +VCCP_MPLL 140mA +VCCP_MPLL AE1 VCCA_MPLL VTT_18 T5
VTT_19 V3
VTT_20 U3
1

1 J48 VCCA_LVDS VTT_21 V2


C1408 C1426 U2

A LVDS
10UF/6.3V 0.1UF/10V VTT_22
J47 T2
2

VSSA_LVDS VTT_23
VTT_24 V1
VTT_25 U1
SL1401
+1.5VS 1 2 +VCCA_PEG_GMCH AD48 322mA +VCCP_GMCH
VCCA_PEG_BG SL1408

1
C C
0.414mA R0603 +VCCAXF_GMCH 1 2
C1411 50mA

A PEG
0.1UF/10V R0805

1
+VCCP_PEGPLL AA48 VCCA_PEG_PLL C1406 C1405
SL1402 1UF/6.3V 10UF/6.3V

2
+VCCP_GMCH 1 2 +VCCASM_GMCH AR20 @
VCCA_SM_1
AP20 VCCA_SM_2
R0805 AN20 VCCA_SM_3
POWER
1

1
+ C1409 AR17
CE1407 C1445 C1415 VCCA_SM_4 L1409 +1.5V_GMCH
DDR2: 720mA AP17 VCCA_SM_5 +VCCP_GMCH
100UF/2.5V 10UF/6.3V 4.7UF/6.3V 1UF/6.3V AN17 120Ohm/100Mhz

2
DDR3: 748mA @ AT16
VCCA_SM_6
1 2
2

VCCA_SM_7
AR16

A SM
VCCA_SM_8
1.1 AP16 VCCA_SM_9 DDR2: 124mA
DDR3: 150mA

1
D1401

1
BAT54C
C1416 C1418
SL1403 0.1UF/10V 10UF/6.3V

2
+VCCP_GMCH 1 2 +VCCA_SM_CK AP28

2 3
VCCA_SM_CK_1
AN28 VCCA_SM_CK_2 VCC_AXF_1 B22
1

1
R0805 C1410 AP25 B21

AXF
C1448 C1437 VCCA_SM_CK_3 VCC_AXF_2 R1402
DDR2: 26mA AN25 VCCA_SM_CK_4 VCC_AXF_3 A21
+3VS
4.7UF/6.3V 10UF/6.3V 0.1UF/10V AN24 10Ohm
2

2
DDR3: 38mA AM28
VCCA_SM_CK_5 1%
VCCA_SM_CK_NCTF_1
AM26 106mA

A CK

1
VCCA_SM_CK_NCTF_2 SL1407
AM25 VCCA_SM_CK_NCTF_3
AL25 BF21 +3VS_HV 1 2
VCCA_SM_CK_NCTF_4 VCC_SM_CK_1

1
B AM24 BH20 B

SM CK
VCCA_SM_CK_NCTF_5 VCC_SM_CK_2 C1417 R0805
AL24 VCCA_SM_CK_NCTF_6 VCC_SM_CK_3 BG20
AM23 BF20 0.1UF/10V

2
VCCA_SM_CK_NCTF_7 VCC_SM_CK_4
AL23 VCCA_SM_CK_NCTF_8
+VCC_PEG +VCCP_GMCH

VCC_TX_LVDS K47
B24 Max:106 mA SL1406
VCCA_TV_DAC_1
A24 VCCA_TV_DAC_2 VCC_HV_1 C35 1 2

TV
VCC_HV_2 B35

1
+ R0805
1.1 A35

HV
VCC_HV_3 C1447 C1444 CE1406
A32 Max: 1782 mA 4.7UF/6.3V 22UF/6.3V 100UF/2V

2
VCC_HDA

HDA
+1.5VS SL1404 V48

2
VCC_PEG_1
1 2 VCC_PEG_2 U48
V47

PEG
VCC_PEG_3
2

R0805 U47
VCC_PEG_4

D TV/CRT
C1451 C1443 M25 U46
0.1UF/10V VCCD_TVDAC VCC_PEG_5 +VCC_PEG
0.01UF/16V
1

L28 SL1405
VCCD_QDAC +VCC_DMI
VCC_DMI_1 AH48 1 2
+VCCP_GMCH AF1 VCCD_HPLL VCC_DMI_2 AF48 Max: 456 mA
1

1
AH47 R0805
DMI
C1440 VCC_DMI_3 C1421
158mA +VCCP_PEGPLL AA47 VCCD_PEG_PLL VCC_DMI_4 AG47
1

0.1UF/10V 0.1UF/10V
2

2
C1441
0.1UF/10V M38
2

VCCD_LVDS_1
LVDS

L37 VCCD_LVDS_2 VTTLF1 A8


VTTLF2 L1
VTTLF
VTTLF3 AB2

1
A A
C1433 C1434 C1435
0.47UF/6.3V 0.47UF/6.3V 0.47UF/6.3V

2
CANTIGA_CHIPSET

Title : Cantiga-POWER(5)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 14 of 100
5 4 3 2 1
A
B
C
D

<11> MCH_CFG_9
<11> MCH_CFG_7
<11> MCH_CFG_6
<11> MCH_CFG_5

<11> MCH_CFG_16
BG21 VSS_199 VSS_297 AH8 AU48 VSS_1 VSS_100 AM36
L12 VSS_200 VSS_298 Y8 AR48 VSS_2 VSS_101 AE36

5
5

AW21 VSS_201 VSS_299 L8 AL48 VSS_3 VSS_102 P36


1 2 1 2 1 2 1 2 1 2 AU21 VSS_202 VSS_300 E8 BB47 VSS_4 VSS_103 L36
AP21 VSS_203 VSS_301 B8 AW47 VSS_5 VSS_104 J36
AN21 VSS_204 VSS_302 AY7 AN47 VSS_6 VSS_105 F36

@
@
@
@
@
AH21 VSS_205 VSS_303 AU7 AJ47 VSS_7 VSS_106 B36
AF21 AN7 AF47 AH35

R1507
R1512
R1511
R1514
R1509
VSS_206 VSS_304 VSS_8 VSS_107
AB21 VSS_207 VSS_305 AJ7 AD47 VSS_9 VSS_108 AA35

2.21KOhm
2.21KOhm
2.21KOhm
2.21KOhm
2.21KOhm
R21 VSS_208 VSS_306 AE7 AB47 VSS_10 VSS_109 Y35
M21 VSS_209 VSS_307 AA7 Y47 VSS_11 VSS_110 U35
J21 VSS_210 VSS_308 N7 T47 VSS_12 VSS_111 T35
G21 VSS_211 VSS_309 J7 N47 VSS_13 VSS_112 BF34
BC20 VSS_212 VSS_310 BG6 L47 VSS_14 VSS_113 AM34
BA20 VSS_213 VSS_311 BD6 G47 VSS_15 VSS_114 AJ34
AW20 VSS_214 VSS_312 AV6 BD46 VSS_16 VSS_115 AF34
AT20 VSS_215 VSS_313 AT6 BA46 VSS_17 VSS_116 AE34
AJ20 VSS_216 VSS_314 AM6 AY46 VSS_18 VSS_117 W34
AG20 VSS_217 VSS_315 M6 AV46 VSS_19 VSS_118 B34
Y20 VSS_218 VSS_316 C6 AR46 VSS_20 VSS_119 A34
N20 VSS_219 VSS_317 BA5 AM46 VSS_21 VSS_120 BG33
K20 VSS_220 VSS_318 AH5 V46 VSS_22 VSS_121 BC33

LOW = Disable
LOW = DMI X 2
F20 VSS_221 VSS_319 AD5 R46 VSS_23 VSS_122 BA33
C20 VSS_222 VSS_320 Y5 P46 VSS_24 VSS_123 AV33

CFG5 : DMI STRAP


A20 VSS_223 VSS_321 L5 H46 VSS_25 VSS_124 AR33
BG19 J5 F46 AL33

LOW = iTPM enable


VSS_224 VSS_322 VSS_26 VSS_125
A18 VSS_225 VSS_323 H5 BF44 VSS_27 VSS_126 AH33

LOW = Reverse Lanes


BG17 VSS_226 VSS_324 F5 AH44 VSS_28 VSS_127 AB33
BC17 BE4 AD44 P33

Layer Security cipher suite


VSS_227 VSS_325 VSS_29 VSS_128
AW17 AA44 L33

HIGH = DMI X 4 (Default)


VSS_228 VSS_30 VSS_129

HIGH = Ensable (Default)


CFG16 : FSB Dynamic ODT
AT17 VSS_229 VSS_327 BC3 Y44 VSS_31 VSS_130 H33
R17 AV3 U44 N32

CFG9 : PCIE GRAPHIC LANE


VSS_230 VSS VSS_328 VSS_32 VSS_131
M17 VSS_231 VSS_329 AL3 T44 VSS_33 VSS_132 K32

LOW = Without confidentiality


H17 R3 M44 F32

HIGH = iTPM disable (Default)


VSS_232 VSS_330 VSS_34 VSS VSS_133
C17 VSS_233 VSS_331 P3 F44 VSS_35 VSS_134 C32

4
4

VSS_332 F3 BC43 VSS_36 VSS_135 A31


BA16 BA2 AV43 AN29

CFG6 : Integrated TPM Host Interface


VSS_235 VSS_333 VSS_37 VSS_136
AW2 AU43 T29

HIGH = Normal Operation (Default)


VSS_334 VSS_38 VSS_137

CFG7 : Intel ME Crypto Strap Transport


AU16 VSS_237 VSS_335 AU2 AM43 VSS_39 VSS_138 N29

HIGH = With confidentiality (Default)


AN16 VSS_238 VSS_336 AR2 J43 VSS_40 VSS_139 K29
N16 VSS_239 VSS_337 AP2 C43 VSS_41 VSS_140 H29
K16 VSS_240 VSS_338 AJ2 BG42 VSS_42 VSS_141 F29
G16 VSS_241 VSS_339 AH2 AY42 VSS_43 VSS_142 A29
E16 VSS_242 VSS_340 AF2 AT42 VSS_44 VSS_143 BG28
BG15 VSS_243 VSS_341 AE2 AN42 VSS_45 VSS_144 BD28
AC15 VSS_244 VSS_342 AD2 AJ42 VSS_46 VSS_145 BA28
W15 VSS_245 VSS_343 AC2 AE42 VSS_47 VSS_146 AV28
A15 VSS_246 VSS_344 Y2 N42 VSS_48 VSS_147 AT28

<11> MCH_CFG_13
<11> MCH_CFG_12
<11> MCH_CFG_10
BG14 VSS_247 VSS_345 M2 L42 VSS_49 VSS_148 AR28
AA14 VSS_248 VSS_346 K2 BD41 VSS_50 VSS_149 AJ28
C14 VSS_249 VSS_347 AM1 AU41 VSS_51 VSS_150 AG28
BG13 VSS_250 VSS_348 AA1 AM41 VSS_52 VSS_151 AE28
BC13 VSS_251 VSS_349 P1 AH41 VSS_53 VSS_152 AB28
BA13 VSS_252 VSS_350 H1 AD41 VSS_54 VSS_153 Y28
AA41 VSS_55 VSS_154 P28
VSS_351 U24 Y41 VSS_56 VSS_155 K28
1 2 1 2 1 2 AN13 VSS_255 VSS_352 U28 U41 VSS_57 VSS_156 H28
AJ13 VSS_256 VSS_353 U25 T41 VSS_58 VSS_157 F28
AE13 VSS_257 VSS_354 U29 M41 VSS_59 VSS_158 C28

@
@
@

N13 VSS_258 G41 VSS_60 VSS_159 BF26


L13 B41 AH26

R1510
R1513
R1508

VSS_259 VSS_61 VSS_160


G13 VSS_260 VSS_NCTF_1 AF32 BG40 VSS_62 VSS_161 AF26

2.21KOhm
2.21KOhm
2.21KOhm

E13 VSS_261 VSS_NCTF_2 AB32 BB40 VSS_63 VSS_162 AB26


BF12 VSS_262 VSS_NCTF_3 V32 AV40 VSS_64 VSS_163 AA26
AV12 VSS_263 VSS_NCTF_4 AJ30 AN40 VSS_65 VSS_164 C26
AT12 VSS_264 VSS_NCTF_5 AM29 H40 VSS_66 VSS_165 B26
AM12 VSS_265 VSS_NCTF_6 AF29 E40 VSS_67 VSS_166 BH25
AA12 VSS_266 VSS_NCTF_7 AB29 AT39 VSS_68 VSS_167 BD25

3
3

J12 VSS_267 VSS_NCTF_8 U26 AM39 VSS_69 VSS_168 BB25


A12 VSS_268 VSS_NCTF_9 U23 AJ39 VSS_70 VSS_169 AV25
BD11 VSS_269 VSS_NCTF_10 AL20 AE39 VSS_71 VSS_170 AR25
BB11 VSS_270 VSS_NCTF_11 V20 N39 VSS_72 VSS_171 AJ25
AY11 VSS_271 VSS_NCTF_12 AC19 L39 VSS_73 VSS_172 AC25
AN11 VSS_272 VSS_NCTF_13 AL17 B39 VSS_74 VSS_173 Y25
VSS NCTF

AH11 AJ17 BH38 N25


LOW = Enable

00 = Reserved

VSS_273 VSS_NCTF_14 VSS_75 VSS_174


VSS_NCTF_15 AA17 BC38 VSS_76 VSS_175 L25
Y11 VSS_275 VSS_NCTF_16 U17 BA38 VSS_77 VSS_176 J25
N11 VSS_276 AU38 VSS_78 VSS_177 G25
G11 VSS_277 VSS_SCB_1 BH48 AH38 VSS_79 VSS_178 E25
C11 VSS_278 VSS_SCB_2 BH1 AD38 VSS_80 VSS_179 BF24
CFG10 : PCIe Loopback

BG10 VSS_279 VSS_SCB_3 A48 AA38 VSS_81 VSS_180 AD12


CFG [13:12] : XOR/ALL-Z

AV10 VSS_280 VSS_SCB_4 C1 Y38 VSS_82 VSS_181 AY24


01= XOR Mode Enabled
10= All-Z Mode Enabled

AT10 B2 U38 AT24


HIGH = Disable (Default)

VSS_281 VSS_SCB_5 VSS_83 VSS_182


AJ10 VSS_282 VSS_SCB_6 A3 T38 VSS_84 VSS_183 AJ24
AE10 VSS_283 J38 VSS_85 VSS_184 AH24
VSS SCB

AA10 VSS_284 NC_26 E1 F38 VSS_86 VSS_185 AF24


M10 VSS_285 NC_27 D2 C38 VSS_87 VSS_186 AB24
R1501

BF9 C3 BF37 R24


11= Normal Operation (Default)

VSS_286 NC_28 VSS_88 VSS_187


BC9 B4 BB37 L24
1

VSS_287 NC_29 VSS_89 VSS_188


AN9 VSS_288 NC_30 A5 AW37 VSS_90 VSS_189 K24
AM9 VSS_289 NC_31 A6 AT37 VSS_91 VSS_190 J24
@

AD9 VSS_290 NC_32 A43 AN37 VSS_92 VSS_191 G24


G9 VSS_291 NC_33 A44 AJ37 VSS_93 VSS_192 F24
B9 VSS_292 NC_34 B45 H37 VSS_94 VSS_193 E24
NC

BH8 VSS_293 NC_35 C46 C37 VSS_95 VSS_194 BH23


BB8 VSS_294 NC_36 D47 BG36 VSS_96 VSS_195 AG23
AV8 B47 BD36 Y23
2 0Ohm

VSS_295 NC_37 VSS_97 VSS_196


AT8 VSS_296 NC_38 A46 AK15 VSS_98 VSS_197 B23
<11> MCH_CFG_19

NC_39 F48 AU36 VSS_99 VSS_198 A23


<11> MCH_CFG_20

NC_40 E48
NC_41 C48

2
2

NC_42 B48
U1001I

U1001J

1 2 1 2
+3VS
+3VS
CANTIGA_CHIPSET

@
@

R1506
R1503
CANTIGA_CHIPSET

4.02KOHM
4.02KOHM

Size
Custom P/N
Project Name

Date: Thursday, July 16, 2009


PEGATRON COMPUTER INC
Operational (Default)
HIGH = Reverse Lanes
CFG19 : DMI Lane Reversal

1
1

LOW = NORMAL (default)

Engineer:
F83Vf
Sheet
LOW = ONLY SDVO or PCIE is

<OrgAddr2>
simultaneously via the PEG port

15
HIGH = SDVO and PCIE are operating

of
Zack Kuo
Title : Cantiga-GND
CFG20 : SDVO/PCIE CONCURRENT MODE

100
1.1
Rev
A
B
C
D
5 4 3 2 1

D D

C C

B B

A A

Title :
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 16 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title :
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 17 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title :
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 18 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title :
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 19 of 100
5 4 3 2 1
5 4 3 2 1

1.1 R2003 1 2 20KOhm RTCRST#


+VCC_RTC

1
1
C2004 JRST1 7 RNX2005D
49.9OHM8

2
1UF/10V 1MM_OPEN_5MIL

2
@ SL2001

2
R0603

2
U2001A
RTC_X1 C23 K5 LPC_AD0 <30,44>

1
RTC_X2 RTCX1 FWH0/LAD0
C24 RTCX2 FWH1/LAD1 K4 LPC_AD1 <30,44>
Place Near the Open Door FWH2/LAD2 L6 LPC_AD2 <30,44> +VCCP
A25 RTCRST# FWH3/LAD3 K2 LPC_AD3 <30,44>

RTC
LPC
D R2008 1 2 20KOhm SRTCRST# F20 D
+VCC_RTC SRTCRST#
@ 2 1 C22 K3
+VCC_RTC INTRUDER# FWH4/LFRAME# LPC_FRAME# <30,44>
R2004 1 2 ICH_INTVRMEN B22 J3
INTVRMEN LDRQ0#

2
C2005 560KOhm 1 2 LAN_SLP A22 J1 1 T2006
1UF/10V SL2003 LAN100_SLP LDRQ1#/GPIO23
@ R0402 SL2002 E25 N7 RNX2005A
A20GATE <30>

2
R0402 GLAN_CLK A20GATE 49.9OHM
A20M# AJ27 H_A20M# <3>
C13 LAN_RSTSYNC
VccLAN1_05 & VccCL1_05 VccSus1_05, VccSus1_5, & AJ25 H_DPRSTP# <3,11,80>

1
DPRSTP#

LAN / GLAN
F14 LAN_RXD0 DPSLP# AE23 H_DPSLP# <3>
Internal VR VccCL1_5 Internal VR G13 LAN_RXD1 RNX2005B
D14 LAN_RXD2 FERR# AJ26 3 49.9OHM4 H_FERR# <3>
High = Enable ( Default ) High = Enable ( Default )
D13 LAN_TXD0 CPUPWRGD AD22 H_PWRGD <3>
Low = Disable Low = Disable D12 LAN_TXD1
E13 LAN_TXD2 IGNNE# AF25 H_IGNNE# <3>

CPU
1 RN2001A
<74> ACZ_BCLK_VGA 33OHM 2 1
3 RN2001B R2017 2 10KOhm T2007
<36> ACZ_BCLK_AUD 33OHM 4 +3VSUS 1 B10 GLAN_DOCK#/GPIO56 INIT# AE22 H_INIT# <3>
INTR AG25 H_INTR <3>
+1.5VS_PCIE_ICH R2009 1 2 24.9Ohm 1% B28 L3
GLAN_COMPI RCIN# RCIN# <30>
B27 GLAN_COMPO 1
5 RN2002C T2008
<74> ACZ_SYNC_VGA 33OHM 6 NMI AF23 H_NMI <3>
7 RN2002D ACZ_BCLK
<36> ACZ_SYNC_AUD 33OHM 8 AF6 HDA_BIT_CLK SMI# AF24 H_SMI# <3>
ACZ_SYNC AH4 1
HDA_SYNC T2009 RNX2005C
STPCLK# AH27 H_STPCLK# <3> 5 49.9OHM6 +VCCP
ACZ_RST# AE7
RN2001C HDA_RST# PM_THRMTRIP#
<74> ACZ_RST#_VGA 5 33OHM 6 THRMTRIP# AG26 1 2 H_THRMTRIP# <3,5,11,32>
7 RN2001D RX2005 @ 49.9Ohm
<36,37> ACZ_RST#_AUD 33OHM 8 <36> ACZ_SDIN0_AUD AF4 HDA_SDIN0
AG4 AG27 1 T2003 2 1
HDA_SDIN1 PECI C2007 100PF/50V

IHDA
C <74> ACZ_SDIN1_VGA AH3 HDA_SDIN2 C
T2012 1 AE5 @
RN2002A HDA_SDIN3 T2010
<74> ACZ_SDOUT_VGA 1 33OHM 2 SATA4RXN AH11 1
3 RN2002B ACZ_SDOUT T2011
<36> ACZ_SDOUT_AUD 33OHM 4 AG5 HDA_SDOUT SATA4RXP AJ11 1
AG12 1 T2013
SATA4TXN
T2005 1GPIO33 AG7 HDA_DOCK_EN#/GPIO33 SATA4TXP AF12 1 T2014
T2004 1 AE8 HDA_DOCK_RST#/GPIO34 T2015
SATA5RXN AH9 1
AG8 AJ9 1 T2016
<56> SATA_LED# SATALED# SATA5RXP
AE10 1 T2017
SATA5TXN T2018
<51> SATA_RXN0 AJ16 SATA0RXN SATA5TXP AF10 1
AH16

SATA
<51> SATA_RXP0 SATA0RXP
<51> SATA_TXN0 AF17 SATA0TXN SATA_CLKN AH18
AG17 AJ18 CLK_PCIE_SATA# <29>
<51> SATA_TXP0 SATA0TXP SATA_CLKP CLK_PCIE_SATA <29> SATA1 HDD 1
<51> SATA_RXN1 AH13 SATA1RXN SATARBIAS# AJ7 SATA2 ODD
AJ13 AH7 SATARBIAS# 1 2
<51> SATA_RXP1 SATA1RXP SATARBIAS SATA4 HDD 2
AG14 R2015 24.9Ohm 1%
<51> SATA_TXN1 SATA1TXN
<51> SATA_TXP1 AF14 SATA1TXP
SATA5 ESATA
ICH9M

R2018 1 @ 2 56Ohm GPIO33

B B
C2002
2 1 RTC_X1
1

15PF/50V
1

2 X2001 R2002
10MOhm
3 32.768Khz
2

C2003
4

2 1 RTC_X2

15PF/50V

+3VA +VCC_RTC [ICH_TP3, ACZ_SDOUT] : XOR Chain Entrance Strap


+RTCBAT D2001
1
00 = Reserved
T2001 1 1 2 2
3
01= Enter XOR Chain
10= Normal Operation (Default)
1

R2001 BAT54C C2001


1KOhm
1UF/10V 11= Set PCIe Port Config Bit 1
2

1 T2002
1

J2001 +VCCHDA_ICH
A
3 A
4
ACZ_SDOUT R2016 1 @ 2 1KOhm
BATT_HOLDER_2P
2

Title : SB-ICH9M(1)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 20 of 100
5 4 3 2 1
5 4 3 2 1

PCIE1 NC
PCIE2 MiniCard
PCIE3 NewCard
PCIE4 NC
PCIE5 NC
PCIE6 LAN

U2001B U2001D
D11 AD0 REQ0# F1 PCI_REQ#0 <22> N29 PERn1 DMI0RXN V27 DMI_RXN0 <11>

Direct Media Interface


PCI_GNT#0
D C8
D9
AD1 PCI GNT0# G4
B6
N28
P27
PERp1 DMI0RXP V26
U29
DMI_RXP0 <11> D

AD2 REQ1#/GPIO50 T2101 PCI_REQ#1 <22> PETn1 DMI0TXN DMI_TXN0 <11>


E12 AD3 GNT1#/GPIO51 A7 1 P26 PETp1 DMI0TXP U28 DMI_TXP0 <11>
E9 AD4 REQ2#/GPIO52 F13 PCI_REQ#2 <22>
C9 F12 1 T2102 L29 Y27
AD5 GNT2#/GPIO53 <53> PCIE_RXN2_MINICARD PERn2 DMI1RXN DMI_RXN1 <11>
E10 AD6 REQ3#/GPIO54 E6 PCI_REQ#3 <22> <53> PCIE_RXP2_MINICARD L28 PERp2 DMI1RXP Y26 DMI_RXP1 <11>
B7 F6 1 <53> PCIE_TXN2_C CX2103 1 2 0.1UF/10V PCIE_TXN2_MIMICARD M27 W29
AD7 GNT3#/GPIO55 PETn2 DMI1TXN DMI_TXN1 <11>
C7 T2103 <53> PCIE_TXP2_C CX2104 1 2 0.1UF/10V PCIE_TXP2_MINICARD M26 W28
AD8 PETp2 DMI1TXP DMI_TXP1 <11>
C5 AD9 C/BE0# D8
G11 AD10 C/BE1# B4 <41> PCIE_RXN3_NEWCARD J29 PERn3 DMI2RXN AB27 DMI_RXN2 <11>

PCI-Express
F8 AD11 C/BE2# D6 <41> PCIE_RXP3_NEWCARD J28 PERp3 DMI2RXP AB26 DMI_RXP2 <11>
F11 A5 <41> PCIE_TXN3_C CX2105 1 2 0.1UF/10V PCIE_TXN3_NEWCARD K27 AA29
AD12 C/BE3# PETn3 DMI2TXN DMI_TXN2 <11>
E7 <41> PCIE_TXP3_C CX2106 1 2 0.1UF/10V PCIE_TXP3_NEWCARD K26 AA28
AD13 PETp3 DMI2TXP DMI_TXP2 <11>
A3 AD14 IRDY# D3 PCI_IRDY# <22>
D2 AD15 PAR E3 G29 PERn4 DMI3RXN AD27 DMI_RXN3 <11>
F10 R1 1 T2113 G28 AD26
AD16 PCIRST# PERp4 DMI3RXP DMI_RXP3 <11>
D5 AD17 DEVSEL# C6 PCI_DEVSEL# <22> H27 PETn4 DMI3TXN AC29 DMI_TXN3 <11>
D10 AD18 PERR# E4 PCI_PERR# <22> H26 PETp4 DMI3TXP AC28 DMI_TXP3 <11>
B3 AD19 PLOCK# C2 PCI_LOCK# <22>
F7 AD20 SERR# J4 PCI_SERR# <22> E29 PERn5 DMI_CLKN T26 CLK_PCIE_ICH# <29>
C3 AD21 STOP# A4 PCI_STOP# <22> E28 PERp5 DMI_CLKP T25 CLK_PCIE_ICH <29>
F3 AD22 TRDY# F5 PCI_TRDY# <22> F27 PETn5
F4 AD23 FRAME# D7 PCI_FRAME# <22> F26 PETp5 DMI_ZCOMP AF29 DMI_COMP R2103 1 1% 2 24.9Ohm
+1.5VS_PCIE_ICH
C1 AD24 PLT_RST# DMI_IRCOMP AF28 L<500mils
G7 AD25 PLTRST# C14 PLT_RST# <33> <33> PCIE_RXN6_LAN C29 PERn6/GLAN_RXN Place within 500 mils of ICH
H7 AD26 PCICLK D4 CLK_ICHPCI <29> <33> PCIE_RXP6_LAN C28 PERp6/GLAN_RXP USBP0N AC5 USB_PN0 <52>
D1 R2 <33> PCIE_TXN6_C CX2111 1 2 0.1UF/10V PCIE_TXN6_LAN D27 AC4
AD27 PME# PETn6/GLAN_TXN USBP0P USB_PP0 <52>
G5 <33> PCIE_TXP6_C CX2112 1 2 0.1UF/10V PCIE_TXP6_LAN D26 AD3
AD28 PETp6/GLAN_TXP USBP1N USB_PN1 <52>
H6 AD29 USBP1P AD2 USB_PP1 <52>
G1 1 SB_SPICLK D23 AC1
AD30 SPI_CLK USBP2N USB_PN2 <53>
H3 T2108 1 SB_SPICS0# D24 AC2
C AD31 SPI_CS0# USBP2P USB_PP2 <53> C
T2109 1 SB_SPICS1# F23 AA5
SPI_CS1#/GPIO58/CLGPIO6 USBP3N USB_PN3 <52>
T2107
J5
Interrupt I/F H4 1 SB_SPISI D25
USBP3P AA4
AB2
USB_PP3 <52>
<22> PCI_INTA# PIRQA# PIRQE#/GPIO2 PCI_INTE# <22> SPI_MOSI USBP4N USB_PN4 <45>

SPI
E1 K6 T2111 1 E23 AB3
<22> PCI_INTB# PIRQB# PIRQF#/GPIO3 PCI_INTF# <22> SPI_MISO USBP4P USB_PP4 <45>
J6 F2 T2110 AA1
<22> PCI_INTC# PIRQC# PIRQG#/GPIO4 PCI_INTG# <22> USBP5N USB_PN5 <61>
USB_OC0#
<22> PCI_INTD# C4 PIRQD# PIRQH#/GPIO5 G2 PCI_INTH# <22> 1.1 USB_OC1#
N4
N5
OC0#/GPIO59 USBP5P AA2
W5
USB_PP5 <61>
+3VSUS OC1#/GPIO40 USBP6N USB_PN6 <41>
ICH9M USB_OC2#
USB_OC3#
N6
P6
OC2#/GPIO41 USB USBP6P W4
Y3
USB_PP6 <41>
OC3#/GPIO42 USBP7N USB_PN7 <40>
USB_OC4# M1 Y2
OC4#/GPIO43 USBP7P USB_PP7 <40>
R2107 1 2 10KOhm USB_OC5# N2 W1 1 T2117
USB_OC6# OC5#/GPIO29 USBP8N T2116
M4 OC6#/GPIO30 USBP8P W2 1
R2108 1 2 10KOhm USB_OC7# M3 V2 1 T2106
CLK_DEC# OC7#/GPIO31 USBP9N T2112
N3 OC8#/GPIO44 USBP9P V3 1
CLK_ACC N1 U5 1 T2114
OC9#/GPIO45 USBP10N T2115
<53> WLAN_ON# P5 OC10#/GPIO46 USBP10P U4 1
SPI_MOSI USB_OC11# P3 U1
OC11#/GPIO47 USBP11N USB_PN11 <63>
USBP11P U2 USB_PP11 <63>
iTPM Enable AG2 USBRBIAS
2 1 USBRBIAS_PN AG1 USBRBIAS#
High = Enable 18Ohm R2105
1% ICH9M
+3V Low = Disable(Default) USB0 External Port 1
USB1 External Port 2
Place within 500 mils of ICH USB2 WLAN
USB3 External Port 3
U2101 @ USB4 CMOS Camera
1 A VCC 5 USB5 BT
B PLT_RST# 2 B USB6 NEWCARD B
USB7 CardReader
3 GND 4 BUF_PLT_RST# <5,11,30,33,41,53,70> USB8 FREE
Y
NC7SZ08P5X_NL
ICH9 Boot BIOS select USB9 FREE
SL2101
USB10 FREE
GNT#0 CS#1 USB11 FingerPrinter
2 1
LPC 11 1 1
R0603 (default)
PCI 10 1 0
SPI 01 0 1

PCI_GNT#0 R2101 1 @ 2 1KOhm

SB_SPICS1# R2102 1 @ 2 1KOhm

A A

Title : SB-ICH9M(2)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 21 of 100
5 4 3 2 1
5 4 3 2 1

+3VSUS

2
R2202 +3VS
10KOhm
RP2202A
U2001C 1
<21> PCI_INTE# 10KOhm5

1
+3VSUS G16 SMBCLK AH23 RP2202B 10
<24> SCL_3A SATA0GP/GPIO21
<24> SDA_3A A13 SMBDATA SATA1GP/GPIO19 AF19 <21> PCI_TRDY# 2 10KOhm5
T2220 1 E17 LINKALERT#/GPIO60/CLGPIO4 AE21 GPIO36 RP2202C 10

SATA
SATA4GP/GPIO36

GPIO
SMB
C17 SMLINK0 AD20 PCB_ID0 PM_CLKRUN# 3
<24> SM_LINK0 SATA5GP/GPIO37 10KOhm5
R2201 <24> SM_LINK1 B18 SMLINK1 RP2202D 10
10KOhm H1 4
CLK14 CLK_ICH14 <29> <21> PCI_STOP# 10KOhm5
D PM_RI# F19 AF3 RP2202E 10 D

Clocks
RI# CLK48 CLK_USB48 <29,40>
<21> PCI_INTD# 6 10KOhm5
1 T2205 1 R4 SUS_STAT#/LPCPD SUSCLK P1 1 T2206 RP2202F 10
PM_RSMRST# 1 @ 2 G19 7
SYS_RESET# <21> PCI_IRDY# 10KOhm5
R2236 0Ohm C16 RP2202G 10
SLP_S3# PM_SUSB# <30>
<11> PM_SYNC# M6 PMSYNC#/GPIO0 SLP_S4# E16 PM_SUSC# <30> <21> PCI_PERR# 8 10KOhm5
+3VS G17 1 T2208 RP2202H 10
SLP_S5#
<30> EXT_SCI# A17 SMBALERT#/GPIO11 <21> PCI_LOCK# 9 10KOhm5
@ C10 1 T2214 10
STP_PCI# S4_STATE#/GPIO26
1 10KOHM 2 RN2203A <29> STP_PCI# A14 STP_PCI#
STP_CPU# 3 10KOHM 4 RN2203B PM_PWROK_R

SYS GPIO
<29> STP_CPU# E19 STP_CPU# PWROK G20
RP2203A
@ L4 M2 2 1 GPIO36 1
<30> PM_CLKRUN# CLKRUN# DPRSLPVR/GPIO16 PM_DPRSLPVR <11,80> 10KOhm5
SL2203 R0603 RP2203B 10

Power MGT
E20 B13 BAT_LL# 2
<33,44,53> PCIE_WAKE# WAKE# BATLOW# <21> PCI_REQ#3 10KOhm5
M5 RP2203C 10
<30> INT_SERIRQ SERIRQ
AJ23 THRM# PWRBTN# R3 2 1 PM_PWRBTN# <30> <21> PCI_DEVSEL# 3 10KOhm5
PM_THERM# 1 @ 2 PM_THERM#_SB SL2204 R0603 RP2203D 10
<50> PM_THERM#
R2237 0Ohm VR_PWRGD_CLKEN D21 D20 R2234 1 2 10KOhm 4
VRMPWRGD LAN_RST# <21> PCI_REQ#1 10KOhm5
RP2203E 10
T2201 1 A20 D22 RSMRST#_ICH R2235 1 2 10KOhm INT_SERIRQ 6
SST RSMRST# PM_RSMRST# <30> 10KOhm5
RP2203F
remove CB_SD# and BT_DET# AG19 R5 2 1 PM_THERM#_SB 7
10
TACH1/GPIO1 CK_PWRGD CLK_PWRGD <29> 10KOhm5
AH21 SL2205 R0603 RP2203G 10
TACH2/GPIO6 PM_PWROK
AG21 TACH3/GPIO7 CLPWROK R6 <21> PCI_REQ#2 8 10KOhm5
A21 RP2203H 10
<30> EXT_SMI# GPIO8
T2202 1 HDTV_DET# C12 B16 1 T2213 9
LAN_PHY_PWR_CTRL/GPIO12 SLP_M# <21> PCI_FRAME# 10KOhm5
T2221 1 CB_SD# C21 10
WLAN_LED ENERGY_DETECT/GPIO13 RP2204A
<56> WLAN_LED AE18 TACH0/GPIO17 CL_CLK0 F24 CL_CLK0 <11>
+3VS T2222 1 T2204 1 K1 B19 1 T2218 1
GPIO18 CL_CLK1 <21> PCI_SERR# 10KOhm5
T2203 1 AF8 RP2204B 10
C
R2249 1 10KOhm BT_DET# GPIO20 C
2 AJ22 SCLOCK/GPIO22 CL_DATA0 F22 CL_DATA0 <11> <21> PCI_INTF# 2 10KOhm5

Controller Link
A9 C19 1 T2219 RP2204C 10

GPIO
<61> BT_ON# GPIO27 CL_DATA1
<56> BT_LED D19 GPIO28 <21> PCI_INTA# 3 10KOhm5
CLK_SATACLK_REQ# L1 C25 CL_VREF0 RP2204D 10
<29> CLK_SATACLK_REQ# SATACLKREQ#/GPIO35 CL_VREF0
PCB_ID1 AE19 A19 CL_VREF1 4
SLOAD/GPIO38 CL_VREF1 <21> PCI_INTC# 10KOhm5
PCB_ID2 AG22 RP2204E 10
+3VSUS SDATAOUT0/GPIO39
AF21 SDATAOUT1/GPIO48 CL_RST0# F21 CL_RST#0 <11> <21> PCI_INTB# 6 10KOhm5
GPU_RST# AH24 D18 1 T2212 RP2204F 10
<70> GPU_RST# GPIO49 CL_RST1#
1
R2252
2
10KOhm
A8 GPIO57/CLGPIO5
A16 1 T2216
FOR ATHEROS <21> PCI_INTG# 7
RP2204G
10KOhm5
10
SB_SPKR GPIO24/MEM_LED
<36> SB_SPKR M7 SPKR GPIO10/SUS_PWR_ACK C18
T2215
1 T2217 F83 <21> PCI_REQ#0 8
RP2204H
10KOhm5
<11> MCH_ICH_SYNC# AJ24 MCH_SYNC# GPIO14/AC_PRESENT C11 1 10
T2207 1 B21 C20 2 1 9
TP3 GPIO9/WOL_EN <21> PCI_INTH# 10KOhm5

MISC
T2209 1 AH20 R2248 100KOhm 10
T2210 PWM0
For UMA Design T2211
1 AJ20 PWM1
1 AJ21 PWM2
ICH9M

Mount/unmount as same R2236

PM_PWROK_R 2 1 PM_PWROK <11,30>


+3VSUS SL2202 R0603
2 +3VSUS
PM_RSMRST# R2219 1 @ 2 10KOhm

1
EXT_SMI# 1 10KOhm 2 RN2201A R2231
PCIE_WAKE# 3 10KOhm 4 RN2201B WLAN_LED R2259 1 2 10KOhm 10KOhm R2232
PM_RI# 5 10KOhm 6 RN2201C @ 10KOhm
EXT_SCI# 7 10KOhm 8 RN2201D CB_SD# R2225 1 @ 2 1KOhm
1

B CLK_SATACLK_REQ# 1 10KOhm 2 RN2202A B

2
SDA_3A 3 10KOhm 4 RN2202B GPU_RST# R2223 1 @ 2 1KOhm
SCL_3A 5 10KOhm 6 RN2202C VR_PWRGD_CLKEN 2 1 EC_CLK_EN <30>
BAT_LL# 7 10KOhm 8 RN2202D SL2206 R0603

3
3 Q2201
D

1
2N7002
R2224 @
11
+3VA +3VS CLK_EN# <80>
100KOhm G
S 2

2
D2201
+3VS +3VS +3VS RSMRST#_ICH 1
2

3 SUS_PWRGD <30,81,92>
2

R2211 R2210 PM_PWROK_R 2


2

3.24KOhm 3.24KOhm
R2213 R2214 R2217 @ BAT54C
@ 10KOhm 10KOhm 10KOhm +3VS
1

@ @ D2202
1

CL_VREF1 CL_VREF0 PM_THERM# VR_PWRGD_CLKEN 1


1

PCB_ID0 3

1
PCB_ID1 2
1

PCB_ID2 R2233

3
C2201 R2212 C2202 @ 10KOhm Q2204 3 D BAT54C
0.1UF/10V 453Ohm 0.1UF/10V R2226 2N7002
2

2
2

@ @ 453Ohm 2 @
R2215 R2216 R2218 11
1

10KOhm 10KOhm 10KOhm G


2 S
3

Q2203 3 D

2
CL_VREF0/1 ~= 0.405 V 2N7002
1

@
A CL_VREF [0:1] routing rules <30> PM_THERM#_EC 11 A
G
Width = 12 mils min 2 S
2

Spacing = 12 mils min


Break-out: 5 mils on 5 mils for 300 mils max

Title : SB-ICH9M(3)
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 22 of 100
5 4 3 2 1
5 4 3 2 1
6uA in G3 1.634A
U2001F U2001E
+VCC_RTC A23 VccRTC Vcc1_05_1 A15 +VCCP_ICH +VCCP +VCCP_ICH AA26 Vss1 Vss107 H5

1
Vcc1_05_2 B15 + AA27 Vss2 Vss108 J23

1
C2310 C2311 A6 C15 C2303 C2304 CE2302 AA3 J26
V5REF Vcc1_05_3 Vss3 Vss109
Vcc1_05_4 D15 100UF/2.5V AA6 Vss4 Vss110 J27
0.1UF/16V 0.1UF/16V +5VREFSUS AE1 E15 0.1UF/16V 0.1UF/16V AB1 AC22

2
V5REF_Sus Vcc1_05_5 Vss5 Vss111
Vcc1_05_6 F15 AA23 Vss6 Vss112 K28
AA24 Vcc1_5_B_1 Vcc1_05_7 L11 AB28 Vss7 Vss113 K29
2mA AA25 Vcc1_5_B_2 Vcc1_05_8 L12 AB29 Vss8 Vss114 L13
R2319 10Ohm AB24 L14 L2303 AB4 L15
+V5REF_ICH Vcc1_5_B_3 Vcc1_05_9 80Ohm/100Mhz Vss9 Vss115
+5VS 1 2 AB25 Vcc1_5_B_4 Vcc1_05_10 L16 AB5 Vss10 Vss116 L2
AC24 L17 +VCCDMIPLL_ICH 1 2 23mA AC17 L26
Vcc1_5_B_5 Vcc1_05_11 +1.5VS Vss11 Vss117
AC25 Vcc1_5_B_6 Vcc1_05_12 L18 AC26 Vss12 Vss118 L27

1
2 C2301 AD24 M11 C2312 C2313 AC27 L5
D2301 Vcc1_5_B_7 Vcc1_05_13 Vss13 Vss119
D AD25 Vcc1_5_B_8 Vcc1_05_14 M18 AC3 Vss14 Vss120 L7 D
+3VS 3 BAT54A 0.1UF/16V AE25 P11 10UF/6.3V 0.01UF/16V AD1 M12

2
Vcc1_5_B_9 Vcc1_05_15 Vss15 Vss121
AE26 Vcc1_5_B_10 Vcc1_05_16 P18 AD10 Vss16 Vss122 M13
1 AE27 T11 L2305 AD12 M14
Vcc1_5_B_11 Vcc1_05_17 80Ohm/100Mhz Vss17 Vss123
AE28 Vcc1_5_B_12 Vcc1_05_18 T18 AD13 Vss18 Vss124 M15
AE29 U11 +VCCDMI_ICH 1 2 48mA AD14 M16
Vcc1_5_B_13 Vcc1_05_19 +VCCP_ICH Vss19 Vss125
F25 U18 AD17 M17

CORE
Vcc1_5_B_14 Vcc1_05_20 Vss20 Vss126
G25 Vcc1_5_B_15 Vcc1_05_21 V11 AD18 Vss21 Vss127 M23

1
+3VSUS H24 V12 C2322 AD21 M28
Vcc1_5_B_16 Vcc1_05_22 Vss22 Vss128
H25 Vcc1_5_B_17 Vcc1_05_23 V14 AD28 Vss23 Vss129 M29
D2302 J24 V16 4.7UF/10V AD29 N11

2
Vcc1_5_B_18 Vcc1_05_24 Vss24 Vss130

3
BAT54A J25 V17 AD4 N12
Vcc1_5_B_19 Vcc1_05_25 Vss25 Vss131
K24 Vcc1_5_B_20 Vcc1_05_26 V18 AD5 Vss26 Vss132 N13
K25 Vcc1_5_B_21 2 1 +VCCP_ICH 2mA AD6 Vss27 Vss133 N14
L23 R29 SL2315 R0603 AD7 N15
Vcc1_5_B_22 VccDMIPLL Vss28 Vss134

1
2mA L24 C2317 C2316 C2315 AD9 N16
R2320 10Ohm Vcc1_5_B_23 Vss29 Vss135
L25 W23 AE12 N17

2
Vcc1_5_B_24 VccDMI_1 Vss30 Vss136
+5VSUS 1 2 +5VREFSUS M24 Y23 0.1UF/16V 0.1UF/16V 4.7UF/10V AE13 N18

2
Vcc1_5_B_25 VccDMI_2 Vss31 Vss137
M25 Vcc1_5_B_26 AE14 Vss32 Vss138 N26

1
C2302 N23 AB23 AE16 N27
Vcc1_5_B_27 V_CPU_IO_1 Vss33 Vss139
N24 Vcc1_5_B_28 V_CPU_IO_2 AC23 2 1 AE17 Vss34 Vss140 P12
0.1UF/16V N25 SL2313 R0603 AE2 P13

2
Vcc1_5_B_29 Vss35 Vss141

1
P24 Vcc1_5_B_30 Vcc3_3_1 AG29 AE20 Vss36 Vss142 P14
P25 C2319 AE24 P15
Vcc1_5_B_31 Vss37 Vss143

VCCA3GP
R24 AJ6 0.1UF/16V AE3 P16

2
+1.5VS_PCIE_ICH Vcc1_5_B_32 Vcc3_3_2 Vss38 Vss144
R25 Vcc1_5_B_33 AE4 Vss39 Vss145 P17
R26 Vcc1_5_B_34 Vcc3_3_3 AC10 2 1 AE6 Vss40 Vss146 P2

1
646mA L2304 R27 SL2314 R0603 AE9 P23
80Ohm/100Mhz Vcc1_5_B_35 C2318 Vss41 Vss147
T24 Vcc1_5_B_36 Vcc3_3_4 AD19 AF13 Vss42 Vss148 P28
1 2 +1.5VS_PCIE_ICH T27 AF20 0.1UF/16V AF16 P29
+1.5VS

2
Vcc1_5_B_37 Vcc3_3_5 SL2310 Vss43 Vss149
T28 Vcc1_5_B_38 Vcc3_3_6 AG24 AF18 Vss44 Vss150 P4
1

C C

VCCP_CORE
+ T29 AC20 +VCC3_3_ICH 1 2 AF22 P7
Vcc1_5_B_39 Vcc3_3_7 +3VS Vss45 Vss151
1

1
CE2301 C2305 C2306 C2307 U24 AH26 R11
ESR=18mOhm/Ir=2.5A Vcc1_5_B_40 +VCC3_3_PCI C2320 R0805 Vss46 Vss152
U25 Vcc1_5_B_41 Vcc3_3_8 B9 AF26 Vss47 Vss153 R12
100UF/2.5V 22UF/6.3V 22UF/6.3V 2.2UF/6.3V V24 F9 0.1UF/16V 308mA AF27 R13
2

2
Vcc1_5_B_42 Vcc3_3_9 Vss48 Vss154

1
V25 G3 C2323 C2325 C2326 AF5 R14
@ Vcc1_5_B_43 Vcc3_3_10 SL2309 Vss49 Vss155
U23 Vcc1_5_B_44 Vcc3_3_11 G6 AF7 Vss50 Vss156 R15
W24 J2 0.1UF/16V 0.1UF/16V 0.1UF/16V 1 2 AF9 R16
+3VS

2
Vcc1_5_B_45 Vcc3_3_12 @ @ Vss51 Vss157
W25 Vcc1_5_B_46 Vcc3_3_13 J7 AG13 Vss52 Vss158 R17

PCI
K23 K7 R0805 AG16 R18
Vcc1_5_B_47 Vcc3_3_14 +VCCHDA_ICH Vss53 Vss159
Y24 Vcc1_5_B_48 AG18 Vss54 Vss160 R28
L2301 Y25 AJ4 +VCCHDA_ICH 2 1 AG20 T12
Vcc1_5_B_49 VccHDA +3VS Vss55 Vss161
80Ohm/100Mhz SL2312 R0603 AG23 T13
+VCCSATAPLL_ICH +VCCSUSHDA_ICH Vss56 Vss162
47mA +1.5VS 1 2 AJ19 VccSATAPLL VccSusHDA AJ3 2 1 +3VSUS 11mA AG3 Vss57 Vss163 T14

1
SL2311 R0603 C2329 AG6 T15
Vss58 Vss164
1

1
C2321 C2327 AC16 AC8 1 T2304 C2330 11mA AG9 T16
Vcc1_5_A_1 VccSus1_05_1 T2306 0.1UF/16V Vss59 Vss165
AD15 F17 1 AH12 T17

2
10UF/6.3V 1UF/6.3V Vcc1_5_A_2 VccSus1_05_2 0.1UF/16V Vss60 Vss166
AD16 AH14 T23
2

2
Vcc1_5_A_3 Vss61 Vss167

ARX
AE15 AD8 1 T2305 AH17 B26
Vcc1_5_A_4 VccSus1_5_1 Vss62 Vss168
AF15 Vcc1_5_A_5 AH19 Vss63 Vss169 U12
AG15 F18 C2340 1 2 0.1UF/10V AH2 U13
SL2302 Vcc1_5_A_6 VccSus1_5_2 Vss64 Vss170
AH15 Vcc1_5_A_7 AH22 Vss65 Vss171 U14
1 2 +VCC1_5_ICH AJ15 AH25 U15
+1.5VS Vcc1_5_A_8 Vss66 Vss172
VccSus3_3_1 A18 AH28 Vss67 Vss173 U16
1

R0805 C2324 AC11 D16 AH5 U17


VCCPSUS

Vcc1_5_A_9 VccSus3_3_2 SL2308 Vss68 Vss174


1.342*5/6=1.12A AD11 Vcc1_5_A_10 VccSus3_3_3 D17
+3VSUS_ICH_1
AH8 Vss69 Vss175 AD23
1UF/6.3V AE11 E22 1 2 AJ12 U26
2

Vcc1_5_A_11 VccSus3_3_4 Vss70 Vss176


ATX

AF11 Vcc1_5_A_12 AJ14 Vss71 Vss177 U27


AG10 R0805 AJ17 U3
Vcc1_5_A_13 Vss72 Vss178
AG11 Vcc1_5_A_14 VccSus3_3_5 AF1 AJ8 Vss73 Vss179 V1
AH10 Vcc1_5_A_15 B11 Vss74 Vss180 V13
1

B C2328 AJ10 T1 B14 V15 B


Vcc1_5_A_16 VccSus3_3_6 Vss75 Vss181
VccSus3_3_7 T2 B17 Vss76 Vss182 V23
1UF/6.3V AC9 T3 B2 V28
2

Vcc1_5_A_17 VccSus3_3_8 SL2307 Vss77 Vss183


VccSus3_3_9 T4 B20 Vss78 Vss184 V29
AC18 T5 +3VSUS_ICH 1 2 212mA B23 V4
Vcc1_5_A_18 VccSus3_3_10 +3VSUS Vss79 Vss185
AC19 Vcc1_5_A_19 VccSus3_3_11 T6 B5 Vss80 Vss186 V5

1
U6 C2332 C2334 C2331 R0805 B8 W26
VccSus3_3_12 Vss81 Vss187
AC21 Vcc1_5_A_20 VccSus3_3_13 U7 C26 Vss82 Vss188 W27
VCCPUSB

V6 2 0.01UF/16V 0.01UF/16V 0.1UF/16V C27 W3

2
VccSus3_3_14 Vss83 Vss189
G10 Vcc1_5_A_21 VccSus3_3_15 V7 E11 Vss84 Vss190 Y1
G9 Vcc1_5_A_22 VccSus3_3_16 W6 E14 Vss85 Vss191 Y28
VccSus3_3_17 W7 E18 Vss86 Vss192 Y29
2 1 +VCCUSBPLL_ICH AC12 Y6 E2 Y4
+1.5VS Vcc1_5_A_23 VccSus3_3_18 Vss87 Vss193
1

SL2301 R0603 C2333 AC13 Y7 E21 Y5


Vcc1_5_A_24 VccSus3_3_19 Vss88 Vss194
AC14 Vcc1_5_A_25 VccSus3_3_20 T7 E24 Vss89 Vss195 AG28
1.342A*1/6+0.011=0.24A 0.1UF/10V E5 AH6
2

C2343 1 Vss90 Vss196


AJ5 VccUSBPLL VccCL1_05 G22 2 0.1UF/10V C2308 1 2 1UF/6.3V E8 Vss91 Vss197 AF2
@ F16 Vss92 Vss198 B25
AA7 G23 C2339 1 2 0.1UF/16V F28
Vcc1_5_A_26 VccCL1_5 Vss93
USB CORE

AB6 Vcc1_5_A_27 @ F29 Vss94 Vss199 A1


1

C2309 AB7 A24 G12 A2


Vcc1_5_A_28 VccCL3_3_1 +3VM_ICH_CL 2 Vss95 Vss200
AC6 Vcc1_5_A_29 VccCL3_3_2 B24 1 +3VS 73mA G14 Vss96 Vss201 A28
0.1UF/10V AC7 SL2306 R0603 G18 A29
2

+3VM_VCCPAUX @ Vcc1_5_A_30 Vss97 Vss202


+3VS 2 1 C2342 G21 Vss98 Vss203 AH1
SL2303 R0603 A10 G24 AH29
VccLAN1_05_1 Vss99 Vss204
1

78mA C2335 1 2 A11 G26 AJ1


0.1UF/10V VccLAN1_05_2 Vss100 Vss205
G27 Vss101 Vss206 AJ2
0.1UF/16V A12 G8 AJ28
2

VccLAN3_3_1 Vss102 Vss207


B12 VccLAN3_3_2 H2 Vss103 Vss208 AJ29
SL2316 H23 B1
+VCCGLANPLL_ICH Vss104 Vss209
A +1.5VS 2 1 A27 VccGLANPLL H28 Vss105 Vss210 B29 A
H29 Vss106
1

GLAN POWER

R0603 C2336 @ C2337 @


+1.5VS 2 1+VCCGLAN1_5_ICH D28 VccGLAN1_5_1
1

23mA SL2304 + D29 ICH9M GND


VccGLAN1_5_2
1

10UF/6.3V 2.2UF/6.3V R0603 CE2303 E26 GND


2

@ C2338 VccGLAN1_5_3
80mA E27 VccGLAN1_5_4
220UF/4V 4.7UF/10V
2

A26 VccGLAN3_3
2 1 +VCCGLAN3_3_ICH ICH9M
Title : SB-ICH9M(PWR)
+3VS
SL2305 R0603 Engineer: Zack Kuo
PEGATRON COMPUTER INC
1mA
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 23 of 100
5 4 3 2 1
5 4 3 2 1

ICH9-M
+3VS

D D

1
+12VS
R2406 R2405
4.7KOhm 4.7KOhm

2
<22> SCL_3A 6 1 SMB_CLK_S <7,8,29,44,53>

Q2401A
UM6K1N

5
<22> SDA_3A 3 4 SMB_DAT_S <7,8,29,44,53>

Q2401B
UM6K1N

C C

+3VSUS

+12VSUS
1

B R2407 R2408 B
4.7KOhm 4.7KOhm
2

<30,50,74> SMB1_CLK 6 1 SM_LINK0 <22>


@
Q2404A
UM6K1N
5

<30,50,74> SMB1_DAT 3 4 SM_LINK1 <22>


@
Q2404B
UM6K1N

A A

Title : ICH9M-Other
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 24 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 25 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 26 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 27 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

D D

C C

B B

A A

Title : SB_****
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
Custom P/N 1.1
<OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 28 of 100
5 4 3 2 1
5 4 3 2 1

Main Board
+3VS
L2902
120Ohm/100Mhz
+3VS_VDDPCI 1 2

1
C2923 @ C2916 C2917 C2922 @ +3VS_VDDPCI
+3VS 10UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V
Latched Input Select

2
SL2910 1 2 R0603
SL2907

1
1 2 +3VS_VDDPCIEX U2901
D C2921 C2919 @ 0 : Pin 17/18 = LCD_SSCG D

VDDPCI1

VDDPCI2
1

1
R0805 10UF/10V 0.1UF/16V
1 : Pin 17/18 = PCIe_L0

2
C2925 @ C2924 @ C2901 C2902 C2903 C2904 21 11 +3VS_VDD48
0.1UF/16V 10UF/10V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V VDDPCIEX1 VDD48
28
2

2
VDDPCIEX2 +3VS_VDDREF SL2908 1 33PCI3
42 VDDPCIEX3 VDDREF 56 2 R0603 R2907 1 2 10KOhm

1
T2910 1 CLK_PWRSAV# 34 63
PWRSAVE#* PCI/PCIEX_STOP# STP_PCI# <22>
C2920 C2918 @
+3VS 50 62 10UF/10V 0.1UF/16V
STP_CPU# <22>

2
SL2903 VDDCPU CPU_STOP#
1 2 +3VS_VDDA 45 0 : Pin 43/44 = SRC CLK
VDDA CLK_MCH
49 1 33OHM 2 CLK_MCH_BCLK <10>
CPUT_L1F 1 : Pin 43/44 = CPU_ITP CLK
1

R0603 C2907 46 RNX2912A


C2926 @ C2905 C2906 24PF/50V GNDA CLK_MCH#
CPUC_L1F 48 3 33OHM 4 CLK_MCH_BCLK# <10>
0.1UF/16V 10UF/10V 0.1UF/16V 2 1 X1_CLK 58 RNX2912B 33PCIF4 R2908 1 2 10KOhm
2

X1
CLK_CPU

1
CPUT_L0 52 1 33OHM 2 CLK_CPU_BCLK <3>
X2901 RNX2913A
C2908 14.318Mhz 51 CLK_CPU# 3
CPUC_L0 33OHM 4 CLK_CPU_BCLK# <3>
24PF/50V RNX2913B

2
0 : Pin 14/15 = PCIe_L9
2 1 X2_CLK 57 X2
44 CLK_PCIE8 1
Pin 17/18 = 27FIX/27SS
CPUITPT_L2/PCIeT_L8 33OHM 2 CLK_PCIE_LAN <33>
RNX2914A 1 : Pin 14/15 = DOT_96MHz
43 CLK_PCIE8# 3
CPUITPC_L2/PCIeC_L8 33OHM 4 CLK_PCIE_LAN# <33> Pin 17/18 = LCD_SSCG/PCIe_L0
RNX2914B

1 CLK_PCIE0 PEREQ1# R0603 1 2 SL2906 33PCIF5


<72> CLK_GFX_NOSSC 33OHM 2 17 27FIX/LCD_SSCGT/PCIeT_L0 PEREQ1#/PCIeT_L7 41 CLK_SATACLK_REQ# <22> 1 2
RNX2901A R2910 10KOhm
40 PEREQ2# 1 T2906
PEREQ2#/PCIeC_L7

C C
39 CLK_PCIE6 1 T2907
CLK_PCIE0# PCIeT_L6
<72> CLK_GFX_SSC 3 33OHM 4 18 27SS/LCD_SSCGC/PCIeC_L0 0 : Pin 40/41 = PCIe_L7
RNX2901B 38 CLK_PCIE6# 1 T2908
PCIeC_L6 1 : Pin 40/41 = PEREQ#
F83
C2909 1 2 10PF/50V 36 CLK_PCIE5 3 +3VS
PCIeT_L5 33OHM 4 CLK_PCIE_WLAN <53>
@ RNX2916B
RX2903 2 1 33Ohm USB48 12 35 CLK_PCIE5# 1 R2928 2 10KOhm
<22,40> CLK_USB48 FSLA/USB_48MHz PCIeC_L5 33OHM 2 CLK_PCIE_WLAN# <53> 1
RNX2916A
CPU_BSEL0 R2902 2 1 2.2KOhm
30 CLK_PCIE4 1 33PCI0 R2911 @ 2 10KOhm
PCIeT_L4 33OHM 2 CLK_PCIE_NEWCARD <41> 1
RNX2917A
31 CLK_PCIE4# 3
PCIeC_L4 33OHM 4 CLK_PCIE_NEWCARD# <41>
CPU_BSEL1 16 RNX2917B
FSLB/TEST_MODE
24 CLK_PCIE3 3
PCIeT_L3 22Ohm 4 CLK_MCH_3GPLL <11>
RNX2921B PEREQ1#:
C2911 1 2 10PF/50V 25 CLK_PCIE3# 1 +3VS
PCIeC_L3 22Ohm 2 CLK_MCH_3GPLL# <11>
@ RNX2921A
T2909 1 RX2932 2 1 33Ohm 33PCI3 5 PEREQ1# R2922 1 2 10KOhm
*SELPCIEX0_LCD#PCICLK3 CLK_PCIE2
PCIeT_L2 22 3 33OHM 4 CLK_PCIE_ICH <21>
C2910 1 2 10PF/50V RNX2918B
@ 23 CLK_PCIE2# 1
PCIeC_L2 33OHM 2 CLK_PCIE_ICH# <21>
1 RNX2918A
<44> CLK_DEBUG 33OHM 2
RNX2904A PEREQ2#:
3 33PCI2 CLK_PCIE1 +3VS
<44> CLK_DBGPCI2 33OHM 4 4 PCICLK2 PCIeT_L1 19 3 33OHM 4 CLK_PCIE_PEG <70>
RNX2904B RNX2919B
20 CLK_PCIE1# 1 PEREQ2# R2923 @ 2 10KOhm
PCIeC_L1 33OHM 2 CLK_PCIE_PEG# <70> 1
RNX2919A

26 SATACLK 3 PEREQ3# : PCIEX2/4


B
SATACLKT_L 33OHM 4 CLK_PCIE_SATA <20> B
33PCI1 3 RNX2920B
PCICLK1
27 SATACLK# 1
PEREQ4# : PCIEX3/5/7
SATACLKC_L 33OHM 2 CLK_PCIE_SATA# <20>
RNX2920A

14 CLK_PCIE9 1 T2904
PCIeT_L9/DOTT_96MHzL

<21> CLK_ICHPCI RX2905 2 /DSP 1 33Ohm 33PCI0 64 15 CLK_PCIE9# 1 T2903 For 364 Over-clocking
PCICLK0/REQ_SEL** PCIeC_L9/DOTC_96MHzL +3VS

33PCI1 R2932 1 2 10KOhm


C2914 1 2 10PF/50V R2929 1 @ 2 10KOhm
@ 32 PEREQ3# SL2904 1 2 R0603 CLK_NEWCARD_REQ# <41,44>
T2905 RNX2903B 33PCIF5 *PEREQ3#
1 3 33Ohm 4 9 *SELLCD_27#/PCICLK_F5
33 PEREQ4# SL2905 1 2 R0603 +3VS
PEREQ4#* CLK_WLAN_REQ# <53>
REF0 R2931 1 2 10KOhm
R2930 1 @ 2 10KOhm
C2915 1 2 10PF/50V 10 CLK_PWRGD <22>
@ VttPWR_GD/PD#
RNX2903A 1 33PCIF4 Reserved for R1.0 Debug
<30> CLK_KBCPCI 33Ohm 2 8 ITP_EN/PCICLK_F4

<7,8,24,44,53> SMB_CLK_S 54 SCLK +VCCP


BCLK FSB BSEL2BSEL1BSEL0
61 REF1 RX2906 1 2 10KOhm CPU_BSEL2
REF1/FSLC/TEST_SEL REF0 RX2907 1
<7,8,24,44,53> SMB_DAT_S 55 SDATA REF0 60 2 33Ohm CLK_ICH14 <22> 166 667 0 1 1
47 VREF 200 800 0 1 0

1
+3VS
R2912 R2914 R2916 266 1067 0 0 0
1KOhm 1KOhm 1KOhm
1

@ @ @
R2903

2
A A
1KOhm 2 <3> CPU_BSEL0 RX2908 1 2 1KOhm MCH_BSEL0 <11>
1% GND1 RX2909 1
6 GND2 <3> CPU_BSEL1 2 1KOhm MCH_BSEL1 <11>
13 <3> CPU_BSEL2 RX2910 1 2 1KOhm MCH_BSEL2 <11>
2

T2911 CK505_VREF GND3


1 29 GND4
1

1
37 GND7
53 R2913 R2915 R2917
GND6
2

R2903 R2904 R2925 59 1KOhm 1KOhm 1KOhm


GND5
363:VREF
R2904 @ @ @ Title : CLK_ICS9LPR363
1K 330 @ 330Ohm
2

2
ICS9LPR362AGLF-T Engineer: Zack Kuo
1% 0610-000C000 PEGATRON COMPUTER INC
364:TURBO @ 10K 0
1

364:NO TURBO
Size Project Name
F83Vf Rev
@ @ @ Custom P/N
<OrgAddr2> 1.1
Date: Thursday, July 16, 2009 Sheet 29 of 100
5 4 3 2 1
5 4 3 2 1

For IT8752 Power +3VA_EC +3VPLL


+3VPLL SL3009
+3VACC 1 2
+3VA_EC +3VA_EC

1
+3VS R0805
+3VA +3VA_EC C3006 C3007
10UF/10V 0.1UF/10V

2
1

1
L3001
120Ohm/100Mhz C3003 C3004 C3005

114
121
127
10UF/10V 0.1UF/10V 0.1UF/10V

26
50
92

11

74
1 2

2
3
U3001
7 8 RN3004D 10 24 +3VACC

VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY

VBAT

VCC

AVCC
<20,44> LPC_AD0 47OHM LAD0 PWM0/GPA0 PWR_LED# <31,56> +3VS
5 6 RN3004C 9 25 SL3010
D <20,44> LPC_AD1 47OHM LAD1 PWM1/GPA1 CHG_LED# <56> D
3 4 RN3004B 8 28 TURBO_TP_LED# 1 T3008 1 2
<20,44> LPC_AD2 47OHM LAD2 PWM2/GPA2
1 2 RN3004A 7 29 KB_LED# 1 T3011 SL3008
<20,44> LPC_AD3 47OHM LAD3 PWM3/GPA3

1
13 30 1 2 R0805
<29> CLK_KBCPCI LPCCLK PWM4/GPA4 LCD_BL_PWM <45>
6 31 C3002 C3001
<20,44> LPC_FRAME# LFRAME# PWM5/GPA5 FAN_PWM <50>
22 32 TURBO_LOGO_LED# 1 T3012 R0805 0.1UF/10V 0.1UF/10V
<5,11,21,33,41,53,70> BUF_PLT_RST#

2
LPCRST#/WUI4/GPD2 PWM6/GPA6 T3007
<22> INT_SERIRQ 5 SERIRQ PWM7/GPA7 34 1

LPC
15 EC_AGND
<22> EXT_SMI# ECSMI#/GPD4
23 108 CHG_EN# 1 T3014 EC_AGND
<22> EXT_SCI# ECSCI#/GPD3 RXD/GPB0
126 109 PRECHG 1 T3015
<20> A20GATE GA20/GPB5 TXD/GPB1
RC_IN# T3052
<20> RCIN#
EC_RST#
4
14
KBRST#/GPB6 CTX/GPB2 123
112
1
For PU / PD
<32> EC_RST# WRST# RING#/PWRFAIL#/LPCRST#/GPB7 PM_RSMRST# <22> +3VSUS
<22> PM_THERM#_EC +3VA_EC
106 119 CRX0 1 T3037
FLRST#/WUI7/GPG0/TM CRX/GPC0

FLASH ROM
SCK SL3004 1 2 R0603 SCK_EC 105 R3051 1 @ 2 10KOhm PM_PWRBTN#
T3028 FLCLK
1 104 FLAD3/GPG6 TMRI0/WUI2/GPC4 120 ACIN_OC# <88>
SO 103 R3020 1 2 10KOhm ACIN_OC# +3VA_EC +3VS
SI FLAD2/SO
SL3005 1 2 R0603 SI_EC 102 FLAD1/SI TMRI1/WUI3/GPC6 124 BAT1_IN_OC# <60>
R3021 1 2 47KOhm BAT1_IN_OC#
SCE# SL3006 1 2 R0603 SCE#_EC 101 16 RFON_SW# <53,61> RN3003A 1 2 A20GATE
FLAD0/SCE# PWUREQ#/GPC7 10KOhm
T3029 1 100 FLFRAME#/GPG2
R3023 1 2 47KOhm BAT2_IN_OC# RN3003D 7 10KOhm 8 PWRLIMIT#
18 +3VS RN3003B 3 4 RC_IN#
RI1#/WUI0/GPD0 PWRLIMIT# <3> 10KOhm
58 21 RN3001A 1 2 SMB0_CLK RN3003C 5 6 INSTANT_ON#
<31> KSI0 KSI0/STB# RI2#/WUI1/GPD1 PM_SUSC# <22> 4.7KOHM 10KOhm
59 33 RN3001B 3 4 SMB0_DAT
<31> KSI1 KSI1/AFD# GINT/GPD5 LCD_BACKOFF# <45> 4.7KOHM
60 47 RN3001C 5 6 SMB1_CLK RN3002A 1 2 TP_DAT
<31> KSI2 KSI2/INIT# TACH0/GPD6 FAN0_TACH <50> 4.7KOHM 4.7KOHM
61 48 COLOREN# 1 T3053 RN3001D 7 8 SMB1_DAT RN3002B 3 4 TP_CLK
<31> KSI3 KSI3/SLIN# TACH1/GPD7 4.7KOHM 4.7KOHM
62 RN3002C 5 6 SUSB_EC#_C
<31> KSI4 KSI4 4.7KOHM
63 19 RN3002D 7 8 SUSC_EC#_C
<31> KSI5 KSI5 L80HLAT/GPE0 VSUS_ON <91,93> 4.7KOHM
64 82 SUSC_EC#_C SL3001 1 2 R0603
<31> KSI6 KSI6 EGAD/GPE1 SUSC_EC# <57,91>
65 83 SUSB_EC#_C SL3002 1 2 R0603
<31> KSI7 KSI7 EGCS#/GPE2 SUSB_EC# <41,57,91,92>
84

GPIO
EGCLK/GPE3 CPU_VRON <80>
C
<31> KSO0 36 KSO0/PD0 PWRSW/GPE4 125 PWR_SW# <31,55> C
KBMX
37 35 BAT2_IN_OC#
<31> KSO1 KSO1/PD1 WUI5/GPE5
38 17 PM_SUSB# R3029 1 2 100KOHM
<31> KSO2 KSO2/PD2 LPCPD#/WUI6/GPE6 LID_SW# <45>
39 20 PM_SUSC# R3004 1 2 100KOHM
<31> KSO3 KSO3/PD3 L80LLAT/GPE7 INSTANT_ON# <55>
<31> KSO4 40 KSO4/PD4
<31> KSO5 41 KSO5/PD5 Note:
42 107 CAP_ACK# R3006 1 2 100KOHM
<31> KSO6 KSO6/PD6 GPG1/ID7 PM_SUSB# <22> EXT_SMI#, EXT_SCI#, PU power plane
<31> KSO7 43 KSO7/PD7
44 PM_RSMRST# R3022 1 2 10KOhm depend on ICH9 GPIO.
<31> KSO8 KSO8/ACK#
<31> KSO9 45 KSO9/BUSY
<31> KSO10 46 KSO10/PE
<31> KSO11 51 KSO11/ERR#
<31> KSO12 52 KSO12/SLCT GPH0/ID0 93 PM_CLKRUN# <22>
53 94 1 T3010
<31> KSO13 KSO13 GPH1/ID1
54 95 CAP_ACK# 1 T3046
<31> KSO14 KSO14 GPH2/ID2
55 96 BAT_LEARN 1 T3055
<31> KSO15 KSO15 GPH3/ID3
56 97 1 T3009
<22> PM_PWRBTN# KSO16/GPC3 GPH4/ID4
<37> OP_SD# 57 KSO17/GPC5 GPH5/ID5 98 NUM_LED# <56>
GPH6/ID6 99 CAP_LED# <56>
EC_XIN 128
EC_XOUT CK32K NV_OVERT# R3058 1 @
2 CK32KE ADC0/GPI0 66 2 0Ohm VGA_THERM_ALERT# <74>
ADC1/GPI1 67 SUS_PWRGD <22,81,92>
PS/2

T3027 1 85 68
PS2CLK0/GPF0 ADC2/GPI2 ALL_SYSTEM_PWRGD <92>
T3030 1 86 69
PS2DAT0/GPF1 ADC3/GPI3 VRM_PWRGD <32,80,92>
T3032 1 MARATHON# 87 70
PS2CLK1/GPF2 ADC4/GPI4 PWR_MON <80>
T3033 1 DISTP# 88 71 ALS_AD 1 T3045
PS2DAT1/GPF3 ADC5/GPI5 KB_ID0 1 T3035
<31> TP_CLK 89 PS2CLK2/GPF4 ADC6/GPI6 72
90 73 KB_ID1 1 T3036
<31> TP_DAT PS2DAT2/GPF5 ADC7/GPI7

B <60> SMB0_CLK 110 SMCLK0/GPB3 DAC0/GPJ0 76 EC_CLK_EN <22> B


SMBus

Battery <60> SMB0_DAT 111 SMDAT0/GPB4 DAC1/GPJ1 77 PM_PWROK <11,22>


<24,50,74> SMB1_CLK 115 SMCLK1/GPC1 DAC2/GPJ2 78 VSET_EC <88>
Thermal sensor <24,50,74> SMB1_DAT 116 SMDAT1/GPC2 DAC3/GPJ3 79 ISET_EC <88>
AVSS

TP_LED T3013
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7

<3> THRO_CPU 117 SMCLK2/GPF6 DAC4/GPJ4 80 1


T3031 1 118 81 1 T3044
SMDAT2/GPF7 DAC5/GPJ5
IT8512E-L
1
12
27
49
91
113
122
75

GND EC_AGND
2

R3011 for IT8512BX & IT8512CX For X'tal Note: For EC Hardware Strap For iAMT pin name
1

R3011 C3009 C3008 C3009 & C3008 for IT8512DX


@ Cload=12.5PF
0Ohm 1UF/10V 0.1UF/10V I/O Base Address AC_PRESENT
place close to EC
2

R3046 PM_S4_STATE#
1

10MOhm Note: It can be programmable by EC fireware S4_STATE_ON


EC_XIN 2 @ 1 EC_XOUT PM_SLP_M#
Share Memory SLP_M_ON

2
GND EC_WLAN_PWR
X3001 SL3011 Note: It can be programmable by EC fireware. MP_PWRGD
+3VA_SPI 32.768Khz R0603 AC_PRESENT
+3VA_SPI R0603 +/-20ppm/12.5PF PP Enable LAN_WOL_EN
SL3003 1 2 1 4 +3VM_PG
+3VA_EC

1
A Note: Default Int. Pull-Low +1.5VM_+3VMCLK_PG A
2

SUSPWR_ACK
1

R3053 R3043 C3019

3
2

2
3.3KOhm 3.3KOhm 0.1UF/16V
C3016 C3017
2

15PF/50V 15PF/50V
1

1
U3003
SCE#
SO 1 2 SO_ROM
1
2
CE# VDD 8
7 ROM_HD#
Title : EC_IT8512
ROM_WP# SO HOLD# SCK
3 WP# SCK 6
SI PEGATRON COMPUTER INC Engineer: Zack Kuo
SL3007 R0603 4 5
VSS SI
SST25VF080B
GND Size Project Name
F83Vf Rev
Custom P/N 1.1
(8Mb) <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 30 of 100
5 4 3 2 1
5 4 3 2 1

D D

Close to keyboard connect

D3101
KSO2 4 3 KSO0

KSO5 5 2
For Keyboard KSO7
GND
KSO15
6 1

@ PACDN045YB6
KSO15 1 33PF/50V2 CN3105A
J3101 D3102 KSO0 3 33PF/50V4 CN3105B
KSO10 4 3 KSO8 KSO7 5 33PF/50V6 CN3105C
KSO5 7 CN3105D
GND 33PF/50V8
25 KSO11 5 2
SIDE1 KSO14
GND
KSO11 CN3104A
24 24 KSO14 <30> 1 33PF/50V2
23 KSO9 KSO6 6 1 KSO4 KSO10 3 33PF/50V4 CN3104B
23 KSO9 <30>
22 KSO3 KSO12 5 33PF/50V6 CN3104C
22 KSO3 <30>
21 KSO1 PACDN045YB6 KSI3 7 CN3104D
21 KSO1 <30> 33PF/50V8
20 KSO13 @
20 KSO13 <30>
19 KSI5 KSI0 1 33PF/50V2 CN3112A
19 KSI5 <30>
18 KSI1 D3103 KSI2 3 33PF/50V4 CN3112B
18 KSI1 <30>
17 KSI7 KSI4 4 3 KSI3 KSI4 5 33PF/50V6 CN3112C
17 KSI7 <30>
16 KSI6 KSI6 7 33PF/50V8 CN3112D
16 KSI6 <30>
15 KSI4 KSI2 5 2
15 KSI4 <30> GND
14 KSI2 KSO1 1 33PF/50V2 CN3108A
14 KSI2 <30>
13 KSI0 KSI0 6 1 KSO12 KSO3 3 33PF/50V4 CN3108B
13 KSI0 <30>
12 KSI3 KSO9 5 33PF/50V6 CN3108C
12 KSI3 <30>
11 KSO12 PACDN045YB6 KSO14 7 CN3108D
11 KSO12 <30> 33PF/50V8
10 KSO10 @
10 KSO10 <30>
9 KSO11 KSO2 1 33PF/50V2 CN3101A
9 KSO11 <30>
8 KSO6 D3104 KSO4 3 33PF/50V4 CN3101B
8 KSO6 <30>
7 KSO8 KSO13 4 3 KSI7 KSO8 5 33PF/50V6 CN3101C
7 KSO8 <30>
6 KSO4 KSO6 7 CN3101D
6 KSO4 <30> 33PF/50V8
5 KSO2 KSI5 5 2
5 KSO2 <30> GND
C 4 KSO5 KSI7 1 33PF/50V2 CN3114A C
4 KSO5 <30>
3 KSO7 KSI1 6 1 KSI6 KSI1 3 33PF/50V4 CN3114B
3 KSO7 <30>
2 KSO0 KSI5 5 33PF/50V6 CN3114C
2 KSO0 <30>
1 KSO15 PACDN045YB6 KSO13 7 CN3114D
1 KSO15 <30> 33PF/50V8
26 @
SIDE2
GND

D3105
FPC_CON_24P GND KSO14 4 3 KSO1

P/N:12G182002408 KSO9 5 GND 2 Reserve for EMI


KSO3 6 1
T53 KB MATRIX
PACDN045YB6
@

TEST
Reserve for EMS
GND

SWX3101
5 6 SL3101
1 2 1 2 PWR_SW#
PWR_SW# <30,55>
R0603
3 4

TP_SWITCH_4P

B B
+5V LEDX3301
SL3102
RX3302 2 1 330Ohm 1 + 2 1 2 PWR_LED#
PWR_LED# <30,56>
R0603
BLUE

Touch-Pad
P/N:12G183301208
+5VS +5VS_TP +5VS_TP
L3101 J3103
120Ohm/100Mhz 1 14
1 SIDE2
1 2 2 2
3 SW3101 SW3102
<30> TP_DAT 3
1

C3108 4 3 4 LEFT 3 4 RIGHT


0.1UF/10V 4
<30> TP_CLK 5 5

1
6 C3104
2

6
1

7 1 2 C3103 1 2 100PF
7 100PF c0402
8 5 6 5 6

2
LEFT 8 c0402 @
GND 9
2

9 @
GND 10 10 TP_SWITCH_4P TP_SWITCH_4P
C3105 11
RIGHT 11
1 2 12 12 SIDE1 13 GND GND GND
A GND GND GND A
0.1UF/16V @ FPC_CON_12P
U3102
SPRING_SQ37
P/N:12G091031041 P/N:12G091031041
C3109
1

1 2 @ C3106 C3107
1

100PF 100PF GND


0.1UF/16V @ c0402 c0402
1

@ @

TP_GND GND

GNDGND
Title : EC_IT8512 (2/2)
TP_GND PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 31 of 100
5 4 3 2 1
5 4 3 2 1

D D

+3VA_EC

1
R3204
100KOhm

2
+3VA_EC

2
D3202
1SS355

1
SL3201 1 2 R0603 EC_RST# <30>
+3VS

U3201 @ +3VA_EC

1
5 CD OUT 1
R3203 2
VDD

3
100KOhm 3 4 3
D NC GND

1
D3201 @ Q3202 C3201 C3202
1SS355 2N7002 4.7UF/10V RN5VD30CA 0.1UF/10V

2
<30,80,92> VRM_PWRGD 2 1 11 @ @

2
@ G
3 2 S

2
C Q3201
2 1 1 B PMBS3904
<3,5,11,20> H_THRMTRIP#
@ @
C R3201 E C
330Ohm 2

B B

A A

Title : EC_RESET
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 32 of 100
5 4 3 2 1
5 4 3 2 1

+3VS +3VS <3,7,8,11,14,15,22,23,24,29,30,32,36,40,41,44,45,46,48,50,51,53,56,57,70,72,74,80,91,92>

+3VSUS +3VSUS <20,21,22,23,24,30,37,45,53,56,91,92>

GND <3,4,5,7,8,9,10,11,13,14,15,20,21,22,23,29,30,31,32,34,36,37,38,40,41,44,45,46,48,50,51,52,53,55,56,57,60,61,63,68,70,72,73,74,75,76,77,80,81,82,83,84,85,88,91,92>

D D
LAN_GND <34>

LAN_GND

SL3304
+AVDDL 1 2 1 R3325 2 +AVDD_VCO1
0Ohm @

1
R0805
C3337
0.1UF/16V @

2
L3304
1 2 +1.7_Pin1
+AVDD_VCO2
1

1
C3336 4.7UH ground pad要打散熱孔
C3345 R3322 C3347
0.1UF/16V 10UF/6.3V 10KOhm SL3305 0.1UF/16V With overclock:Remove SL3304, Add R3325
PCIE_TXN6_C <21>
2

2
PCIE_TXP6_C <21> 1 2

2
+AVDD_CEN_LAN Not overclock:Add SL3304, Remove R3325
R0805
CLK_PCIE_LAN <29>
CLK_PCIE_LAN# <29>

+AVDDL
PCIE_RXP6_LAN <21>

+AVDD_VCO2
SL3302
PCIE_RXN6_LAN <21>
+1.7_Pin6 C3343

+DVDDL
+DVDDL
1 2

1
1
0.1UF/16V
1

RXN
RXP
C R0805 C3342 C
C3340

2
2
0.1UF/16V 0.1UF/16V
2

PCIE Tx,Rx方向是以南橋為觀點
+2.5_Pin5

49
48
47
46
45
44
43
42
41
40
39
38
37

1
U3303A Chip pin Tx,Rx是以chip為觀點
C3329

RX_P

REFCLKP

TX_P
GND
LED_10_100n
LED_ACTn
DVDD_REG2
DVDD_REG1

AVDDL4

AVDDL3
RX_N

REFCLKN

TX_N
0.1UF/16V

2
+3V_LAN +1.7_Pin1 1 36 +AVDDL
LX AVDDL2
2 VDD3V1 NOCONN 35
3 34 +3V_LAN SL3303
PERSTn TESTMODE VDD_+2.5V
<22,44,53> PCIE_WAKE# 4 WAKEn SMDATA 33 1 2

1
+2.5_Pin5 5 32 +DVDDL
+1.7_Pin6 VDD3V2 DVDDL2 R3301 R0805
6 VDD17 SMCLK 31
SEL_25M 7 30 4.7KOhm
+AVDDL SEL_25MHz TWSI_DATA @
8 VDD11_REG TWSI_CLK 29
2

X1_LAN 9 28 +DVDDL

2
XTLO DVDDL1
1

R3328 @ C3332 C3331 X2_LAN 10 27 CLK_REQ_LAN


4.7KOhm +AVDD_VCO1 11 XTLI CLKREQn
AVDD_REG NC5 26
1UF/10V 0.1UF/16V RBIAS 12 25 VDD_+2.5V
2

RBIAS AVDDH2

AVDDH1

AVDDL1
VDDHO
TRXN0

TRXN1
AVVDL
TRXP0

TRXP1
1

NC1
NC2

NC3
NC4
R3321
2.37KOHM
1% AR8132-AL1E AR8121: Remove R3313
13
14
VDD_+2.5V 15
16
17
18
VDD_+2.5V 19
20
21
22
23
24
R3613
1

VDD_+2.5V
<21> PLT_RST# 1 2 AR8131: Remove R3314
@
+AVDDL

+AVDDL

SL3301 0Ohm
1 2 +3VSUS L3303 +3V_LAN
1 2
R0402
80Ohm/100Mhz

1
S 2

C3344 C3346 C3348 C3349 C3316


D

<5,11,21,30,41,53,70> BUF_PLT_RST# 2 3
3

C3338 C3339
2N7002 RN3301A 1UF/10V 0.1UF/16V 1UF/10V 0.1UF/16V 0.1UF/16V
G

1 49.9OHM2 10UF/6.3V 10UF/6.3V

2
1

Q3301 @ 3 RN3301B 2 C3324 0.1UF/16V @


49.9OHM4 1
1

B B
5 RN3301C
49.9OHM6
7 RN3301D 2 C3325 0.1UF/16V
<34> L_TRDP0 49.9OHM8 1
+3V
<34> L_TRDN0 C3301 C3302 C3303 C3304 close to pin2
<34> L_TRDP1
<34> L_TRDN1

+AVDDL
+DVDDL
61
60
59

U3303B
Close to U3301

1
C3320 @ C3319 C3321 C3322 C3323 C3327 C3328 C3330
GND12
GND11
GND10

0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V 0.1UF/16V

2
50 GND1 GND9 58
51 GND2 GND8 57
52 GND3 GND7 56
GND4
GND5
GND6

AR8132-AL1E
53
54
55

C3341
X2_LAN 2 1EXT_25/48 1 T3300
@
10PF/50V
X3302
For AR8131 : Remove R3309 X1_LAN 1 2 AR8121:Remove C3328
A R3316 0Ohm 25Mhz AR8131/25MHz: Remove C3328 A
1

+1.7_Pin6 1 2 VDD_+2.5V C3335 C3334


@
27PF/50V 27PF/50V
2

Title : Atheros 8132


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 33 of 100
5 4 3 2 1
5 4 3 2 1

LAN / MODEM PORT


J3402
GND2 20
P_GROUND2 16
L_TRLM3 8 18
L_TRLP3 TRLM3 NP_NC2
7 TRLP3
L_TRLM1 6
L_TRLM2 RXN
5 TRLM2
L_TRLP2 4
L_TRLP1 TRLP2
3 RXP
L_TRLM0 2
L_TRLP0 TXN
D
1 TXP D

13 RING2
12 RING1
11 TIP2
10 TIP1
NP_NC1 17
P_GROUND1 15
D3401 @ 19
GND1
LTRLP1 6 1 LTRLM1 MODULAR_JACK_12P

SL3401A
+3V_LAN U3401 LTRLM0 1 2 L_TRLM0
LTRLP1 0603
<33> L_TRDP1 1 RD+ RX+ 16
5 2 2 15 LTRLM1
<33> L_TRDN1 RD- RX-

3
3 14 L_CMT1
RDCT RXCT L3401
LAN_GND 6 11 L_CMT0 200Ohm/100MHz
PTCT/TDCTTXCT LTRLP0
<33> L_TRDP0 7 10 @

2
LTRLP0 LTRLM0 TD+ TX+ LTRLM0
4 3 <33> L_TRDN0 8 TD- TX- 9
LTRLP0 3 4 L_TRLP0
0603
4 NC1 NC3 12
IP4220CZ6 5 13 SL3401B
NC2 NC4 SL3402A
LFE8423 LTRLP1 1 2 L_TRLP1
0603

3
L3402
200Ohm/100MHz
@

2
LTRLM1 3 4 L_TRLM1
RNX3403C 0603
C3405 L_CMT0 5 SL3402B
C
75Ohm 6 C
1 2 +AVDD_CEN_LAN L_CMT1 7 75Ohm 8
0.1UF/16V @ RNX3403D
C3406 L_TRLM3 RNX3403B
1 2 L_TRLP3 3 75Ohm 4
L_TRLM2 1 75Ohm 2
0.1UF/16V @ L_TRLP2
RNX3403A

2
C3401 C3402
LAN_GND

1
0.1UF/16V 0.1UF/16V

1
C3411 C3412
1500PF/2KV 1500PF/2KV

2
@

LAN_GND LAN_GND

B B

A A

Title : RJ45
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 34 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : <Title>
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 35 of 100
5 4 3 2 1
5 4 3 2 1

+5VS_AMP +5VS
D L3601 D

2 1
+5VS_AUDIO
120Ohm/100Mhz R3602

1
C3602 C3603 C3604 150KOhm
10UF/10V 1UF/10V 0.1UF/16V 1 1% 2
c0805 c0603

2
+5VS

U3602 R3603
3 4 49.9KOhm
EN ADJ/BYP 1%

1
GND 2 GND

1
C3605 GND_AUDIO
1UF/10V 1 5
+5VS_AMP VIN VOUT
GND

2
EUP7915VIR1

1
06G007498010
H_SPKR+ GND GND C3606
H_SPKR+ <37>
H_SPKR- Vout=1.215*(1+(150K/49.9K)= 4.86V 2.2UF/6.3V
H_SPKR- <37>

2
H_SPKL-
H_SPKL- <37>
H_SPKL+
<37> EAPD H_SPKL+ <37>
R3604 1 2 0Ohm
+5VS_AUDIO @
GND_AUDIO
R3614 0Ohm

1
1 2 C3607 C3608 GND GND_AUDIO
+3VS Digital <74> SPDIF_VGA
@ 1UF/10V 0.1UF/16V
c0402

2
GND_AUDIO GND_AUDIO
1

49
48
47
46
45
44
43
42
41
40
39
38
37
C3601 C3609 C3610 U3601A
0.1UF/16V 0.1UF/16V 10UF/10V

SPK_OUT_R+

SPK_OUT_L+
SPDIFO
EAPD/SPDIFO2
PVDD2

PVSS2
PVSS1
GND

SPK_OUT_R-

SPK_OUT_L-

PVDD1
AVDD2
AVSS2
2

c0402 c0402 c0805


@
C C
@ Place R422 near U402 C3611
GND 1 36 1 2 2.2UF/6.3V
DVDD CBP
2 GPIO0/DMIC_DATA CBN 35
3 GPIO1/DMIC_CLK CPVEE 34
Internal pull high 50K 4 33 AC_HP_R
<37> PD# PD# HPOUT_R AC_HP_R <37>
5 32 AC_HP_L
<20> ACZ_SDOUT_AUD SDATA_OUT HPOUT_L AC_HP_L <37>
ACZ_BCLK_AUD 6 31
<20> ACZ_BCLK_AUD BCLK CPVREF
7 DVSS MIC1_VREFO_R 30
<20> ACZ_SDIN0_AUD 1 R3605 2 8 SDATA_IN MIC2_VREFO 29 MIC_VREFOUT <38>
1

C3612 33Ohm 9 28
DVDD_IO MIC1_VREFO_L MIC1_VREFOUT_L <38>
22PF/50V 10 27 VREF_CODEC +5VS_AUDIO
<20> ACZ_SYNC_AUD SYNC VREF
5% T3603

MONO_OUT
SL3601 <20,37> ACZ_RST#_AUD 11 26
2

@ PC_BEEP RESET# AVSS1


12 PCBEEP AVDD1 25

LINE2_R

LINE1_R
LINE2_L

LINE1_L
MIC2_R

MIC1_R
MIC2_L

MIC1_L
SenseA

SenseB
2 1

JDREF
GND

1
R0603 C3614 GND C3615 C3616 C3617 C3618 C3619
<22> SB_SPKR 1 2 1 2PC_BEEP_C 2 1 ALC269Q-GR 2.2UF/6.3V 2.2UF/6.3V 2.2UF/6.3V 1UF/10V 0.1UF/16V
13
14
15
16
17
18
19
20
21
22
23
24

2
R3606 c0603 @ c0402
C3613 47KOhm 0.1UF/16V
1

0.1UF/16V
1

c0402 R3607
@ 4.7KOhm C3620 GND_AUDIO
r0402 100PF/50V
2

c0603
2

1 1% 2
<38> MIC1_JD
R3601 20KOhm
@ 2 1% 1
<37> LINE2_JD
GND R3608 39.2KOhm
U3601B
50 GND1
51 GND2
2 1 MIC_IN_AC_I_L 52
<38> MIC_IN_AC_I GND3
C3621 1UF/10V 53
MIC_IN_AC_I_R GND4
C3622
2 1
1UF/10V
54
55
GND5 For EMI
GND6 R3609
B
56 GND7 1 2 0Ohm B
57 @ r0402
GND8
58 GND9
GND_AUDIO R3610 1 1% 2 20KOhm
ALC269Q-GR R3611 1 2 0Ohm
T3601 @ r0402
GND_AUDIO
SL3602
2 1 MIC_IN_AC_E_L
<38> MIC_IN_AC_E
C3623 4.7UF/6.3V 2 1
2 1 MIC_IN_AC_E_R
C3624 4.7UF/6.3V
R0603
L3602 1 2 120Ohm/100Mhz

GND GND_AUDIO

A A

Title : AUDIO
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 36 of 100
5 4 3 2 1
5 4 3 2 1

D D

+3VSUS +12V

2
2
@ R3702
2 1 R3701 2.2MOhm
<36> EAPD
D3701 1N4148W 100KOhm @ C3701 @
r0402 2 1

1
@ J3701

1
1 R3703 2 MUTE_POP# SL3702 1UF/10V
NC2 6
0Ohm @ H_SPKR+ 1 2 H_SPKR+_CON 4
<36> H_SPKR+ 4

3
D3702 H_SPKR- H_SPKR-_CON 3
<36> H_SPKR- 3
1 R0603 2
<30> OP_SD# 2

1
3 5 Q3701B SL3703 C3703 C3704 1 1

1
2 UM6K1N 1 2 100PF 100PF 5

4
NC1

6
@ C3702 c0402 c0402

2
BAT54WAPT Q3701A 0.1UF/10V R0603 @ @ WtoB_CON_4P

2
R3704 1 2 10KOhm MUTE_POP#_AMP 2 UM6K1N @ C3705 @
<20,36> ACZ_RST#_AUD
@ @ 2 1 GND GND P/N: 12G171000047

1
SL3701 SL3704 1UF/10V GND
1 2 H_SPKL+ 1 2 H_SPKL+_CON
<36> H_SPKL+
GND H_SPKL- H_SPKL-_CON
<36> H_SPKL-
R0603 R0603
D3703

1
SL3705 C3706 C3707
1 1 2 100PF 100PF
3 PD# c0402 c0402
PD# <36>

2
JACK_IN# 2 R0603 @ @

GND GND
BAT54WAPT
@

C C

SL3706
1 2

R0603

<36> AC_HP_L 1 6 AC_HP_L_0 3 4


Q3702A Q3702B
UM6K1N UM6K1N
@ @
2

R3705 68Ohm SL3710 R0603


AC_HP_L_1 1 2 AC_HP_L_3 1 2 AC_HP_L_CON
MUTE_POP#
AC_HP_R_1 1 2 AC_HP_R_3 1 2 AC_HP_R_CON NO SPDIF function FOR EMI
R3706 68Ohm
SL3711 R0603

1
C3708 C3709 SL3708 R0603
HP- JACK
2

100PF 100PF 1 2
c0402 c0402

2
1 6 AC_HP_R_0 3 4 @ @ SL37091 2 R0402
<36> AC_HP_R
GND_JACK
UM6K1N UM6K1N J3702
Q3703A Q3703B 7 NP_NC1
@ @ GND_JACK 1 GND GND_JACK
SL3707 +5VS_AMP 2
B B
1 2 6 R3712 1 2 0Ohm
3 r0402
<36> LINE2_JD
2

R0603 4 @
R3707 5 R3713 1 2 0Ohm
100KOhm 8
3

NP_NC2
3 r0402 r0402
D
Q3704 PHONE_JACK_6P @
1

2N7002
11 LINE2_JD_D P/N: 12G140001067 GND_JACK GND_AUDIO
G GND_JACK
S 2
Normal Close
2

C3714
GND 1000PF/50V
2

JACK_IN# GND_JACK

3
C
Q3705 B 1
PMBS3904
@ E
2

GND

A A

Title : AUDIO
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 37 of 100
5 4 3 2 1
5 4 3 2 1

D D

Internal MIC Pre-Amplifier


<36> MIC_VREFOUT

1
C3802
10UF/10V

2
c0805
R3802
2.2K
C3801 @ GND_AUDIO
1 2
c0402 33PF/50V

J3801
3 MIC_INT_P
SIDE1 MIC_IN_AC_I <36>
1 SL3801 R0603
1 MIC_INT_N
2 2 1 2
SIDE2 4

1
WtoB_CON_2P C3803 C3804
470PF/50V 470PF/50V

2
P/N:12G17100002D @ @

GND GND GND GND_AUDIO

C C

<36> MIC1_VREFOUT_L
1

C3805
2

10UF/10V
2

c0805 R3801
4.7KOhm

GND_AUDIO
1

SL3802 R0603
<36> MIC_IN_AC_E 1 2

1
C3806
100PF/50V GND_JACK J3802
7 NP_NC1

2
1
2
6
3
GND_JACK 4
5
B
8 NP_NC2 B
+5VS_AUDIO
PHONE_JACK_6P

GND_JACK
2

<36> MIC1_JD P/N: 12G140001067


R3803
100KOhm
r0402
1

C3807 3 Q3801
D
1

10PF/50V
@ 2N7002
2

11
G
S 2
2

GND

GND

A A

Title : AUDIO
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 38 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : <Title>
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 39 of 100
5 4 3 2 1
5 4 3 2 1

0304 for card reader chip via

+3VS +3V_IO_CR

1
SL4008
2
CARD READER CONNECTOR
R0603

1
C4003 C4004 C4007

10

9
2.2UF/6.3V 0.1UF/16V 0.1UF/16V J4001

2
D D
@ @ @ 1 8

dummy1

dummy2
R4022 NP_NC2 dummy3
SD_D2_SDcon 1 0 2 S9 X1 CTRL1 and AU6433_XD_CLE trace length
@ DATA3 DAT2 GND1 XD_CD#
S1 CD/DAT3 CD X0 shorter , surround with GND.
GLF_SD_DATA2 CTRL2 S2 X2 CTRL2
CMD R/-B CTRL4
S3 VSS1 -RE X3
GND M10 X4 XDCEN SL4007
SL4005 VSS2 -CE AU6433_XD_CLE CTRL1
CF_V33 M9 VCC1 CLE X5 1 2
CTRL1 1 2 AU6433_MS_CLK M8 X6 CTRL0
DATA3 SCLK ALE CTRL3 R0402
M7 Reserved1 -WE X7

1
R0402 CTRL4 M6 X8 XDWPN
INS -WP

1
DATA2 M5 X9 C4027
C4021 DATA0 Reserved2 GND2 DATA0
M4 X10 10PF/50V

2
SDIO D0

1
10PF/50V DATA1 M3 X11 DATA1

2
@ C4025 CTRL0 VCC2 D1 DATA2
M2 BS D2 X12
100PF/50V M1 X13 DATA3 GND GND

2
SL4006 GND @ VSS3 D3 DATA4
S4 VDD D4 X14
CTRL0 1 2 AU6433_SD_CLK S5 X15 DATA5
CLK D5 DATA6
S6 VSS4 D6 X16

1
R0402 DATA0 DATA7 CF_V33

COMMON
S7 DAT0 D7 X17

WP_SW
C4026

CD_SW
S8 DAT1 VCC3 X18

GND3
10PF/50V GND

2
For AU6433-GEF @ 2 NP_NC1 dummy4 7

1
CARD_READER_46P C4023 C4022 C4028 C4024

6
GND 0.1UF/16V 0.1UF/16V 2.2UF/6.3V @ 2.2UF/6.3V

2
@ @

SD_D1_SDcon R4020 1 0 2
@ GND GND GND GND
GLF_SD_DATA1
R4003 1 0 @ 2 SD_CD#
Q9201A
Only SD2 disconnect * R4016, R4018, R4020 and R4022 close to
C4022, C4023 close to Pin-- M9, X18
UM6K1N
IC side DATA2 6 1 SD_D2_SDcon J4001 as near as possible. CTRL1
C4024, C4028 close to J4001 Pin S4
@ CON side
C R4004 1 0 @ 2 GND C
2

Q4001B
UM6K1N
+12VS DATA1 3 4 SD_D1_SDcon
@
Only SD1 disconnect
5

R4025 1 @ 2 100K
3

3
D
Fix MS Duo Adaptor short issue.
Q4002 (SD_DAT1,SD_DAT2,XD_GND short,XD_CD# may be
SD_CD# 11 possible short)
G 2N7002
2 S @
2
1

C4015
100PF/50V
2

GND GND

0304 for card reader chip via

U4001B
1

30 GND1 GND8 37
C4008 31 36
5PF/50V GND2 GND7
32 35
2

@ GND3 GND6
48MHZ can provide by Clock GEN. 33 GND4 GND5 34

logic 1 or open on pad1->oscillator output AU6433D53-GLF-GR


B B
GND

GND GND CTRL0->SDCLK/XDALE/MSBS


OSC4001 +3V_IO_CR
1 E/D VDD 4
SL4001
CTRL1->SDWP/XDCLE/MSCLK
2 3
<22,29> CLK_USB48 1 2 U4001A CTRL2->SDCMD/XDRBN
GND OUTPUT R0402
48Mhz 29
CTRL3->SDCDN/XDWRN
GND GND
SL4002
GND CLK_48M_CARDREADER R4006 1 0 @ 2 EXT48IN EXT48IN 1 28 SDDATA1 1 2 GLF_SD_DATA1
CTRL4->XDRDN/MSINS
@ EXT48IN SDDATA1
R4008 1 2 0 CHIPRESETN CTRL1 R0402
R4001
2 CHIPRESETN CTRL1 27
SL4003
XDCDN->XDCDN
+3V_IO_CR
REXT CTRL3 SD_CD#
@ GND 1 2 3 REXT CTRL3 26 1 2 XDCEN->XDCEN
1

330OHM
CHIPRESETN should keep C4006 DATA1 R0402
0.47UF/16V
+3V_IO_CR 4 VD33P DATA1 25 SDDATA2->SDDATA2/xD CIS check is disable
low(< 0.8V) for 2ms ~ AU6433 GEF /GLF colay.
2

USBPP7 DATA0
5 DP DATA0 24 XDWPN->XDWPN
1

10ms after:
C4005 USBPN7 6 23 DATA7
GND 0.1UF/16V DM DATA7
1. 3.3V stable ADDATA1->SDDATA1 Option 1:AU6433-GEF
2

7 22 DATA6 Use AU6433-GEF


2. Clock stable GND VS33P DATA6 If use GEF package need:
CTRL0 1:For check(Default)
+1.8V_IO_CR 8 VDDU CTRL0 21
0:For no check DATA0->SDDATA0/XDDATA0/MSDATA0
DATA5 unmount-> R4016,R4018
CF_V33 9 CF_V33 DATA5 20 DATA1->XDDATA1/MSDATA1 mount->R4017,R4020,R4022,R4025,Q4001,Q4002.
CTRL2 SDDATA2 R4017 1 0
+3V_IO_CR 10 V33 CTRL2 19
@
2 +3V_IO_CR DATA2->XDDATA2/MSDATA2
CTRL4 DATA4
11 CTRL4 DATA4 18 DATA3->SDDATA3/XDDATA3/MSDATA3
1

XD_CD# DATA3 R4015 1 0 Option 2:AU6433-GLF


C4029 C4002
12 XDCDN DATA3 17
@
2 GND DATA4->SDDATA4/XDDATA4/MSDATA4
0.1UF/16V XDCEN DATA2 If use GLF package need:
2.2UF/6.3V 13 16 DATA5->SDDATA5/XDDATA5/MSDATA5
2

XDCEN DATA2
unmount->
SDDATA2 XDWPN SL4004
A 14 SDDATA2 XDWPN 15
1 2 GLF_SD_DATA2
DATA6->SDDATA6/XDDATA6/MSDATA6 R4017,R4020,R4022,R4025,Q4001,Q4002. A

DATA7->SDDATA7/XDDATA7/MSDATA7 mount->R4016,R4018
3 4 GND GND AU6433D53-GLF-GR R0402
0Ohm
RNX4001B USBPN7
<21> USB_PN7 AU6433-GLF :020K-000B000
1

LX4001
90Ohm/100Mhz
@ AU6433-GEF :020K-0005000
4

<21> USB_PP7
RNX4001A
USBPP7
Title : Card Reader AU8433
1 0Ohm 2 PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 40 of 100
5 4 3 2 1
5 4 3 2 1

U4101
+3V 17 15 +3V_NW
AUXIN AUXOUT
+3VS 2 3.3VIN 3.3VOUT 3 +3VS_NW
4 NC1 NC2 5
+1.5VS 12 1.5VIN 1.5VOUT 11 +1.5VS_NW
14 NC4 NC3 13
SL4102
<30,57,91,92> SUSB_EC# 1 2
20 8 1 2 PE_RST#
SHDN# PERST# PE_RST# <44>
R0402 1 10 1KOhm R4101 CP_PE#
STBY# CPPE# CP_PE# <44>
6 9 CP_USB#
<5,11,21,30,33,53,70> BUF_PLT_RST# SYSRST# CPUSB#
19 T4104 CLK_NEWCARD_REQ#
D OC# CLK_NEWCARD_REQ# <29,44> D

3
16 21 3 Q4105
NC5 GND2 D
7 18 2N7002
GND1 RCLKEN @
W83L351YG REFCLK_EN 11
G
2 S

2
GND
GND

SL4101A
1 2
0603
<21> USB_PP6 USB_P6+
4

LX4101
90Ohm/100Mhz
@
NewCard
Header
1

<21> USB_PN6 USB_P6-

3 4 D4101 J4101
0603
1 GND1
SL4101B 1 6 USB_P6- 2 29
USB_P6+ USB_D- GND5
3 USB_D+ NP_NC1 27
CP_USB# 4 CPUSB#
<44> LPC_FRAME#_DBCARD 5 RESERVED1
6 RESERVED2
2 5 <44> SMB_CLK_R 7 SMBCLK
<44> SMB_DAT_R 8 SMBDATA
+1.5VS_NW 9 +1.5V_1
10 +1.5V_2
<44> WAKE#_R 11 WAKE#
3 4 +3V_NW 12 +3.3VAUX
C PE_RST# 13 C
PERST#
+3VS_NW 14 +3.3V_1
IP4220CZ6 15
@ +3.3V_2
<44> CLKREQ#_R 16 CLKREQ#
<44> CP_PE#_R 17 CPPE#
<29> CLK_PCIE_NEWCARD# 18 REFCLK-
<29> CLK_PCIE_NEWCARD 19 REFCLK+
20 GND2
<21> PCIE_RXN3_NEWCARD 21 PERn0
<21> PCIE_RXP3_NEWCARD 22 PERp0
3.0V~3.6V 23 GND3
<21> PCIE_TXN3_C 24 28
+3VS +3VS_NW Ave= 1000mA 25
PETn0 NP_NC2
30
<21> PCIE_TXP3_C PETp0 GND6
Max= 1300 mA 26 GND4
EXPRESS_CARD_26P
1

C4105 C4103 C4107 P/N:12G161300261 GND


C4101 0.1UF/16V 10UF/10V 0.1UF/16V
4.7UF/6.3V @ @
2

1.35V~1.65V
+1.5VS +1.5VS_NW Ave= 500 mA
Max= 650 mA
NewCard Ejecter
1

C4106 C4104 C4108


C4102 0.1UF/16V 10UF/10V 0.1UF/16V J4102
2.2UF/6.3V @ @ 1
2

P_GND1
P_GND2 2

CARD_EJECTOR_2P
3.0V~3.6V @

+3V +3V_NW Ave= 200mA


B
Max= 275 mA B
1

C4110 C4109
1UF/10V 0.1UF/16V
@
2

A A

Title : CB_NEWCARD
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 41 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 42 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 43 of 100
5 4 3 2 1
5 4 3 2 1

D D

For NewCard Debug Card

LPC Debug Port

/NODEBUG
Block C 1 2 RN4401A
0OHM
/NODEBUG 5 6 RN4401C
0OHM
/NODEBUG 3 4 RN4401B
0OHM
/NODEBUG 7 8 RN4401D
0OHM
/NODEBUG R4405 1 2 0Ohm

U4401
<29> CLK_DBGPCI2 3 2 CP_PE#_R <41>
<20,30> LPC_AD3
<20,30> LPC_AD0
<20,30> LPC_AD1
7
11
17
A0
A1
A2
C0
C1
C2
6
10
16
CLKREQ#_R <41>
WAKE#_R <41>
SMB_CLK_R <41>
Block A
A3 C3
<20,30> LPC_AD2 21 A4 C4 20 SMB_DAT_R <41>

<41> CP_PE# 4 B0 D0 5
C <29,41> CLK_NEWCARD_REQ# 8 B1 D1 9 C
<22,33,53> PCIE_WAKE# PCIE_WAKE#_DBG 14 15
B2 D2
<7,8,24,29,53> SMB_CLK_S 18 B3 D3 19
<7,8,24,29,53> SMB_DAT_S 22 B4 D4 23
+5V

1 BE# VCC 24
+3V_NW PE_DEBUGEN# 13 12
BX GND

1
C4401
Q4402 SN74CBT3383PWR 0.1UF/16V
11

2N7002

2
+3V /DEBUG
G

PCIE_WAKE# 3 2 PCIE_WAKE#_DBG FPC_CON_12P


3

S 2
D

12 12 SIDE1 13
LPC_AD0 11
+3VS 11
10 10
LPC_AD1 9 9
8 8
1

LPC_AD2 7
R4404 7
6 6
100KOhm LPC_AD3 5
+3VS 5
4 4
U4402 LPC_FRAME# 3
2

PE_DEBUGEN# 3
1 OE# VCC 5 2 2
<20,30> LPC_FRAME# 2 A <29> CLK_DEBUG 1 1 SIDE2 14
C4402 D4401 R4402 3 3 4
GND Y LPC_FRAME#_DBCARD <41>

1
2200PF/50V 1SS355 47KOhm C Q4401 C3101 J4401
1 2 1 2 1 2 1 B PMBS3904 74LVC1G125GV 10PF/50V GND
<41> PE_RST#
@
Bottom

2
1

E
1

R4401
10KOhm
C4403
0.1UF/16V
R4403
47KOhm
2
Contact
GND GND
2
2

If don't support NewCard Debug Card,Pls do


B (a) DNI all components of Block A B

(b) Mount Block C (RN4401,R4405)

A A

Title : DEBUG
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 44 of 100
5 4 3 2 1
5 4 3 2 1

LCD Power +3VS

SL4501A

1
C4502 C4503 1 2
+3VSUS +12VS 0603
D D
0.1UF/16V 0.01UF/16V

2
c0402 FOR EMI

2
USBPP4
<21> USB_PP4
R4501 R4502

3
100KOhm 100KOhm Q4501 GND GND
r0402 1 6 L4501 +3VS_LCD L4502
2 D 5 120Ohm/100Mhz 90Ohm/100Mhz

1
3 S 4 +3VSLCD 1 2 @

2
G USBPN4
<21> USB_PN4
SI3456BDV

1
C4501 C4504 C4505 C4506

1
2 5 0.1UF/25V 0.1UF/16V 10UF/10V 0.1UF/16V R4503 3 4
<74> LCD_PPEN_VGA

2
Q4502A
4502A Q4502B
4502B c0402 c0805 c0402 330Ohm 0603

1Q

4Q
UM6K1N UM6K1N SL4501B D4502 @ @ D4503

2
GND GND GND EGA10603V05A1 EGA10603V05A1

2
GND GND D4501
2
3
1 GND GND
GND BAT54C

3
R4504 Q4503 3
D
1MOhm 2N7002
@ @
1 2 11 +12VS
C4508
G
2 S

2
1
C4507
0.033UF/16V
@ 0.1UF/25V GND

2
GND @

GND
C C

BIOS Cable Requirement:


LCD_BACKOFF#:When user push "Fn+F7" +3VS LCD LVDS/Inverter/CCD conn. Impedence: 100 ohm +/- 10%
Length Mismatch <= 10 mils
button, BIOS active this pin to Twisted Pair(Not Ribbon)
turn off back light. Maximum Length <= 16"
1

J4501 C4511 100PF/50V


R4505 42 41 1 2 @ GND
100KOhm LVDS_L0N SIDE2 SIDE1 LVDS_L0P
<73> LVDS_L0N 40 40 39 39 LVDS_L0P <73>
r0402 38 37 LVDS_L1N C4509
38 37 LVDS_L1N <73>
D4504 LVDS_L1P 36 35 1 2 @ GND
<73> LVDS_L1P
2

LVDS_L2N 36 35 LVDS_L2P
<74> LCD_BLEN_VGA 1 <73> LVDS_L2N 34 34 33 33 LVDS_L2P <73>
3 32 31 LVDS_LCLKN 0.1UF/16V
C4510 @ 32 31 LVDS_LCLKN <73> +3VS_LCD
<30> LCD_BACKOFF# 2 <73> LVDS_LCLKP 30 30 29 29
1 2 EDID_CLK 28 27 EDID_DAT +3VS
GND <72,74> EDID_CLK 28 27 EDID_DAT <72,74>
BAT54WAPT 26 25 1 2
26 25 L4503 120Ohm/100Mhz
0.1UF/16V +3VS_LCD 24 24 23 23
+VIN_INV 22 21 +VIN_INV L4504
BL_EN_CON 22 21 BL_PWM_CON 120Ohm/100Mhz 1
20 20 19 19 2 LCD_BL_PWM <30>
2 1 18 17 LVDS_U0N
18 17 LVDS_U0N <73>
LVDS_U0P 16 15
<73> LVDS_U0P 16 15
D4506 LVDS_U1N 14 13 LVDS_U1P
<73> LVDS_U1N 14 13 LVDS_U1P <73>
1SS355 12 11 LVDS_U2N
12 11 LVDS_U2N <73> +5V
To EC Lid Switch LVDS_U2P 10 9
<73> LVDS_U2P 10 9
LVDS_UCLKN 8 7 LVDS_UCLKP
<73> LVDS_UCLKN 8 7 LVDS_UCLKP <73>
BL_EN L4506 2 1 BL_EN_CON 6 5 L4507 1 2 120Ohm/100Mhz
USBPN4 6 5 USBPP4
4 4 3 3
120Ohm/100Mhz 2 1
2 1

1
B B
C4513 WTOB_CON_40P
1

C4512 100PF/50V

1
100PF/50V @

2
@ GND P/N:12G171010405 SL4502
2

R0603
+3VA
GND

1
GND 120Ohm/100Mhz C4515 C4516
1

C4514 AC_BAT_SYS L4508 1 2 +VIN_INV 0.1UF/16V 10UF/10V

2
2

@ c0402 @

1
0.1UF/16V
2

R4506 C4517
49.9KOhm 1UF/25V

2
1% GND U4501 GND GND
1

1 GND
Vdd
GND 2
GND
LID_SW# 3
<30> LID_SW# OUTPUT
AH1802-WG-7
1

C4518
100PF/50V GND
@
2

GND

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 45 of 100
5 4 3 2 1
5 4 3 2 1

D PLACE ESD Diodes near connector 37.5 ohm 50 ohm D


JP4601
1 2 CRT_R_C L4601 1 2 47Ohm/100Mhz
<72> CRT_RED

2
+3VS SHORT_PIN @

1
RED_CON GREEN_CON R4601
150Ohm C4601 C4602
1% 10PF/50V 10PF/50V

2
c0402 c0402

1
VI/O

VBUS

VI/O
4

GND GND GND


D4601
IP4223-CZ6

JP4602
1 2 CRT_G_C L4602 1 2 47Ohm/100Mhz
<72> CRT_GREEN

2
SHORT_PIN @

1
R4604
150Ohm C4603 C4604
1% 10PF/50V 10PF/50V

2
c0402 c0402
VI/O
VI/O
3

1
GND

HSYNC BLUE_CON GND GND GND

GND
JP4603
1 2 CRT_B_C L4603 1 2 47Ohm/100Mhz J4601
<72> CRT_BLUE

2
SHORT_PIN @ 18 P_GND1

1
R4606 16
150Ohm C4605 C4606 NP_NC1
1% 10PF/50V 10PF/50V 6

2
c0402 c0402 11

1
C D4602 RED_CON 1 C
+3VS 2 7
3 VSYNC GND GND GND DDC2BD 12
1 2 GREEN_CON
8
BAV99 13 HSYNC
GND BLUE_CON 3
+3VS 9
VSYNC 14
4

2
10
SL4601 15 DDC2BC
R0805 5

U4601 NP_NC2
17

1
1 OE# VCC 5 19
2 33Ohm R4608 P_GND2
<72> CRT_VSYNC A VSYNC_CRT
3 GND Y 4 1 2 D_SUB_15P

2
74LVC1G125GV C4607
GND 47pF/50V
C0402 GND

1
GND

GND
12G10110915K
+5VS_HDMI_CRT U4602
D4603 1 OE# VCC 5
2 33Ohm R4609
<72> CRT_HSYNC A
1 2 3 4 HSYNC_CRT 1 2
+5VS GND Y

2
74LVC1G125GV C4608
1SS355 GND 47pF/50V
8

@ C0402

1
RN4601C
+3VS +3VS RN4601D 4.7KOhm
4.7KOhm
GND
B B
7

5
2

RN4601A RN4601B
4.7KOhm 4.7KOhm
6

3
1

Q4601A Q4601B
1

1
2 UM6K1N 5 UM6K1N
1

D4604 @ @ D4605
<72> CRT_DDC_DAT
EGA10603V05A1 EGA10603V05A1
2

<72> CRT_DDC_CLK

GND GND

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 46 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 47 of 100
5 4 3 2 1
5 4 3 2 1

D D

HDMI
near the HDMI connector

C4801 1 2 0.1UF/16V TMDS_TX2P_CON


<73> TMDS_TX2P
C4802 1 2 0.1UF/16V TMDS_TX2N_CON
<73> TMDS_TX2N

C4803 1 2 0.1UF/16V TMDS_TX1P_CON


<73> TMDS_TX1P
C4804 1 2 0.1UF/16V TMDS_TX1N_CON
<73> TMDS_TX1N

C4805 1 2 0.1UF/16V TMDS_TX0P_CON


<73> TMDS_TX0P
C4806 1 2 0.1UF/16V TMDS_TX0N_CON
<73> TMDS_TX0N

C4807 1 2 0.1UF/16V TMDS_TXCP_CON


<73> TMDS_TXCP
C4808 1 2 0.1UF/16V TMDS_TXCN_CON
<73> TMDS_TXCN

+3VS R4803 1 2 499Ohm


R4802 1 2 499Ohm
3

Q4801 3 R4804 1 2 499Ohm


D
R4806 1 2 499Ohm
2N7002 R4805 1 2 499Ohm
11 R4808 1 2 499Ohm
G R4807 1 2 499Ohm
C 2 S R4809 1 2 499Ohm C
2

1 2

R4801 100KOhm

+5VS
GND

Reference should be +5VS, but ATI answer that


+12VS
+3VS is fine. As long as it can turn the

2
S 2
MOSFET on. 1
G
Q4803
1
2N7002
+5VS_HDMI_CRT
D T4801
3 SL4801
F4801

3
1 2 +5VS_HDMI 1 2 +5VSHDMI

0.2A/30V R0603

2
+3VS C4809 C4810 C4811
0.1U 0.1U 4700PF

1
@

@ @
HDMI CON.
GND
2

4
J4801
TMDS_TX2P_CON 1 20
2.2KOhm 2.2KOhm 2.2KOhm 2.2KOhm 1 P_GND1
2 2 P_GND3 22
RN4801A RN4801B +3VS RN4802A RN4802B TMDS_TX2N_CON 3
TMDS_TX1P_CON 3
4
1

3
4
5 5
+5VS TMDS_TX1N_CON 6
C4812 6
2

TMDS_TX0P_CON 7
B 7 B
8 8
1 6 TMDS_TX0N_CON 9
<72> HDMI_DDC_CLK 9
TMDS_TXCP_CON 10
0.1U/16V GND Q4802A 10
11 11
UM6K1N TMDS_TXCN_CON 12 12
13 13
5

SL4802 R0603 14
DDC_CLK_HDMI DDC Clock 14
1 2 15 15
4 3 DDC_DATA_HDMI 1 2 DDC Data 16
<72> HDMI_DDC_DATA 16
17 17
Q4802B SL4803 R0603 +5VSHDMI 18 23
UM6K1N 18 P_GND4
1 2 19 19 P_GND2 21

R4814 1KOhm HDMI_CON_19P


<74> HDMI_HP

3
GND P/N:12G24110193T
D4803

1
BAV99
C4813 C4814 R4815
10PF 10PF 10KOhm
2

2
@ @

1
+3VS
GND GND GND

Note: 1. L1805,L1806,L1807: For EMI.(defult=0 ohm)


2. DDC_CLK_HDMI,DDC_DATA_HDMI: +5V tolerant

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 48 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 49 of 100
5 4 3 2 1
5 4 3 2 1

Main Board

CPU Thermal Sensor

D D

+3VSTHM_CPU

+3VS
U5001 CPU_THRM_DA
<24,30,74> SMB1_CLK 8 1 R0805 1 2 SL5001
SMBCLK VCC

1
<24,30,74> SMB1_DAT 7 2 CPU_THRM_DA CPU_THRM_DA <3> C5002
PM_THERM# SMBDATA DXP CPU_THRM_DC 1000PF/50V
<22> PM_THERM# 6 ALERT# DXN 3 CPU_THRM_DC <3>
5 4 OS_OC#

2
GND THERM# CPU_THRM_DC

1
C5001
G780 0.1UF/16V

2
C C

+5VS

B
PWM Fan B

2
C5005 D5001
10UF/10V SS0540

2
+3VS +5VS c0805 @

1
2

2
R5002 R5003
10KOhm 10KOhm

1
PN:12G17000004B
J5001
4 4 SIDE2 6
<30> FAN_PWM 3 3
2 2
<30> FAN0_TACH 1 1 SIDE1 5
1

1
C5003 C5004 WtoB_49
100PF/50V 100PF/50V
@ @
2

A A

Title : FAN_Fan & Sensor


ASUSTeK COMPUTER INC. NB4 Engineer: Zack Kuo
Size Project Name Rev
Custom F83Vf 1.1
Date: Thursday, July 16, 2009 Sheet 50 of 100
5 4 3 2 1
5 4 3 2 1

D SATA HDD con. D

IP4223-CZ6
J5102
25 1 C5112
NP_NC3 1
VI/O VI/O
SATA_RXP1_C 3 4 SATA_RXN1_C 2 SATA_TXP0_C 2 1 0.01UF/16V
2 SATA_TXP0 <20>
23 3 SATA_TXN0_C 2 1 C5111
+5VS NP_NC1 3 SATA_TXN0 <20>
4 C5102 0.01UF/16V
4 SATA_RXN0_C 0.01UF/16V
5 5 2 1 SATA_RXN0 <20>
6 SATA_RXP0_C 2 1 C5103
GND VBUS 6 SATA_RXP0 <20>
2 5 7 0.01UF/16V
7

GND VI/O VI/O


SATA_TXP1_C 1 6 SATA_TXN1_C 8
8 +3VS
9 9

1
10 C5104 C5105
10 0.1UF/10V 10UF/10V
D5101 11 11
12 @ @

2
12
13 13
@ 14 14
15 15
16 16 +5VS
17 17

1
18 18 +

1
19 C5106 C5115 CE5102
19 0.1UF/10V 10UF/10V
24 NP_NC2 20 20 47UF/6.3V
21 @

2
21
26 NP_NC4 22 22

SATA_CON_22P

C 12G15200022G C

SATA CD-ROM con.


P/N:12G15100013J

J5101
C5114 S1 1
SATA_TXP1_C S1 NP_NC1
<20> SATA_TXP1 2 1 0.01UF/16V S2 S2
2 1 C5113 SATA_TXN1_C S3 3
<20> SATA_TXN1 S3 P_GND1
0.01UF/16V S4
SATA_RXN1_C S4
<20> SATA_RXN1 2 1 C5110 S5 S5
C5109 2 1 0.01UF/16V SATA_RXP1_C S6
B <20> SATA_RXP1 S6 B
0.01UF/16V S7 S7

+5VS

SL5101 P1 P1
1 2 P2 P2
P3 P3 P_GND2 4

1
R0805 + P4
CE5103 C5108 C5107 P4
P5 P5 NP_NC2 2
47UF/6.3V P6

2
@ 0.1U 10UF/10V P6

2
GND
SATA_CON_13P

GND
GND

A A

Title : HDD/ODD CON


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 51 of 100
5 4 3 2 1
5 4 3 2 1

D SL5201 D

1 2 USBPN1
<21> USB_PN1

R0603
D5201
SL5202

<21> USB_PP1 1 2 USBPP1 3 4


+5V_USB1 USB
R0603

+5V_USB1
P/N:12G13101004Y
2 5
+5V
J5201
F5202 5 7
SL5204 SIDE_G1
GND 1 2 +5VUSB_12 1 VCC SIDE_G3

1 2 USBPP3 1 6 USBPN1 2 DATA0-


<21> USB_PP3

2
1.5A/6V USBPP1 3 DATA0+

1
+ C5202 4 GND
R0603

1
0.1UF/25V 6 8

1
IP4220CZ6 CE5202 C5206
SIDE_G2
SIDE_G4
@ 47UF/6.3V 10UF/10V USB_CON_1X4P

2
@ GND
SL5203
GND
1 2 USBPN3
<21> USB_PN3
GND
R0603 GND

USB

1
+

1
P/N:12G13101004Y
CE5201 C5205
47UF/6.3V 10UF/10V

2
@ J5202
C 5 SIDE_G1 7 C
Close to USB CONN 1 VCC SIDE_G3

USBPN3 2 DATA0-
GND USBPP3 3 DATA0+

2
4 GND
C5203 6 SIDE_G2 8
0.1UF/25V SIDE_G4

1
USB_CON_1X4P

GND

GND

GND

D5202
USB
+5V_USB0
+5V
(back)
1 6
F5201 J5203
+5V_USB0 1 2 +5VUSB_0 1 8
USBPN0 1 P_GND4
2 2 P_GND3 7
0.75A/13.2V USBPP0 3 6
3 P_GND2

1
2 5 + 4 4 P_GND1 5
CE5204 C5204
ESD Guard 47UF/6.3V USB_CON_1X4P
GND Close to 0.1U

2
P/N:12G131050044 GND
3 4
CON303
GND GND
B B
IP4220CZ6
@ GND
SL5205
1 2 USBPN0
<21> USB_PN0

R0603

SL5206
1 2 USBPP0
<21> USB_PP0

R0603

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 52 of 100
5 4 3 2 1
5 4 3 2 1

D D

+3VAUX_GOLAN Reserved R to +3VSUS for


+3VAUX_GOLAN Wake on WLAN function!
SL5301
+3VAUX_GOLAN:+3.003V~+3.597V 1 2 +3V
Max= 1100 mA R0805

1
C5301 C5302 C5303 C5304 C5305 R5302 1 @ 2 0Ohm +3VS
0.1UF/10V 0.1UF/10V 0.01UF/16V c0805 22UF/10V 1210
+1.5VS:+1.425V~+1.575V 10UF/10V @

2
Max= 375 mA +3VAUX

+1.5VS SL5302
SL5305 1 2 +3V
1 2
R0603

1
R0805 C5306 C5307 C5308 R5303 1 @ 2 0Ohm +3VSUS
0.1UF/10V 0.1UF/10V c0805
10UF/10V

2
J5301
WAKE# 1 2
<22,33,44> PCIE_WAKE# WAKE# 3.3V_1
<61> BT_CHDAT 3 BT_DATA GND7 4
<61> BT_CHCLK 5 BT_CHCLK 1.5V_1 6
CLK_WLAN_REQ# 7 8 +3VAUX_GOLAN
<29> CLK_WLAN_REQ# CLKREQ# Reserved11
9 10 +3VAUX
GND1 Reserved12
<29> CLK_PCIE_WLAN# 11 REFCLK- Reserved13 12

2
C
<29> CLK_PCIE_WLAN 13
15
REFCLK+ Reserved14 14
16
Intel SPEC(18780):Internal R5304 C
GND2 Reserved15
Pull UP 110Kohm 4.7KOhm
@
17 18

1
Reserved1 GND8
19 Reserved2 W_DISABLE# 20
21 GND3 PERST# 22 BUF_PLT_RST# <5,11,21,30,33,41,70>
<21> PCIE_RXN2_MINICARD 23 PERn0 3.3Vaux 24
<21> PCIE_RXP2_MINICARD 25 PERp0 GND9 26
27 GND4 1.5V_2 28
29 30 1 2 WLAN_ON
GND5 Reserved16 SMB_CLK_S <7,8,24,29,44>
31 32 R5306 1 2 0Ohm @
<21> PCIE_TXN2_C PETn0 Reserved17 SMB_DAT_S <7,8,24,29,44>
33 34 R5305 0Ohm @
<21> PCIE_TXP2_C PETp0 GND10
+3VAUX_GOLAN 35 36 1 2
GND6 Reserved18 USB_PN2 <21>
37 38 R5308 1 2 0Ohm @
Reserved3 Reserved19 USB_PP2 <21>
39 40 R5307 0Ohm @ Q5301A Q5301B
Reserved4 GND11

3
41 42 UM6K1N UM6K1N
Reserved5 NC1
43 Reserved6 LED_WLAN# 44
45 Reserved7 NC2 46 <30,61> RFON_SW# 2 5 WLAN_ON# <21>
47 48

4
Reserved8 1.5V_3
49 Reserved9 GND12 50
51 Reserved10 3.3V_2 52

53 GND13 NP_NC2 56
54 GND14 NP_NC1 55 GND

MINI_PCI_LATCH_52P

PN:12G03000052B
H5301 H5302
A40M20-64AS A40M20-64AS

B B

GND GND

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 53 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 54 of 100
5 4 3 2 1
5 4 3 2 1

D D

+3VA_EC

Power Button EXPRESS GATE

1
R5503
100KOhm INSTANT_ON#
T5502 INSTANT_ON# <30>
R5504 SW5504

2
PWRSW# 1 2 PWR_SW# <30,31>
5 5

1
SW5503 33Ohm 2 4
2 4

1
C5506
5 C5504 EC Int. pull-up 75K 0.1UF/16V 1 3

2
5 0.1UF/16V 1 3
2 4 ohm programing.

2
2 4 TACT_SWITCH_5P
1

C 1 1 3 3 C
C5505
0.1UF/16V GND
2

TACT_SWITCH_5P
P/N:12G09103305N
GND
P/N:12G09103305N
GND

B B

A A

Title : SWITCH
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 55 of 100
5 4 3 2 1
5 4 3 2 1

D
PWR LED For BATTERY LED D

WireLess LED BT LED


+5VS +5VS

+5VSUS +3VSUS

2
R5605 R5606
2
R5604

2
E
200Ohm 200Ohm
R5602 R5603 Q5602
<30> CHG_LED#
PMBS3906
B 1
200Ohm 200Ohm

1
2

C
10KOhm 3
R5607
1

1
100KOhm
LED5604 LED5603

+
1

1
BLUE BLUE
1

1
LED5601 LED5602
+

+
BLUE BLUE R5610 +3VS +3VS
270Ohm

2
1

1
2

1 2
R5611 R5616
10KOhm 10KOhm
3

3
LED5605 @ @

+
Q5601B AMBER ORANGE Q5603A Q5603B

2
5 UM6K1N <22> WLAN_LED 2 UM6K1N UM6K1N 5 BT_LED <22>
4

4
2
6

Q5601A
2 UM6K1N
<30,31> PWR_LED#
1

C C
GND
GND

SATA LED Num Lock Cap. Lock


+5VS +5VS

2
+5VS
+3VS R5612 R5613
200Ohm 200Ohm

1 1
2

R5614

1
LED5607

+
200Ohm
LED5606

+
BLUE
2

BLUE
1

R5601
100KOhm

2
1

2
LED5608
+
1

BLUE
+3VS
B B

<30> NUM_LED#
2

<30> CAP_LED#
2

R5615 Q5605B
4.7KOhm 5 UM6K1N
4
1

Q5605A
2 UM6K1N
<20> SATA_LED#
1

GND

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 56 of 100
5 4 3 2 1
5 4 3 2 1

+5VS +3VS +VCCP +1.5VS +12VS +1.8VS +1.1VS


D D

1
R5703 R5704 R5705 R5706 R5707 R5709 R5708
+3VA 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm 330Ohm
@ @ @ @ @ @ @

2
1
R5701 +5VS_DISCHRG +3VS_DISCHRG +VCCP_DISCHRG +1.5VS_DISCHRG +12VS_DISCHRG +1.8VS_DISCHRG +1.1VS_DISCHRG
100KOhm

3
@
Q5701B Q5702A Q5702B Q5703A Q5703B Q5704A Q5704B

2
5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N 2 UM6K1N 5 UM6K1N
@ @ @ @ @ @ @

4
6
Q5701A
UM6K1N
<30,41,91,92> SUSB_EC# 2 @

1
+5V +3V +1.5V

1
R5710 R5711 R5712
+3VA 330Ohm 330Ohm 330Ohm
@ @ @

2
1
R5702 +5V_DISCHRG +3V_DISCHRG +1.5V_DISCHRG
100KOhm

3
@
Q5705B Q5706A Q5706B

2
C 5 UM6K1N 2 UM6K1N 5 UM6K1N C
@ @ @

4
6
Q5705A
UM6K1N
<30,91> SUSC_EC# 2 @

B B

A A

Title : DISCHARGE
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 57 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 58 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 59 of 100
5 4 3 2 1
5 4 3 2 1

D D

DC_JACK_IN

1 T6001 TPC26T
1 T6002 TPC26T
1 T6003 TPC26T
DC IN 1 T6004 TPC26T

L6001 1 2 80Ohm/100Mhz A/D_DOCK_IN


J6001
4 1 L6002 1 2 80Ohm/100Mhz
P_GND1 1
2 2

1
5 P_GND2 3 3

1
C6002 C6001 C6003 C6004
6 0.1UF/25V D6001 10UF/25V 1UF/25V 0.1UF/25V

2
NP_NC SS0540 @

2
DC_PWR_JACK_3P @

1
1 T6005 TPC26T
T6006 TPC26T
P/N:12G14530103V 1
1 T6007 TPC26T
1 T6008 TPC26T

GND
GND

GND

C C

GND
VI/O

VI/O
3

1
D6002

BAT IN
BAT_CON
Check Pin define & placement
1 T6009 TPC26T
1 T6010 TPC26T

VI/O
VI/O

VBUS
4

6
J6002 1 T6011 TPC26T
10 1 T6012 TPC26T
NP_NC1
1 1 T6017 TPC26T IP4223-CZ6 +3VA
1
2 2
3 1 T6018 TPC26T
3
4 4
5 R6001 1 2 330Ohm
5 SMB0_CLK <30>
6 R6002 1 2 330Ohm
6 SMB0_DAT <30>
7 R6003 1 2 330Ohm
7 BAT1_IN_OC# <30>
8 8
9 9
1

C6005 1 T6019 TPC26T


11 0.1UF/25V
NP_NC2
2

1
BATT_CON_9P C6006 C6008 C6007

T6013 TPC26T 100PF/50V 100PF/50V 100PF/50V


P/N:12G200010901 1

2
1 T6014 TPC26T
1 T6015 TPC26T
1 T6016 TPC26T @ @ @

B B
GND

GND GND GND

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 60 of 100
5 4 3 2 1
5 4 3 2 1

D D

+3V
Bluetooth Conn.

1
C6101 max. 60mA BT/WLAN SW GND

1
2
3
For Intel Wireless 0.1UF/16V

COM
J6102
CoExistence System J6101 SLIDE_SWITCH_6P
GND 8 8

COM
<53> BT_CHDAT 7 7 SIDE2 10
BT_ON 6

4
5
6
6
<53> BT_CHCLK 5 5
SL6101 1 2 R0603 USBPN5
4
3
4 +3V P/N:12G090070063
<21> USB_PN5 3
<21> USB_PP5
SL6102 1 2 R0603 USBPP5 2 2 SIDE1 9
1 1

1
C C
WTOB_CON_8P R6101
100KOhm

GND
PN:12G170010083 GND
R6102

2
<30,53> RFON_SW# 2 1

330Ohm

1
C6102
0.1UF/16V

2
+3V

1
GND GND
R6104
10KOhm

RB751V-40

2
D6101
BT_ON 1 2 BT_ON# <22>

3
3
D
Q6102
2N7002
RFON_SW# 11
G
2 S
2

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 61 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 62 of 100
5 4 3 2 1
5 4 3 2 1

D D

J6301
Finger Printer Conn. +3V

8 GND2 6 @ T6301
L6301
5
4 1 2 120Ohm/100Mhz
3
2
7 GND1 1

C C

1
FPC_CON_6P C6301 C6302
0.1UF/16V 10UF/10V
PN:12G182400604 @ @
@
2

2
GND

GND GND GND

GND

VI/O
VI/O
GND

3
D6301

SL6301 1 2 R0603 USBPN11


<21> USB_PN11

SL6302 1 2 R0603 USBPP11


<21> USB_PP11
@
IP4223-CZ6

4
VI/O

VBUS

VI/O
1
C6303
0.1UF/16V
+3V @

2
GND

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 63 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 64 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 65 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 66 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 67 of 100
5 4 3 2 1
5 4 3 2 1

D D
H4101 H4102 H4105 H4106 H4107 H4109
C276D106 C276D106 C276D106 C276D106 C276D106 C276D106 H4103
@ @ @ @ @ @ CT276RB453X472D106
A

1
I

GND

GND
H4104 H4108
CT276B315D197 CT276B315D197

H4114 H4115 H4116 H4117 H4129

1
C276D138 C276D138 C276D138 C276D138 CRT374X335IBD106
@ @ @ @ @
J
B C

1
GND

H4131
GND
GND CT276RBI126D106

1
K
H4120
C177I138D118
@ GND
C C
1

1
H4130
E 2 3DRILL_2D106&D118
@
H

3
GND H4140 H4141

U5F-M-EXPREE U5F-M-EXPREE
GND

H4126 H4127 H4128


RT315CB276D106 RT315CB276D106 RT315CB276D106
@ @ @ GND
VGA NUT
1

GND

B B

A A

Title : ScrewHole
PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 68 of 100
5 4 3 2 1
5 4 3 2 1

R1.1
2009/06/30
1. Set DDR3 VREF to 0.75V LDO output.
2. Change Card Reader to AU6433D53-GLF.
3. Change LAN to Atheros AR6132.
4. Change Transformer to 10/100 TAIMAG HA003
5. Change ClockGen to ICS9LPR363.
6. Remove ClockGen 3362 circuits.
7. Unstuff Finger Printer Connector.
8.

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Zack Kuo
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 69 of 100
5 4 3 2 1
5 4 3 2 1

U7001A
PLACE NEAR BALLS PLACE NEAR GPU
+1.1VS

AK16 PEX_IOVDD PEX_IOVDD


PEX_IOVDD1
PEX_IOVDD2 AK17

1
AK21 C7001 C7012 C7013 C7002 4.7UF/6.3V C7003
PEX_IOVDD3
PEX_IOVDD4 AK24
AK27 0.47UF/6.3V 0.47UF/6.3V 0.47UF/6.3V 1UF/6.3V C7014 10UF/6.3V

2
PEX_IOVDD5

@ @

AG11 PEX_IOVDDQ
PEX_IOVDDQ1
RX7001 1 @ PEX_IOVDDQ12 AG12 1550 mA
D <22> GPU_RST# 2 0Ohm PEX_IOVDDQ19 AG13 PLACE NEAR BALLS D
PEX_IOVDDQ20 AG15
SL7001 AG16 +1.1VS
PEX_RST PEX_IOVDDQ21
<5,11,21,30,33,41,53> BUF_PLT_RST# 1 2 AM16 PEX_RST_N PEX_IOVDDQ22 AG17
AR13 NC50 PEX_IOVDDQ23 AG18
R0402 AG22 PEX_IOVDDQ
PEX_IOVDDQ24
PEX_IOVDDQ25 AG23

1
AG24 C7004 C7005 C7015 C7006 4.7UF/6.3V C7016
PEX_IOVDDQ2
0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V C7007 10UF/6.3V

2
<11> PCIENB_RXP[0..15] PEX_IOVDDQ3 AG25
AG26 @
PEX_IOVDDQ4
PEX_IOVDDQ5 AJ14
<11> PCIENB_RXN[0..15] PEX_IOVDDQ6 AJ15
PEX_IOVDDQ7 AJ19
PEX_IOVDDQ8 AJ21
AJ22
PEX=> From NB R7002
1%
200Ohm
PEX_IOVDDQ9
PEX_IOVDDQ10 AJ24
AJ25
PEX_TSTCLK+ PEX_IOVDDQ11
EXP: VGA Card to NB 1 2
PEX_TSTCLK-
AJ17
AJ18
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT_N
PEX_IOVDDQ13
PEX_IOVDDQ14
AJ27
AK18
PEX_IOVDDQ15 AK20
<29> CLK_PCIE_PEG AR16 PEX_REFCLK PEX_IOVDDQ16 AK23
<11> PCIEG_RXP[0..15] <29> CLK_PCIE_PEG# AR17 PEX_REFCLK_N PEX_IOVDDQ17 AK26
<11> PCIEG_RXN[0..15] PEX_IOVDDQ18 AL16
PCIENB_RXP0 C7017 2 1 0.1UF/16VPEX_TX0+ AL17
PCIENB_RXN0 C7008 2 PEX_TX0
1 0.1UF/16VPEX_TX0- AM17 PEX_TX0_N
PCIEG_RXP0 AP17
PCIEG_RXN0 PEX_RX0
AN17 PEX_RX0_N
PCIENB_RXP1 C7018 2 1 0.1UF/16VPEX_TX1+ AM18
PCIENB_RXN1 C7009 2 PEX_TX1
1 0.1UF/16VPEX_TX1- AM19 PEX_TX1_N
PCIEG_RXP1 AN19
PCIEG_RXN1 PEX_RX1
AP19 PEX_RX1_N
C PCIENB_RXP2 C7010 2 1 0.1UF/16VPEX_TX2+ AL19 C
PCIENB_RXN2 C7019 2 PEX_TX2
1 0.1UF/16VPEX_TX2- AK19 PEX_TX2_N NC29 A2
NC40 AB7
PCIEG_RXP2 AR19 AD6
PCIEG_RXN2 PEX_RX2 NC41
AR20 PEX_RX2_N NC42 AF6
NC43 AG6
PCIENB_RXP3 C7011 2 1 0.1UF/16VPEX_TX3+ AL20 AJ5
PCIENB_RXN3 C7020 2 PEX_TX3 NC44
1 0.1UF/16VPEX_TX3- AM20 PEX_TX3_N NC45 AK15
NC46 AL7
PCIEG_RXP3 AP20 D35
PCIEG_RXN3 PEX_RX3 NC47
AN20 PEX_RX3_N NC30 E35
NC31 E7
PCIENB_RXP4 C7022 2 1 0.1UF/16VPEX_TX4+ AM21 F7
PCIENB_RXN4 C7021 2 PEX_TX4 NC32
1 0.1UF/16VPEX_TX4- AM22 PEX_TX4_N NC33 H32
NC34 M7
PCIEG_RXP4 AN22 P6
PCIEG_RXN4 PEX_RX4 NC35
AP22 PEX_RX4_N NC36 P7
NC37 R7
PCIENB_RXP5 C7024 2 1 0.1UF/16VPEX_TX5+ AL22 U7
PCIENB_RXN5 C7023 2 PEX_TX5 NC38
1 0.1UF/16VPEX_TX5- AK22 PEX_TX5_N NC39 V6

PCIEG_RXP5 AR22
PCIEG_RXN5 PEX_RX5
AR23 PEX_RX5_N
PCIENB_RXP6 C7026 2 1 0.1UF/16VPEX_TX6+ AL23
PCIENB_RXN6 C7025 2 PEX_TX6
1 0.1UF/16VPEX_TX6- AM23 PEX_TX6_N
+3VS

PCIEG_RXP6
150 mA
AP23 PEX_RX6 VDD33_1 J10
PCIEG_RXN6 AN23 J11
PEX_RX6_N VDD33_2

1
J12 C7029 4700PF/25V C7031 C7032
PCIENB_RXP7 C7028 2 VDD33_3
1 0.1UF/16VPEX_TX7+ AM24 PEX_TX7 VDD33_4 J13
PCIENB_RXN7 C7027 2 1 0.1UF/16VPEX_TX7- AM25 J9 0.1UF/10V C7030
7030 0.1UF/10V 1UF/6.3V

2C
2

2
PEX_TX7_N VDD33_5
PCIEG_RXP7 AN25
PCIEG_RXN7 PEX_RX7
AP25 PEX_RX7_N
PLACE NEAR BALLS
PCIENB_RXP8 C7034 2 1 0.1UF/16VPEX_TX8+ AL25
PCIENB_RXN8 C7033 2 PEX_TX8
B
1 0.1UF/16VPEX_TX8- AK25 PEX_TX8_N B
PCIEG_RXP8 AR25
PCIEG_RXN8 PEX_RX8
AR26 PEX_RX8_N
PCIENB_RXP9 C7035 2 1 0.1UF/16VPEX_TX9+ AL26
PCIENB_RXN9 C7036 2 PEX_TX9
1 0.1UF/16VPEX_TX9- AM26 PEX_TX9_N VDD_SENSE AD20 NVDD_SENSE <85>
GND_SENSE AD19
PCIEG_RXP9 AP26
PCIEG_RXN9 PEX_RX9 Remote
AN26 PEX_RX9_N
PCIENB_RXP10 C7038 2 1 0.1UF/16VPEX_TX10+AM27
PCIENB_RXN10 C7037 2 PEX_TX10
1 0.1UF/16VPEX_TX10- AM28 PEX_TX10_N
PCIEG_RXP10 AN28
PCIEG_RXN10 PEX_RX10
AP28 PEX_RX10_N
PCIENB_RXP11 C7039 2
165 mA +1.1VS
1 0.1UF/16VPEX_TX11+ AL28 PEX_TX11
PCIENB_RXN11 C7040 2 1 0.1UF/16VPEX_TX11- AK28 L7001 10NH
PEX_TX11_N PEX_PLLVDD PEX_PLLVDD
PEX_PLLVDD AG14 1 2
PCIEG_RXP11 AR28 PEX_RX11

1
PCIEG_RXN11 AR29 4.7UF/6.3V 4.7UF/6.3V
PEX_RX11_N C7042 C7043 C7044
PCIENB_RXP12 C7041 2 1 0.1UF/16VPEX_TX12+ AK29 0.01UF/16V 0.1UF/10V 1UF/6.3V C7045
7045 C7046
7046

2C

2C
2

2
PCIENB_RXN12 C7047 2 PEX_TX12
1 0.1UF/16VPEX_TX12- AL29 PEX_TX12_N
PCIEG_RXP12 AP29
PCIEG_RXN12 PEX_RX12
AN29 PEX_RX12_N
PLACE NEAR GPU
PCIENB_RXP13 C7048 2 1 0.1UF/16VPEX_TX13+AM29
PCIENB_RXN13 C7049 2 PEX_TX13
1 0.1UF/16VPEX_TX13- AM30 PEX_TX13_N
PCIEG_RXP13 AN31
PCIEG_RXN13 PEX_RX13
AP31 PEX_RX13_N
PCIENB_RXP14 C7051 2 1 0.1UF/16VPEX_TX14+AM31 AG19
PCIENB_RXN14 C7050 2 PEX_TX14 NC48
1 0.1UF/16VPEX_TX14- AM32 PEX_TX14_N
NC49 AG20
A PCIEG_RXP14 AR31 R7003 A
PCIEG_RXN14 PEX_RX14
AR32 PEX_RX14_N PEX_TERMP AG21 PEX_TERMP 1 2 2.49KOhm
1%
PCIENB_RXP15 C7052 2 1 0.1UF/16VPEX_TX15+ AN32
PCIENB_RXN15 C7053 2 PEX_TX15
1 0.1UF/16VPEX_TX15- AP32 PEX_TX15_N
PCIEG_RXP15 AR34
PCIEG_RXN15 PEX_RX15 R7004
AP34 PEX_RX15_N TESTMODE AP35 1 2 10KOhm

NB9P-GE2
Title : Connector, LED
PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 70 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 71 of 100
5 4 3 2 1
5 4 3 2 1

+3VS

change 4.7uF to 1uF


C5001,C5005,C5015

4
RN7205A RN7205B
2.2KOhm 2.2KOhm
CRT

3
U7001F
L7201 220Ohm/100Mhz
130 mA DACA_VDD I2CA_CLK RN7201B
+3VS 1 2 AJ12 DACA_VDD I2CA_SCL G1 3 33OHM 4 CRT_DDC_CLK <46>
G4 I2CA_DAT 1 RN7201A
I2CA_SDA 33OHM 2 CRT_DDC_DAT <46>
DACA_VREF AK12 DACA_VREF
l0603

1
D D
C7201 C7202 C7203 DACA_RSET AK13 AM13
DACA_RSET DACA_HSYNC CRT_HSYNC <46>
Irat=600mA DACA_VSYNC AL13 CRT_VSYNC <46>

1
4.7UF/6.3V 4700PF/25V 0.01UF/25V JP7201

2
AM15 DAC_VR 1 2
DACA_RED CRT_RED <46>
R7201 JP7202
c0603 124Ohm AM14 DAC_VG 1 2
DACA_GREEN CRT_GREEN <46>
1% JP7203

2
AL14 DAC_VB 1 2
DACA_BLUE CRT_BLUE <46>

1
NB9P-GE2
R7202 R7203 R7204

150Ohm 150Ohm 150Ohm

2
near GPU

(180 mA) U7001H


DACB_VDD AC6 DACB_VDD
AC5 Composite
DACB_VREF
DACB_CSYNC AB5
AB6 DACB_RSET
DACB_RED AA4

2
10KOHM
RN7219A AB4
DACB_GREEN

DACB_BLUE Y4

C C

1
NB9P-GE2

U7001G
(130 mA) DACC_VDD I2CB_CLK RN7220B
AG7 DACC_VDD I2CB_SCL G3 3 33OHM 4 HDMI_DDC_CLK <48>
G2 I2CB_DAT 1 RN7220A
I2CB_SDA 33OHM 2 HDMI_DDC_DATA <48>
AK6 DACC_VREF
DACC_HSYNC AM1
AH7 DACC_RSET DACC_VSYNC AM2
4
10KOHM

RN7219B AK4
DACC_RED

DACC_GREEN AL4

AJ4
3

DACC_BLUE
XTAL_IN , XTAL_OUT
3.3V tolerance correspondent BGA balls must be
12mils and 16 mil wide NB9P-GE2

+1.1VS
near GPU
65 +25 +50 mA
L7202 220Ohm/100Mhz
1 2 PLL_VDD
2

C7205 l0603 C7204 C7206 C7207 U7001E


B B
4.7UF/6.3V 1UF/6.3V 0.1UF/16V 0.1UF/16V AE9
1

PLLVDD
AD9 VID_PLLVDD
AF9 SP_PLLVDD near GPU

R7207 @
R7216 1 @ 2 0Ohm XTALSSIN D2 D1 XTAL_OUTB 1 2
<29> CLK_GFX_SSC XTAL_SSIN XTAL_OUTBUFF

1
R7217 1 @ 2 0Ohm B1 B2 22Ohm
<29> CLK_GFX_NOSSC XTAL_IN XTAL_OUT R7208

NB9P-GE2 10KOhm

2
1

X7201
R7209 XTALIN 1 2 XTALOUT
NOT SSC NEED PD 10K
10KOhm 27Mhz
1

C7209
2

R7218 @ C7208 10/10/5 PPM


18PF/50V
1

10KOhm 18PF/50V
1
2

SS_CLKIN +3VS

4
10KOHM

10KOHM
RN7202A RN7202B
+3VS
R7210 @ @
1 2 +3VS_SSC
@
1

3
1

A 4.7Ohm C7210 C7211 C7212 A


@ @ @
1UF/6.3V 0.1UF/16V 470PF/50V
2

U7201 @ ICS91730AMLF
1 8 SS_PD#
CLKIN PD#
2 VDD SCLK 7 EDID_CLK <45,74>
R7211 @ 3 6
GND SDATA EDID_DAT <45,74>
1 2 SS_CLKOUT 4 5 SS_REFOUT
CLKOUT/FS_IN0 REF_OUT/FS_IN1
22Ohm
near ICS
EXTERNAL SPREAD SPECTRUM
Address: 0xD4H Title : Connector, LED
PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 72 of 100
5 4 3 2 1
5 4 3 2 1

LVDS
U7001I

IFPA_TXC_N AM12 LVDS_LCLKN <45>


IFPA_TXC AM11 LVDS_LCLKP <45>

IFPA_TXD0_N AL8 LVDS_L0N <45>


l0603 80mA AM8
IFPA_TXD0 LVDS_L0P <45>
L7301
+1.8VS 1 2 IFPAB_PLVDD AK9 AM9
IFPAB_PLLVDD IFPA_TXD1_N LVDS_L1N <45>
R7301 1 1KOhm 2 AJ11 AM10
D IFPAB_RSET IFPA_TXD1 LVDS_L1P <45> D
180Ohm/100Mhz @

1
C7301 C7302 C7303 C7304 AL10
IFPA_TXD2_N LVDS_L2N <45>
IFPA_TXD2 AK10 LVDS_L2P <45>
4.7UF/6.3V 4.7UF/6.3V 4700PF/25V 47PF/50V

2
AL11 support 1 channel ; 1366x768 ; 18-bit RGB
IFPA_TXD3_N
IFPA_TXD3 AK11
@
IFPB_TXC_N AN13 LVDS_UCLKN <45>
IFPB_TXC AP13 LVDS_UCLKP <45>
L7302
LCD_IOVDD
85 mA
+1.8VS 1 2 AG9 IFPA_IOVDD IFPB_TXD4_N AP8 LVDS_U0N <45>
AG10 IFPB_IOVDD IFPB_TXD4 AN8 LVDS_U0P <45>

1
180Ohm/100Mhz C7305 C7306 C7307 C7308 C7309
85 mA
IFPB_TXD5_N AN10 LVDS_U1N <45>
4.7UF/6.3V 4700PF/25V 470PF/50V 4700PF/25V 470PF/50V AP10 LVDS_U1P <45>

2
IFPB_TXD5

IFPB_TXD6_N AR10 LVDS_U2N <45>


@ @ AR11
IFPB_TXD6 LVDS_U2P <45>

IFPB_TXD7_N AP11
IFPB_TXD7 AN11

NB9P-GE2
IFPx A B C D E F
LVDS LVDS
HDMI HDMI HDMI
DVI DVI(S/D) DVI(S/D)
U7001J

+1.8VS AN3
IFPC_AUX_N
C
IFPC_AUX AP2 C

L7304 220Ohm/100Mhz
160 mA IFPC_PLLVDD IFPC_L3_N AR2 TMDS_TXCN <48>
1 2 AJ9 IFPCD_PLLVDD IFPC_L3 AP1 TMDS_TXCP <48>
AK7 IFPCD_RSET
1

1
IFPC_L2_N AM4 TMDS_TX0N <48>

1
C7314 C7311 C7315 C7316 AM3
IFPC_L2 TMDS_TX0P <48>

2
1UF/6.3V 4.7UF/6.3V 4700PF/25V
2

2
470PF/50V R7302 AM5 TMDS_TX1N <48>

2
IFPC_L1_N
1KOhm IFPC_L1 AL5 TMDS_TX1P <48>
@
AM6 TMDS_TX2N <48>

1
+1.1VS IFPC_L0_N
IFPC_L0 AM7 TMDS_TX2P <48>
l0603
L7303 220Ohm/100Mhz
385 mA IFPC_IOVDD
1 2 AJ8 IFPC_IOVDD
1

1
C7324 C7326 C7327
C7322 C7323 C7325 AK8 AN4
1UF/6.3V 4.7UF/6.3V 470PF/50V 4700PF/25V 470PF/50V 470PF/50V IFPD_IOVDD IFPD_AUX_N
AP4
2

2 IFPD_AUX

IFPD_L3_N AR4
@ @ @ AR5
IFPD_L3

IFPD_L2_N AP5
IFPD_L2 AN5

IFPD_L1_N AN7
IFPD_L1 AP7

IFPD_L0_N AR7
IFPD_L0 AR8

NB9P-GE2

B B

U7001K

IFPE_AUX_N AD4
IFPE_AUX AE4
160 mA
IFPE_L3_N AE5
IFPE_PLLVDD AJ6 AE6
IFPEF_PLLVDD IFPE_L3
T7301 1 AL1 AF5
TPC28T IFPEF_RSET IFPE_L2_N
IFPE_L2 AF4
2

IFPE_L1_N AG4
R7303 AH4
IFPE_L1
10KOhm
IFPE_L0_N AH5
AH6
1

IFPE_L0

IFPE_IOVDD
385 mA
AE7 IFPE_IOVDD
IFPF_IOVDD
385 mA
AD7 IFPF_IOVDD IFPF_AUX_N AF2
IFPF_AUX AF3
2

R7305 AH3
IFPF_L3_N
10KOhm IFPF_L3 AH2

AH1
1

IFPF_L2_N
IFPF_L2 AJ1

IFPF_L1_N AJ2
A
IFPF_L1 AJ3 A

IFPF_L0_N AL3
IFPF_L0 AL2

NB9P-GE2

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 73 of 100
5 4 3 2 1
5 4 3 2 1

+3VS U7001L
10mA STRAP0 ROM_SI RAMCONFIG
P9 N1 MONO RANK
MIOA_VDDQ1 MIOA_D0 +3VS +3VS
R9 MIOA_VDDQ2 MIOA_D1 P4 USER
1

C7401 T9 P1 3 2 1 0 PANEL VS/HS Hynix 64Mx16 -> ram_cfg = 0x0


MIOA_VDDQ3 MIOA_D2 Samsung 64Mx16 -> ram_cfg = 0x1
U9 MIOA_VDDQ4 MIOA_D3 P2 0 0 0 0 XGA -/-
0.1UF/10V P3 0 0 0 1 XGA +/+ Samsung 32Mx16 -> ram_cfg = 0x5
2

MIOA_D4 Hynix 32Mx16 -> ram_cfg = 0x7


MIOA_D5 T3 0 0 1 0 SXGA +/+

2
MIOA_D6 T2 0 0 1 1 SXGA+ -/-
T1 R7414 R7416 R7417 R7422 R7413 R7410 0 1 0 0 UXGA +/+
MIOA_D7 45.3KOhm 10KOhm 5.1KOhm 5.1KOhm 15KOhm
MIOA_D8 U4 24.9KOHM 1 1 1 1 EDID N/A 5K PU 1000 PD 0000
U1 1% 1% 1% 1% 1% 1%
MIOA_D9
U2 @ @ @ 10K PU 1001 PD 0001

1
MIOA_D10 STRAP0 ROM_SI 15K PU 1010 PD 0010
1 U5 MIOA_CAL_PD_VDDQ MIOA_D11 U3
T7401 TPC28T R6 STRAP1 ROM_SO STRAP1 20K PU 1011 PD 0011
D NC23 STRAP2 ROM_SCLK D
1 T5 T6
T7406 TPC28T
MIOA_CAL_PU_GND NC24
N6 3GIO PADCFG 25K PU 1100 PD 0100
NC25

2
3 2 1 0 PANEL 30K PU 1101 PD 0101
R7415 R7412 R7418 R7420 R7427 R7411 0 0 0 0 DESKTOP 35K PU 1110 PD 0110
1 N5 45.3KOhm 10KOhm 24.9KOHM 5.1KOhm 5.1KOhm 15KOhm 0 0 0 1 NOTEBOOK
T7409 MIOA_VREF 1% 1% 1% 1% 1% 1% 45K PU 1111 PD 0111
TPC28T 0 0 1 0 RESERVED
@ @ @ .

1
MIOA_CTL3 P5 .
MIOA_HSYNC N3 1 1 1 1 RESERVED
MIOA_VSYNC L3
N2 1 T7411 TPC28T
MIOA_DE
STRAP2 ROM_SO
MIOA_CLKOUT R4 LOGICAL BIT XCLK_277 TVMODE[2]..TVMODE[0]
T4 10KOhm R7401 0 PCI_DEVID[0]
MIOA_CLKOUT_N
MIOA_CLKIN N4 1 2 1 PCI_DEVID[1] XCLK_277 0 RESERVED
2 PCI_DEVID[2] 1 27MHZ
NB9P-GE2 3 PCI_DEVID[3] TVMODE 000 NTSC M
001 NTSC J
N10P-GE1 : 0x0652 010 PAL M
N10P-GV2 : 0x0654 011 PAL N
100 PAL CN
~10100 101 PAL BDGHI
= PCI_DEVICE[4][3][2][1][0] 110 RESERVED
111 RESERVED
ROM_SCLK
LOGICAL BIT
3 PCI_DEVID[4]
+3VS 2 SUB_VENDER
1 SLOT_CLK_CFG
+3VS 0 PEX_PLL_EN_TERM
U7001M U7001D +3VS
10mA
AA9 MIOB_VDDQ1 MIOB_D0 Y1
AB9 Y2 J26 C3 1 T7407
MIOB_VDDQ2 MIOB_D1 NC1 ROM_CS_N
1

C C7403 W9 Y3 J25 C
MIOB_VDDQ3 MIOB_D2 NC2 ROM_SI
Y9 MIOB_VDDQ4 MIOB_D3 AB3 ROM_SI D3

4
0.1UF/10V AB2 C4 ROM_SO
2

MIOB_D4 ROM_SO

1
ROM_SCLK

RN7444A

RN7444B
2.2KOhm

2.2KOhm
MIOB_D5 AB1
AC4 ACZ_BCLK_VGA D7
ROM_SCLK D4
C7402
HDCP ROM
MIOB_D6 <20> ACZ_BCLK_VGA HDA_BCLK
AC1 ACZ_RST#_VGA D6
<20> ACZ_RST#_VGA

2
MIOB_D7 R7431 1 ACZ_SDIN_VGA HDA_RST_N
MIOB_D8 AC2 <20> ACZ_SDIN1_VGA 2 10Ohm C7 HDA_SDI
0.1UF/10V
AC3 ACZ_SDOUT_VGA B7
<20> ACZ_SDOUT_VGA

3
MIOB_D9 ACZ_SYNC_VGA HDA_SDO U7402
MIOB_D10 AE3 <20> ACZ_SYNC_VGA A7 HDA_SYNC
1 T7413 AA7 MIOB_CAL_PD_VDDQ MIOB_D11 AE2 8 VCC A0 1

2
TPC28T NC26 U6 I2CH_SCL F6 7 WP A1 2
1 T7414 AA6 W6 R7404 I2CH_CLK 6
MIOB_CAL_PU_GND NC27 10KOhm I2CH_DAT SCL A2 3
TPC28T NC28 Y6 I2CH_SDA G6 5 SDA GND 4
W5 STRAP0
STRAP0 STRAP1 AT24C16BN-SH-B
W7

1
STRAP1

2
V7 STRAP2 A5
STRAP2 SPDIF
1 T7415 AF1 MIOB_VREF
R7405
TPC28T BUFRST_N A4
C5 +3VS 10KOhm
NC51 @

1
MIOB_CTL3 W3

2
MIOB_HSYNC W1
W2 R7406 1 2 40.2KOHM N9 AK14 R7408
MIOB_VSYNC MIOB_DE T7416 TPC28T R7407 1 STRAP_REF_3V3 GND192
MIOB_DE Y5 1 2 40.2KOHM M9 STRAP_REF_MIOB NC52 K9 10KOhm
@ C7406
NB9P-GE2 2 1 SPDIF_VGA <36>

21
0.01UF/16V
V4 R7409 @
MIOB_CLKOUT 36KOhm
MIOB_CLKOUT_N W4
AE1 1 2 @

1
MIOB_CLKIN
NB9P-GE2 R7419 10KOhm

+3VS
+3VS RN7449A 1 2.2KOhm2
RN7449B 3
B 2.2KOhm4 B
RN7446A 2 1 2.2KOhm RN7449C 5 2.2KOhm6
RN7446B 4 3 2.2KOhm RN7449D 7 2.2KOhm8
RN7447A 2 1 2.2KOhm
Default GPIO Assignment RN7447B 4 3 2.2KOhm
========================================= U7001N
VGA_THERMDN B4 E2 SMB_CLK_VGA
GPIO0 -- AVAILABLE THERMDN I2CS_SCL SMB_DAT_VGA
I2CS_SDA E1
GPIO1 -- IFPC (HDMI) Hot Plug Detect
GPIO2 -- Panel backlight brightness (PWM) (platform use EC PWM) E3 DDCC_CLK_G3 1 RN7419A
I2CC_SCL 33OHM 2 EDID_CLK <45,72>
GPIO3 -- Panel power enable I2CC_SDA E4 DDCC_DAT_G3 3 33OHM 4
RN7419B
EDID_DAT <45,72>
F4 +3VS
GPIO4 -- Panel backlight ON/OFF I2CD_SCL
G5
I2CD_SDA
GPIO5 -- GPU VID0 VGA_THERMDP B5 THERMDP I2CE_SCL D5
E5
GPIO6 -- GPU VID1 I2CE_SDA

2
GPIO7 -- GPU VID2 / FBVDD VID0
R7434 R7421 R7435
GPIO8 -- OverTemp/GPU shutdown K1 1 T7417 10KOhm 200Ohm 10KOhm
GPIO0 HDMI_HP Pull-Down 10K at connnector @
GPIO9 -- ThermAlert/Fan PWM GPIO1 K2
T7418
HDMI_HP <48>
K3 1

1
GPIO10 -- FBVref Select GPIO2 LCD_PPEN_VGA
GPIO3 H3 LCD_PPEN_VGA <45>
H2 LCD_BLEN_VGA C7404
GPIO11 -- SLI SYNC0 GPIO4 GPU_VID_0#
LCD_BLEN_VGA <45>
GPIO5 H1 GPU_VID_0# <85> 2 1
GPIO12 -- AC power detect in GPIO6 H4 1 T7419 @
H5 1 T7420 0.1UF/16V
GPIO13 -- PS_CONTROL0 GPIO7
H6 SL7401 1 2 R0402 VGA_THERM_ALERT# 2 1
GPIO8
GPIO14 -- PS_CONTROL1 GPIO9 J7 SL7402 1 2 R0402 THERM_ALERT# C7405 2200PF/50V
T7424 1 AP14 K4 1 T7423 @ U7401 @
GPIO15 -- IFPE Hotplug detect T7425 1 AR14
JTAG_TCK GPIO10
K5 1 T7422 1 8 1 2
JTAG_TMS GPIO11 VCC SMBCLK SMB1_CLK <24,30,50>
GPIO16 -- Dongle IFPC DVI mode T7426 1 AN14 JTAG_TDI GPIO12 H7 1 2 +3VS VGA_THERMDP 2 DXP SMBDATA 7 R7426 1 2 0Ohm @ SMB1_DAT <24,30,50>
T7421 1 AN16 J4 R7429 10KOhm VGA_THERMDN 3 6 R7425 1 2 0Ohm @ THERM_ALERT#
GPIO17 -- Dongle IFPC HDMI mode 1 @ 2 AP16
JTAG_TDO GPIO13
J6 1 2 4
DXN ALERT#
5 R7424 0Ohm @
JTAG_TRST_N GPIO14 <30> VGA_THERM_ALERT# THERM# GND
GPIO18 -- Dongle IFPD DVI mode 10KOhm R7440
GPIO15 L1 R7423 @ 0Ohm
L2
GPIO19 -- Dongle IFPD HDMI mode GPIO16
L4 LCD_PPEN_VGA G781-1
GPIO17 LCD_BLEN_VGA
A GPIO20 -- IFPD Hotplug detect GPIO18 M4
GPU_VID_0#
A

GPIO19 L7
GPIO21 -- NVGEM/ (IFPF Hotplug detect) L5
GPIO20
GPIO22 -- SWAP Ready (SLI) GPIO21 K6
2

L6 SMB_CLK_VGA SL7403 1 2 R0402 SMB1_CLK


GPIO23 -- AVAILABLE GPIO22 R7433 R7430 R7432
GPIO23 M6
10KOhm 10KOhm 10KOhm SMB_DAT_VGA SL7404 1 2 R0402 SMB1_DAT

NB9P-GE2
1

GPU_VID0 VID0 +VGA_VCORE GPU Internal Thermal

Low 0 0.9V Title : Connector, LED


High 1 1.10V PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 74 of 100
5 4 3 2 1
5 4 3 2 1

U7001O
AA11 GND20 GND16 E15
AA12 GND123 GND17 E18
AA13 GND134 GND18 E24
AA14 GND145 GND19 E27
D
AA15 GND156 GND22 E30 D
AA16 GND167 GND23 E6
AA17 GND178 GND24 E9
AA18 GND189 GND25 F2
AA19 GND191 GND26 F31
AA2 GND21 GND27 F34
AA20 GND32 GND28 F5
AA21 GND43 GND29 J2
AA22 GND54 GND30 J31
AA23 GND65 GND31 J34
AA24 GND76 GND33 J5
AA25 GND87 GND34 L9
AA34 M11 +VGA_VCORE +VGA_VCORE
GND98 GND35
AA5 GND109 GND36 M13
AB12 GND120 GND37 M15 U7001P
AB14 GND124 GND38 M17
AB16 GND125 GND39 M19
AB18 GND126 GND40 M2
AB20 GND127 GND41 M21 AB11 VDD1 VDD57 P21
AB22 GND128 GND42 M23 AB13 VDD2 VDD58 P23
AB24 GND129 GND44 M25 AB15 VDD3 VDD59 P25
AC9 GND130 GND45 M31 AB17 VDD4 VDD60 R11
AD11 GND131 GND46 M34 AB19 VDD5 VDD61 R12 20.3 A +VGA_VCORE
AD13 GND132 GND47 M5 AB21 VDD6 VDD62 R13
AD15 GND133 GND48 N11 AB23 VDD7 VDD63 R14
AD17 GND135 GND49 N12 AB25 VDD8 VDD64 R15
AD2 GND136 GND50 N13 AC11 VDD9 VDD65 R16

1
AD21 N14 AC12 R17 C7501 C7502 C7503 C7504 C7505 C7506 C7507
GND137 GND51 VDD10 VDD66
AD23 GND138 GND52 N15 AC13 VDD11 VDD67 R18
AD25 N16 AC14 R19 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
GND139 GND53 VDD12 VDD68
AD31 GND140 GND55 N17 AC15 VDD13 VDD69 R20
AD34 GND141 GND56 N18 AC16 VDD14 VDD70 R21
AD5 GND142 GND57 N19 AC17 VDD15 VDD71 R22
AE11 GND143 GND58 N20 AC18 VDD16 VDD72 R23

1
AE12 N21 AC19 R24 C7508 C7509 C7510 C7511 C7512 C7513 C7514
GND144 GND59 VDD17 VDD73
AE13 GND146 GND60 N22 AC20 VDD18 VDD74 R25
AE14 N23 AC21 T12 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
GND147 GND61 VDD19 VDD75
AE15 GND148 GND62 N24 AC22 VDD20 VDD76 T14
C AE16 GND149 GND63 N25 AC23 VDD21 VDD77 T16 C
AE17 P12 AC24 T18 @ @
GND150 GND64 VDD22 VDD78
AE18 GND151 GND66 P14 AC25 VDD23 VDD79 T20

1
AE19 P16 AD12 T22 C7515 C7516 C7517 C7518 C7519 C7520
GND152 GND67 VDD24 VDD80
AE20 GND153 GND68 P18 AD14 VDD25 VDD81 T24
AE21 P20 AD16 V11 0.1UF/10V 0.1UF/10V 0.1UF/10V

2
GND154 GND69 VDD26 VDD82 10UF/6.3V 10UF/6.3V 10UF/6.3V
AE22 GND155 GND70 P22 AD18 VDD27 VDD83 V13
AE23 GND157 GND71 P24 AD22 VDD28 VDD84 V15
AE24 R2 AD24 V17 @ @ @
GND158 GND72 VDD29 VDD85 @
AE25 GND159 GND73 R31 L11 VDD30 VDD86 V19
AG2 GND160 GND74 R34 L12 VDD31 VDD87 V21
AG31 GND161 GND75 R5 L13 VDD32 VDD88 V23
AG34 GND162 GND77 T11 L14 VDD33 VDD89 V25 PLACE NEAR BALLS
AG5
AK2
GND163 GND78 T13
T15
L15
L16
VDD34 VDD90 W11
W12
17 0.1u
GND164 GND79 VDD35 VDD91
AK31
AK34
GND165 GND80 T17
T19
L17
L18
VDD36 VDD92 W13
W14
3 10u
GND166 GND81 VDD37 VDD93
AK5 GND168 GND82 T21 L19 VDD38 VDD94 W15
AL12 GND169 GND83 T23 L20 VDD39 VDD95 W16
AL15 GND170 GND84 T25 L21 VDD40 VDD96 W17
AL18 GND171 GND85 U11 L22 VDD41 VDD97 W18
AL21 GND172 GND86 U12 L23 VDD42 VDD98 W19
AL24 GND173 GND88 U13 L24 VDD43 VDD99 W20
AL27 GND174 GND89 U14 L25 VDD44 VDD100 W21
AL30 GND175 GND90 U15 M12 VDD45 VDD101 W22
AL6 GND176 GND91 U16 M14 VDD46 VDD102 W23
AL9 GND177 GND92 U17 M16 VDD47 VDD103 W24
AN2 GND179 GND93 U18 M18 VDD48 VDD104 W25
AN34 GND180 GND94 U19 M20 VDD49 VDD105 Y12
AP12 GND181 GND95 U20 M22 VDD50 VDD106 Y14
AP15 GND182 GND96 U21 M24 VDD51 VDD107 Y16
AP18 GND183 GND97 U22 P11 VDD52 VDD108 Y18
AP21 GND184 GND99 U23 P13 VDD53 VDD109 Y20
AP24 GND185 GND100 U24 P15 VDD54 VDD110 Y22
AP27 GND186 GND101 U25 P17 VDD55 VDD111 Y24
AP3 GND187 GND102 V12 P19 VDD56
AP30 GND188 GND103 V14
B
AP33 GND190 GND104 V16 B
AP6 GND1 GND105 V18
AP9 GND2 GND106 V2 NB9P-GE2
B12 GND3 GND107 V20
B15 GND4 GND108 V22
B21 GND5 GND110 V24
B24 GND6 GND111 V31
B27 GND7 GND112 V5
B3 GND8 GND113 V9
B30 GND9 GND114 Y11
B33 GND10 GND115 Y13
B6 GND11 GND116 Y15
B9 GND12 GND117 Y17
C2 GND13 GND118 Y19
C34 GND14 GND119 Y21
E12 GND15 GND121 Y23
GND122 Y25

NB9P-GE2

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: <OrgAddr1>
Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 75 of 100
5 4 3 2 1
5 4 3 2 1

BOT SIDE LOWER SUB-PARTITION BOT SIDE LOWER SUB-PARTITION TOP SIDE
U7001B
+1.8VS U7601 U7602
1720 mA Place Near Balls +1.8VS FBA_CLK0 J8 CK
FBA_CLK0 J8 CK
FBAD0 R30 J23 FBA_CLK0# K8 B3 FBADQM3 FBA_CLK0# K8 B3 FBADQM1
FBAD1 FBA_D0 FBVDDQ18 FBA_CKE CK# UDM FBADQM2 FBA_CKE CK# UDM FBADQM0
R32 FBA_D1 FBVDDQ19 J24 K2 CKE LDM F3 K2 CKE LDM F3
FBAD2 P31 J29
FBAD3 FBA_D2 FBVDDQ20 FBA_RAS# FBAVREF0 FBA_RAS# FBAVREF0
N30 FBA_D3 FBVDDQ1 AA27 K7 RAS# VREF J2 K7 RAS# VREF J2

2
FBAD4 L31 AA29 C7608 C7611 C7606 C7618 C7612 C7613 C7610 FBA_CAS# L7 FBA_CAS# L7
FBAD5 FBA_D4 FBVDDQ12 FBA_WE# CAS# FBA_WE# CAS#
M32 FBA_D5 FBVDDQ23 AA31 K3 WE# VDDQ1 E9 K3 WE# VDDQ1 E9
FBAD6 M30 AB27 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/6.3V 4.7UF/6.3V FBA_CS0# L8 G1 FBA_CS0# L8 G1

1
FBAD7 FBA_D6 FBVDDQ33 FBA_A13 CS# VDDQ2 FBA_A13 CS# VDDQ2
L30 AB29 R8 G3 R8 G3
FBAD8 P33
FBA_D7 FBVDDQ34
AC27
A13/NC VDDQ3
G7 +1.8VS A13/NC VDDQ3
G7 +1.8VS
FBAD9 FBA_D8 FBVDDQ35 @ @ @ FBA_BA0 VDDQ4 FBA_BA0 VDDQ4
P34 FBA_D9 FBVDDQ36 AD27 L2 BA0 VDDQ5 G9 L2 BA0 VDDQ5 G9
FBAD10 N35 AE27 FBA_BA1 L3 A9 FBA_BA1 L3 A9
FBAD11 FBA_D10 FBVDDQ37 FBA_BA2 BA1 VDDQ6 FBA_BA2 BA1 VDDQ6
P35 FBA_D11 FBVDDQ38 AJ28 L1 BA2/NC VDDQ7 C1 L1 BA2/NC VDDQ7 C1
FBAD12 N34 B18 FBA_A0 M8 C3 FBA_A0 M8 C3
FBA_D12 FBVDDQ2 A0 VDDQ8 A0 VDDQ8

1
D D
FBAD13 L33 E21 C7601 C7605 C7604 C7602 C7603 C7609 C7607 FBA_A1 M3 C7 FBA_A1 M3 C7
FBAD14 FBA_D13 FBVDDQ3 FBA_A2 A1 VDDQ9 FBA_A2 A1 VDDQ9
L32 FBA_D14 FBVDDQ4 G17 M7 A2 VDDQ10 C9 M7 A2 VDDQ10 C9
FBAD15 N33 G18 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 1UF/6.3V 1UF/6.3V FBA_A3 N2 FBA_A3 N2

2
FBAD16 FBA_D15 FBVDDQ5 FBA_A4 A3 FBA_A4 A3
K31 FBA_D16 FBVDDQ6 G22 mini-bus N8 A4 VDDL J1 mini-bus N8 A4 VDDL J1
FBAD17 K30 G8 FBA_A5 N3 FBA_A5 N3
FBAD18 FBA_D17 FBVDDQ7 @ @ @ @ FBA_A6 A5 FBA_A6 A5
G30 FBA_D18 FBVDDQ8 G9 N7 A6 VDD1 A1 N7 A6 VDD1 A1
FBAD19 K32 H29 FBA_A7 P2 E1 FBA_A7 P2 E1
FBAD20 FBA_D19 FBVDDQ9 FBA_A8 A7 VDD2 FBA_A8 A7 VDD2
G32 FBA_D20 FBVDDQ10 J14 P8 A8 VDD3 J9 P8 A8 VDD3 J9
FBAD21 H30 J15 FBA_A9 P3 M9 FBA_A9 P3 M9
FBAD22 F30
FBA_D21
FBA_D22
FBVDDQ11
FBVDDQ13 J16 PLACE BELOW GPU FBA_A10 M2
A9
A10/AP
VDD4
VDD5 R1 FBA_A10 M2
A9
A10/AP
VDD4
VDD5 R1
FBAD23 G31 J17 FBA_A11 P7 FBA_A11 P7
FBAD24 FBA_D23 FBVDDQ14 FBA_A12 A11 FBA_A12 A11
H33 FBA_D24 FBVDDQ15 J20 R2 A12 VSSQ1 E7 R2 A12 VSSQ1 E7
FBAD25 K35 J21 F2 F2
FBAD26 FBA_D25 FBVDDQ16 VSSQ2 VSSQ2
K33 FBA_D26 FBVDDQ17 J22 VSSQ3 F8 VSSQ3 F8
FBAD27 G34 H2 H2
FBAD28 FBA_D27 FBAD18 VSSQ4 FBAD1 VSSQ4
K34 FBA_D28 G8 DQ0 VSSQ5 H8 G8 DQ0 VSSQ5 H8
FBAD29 E33 FBAD17 G2 A7 FBAD7 G2 A7
FBAD30 FBA_D29 FBAD23 DQ1 VSSQ6 FBAD3 DQ1 VSSQ6
E34 FBA_D30 H7 DQ2 VSSQ7 B2 H7 DQ2 VSSQ7 B2
FBAD31 G33 FBAD19 H3 B8 FBAD6 H3 B8
FBAD32 FBA_D31 FBAD16 DQ3 VSSQ8 FBAD5 DQ3 VSSQ8
AG30 FBA_D32 H1 DQ4 VSSQ9 D2 H1 DQ4 VSSQ9 D2
FBAD33 AH31 FBAD20 H9 D8 FBAD2 H9 D8
FBAD34 FBA_D33 FBAD21 DQ5 VSSQ10 FBAD4 DQ5 VSSQ10
AG32 FBA_D34 F1 DQ6 F1 DQ6
FBAD35 AF31 FBAD22 F9 J7 FBAD0 F9 J7
FBAD36 FBA_D35 FBAD31 DQ7 VSSDL FBAD8 DQ7 VSSDL
AF30 FBA_D36 C8 DQ8 C8 DQ8
FBAD37 AD30 FBAD26 C2 A3 FBAD15 C2 A3
FBAD38 FBA_D37 FBAD29 DQ9 VSS1 FBAD10 DQ9 VSS1
AC32 FBA_D38 D7 DQ10 VSS2 J3 D7 DQ10 VSS2 J3
FBAD39 AE30 FBAD28 D3 N1 GND FBAD12 D3 N1 GND
FBAD40 FBA_D39 FBAD25 DQ11 VSS3 FBAD14 DQ11 VSS3
AE32 FBA_D40 D1 DQ12 VSS4 P9 D1 DQ12 VSS4 P9
FBAD41 AF33 FBAD30 D9 E3 FBAD11 D9 E3
FBAD42 FBA_D41 FBAD24 DQ13 VSS5 FBAD13 DQ13 VSS5
AF34 FBA_D42 B1 DQ14 B1 DQ14
FBAD43 AE35 FBAD27 B9 K9 FBA_ODT FBAD9 B9 K9 FBA_ODT
FBAD44 FBA_D43 DQ15 ODT DQ15 ODT
AE33 FBA_D44
FBAD45 AE34 FBADQS_WP3 B7 A2 FBADQS_WP1 B7 A2
FBAD46 FBA_D45 FBADQS_RN3 A8 UDQS NC1 FBADQS_RN1 A8 UDQS NC1
AC35 FBA_D46 UDQS# NC2 E2 UDQS# NC2 E2
FBAD47 AB32 FBADQS_WP2 F7 R3 FBADQS_WP0 F7 R3
FBAD48 FBA_D47 FBA_CKE FBADQS_RN2 E8 LDQS A14/NC FBADQS_RN0 E8 LDQS A14/NC
AN33 FBA_D48 LDQS# A15/NC R7 LDQS# A15/NC R7
FBAD49 AK32
FBAD50 FBA_D49 H5PS1G63EFR-S6 H5PS1G63EFR-S6
C AL33 FBA_D50
C

1
FBAD51 AM33 R7607 orignal footprint:nb_bga_84p_31_512x394_share 0315-00BB000
FBAD52 FBA_D51 FBA_A3
AL31 FBA_D52 FBA_CMD0 V32
FBAD53 AK30 W31 FBA_A0
FBAD54 FBA_D53 FBA_CMD1 FBA_A2 10KOhm
AJ30 FBA_D54 FBA_CMD2 U31
FBAD55 FBA_A1
AH30 Y32 UPPER SUB-PARTITION TOP SIDE UPPER SUB-PARTITION BOT SIDE

2
FBAD56 FBA_D55 FBA_CMD3 FBB_A3
AM35 FBA_D56 FBA_CMD4 AB35
FBAD57 AH33 AB34 FBB_A4
FBAD58 FBA_D57 FBA_CMD5 FBB_A5 GND U7603 U7604
AH35 FBA_D58 FBA_CMD6 W35
FBAD59 AH32 W33 FBA_CS1# 1 FBA_CLK1 J8 FBA_CLK1 J8
FBAD60 FBA_D59 FBA_CMD7 FBA_CS0# T7604 TPC28t FBA_CLK1# CK FBADQM5 FBA_CLK1# CK FBADQM7
AH34 FBA_D60 FBA_CMD8 W30 K8 CK# UDM B3 K8 CK# UDM B3
FBAD61 AM34 T34 FBA_WE# FBA_CKE K2 F3 FBADQM6 FBA_CKE K2 F3 FBADQM4
FBAD62 FBA_D61 FBA_CMD9 FBA_BA0 CKE LDM CKE LDM
AL35 FBA_D62 FBA_CMD10 T35
FBAD63 AJ33 AB31 FBA_CKE FBA_RAS# K7 J2 FBAVREF1 FBA_RAS# K7 J2 FBAVREF1
FBA_D63 FBA_CMD11 FBA_RST FBA_CAS# RAS# VREF FBA_CAS# RAS# VREF
FBA_CMD12 Y30 L7 CAS# L7 CAS#
Y34 FBB_A2 FBA_WE# K3 E9 FBA_WE# K3 E9
FBADQM0 FBA_CMD13 FBA_A12 FBA_CS0# WE# VDDQ1 FBA_CS0# WE# VDDQ1
P30 FBA_DQM0 FBA_CMD14 W32 L8 CS# VDDQ2 G1 L8 CS# VDDQ2 G1
FBADQM1 P32 AA30 FBA_RAS# FBA_A13 R8 G3 FBA_A13 R8 G3
FBADQM2 J30
FBA_DQM1 FBA_CMD15
AA32 FBA_A11 A13/NC VDDQ3
G7 +1.8VS A13/NC VDDQ3
G7 +1.8VS
FBADQM3 FBA_DQM2 FBA_CMD16 FBA_A10 FBA_RST FBA_ODT FBA_BA0 VDDQ4 FBA_BA0 VDDQ4
H34 FBA_DQM3 FBA_CMD17 Y33 L2 BA0 VDDQ5 G9 L2 BA0 VDDQ5 G9
FBADQM4 AF32 U32 FBA_BA1 FBA_BA1 L3 A9 FBA_BA1 L3 A9
FBA_DQM4 FBA_CMD18 BA1 VDDQ6 BA1 VDDQ6

1
FBADQM5 AF35 Y31 FBA_A8 R7612 FBA_BA2 L1 C1 FBA_BA2 L1 C1
FBADQM6 FBA_DQM5 FBA_CMD19 FBA_A9 FBA_A0 BA2/NC VDDQ7 FBA_A0 BA2/NC VDDQ7
AL32 FBA_DQM6 FBA_CMD20 U34 M8 A0 VDDQ8 C3 M8 A0 VDDQ8 C3
FBADQM7 AL34 Y35 FBA_A6 FBA_A1 M3 C7 FBA_A1 M3 C7
FBA_DQM7 FBA_CMD21 FBA_A5 10KOhm FBB_A2 A1 VDDQ9 FBB_A2 A1 VDDQ9
FBA_CMD22 W34 M7 A2 VDDQ10 C9 M7 A2 VDDQ10 C9
V30 FBA_A7 FBB_A3 N2 FBB_A3 N2

2
FBADQS_WP0 FBA_CMD23 FBA_A4 FBB_A4 A3 FBB_A4 A3
N31 FBA_DQS_WP0 FBA_CMD24 U35 mini-bus N8 A4 VDDL J1 mini-bus N8 A4 VDDL J1
FBADQS_WP1 L34 U30 FBA_CAS# GND FBB_A5 N3 FBB_A5 N3
FBADQS_WP2 FBA_DQS_WP1 FBA_CMD25 FBA_A13 FBA_A6 A5 FBA_A6 A5
J32 FBA_DQS_WP2 FBA_CMD26 U33 N7 A6 VDD1 A1 N7 A6 VDD1 A1
FBADQS_WP3 H35 AB30 FBA_BA2 FBA_A7 P2 E1 FBA_A7 P2 E1
FBADQS_WP4 FBA_DQS_WP3 FBA_CMD27 FBA_CMD28 FBA_A8 A7 VDD2 FBA_A8 A7 VDD2
AE31 FBA_DQS_WP4 FBA_CMD28 AB33 1 P8 A8 VDD3 J9 P8 A8 VDD3 J9
FBADQS_WP5 AC33 T33 T7603 TPC28t FBA_A9 P3 M9 FBA_A9 P3 M9
FBADQS_WP6 FBA_DQS_WP5 NC3 FBA_A10 A9 VDD4 FBA_A10 A9 VDD4
AJ32 FBA_DQS_WP6 NC4 W29 M2 A10/AP VDD5 R1 M2 A10/AP VDD5 R1
FBADQS_WP7 AJ34 FBA_A11 P7 FBA_A11 P7
FBA_DQS_WP7 R7601 475Ohm FBA_A12 A11 FBA_A12 A11
R2 A12 VSSQ1 E7 R2 A12 VSSQ1 E7
T32 FBA_CLK0 FBA_CLK0 1 2 F2 F2
FBADQS_RN0 FBA_CLK0 FBA_CLK0# FBA_CLK0# VSSQ2 VSSQ2
N32 FBA_DQS_RN0 FBA_CLK0_N T31 VSSQ3 F8 VSSQ3 F8
FBADQS_RN1 L35 AC31 FBA_CLK1 FBA_CLK1 1 2 H2 H2
B
FBADQS_RN2 FBA_DQS_RN1 FBA_CLK1 FBA_CLK1# FBA_CLK1# FBAD50 VSSQ4 FBAD39 VSSQ4 B
H31 FBA_DQS_RN2 FBA_CLK1_N AC30 G8 DQ0 VSSQ5 H8 G8 DQ0 VSSQ5 H8
FBADQS_RN3 G35 R7602 475Ohm FBAD54 G2 A7 FBAD33 G2 A7
FBADQS_RN4 FBA_DQS_RN3 FBAD48 DQ1 VSSQ6 FBAD38 DQ1 VSSQ6
AD32 FBA_DQS_RN4 H7 DQ2 VSSQ7 B2 H7 DQ2 VSSQ7 B2
FBADQS_RN5 AC34 FBAD49 H3 B8 FBAD32 H3 B8
FBADQS_RN6 FBA_DQS_RN5 FBAD55 DQ3 VSSQ8 FBAD36 DQ3 VSSQ8
AJ31 FBA_DQS_RN6 Near VRAM H1 DQ4 VSSQ9 D2 H1 DQ4 VSSQ9 D2
FBADQS_RN7 AJ35 FBAD52 H9 D8 FBAD35 H9 D8
FBA_DQS_RN7 R7606 60.4Ohm 1% FBAD53 DQ5 VSSQ10 FBAD34 DQ5 VSSQ10
F1 DQ6 F1 DQ6
1 2 FBAD51 F9 J7 FBAD37 F9 J7
P29
+1.8VS FBAD40 C8
DQ7 VSSDL FBAD58 C8
DQ7 VSSDL
NC5 FBAD42 DQ8 FBAD56 DQ8
R29 NC6 C2 DQ9 VSS1 A3 C2 DQ9 VSS1 A3
L29 T30 FBA_DEBUG 1 FBAD46 D7 J3 FBAD60 D7 J3
NC7 FBA_DEBUG T0401 TPC28t FBAD43 DQ10 VSS2 GND FBAD63 DQ10 VSS2 GND
M29 NC8 D3 DQ11 VSS3 N1 D3 DQ11 VSS3 N1
AD29 FBAD41 D1 P9 FBAD61 D1 P9
+1.8VS AE29
NC9 FBAD47 D9
DQ12 VSS4
E3 FBAD59 D9
DQ12 VSS4
E3
NC10 FBAD45 DQ13 VSS5 FBAD62 DQ13 VSS5
AG29 NC11 B1 DQ14 B1 DQ14
AH29 FBAD44 B9 K9 FBA_ODT FBAD57 B9 K9 FBA_ODT
NC12 DQ15 ODT DQ15 ODT
1

R7604 25+25 mA +1.1VS FBADQS_WP5 B7


UDQS NC1 A2 FBADQS_WP7 B7
UDQS NC1 A2
1

C7617 L7601 FBADQS_RN5 A8 E2 FBADQS_RN7 A8 E2


1% FB_PLLAVDD0 FBADQS_WP6 F7 UDQS# NC2 FBADQS_WP4 F7 UDQS# NC2
FB_DLLAVDD0 AG27 1 2 LDQS A14/NC R3 LDQS A14/NC R3
1KOhm 0.01UF/25V AF27 FBADQS_RN6 E8 R7 FBADQS_RN4 E8 R7
2

FB_PLLAVDD0 LDQS# A15/NC LDQS# A15/NC


1

@ @ C7644 C7614 C7619 C7615 180Ohm/100Mhz


2

H5PS1G63EFR-S6 H5PS1G63EFR-S6
FB_VREF1 J27 0.01UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V
2

FB_VREF
1

R7605 NB9P-GE2 +1.8VS


1

C7616
1%
1KOhm 0.01UF/25V
2

@ @
2

2
C7638 C7637 C7635 C7624 C7621 C7633 C7628 C7622 C7625 C7626
+1.8VS +1.8VS
0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/6.3V 4.7UF/6.3V
2

1
2

A @ @ @ @ A
R7609 R7611
DDR2: VREF = 0.5 * FBVDDQ
DDR3: VREF = 0.7 * FBVDDQ 1KOhm 1KOhm
1

1
GPU Internal VREF R7604,R7605,C7617,C7616 no-stuff 1% 1% C7640 C7639 C7634 C7630 C7629 C7636 C7631 C7632 C7627 C7623 C7643 C7642
1

FBAVREF0 FBAVREF1
1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

2
2

2
1

R7608 C0441 R7610 C0420


@ @ @ @ @ @
1KOhm 0.047UF/16V 1KOhm 0.047UF/16V
2

1% 1% Title : F/B A GPU


1

PEGATRON COMPUTER INC Engineer: <OrgAddr1>


GND GND Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 76 of 100
5 4 3 2 1
5 4 3 2 1

BOT SIDE +1.8VS LOWER SUB-PARTITION TOP SIDE LOWER SUB-PARTITION BOT SIDE
U7001C 1720 mA
orignal footprint:nb_bga_84p_31_512x394_share
FBCD0 D11 N27 U7701 U7702
FBCD1 FBC_D0 FBVDDQ21 FBC_CLK0 FBC_CLK0
E11 FBC_D1 FBVDDQ22 P27 J8 CK J8 CK

2
FBCD2 F10 R27 C7712 C7723 C7716 C7718 FBC_CLK0# K8 B3 FBCDQM3 FBC_CLK0# K8 B3 FBCDQM1
FBCD3 FBC_D2 FBVDDQ24 FBC_CKE CK# UDM FBCDQM2 FBC_CKE CK# UDM FBCDQM0
D8 FBC_D3 FBVDDQ25 T27 K2 CKE LDM F3 K2 CKE LDM F3
FBCD4 F8 U27 0.1UF/10V 0.1UF/10V 1UF/6.3V 4.7UF/6.3V

1
FBCD5 FBC_D4 FBVDDQ26 FBC_RAS# FBCVREF0 FBC_RAS# FBCVREF0
F9 FBC_D5 FBVDDQ27 U29 K7 RAS# VREF J2 K7 RAS# VREF J2
FBCD6 E8 V27 FBC_CAS# L7 FBC_CAS# L7
FBCD7 FBC_D6 FBVDDQ28 @ FBC_WE# CAS# FBC_WE# CAS#
F12 FBC_D7 FBVDDQ29 V29 K3 WE# VDDQ1 E9 K3 WE# VDDQ1 E9
FBCD8 B11 V34 FBC_CS0# L8 G1 FBC_CS0# L8 G1
FBCD9 FBC_D8 FBVDDQ30 FBC_A13 CS# VDDQ2 FBC_A13 CS# VDDQ2
C13 W27 R8 G3 R8 G3
FBCD10 A11
FBC_D9 FBVDDQ31
Y27
A13/NC VDDQ3
G7 +1.8VS A13/NC VDDQ3
G7 +1.8VS
FBC_D10 FBVDDQ32 VDDQ4 VDDQ4

1
FBCD11 B8 C7711 C7721 C7710 C7707 FBC_BA0 L2 G9 FBC_BA0 L2 G9
FBCD12 FBC_D11 FBC_BA1 BA0 VDDQ5 FBC_BA1 BA0 VDDQ5
D
A8 FBC_D12 L3 BA1 VDDQ6 A9 L3 BA1 VDDQ6 A9 D
FBCD13 C8 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V FBC_BA2 L1 C1 FBC_BA2 L1 C1

2
FBCD14 FBC_D13 FBC_A0 BA2/NC VDDQ7 FBC_A0 BA2/NC VDDQ7
C11 FBC_D14 M8 A0 VDDQ8 C3 M8 A0 VDDQ8 C3
FBCD15 C10 FBC_A1 M3 C7 FBC_A1 M3 C7
FBCD16 FBC_D15 FBC_A2 A1 VDDQ9 FBC_A2 A1 VDDQ9
D12 FBC_D16 M7 A2 VDDQ10 C9 M7 A2 VDDQ10 C9
FBCD17 E13 FBC_A3 N2 FBC_A3 N2
FBCD18 FBC_D17 FBC_A4 A3 FBC_A4 A3
F17 FBC_D18 mini-bus N8 A4 VDDL J1 mini-bus N8 A4 VDDL J1
FBCD19 F15 FBC_A5 N3 FBC_A5 N3
FBCD20 FBC_D19 FBC_A6 A5 FBC_A6 A5
F16 FBC_D20 N7 A6 VDD1 A1 N7 A6 VDD1 A1
FBCD21 E16 FBC_A7 P2 E1 FBC_A7 P2 E1
FBCD22 FBC_D21 FBC_A8 A7 VDD2 FBC_A8 A7 VDD2
F14 FBC_D22 P8 A8 VDD3 J9 P8 A8 VDD3 J9
FBCD23 F13 Main source: FBC_A9 P3 M9 FBC_A9 P3 M9
FBCD24 FBC_D23 FBC_A10 A9 VDD4 FBC_A10 A9 VDD4
D13 FBC_D24 M2 A10/AP VDD5 R1 M2 A10/AP VDD5 R1
FBCD25 A13 Hynix DDR2 64M*16 500Hz/1.8V FBC_A11 P7 FBC_A11 P7
FBCD26 FBC_D25 FBC_A12 A11 FBC_A12 A11
B13 FBC_D26 H5PS1G63EFR-20L(0315-00AZ000) R2 A12 VSSQ1 E7 R2 A12 VSSQ1 E7
FBCD27 A14 F2 F2
FBCD28 FBC_D27 VSSQ2 VSSQ2
C16 FBC_D28 VSSQ3 F8 VSSQ3 F8
FBCD29 A17 Second source: H2 H2
FBCD30 FBC_D29 FBCD18 VSSQ4 FBCD6 VSSQ4
B16 FBC_D30 G8 DQ0 VSSQ5 H8 G8 DQ0 VSSQ5 H8
FBCD31 D16 SAMSUNG DDR2 64M*16 500Hz/1.8V FBCD19 G2 A7 FBCD1 G2 A7
FBCD32 FBC_D31 FBCD17 DQ1 VSSQ6 FBCD5 DQ1 VSSQ6
D24 FBC_D32 K4N1G164QQ-HC20(0315-002E0AS) H7 DQ2 VSSQ7 B2 H7 DQ2 VSSQ7 B2
FBCD33 D26 FBCD23 H3 B8 FBCD2 H3 B8
FBCD34 FBC_D33 FBCD22 DQ3 VSSQ8 FBCD7 DQ3 VSSQ8
E25 FBC_D34 H1 DQ4 VSSQ9 D2 H1 DQ4 VSSQ9 D2
FBCD35 F25 FBCD21 H9 D8 FBCD4 H9 D8
FBCD36 FBC_D35 FBCD16 DQ5 VSSQ10 FBCD0 DQ5 VSSQ10
F27 FBC_D36 F1 DQ6 F1 DQ6
FBCD37 E28 FBCD20 F9 J7 FBCD3 F9 J7
FBCD38 FBC_D37 FBCD29 DQ7 VSSDL FBCD13 DQ7 VSSDL
F28 FBC_D38 C8 DQ8 C8 DQ8
FBCD39 D29 FBCD26 C2 A3 FBCD8 C2 A3
FBCD40 FBC_D39 FBCD28 DQ9 VSS1 FBCD11 DQ9 VSS1
A25 FBC_D40 D7 DQ10 VSS2 J3 D7 DQ10 VSS2 J3
FBCD41 B25 FBCD30 D3 N1 GND FBCD14 D3 N1 GND
FBCD42 FBC_D41 FBCD24 DQ11 VSS3 FBCD9 DQ11 VSS3
D25 FBC_D42 D1 DQ12 VSS4 P9 D1 DQ12 VSS4 P9
FBCD43 C26 FBCD31 D9 E3 FBCD12 D9 E3
FBCD44 FBC_D43 FBCD25 DQ13 VSS5 FBCD10 DQ13 VSS5
C28 FBC_D44 B1 DQ14 B1 DQ14
FBCD45 B28 FBCD27 B9 K9 FBC_ODT FBCD15 B9 K9 FBC_ODT
FBCD46 FBC_D45 DQ15 ODT DQ15 ODT
A28 FBC_D46
FBCD47 A29 FBCDQS_WP3 B7 A2 FBCDQS_WP1B7 A2
FBCD48 FBC_D47 FBCDQS_RN3 UDQS NC1 FBCDQS_RN1 A8 UDQS NC1
E29 FBC_D48 A8 UDQS# NC2 E2 UDQS# NC2 E2
FBCD49 F29 FBCDQS_WP2 F7 R3 FBCDQS_WP0 F7 R3
FBCD50 FBC_D49 FBC_A3 FBCDQS_RN2 LDQS A14/NC FBCDQS_RN0 E8 LDQS A14/NC
C D30 FBC_D50 FBC_CMD0 C17 E8 LDQS# A15/NC R7 LDQS# A15/NC R7 C
FBCD51 E31 B19 FBC_A0
FBCD52 FBC_D51 FBC_CMD1 FBC_A2 H5PS1G63EFR-S6 H5PS1G63EFR-S6
C33 FBC_D52 FBC_CMD2 D18
FBCD53 D33 F21 FBC_A1
FBCD54 FBC_D53 FBC_CMD3 FBD_A3
F32 FBC_D54 FBC_CMD4 A23
FBCD55 E32 D21 FBD_A4
FBCD56 FBC_D55 FBC_CMD5 FBD_A5
B29 FBC_D56 FBC_CMD6 B23
FBCD57 C29 E20 FBC_CS1# 1 T7704
FBCD58 FBC_D57 FBC_CMD7 FBC_CS0#
B31 FBC_D58 FBC_CMD8 G21
FBCD59 FBC_WE#
FBCD60
C31
B32
FBC_D59 FBC_CMD9 F20
F19 FBC_BA0
UPPER SUB-PARTITION BOT SIDE UPPER SUB-PARTITION TOP SIDE
FBCD61 FBC_D60 FBC_CMD10 FBC_CKE U7703 U7704
C32 FBC_D61 FBC_CMD11 F23
FBCD62 B34 A22 FBC_RST FBC_CLK1 J8 FBC_CLK1 J8
FBCD63 FBC_D62 FBC_CMD12 FBD_A2 FBC_CLK1# CK FBCDQM7 FBC_CLK1# CK FBCDQM5
B35 FBC_D63 FBC_CMD13 C22 K8 CK# UDM B3 K8 CK# UDM B3
B17 FBC_A12 FBC_CKE K2 F3 FBCDQM6 FBC_CKE K2 F3 FBCDQM4
FBC_CMD14 FBC_RAS# CKE LDM CKE LDM
FBC_CMD15 F24
FBCDQM0 F11 C25 FBC_A11 FBC_RAS# K7 J2 FBCVREF1 FBC_RAS# K7 J2 FBCVREF1
FBCDQM1 FBC_DQM0 FBC_CMD16 FBC_A10 FBC_CAS# RAS# VREF FBC_CAS# RAS# VREF
D10 FBC_DQM1 FBC_CMD17 E22 L7 CAS# L7 CAS#
FBCDQM2 D15 C20 FBC_BA1 FBC_WE# K3 E9 FBC_WE# K3 E9
FBCDQM3 FBC_DQM2 FBC_CMD18 FBC_A8 FBC_RST FBC_ODT FBC_CS0# WE# VDDQ1 FBC_CS0# WE# VDDQ1
A16 FBC_DQM3 FBC_CMD19 B22 L8 CS# VDDQ2 G1 L8 CS# VDDQ2 G1
FBCDQM4 D27 A19 FBC_A9 FBC_A13 R8 G3 FBC_A13 R8 G3
FBCDQM5 D28
FBC_DQM4 FBC_CMD20
D22 FBC_A6 A13/NC VDDQ3
G7 +1.8VS A13/NC VDDQ3
G7 +1.8VS
FBC_DQM5 FBC_CMD21 VDDQ4 VDDQ4

1
FBCDQM6 D34 D20 FBC_A5 R7713 FBC_BA0 L2 G9 FBC_BA0 L2 G9
FBCDQM7 FBC_DQM6 FBC_CMD22 FBC_A7 FBC_BA1 BA0 VDDQ5 FBC_BA1 BA0 VDDQ5
A34 FBC_DQM7 FBC_CMD23 E19 L3 BA1 VDDQ6 A9 L3 BA1 VDDQ6 A9
D19 FBC_A4 FBC_BA2 L1 C1 FBC_BA2 L1 C1
FBC_CMD24 FBC_CAS# 10KOhm FBC_A0 BA2/NC VDDQ7 FBC_A0 BA2/NC VDDQ7
FBC_CMD25 F18 M8 A0 VDDQ8 C3 M8 A0 VDDQ8 C3
FBCDQS_WP0 E10 C19 FBC_A13 FBC_A1 M3 C7 FBC_A1 M3 C7

2
FBCDQS_WP1 FBC_DQS_WP0 FBC_CMD26 FBC_BA2 FBD_A2 A1 VDDQ9 FBD_A2 A1 VDDQ9
A10 FBC_DQS_WP1 FBC_CMD27 F22 M7 A2 VDDQ10 C9 M7 A2 VDDQ10 C9
FBCDQS_WP2 D14 C23 1 T7703 FBD_A3 N2 FBD_A3 N2
FBCDQS_WP3 FBC_DQS_WP2 FBC_CMD28 GND FBD_A4 A3 FBD_A4 A3
C14 FBC_DQS_WP3 NC13 B20 mini-bus N8 A4 VDDL J1 mini-bus N8 A4 VDDL J1
FBCDQS_WP4 E26 A20 FBD_A5 N3 FBD_A5 N3
FBCDQS_WP5 FBC_DQS_WP4 NC14 FBC_A6 A5 FBC_A6 A5
B26 FBC_DQS_WP5 N7 A6 VDD1 A1 N7 A6 VDD1 A1
FBCDQS_WP6 D32 FBC_A7 P2 E1 FBC_A7 P2 E1
FBCDQS_WP7 FBC_DQS_WP6 FBC_A8 A7 VDD2 FBC_A8 A7 VDD2
A32 FBC_DQS_WP7 P8 A8 VDD3 J9 P8 A8 VDD3 J9
FBC_CKE FBC_A9 P3 M9 FBC_A9 P3 M9
R7704 475Ohm FBC_A10 A9 VDD4 FBC_A10 A9 VDD4
M2 A10/AP VDD5 R1 M2 A10/AP VDD5 R1

1
FBCDQS_RN0 D9 FBC_CLK0 1 2 R7710 FBC_A11 P7 FBC_A11 P7
FBCDQS_RN1 FBC_DQS_RN0 FBC_CLK0# FBC_A12 A11 FBC_A12 A11
B
B10 FBC_DQS_RN1 R2 A12 VSSQ1 E7 R2 A12 VSSQ1 E7 B
FBCDQS_RN2 E14 E17 FBC_CLK0 FBC_CLK1 1 2 F2 F2
FBCDQS_RN3 FBC_DQS_RN2 FBC_CLK0 FBC_CLK0# FBC_CLK1# 10KOhm VSSQ2 VSSQ2
B14 FBC_DQS_RN3 FBC_CLK0_N D17 VSSQ3 F8 VSSQ3 F8
FBCDQS_RN4 F26 D23 FBC_CLK1 R7705 475Ohm H2 H2
2

FBCDQS_RN5 FBC_DQS_RN4 FBC_CLK1 FBC_CLK1# FBCD48 VSSQ4 FBCD38 VSSQ4


A26 FBC_DQS_RN5 FBC_CLK1_N E23 G8 DQ0 VSSQ5 H8 G8 DQ0 VSSQ5 H8
FBCDQS_RN6 D31 Near VRAM FBCD55 G2 A7 FBCD34 G2 A7
FBCDQS_RN7 FBC_DQS_RN6 GND FBCD52 DQ1 VSSQ6 FBCD36 DQ1 VSSQ6
A31 FBC_DQS_RN7 H7 DQ2 VSSQ7 B2 H7 DQ2 VSSQ7 B2
R7709 1 2 60.4Ohm 1% FBCD53 H3 B8 FBCD33 H3 B8
+1.8VS FBCD51 H1
DQ3 VSSQ8
D2 FBCD32 H1
DQ3 VSSQ8
D2
FBC_DEBUG FBCD49 DQ4 VSSQ9 FBCD39 DQ4 VSSQ9
G11 NC15 FBC_DEBUG G19 1 H9 DQ5 VSSQ10 D8 H9 DQ5 VSSQ10 D8
G12 T7701 TPC28t FBCD54 F1 FBCD35 F1
NC16 FBCD50 DQ6 FBCD37 DQ6
G14 NC17 F9 DQ7 VSSDL J7 F9 DQ7 VSSDL J7
G15 FBCD59 C8 FBCD47 C8
NC18 +1.1VS FBCD61 DQ8 FBCD41 DQ8
G24 NC19 C2 DQ9 VSS1 A3 C2 DQ9 VSS1 A3
G25 FBCD57 D7 J3 FBCD46 D7 J3
NC20 DQ10 VSS2 DQ10 VSS2
G27 NC21 25+25 mA L7701 FBCD60 D3 DQ11 VSS3 N1 GND FBCD40 D3 DQ11 VSS3 N1 GND
G28 J19 FB_PLLAVDD1 1 2 FBCD63 D1 P9 FBCD42 D1 P9
NC22 FB_DLLAVDD1 FBCD56 DQ12 VSS4 FBCD45 DQ12 VSS4
FB_PLLAVDD1 J18 D9 DQ13 VSS5 E3 D9 DQ13 VSS5 E3
1

C7750 C7701 C7702 C7703 180Ohm/100Mhz FBCD62 B1 FBCD43 B1


FBCD58 DQ14 FBC_ODT FBCD44 DQ14 FBC_ODT
B9 DQ15 ODT K9 B9 DQ15 ODT K9
K27 FBCAL_PD R7714 1 1% 2 30.1Ohm 0.01UF/16V 0.1UF/16V 0.1UF/16V 1UF/6.3V
+1.8VS
2

FB_CAL_PD_VDDQ FBCAL_PU R7708 1 1% 2 36.5Ohm FBCDQS_WP7 FBCDQS_WP5


FB_CAL_PU_GND L27 B7 UDQS NC1 A2 B7 UDQS NC1 A2
M27 FBCAL_TERM R7717 1 1% 2 40.2Ohm FBCDQS_RN7 A8 E2 FBCDQS_RN5 A8 E2
FB_CAL_TERM_GND @ FBCDQS_WP6 UDQS# NC2 FBCDQS_WP4 UDQS# NC2
F7 LDQS A14/NC R3 F7 LDQS A14/NC R3
FBCDQS_RN6 E8 R7 FBCDQS_RN4 E8 R7
LDQS# A15/NC LDQS# A15/NC
NB9P-GE2
FBVDDQ FBCAL_PD_GND FBCAL_PU_GND FBCAL_thrm_GND H5PS1G63EFR-S6 H5PS1G63EFR-S6
+1.8VS
DDRII 1.8V 30.1 ohm 36.5 ohm 40.2 ohm

2
C7728 C7731 C7704 C7706 C7739 C7708

+1.8VS +1.8VS 0.1UF/10V 0.1UF/10V 0.1UF/10V 0.1UF/10V 4.7UF/6.3V 4.7UF/6.3V

1
2

A A
R7707 R7712
1

1
1KOhm 1KOhm C7732 C7734 C7719 C7715 C7714 C7717 C7736 C7705
1% 1%
1

FBCVREF0 FBCVREF1 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V 1UF/6.3V
2

2
2

2
1

R7706 C7725 R7711 C7724 @ @

1KOhm 0.047UF/16V 1KOhm 0.047UF/16V


2

1% 1% Title : F/B C GPU


1

PEGATRON COMPUTER INC Engineer: <OrgAddr1>


GND GND Size Project Name
F83Vf Rev
C 1.1
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 77 of 100
5 4 3 2 1
5 4 3 2 1

IMON=Gm(IMON) * [ (Vcsp1-Vcsn1) + (Vcsp2-Vcsn2) ]


RIMON = 0.9V / [ IMAX * Rsense(MIN) * Gm(IMON_MIN)] AC_BAT_SYS

Gm(IMON) = 2.4mS , Gm(IMON_MIN) = 2.36mS AC_BAT_SYS

10UF/25V
10UF/25V
MLCC/+/-10%
C8014

MLCC/+/-10%

MLCC/+/-10%
1UF/25V
MLCC/+/-10%
1

1
c1206_h75

c1206_h75
Q8000 Q8001
SIR474DP SIR474DP

C8029
1000PF/50V
D D

2
C8006

C8030
D @ D
C8021 1000PF/50V @ 4 4
2 1 CSP1 G S G S
2009/06/22

2Ohm
PCPU_GND1

1
2
3

1
2
3
2
TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8047 T8052 T8046 T8044 T8049 T8045 T8035
OCP>54.45A

R8043
Ipp=9.185A (50A)

1
C8022 0.1UF/16V @ C8019
VR_VID6 <4>

1
2 1 CSN1 2 1 VR_VID5 <4>
TPC28T Fsw=300KHZ +VCORE
T8016
VR_VID4 <4>
Close to 0.22UF/10V L8000
VR_VID3 <4>
Phase 1 VR_VID2 <4> 1 2

1
JP8004
Low_side VR_VID1 <4>

2
R_A_GND 0.36UH

470UF/2V

CE8001 220UF/2V
ESR=9mOhm/Ir=3A

ESR=9mOhm/Ir=3A
1 2 VR_VID0 <4>

2
MOSFET

SI7170DP-T1-GE3

SI7170DP-T1-GE3
TPC28T R8035

SHORT_PIN

SHORT_PIN
5

JP8000

JP8006
T8048 TPC28T 4.7OHM
SHORT_PIN T8053 r0805_h24

1
5 D
6
7
8

5 D
6
7
8
1 2 + +

1
<3,11,20> H_DPRSTP#

Q8004

Q8005
TPC28T @

CE8000
T8056 JP8001 SHORTPIN

1000PF/50V

1
1

C8033
S

2
C8002

G
@ @
1

2.2KOhm
@ R8028 1%

45
44
43
42
41

40
39
38
37
36
35
34
33
32
31
+5VS 1 2 1 2 1 2 2 1

4
3
2
1

4
3
2
1

R8019
R8039 13KOhm U8000 R8021 @ 1 2
R8038 100KOhm 0.22UF/25V

GND5
GND4
GND3
GND2
GND1

CSN1
CSP1
D6
D5
D4
D3
D2
D1
D0
DPRSTP#
<30> PWR_MON 0Ohm
2.49KOhm 20KOhm
RIMON PCPU_GND1 R8041 R8040

1
R8023 10Ohm_0805 MLCC/+/-10% C8020 R8027 1 2 1 2
2 1 0.1UF/25V 2 1 1 2 1 PVCC 30 2009/07/02 Close to
C +5VS PGDIN BST1 C
1KOhm 2 29 10KOhm Phase 1
VSSSENSE THRM LX1 r0402_h22
1 2 3 IMON DH1 28 Inductor
1

C8013 9.53KOhm R8037 R1.0-->R1.1 4 27 R8014 CSP1


1UF/25V R_A_GND ILIM DL1 PVCC CSN1
1 2 1 2 5 TIME VDD 26 1 2 +5VS
MLCC/+/-10% TPC28T R8033 64.9KOhm R8032 7.5KOhm 6 25
2

T8054 +VCORE VCC VRHOT# 0Ohm AC_BAT_SYS


1 2 7 CCI DL2 24
R_A_GND C8005 1000PF/50V

1UF/25V
09/02/13 8 FB DH2 23

C8031 10UF/25V

C8032 10UF/25V
1 2 1 2 9 22

MLCC/+/-10%
DPRSLPVR
<4> VCCSENSE
1

FBAC LX2

PHASEGD

C8015

MLCC/+/-10%

MLCC/+/-10%
10 GNDS BST2 21
1

CLKEN#
PWRGD
R8020 R8022

MLCC/+/-10%
C8011 1UF/25V
RFB

SHDN#

1
1KOhm @
CSN2
CSP2

c1206_h75

c1206_h75
10Ohm 3.6KOhm

V3P3
PSI#
TON
1

5
C8009 @ C8026 Q8002 D Q8003 D
2

C8023
1000PF/50V 1000PF/50V

1000PF/50V
2

2
MAX17033GTL 1 2 2 1
2

11
12
13
14
15
16
17
18
19
20

2
TPC28T R_A_GND R8016 4 4

R8015
T8057 0.22UF/25V G S G S
C8018 0Ohm

1
C8003

200KOhm
1 2 2 1 SIR474DP SIR474DP 2009/06/22
<4> VSSSENSE
1

1
2
3

1
2
3
1
2Ohm

R8024 0Ohm_0402 C8004 0.1UF/16V @ @

PVCC
1

2 1 CSN2 0.22UF/10V PCPU_GND2

C8007 @
2

R8042

R8036

1000PF/50V C8024 TPC28T


2

1000PF/50V @ T8014
1

R_A_GND 2 1 CSP2 Tsw = 16.3pF * (RTON +6.5K) L8001


AC_BAT_SYS

TPC28T 1 2

1
T8051

470UF/2V

CE8005 220UF/2V
ESR=9mOhm/Ir=3A

ESR=9mOhm/Ir=3A
<30> CPU_VRON 0.36UH
2009/07/02

2
SHORT_PIN

SHORT_PIN
1 2 DCR = 1m OHM
1

<93> CPU_VRON_PWR

JP8007

JP8008
SI7170DP-T1-GE3

SI7170DP-T1-GE3

MLCC/+/-10%
5

1
JP8009 SHORTPIN R8034 + +

0.1UF/25V
B B
1

1
C8027
C8010 1UF/25V

+3VS 4.7OHM

5 D
6
7
8

5 D
6
7
8

CE8002
C8012 @ r0805_h24

Q8006

Q8007
0.047UF/16V
2

2
1

MLCC/+/-10% TPC28T TPC28T TPC28T TPC28T @


T8050 T8041 T8055 T8036

1000PF/50V
@

2
C8025
G

2.2KOhm
R8018 1%
2

R8017
R8005 @ 1 2
1

4
3
2
1

4
3
2
1
1 2 499Ohm 2009/07/03

2
<11,22> PM_DPRSLPVR @ 2.49KOhm 20KOhm
1 2 R8044 R8029

1
<3> PM_PSI# PCPU_GND2 1 2 1 2
JP8002 SHORTPIN 1 2 Close to
<22> CLK_EN#
10KOhm Phase 2
1 2 JP8003 SHORTPIN r0402_h22
<30,32,92> VRM_PWRGD Inductor
JP8005 SHORTPIN

CSP2

CSN2

TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
T8005 T8030 T8006 T8004 T8009 T8001 T8019 T8011 T8025 T8015 T8028 T8012 T8026 T8007 T8017 T8027
1

+VCORE

A A

TPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28TTPC28T
RFB = Rdroop / (Rsense * Gm) T8008 T8024 T8010 T8032 T8003 T8013 T8018 T8022 T8020 T8023 T8029 T8031 T8000 T8002 T8021 T8033

Gm = 600uS , R8022 for load lin <Variant Name>


1

Title : POWER_VCORE
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 80 of 94
5 4 3 2 1
5 4 3 2 1

SKIP: TON:(5V/3.3V)
GND : DEM operation; VCC:(200kHz/250kHz)
REF : Ultrasonic Mode operation; REF:(300kHz/375kHz) VENLDO:
VCC : PWM operation. GND:(400kHz/500kHz) Rising Edge:Max:2V;Typ:1.6V;Min:1.2V
Falling Edge:Max:1.06V;Typ:1V;Min:0.94V

<82,83,85,91,93> SUSB#_PWR
AC_BAT_SYS
R8128
10Ohm
D D
09/04/17 2 1 +5VAO

1
2009/06/22

2
R8123 C8115

1
0Ohm R8139 1UF/6.3V

1
r0402_h16 0Ohm MLCC/+/-10% C8113

1
R8126 @ @ R8141 1UF/6.3V

2
R8114 100KOhm 0Ohm MLCC/+/-10%

2
SKIP# 0Ohm 5% @

1
GND_17020

2
2
GND_17020 Iin=2.78A
R8105 Iin=2.99A
0Ohm R8122 @
r0402_h16 1 2

1
@ 0Ohm C8102

10UF/25V_1206
1

2
+5VAO 0.1UF/25V C8117

5
6
7
8
C8118
R8146 @ 10UF/25V_1206

2
2

2
C8105 C8112 150KOhm R8117 GND_17020 Q8102

D
0.1UF/25V MLCC/+/-10% 1 2 R8142 SI4134DY-T1-GE3

1
MLCC/+/-10% 0.1UF/25V C8108 0Ohm

S
1

1
8
7
6
5
OCP>8.7A 4.7UF/6.3V 0Ohm OCP>7.9A
Q8100 MLCC/+/-10%

D
4.966V~~~5.217V 3.285V~~~3.375V

4
3
2
1
SI4134DY-T1-GE3 GND_17020 GND_17020

1
Ipp=3.72A LIR=0.62 C8109 Ipp=2.2A LIR=0.37

G
S
Fsw=300KHZ GND_17020 0.22UF/10V 40mil Fsw=375KHZ

1
2
3
4

2
8
7
6
5
4
3
2
1
+5VO GND_17020 +3VO
40mil 2009/06/18

LDO
VIN

ENLDO
VCC
TON
NC2

NC1

REF
(Max:5.68A) DCR:Typ=28mOhm;Max=30mOhm Separate (MAX:5.712A)
JP8100 (5.99A) 10mil GND2 33 (6.432A) JP8101
@ L8100 9 32 +3VO_FB R8124 40mil L8101 @
BYP FB2
+5VSUS 1 1 2 2 +5VO 1 2
R8125
10
11
VOUT1 ILIM2 31
30
1 2 1 2 +3VO 1 1 2 2
+3VA
FB1 VOUT2
(0.31A) 1MM_OPEN_5MIL 3.3UH 40mil 2 1 12 ILIM1 SKIP# 29 SKIP# 330KOHM 3.3UH 1MM_OPEN_5MIL
(0.22A)
Irat=6A SUS_PWRGD 13 28 GND_17020 Irat=6A
ESR=35mOHM/Ir=1400mA

ESR=35mOhm/Ir=1400mA
PGOOD1 U8100A PGOOD2

2
2009/06/18 R8115 330KOHM ENBL 14 27 2 R8113 1 +5VAO 2009/06/18
CE8101 100UF/6.3V

EN1 EN2

2
2.2Ohm@ GND_17020 0Ohm R8116

CE8103 150UF/4V
15 UGATE1 UGATE2 26
C 5% 16 25 2.2Ohm C
PHASE1 PHASE2
1

8
7
6
5

5
6
7
8

1
r1206 5% +
1

1
LGATE1

LGATE2
C8103 Q8101 OCP Set Q8103 r1206 @ JP8104 2009/06/22

D
SHORT_PIN

SHORT_PIN

BOOT1

BOOT2
SECFB
D
1

PGND
PVCC

GND1
1UF/10V SI4134DY-T1-GE3 SI4134DY-T1-GE3 SHORT_PIN C8100
2

1
2

2
JP8105

JP8109

1UF/10V

G
G

2
S

C8110 C8111
2

C8125 0.1UF/25V RT8206AGQW MLCC/+/-10%


1
2
3
4

17
18
19
20
21
22
23
24

4
3
2
1

1
1500PF/50V MLCC/+/-10% R8120 R8119 0.1UF/25V C8126
1

1
2009/06/22 2009/06/18 MLCC+/-10% 0Ohm 0Ohm 1500PF/50V
2

@ 2 1 2 1 40mil MLCC+/-10%

2
40mil @
DL1
(3.3V:375kHz)
(5V:300kHz)
+5VAO GND_17020

2
(Typ: Rdson = 14.5m OHM)

1
(Typ: Rdson = 14.5m OHM) C8137 39PF/50V @
JP8108 (Max: Rdson = 17.5m OHM)
2

1
@ C8114 1 2 R8112 C8135
(Max: Rdson = 17.5m OHM)
1

+5VAO 1 2 +5VA 1UF/6.3V 13.3KOhm 39PF/50V

2
1 2 C8134 R8108 MLCC/+/-10% R8127 @ 1%

1
1MM_OPEN_5MIL 39PF/50V 30.9KOhm SECFB 1 2 +3VO_FB
+15VO
2

2
@ 1% FB1=2V(T=1.25%) @ C8138
1
2

C8136 GND_17020 200KOhm *SECFB:2V(T=4%) FB1=2V(T=1.25%) 0.1UF/25V

2
0.1UF/25V @

1
2

JP8110 R8111
1

@ R8132 20KOhm
R8109 2 1 39KOHM 1%
20KOhm @

1
1% SUS_PWRGD U8100B 09/05/18
<22,30,92> SUS_PWRGD
1

SHORT_PIN
34 GND3
GND_17020 35
ENBL GND_17020 GND4
<91> 5VO_ENBL 36 GND5
GND_17020 GND_17020 37 GND_17020 GND_17020
GND6
RT8206AGQW TPC26TTPC26TTPC26TTPC26T
T8110 T8103 T8114 T8120

+5VO

1
B B

2009/07/02 TPC26TTPC26TTPC26TTPC26T
+12VSUS +5VO T8134 T8132 T8135 T8121

1 +5VSUS

1
3

1
2 C8122 @
1UF/25V
D8104 MLCC/+/-10% TPC26TTPC26TTPC26TTPC26T

2
2
BAT54S T8117 T8107 T8109 T8122
C8121 2009/06/22
0.1UF/25V +3VO

1
MLCC/+/-10%

20mil
DL1 +10VO TPC26TTPC26TTPC26TTPC26T
T8104 T8108 T8116 T8126

1
C8123

2
1UF/25V

1
C8120 2009/06/22 MLCC/+/-10%

2
0.1UF/25V

1
MLCC/+/-10%
1
(Max:0.02A) TPC26TTPC26TTPC26TTPC26T
3 JP8106 @ T8112 T8119 T8101 T8130
+15VO
2 1 1 2 2
+12VSUS

1
1
D8103 C8124 1MM_OPEN_5MIL
BAT54S 1UF/25V
MLCC/+/-10%

2
VOUT:Typ.=12.256V;Max.=12.962V;Min.=11.571V;T=5.76%

A A

<Variant Name>
TOTAL COUNT:38 PCS
Title : POWER_SYSTEM
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 81 of 94
5 4 3 2 1
5 4 3 2 1

+5VO

SW1_EN

1
D8200
AC_BAT_SYS
RB751V-40

1MOhm R8206

2
1
AC_BAT_SYS
D D
U8200B R8204 2009/07/09
0Ohm

C8210 0.1UF/25V
18 GND3 GND4 19 2 1 Iin=2.8A OCP>10.79A

1
1.034V~~~1.069V

2
Q8203 C8204 C8203

5 D
6
7
8
RT8202APQW SI7326DN_T1_E3 4.7UF/25V 4.7UF/25V Ipp=2.65A LIR=0.29

2
2
R8211
Fsw=250KHZ
2009/07/15
2.2Ohm

17
16
15
14
13

S
2

G
U8200A C8214 +1.05VO
0.1UF/25V

GND2

NC2
TON
EN/DEM

BOOT
1

4
3
2
1
TPC28T

1
T8209 T8221
1 12 L8200 (9.24A) JP8203 @ +VCCP
VOUT UGATE R8201
2 11 1 2 1 2

1
VDD PHASE 1 2 TPC28T
3 FB OC 10 1 2 2 1
4 PGOOD VDDP 9 1.5UH 3MM_OPEN_5MIL (9.24A)

2
22KOhm JP8204 SHORT_PIN SUMIDA/CDRH104RNP-1R5NC <G>

LGATE

5
PGND
GND1

CE8203

C8201
2009/07/09 JP8205 @ 2009/06/23

NC1

1
Q8205 R8208 + 1 2
1 2

1
5 D
6
7
8
C8216 SI7326DN_T1_E3 2.2OHM

1
C8215 RT8202APQW 1UF/6.3V @ @ 3MM_OPEN_5MIL

5
6
7
8

1
1UF/6.3V

2
220UF/2V
S
2

0.1UF/25V
1
G
C8205 2009/07/03
(Rdson = 17.5mOHM) 1000PF/50V

4
3
2
1
@ 2009/06/18
<92> 1.05V_PWRGD

2
2009/06/22
C C
R8200
1% 4.02KOHM JP8201
1 2 2 1

SHORT_PIN
1 2

C8202 220PF/50V

2009/06/22
1

C8206
0.1UF/25V
R8205 @
2

10KOhm
1%
2

+5VO

2009/06/22
2

B B
R8212 SW1_EN
100KOhm
5% TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8206 T8219 T8213 T8211 T8218 T8210 T8201 T8215
1

Q8204B

1
D8202 @ UM6K1N
2 1 5 +1.05VO
4

1SS355
6

Q8204A
R8202 UM6K1N TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
2 1 2 T8212 T8204 T8203 T8217 T8216 T8205 T8220 T8202
81,83,85,91,93> SUSB#_PWR
1

100KOhm

1
1

1% +VCCP
C8207
0.047UF/25V R8203
2

100KOhm
1

A A

<Variant Name>

Title : POWER_I/O_VCCP
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 82 of 94
5 4 3 2 1
5 4 3 2 1

+5VO
U8300B
LDO_EN2
18 GND1 GND2 19
SW2_EN

1
AC_BAT_SYS D8301 RT8204AGQW
RB751V-40

1MOhm R8301
TPC28T TPC28T TPC28T TPC28T

2
1
AC_BAT_SYS T8312 T8310 T8323 T8302
R8302
0Ohm

C8324 10UF/25V

C8325 10UF/25V
C8300 0.1UF/25V
Iin=5.42A

1
D D
2 1

5
6
7
8

1
SI4134DY-T1-GE3
OCP>16.07A

D
1.469V~~~1.531V

2
2
Ipp=3.68A LIR=0.24

Q8300

S
R8303 Fsw=250KHZ TPC28T TPC28T TPC28T TPC28T
T8305 T8304 T8309 T8321

17
16
15
14
13

4
3
2
1
2
2.2Ohm U8300A C8313 +1.5VO
0.1UF/25V

BOOT
GND
TON

LEN
EN/DEM
1

1
TPC28T TPC28T

1
T8300 T8307
1 VOUT UGATE 12 L8301 (15.31A) JP8300 +1.5V
2 11 R8308 1 2 1 2

1
VDD PHASE 1 2
3 10 1 2 2 1

LPGOOD
FB OC 1.5UH 3MM_OPEN_5MIL (9.29A)

0.1UF/25V
4 9

LGATE
PGOOD VDDP

LDRV
9.1KOhm JP8307 SHORT_PIN CYNTEC/PCMC104T-1R5MN

5
6
7
8

5
6
7
8

2
LFB
JP8301

220UF/2V

220UF/2V
SI4134DY-T1-GE3

SI4134DY-T1-GE3
2009/06/18 @

1
C8304 + +

D
1 1 2 2

1
C8302 RT8204AGQW 1UF/6.3V R8317

5
6
7
8
1

Q8304

Q8305
1UF/6.3V 2.2OHM 3MM_OPEN_5MIL

G
S

S
2
@ @ TPC28T TPC28T TPC28T TPC28T

2
@ T8316 T8317 T8319 T8322

4
3
2
1

4
3
2
1

C8308
CE8301

CE8303
1
(Rdson = 17.5mOHM) C8321

1
1000PF/50V
<11,92> DDR_PWRGD
@ +1.5VO

2
2009/06/22 2009/07/03

C 1% R8300 JP8304 TPC28T TPC28T TPC28T TPC28T C


1 2 2 1 T8318 T8306 T8311 T8303

10KOhm +1.5VO

1
SHORT_PIN
1 2
+1.5V

1
C8301 220PF/50V
C8314 C8319
2009/06/22 10UF/6.3V 10UF/6.3V

2
MLCC/+/-10% MLCC/+/-10%
c0805_h57 c0805_h57
1

1
C8309
0.1UF/25V
R8313 @
2

10KOhm

5
6
7
8
1%

SI4134DY-T1-GE3
2

D
Q8301

G
0.727V~~~0.773V

S
+5VO +1.5V
+1.1VO (1.0A) +0.75VO

4
3
2
1

R8314 10KOhm
+5VO
+0.75V
JP8305 +1.5VO +5VO

1
1 1 2 2
82Ohm R8309

C8305 39PF/50V 1%
1 2 (2.5A) 2009/06/22 1MM_OPEN_5MIL U8301
2

1
1.079V~~~1.126V TPC28T @ 9
GND2
2

2009/06/22 R8307 5% T8325 1 8

2
R8310 SW2_EN 4.7KOhm 1% JP8302 100KOhm VIN NC3
2 GND1 NC2 7
100KOhm R8312
2 1 1 2 +1.1VS 3 6

1
1 2 REFEN VCNTL

3
B B
5% Q8302B 4 5
1

2
C8316 2MM_OPEN_5MIL D8307 1SS355 UM6K1N VOUT NC1
1

@ RT9045GSP

10UF/6.3V
1 2 2 1 5
3

R8311 10KOhm
Q8303B 2009/07/06 @

0.1UF/25V

10UF/6.3V
4
1

1
D8306 @ UM6K1N 39PF/50V @

1
C8323 C8322 C8320 C8310

10UF/6.3V
2 1 5

C8311
10UF/6.3V 10UF/6.3V SUSC#_PWR 1 2 2 Q8302A
4

2
1SS355 0.1UF/25V MLCC/+/-10% MLCC/+/-10% UM6K1N 10UF/6.3V

2
6

C8317
Q8303A c0805_h57 c0805_h57 1% R8316 20KOhm

2
C8307

C8315
R8305 UM6K1N R8315
2 1 2 C8312 10KOhm 2009/07/03 C8318 1%
<91,93> SUSC#_PWR
2

2
0.033UF/16V 1% 0.033UF/16V
1

1% 100KOhm
2
1

C8306
0.047UF/25V R8319
2

100KOhm
1

D8300 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


2 1 T8326 T8320 T8314 T8301 T8331 T8330 T8329 T8328

1SS355
1

1
R8306 +1.1VO +1.1VS +0.75VO +0.75V
43KOhm
A 2 1 LDO_EN2 A
<81,82,85,91,93> SUSB#_PWR
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
1% T8313 T8308 T8315 T8324 T8327 T8332 T8333 T8334
1

C8303
0.22UF/10V
<Variant Name>
1

1
MLCC/+/-10%
2

Title : POWER_I/O_DDR & VTT & 1.1VS


<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 83 of 94
5 4 3 2 1
5 4 3 2 1

+5VO

SW_EN3

1
AC_BAT_SYS
D8400

1MOhm
RB751V-40

2
2
AC_BAT_SYS
U8400B R8400

C8400 0.1UF/25V
D 0Ohm D

R8405
18 GND3 GND4 19 2 1 Iin=3.81A

1
1
C8413 C8414 OPC=10.2A

5
6
7
8
RT8202APQW

SI4134DY-T1-GE3
4.7UF/25V 4.7UF/25V +1.8VO

2
2
R8408

D
2.2Ohm

Q8400
JP8404

G
2009/07/14

17
16
15
14
13

S
U8400A C8404 1 2
0.1UF/25V 1 2

GND2
TON
EN/DEM
NC2
BOOT
1

4
3
2
1
TPC28T 3MM_OPEN_5MIL
T8400 (10A)
1 12 L8400 JP8401
@
VOUT UGATE R8404
2 11 1 2 1 1 2 2 +1.8VS

1
VDD PHASE
3 FB OC 10 1 2 2 1
4 9 1.5UH 2009/07/03 3MM_OPEN_5MIL (10A)
PGOOD VDDP

2
12.1KOhm JP8403 SHORT_PIN SUMIDA/CDRH104RNP-1R5NC <G>

LGATE

1
PGND
GND1
2009/06/18 2009/06/18 + @

NC1

1
R8412

CE8402 220UF/2V
5
6
7
8

2
C8401 2.2OHM C8402

SHORT_PIN
SI4134DY-T1-GE3
1

JP8400
RT8202APQW 1UF/10V @ 0.1UF/25V

D
5
6
7
8

2
Q8403
C8403
1UF/10V

G
OCP>11.6A

S
2

1
C8418 @
1000PF/50V 2009/07/06 1.760V~~~1.841V
(Rdson = 17.5mOHM)

4
3
2
1

1
@ Ipp=4.35A LIR=0.43

2
2009/06/22 Fsw=250KHZ
<92> 1.8VO_PWRGD
1%
C
2 1 C
R8409 14KOhm

1 2

C8410 220PF/50V
1

C8419 @
R8406 0.1UF/25V
2

10KOhm
1%
2

+5VO
2

R8403 SW_EN3
100KOhm
5%
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
1

T8401 T8402 T8403 T8404 T8412 T8411


3

B Q8402B B
UM6K1N

1
5
+1.8VS +1.8VO
4
6

Q8402A
UM6K1N TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
2 T8406 T8407 T8408 T8413 T8410 T8409
<85,92> VGA_PWRGD
1

1
R8410 100KOhm 5% @
2 1

A A

<Variant Name>

Title : POWER_I/O_1.8VS
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 84 of 94
5 4 3 2 1
5 4 3 2 1

+5VO

D D
SW_EN4

1
AC_BAT_SYS D8500
RB751V-40

1MOhm

2
2
AC_BAT_SYS

10UF/25V

10UF/25V
U8500B R8500

0.1UF/25V
0Ohm

MLCC/+/-10%

MLCC/+/-10%
R8506
18 GND3 GND4 19 2 1 Iin=5.89A +VGA_VCORE_O

1
c1206_h75

c1206_h75
JP8505

1
1 1 2 2
RT8202APQW

2
2

C8500

C8513

C8506
2009/07/06 Q8500 D 3MM_OPEN_5MIL

R8509
2.2Ohm
JP8504

17
16
15
14
13
@

2
U8500A 4 1
C8504 G S 1 2 2

EN/DEM

BOOT
GND2

NC2
TON
1
0.1UF/25V TPC28T 3MM_OPEN_5MIL

1
SIR474DP T8500 L8500 (19A)

1
2
3
1 12 0.56UH JP8501
@
VOUT UGATE
2 11 1 2 1 1 2 2 +VGA_VCORE

1
VDD PHASE
3 FB OC 10 1 2 2 1
Irat=25A 3MM_OPEN_5MIL

CE8502 470UF/2V

CE8503 220UF/2V
4 9

ESR=9mOhm/Ir=3A

ESR=9mOhm/Ir=3A
PGOOD VDDP

2
R8505 JP8503 SHORT_PIN CYNTEC/PCMC104T-R56MN

SI7170DP-T1-GE3

SI7170DP-T1-GE3
LGATE

1
PGND
GND1
6.81KOhm 2009/07/04 R8515 + + @

NC1

1
1% 2.2OHM C8502

5 D
6
7
8

5 D
6
7
8
C8501 @ 0.1UF/25V

2
Q8507

Q8508
C8503 RT8202APQW 1UF/10V @

SHORT_PIN
5
6
7
8

2
JP8500
1UF/10V
C8518

S
2

1
G

G
1000PF/50V
@

4
3
2
1

4
3
2
1
(Rdson = 4.3mOHM) @ 2009/06/22
<84,92> VGA_PWRGD

1
2009/07/02
1% 2009/07/03
C R8510 2KOHM C
2 1
C8510 R8502 2009/07/02
GPU_VID_0# +VGA_VCORE_O 2 1 1 2 1 2 OCP>25.3A
R8513 3.74KOhm
100OHM 1.082V~~~1.119V
1% 39PF/50V
L 0.9V Ipp=7.4A LIR=0.39
Fsw=250KHZ
1

H 1.1V

1
R8514 1 2 NVDD_SENSE <70>
1

3.74KOhm R8507 C8505


1% C8507 10KOhm 0.1UF/25V R8503

2
1000PF/50V 1% 0Ohm_0402
2

2009/07/07 2009/07/10

Q8505
3

2N7002 3
D

<74> GPU_VID_0# 11 TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T


G T8513 T8518 T8521 T8501 T8529 T8530 T8531
2 S
2

1
+VGA_VCORE_O +VGA_VCORE

+5VO
TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T TPC28T
T8509 T8525 T8527 T8526 T8502 T8516 T8519
2

1
B B
R8504 SW_EN4
100KOhm
5%
1

Q8502B
UM6K1N
D8503 1SS355 @ 5
2 1
4
6

Q8502A
R8501 UM6K1N
<81,82,83,91,93> SUSB#_PWR 2 1 2
1

1% 78.7KOHM
1

C8514
0.1UF/25V
2

R8512 100KOhm 5%
@
2 1

A A

<Variant Name>

Title : POWER_VGA_VCORE
<OrgName> Engineer: Anysc
Size Project Name Rev
C F83 1.0
Date: Thursday, July 16, 2009 Sheet 85 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : N/A
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 86 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : N/A
<OrgName> Engineer: Anysc
Size Project Name Rev
C F83 1.0
Date: Thursday, July 16, 2009 Sheet 87 of 94
5 4 3 2 1
5 4 3 2 1

120W&90W: R8801 = 15m OHM (10G21DR01515110)


65W: R8801 = 20m OHM (10G21DR02015110)
T8804 T8805 T8801 T8806 T8807 T8800 T8802 T8803 T8808
<60> A/D_DOCK_IN Q8805
TPC28T TPC28T TPC28T TPC28T 1 S D 8 R8818 TPC28T TPC28T TPC28T TPC28T TPC28T

1
2 7 1 2 JP8807
A/D_DOCK_IN AC_BAT_SYS
3 6 1 1 2 2
4 G 5 15mOhm
3MM_OPEN_5MIL TPC28T TPC28T TPC28T TPC28T

1
SI4116DY-T1-GE3 C8801 T8809 T8810 T8811 T8812
0.1UF/25V Q8804
S JP8800
MLCC/+/-10% 1 8 BAT 1 2 BAT_CON

1
1 2

2
D D
R8821 R8800 2 7
10Ohm 100KOhm 3 6 3MM_OPEN_5MIL

2
5% 1% 4 G D 5

SHORT_PIN

SHORT_PIN
JP8801

JP8802
2009/07/02

1
FDS6679AZ

1
@

1
ACIN 2MOhm
R8801 A/D_DOCK_IN

2
S 2
G
BAT 1

1
1

2
R8803
1

R8802 3
D 1KOhm R8804
C8810 13.3KOhm 2N7002 1% 200KOhm

3
1000PF/50V 1% Q8800
2

2
1
R8805
@ 1 2
120W: R8807 = 1.82K
1% 6.98KOhm 90W: R8807 = 6.98K
R8806 65W: R8807 = 17.8K
(A/D IN > 17.9V , AC_APR_UC High) 2 1
AC_BAT_SYS
200KOhm 2009/07/02

C8803 10UF/25V
MLCC/+/-10%

MLCC/+/-10%
C8804 0.1UF/25V
1

2
1

2
C8802

8
0.1UF/25V TPC28T TPC28T TPC28T

1
1SS355

D2

D2

D1

D1
MLCC/+/-10% Q8802 T8813 T8814 T8815

2
D8800 C8800 SI4804CDY-T1-GE3
0.47UF/25V

N
1

1
1

9
C8805 U8800 MLCC/+/-10% CHG_GND

G2

G1
S2

S1
4.7UF/6.3V (5.3V) 14 2 1

CSSP
DCIN

CSSN
MLCC/+/-10% BST

1
C AD_IINP 2 1 LDO 13 15 C
LDO DHI L8800 R8809

MLCC/+/-10%
22 GND1 BAT

0.1UF/25V
23 GND2 LX 16 1 2 1 2 BAT

1
C8806
R8811 24
10KOhm VAA GND3 2.2UH 20mOHM
1 2 18 VAA DLO 12
25

2
@ @ C8807 1UF/10V GND4 CHG_GND
PGND 11

2
2009/06/22

C8808 10UF/25V
MLCC/+/-10%
2
1
AGND

SHORT_PIN

SHORT_PIN

SHORT_PIN
CSIN 4

1
JP8805

JP8804

JP8806
CSIP 3
AD_IINP 5 IINP
6

2
BATT

1
20 19

ACOK#
VCTL CC
ISET ACIN

BP
10 ISET ACIN 17

MAX17015BETP+T

21

1
C8809
0.01UF/50V
MLCC/+/-10%

2
LDO
2009/06/23

2
R8815
1 2 ISET @ 100KOhm
<30> ISET_EC
5%
R8807 1KOhm

1
2

1%
2

R8810 MLCC/+/-10%
0.1UF/25V <30> ACIN_OC#
750Ohm
1% C8811
1
1

B B

2009/06/23
ISET_EC ISET(Voltage) CURRENT(min.) CURRENT(typ.) CURRENT(max.) VFB=2.1;T=0.4%
0.1294V 0.055V 0.154A 0.158A 0.163A PRECHG R8808 R8819
<30> VSET_EC 1 2 1 2
1.9676V 0.976V 2.347A 2.409A 2.473A Quick CHG

2
66.5KOhm 249KOhm
0.1% R8828 0.1%
66.5KOhm
0.1%

1
Ichg=(240m/RS2)*(VISET/VAA)
Ichg=(240m/20m)*(0.055/4.2)=0.157A
Ichg=(240m/20m)*(0.865/4.2)=2.4714A
VCTL connect to GND,VFB=2.1V VSET_EC BAT(min.) BAT(typ.) BAT(max.)
VBAT=2.1*(R8819+R8828)/R8828 1.3948V 12.511V 12.604V 12.696V

12.641V(min)<VBAT-12.515(Typ)<12.768V(Max)

A A

<Variant Name>

Title : POWER_CHARGER
<OrgName> Engineer: Anysc
Size Project Name Rev
C F83 1.0
Date: Thursday, July 16, 2009 Sheet 88 of 94
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

<Variant Name>

Title : N/A
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 89 of 94
5 4 3 2 1
5 4 3 2 1

BATTERY IN DETECT

D D
2009/07/08
delete batt detect

C C

B B

A A

<Variant Name>

Title : POWER_DETECT
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 90 of 94
5 4 3 2 1
5 4 3 2 1

TPC28T TPC28T
T9118 T9119 Q9100
TPC28T TPC28T
+1.5VO 8 D S 1 T9120 T9121

1
7 2
6 3 +1.5VS

1
5 G 4

1
2 1 12VS_GATE DRV C9107
(2.52A)
SI4134DY-T1-GE3 MLCC/+/-10%

2
1
R9107 1% 0.1UF/25V
300KOhm
C9100

2
0.033UF/16V
D D

TPC28T TPC28T
T9123 T9124

+3VS

1
(4.37A)

1
C9108
MLCC/+/-10%

2
0.1UF/25V
TPC28T
12VS_GATE DRV 1 2 T9100
R9108
1% 30.9KOhm TPC26T 2 1
<30,41,57,92> SUSB_EC#

1
1
2009/07/02 JP9102 T9101 TPC28T
D9100
C9109 T9105 JP9100 SHORT_PIN
0.1UF/25V 2 1 2 1 5VO_ENBL <81>

1
2
MLCC/+/-10% <5,92> FORCE_OFF# SUSB#_PWR
<81,82,83,85,93> SUSB#_PWR

1
1
1SS355 SHORT_PIN JP9102 close to R9102

R9102 TPC28T
TPC28T TPC28T Q9105 +3VSUS 100KOhm_0402 T9106

2
T9135 T9134
AC_BAT_SYS 8 D1 S1 1 2 1
<30,57> SUSC_EC#

1
TPC26TTPC26TTPC26TTPC26T TPC28T
(Max:1.702A)
1

+3VO 7 D1 N G1 2 T9103 T9112 T9113 T9104 T9107 JP9101 SHORT_PIN


C C
6 D2 S2 3 +3VSUS SUSC#_PWR
<83,93> SUSC#_PWR

1
5 D2 N G2 4 @

1
2

SI4804CDY-T1-GE3 C9102
0.1UF/25V

2
R9100
84.5KOhm 2009/01/10
1%
1

Check have or not


R9101
1 2

0Ohm
3

+5VAO Q9108B
R9105
2

UM6K1N C9101
1 2 5 1000PF/50V
2

TPC26T 100KOhm_0402 TPC28T TPC28T TPC28T TPC28T


4

R9113 T9102 T9108 T9109 Q9102 T9110 T9111


6

560KOhm Q9108A PMN45EN


1

UM6K1N +3VSUS +3V


1

1
2

6
5
S 4
<30,93> VSUS_ON R9103 0Ohm
(0.14A)
1
1

2 1 12V_GATE DRV

1
1
R9112 C9103

D
470KOhm_0402 C9104 MLCC/+/-10%

2
MLCC/+/-10% 0.1UF/25V
2

1
2
3

2
TPC28T TPC28T 0.033UF/16V
B T9114 T9115 B
2009/07/02
+5V
1

1
1

R9104 0Ohm C9106


2 1 12V_GATE DRV MLCC/+/-10%
(2A)
0.1UF/25V
2
1

Q9106
C9105
8 D1 S1 1 0.033UF/16V TPC28T
2

TPC28T TPC28T MLCC/+/-10% TPC28T T9130 12V_GATE DRV


T9127 T9128 T9129
7 D1 N G1 2 (3.68A)
1

1
6 D2 S2 3 (09/03/08) 1%
+5VO +5VS
1

1 1

R9109 0Ohm
5 D2 N G2 4 2 1 12VS_GATE DRV C9110 TPC28T TPC28T
MLCC/+/-10% T9116 R9115 T9117
SI4804CDY-T1-GE3 0.1UF/25V UMC4N 22KOhm
2

2
1

C9111

1
MLCC/+/-10% +12VSUS
0.033UF/16V TPC28T
+12V (0.01A)

4
3

E
2

T9122

47K

1
B
SUSC#_PWR

1
R9106

B
47K

10K
1

47K
100KOhm 1%
1

1SS355
D9101

2
R9110
1.47KOhm

6
TPC28T Q9104
TPC28T T9133
2

T9131 1% @
2

A A
1

+12VSUS
+12VS
1

TPC28T
C

4
3

T9132 UMC4N (0.01A)


47K

<Variant Name>
B

SUSB#_PWR Q9107
1

R9111 1%
2

SUSC#_STAGE POWER
B
47K

10K

Title : POWER_LOAD SWITCH


47K

100KOhm

Engineer: Anysc
1

<OrgName>
2

SUSB#_PWR POWER Size Project Name Rev


Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 91 of 94
5 4 3 2 1
5 4 3 2 1

D D

POWER GOOD DETECTER


+3VS

2
2009/07/06 RN9206D RN9206A TPC28T EC
10KOhm 10KOhm T9205
ALL_SYSTEM_PWRGD <30>

1
7

1
2009/07/06 TPC28T
T9201
<30,41,57,91> SUSB_EC#

1
FORCE_OFF# <5,91>

<82> 1.05V_PWRGD 2 1

1
JP9201 SHORT_PIN R9201
560KOhm
2 1 D9200
C <11,83> DDR_PWRGD +3VSUS C
@ 1SS355 TPC28T

3
JP9200 SHORT_PIN T9202

2
D9203 U9200 T9200 Q9200B
<84,85> VGA_PWRGD 2 1 1 A 5 TPC28T 5 UM6K1N

1
VCC

4
6
1SS355 2 B Q9200A

1
UM6K1N
<84> 1.8VO_PWRGD 2 1 3 GND 4 2

1
Y

1
JP9203 SHORT_PIN NC7SZ08P5X C9200
4.7UF/6.3V

2
MLCC/+/-10%
+3VSUS

D9202
2 1 2 1

1SS355 JP9206 SHORT_PIN


4

2009/07/06 RN9206B
10KOhm R9200
0Ohm
@
TPC28T OP1 : unmount U9200 , R9112
3

T9204
D9201 mount D9202 , SL9201 , SL9202
1

<22,30,81> SUS_PWRGD 2 1 2 1

1SS355 JP9205 SHORT_PIN


OP2 : unmount D9202 , SL9201 , SL9202
B B
mount U9200 ,R9112

+3VS
6

2009/07/06 RN9206C
10KOhm
5

<30,32,80> VRM_PWRGD

A A

<Variant Name>

Title : POWER_PROTECT
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 92 of 94
5 4 3 2 1
5 4 3 2 1

D D
FOR POWER TEST
+3VA +3VA <20,22,30,45,57,60,81>

+3VSUS +3VSUS <20,21,22,23,24,30,33,37,45,53,56,91,92> JP9300 @


+5VSUS +5VSUS <23,56,81> +3VO 1 1 2 2 CPU_VRON_PWR <80>
+12VSUS SGL_JUMP
+12VSUS <24,81,91>

JP9301 @
+5VO <81,82,83,84,85,91> 1 2 SUSB#_PWR
+5VO 1 2 SUSB#_PWR <81,82,83,85,91>
SGL_JUMP
+3VO +3VO <81,91>

+1.05VO +1.05VO <82>


@
JP9302
+1.5VO +1.5VO <83,91>
1 2 SUSC#_PWR
1 2 SUSC#_PWR <83,91>
+0.75VO +0.75VO <83>
SGL_JUMP
+1.8VO +1.8VO <84>
@
JP9303
+1.1VO +1.1VO <83>
1 1 2 2 VSUS_ON <30,91>
C +VGA_VCORE_O +VGA_VCORE_O <85> C
SGL_JUMP

+3V +3V <21,33,41,44,53,57,61,63,91>


+5V
+5V <9,31,44,45,52,57,91>
+12V
+12V <37,91>

+1.5V +1.5V <7,8,9,11,13,14,57,83>

+3VS +3VS <3,7,8,11,14,15,22,23,24,29,30,32,36,40,41,44,45,46,48,50,51,53,56,57,70,72,74,80,91,92>


+12VS
+12VS <24,40,45,48,57,91>

+5VS +5VS <23,31,36,46,48,50,51,56,57,80,91>

+1.8VS +1.8VS <57,73,76,77,84>

+1.5VS +1.5VS <4,14,23,41,53,57,91>

+VCCP +VCCP <3,4,5,10,11,13,14,20,23,29,57,82>

+0.75V +0.75V <7,8,11,83>


B B

+1.1VS +1.1VS <57,70,72,73,76,77,83>

+VGA_VCORE +VGA_VCORE <75,85>


+VCORE
+VCORE <4,5,80>

AC_BAT_SYS
AC_BAT_SYS <45,80,81,82,83,84,85,88,91>

BAT BAT <88>

BAT_CON BAT_CON <60,88>

A A

<Variant Name>

Title : POWER_SIGNAL
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 93 of 94
5 4 3 2 1
5 4 3 2 1

UMC4N +12V (0.01A)


SUSC#_PWR (SWITCH)
AC_BAT_SYS +12VSUS
+5VO UMC4N +12VS (0.01A)
RT8206A SUSB#_PWR (SWITCH)
VSUS_ON

+3VSUS (1.702A)
VSUS_ON
SI4804C
D D

SUSB#_PWR (4.37A)
+3VS

+3VO SUSC#_PWR
+5VAO PMN45EN +3V (0.14A)

+3VA (0.22A)

RT8206A

+5VSUS (0.31A)
VSUS_ON SUSC#_PWR
+5VO
+5V (2A)
SI4804C
FORCE_OFF#
SUSB#_PWR
+5VS (3.68A)
+5VAO +5VA
C C

SUS_PWRGD

DDR_PWRGD
+1.5V (9.29A)
SUSC_PWR +1.5VO
SUSB_PWR
SI4134 +1.5VS (2.52A)
RT8204A
+5VO +0.75VO
SUSB_PWR
RT9045 +0.75VS (1A)

SUSB_PWR
SI4134 +1.1VS (2.5A)

+1.05VO
+5VO RT8202A +1.05VS (9.24A)
B SUSB_PWR 1.05V_PWRGD B

GPU_VID

+5VO +VGA_VCORE_O
RT8202A +VGA_VCORE (19A)
SUSB_PWR
VGA_PWGD

SUSC_PWR
1.8V_PWRGD
RT8202A +1.8VS (10A)
+1.8VO
+5VO

A A

+5VS MAX17033 +VCORE (50A)


VRM_PWRGD,CLK_EN#
CPU_VRON

VR_VID0~VR_VID6, H_DPRSTP#,
MCH_OK, PM_DPRSLPVR,PM_PSI#, <Variant Name>
VCCSENSE,VSSSENSE,STP_CPU#
Title : POWER_FLOWCHART
<OrgName> Engineer: Anysc
Size Project Name Rev
Custom F83 1.0
Date: Thursday, July 16, 2009 Sheet 94 of 94

5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Colin Chang
Size Project Name
VX5 Rev
C 1.0
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 98 of 100
5 4 3 2 1
5 4 3 2 1

D D

C C

B B

A A

Title : Connector, LED


PEGATRON COMPUTER INC Engineer: Colin Chang
Size Project Name
VX5 Rev
C 1.0
P/N <OrgAddr2>
Date: Thursday, July 16, 2009 Sheet 99 of 100
5 4 3 2 1

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