19-2805; Rev 1; 4/04

ILABLE
N KIT AVA
EVALUATIO

Multichemistry Battery Chargers with Automatic

System Power Selector
General Description Features

MAX1909/MAX8725
The MAX1909/MAX8725 highly integrated control ICs ♦ ±0.5% Accurate Charge Voltage (0°C to +85°C)
simplify construction of accurate and efficient multi- ♦ ±3% Accurate Input Current Limiting
chemistry battery chargers. The MAX1909/MAX8725 ♦ ±5% Accurate Charge Current
use analog inputs to control charge current and volt-
♦ Programmable Charge Current >4A
age, and can be programmed by a host microcontroller
(µC) or hardwired. High efficiency is achieved through ♦ Automatic System Power-Source Selection
use of buck topology with synchronous rectification. ♦ Analog Inputs Control Charge Current and
The maximum current drawn from the AC adapter is pro- Charge Voltage
grammable to avoid overloading the AC adapter when ♦ Monitor Outputs for
supplying the load and the battery charger simultane- Current Drawn from AC Input Source
ously. The MAX1909/MAX8725 provide a digital output AC Adapter Presence
that indicates the presence of an AC adapter, and an ♦ Up to 17.65V (max) Battery Voltage
analog output that monitors the current drawn from the ♦ Maximum 28V Input Voltage
AC adapter. Based on the presence or absence of the ♦ Greater than 95% Efficiency
AC adapter, the MAX1909/MAX8725 automatically select ♦ Charge Any Battery Chemistry: Li+, NiCd, NiMH,
the appropriate source for supplying power to the sys- Lead Acid, etc.
tem by controlling two external p-channel MOSFETs.
Under system control, the MAX1909/MAX8725 allow the Ordering Information
battery to undergo a relearning or conditioning cycle in
which the battery is completely discharged through the PART TEMP RANGE PIN-PACKAGE
system load and then recharged. MAX1909ETI -40°C to +85°C 28 Thin QFN
The MAX1909 includes a conditioning charge feature MAX8725ETI -40°C to +85°C 28 Thin QFN
while the MAX8725 does not. The MAX1909/MAX8725
are available in space-saving 28-pin, 5mm ✕ 5mm thin
QFN packages and operate over the extended -40°C to Minimum Operating Circuit
+85°C temperature range.
P3
TO
Applications AC ADAPTER: INPUT 0.01Ω EXTERNAL LOAD

SRC
Notebook and Subnotebook Computers
CSSP CSSN
Hand-Held Data Terminals PDS
DHIV
SRC
PDL P2
Pin Configuration DCIN

MAX1909 LDO
VCTL
TOP VIEW MAX8725
CSSN
CSSP

DHIV
PDS

SRC
PDL

DHI

LDO ICTL
MODE
28 27 26 25 24 23 22 DLOV
ACIN
DCIN 1 21 DLOV LDO IINP P1
IINP
REF CLS DHI
LDO 2 20 DLO

ACIN 3 19 PGND ACOK

LDO
REF 4 18 CSIP DLO N1 10µH
MAX1909
GND/PKPRES 5 MAX8725 17 CSIN
PGND
MAX8725 ONLY PKPRES
ACOK 6 16 BATT
CSIP

MODE 7 15 GND 0.015Ω

8 9 10 11 12 13 14 CCV
CSIN
CCI
BATT
IINP

CLS

ICTL

VCTL

CCI

CCV

CCS

CCS
GND
REF
THIN QFN

Functional Diagrams appear at end of data sheet.

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
 Multichemistry Battery Chargers with Automatic
System Power Selector
ABSOLUTE MAXIMUM RATINGS
MAX1909/MAX8725

DCIN, CSSP, CSSN, SRC, ACOK to GND..............-0.3V to +30V DLOV to LDO.........................................................-0.3V to +0.3V
DHIV ........................................................…SRC + 0.3, SRC - 6V DLO to PGND ..........................................-0.3V to (DLOV + 0.3V)
DHI, PDL, PDS to GND ...............................-0.3V to (VSRC + 0.3) LDO Short-Circuit Current...................................................50mA
BATT, CSIP, CSIN to GND .....................................-0.3V to +20V Continuous Power Dissipation (TA = +70°C)
CSIP to CSIN or CSSP to CSSN or PGND to GND ...-0.3V to +0.3V 28-Pin TQFN (derate 20.8mW/°C above +70°C) .......1666mW
CCI, CCS, CCV, DLO, IINP, REF, Operating Temperature Range ...........................-40°C to +85°C
ACIN to GND ........................................-0.3V to (VLDO + 0.3V) Junction Temperature ......................................................+150°C
DLOV, VCTL, ICTL, MODE, CLS, LDO, Storage Temperature Range .............................-60°C to +150°C
PKPRES to GND ...................................................-0.3V to +6V Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CHARGE VOLTAGE REGULATION
VCTL Range 0 3.6 V
VVCTL = 3.6V (3 or 4 cells);
-0.8 +0.8
not including VCTL resistor tolerances
VVCTL = 3.6V/20 (3 or 4 cells); not including
-0.8 +0.8
Battery Regulation Voltage VCTL resistor tolerances
%
Accuracy VVCTL = 3.6V (3 or 4 cells); including VCTL
-1.0 +1.0
resistor tolerances of 1%
VVCTL = VLDO (3 or 4 cells, default
-0.5 +0.5
threshold of 4.2V/cell)
VVCTL Default Threshold VVCTL rising 4.1 4.3 V
VVCTL = 3V 0 2.5
VCTL Input Bias Current µA
VDCIN = 0, VVCTL = 5V 0 12
CHARGE-CURRENT REGULATION
MAX1909 0 3.6
ICTL Range V
MAX8725 0 3.2
CSIP-to-CSIN Full-Scale Current-
69.37 75.00 80.63 mV
Sense Voltage
MAX1909: VICTL = 3.6V (not including ICTL
-7.5 +7.5
resistor tolerances)
MAX8725: VICTL = 3.2V (not including ICTL
-5 +5
resistor tolerances)

MAX1909: VICTL = 3.6V x 0.5, MAX8725:

Charge-Current Accuracy VICTL = 3.2V x 0.5 (not including ICTL -5 +5 %
resistor tolerances)

MAX1909: VICTL = 0.9V (not including ICTL

-7.5 +7.5
resistor tolerances)
MAX8725: VICTL = 0.18V (not including
-30 +30
ICTL resistor tolerances)

2 _______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)

MAX1909/MAX8725
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (including ICTL resistor -7.0 +7.0
Charge-Current Accuracy tolerances of 1%) %

VICTL = VLDO (default threshold of 45mV) -5 +5

VICTL Default Threshold VICTL rising 4.1 4.2 4.3 V
BATT/CSIP/CSIN Input Voltage
0 19 V
Range
Charging enabled 350 650
CSIP/CSIN Input Current µA
Charging disabled; VDCIN = 0 or VICTL = 0 0.1 1
ICTL Power-Down Mode MAX1909 0.75
V
Threshold Voltage MAX8725 0.06
ICTL Power-Up Mode Threshold MAX1909 0.85
V
Voltage MAX8725 0.11
VICTL = 3V -1 +1
ICTL Input Bias Current µA
VDCIN = 0V, VICTL = 5V -1 +1
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
72.75 75.00 77.25 mV
Current-Sense Voltage
VCLS = REF -3 +3
Input Current-Limit
VCLS = REF x 0.75 -3 +3 %
Accuracy
VCLS = REF x 0.5 -4 +4
CSSP/CSSN Input Voltage Range 8.0 28 V
VCSSP = VCSSN = VDCIN > 8.0V 450 730
CSSP/CSSN Input Current µA
VDCIN = 0 0.1 1
CLS Input Range 1.6 REF V
CLS Input Bias Current VCLS = 2.0V -1 +1 µA
IINP Transconductance VCSSP - VCSSN = 56mV 2.7 3.0 3.3 mA/V
VCSSP - VCSSN = 75mV, terminated with
-7.5 +7.5
10kΩ
VCSSP - VCSSN = 56mV, terminated with
IINP Accuracy -5 +5 %
10kΩ
VCSSP - VCSSN = 20mV, terminated with
-10 +10
10kΩ
IINP Output Current VCSSP - VCSSN = 150mV, VIINP = 0V 350 µA
IINP Output Voltage VCSSP - VCSSN = 150mV, VIINP = float 3.5 V

_______________________________________________________________________________________ 3
 Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725

(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range VDCIN 8.0 28 V
DCIN Undervoltage-Lockout Trip DCIN falling 7 7.4
V
Point DCIN rising 7.5 7.85
DCIN Quiescent Current IDCIN 8.0V < VDCIN < 28V 2.7 6 mA
VBATT = 19V, VDCIN = 0V, or ICTL = 0V 0.1 1
BATT Input Current IBATT VBATT = 16.8V, VDCIN = 19V, ICTL = 0V 0.1 1 µA
VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 200 500
LDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.4 5.55 V
LDO Load Regulation 0 < ILDO < 10mA 80 115 mV
LDO Undervoltage-Lockout Trip
VDCIN = 8.0V 3.20 4 5.15 V
Point
REFERENCE
REF Output Voltage Ref 0 < IREF < 500µA 4.2023 4.2235 4.2447 V
REF Undervoltage-Lockout Trip
REF falling 3.1 3.9 V
Point
TRIP POINTS
BATT POWER_FAIL Threshold VDCIN - VBATT, VDCIN falling 50 100 150 mV
BATT POWER_FAIL Threshold
100 200 300 mV
Hysteresis
ACIN Threshold ACIN rising 2.007 2.048 2.089 V
ACIN Threshold Hysteresis 10 20 30 mV
ACIN Input Bias Current VACIN = 2.048V -1 +1 µA
SWITCHING REGULATOR
DHI Off-Time VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V 360 400 440 ns
DHI Minimum Off-Time VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V 260 300 350 ns
DLOV Supply Current IDLOV DLO low 5 10 µA
Sense Voltage for Minimum
Discontinuous Mode Ripple 7.5 mV
Current
Cycle-by-Cycle Current-Limit
97 mV
Sense Voltage
Sense Voltage for Battery
MAX1909 only, BATT = 3.0V per cell 3 4.5 6 mV
Undervoltage Charge Current
MAX1909 only, MODE = float (3 cell),
9.18 9.42
VBATT rising
Battery Undervoltage Threshold V
MAX1909 only, MODE = LDO (4 cell),
12.235 12.565
VBATT rising
DHIV Output Voltage With respect to SRC -4.5 -5.0 -5.5 V

4 _______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)

MAX1909/MAX8725
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DHIV Sink Current 10 mA
DHI On-Resistance Low DHI = VDHIV, IDHI = -10mA 2 5 Ω
DHI On-Resistance High DHI = VCSSN, IDHI = 10mA 2 4 Ω
DLO On-Resistance High VDLOV = 4.5V, IDLO = +100mA 3 7 Ω
DLO On-Resistance Low VDLOV = 4.5V, IDLO = -100mA 1 3 Ω
ERROR AMPLIFIERS
VCTL = 3.6, VBATT = 16.8V, MODE = LDO 0.0625 0.125 0.2500
GMV Loop Transconductance mA/V
VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT 0.0833 0.167 0.3330
MAX1909: ICTL = 3.6V, MAX8725: VICTL =
GMI Loop Transconductance 0.5 1 2 mA/V
3.2V, VCSSP - VCSIN = 75mV
GMS Loop Transconductance VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.5 1 2 mA/V
0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V,
CCI/CCS/CCV Clamp Voltage 150 300 600 mV
0.25V < VCCS < 2.0V
LOGIC LEVELS
MODE Input Low Voltage 0.8 V
MODE Input Middle Voltage 1.6 1.8 2.0 V
MODE Input High Voltage 2.8 V
MODE Input Bias Current MODE = 0V or 3.6V -2 +2 µA
ACOK AND PKPRES
ACOK Input Voltage Range 0 28 V
ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA
ACOK Leakage Current VACOK = 28V, ACIN = 2.5V 1 µA
PKPRES Input Voltage
0 LDO V
Range
PKPRES Input Bias Current -1 +1 µA
PKPRES Battery Removal Detect % of
MAX8725, PKPRES rising 55
Threshold LDO
PKPRES Hysteresis MAX8725 1 %
PDS, PDL SWITCH CONTROL
PDS Switch Turn-Off Threshold VDCIN - VBATT, VDCIN falling 50 100 150 mV
PDS Switch Threshold Hysteresis VDCIN - VBATT 100 200 300 mV
PDS Output Low Voltage, PDS
IPDS = 0A 8 10 12 V
Below SRC
PDS Turn-On Current PDS = SRC 6 12 mA
PDS Turn-Off Current VPDS = VSRC - 2V, VDCIN = 16V 10 50 mA
PDL Switch Turn-On Threshold VDCIN - VBATT, VDCIN falling 50 100 150 mV
PDL Switch Threshold Hysteresis VDCIN - VBATT 100 200 300 mV

_______________________________________________________________________________________ 5
 Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725

(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
PDL Turn-On Resistance PDL = GND 50 100 150 kΩ
PDL Turn-Off Current VSRC - VPDL = 1.5V 6 12 mA
SRC = 19V, DCIN = 0V 1
SRC Input Bias Current µA
SRC = 19, VBATT = 16V 450 1000
Delay Time Between PDL and
2.5 5 7.5 µs
PDS Transitions

ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
CHARGE VOLTAGE REGULATION
VCTL Range 0 3.6 V
VVCTL = 3.6V (3 or 4 cells); not including
-0.8 +0.8
VCTL resistor tolerances
VVCTL = 3.6V/20 (3 or 4 cells); not including
-0.8 +0.8
Battery Regulation Voltage VCTL resistor tolerances
%
Accuracy VVCTL = 3.6V (3 or 4 cells); including VCTL
-1.0 +1.0
resistor tolerances of 1%
VVCTL = VLDO (3 or 4 cells, default
-0.8 +0.8
threshold of 4.2V/cell)
VVCTL Default Threshold VVCTL rising 4.1 4.3 V
VVCTL = 3V 0 2.5
VCTL Input Bias Current µA
VDCIN = 0V, VVCTL = 5V 0 12
CHARGE-CURRENT REGULATION
MAX1909 0 3.6
ICTL Range V
MAX8725 0 3.2
CSIP-to-CSIN Full-Scale Current-
69.37 80.63 mV
Sense Voltage
MAX1909: VICTL = 3.6V (not including ICTL
-7.5 +7.5
resistor tolerances)
MAX8725: VICTL = 3.2V (not including ICTL
-5 +5
resistor tolerances)

MAX1909: VICTL = 3.6V x 0.5, MAX8725:

Charge-Current Accuracy VICTL = 3.2V x 0.5 (not including ICTL -5 +5 %
resistor tolerances)

MAX1909: VICTL = 0.9V (not including ICTL

-7.5 +7.5
resistor tolerances)
MAX8725: VICTL = 0.18V (not including
-30 +30
ICTL resistor tolerances)

6 _______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)

MAX1909/MAX8725
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX1909: VICTL = 3.6V x 0.5, MAX8725:
VICTL = 3.2V x 0.5 (including ICTL resistor -7.0 +7.0
Charge-Current Accuracy tolerances of 1%) %

VICTL = VLDO (default threshold of 45mV) -5 +5

VICTL Default Threshold VICTL rising 4.3 V
BATT/CSIP/CSIN Input Voltage
0 19 V
Range
CSIP/CSIN Input Current Charging enabled 650 µA
ICTL Power-Down Mode MAX1909 0.75
V
Threshold Voltage MAX8725 0.06
ICTL Power-Up Mode Threshold MAX1909 0.85
V
Voltage MAX8725 0.11
INPUT CURRENT REGULATION
CSSP-to-CSSN Full-Scale
72.75 77.25 mV
Current-Sense Voltage
VCLS = REF -3 +3
Input Current-Limit Accuracy VCLS = REF x 0.75 -3 +3 %
VCLS = REF x 0.5 -4 +4
CSSP/CSSN Input Voltage Range 8.0 28 V
CSSP/CSSN Input Current VCSSP = VCSSN = VDCIN > 8.0V 730 µA
CLS Input Range 1.6 REF V
IINP Transconductance VCSSP - VCSSN = 56mV 2.7 3.3 mA/V
VCSSP - VCSSN = 75mV, terminated with
-7.5 +7.5
10kΩ
VCSSP - VCSSN = 56mV, terminated with
IINP Accuracy -5 +5 %
10kΩ
VCSSP - VCSSN = 20mV, terminated with
-10 +10
10kΩ
IINP Output Current VCSSP - VCSSN = 150mV, VIINP = 0V 350 µA
IINP Output Voltage VCSSP - VCSSN = 150mV, VIINP = float 3.5 V
SUPPLY AND LINEAR REGULATOR
DCIN Input Voltage Range VDCIN 8.0 28 V
DCIN Undervoltage-Lockout Trip DCIN falling 7
V
Point DCIN rising 7.85
DCIN Quiescent Current IDCIN 8.0V < VDCIN < 28V 6 mA
BATT Input Current IBATT VBATT = 2V to 19V, VDCIN > VBATT + 0.3V 500 µA
LDO Output Voltage 8.0V < VDCIN < 28V, no load 5.25 5.55 V
LDO Load Regulation 0 < ILDO < 10mA 115 mV

_______________________________________________________________________________________ 7
 Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)
MAX1909/MAX8725

(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LDO Undervoltage-Lockout Trip
VDCIN = 8.0V 3.20 5.15 V
Point
REFERENCE
REF Output Voltage Ref 0 < IREF < 500µA 4.1960 4.2520 V
REF Undervoltage-Lockout Trip
REF falling 3.9 V
Point
TRIP POINTS
BATT POWER_FAIL Threshold VDCIN - VBATT, VDCIN falling 50 150 mV
BATT POWER_FAIL Threshold
100 300 mV
Hysteresis
ACIN Threshold ACIN rising 2.007 2.089 V
ACIN Threshold Hysteresis 10 30 mV
SWITCHING REGULATOR
DHI Off-Time VBATT = 16.0V, VDCIN = 19V, VMODE = 3.6V 360 440 ns
DHI Minimum Off-Time VBATT = 16.0V, VDCIN = 17V, VMODE = 3.6V 260 350 ns
DLOV Supply Current IDLOV DLO low 10 µA
Sense Voltage for Battery
MAX1909 only, BATT = 3.0V per cell 3 6 mV
Undervoltage Charge Current
MAX1909 only, MODE = float (3 cell),
9.18 9.42
VBATT rising
Battery Undervoltage Threshold V
MAX1909 only, MODE = LDO (4 cell),
12.235 12.565
VBATT rising
DHIV Output Voltage With respect to SRC -4.5 -5.5 V
DHIV Sink Current 10 mA
DHI On-Resistance Low DHI = VDHIV, IDHI = -10mA 5 Ω
DHI On-Resistance High DHI = VCSSN, IDHI = 10mA 4 Ω
DLO On-Resistance High VDLOV = 4.5V, IDLO = +100mA 7 Ω
DLO On-Resistance Low VDLOV = 4.5V, IDLO = -100mA 3 Ω
ERROR AMPLIFIERS
VCTL = 3.6, VBATT = 16.8V, MODE = LDO 0.0625 0.2500
GMV Loop Transconductance mA/V
VCTL = 3.6, VBATT = 12.6V, MODE = FLOAT 0.0833 0.3330
MAX1909: ICTL = 3.6V, MAX8725: VICTL =
GMI Loop Transconductance 0.5 2.0 mA/V
3.2V, VCSSP - VCSIN = 75mV
GMS Loop Transconductance VCLS = 2.048V, VCSSP - VCSSN = 75mV 0.5 2.0 mA/V
0.25V < VCCV < 2.0V, 0.25V < VCCI < 2.0V,
CCI/CCS/CCV Clamp Voltage 150 600 mV
0.25V < VCCS < 2.0V
LOGIC LEVELS
MODE Input Low Voltage 0.8 V
MODE Input Middle Voltage 1.6 2.0 V

8 _______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
ELECTRICAL CHARACTERISTICS (continued)

MAX1909/MAX8725
(Circuit of Figure 1, VDCIN = VCSSP = VCSSN = 18V, VBATT = VCSIP = VCSIN = 12V, VVCTL = VICTL = 1.8V, MODE = float, ACIN = 0, CLS =
REF, GND = PGND = 0, PKPRES = GND, LDO = DLOV, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
MODE Input High Voltage 2.8 V
ACOK AND PKPRES
ACOK Input Voltage Range 0 28 V
ACOK Sink Current VACOK = 0.4V, ACIN = 1.5V 1 mA
PKPRES Input Voltage Range 0 LDO V
PKPRES Battery Removal Detect % of
MAX8725, PKPRES rising 55
Threshold LDO
PDS, PDL SWITCH CONTROL
PDS Switch Turn-Off Threshold VDCIN - VBATT, VDCIN falling 50 150 mV
PDS Switch Threshold Hysteresis VDCIN - VBATT 100 300 mV
PDS Output Low Voltage, PDS
IPDS = 0A 8 12 V
Below SRC
PDS Turn-On Current PDS = SRC 6 mA
PDS Turn-Off Current VPDS = VSRC - 2V, VDCIN = 16V 10 mA
PDL Switch Turn-On Threshold VDCIN - VBATT, VDCIN falling 50 150 mV
PDL Switch Threshold Hysteresis VDCIN - VBATT 100 300 mV
PDL Turn-On Resistance PDL = GND 50 150 kΩ
PDL Turn-Off Current VSRC - VPDL = 1.5V 6 mA
SRC Input Bias Current SRC = 19, VBATT = 16V 1000 µA

Note 1: Guaranteed by design. Not production tested.

Typical Operating Characteristics

(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)

BATTERY INSERTION
AND REMOVAL RESPONSE SYSTEM LOAD-TRANSIENT RESPONSE
MAX1909/MAX8725 toc01 MAX1909/MAX8725 toc02
5A
ISYSTEMLOAD
17V 0A
VBATT
16V 5A
5A/div IIN
IBATT
VCCV 0A 0A
IIN 5A IBATT
0A 5A/div 0A
CCS
3V 3V
VCCV
VCCI 2V 2V
VCCI VCCI, VCCV VCCI
VCCV
1V 1V
VCCI CCI VCCS
0V 0V
500µs/div 100µs/div

_______________________________________________________________________________________ 9
 Multichemistry Battery Chargers with Automatic
System Power Selector
Typical Operating Characteristics (continued)
MAX1909/MAX8725

(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)

LINE-TRANSIENT RESPONSE LDO LOAD REGULATION

MAX1909/MAX8725 toc03
30V 0

MAX1909/MAX8725 toc04
VDCIN
20V -0.2
INDUCTOR CURRENT

LDO OUTPUT ERROR (%)

200mA/div -0.4
3A
-0.6

-0.8
VBATT AC-COUPLED
200mV/div
-1.0

1.8V -1.2
VCCV
1.6V -1.4
500µs/div 0 1 2 3 4 5 6 7 8 9 10
LDO CURRENT (mA)

LDO LINE REGULATION REF LOAD REGULATION

0.10 0
MAX1909/MAX8725 toc05

MAX1909/MAX8725 toc06
-0.02
0.05
LDO OUTPUT ERROR (%)

REF OUTPUT ERROR (%)

-0.04

-0.06
0
-0.08

-0.05 -0.10

-0.12

-0.10 -0.14
0 10 20 30 0 200 400 600 800 1000
INPUT VOLTAGE (V) REF CURRENT (µA)

REF vs. TEMPERATURE EFFICIENCY vs. CHARGE CURRENT

0.10 100
MAX1909/MAX8725 toc08
MAX1909/MAX8725 toc07

98
4 CELLS
0.05 96
REF OUTPUT ERROR (%)

94
EFFICIENCY (%)

0
92 3 CELLS
-0.05 90
88
-0.10 86
84
-0.15
82
-0.20 80
-40 -15 10 35 60 85 0 0.5 1.0 1.5 2.0 2.5 3.0
TEMPERATURE (°C) CHARGE CURRENT (A)

10 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector

MAX1909/MAX8725
Typical Operating Characteristics (continued)
(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)

SWITCHING FREQUENCY vs. VIN - VBATT IINP ERROR vs. INPUT CURRENT
500 4.0

MAX1909/MAX8725 toc09

MAX1909/MAX8725 toc10
450
3.5
SWITCHING FREQUENCY (kHz)

400 CHARGER
3.0 DISABLED
350
300 2.5

IINP (%)
250 2.0
200
1.5
150
1.0
100
50 0.5

0 0
0 2 4 6 8 10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
VIN - VBATT (V) INPUT CURRENT (A)

INPUT CURRENT-LIMIT ACCURACY

IINP ACCURACY vs. INPUT CURRENT vs. SYSTEM LOAD
8 4
MAX1909/MAX8725 toc11

MAX1909/MAX8725 toc12
VBATT = 13V
INPUT CURRENT-LIMIT ACCURACY (%)

6
3
VBATT = 10V
4
IINP ACCURACY (%)

2
2

0 1
VBATT = 16V
-2 VBATT = 12V
0
-4 ICHARGE = 3A
-1
-6
MAX1909 ONLY
-8 -2
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.5 1.0 1.5 2.0 2.5 3.0
INPUT CURRENT (A) SYSTEM LOAD (A)

INPUT CURRENT-LIMIT ACCURACY

vs. SYSTEM LOAD INPUT CURRENT-LIMIT ACCURACY vs. VCLS
4 3
MAX1909/MAX8725 toc14
MAX1909/MAX8725 toc13

INPUT CURRENT-LIMIT ACCURACY (%)

INPUT CURRENT-LIMIT ACCURACY (%)

3 2

2 1

1 VBATT = 16V VBATT = 12V 0

0 -1

-1 -2
VBATT = 13V VBATT = 10V
-2 -3
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 1.5 2.0 2.5 3.0 3.5
SYSTEM LOAD (A) VCLS (V)

______________________________________________________________________________________ 11
 Multichemistry Battery Chargers with Automatic
System Power Selector
MAX1909/MAX8725

Typical Operating Characteristics (continued)

(Circuit of Figure 2, VDCIN = 20V, charge current = 3A, 4 Li+ series cells, TA = +25°C, unless otherwise noted.)

PDL-PDS SWITCHING, PDS-PDL SWITCHOVER,

AC ADAPTER INSERTION WALL ADAPTER REMOVAL
MAX1909/MAX8725 toc15 MAX1909/MAX8725 toc16
20V
VSYSTEMLOAD
20V 10V
VWALLADAPTER VPDS
VPDS 10V 20V
VWALLADAPTER
20V 10V
VSYSTEMLOAD, VPDS
10V 0V
SYSTEM LOAD VPDL VPDS
20V VPDL
20V
VPDL, VBATT VBATT
10V 10V
VPDL
0V 0V
VPDL
VSYSTEMLOAD
100µs/div 500µs/div

PDS-PDL SWITCHOVER, PDL-PDS SWITCHING,

BATTERY INSERTION BATTERY REMOVAL
MAX1909/MAX8725 toc17 MAX1909/MAX8725 toc18
20V 20V
VPDS VSYSTEM
15V CONDITIONING MODE 15V
VSYSTEM WALL ADAPTER = 18V
CONDITIONING MODE 10V 10V
WALL ADAPTER = 18V VPDS
5V 5V
VPKDET
VPKPRES
0V 0V
VPKPRES VPDL
15V 15V
VBATT VBATT
10V 10V
MAX8725 ONLY
5V V 5V
PDL

0V 0V
50µs/div 10µs/div

12 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Pin Description

MAX1909/MAX8725
PIN NAME FUNCTION
1 DCIN DC Supply Voltage Input. Bypass DCIN with a 1µF capacitor to power ground.
2 LDO Device Power Supply. Output of the 5.4V linear regulator supplied from DCIN. Bypass with a 1µF capacitor.
AC Detect Input. This uncommitted comparator input can be used to detect the presence of the charger’s
3 ACIN
power source. The comparator’s open-drain output is the ACOK signal.
4 REF 4.2235V Voltage Reference. Bypass with a 1µF capacitor to GND.
GND MAX1909: Ground this pin
5
PKPRES MAX8725: Pull PKPRES high to disable charging. Used for detecting presence of battery pack.
AC Detect Output. High-voltage open-drain output is high impedance when ACIN is greater than 2.048V. The
6 ACOK
ACOK output remains a high impedance when the MAX1909/MAX8725 are powered down.
Trilevel Input for Setting Number of Cells and Asserting the Conditioning Mode:
MODE = GND; asserts conditioning mode.
7 MODE
MODE = float; charge with 3 times the cell voltage programmed at VCTL.
MODE = LDO; charge with 4 times the cell voltage programmed at VCTL.
Input Current Monitor Output. The current delivered at the IINP output is a scaled-down replica of the system
8 IINP load current plus the input-referred charge current sensed across CSSP and CSSN inputs. The
transconductance of (CSSP - CSSN) to IINP is 3mA/V.
9 CLS Source Current-Limit Input. Voltage input for setting the current limit of the input source.
10 ICTL Input for Setting Maximum Output Current
11 VCTL Input for Setting Maximum Output Voltage
12 CCI Output Current-Regulation Loop-Compensation Point. Connect 0.01µF to GND.
13 CCV Voltage-Regulation Loop-Compensation Point. Connect 10kΩ in series with 0.1µF to GND.
14 CCS Input Current-Regulation Loop-Compensation Point. Use 0.01µF to GND.
15 GND Analog Ground
16 BATT Battery Voltage Feedback Input
17 CSIN Output Current-Sense Negative Input
18 CSIP Output Current-Sense Positive Input. Connect a current-sense resistor from CSIP to CSIN.
19 PGND Power Ground
Low-Side Power-MOSFET Driver Output. Connect to low-side NMOS gate. When the MAX1909/MAX8725 are
20 DLO
shut down, the DLO output is LOW.
21 DLOV Low-Side Driver Supply. Bypass with a 1µF capacitor to ground.
22 DHIV High-Side Driver Supply. Bypass with a 0.1µF capacitor to SRC.
High-Side Power-MOSFET Driver Output. Connect to high-side PMOS gate. When the MAX1909/MAX8725 are
23 DHI
shut down, the DHI output is HIGH.
24 SRC Source Connection for Driver for PDS/PDL Switches. Bypass SRC to power ground with a 1µF capacitor.
25 CSSN Input Current Sense for Charger (Negative Input)
26 CSSP Input Current Sense for Charger (Positive Input). Connect a current-sense resistor from CSSP to CSSN.
Power-Source PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDS output
27 PDS
is pulled to SRC through an internal 1MΩ resistor.
System-Load PMOS Switch Driver Output. When the MAX1909/MAX8725 are powered down, the PDL output
28 PDL
is pulled to ground through an internal 100kΩ resistor.

______________________________________________________________________________________ 13
 Multichemistry Battery Chargers with Automatic
System Power Selector
MAX1909/MAX8725

P3 RS1 TO
AC ADAPTER 0.01Ω SYSTEM LOAD

C1
22µF
0.1µF 0.1µF
SRC
OUTPUT VOLTAGE: 12.6V
C22
CHARGE I LIMIT: 3.0A 1µF CSSP CSSN
PDS C17
R6 D4
SRC 0.1µF
590kΩ DHIV
R7
1% DCIN
196kΩ
C5
1%
1µF
MAX1909 PDL P2
MAX8725 LDO
VCTL
R4 C13
LDO 100kΩ 1µF R13
ICTL 33Ω
OUTPUT DLOV
C16
ACIN 1µF
LDO
MODE
(INPUT I LIMIT: 7.5A) P1
R8
1MΩ LDO DHI
REF CLS

ACOK

TO DLO N1
HOST L1
SYSTEM 10µH
LDO PGND

R9
10kΩ CSIP

PKPRES (MAX8725 ONLY) RS2

0.015Ω

CCV CSIN
BATT BATT +
CCI
R5 C4
10kΩ CCS GND 22µF
REF
C9
0.01µF C12 BATTERY
C11 C10 1µF
0.1µF 0.01µF

TEMP
GND BATT -

PGND GND

Figure 1. Typical Operating Circuit Demonstrating Hardwired Control

14 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector

MAX1909/MAX8725
P3 P4 RS1 TO
AC ADAPTER 0.01Ω SYSTEM LOAD

C1
22µF
0.1µF 0.1µF
SRC
OUTPUT VOLTAGE: 16.8V
C15 CSSP CSSN
1µF
PDS C17
R6 D4
SRC 0.1µF
590kΩ DHIV
R7
1% DCIN
196kΩ
C5
1%
1µF
MAX1909 PDL P2
LDO
MAX8725 LDO
VCTL
C13
1µF R13
D/A OUTPUT ICTL 33Ω
OPEN-DRAIN DLOV
C16
OUTPUTS MODE
1µF
ACIN
LDO
P1

R8 DHI
1MΩ
INPUT ACOK

OUTPUT PKPRES (MAX8725 ONLY)

DLO N1
A/D INPUT IINP L1
(INPUT I LIMIT: 7.5A) 10µH
C14 R9 REF CLS PGND
0.1µF 10kΩ
CCV
CSIP
R5
10kΩ RS2
HOST 0.015Ω
C11
LDO
0.1µF CSIN
BATT BATT +
R21 CCI
R19, R20 C4
10kΩ CCS GND 22µF
10kΩ REF
AVDD/REF
C9 C12 SMART
C10
0.01µF 1µF BATTERY
0.01µF

SCL SCL
SDA SDA
TEMP
GND BATT -

PGND GND

Figure 2. Smart-Battery Charger Circuit Demonstrating Operation with a Host Microcontroller

______________________________________________________________________________________ 15
 Multichemistry Battery Chargers with Automatic
System Power Selector
MAX1909/MAX8725

DCIN
MAX8725 ONLY
PKPRES LDO
PACK_ON
RDY
0.9 * LDO 5.4V
4.2235V
LINEAR REF
REFERENCE
REGULATOR

ICTLOK
ACIN
CHG ACOK
0.8V
LOGIC

GND
BATT
SRDY 2.048V

DRIVER
DCIN SRC
GND PDS
CHG
CCS SRC-10V DRIVER

PDL
CLS MODE

100kΩ

CSSP GMS SWITCH LOGIC

LEVEL
SHIFTER
CSSN

CSIP
LEVEL Gm IINP
SHIFTER
CSIN
SRC

GMI
DRIVER
ICTL DHI

CCI
DHIV
BATT
MAX1909 ONLY LVC
BATT_UV

DC-DC
CELL SELECT CONVERTER
3.0V/CELL GMV
LOGIC AND
MODE
BATTERY VOLTAGE-
DIVIDER

CCV
REF DLOV

DRIVER
R
9R DLO
VCTL MAX1909
MAX8725 PGND
R

Figure 3. Functional Diagram

16 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Detailed Description Setting the Charge Voltage

MAX1909/MAX8725
The MAX1909/MAX8725 use a high-accuracy voltage
The MAX1909/MAX8725 include all of the functions
regulator for charge voltage. The VCTL input adjusts
necessary to charge Li+, NiMH, and NiCd batteries. A
the battery output voltage. In default mode (VCTL =
high-efficiency, synchronous-rectified step-down DC-
LDO), the overall accuracy of the charge voltage is
DC converter is used to implement a precision con-
±0.5%. VCTL is allowed to vary from 0 to 3.6V, which
stant-current, constant-voltage charger with input
provides a 10% adjustment range of the battery volt-
current limiting. The DC-DC converter uses external
age. Limiting the adjustment range reduces the sensi-
p-channel/n-channel MOSFETs as the buck switch and
tivity of the charge voltage to external resistor
synchronous rectifier to convert the input voltage to the
tolerances from ±1% to ±0.05%. The overall accuracy
required charge current and voltage. The charge cur-
of the charge voltage is better than ±1% when using
rent and input current-limit sense amplifiers have low-
±1% resistors to divide down the reference to establish
input-referred offset errors and can use small-value
VCTL. The per-cell battery termination voltage is a func-
sense resistors. The MAX1909/MAX8725 feature a volt-
tion of the battery chemistry and construction. Consult
age-regulation loop (CCV) and two current-regulation
the battery manufacturer to determine this voltage. The
loops (CCI and CCS). The CCV voltage-regulation loop
battery voltage is calculated by the equation:
monitors BATT to ensure that its voltage never exceeds
the voltage set by VCTL. The CCI battery current-regu-
 V − 1.8V  
lation loop monitors current delivered to BATT to ensure VBATT = CELL VREF +  VCTL 
that it never exceeds the current limit set by ICTL. A   9.52 
third loop (CCS) takes control and reduces the charge
current when the sum of the system load and the input- where VREF = 4.2235V, and CELL is the number of cells
referred charge current exceeds the power source cur- selected with the MAX1909/MAX8725s’ trilevel MODE
rent limit set by CLS. Tying CLS to the reference control input. When MODE is tied to the LDO output,
voltage provides a 7.5A input current limit with a 10mΩ CELL = 4. When MODE is left floating, CELL = 3. When
sense resistor. MODE is tied to ground, the charger enters condition-
ing mode, which is used to isolate the battery from the
The ICTL, VCTL, and CLS analog inputs set the charge
charger and discharge it through the system load. See
current, charge voltage, and input current limit, respec-
the Conditioning Mode section. The internal error ampli-
tively. For standard applications, internal set points for
fier (GMV) maintains voltage regulation (see Figure 3
ICTL and VCTL provide a 3A charge current using a
for the Functional Diagram). The voltage-error amplifier
15mΩ sense resistor and a 4.2V per-cell charge volt-
is compensated at CCV. The component values shown
age. The variable for controlling the number of cells is
in Figures 1 and 2 provide suitable performance for
set with the MODE input. The MAX8725 includes a
most applications. Individual compensation of the volt-
PKPRES input used for battery-pack detection.
age regulation and current-regulation loops allow for
Based on the presence or absence of the AC adapter, optimal compensation. See the Compensation section.
the MAX1909/MAX8725 automatically provide an open-
drain logic output signal ACOK and select the appropri- Setting the Charge Current
ate source for supplying power to the system. A The voltage on the ICTL input sets the maximum
p-channel load switch controlled from the PDL output and voltage across current-sense resistor RS2, which in turn
a similar p-channel source switch controlled from the PDS determines the charge current. The full-scale differen-
output are used to implement this function. Using the tial voltage between CSIP and CSIN is 75mV; thus, for a
MODE control input, the MAX1909/MAX8725 can be pro- 0.015Ω sense resistor, the maximum charge current is
grammed to perform a relearning, or conditioning, cycle 5A. In default mode (ICTL = LDO), the sense voltage is
in which the battery is isolated from the charger and com- 45mV with an overall accuracy of ±5%. The charge cur-
pletely discharged through the system load. When the rent is programmed with ICTL using the equation:
battery reaches 100% depth of discharge, it is recharged
to full capacity. 0.075 VICTL
ICHG = ×
The circuit shown in Figure 1 demonstrates a simple RS2 3.6V
hardwired application, while Figure 2 shows a typical
application for smart-battery systems with variable
charge current and source switch configuration that sup-
ports battery conditioning. Smart-battery systems typical-
ly use a host µC to achieve this added functionality.

______________________________________________________________________________________ 17
 Multichemistry Battery Chargers with Automatic
System Power Selector
The input range for ICTL is 0 to 3.6V on the MAX1909,
MAX1909/MAX8725
and 0 to 3.2V on the MAX8725. The charger shuts down
if ICTL is forced below 0.75V for the MAX1909 and 0.06V
for the MAX8725. When choosing current-sense resistor
RS2, note that it must have a sufficient power rating to
handle the full-load current. The sense resistor’s I 2R
power loss reduces charger efficiency. Adjusting ICTL to
drop the voltage across the current-sense resistor
improves efficiency, but may degrade accuracy due to
the current-sense amplifier’s input offset error. The
charge-current error amplifier (GMI) is compensated at
the CCI pin. See the Compensation section.
Conditioning Charge
The MAX1909 includes a battery voltage comparator
that allows a conditioning charge of overdischarged
Li+ battery packs. If the battery-pack voltage is less
than 3.1V x the number of cells programmed by
CELLS, the MAX1909 charges the battery with 300mA
current when using sense resistor RS2 = 0.015Ω. After
the battery voltage exceeds the conditioning charge
threshold, the MAX1909 resumes full-charge mode,
charging to the programmed voltage and current limits.
The MAX8725 does not provide automatic support for
providing a conditioning charge. To configure the
MAX8725 to provide a conditioning charge current,
ICTL should be directly driven.
Setting the Input Current Limit
The total input current, from a wall cube or other DC
source, is the sum of the system supply current and the
current required by the charger. The MAX1909/MAX8725
reduce the source current by decreasing the charge cur-
rent when the input current exceeds the set input current
limit. This technique does not truly limit the input current.
As the system supply current rises, the available charge
current drops proportionally to zero. Thereafter, the total
input current can increase without limit.
An internal amplifier compares the differential voltage
between CSSP and CSSN to a scaled voltage set with
the CLS input. VCLS can be driven directly or set with a
resistive voltage-divider between REF and GND.
Connect CLS to REF to set the input current-limit sense
voltage to the maximum value of 75mV. Calculate the
input current as follows:
0.075 VCLS
IIN = × significantly load the battery. Under these conditions, a
RS1 VREF
V CLS determines the reference voltage of the GMS
error amplifier. Sense resistor RS1 sets the maximum
allowable source current. Once the input current limit is
reached, the charge current is decreased linearly until
the input current is below the desired threshold.
18 ______________________________________________________________________________________
Duty cycle affects the accuracy of the input current
limit. AC load current also affects accuracy (see the
Typical Operating Characteristics). Refer to the
MAX1909/MAX8725 EV kit data sheet for more details
on reducing the effects of switching noise.
When choosing the current-sense resistor RS1, carefully
calculate its power rating. Take into account variations
in the system’s load current and the overall accuracy of
the sense amplifier. Note that the voltage drop across
RS1 contributes additional power loss, which reduces
efficiency.
System currents normally fluctuate as portions of the
system are powered up or put to sleep. Without input
current regulation, the input source must be able to
deliver the maximum system current and the maximum
charger input current. By using the input current-limit
circuit, the output current capability of the AC wall
adapter can be lowered, reducing system cost.
Current Measurement
The MAX1909/MAX8725 include an input current monitor
IINP. The current delivered at the IINP output is a scaled-
down replica of the system load current plus the input-
referred charge current that is sensed across CSSP and
CSSN inputs. The output voltage range is 0 to 3V.
The voltage of IINP is proportional to the input current
according to the following equation:
VIINP = ISOURCE ✕ RS1 ✕ GIINP ✕ R9
where ISOURCE is the DC current supplied by the AC
adapter power, GIINP is the transconductance of IINP
(3mA/V typ), and R9 is the resistor connected between
IINP and ground.
Leave the IINP pin unconnected if not used.
LDO Regulator
LDO provides a 5.4V supply derived from DCIN and
can deliver up to 10mA of extra load current. The low-
side MOSFET driver is powered by DLOV, which must
be connected to LDO as shown in Figure 1. LDO also
supplies the 4.2235V reference (REF) and most of the
control circuitry. Bypass LDO with a 1µF capacitor.
Shutdown and Charge Inhibit (PKPRES)
When the AC adapter is removed, the MAX1909/
MAX8725 shut down to a low-power state that does not
maximum of 6µA is drawn from the battery through the
combined load of the SRC, CSSP, CSSN, CSIP, CSIN,
and BATT inputs. The charger enters this low-power state
when DCIN falls below the undervoltage-lockout (UVLO)
threshold of 7V. The PDS switch turns off, the PDL switch
turns on, and the system runs from the battery.
Multichemistry Battery Chargers with Automatic
System Power Selector
The body diode of the PDL switch prevents the voltage
on the power source output from collapsing.
Charging can also be inhibited by driving ICTL below
0.035V, which suspends switching and pulls CCI, CCS,
and CCV to ground. The PDS and PDL drivers, LDO,
input current monitor, and control logic (ACOK) all
remain active in this state. Approximately 3mA of sup-
ply current is drawn from the AC adapter and 3µA
(max) is drawn from the battery to support these
functions.
In smart-battery systems, PKPRES is usually driven from a
voltage-divider formed with a low-value resistor or PTC
thermistor inside the battery pack and a local resistive
pullup. This arrangement automatically detects the pres-
ence of a battery. The MAX8725 threshold voltage is 55%
of VLDO, with hysteresis of 1% VLDO to prevent erratic
transitions.
AC Adapter Detection and
Power-Source Selection
The MAX1909/MAX8725 include a hysteretic compara-
tor that detects the presence of an AC power adapter
and automatically delivers power to the system load
from the appropriate available power source. When the
adapter is present, the open-drain ACOK output
becomes high impedance. The switch threshold at
ACIN is 2.048V. Use a resistive voltage-divider from the
adapter’s output to the ACIN pin to set the appropriate
detection threshold. When charging, the battery is iso-
lated from the system load with the p-channel PDL
switch, which is biased off. When the adapter is absent,
the drives to the switches change state in a fast break-
before-make sequence. PDL begins to turn on 7.5µs
after PDS begins to turn off.
The threshold for selecting between the PDL and PDS
switches is set based on the voltage difference
between the DCIN and the BATT pins. If this voltage
difference drops below 100mV, the PDS is switched off
and PDL is switched on. Under these conditions, the
MAX1909/MAX8725 are completely powered down.
The PDL switch is kept on with a 100kΩ pulldown resis-
tor when the charger is powered down through ICTL or
PKPRES, or when the AC adapter is removed.
The drivers for PDL and PDS are fully integrated. The pos-
itive bias inputs for the drivers connect to the SRC pin and
the negative bias inputs connect to a negative regulator
referenced to SRC. With this arrangement, the drivers can
swing from SRC to approximately 10V below SRC.
______________________________________________________________________________________
Conditioning Mode
MAX1909/MAX8725
The MAX1909/MAX8725 can be programmed to per-
form a conditioning cycle to calibrate the battery’s fuel
gauge. This cycle consists of isolating the battery from
the charger and discharging it through the system load.
When the battery reaches 100% depth of discharge, it
is then recharged. Driving the MODE pin low places the
MAX1909/MAX8725 in conditioning mode, which stops
the charger from switching, turns the PDS switch off,
and turns the PDL switch on.
To utilize the conditioning mode function, the configura-
tion of the PDS switch must be changed to two source-
connected FETs to prevent the AC adapter from sup-
plying current to the system through the MOSFET’s
body diode. See Figure 2. The SRC pin must be con-
nected to the common source node of the back-to-back
FETs to properly drive the MOSFETs.
It is essential to alert the user that the system
is performing a conditioning cycle. If the user termi-
nates the cycle prematurely, the battery can be dis-
charged even though the system was running off the
AC adapter for a substantial period of time. If the AC
adapter is in fact removed during conditioning, the
MAX1909/MAX8725 keep the PDL switch on and the
charger remains off as it would in normal operation.
In the MAX8725, if the battery is removed during condi-
tioning mode, the PKPRES control overrides condition-
ing mode. When MODE is grounded and PKPRES goes
high, the PDS switch starts turning on within 7.5µs and
the system is powered from the AC adapter.
In the MAX1909, disable conditioning mode before the
battery is overdischarged or removed.
DC-DC Converter
The MAX1909/MAX8725 employ a buck regulator with a
PMOS high-side switch and a low-side NMOS synchro-
nous rectifier. The MAX1909/MAX8725 feature a pseu-
do-fixed-frequency, cycle-by-cycle current-mode
control scheme. The off-time is dependent upon VDCIN,
VBATT, and a time constant, with a minimum tOFF of
300ns. The MAX1909/MAX8725 can also operate in
discontinuous conduction for improved light-load effi-
ciency. The operation of the DC-DC controller is deter-
mined by the following four comparators as shown in
Figure 4:
• CCMP: Compares the control point (lowest voltage
clamp (LVC)) against the charge current (CSI). The
high-side MOSFET on-time is terminated if the CCMP
output is high.
19
 Multichemistry Battery Chargers with Automatic
System Power Selector
MAX1909/MAX8725

AC ADAPTER

CSSP CSSN

MAX1909
DHI
MAX8725
CSS DHI
20X

IMAX

1.94V

R Q

COMP
S Q

DLO
DLO

IMIN

0.15V
TOFF

ZCMP

0.1V

LVC CLS

GMS

ICTL
CSIP
LVC GMI
CSI
20X CSIN
VCTL

GMV
BATT

CCV CCI CCS

COUT

RCCV

CCV CCI CCS

Figure 4. DC-DC Converter Functional Diagram

20 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
• IMIN: Compares the control point (LVC) against

MAX1909/MAX8725
0.15V (typ). If IMIN output is low, then a new cycle 1 VCSSN − VBATT
t OFF =
cannot begin. This comparator determines whether fNOM VCSSN
the regulator operates in discontinuous mode.
• IMAX: Compares the charge current (CSI) to the where fNOM = 400kHz:
internally fixed cycle-by-cycle current limit. The
current-sense voltage limit is 97mV. With RS2 = L × IRIPPLE
t ON =
0.015Ω, this corresponds to 6A. The high-side VCSSN − VBATT
MOSFET on-time is terminated if the IMAX output is
high and a new cycle cannot begin until IMAX goes
low. IMAX protects against sudden overcurrent V ×t
where IRIPPLE = BATT OFF
faults. L
• ZCMP: Compares the charge current (CSI) to 333mA
(RS2 = 0.015Ω). The current-sense voltage threshold
is 5mV. If ZCMP output is high, then both MOSFETs 1
f=
are turned off. The ZCMP comparator terminates the t ON + t OFF
switch on-time in discontinuous mode.
CCV, CCI, CCS, and LVC Control Blocks These equations describe the controller’s pseudo-fixed-
The MAX1909/MAX8725 control charge voltage (CCV frequency performance over the most common operat-
control loop), charge current (CCI control loop), or input ing conditions.
current (CCS control loop), depending on the operating At the end of the fixed off-time, the controller can initiate
conditions. The three control loops, CCV, CCI, and CCS, a new cycle if the control point (LVC) is greater than
are brought together internally at the LVC amplifier. The 0.15V (IMIN = high) and the peak charge current is less
output of the LVC amplifier is the feedback control than the cycle-by-cycle limit (IMAX = low). If the charge
signal for the DC-DC controller. The minimum current exceeds IMAX, the on-time is terminated by the
voltage at CCV, CCI, or CCS appears at the output of IMAX comparator.
the LVC amplifier and clamps the other two control If during the off-time the inductor current goes to zero,
loops to within 0.3V above the control point. Clamping ZCMP = high, both the high- and low-side MOSFETs
the other two control loops close to the lowest control are turned off until another cycle is ready to begin. This
loop ensures fast transition with minimal overshoot condition is discontinuous conduction. See the
when switching between different control loops (see the Discontinuous Conduction section.
Compensation section).
There is a minimum 0.3µs off-time when the (VDCIN -
Continuous Conduction Mode VBATT) differential becomes too small. If VBATT ≥ 0.88 x
With sufficient battery current loading, the MAX1909/ V DCIN , then the threshold for minimum off-time is
MAX8725s’ inductor current never reaches zero, which reached and the tOFF is fixed at 0.3µs. The switching
is defined as continuous conduction mode. If the BATT frequency in this mode varies according to the equation:
voltage is within the following range:
3.1V ✕ (number of cells) < VBATT < (0.88 ✕ VDCIN) 1
f =
the regulator is not in dropout and switches at fNOM =  VBATT 
t OFF  + 1
400kHz. The controller starts a new cycle by turning on  VCSSN − VBATT 
the high-side p-channel MOSFET and turning off the
low-side n-channel MOSFET. When the charge current Discontinuous Conduction
is greater than the control point (LVC), CCMP goes high The MAX1909/MAX8725 enter discontinuous-conduc-
and the off-time is started. The off-time turns off the tion mode when the output of the LVC control point falls
high-side p-channel MOSFET and turns on the low-side below 0.15V. For RS2 = 0.015Ω, this corresponds to
n-channel MOSFET. The operating frequency is gov- 0.5A:
erned by the off-time and is dependent upon VDCIN
0.15V
and VBATT. The off-time is set by the following equation: IMIN = = 0.5A
20 × RS2
where RS2 = 0.015Ω.

______________________________________________________________________________________ 21
 Multichemistry Battery Chargers with Automatic
System Power Selector
In discontinuous mode, a new cycle is not started until
MAX1909/MAX8725

the LVC voltage rises above 0.15V. Discontinuous-

mode operation can occur during conditioning charge BATT
of overdischarged battery packs, when the charge cur- GMOUT
rent has been reduced sufficiently by the CCS control
loop, or when the charger is in constant voltage mode RESR RL
with a nearly full battery pack.
COUT
CCV
Compensation GMV
The charge voltage, charge current, and input current-
limit regulation loops are compensated separately and RCV ROGMV
independently at the CCV, CCI, and CCS pins.
CCV REF
CCV Loop Compensation
The simplified schematic in Figure 5 is sufficient to
describe the operation of the MAX1909/MAX8725 when
the voltage loop (CCV) is in control. The required com- Figure 5. CCV Loop Diagram
pensation network is a pole-zero pair formed with CCV 1
and RCV. The pole is necessary to roll off the voltage GMOUT =
A CSI × RS2
loop’s response at low frequency. The zero is necessary
to compensate the pole formed by the output capacitor where ACSI = 20, and RS2 = 0.015Ω in the Typical
and the load. RESR is the equivalent series resistance Operating Circuits (Figures 1 and 2), so GM OUT =
(ESR) of the charger output capacitor (COUT). RL is the 3.33A/V.
equivalent charger output load, where RL = ∆VBATT /
∆ICHG. The equivalent output impedance of the GMV The loop transfer function is:
amplifier, ROGMV, is greater than 10MΩ. The voltage ROGMV × (1 + sCCV × RCV )
loop transconductance (GMV = ICCV / VBATT) depends LTF = GMOUT × ×
on the MODE input, which determines the number of (1+ sCCV × ROGMV )
cells. GMV = 0.125mA/mV for 4 cells and GMV = RL
0.167mA/mV for 3 cells. The DC-DC converter transcon- GMV (1+ sCOUT × RESR )
ductance is dependent upon the charge current-sense
(1+ sCOUT × RL )
resistor RS2:

Table 1. Poles and Zeros of the Voltage-Loop Transfer Function

NO. NAME CALCULATION DESCRIPTION
Lowest frequency pole created by CCV and GMV’s finite output
1
fP _ CV = resistance. Since ROGMV is very large and not well controlled, the
1 CCV pole 2πROGMV × CCV exact value for the pole frequency is also not well controlled
(ROGMV > 10MΩ).
Voltage-loop compensation zero. If this zero is at the same
1 frequency or lower than the output pole fP_OUT, then the loop
2 CCV zero
fZ _ CV = transfer function approximates a single pole response near the
2πRCV × CCV
crossover frequency. Choose CCV to place this zero at least one
decade below crossover to ensure adequate phase margin.
1 Output pole formed with the effective load resistance RL and the
3 Output pole
fP _ OUT = output capacitance COUT. RL influences the DC gain but does not
2πRL × COUT
affect the stability of the system or the crossover frequency.
Output ESR Zero. This zero can keep the loop from crossing unity
1
fZ _ OUT = gain if fZ_OUT is less than the desired crossover frequency;
4 Output zero 2πRESR × COUT therefore, choose a capacitor with an ESR zero greater than the
crossover frequency.

22 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
The poles and zeros of the voltage-loop transfer function Setting the LTF = 1 to solve for the unity-gain frequency

MAX1909/MAX8725
are listed from lowest frequency to highest frequency in yields:
Table 1.
Near crossover, CCV has a much lower impedance fCO _ CV = GMOUT × GMV  RCV 

than ROGMV. Since CCV is in parallel with ROGMV, CCV  2π × COUT 
dominates the parallel impedance near crossover.
Additionally, RCV has a much higher impedance than For stability, choose a crossover frequency lower than
CCV and dominates the series combination of RCV and 1/10th of the switching frequency. Choosing a
CCV, so: crossover frequency of 30kHz and solving for R CV
using the component values listed in Figure 1 yields:
ROGMV × (1 + sCCV × RCV ) MODE = VCC (4 cells)
≅ RCV
(1+ sCCV × ROGMV ) GMV = 0.125µA/mV
COUT also has a much lower impedance than RL near COUT = 22µF
crossover, so the parallel impedance is mostly capaci- VBATT = 16.8V
tive and: RL = 0.2Ω
RL 1 GMOUT = 3.33A/V
≅
(1+ sCOUT × RL ) sCOUT fCO_CV = 30kHz
fOSC = 400kHz
If RESR is small enough, its associated output zero has
a negligible effect near crossover and the loop-transfer 2π × COUT × fCO _ CV
function can be simplified as follows: RCV = = 10kΩ
GMV × GMOUT
RCV
LTF = GMOUT × GMV
sCOUT To ensure that the compensation zero adequately can-
cels the output pole, select fZ_CV ≤ fP_OUT:
CCV ≥ (RL/RCV) COUT
where CCV ≥ 4nF (assuming 4 cells and 4A maximum
charge current).
Figure 6 shows the Bode plot of the voltage-loop fre-
quency response using the values calculated above.
CCI Loop Compensation
The simplified schematic in Figure 7 is sufficient to
80 0
describe the operation of the MAX1909/MAX8725 when
the battery current loop (CCI) is in control. Since the
60
output capacitor’s impedance has little effect on the
response of the current loop, only a single pole is
PHASE (DEGREES)
MAGNITUDE (dB)

40 -45
required to compensate this loop. ACSI is the internal
gain of the current-sense amplifier. RS2 is the charge
20
current-sense resistor, RS2 = 15mΩ. R OGMI is the
equivalent output impedance of the GMI amplifier,
0 -90
which is greater than 10MΩ. GMI is the charge-current
amplifier transconductance = 1µA/mV. GMOUT is the
-20 MAG DC-DC converter transconductance = 3.3A/V.
PHASE
-40 -135 The loop transfer function is given by:
0.1 1 10 100 1k 10k 100k 1M
FREQUENCY (Hz) ROGMI
LTF = GMOUT × A CSI × RS2 × GMI
1+ sROGMI × CCI
Figure 6. CCV Loop Response

______________________________________________________________________________________ 23
 Multichemistry Battery Chargers with Automatic
System Power Selector
MAX1909/MAX8725

100 0
CSIP CSIN MAG
GMOUT 80 PHASE
RS2
60

MAGNITUDE (dB)
40
CSI
-45
20

0
CCI
GMI -20

CCI ROGMI -40 -90

0.1 10 1k 100k
ICTL FREQUENCY (Hz)

Figure 7. CCI Loop Diagram Figure 8. CCI Loop Response

This describes a single-pole system. Since: CCS Loop Compensation

1 The simplified schematic in Figure 9 is sufficient to
GMOUT =
A CSI × RS2
the loop transfer function simplifies to:
ROGMI
LTF = GMI
1+ sROGMI × CCI
The crossover frequency is given by:
GMI
fCO _ CI =
2πCCI
For stability, choose a crossover frequency lower than
1/10th of the switching frequency:
CCI = GMI / (2π fO_CI)
Choosing a crossover frequency of 30kHz and using the
component values listed in Figure 1 yields CCI > 5.4nF.
Values for CCI greater than 10 times the minimum value
may slow down the current-loop response excessively.
Figure 8 shows the Bode plot of the current-loop fre-
quency response using the values calculated above.
describe the operation of the MAX1909/MAX8725 when
the input current-limit loop (CCS) is in control. Since the
output capacitor’s impedance has little effect on the
response of the input current-limit loop, only a single
pole is required to compensate this loop. ACSS is the
internal gain of the current-sense amplifier. RS1 is the
input current-sense resistor; RS1 = 10mΩ in the typical
operating circuits. R OGMS is the equivalent output
impedance of the GMS amplifier, which is greater than
10MΩ. GMS is the charge-current amplifier transcon-
ductance = 1µA/mV. GMIN is the DC-DC converter’s
input-referred transconductance = (1/D) GM OUT =
(1/D) 3.3A/V.
ADAPTER
INPUT
CSSP
CLS CSS RS1
CSSN
GMS

CCS GMIN

CCS ROGMS SYSTEM

LOAD

Figure 9. CCS Loop Diagram

24 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
MOSFET Drivers

MAX1909/MAX8725
100 0
The DHI and DLO outputs are optimized for driving
moderately-sized power MOSFETs. The MOSFET drive
MAG
80 PHASE capability is the same for both the low-side and high-
side switches. This is consistent with the variable duty
60 factor that occurs in the notebook computer environ-

PHASE (DEGREES)
MAGNITUDE (dB)

ment where the battery voltage changes over a wide

40
-45
range. An adaptive dead-time circuit monitors the DLO
20 output and prevents the high-side FET from turning on
until DLO is fully off. There must be a low-resistance,
0 low-inductance path from the DLO driver to the
MOSFET gate for the adaptive dead-time circuit to work
-20 properly. Otherwise, the sense circuitry in the
-40 -90
MAX1909/MAX8725 interpret the MOSFET gate as “off”
0.1 10 1k 100k 10M while there is still charge left on the gate. Use very
FREQUENCY (Hz) short, wide traces measuring 10 squares to 20 squares
or less (1.25mm to 2.5mm wide if the MOSFET is 25mm
from the device). Unlike the DLO output, the DHI output
Figure 10. CCS Loop Response uses a fixed-delay 50ns time to prevent the low-side
FET from turning on until DHI is fully off. The same lay-
The loop transfer function is given by: out considerations should be used for routing the DHI
signal to the high-side FET.
ROGMS
LTF = GMIN × A CSS × RS1× GMS Since the transition time for a p-channel switch can be
1+ sROGMS × CCS much longer than an n-channel switch, the dead time
prior to the high-side PMOS turning on is more pro-
Since: nounced than in other synchronous step-down regula-
1 tors, which use high-side n-channel switches. On the
GMIN =
A CSS × RS1 high-to-low transition, the voltage on the inductor’s
“switched” terminal flies below ground until the low-side
the loop transfer function simplifies to: switch turns on. A similar dead-time spike occurs on
the opposite low-to-high transition. Depending upon the
ROGMS magnitude of the load current, these spikes usually
LTF = GMS
1+ sROGMS × CCS have a minor impact on efficiency.
The high-side driver (DHI) swings from SRC to 5V
The crossover frequency is given by: below SRC and typically sources 0.9A and sinks 0.5A
from the gate of the p-channel FET. The internal pull-
GMS down transistors that drive DHI high are robust, with a
fCO _ CS =
2πCCS 2.0Ω (typ) on-resistance.
The low-side driver (DLO) swings from DLOV to ground
For stability, choose a crossover frequency lower than and typically sources 0.5A and sinks 0.9A from the gate
1/10th the switching frequency: of the n-channel FET. The internal pulldown transistors
CCS = GMS / (2π fCO_CS) that drive DLO low are robust, with a 1.0Ω (typ) on-
Choosing a crossover frequency of 30kHz and using resistance. This helps prevent DLO from being pulled
the component values listed in Figure 1 yields CCS > up when the high-side switch turns on, due to capaci-
5.4nF. Values for CCI greater than 10 times the mini- tive coupling from the drain to the gate of the low-side
mum value may slow down the current-loop response MOSFET. This places some restrictions on the FETs
excessively. Figure 10 shows the Bode plot of the input that can be used. Using a low-side FET with smaller
current-limit loop frequency response using the values gate-to-drain capacitance can prevent these problems.
calculated above.

______________________________________________________________________________________ 25
 Multichemistry Battery Chargers with Automatic
System Power Selector
Table 2. Recommended Components
MAX1909/MAX8725

REFERENCE QTY DESCRIPTION REFERENCE QTY DESCRIPTION

22µF ±20%, 35V E-size low-ESR Dual n- and p-channel MOSFETs, 7A,
tantalum capacitors 30V and -5A, -30V, 8-pin SO, MOSFET
C1, C4 2
AVX TPSE226M035R0300 Fairchild FDS8958A or
Kemet T495X226M035AS N1/P1 1 Single n-channel MOSFETs, +13.5A,
1µF ±10%, 25V, X7R ceramic capacitors +30V FDS6670S and
(1206) Single p-channel MOSFETs, -13.5A,
C5, C15 2 Murata GRM31MR71E105K -30V FDS66709Z
Taiyo Yuden TMK316BJ105KL Single, p-channel, -11A, -30V, 8-pin SO
TDK C3216X7R1E105K P2, P3, P4 3 MOSFETs
0.01µF ±10%, 25V, X7R ceramic Fairchild FDS6675
capacitors (0402) R4 1 100kΩ, ±5% resistor (0603)
C9, C10 2
Murata GRP155R71E103K R5, R9, R21 2 10kΩ ±1% resistors (0603)
TDK C1005X7R1E103K
R6 1 590kΩ ±1% resistor (0603)
0.1µF ±10%, 25V, X7R ceramic R7 1 196kΩ ±1% resistor (0603)
C11, C14, capacitors (0603)
3 R8 1 1MΩ ±5% resistor (0603)
C17 Murata GRM188R71E104K
TDK C1608X7R1E104K R11 1 1kΩ ±5% resistor (0603)
1µF ±10%, 6.3V, X5R ceramic R16 1 33Ω ±5% resistor (0603)
capacitors (0603) R19, R20 2 10kΩ ±5% resistors (0603)
C12, C13,
3 Murata GRM188R60J105K 0.01Ω ±1%, 0.5W sense resistor (2010)
C16
Taiyo Yuden JMK107BJ105KA RS1 1 Vishay Dale WSL2010 0.010 1.0%
TDK C1608X5R1A105K IRC LRC-LR2010-01-R010-F
Schottky diode, 0.5A, 30V SOD-123 0.015Ω ±1%, 0.5W sense resistor (2010)
Diodes Inc. B0530W RS2 1 Vishay Dale WSL2010 0.015 1.0%
D4 1
General Semiconductor MBR0530 IRC LRC-LR2010-01-R015-F
ON Semiconductor MBR0530
MAX1909ETI/MAX8725ETI (28-pin thin
25V ±1% zener diode U1 1
D5 1 QFN-EP)
CMDZ5253B
10µH, 4.4A inductor
L1 1 Sumida CDRH104R-100NC
TOKO 919AS-100M

Design Procedure for these devices focus on the challenge of obtaining

Table 2 lists the recommended components and refers
to the circuit of Figure 2. The following sections
describe how to select these components.
MOSFET Selection
MOSFETs P2 and P3 (Figure 1) provide power to the
system load when the AC adapter is inserted. These
devices may have modest switching speeds, but must
be able to deliver the maximum input current as set by
RS1. As always, care should be taken not to exceed
the device’s maximum voltage ratings or the maximum
operating temperature.
The p-channel/n-channel MOSFETs (P1, N1) are the
switching devices for the buck controller. The guidelines
high load-current capability when using high-voltage
(>20V) AC adapters. Low-current applications usually
require less attention. The high-side MOSFET (P1) must
be able to dissipate the resistive losses plus the switching
losses at both VDCIN(MIN) and VDCIN(MAX).
Ideally, the losses at VDCIN(MIN) should be roughly equal
to losses at VDCIN(MAX), with lower losses in between. If
the losses at VDCIN(MIN) are significantly higher than the
losses at VDCIN(MAX), consider increasing the size of P1.
Conversely, if the losses at VDCIN(MAX) are significantly
higher than the losses at VDCIN(MIN), consider reducing
the size of P1. If DCIN does not vary over a wide range,
the minimum power dissipation occurs where the resistive
losses equal the switching losses.

26 ______________________________________________________________________________________
Multichemistry Battery Chargers with Automatic
System Power Selector
Choose a low-side MOSFET that has the lowest possi-

MAX1909/MAX8725
ble on-resistance (R DS(ON) ), comes in a moderate-
1.5
sized package, and is reasonably priced. Make sure
that the DLO gate driver can supply sufficient current to 3 CELLS
support the gate charge and the current injected into
4 CELLS
the parasitic gate-to-drain capacitor caused by the

RIPPLE CURRENT (A)

1.0
high-side MOSFET turning on; otherwise, cross-con-
duction problems can occur.
The MAX1909/MAX8725 have an adaptive dead-time cir-
cuit that prevents the high-side and low-side MOSFETs 0.5
from conducting at the same time (see the MOSFET
Drivers section). Even with this protection, it is still possi-
ble for delays internal to the MOSFET to prevent one VDCIN = 19V
VCTL = ICTL = LDO
MOSFET from turning off when the other is turned on. 0
Select devices that have low turn-off times. To be 8 9 10 11 12 13 14 15 16 17 18
conservative, make sure that P1(t DOFF(MAX) ) - VBATT (V)
N1(tDON(MIN)) < 40ns. Failure to do so may result in
efficiency-killing shoot-through currents. If delay mis- Figure 11. Ripple Current vs. Battery Voltage (MAX1909)
match causes shoot-through currents, consider adding
extra capacitance from gate to source on N1 to slow following switching-loss calculation provides only a very
down its turn-on time. rough estimate and is no substitute for breadboard
evaluation, preferably including a verification using a
MOSFET Power Dissipation thermocouple mounted on P1:
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET, the worst-case VDCIN(MAX)2 × CRSS × fSW × ILOAD
power dissipation (PD) due to resistance occurs at the PD(P1_ Switching) =
minimum supply voltage: 2 IGATE

V  I 2 where CRSS is the reverse transfer capacitance of P1,

PD(P1) =  BATT   LOAD  × RDS(ON)
 VDCIN   2 
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the RDS(ON) required to stay within package
power-dissipation limits often limits how small the
MOSFET can be. The optimum occurs when the switch-
ing (AC) losses equal the conduction (I 2 R DS(ON) )
losses. High-side switching losses do not usually
become an issue until the input is greater than approxi-
mately 15V. Switching losses in the high-side MOSFET
can become an insidious heat problem when maximum
AC adapter voltages are applied, due to the squared
term in the CV2 f switching-loss equation. If the high-
side MOSFET that was chosen for adequate RDS(ON) at
low supply voltages becomes extraordinarily hot when
subjected to VDCIN(MAX), then choose a MOSFET with
lower losses. Calculating the power dissipation in P1
due to switching losses is difficult since it must allow for
difficult quantifying factors that influence the turn-on
and turn-off times. These factors include the internal
gate resistance, gate charge, threshold voltage, source
inductance, and PC board layout characteristics. The
and IGATE is the peak gate-drive source/sink current.
For the low-side MOSFET (N1), the worst-case power
dissipation always occurs at maximum input voltage:
 V  I 2
PD(N1) = 1−  BATT    LOAD  × RDS(ON)
  VDCIN    2 
Choose a Schottky diode (D1, Figure 2) with a forward
voltage low enough to prevent the N1 MOSFET body
diode from turning on during the dead time. As a gen-
eral rule, a diode with a DC current rating equal to 1/3rd
the load current is sufficient. This diode is optional and
can be removed if efficiency is not critical.
Inductor Selection
The charge current, ripple, and operating frequency
(off-time) determine the inductor characteristics.
Inductor L1 must have a saturation current rating of at
least the maximum charge current plus 1/2 of the ripple
current (∆IL):
ISAT = ICHG + (1/2) ∆IL

______________________________________________________________________________________ 27
 Multichemistry Battery Chargers with Automatic
System Power Selector
The ripple current is determined by:
MAX1909/MAX8725
∆IL = VBATT tOFF / L
where:
tOFF = 2.5µs (VDCIN - VBATT) / VDCIN for
VBATT < 0.88 VDCIN
or:
tOFF = 0.3µs for VBATT > 0.88 VDCIN
Figure 11 illustrates the variation of the ripple current
vs. battery voltage when the circuit is charging at 3A
with a fixed input voltage of 19V.
Higher inductor values decrease the ripple current.
Smaller inductor values require high-saturation current
capabilities and degrade efficiency. Designs that set
LIR = ∆IL / ICHG = 0.3 usually result in a good balance
between inductor size and efficiency.
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents.
Nontantalum chemistries (ceramic, aluminum, or OS-
CON) are preferred due to their resilience to power-up
surge currents.
 V  noise, efficiency, and stable performance. The PC
BATT (VDCIN − VBATT )
IRMS = ICHG  
 VDCIN
 
The input capacitors should be sized so that the
temperature rise due to ripple current in continuous
conduction does not exceed approximately 10°C. The
maximum ripple current occurs at 50% duty factor or
VDCIN = 2 ✕ VBATT, which equates to 0.5 ✕ ICHG. If the
application of interest does not achieve the maximum
value, size the input capacitors according to the
worst-case conditions.
Output-Capacitor Selection
The output capacitor absorbs the inductor ripple cur-
rent and must tolerate the surge current delivered from
the battery when it is initially plugged into the charger.
As such, both capacitance and ESR are important
parameters in specifying the output capacitor as a filter
and to ensure the stability of the DC-DC converter (see
the Compensation section). Beyond the stability
requirements, it is often sufficient to make sure that the
output capacitor’s ESR is much lower than the battery’s
ESR. Either tantalum or ceramic capacitors can be
used on the output. Ceramic devices are preferable
because of their good voltage ratings and resilience to
surge currents.
28 ______________________________________________________________________________________
Applications Information
Startup Conditioning Charge for
Overdischarged Cells
It is desirable to charge deeply discharged Li+ batter-
ies at a low rate to improve cycle life. The
MAX1909/MAX8725 automatically reduces the charge
current when the voltage per cell is below 3.1V. The
charge current-sense voltage is set to 4.5mV (ICHG =
300mA with RS2 = 15mΩ) until the battery voltage rises
above the threshold. There is approximately 300mV for
3 cell, 400mV for 4 cell of hysteresis to prevent the
charge-current magnitude from chattering between the
two values.
For the MAX8725, control the ICTL voltage to set a con-
ditioning charge rate.
Layout and Bypassing
Bypass DCIN with a 1µF capacitor to ground (Figure 1).
D4 protects the MAX1909/MAX8725 when the DC
power source input is reversed. A signal diode for D4 is
adequate because DCIN only powers the LDO and the
internal reference. Bypass LDO, DHIV, DLOV, and
other pins as shown in Figure 1.
Good PC board layout is required to achieve specified
board layout artist must be given explicit instructions—
preferably, a sketch showing the placement of the
power-switching components and high-current routing.
Refer to the PC board layout in the MAX1909/MAX8725
evaluation kit for examples. A ground plane is essential
for optimum performance. In most applications, the cir-
cuit is located on a multilayer board, and full use of the
four or more copper layers is recommended. Use the
top layer for high-current connections, the bottom layer
for quiet connections, and the inner layers for an unin-
terrupted ground plane.
Use the following step-by-step guide:
1) Place the high-power connections first, with their
grounds adjacent:
a) Minimize the current-sense resistor trace
lengths, and ensure accurate current sensing
with Kelvin connections.
b) Minimize ground trace lengths in the high-current
paths.
c) Minimize other trace lengths in the high-current
paths.
d) Use > 5mm wide traces.
Multichemistry Battery Chargers with Automatic
System Power Selector
e) Connect C1 and C2 to the high-side MOSFET

MAX1909/MAX8725
(10mm max length). Return these capacitors to
the power ground plane.
f) Minimize the LX node (MOSFETs, rectifier cath-
ode, inductor (15mm max length)). PGND
POWER PATH
Ideally, surface-mount power components are
flush against one another with their ground
terminals almost touching. These high-current
grounds are then connected to each other with
a wide, filled zone of top-layer copper, so they
do not go through vias.
QUIET GROUND
The resulting top-layer ground plane is connected ISLAND
to the normal inner-layer ground plane at the out-
put ground terminals, which ensures that the IC’s
analog ground is sensing at the supply’s output
terminals without interference from IR drops and KELVIN-SENSE VIAS
ground noise. Other high-current paths should UNDER THE SENSE
also be minimized, but focusing primarily on short RESISTOR
(REFER TO EVALUATION KIT)
ground and current-sense connections eliminates INDUCTOR
about 90% of all PC board layout problems.
2) Place the IC and signal components. Keep the main
switching node (LX node) away from sensitive ana-
log components (current-sense traces and REF
COUT
capacitor). Important: the IC should be less than
10mm from the current-sense resistors.
COUT
Quiet connections to REF, VCTL, ICTL, CCV, CCI,
CCS, IINP, ACIN, and DCIN should be returned to a CIN
separate ground (GND) island. The appropriate OUTPUT
traces are marked on the schematic with the
INPUT
ground symbol ( ). There is very little current flow-
ing in these traces, so the ground island need not GND
be very large. When placed on an inner layer, a siz-
able ground island can help simplify the layout
because the low-current connections can be made
through vias. The ground pad on the backside of
the package should also be connected to this quiet Figure 12. PC Board Layout Examples
ground island.
3) Keep the gate drive traces (DHI and DLO) as short Chip Information
as possible (L < 20mm), and route them away from
the current-sense lines and REF. These traces TRANSISTOR COUNT: 2720
should also be relatively wide (W > 1.25mm). PROCESS: BiCMOS
4) Place ceramic bypass capacitors close to the IC.
The bulk capacitors can be placed further away.
5) Use a single-point star ground placed directly
below the part at the PGND pin. Connect the power
ground (ground plane) and the quiet ground island
at this location. See Figure 12.

______________________________________________________________________________________ 29
 Multichemistry Battery Chargers with Automatic
System Power Selector
Package Information
MAX1909/MAX8725

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)

QFN THIN.EPS
0.15 C A D2
D CL b 0.10 M C A B
D2/2
D/2 k
PIN # 1 0.15 C B
I.D. PIN # 1 I.D.
0.35x45∞

E/2
E2/2

(NE-1) X e CL E2
E

k
L

DETAIL A e

(ND-1) X e
DETAIL B

L1 L CL CL

L L

e e
0.10 C

A
0.08 C

C A1 A3

PACKAGE OUTLINE
16, 20, 28, 32, 40L, THIN QFN, 5x5x0.8mm
1
21-0140 E 2

COMMON DIMENSIONS EXPOSED PAD VARIATIONS

PKG. 16L 5x5 20L 5x5 28L 5x5 32L 5x5 40L 5x5 PKG. D2 E2 DOWN
BONDS
SYMBOL MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX. CODES MIN. NOM. MAX. MIN. NOM. MAX. ALLOWED
A 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 0.70 0.75 0.80 T1655-1 3.00 3.10 3.20 3.00 3.10 3.20 NO
A1 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 0 0.02 0.05 0 - 0.05 T1655-2 3.00 3.10 3.20 3.00 3.10 3.20 YES
T2055-2 3.00 3.10 3.20 3.00 3.10 3.20 NO
A3 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF. 0.20 REF.
T2055-3 3.00 3.10 3.20 3.00 3.10 3.20 YES
b 0.25 0.30 0.35 0.25 0.30 0.35 0.20 0.25 0.30 0.20 0.25 0.30 0.15 0.20 0.25
T2055-4 3.00 3.10 3.20 3.00 3.10 3.20 NO
D 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
T2855-1 3.15 3.25 3.35 3.15 3.25 3.35 NO
E 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10 4.90 5.00 5.10
T2855-2 2.60 2.70 2.80 2.60 2.70 2.80 NO
e 0.80 BSC. 0.65 BSC. 0.50 BSC. 0.50 BSC. 0.40 BSC.
T2855-3 3.15 3.25 3.35 3.15 3.25 3.35 YES
k 0.25 - - 0.25 - - 0.25 - - 0.25 - - 0.25 0.35 0.45 YES
T2855-4 2.60 2.70 2.80 2.60 2.70 2.80
L 0.30 0.40 0.50 0.45 0.55 0.65 0.45 0.55 0.65 0.30 0.40 0.50 0.40 0.50 0.60
T2855-5 2.60 2.70 2.80 2.60 2.70 2.80 NO
L1 - - - - - - - - - - - - 0.30 0.40 0.50 T2855-6 3.15 3.25 3.35 3.15 3.25 3.35 NO
N 16 20 28 32 40 T2855-7 2.60 2.70 2.80 2.60 2.70 2.80 YES
ND 4 5 7 8 10 T3255-2 3.00 3.10 3.20 3.00 3.10 3.20 NO
NE 4 5 7 8 10 T3255-3 3.00 3.10 3.20 3.00 3.10 3.20 YES
JEDEC WHHB WHHC WHHD-1 WHHD-2 - T3255-4 3.00 3.10 3.20 3.00 3.10 3.20 NO
T4055-1 3.20 3.30 3.40 3.20 3.30 3.40 YES

NOTES:
1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.
2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.
3. N IS THE TOTAL NUMBER OF TERMINALS.
4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1
SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE
ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE.

5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.25 mm AND 0.30 mm
FROM TERMINAL TIP.
6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.
7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.
8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.
9. DRAWING CONFORMS TO JEDEC MO220, EXCEPT EXPOSED PAD DIMENSION FOR T2855-1,
T2855-3 AND T2855-6. PACKAGE OUTLINE
10. WARPAGE SHALL NOT EXCEED 0.10 mm. 16, 20, 28, 32, 40L, THIN QFN, 5x5x0.8mm
2
21-0140 E 2

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

30 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

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