MAXIM CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function _—____ General Description ‘The MAX150/X7820 fs @ high speed, microprocessor compatible, 8 bit analog {0 digital converter wnich Uses a hatiiash technique to achieve a conversion time of 134 us, The converter hes a OV to “SV analog Input range and uses a single *5V supply, A builtin traek-and-hold function ig inetuded, elim ating the ‘nead for an external Yrack-and Nols for Input slow rates up to 100mVus. The MAXI50 also provides an on-chip 25 Vreterence gutpul, making i | complete analog to digital converter The A/D$ easily interface with microprocessors by appearing ae a memory location oF VO por without fhe need tor external Interacing logic, The data out Dts use latched, tree-state butter circuitry to allow Sirect connection to a microprocessor data bus O° System input por. An overflow output also provided {gr cascading devices to acriove Aigher resolution. The W(K7820 is pin compatible with Analog Devices Ab7@20. The MAXI80 Ie also comeatioie wit the {x70 but alsa Includes an internal 2 5V reference, Applications Digital Signal Processing High Speed Data Acquistion ‘Tlocommunications High Speed Servo Loops: Audio Systems _ Functional Block Diagram | ay Maxim = Features Fast Conversion Time: 1348 Max © Buin Track-and-Hold Function 4 No Adjustment Required # No External Clock Sing +5V Supply Easy interface To Microprocessors Internal 25V Reference (MAXISO only) Ordering information [ier ~Yenn nana peace? won maxes oC Oa MAXSOAEPS APOIO EC Plate OP ‘°C Sra Outine MARROOEWP AOTC wARO S net scenes os oage Pin Configuration {Top view ls frre on ananson fF se" om oem ‘aco ae wun} fsa | we ee o [Sm | one Maxim tegrated Products 4 Call toll free 1-800-998-8800 for free samples or literature. O2%8ZXW/0SiLXVNMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function ABSOLUTE MAXIMUM RATINGS 10) opin ee CHEE TE cumene oe we owen aE stage Tempersture Range Eas Temperatura (Stee 10 akcond) arava ELECTRICAL CHARACTERISTICS (po = 15 Ves = 50, Vag = GND, RO-MODE, Tato Tas uniessotherise noted) PARAMETER Taso CONDITIONS wn. wa [NS | necumer : Tesciion T a 7 oo Total neat ror Note ee ray 32 | ise arEenence INPUT ‘een TC cae [a Seeeeeeeeeeee Tas Tain t0 Troan [128 40 The nga oR Rare er e093] VW ‘erp igs Rare aoa ‘war? DW TEFERENGE OUTPUT MAKI ORGY oie [Output votage ‘REF OUT aT 250 2s v Lee Rguiton eee Power Sopp Senin a a «|. emparaieDt(ae 3) SB | ware 1 200, | aims active Laid { I oe [pintoainnor rao out Cet A Ge Sa! ew ie Tacung te at or ‘sic nurs = ao) SWRA yas 3 Input high Votage ¥ ‘ope .Ow votge ¥ Inout gn Cue be wae | an Nate tempertccarn a dened es changer utr voltage rom 25° 1 Tuy Tuan ideo by (25 Tun) Ta - 25) Med Sunpeeseg at 25 by Cus Rewanceta ere composes 2 MAKINCMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function ELECTRICAL CHARACTERISTICS (continued) Wo0 = 50 Vee LOGIC INPUTS (eontrued) 5, Vper”~ GNO, AD-MODE. Ta = Tinto Tuas unless otherwise note) ‘anaweten | svwBOL | —_CONDIONS =~. —TWR MAX | UNITS | ‘nputtow Coren Time [ES ROWR wove 75.1250, Tw ‘nut Capacitance (Note 5) Gin__| O8,RD. WA, MODE I 5 8 oF Josie ourwurs — kn Cup GH tage ia ee ee v jvm | Mery igs | a8 Ovo Low vate Sie ¥ hom os a] Si Sours Give me BOTTA Wy 0 | rs [ouoat Sex Goren Tame OBP-OST OF WT. AOFM | ta Suu amie News) | “or | 068.081 OF RT.ADY see owen sure = Soro) oie Woo SE eed petomaree [ATE se] | swe cron to a. Power Daipavon EWR: AD=O a aH over Spy rai STs ara a8 — Pin Description (Pim | mae FUNCTION in] Rane FUNCTION a YW] A age = GHD co T [War | owe tern gan Sa He Sette Sane GAB vse 2 | ceo can cio t0150 12 | vse | dori rane san eet rt a | 081 curt seit ue nga oe | ose nto, ot || an) ee | cwnsececr mgt 68 matte interne | | _cevice to recognize WA or AD inputs 4 ae | rnnesat cat 4 OY AT cnt pu READY se ob SOoyari ee ss | 065 | time sit atctt 8, | 7 | MODE | Mode selection input. This input is | | 76 | 996 | theestat ca ouput it | esi Ee Sc rat | an ster | Tesi coi 9758) Mee NODE owner iv naote Woe 10 | om | owten cup tywearaer 4 | AD pao gu AO muse jow to acne dt Eine nearteantememsenee” | | fresnptac tc Se ea ctbux ‘nls al cee [10 | ono | run (Lao | ew_| perso vote 5 i MAXIM Oz8ZXW/0SIXVNMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference TIMING CHARACTERISTICS (Note 1, 2) — and Track/Hold Function MAX150, MX7820 (0015 er +5 Veer" = OND. Tan 6 Tas ess erie spect) | | | eae | ,MAKHOCIE | Maxson | | parameren | syma0u—conorTioNs: ne MARIUDG ETE yrs | i CC CC [e210 Wi soup time eae | a ° a = [ Ceieht ocip Tre ‘ear | Reda aos | 2 » ee 510 FOY Deny thay | 2ST BA 5 a) “Canveraen Te ROWSGT | ne wis 20 a [wt a Acs RO Hos | vee orale | Bee tower | cen | emotes 38 Be ‘ei oc a ee @ ‘ee ne Berner Sonerione | i i “ GRID Nese) je | peta 100 2s 0 | Fores we Tew m= zs | me ‘i Bey ‘en ‘0 000 son ree [= ced sec Rata © 7» © 10 | WR toINT Ooay ae oe ‘anata sr Pa = 0 | = ine avorRT | — »» | = fe] Betnes tne tre sured forine ata uns ts change “Low t 1 ing 5 by uly Asan tor ona “me 0103 of 5¥) and ne Hom avoage eo 8 shed ets orgie rcv ne tinea acuta ons O8¥ 024 b Yoeto mgm 4 Figure? Load Gveuta or Data Had Tie Tet MAXIMCMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function a _______ typical Operating Characteristics ‘ORT (UAKISO ONLY ACCURACY we TEMPERATURE ACCURACY vt» vn = re Var ‘oer INTERWAL TE DELAY vt ‘CONVERSION TIME (RO MODE) POWER SUPPLY CURRENT ws, TEMPERATURE TeMPeRATune TEMPERATURE NOT INCLUDING REFERENCE LADUE) MAXIM — — = 5 OZ8ZXW/0SIXVNMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function iled Description Converter Operation “The MAXISQ/MX7820 uses a "hal-lash” conversion {echnigue (see Functional Block Diagram) Two 4b flash AD converter sections are used to achieve an S:btt result. Using 18 comparators, tne upper #-Bit IMS (Inost sigricant) flash A/D compares the un Known input voltage’ to the reterence ladder and provides the upper four data bits [An internal DAC uses the MS bits to generate the fanalog result (fom the Tist flash conversion, and ‘eneratas a residue voltage which ithe cifference of fhe unknown input ang the OAC voltage. The residue then compared o he relrence er using 19S least 'signtican) fash ‘camparacore to oblain the lowor dour ote of the output. An accltional over range comparator detecs if fe analog mpi oreater than the relorence voltage SITS earn nes el — _ Operating Sequence The operating sequence for the WR-AD Mode shown’ in Figace 3 The conversion is infated by & {aling edge 8 WA: The comparator mpuls eck the analog input votage forthe Goraon ot WH low. A minimum of 800n8 8 required or tne input voltage to Oe acauires. When WA roturna high the MS, fash ‘eau is ltened intg the ouput butters ana the US version Begins INT goes lw aproximately B00%S ister indieating tho end of the cotverson, ane Mat tho lower data te are latched othe output butters: RO going low ten accesses the data tan externally controlled conversion time is aquired, tne HBLline gan be brought low as soon as 600%s fatter WA goes high. This wl atch the lower & data Bits and output tne convarsion result on DBO-OBY. At least 500ns setup tne Is required from INT going iow to te sta of another conversion (WH going tow ____ Digital ntertace ‘The MAXISO/MxTa2OnaS Two bavic interlace modes Which are se by the status of the MODE input pin When this pin is low, the converters in the RO mode wher this in ws high the converters set up for thé WARD mode, RD Mode In RD mode, conversion control and data access is Controlled by the RO input (see Figure a). The con Wersion 1s infiated by taking FID jow ADs then Kept Tow unti output data appears. This mode use for microprocessors which can be forced into a WAIT Slate Tho processor can start a conversion, walt an@ {her read data witha single READ Instruction Pin § (WIVRDY) is configured as a status output (ROY) in RO mode. This output can be used to ative the READY of WAIT input of @ processor ADY Is an ‘pen collector output (with no intemal ullup device) ‘hich goes low ater the falling edge oI CS and goes high Impedance at te end of the conversion, AnINT (Output fs also provided which goes low atthe end of {he conversion and retumns high on ne vising edge of CS or RD, WR-RO Mode In the WR-AD mode, pin 6 (WAIRDY) is configured 43 the WRITE input for the converter With CS fom, a Conversion is initiated on the falling edge of WA Several options exist for reading the data from the ‘converter Using intemal Delay lp the fist of these options the processor walls for INT gutput te go low before acing the deta (Figure 5). INT typleally goes tow 6O0ne after the rising edge ‘Of WA, indicating thatthe conversion is compote ang fhe result is avalable in the output latch with CS low, data outputs OB0-DBT can be accessed by pul ling RD low INT is then reset by the "sing edge of Sor RO. Roading Betore Daley {An alternative option can be used to exterratly con- trol the conversinn time (gee Figure 6). The internally ‘Generated S00ns delay varies somewnat mith tempers {ure ‘and supply vollage (eee Typical Operating Characteristics) and can be gverridden with FO. TO achiove this, the status of INT ig ignored and AD is Drought iow as soon as 600ns after the rsing edge of WR. This completes the convmrsion and enables the output butlers, OB0-DI7, whien contain the conver- ion regut INT also goes low ater the fang edge ot FD an ie reset dn the rsing edge of AD or CS MaximCMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function Pipelined Operation In adettion fo the two standard WR-AO mode options, Stand-Alone Operation ‘The converter can also be used in a stand-alone Operation (eve Figure 8) CS ane RD are ted low and conversion 's initiated by puling WR iow. Output Sata ie aid approximately 600n8 after the sing age of WR, Fgura WIRD Mods Sead Aloe Timing CS FO=0 OZ8ZXW/0SIXVWMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function Analog Considerations Reference The MAXI50 includes an internal 25V reference (REFOUT) which s appropriate for the majonty of 8 Bt measurement applcations, To. Use the of-chip Feterence, connect REFOUT, pin 18, to Vege” pin 12, land connect Vaer, in M,t0 ground. The 2.5¥ output isreterres to GND, pn 10. Bath the MAXi80 and the IMX7820, which coes nat have an oncchip reference, tan be Used with an external reference if Gesired Figure_10 shows some possible reference connec: tone. For the MAX 60, #D.OTuP bypass capacitor to GNO should be used to reauce the high frequency ‘output Impedance of the internal reference. Larger acu Capacitors should not Be used 8 this degrades the Stabity of the rterence Sulfer The Vage" and Veer” inputs of both converters set the {ullsele and zero input voltages ofthe A/D In omer words, the voltage at Vier" defines the input which _, _produces.an output code of all zeroes. and the vole {age at Vycr> defines the input which produces an alput code ofall ones (ove Figure 9). ” Ie fe & I as t External Aaterence 2 5V Full-Scale, 7 amen {| | aaa | ow Ler ons hal ae: anc —_| MaximCMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function Bypassing A A7uF electrolytic and O1uF ceramic, capacitor Should be used to bypass the Voo pin to GND. These capacitors should nave tho minirium possible lac Fongth, Excess lead length may contribute to conver- Sion rors and insta Ifthe reference inputs (pins 11,12) are drven by long tings they should be bypassed to GND with 01 uF ‘capacitor at he Var pits Input Current “The MAX190/MX7820 analog input behaves somewhat Aiterenty trom conventional A/D converters. The Sampled data comparators take varying amounts of Curren from the input depending of the eyete they ‘The equivalent circuit of the converter is stiown in Figure’, When the conversion stars anc WR is fw, Vu is connected to the MS and LS comparators. ‘Thus, Vi is connected to thity-one TpF capacitors. J Fl ce me LY nord fot encmmiot 3 moe Bik Tr | et MAXIM During this acquisition phase (WR = Low in the WLAD Mode) the input Capacitors must be chargeo to the Input voltage trough the resistance of the Internal analog switches (about 2k( 10 5x). In ac~ tion, about 12pF of stray capacitance must be tharged. The input ean be modeled as an equivalent FRC network shown in Figure 11. Ag A (eouree impe- ‘anee) increases, he capacitors fake longer to charge “Typical input capacitances of 45 allow source ress ances of up to. Tkit to be used without setting problems. For larger resistances, the main of the 4k pulse must be increased Trorh 600%. Since the tengih of this acquisition time Is internally sat when in'ine RO mode, large source resistances (greater than ska) may cause setting erors. In this caso. use the WR-RD mose ane greater than 600ns AD time oF Use a butter to drive the analog input Input Filtering ‘The transients inthe analog input due to the sampled Gata comparators donot degrade the ‘converters performance since fhe A/D does not “iook" at the Input when these Iransients occur The comparators ‘outputs track ie input wile, WR is low, and are latched once WR goes high. Therefore, at oast 600ns wil be provided {o charge the ADC's input capac tance, itis not necessary fo fier tmese transients wth nextormal capacitor on the Vy terminal Inherent Track-and-Hold Due to its sampling benavio the MAXISO/MxT=2O has the abiity fo measure a variely of high spaec Input signals without the help ofan external sarnple~ tand-hold. In a conventional SAR type converter the fnaiog input must remain stable within 12 LSB for fhe duration of the conversion to maintain accuracy. ‘This requires the use of external sampleana-holas whenever the input is nigh spsed sighal Although the conversion time for the MAX 50 M7820 1s 13, the time for which the input must be stable fs much tess The MAXI50/MX7820 tacks the input wile WA Is Tow (in the WED mode) and tnisnes: sargling 1 pproximately 100n8 after the rising edge of WR. This aperture deiay 's caused by te internal logic piopa- fgaton delay Input signals with slew ‘ates typically Below 200mViue can be converted without error Now. fever faster signals may cause differential linearity errors cue sifferant dolays through the MS anc LS Comparators. Stil, the errors caused by Test Input Signale are far less then the errors caused in a cone Nemtional SAR type ADC without a sample-and-old vis SAR converter would stil not be. able tO measure a IxFtz SV sine wave without the aid of an Stternal sampe-and-noie The MAX 'S0/ MX 7820 with fo such help, ean typically measure SV, 10kHz vravetorms Oz8ZXW/OSIXVWMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function — oe mimCMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function | rt [—V soe Hoon 2 tt MAXiM__ —______ OZ8ZXW/OSEXVNMAX150/MX7820 CMOS High Speed 8 Bit A/D Converter with Reference and Track/Hold Function Ordering Information (continued) _____ Chip Topography Sra Oxtine Package Information at te ao La ai ae WES" ne itt | ll, a Be AN wan ay” ee | Re fim 20 Lead Plastic DIP (PP) 20 Lead Small Outline, Wide (WP) yy = 125°C W Bx = 90°C amen ee ees