Microelectronic Circuits International S

CHAPTER 7
Differential and Multistage Amplifiers
Microelectronic Circuits, International Sixth Edition Sedra/Smith Copyright © 2011 by Oxford University Press, Inc.
Figure 7.1 The basic MOS differential-pair configuration.
I 1 'W
i D1 = i D 2 = = k (VGS − Vt )2
2 2 L
VOV = I
k ' (W / L )
I
VCM max = Vt + VDD − RD
2
VCM min = −VSS + VCS + Vt + VOV
Figure 7.2 The MOS differential pair with a common-mode input voltage V CM.
I
I D1 = I D 2 = = 0.2 mA
2
VD1 = VDD − I D1, 2 × 2.5 kΩ
= 1 V = VD 2
I 1 'W I
= k (VGS − Vt )2 I D1 = I D 2 = = 0.2 mA
2 2 L 2
VD1 = VDD − I D1, 2 × 2.5 kΩ
VOV = I
k (W / L )
'
= 1 V = VD 2
0.4 mA VS = VG − VGS
= = 0.316 V
4 mA/V 2 = 1 − 0.82 = 0.18
VGS = Vt + VOV = 0.816
VS = VG − VGS = 0 − 0.816
I
I D1 = I D 2 = = 0.2 mA
2
VCM max = Vt + VD = (0.5 + 1) V
VD1 = VDD − I D1, 2 × 2.5 kΩ
VCM min = −VSS + VCS + VGS
= 1 V = VD 2
= ( −1.5 + 0.4 + 0.82) V = -0.28 V
VS = VG − VGS
- 0.28 ≤ VCM ≤ 1.5
= −0.2 − 0.82 = −1.02
Figure 7.3 Circuits for Example 7.1. Effects of varying VCM on the operation of the differential pair.
I I
i D1 = i D 2 = VOV =
2 k ' (W / L )
1 'W
i D1 = I = k (vGS 1 − Vt )2
2 L
iD 2 = 0 vGS 2 − Vt = 0
vS = − vGS 2 = −Vt
vGS 1 = Vt + 2 I
k ' (W / L )
= Vt + 2VOV
vid max = vGS 1 + v S
= Vt + 2VOV − Vt = 2VOV
− 2VOV ≤ vid ≤ 2VOV
Figure 7.4
1 'W
i D1 = k (vGS 1 − Vt )2
2 L
1 W
= k ' (vGS 2 − Vt )
2
iD 2
2 L
1 'W
i D1 = k (vGS 1 − Vt )
2 L
1 'W
iD 2 = k (vGS 2 − Vt )
2 L
vGS 1 − vGS 2 = vG1 − vG 2 = vid
1 'W
iD1 − iD 2 = k vid
2 L
iD1 + iD 2 =I iD 2 = I − iD1 2
1 W I I vid v /2
2 iD1iD 2 = I − k ' vid2 iD1 = + 1 − id
2 L 2 VOV 2 VOV
2 2
I I vid v /2 I I vid v /2
i D1 = ± 1 − id iD 2 = − 1 − id
2 VOV 2 VOV 2 VOV 2 VOV
Figure 7.5
iD1 1 1 vid
= +
I 2 2 VOV
iD 2 1 1 vid
= −
2 I 2 2 VOV
I I vid v /2
i D1 = + 1 − id
2 2 VOV VOV
2
I I vid v /2
iD 2 = − 1 − id
2 2 VOV VOV
2
iD1 1 1 vid v /2
= + 1 − id
I 2 2 VOV VOV
2
iD 2 1 1 vid v /2
= − 1 − id
I 2 2 VOV VOV
Figure 7.6 Normalized plots of the currents in a MOSFET differential pair. Note that V OV is the overdrive voltage at which Q 1 and Q 2
operate when conducting drain currents equal to I/2, the equilibrium situation. Note that these graphs are universal and apply to any MOS
differential pair
Figure 7.7 The linear range of operation of the MOS differential pair can be extended by operating the transistor at a higher value of V OV .
2 I D 2( I / 2 ) I
gm = = =
VOV VOV VOV
vid vo1 1
vo1 = − g m ⋅ RD = − g m RD
2 vid 2
vid vo 2 1
vo 2 = + g m ⋅ RD = + g m RD
2 vid 2
vo vo 2 − vo1
Ad = = = g m RD
vid vid
Figure 7.8
vo v
Ad = = o1
vid vid / 2
g m (vid / 2 ) ⋅ RD
=
vid / 2
= g m RD
Ad = g m (RD || ro )
vod RD || (RL / 2 ) − vod / 2 R || (RL / 2 )
Ad = = =− D
vid Rs + 1 g m vid / 2 Rs + 1 g m
Figure 7.10 (a) Differential amplifier for Example 7.2. (b) Differential half-circuit.
vod
Ad = = g m1 (ro1 || ro 3 )
vid
Figure 7.11 (a) Differential amplifier with current-source loads formed by Q 3 and Q 4. (b) Differential half-circuit of the amplifier in (a).
vod
Ad = = g m1 (Ron || Rop )
vid
Ron = ( g m 3 ro 3 ) ro1
Rop = (g m 5 ro 5 ) ro 7
Figure 7.12 (a) Cascode differential amplifier; and (b) its differential half circuit.
i vicm
vicm = + 2iRSS i=
gm 1 / g m + 2 RSS
vicm RD
vo1 = vo 2 = −iRD = −
1 / g m + 2 RSS
vo1 v R
= o2 ≈ − D
vicm vicm 2 RSS
vod = vo 2 − vo1 = 0
vo 2 R + ∆R D
≈− D
vicm 2 RSS
∆RD
vod = vo 2 − vo1 = − vicm
2 RSS
vod ∆ RD RD ∆ RD
Acm = =− =−
vicm 2 RSS 2 RSS RD
Ad 2 g m RSS
CMRR ≡ =
Acm ∆R D / R D
1 1 vod ∆g m R D RD ∆g m
g m1 = g m + ∆ g m & g m 2 = g m − ∆g m g m1 − g m 2 = ∆ g m Acm = = ≈
2 2 vicm 1 + 2 g m RSS 2 RSS gm
i2 g m 2
v gs1 = v gs 2 i1 (1 / g m1 ) = i2 (1 / g m 2 ) = Ad 2 g m RSS
i1 g m1 CMRR ≡ =
Acm ∆g m / g m
i2 g i1 + i2 g gm2
1+ = 1 + m2 = 1+ m2 i1 + i2 = i1 1 +
i1 g m1 i1 g m1 g m1
i1 i g
vicm = + (i1 + i2 )RSS = 1 + i1 1 + m 2 RSS
g m1 g m1 g m1
g m1vicm g m 2 vicm
i1 = & i2 =
1 + ( g m1 + g m 2 )RSS 1 + ( g m1 + g m 2 )RSS
− g m1 RD vicm
vo1 = −i1 RD =
1 + ( g m1 + g m 2 )RSS
− g m 2 RD vicm
vo 2 = − i 2 R D =
1 + (g m1 + g m 2 )RSS
vod = vo 2 − vo1 =
(g m1 − g m 2 )RD vicm =
∆g m RD vicm
1 + (g m1 + g m 2 )RSS 1 + (g m1 + g m 2 )RSS
Figure 7.14
Figure 7.15 The basic BJT differential-pair configuration.
v B1 = v B 2 = vCM
I I S VBE VT
iE 1 = i E 2 = = e
2 α
1
VC = VCC − αIRC
2
VCM max = VC + VBCon

1
= VCC − αIRC + VBCon
2
VCM min = −VEE + VCS + VBE
Figure 7.16
v EB 2 = 0.7 V v E = 0. 7 V
vEB1 = 0.2 V
I C1 = 0 vC1 = −5 V
I E1 = 0 I E2 = IC 2
V1k = (5 − 0.7 ) V = 4.3 V
vC 2 = (−5 + 4.3) V = -0.7 V
Figure E7.9
Large signal operation of basic BJT differential-pair configuration.
IS
iE 1 = e (v B1 −vE ) VT
α
IS
iE 2 = e (v B 2 −v E ) VT
α
iE1
= e (vB1 −v B 2 ) VT
iE 2
iE1 + iE 2 = I & vid = v B1 − vB 2

iE1 1 1 I αI
= = iE 1 = iC1 =
iE1 + iE 2 1 + iE 2 1 + e (vB 2 −vB 1 ) VT 1 + e −vid VT
1 + e −vid VT
iE1
iE 2 1 1 I αI
= = iE 2 = iC 2 =
iE1 + iE 2 1 + iE1 1 + e (vB 1 −v B 2 ) VT 1 + e vid VT
1 + e vid VT
iE 2
vid = v B1 − vB 2
iC1 αiE1 α
= =
I I 1 + e −vid VT
αe vid (2VT )
= vid ( 2VT ) −vid ( 2VT )
e +e
α (1 + vid (2VT ))
≈
1 + vid (2VT ) + 1 − vid (2VT )
iC1 α
≈
(v 2 )
1 + id
I 2 VT
iC 2 αiE 2 α
= =
I I 1 + e vid VT
≈
α
1−
(vid 2 )
2 VT
Figure 7.18 The transfer characteristics of the BJT differential pair (a) can be linearized (b) (i.e., the
linear range of operation can be extended) by including resistances in the emitters.
Small signal operation of basic BJT differential-pair configuration.
Assuming that VCM & I have been established,

vid = vB1 − vB 2 = vBE1 − vBE 2 I C αI 2
gm = =
αI VT VT
iC1 = αiE1 =
1 + e −v V id T
vod = ic × (2 RC ) = g m RC vid Avd = g m RC
αIe v (2V ) id T
= v ( 2V ) − v ( 2V )
e id
+e T id T
αI (1 + vid (2VT ))
≈
1 + vid (2VT ) + 1 − vid (2VT )
αI αI vid
iC1 ≈ +
2 2VT 2
αI αI vid
iC 2 ≈ −
2 2VT 2
αI vid vid
ic = =g
2VT 2 m 2
Figure 7.19
vid
ie =
2 re
ie v (2 re )
ib = = id
β +1 β +1
vid
Rid = = (β + 1) ⋅ 2re
ib
vod ic ⋅ 2 RC
Ad = =
vid ib ⋅ Rid
ic ⋅ 2 RC
=
ib ⋅ (β + 1) ⋅ 2 re
αie ⋅ 2 RC
=
ie ⋅ 2re
αRC RC
= ≈
re re
Figure 7.20
vid
ie =
2 re + 2 Re
ie v (2 re + 2 Re )
ib = = id
β +1 β +1
vid
Rid = = (β + 1) ⋅ 2(re + Re )
ib
vod ic ⋅ 2 RC
Ad = =
vid ib ⋅ Rid
ic ⋅ 2 RC α RC
= =
ie ⋅ 2(re + Re ) re + Re
αRC RC
= ≈
re + Re re + Re
Figure 7.21 A differential amplifier with emitter resistances. Only signal quantities are shown (in color).
Figure 7.22 Equivalence of the BJT differential amplifier in (a) to the two common-emitter amplifiers in (b). This equivalence applies only for
differential input signals. Either of the two common-emitter amplifiers in (b) can be used to find the differential gain, differential input
resistance, frequency response, and so on, of the differential amplifier.
Figure 7.23 The differential amplifier fed in a single-ended fashion.
Avd = g m (RC || ro )
Figure 7.24 Equivalent-circuit model of the differential half-circuit formed by Q1 in Fig. 7.22(b).
α RC α (RC + ∆RC )
αRC vo1 = − vicm & vo 2 = − vicm
vo1 = vo 2 = − vicm re + 2 REE re + 2 REE
re + 2 REE
α∆RC
vod = vo 2 − vo1 = 0 vod = vo 2 − vo1 = − vicm
re + 2 REE
vod α ∆RC
Acm = =−
vicm re + 2 REE
RC ∆RC
≈−
2 REE RC
Ad
CMRR =
Acm
2 g m RC
=
RC ∆RC
2 REE RC
2 g m REE
=
∆RC RC
Figure 7.25
RC
1+
ro r
Ricm ≈ βREE ≈ (β + 1) REE || o
R + 2 REE 2
1+ C
ro
Figure 7.26 (a) Definition of the input common-mode resistance Ricm . (b) The equivalent common-mode half-circuit.
VT 25 mV
re1 = re 2 = = = 50 Ω
I E 0.5 mA
Rid = 2(β + 1)(re + RE )
= 2 × 101× (50 + 150 ) ≈ 40 kΩ
vid Rid 40
= = = 0.8 V/V
v sig Rsig + Rid 5 + 5 + 40
vod Total R in C 2 RC
= =
vid Total R in E 2(re + RE )
2 × 20 × 10 3
= = 50 V/V
2 × (50 + 150 )
v v v
Ad = od = id od = 0.8 × 50 = 40 V/V
vsig v sig vid
RC ∆RC 10
Acm = = × 0.02
2 REE RC 2 × 200
= 5 × 10 − 4 V/V
Ad 40
CMRR = 20log = 20 log = 98 dB
Acm 5 × 10 − 4
V A 100
ro = = = 200 kΩ
I / 2 0. 5
Ricm = 6 .6 M Ω Figure 7.27 Circuit for Example 7.4.
Figure 7.28 (a) The MOS differential pair with both inputs grounded. Owing to device and resistor mismatches, a finite dc output voltage V O
results. (b) Application of a voltage equal to the input offset voltage V OS to the input terminals with opposite polarity reduces V O to zero.
∆ RD W W 1 W
RD 1 = RD + = + ∆
2 L 1 L 2 L
∆ RD W W 1 W
RD 2 = RD − = − ∆
2 L L 2 L
1
I ∆ RD
VD 1 = VDD − RD + I ∆ (W L )
2 2 I D1 = 1+
2 2(W L )
I ∆RD
VD 2 = VDD − RD − RD I ∆ (W L )
2 2 VO1 = VDD − 1+
2 2(W L )
I
VO = VD 2 − VD1 = ⋅ ∆RD I ∆ (W L )
2 I D2 = 1−
I 2 2(W L )
⋅ ∆R D
VO 2 RD I ∆ (W L )
VOS = = VO 2 = VDD − 1−
RD g m RD (2 I D VOV ) 2 2(W L )
I VO V −V V ∆ (W L )
⋅ ∆R D VOS = = O 2 O1 = OV
2 V ∆RD
= = OV RD g m RD g m 2 (W L )
RD I VOV 2 RD
∆Vt ∆V
Vt1 = Vt + & Vt 2 = Vt − t I 1 ' W
2 2 = kn (VGS − Vt )2
2 2 2 L
1 W ∆V
I D1 = k n' VGS − Vt − t I ∆Vt I ∆Vt
2 L 2 ∆I 2 = −∆I1 = =
2
2 VGS − Vt 2 VOV
1
= k n'
W
(VGS − Vt )2 1 − ∆Vt ∆VO 2 = −∆VO1 =
I ∆Vt
RD
2 L 2(VGS − Vt ) 2 VOV
∆VO 2 − ∆VO1 (I VOV )RD ∆Vt
≈
1 ' W
kn (VGS − Vt )2 1 − ∆Vt VOS = = = ∆Vt
2 L VGS − Vt g m RD (I VOV )RD
2
I D2
1
= k n'
W
(VGS − Vt )2 1 + ∆Vt
2 L 2(VGS − Vt )
≈
1 ' W
kn (VGS − Vt )2 1 + ∆Vt
2 L VGS − Vt
2 2
VOV ∆RD VOV ∆ (W L )
+ (∆Vt )
2
VOS ,tot = +
2 RD 2 W L
Figure 7.29
∆I S I ∆I
∆R I C = I S e v BE VT
I S1 = I S + I E1 = 1+ S
RC 1 = RC + C 2 2 2IS
2 IC IS
IE = = e v BE VT
αIRC ∆I S
∆R α α VO 1 = VCC − 1+
RC 2 = RC − C 2 2IS
2 IC IS v BE VT
αI ∆R IB = = e ∆I S I ∆I
VC 1 = VCC − RC + C β β IS 2 = IS − IE2 = 1− S
2 2 2 2 2IS
αI ∆RC αIRC ∆I S
VC 2 = VCC − RC − VO 2 = VCC − 1−
2 2 2 2IS
I I ∆I S
VO = VC 2 − VC 1 = α ⋅ ⋅ ∆RC VO = VO 2 − VO 1 = α RC
2 2 IS
I I VO α ( I 2 )(∆I S I S )RC
VO
α ⋅ ⋅ ∆RC α ⋅ ⋅ ∆RC ∆R VOS = =
VOS = = 2 = 2 = C
VT RC g m RC (αI 2 ) VT
Ad RC g m RC (I C VT ) RC
∆I S
= VT
IS
2 2 2 2
∆RC ∆I ∆RC ∆I S
VOS ,tot = VT + VT S = VT ⋅ +
RC IS RC IS
I 2 1 ∞
I B1 = I B 2 = & I OS = I B1 − I B 2 = (− x )
n
1+ β
1 + x n =0
∆β ∆β
β1 = β + & β2 = β −
2 2
I 1 I 1 ∆β
I B1 = ≈ 1−
2 1 + β + (∆β 2 ) 2 1 + β 2β
I 1 I 1 ∆β
IB2 = ≈ 1+
2 1 + β − (∆β 2 ) 2 1 + β 2β
I ∆β
I OS = ⋅
2(1 + β ) β
I B1 + I B 2 I
IB = =
2 2(1 + β )
∆β
I OS = I B ⋅
β
Figure 7.30 A three-stage amplifier consisting of two differential-in, differential-out stages,
A1 and A2, and a differential-in, single-ended-out stage A3.
Figure 7.31 A simple but inefficient approach for differential to single-ended conversion.
Figure 7.32 (a) The active-loaded MOS differential pair. (b) The circuit at equilibrium assuming perfect
matching. (c) The circuit with a differential input signal applied and neglecting the ro of all transistors.
Figure 7.33 Output equivalent circuit of the amplifier in Fig. 7.32(a) for differential input signals.
vid 1 g vid
v g 3 = − g m1 || ro 3 || ro1 ≈ − m1
2 g m3 g m3 2
vid g vid v
io = − g m 4 v g 3 + g m 2 = g m1 m 4 + g m 2 id
2 g m3 2 2
io = g m vid for g m 3 = g m 4 & g m1 = g m 2 = g m Gm = g m
Figure 7.34
vx
Ro ≡
ix vid = 0
vx
i=
Ro 2
Ro 2 = ro 2 + Rin1 + g m 2 ro 2 Rin1
ro1 + RLQ1 ro1 + (1 g m 3 )
Rin1 = =
g m1ro1 g m1ro1
=
1
+
(1 g m3 ) ≈ 1
g m1 g m1ro1 g m1
Ro 2 ≈ 2 ro 2 for g m1 = g m 2 = g m & g m 2 ro 2 >> 1
Figure 7.35 Circuit for determining Ro. The circled
numbers indicate the order of the analysis steps. vx
ix = i + i +
ro 4
vx v v v
=2 + x =2 x + x Ro = ro 2 || ro 4
Ro 2 ro 4 2ro 2 ro 4
Ad = Gm Ro = g m (ro 2 || ro 4 )
2 RSS || ro1
vs = vicm ≈v
(2 RSS || ro1 ) + (1 g m1 ) icm
vs v io 1
io = = icm Gmcm = =
2 RSS 2 RSS vicm 2 RSS
Ro1 = ro1 + 2 RSS + g m1ro1 (2 RSS )
Ro 2 = ro 2 + 2 RSS + g m 2 ro 2 (2 RSS )
1
v g 3 = −Gmcm vicm Ro1 || ro 3 ||
gm3
i4 = g m 4 v gs 3 = g m 4 v g 3
1
= − g m 4Gmcm vicm Ro1 || ro 3 ||
gm3
vo v
0 = Gmcm vicm + i4 + + o
Ro 2 ro 4
Ro 2 || ro 4 1
vo = − vicm 1 − g m 4 Ro1 || ro 3 ||
2 RSS g m3
vo r 1 1
Acm ≡ ≈ − o4 ≈−
vicm 2 RSS 1 + g m 3 ro 3 2 g m 3 RSS
Ad
Figure 7.36 Analysis of the active-loaded MOS differential CMRR ≡ = [g m1 (ro 2 || ro 4 )][2 g m 3 RSS ] g m = g m1 = g m 3
amplifier to determine its common-mode gain. Acm ro = ro 2 = ro 4
= (g m ro )(g m RSS )
vid
v b 3 = − g m1 (re3 || ro 3 || ro1 || rπ 4 )
2
vid
≈ − g m1 re 3
2
vid
g m 4 vb 4 = − g m 4 g m1re 3
2
vid
io = g m 2 − g m 4 vb 4
2
vid v
= gm2 + g m 4 g m1re 3 id
2 2
I /2 α
gm ≈ , re 3 = 3 , g m1 = g m 2 & g m 3 = g m 4
VT gm3
Gm = g m
Ro 2 = ro 2 [1 + g m 2 (re1 || rπ 2 )] = ro 2 (1 + g m 2 re1 ) ≈ 2 ro 2
vx v vx vx vx
i= = x i x = 2i + = +
Ro 2 2ro 2 ro 4 ro 2 ro 4
vx vo
Ro ≡ = ro 2 || ro 4 Ad ≡ = Gm Ro = g m (ro 2 || ro 4 )
ix vid
Rid = 2 rπ
Figure 7.37
IC 1
gm =
v VT ro 4 rπ 3 r 1 r
i1 ≈ i2 ≈ icm Acm ≈ − ≈ − o4 = − o4
2 REE β 2 REE g + 1 2 REE β 3 2 β 3 REE
rπ = m3
gm rπ 3
1
vb 3 = −i1 || ro 3 || rπ 4 VT α Ad 2 β 3 REE
g m3 re = = CMRR ≡ = g m (ro 2 || ro 4 ) = β 3 g m 3 REE
I E gm Acm ro 4
vo
0= + g m 4 vb 3 + i2
ro 4
0 = vo + ro 4 ( g m 4 vb 3 + i2 )
1 vicm v
vo = − ro 4 − g m 4 || ro 3 || rπ 4 + icm
g m3 2 REE 2 REE
vo
Acm ≡
vicm
ro 4 1
≈ gm4 || ro 3 || rπ 4 − 1
2 REE gm3
1 1
+
ro 4 ro 3 rπ 4
=− Figure 7.38 Analysis of the bipolar active-loaded
2 REE 1 1
g m3 + + differential amplifier to determine the common-mode gain.
ro 3 rπ 4
αI 2
= I C 3 (1 + ) & IC3 = IC 4
2 βP
αI / 2
IC 4 =
1 + (2 β P )
IC 3 1 αI / 2
= IC 4 = IC 3 =
I C1 1 + (2 β P ) 1 + (2 β P )
αI αI / 2
∆i = −
2 1 + (2 β P )
αI 2 β P αI
= ≈
2 1 + (2 β P ) β P
∆i 2V
VOS = =− T
Gm βP
Figure 7.39 The active-loaded BJT differential pair suffers from a systematic input offset voltage
resulting from the error in the current-transfer ratio of the current mirror.
ro 5
Ro = (β 4 ro 4 ) || β 5
2
ro 5
Ad = g m (β 4 ro 4 ) || β 5
2
Wilson Current mirror
Figure 7.40 An active-loaded bipolar differential amplifier employing a folded cascode stage (Q 3 and Q 4) and a W ilson current-mirror load (Q 5,
Q 6, and Q 7).
A1 = − g m1 (ro 2 || ro 4 )
A2
A2 = − g m 6 (ro 6 || ro 7 )
VD 3(GS 3) = VD 4 ( GS 4 ) = VGS 6
(W L )6
I6 = (I / 2 )
(W L )4
(W L )7
I7 = ⋅I
(W L )5
A1 I6 = I7
(W L )6 (W L )7
=2
Figure 7.41 Two-stage CMOS op-amp configuration. (W L )4 (W L )5
1 W
IB = µ n Cox (VGS 12 − Vt )2
2 L 12
1 W
IB = µ n Cox (VGS 13 − Vt )2
2 L 13
VGS 13 = VGS 12 + I B RB
2IB 2IB
= + I B RB
µ n Cox (W L )13 µ n Cox (W L )12
2
2 (W L)12
IB = −1
µ n Cox (W L )12 RB2 (W L)13
2 (W L)12
RB = −1
2 µ n Cox (W L )12 I B (W L)13
2 (W L )12
g m12 = −1
RB (W L)13
I Di (W L )i
g mi = g m12
I B (W L )12
µ p I Di (W L )i
g mi = g m12
Figure 7.42 Bias circuit for the CMOS op amp. µ n I B (W L )12
Figure 7.43 A four-stage bipolar op amp.
Figure 7.44 Circuit for Example 7.6.
Rid = rπ 1 + rπ 2 = (β + 1) × (re1 + re 2 )
VT VT V V
= (β + 1)× + = (β + 1)× T + T
I E1 I E 2 I E1 I E 2
25 mV 25 mV
= 101 × + = 20.2 kΩ
0.25 mA 0.25 mA
25 mV 25 mV
Ri 2 = 101 × + = 5.05 kΩ
1 mA 1 mA
vo1 Total R in C Ri 2 || (R1 + R2 )

A1 = = =
vid Total R in E re1 + re 2
=
(5.05 || 40) kΩ = 22.4
200 Ω
Figure 7.45 Equivalent circuit for calculating the

gain of the input stage of the amplifier in Fig. 7.43.
Ri 3 = (β + 1)× (R4 + re 7 )
25 mV
= 101× 2.3 kΩ +
1 mA
= 234.8 kΩ
vo 2 R || R
A2 = ≈ − 3 i3
vo1 re 4 + re 5
=−
(3 || 238.4) kΩ
50 Ω
= −59.2
Figure 7.46 Equivalent circuit for calculating the gain of the

second stage of the amplifier in Fig. 7.43.
Ri 4 = (β + 1)× (R6 + re8 )

25 mV
= 101× 3 kΩ +
5 mA
= 303.5 kΩ
vo 3 R || Ri 4
A3 = ≈− 5
vo 2 re 7 + R4
=−
(15.7 || 303.5) kΩ
2.325 kΩ
= −6.42
Figure 7.47 Equivalent circuit for evaluating the gain

of the third stage in the amplifier circuit of Fig. 7.43.
vo R6
A4 = ≈−
vo 3 re8 + R6
3 kΩ
=−
(5 + 3000) Ω
= 0.998 ≈ 1
vo
Atot = = A1 A2 A3 A4 = 8513
vid
Ro = R6 || [re8 + R5 (β + 1)]
= 152 Ω
Figure 7.48 Equivalent circuit of the output stage of

the amplifier circuit of Fig. 7.43.
vo R i
vid = Ri1ii & vo = R6ie8 = 6 e8
vid Ri1 ii
ie8 ie8 ib8 ic 7 ib 7 ic 5 ib 5 ic 2
= × × × × × ×
ii ib8 ic 7 ib 7 ic 5 ib 5 ic 2 ii
R5 R3 R1 + R2
= (β 8 + 1)× × β7 × × β5 × ×β
R5 + Ri 4 R3 + Ri 3 (R1 + R2 ) + Ri 2 2
Figure 7.49 The circuit of the multistage amplifier of Fig. 7.43 prepared for small-signal analysis. Indicated are the
signal currents throughout the amplifier and the input resistances of the four stages.

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CHAPTER 7

Differential and Multistage Amplifiers

Figure 7.1 The basic MOS differential-pair configuration.

Figure 7.15 The basic BJT differential-pair configuration.

VCM max = VC + VBCon

iE1 + iE 2 = I & vid = v B1 − vB 2

Small signal operation of basic BJT differential-pair configuration.

Assuming that VCM & I have been established,

Figure 7.23 The differential amplifier fed in a single-ended fashion.

Figure 7.43 A four-stage bipolar op amp.

vo1 Total R in C Ri 2 || (R1 + R2 )

Figure 7.45 Equivalent circuit for calculating the

Figure 7.46 Equivalent circuit for calculating the gain of the

Ri 4 = (β + 1)× (R6 + re8 )

Figure 7.47 Equivalent circuit for evaluating the gain

Figure 7.48 Equivalent circuit of the output stage of

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