Scribd Logo
Upload

Welcome to Scribd!

  • Coa Akash

    Uploaded by

    Cse312 B. Praveen
    19 views63 pages

    Original Title

    coa akash

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    Report this Document

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Flag for inappropriate content
    19 views63 pages

    Coa Akash

    Uploaded by

    Cse312 B. Praveen

    Copyright:

    © All Rights Reserved
    Download as PDF or read online from Scribd
    Flag for inappropriate content
    of 63
    SYLLABUS ae COMPUTER ARCHITECTURE (ETCS-805) [INSTRUCTIONS To PAPER SETTERS: MAINE MARKS, Be Gases He 3 seat bo cmontcry and coves Sin enlen Labs a : should have objective or short answer type questions, be of 25 marke 2. Apart from question wo, 1, rest of the paper shall i inher Bey tsa be ne eostons:Hawewessegen may hea, comp cay qui Boca wr Hach qusion thats oiZe aes Sait Sar Sgr rents et ng nrctin desma saree eo ein oie era Seno tmnens tee rae Microprogrammed Control Unit: Contr menor, adress sce Conta Prcening Unt troucn ner ar ration tach rmiin, stray Input-Output Organtenton: ergheral devi, input eta erties rama, meow ata rane pony itrtap diet tery seas pat ope : Nason i Memory orguntsation: Maier, Neary, nin mamer ew ‘memory coche mena tal my sear manage rd r {erprsesoe Consmunczton & Syechreniatca, nn ™sT=ennetiee ere FIRST TERM EXAMINATION (FEB. 2015] FOURTH SEMESTER [B.TECH] COMPUTER ORGANIZATION AND ARCHITECTURE [ETCS-204] ‘Note: @.No in campuar Adampl ayo mare questions rm the {Qi1.1o) Represent the Resting point in the IEEE standard format fr the ven numb 190010100» > s RG ™ aec65 Hops conditional statement by two regiater ea thon Ri -+ Ha) ene (= 1 them t+) PQ_RI = jee if(Q= Dither RD Fee eer falowed by seater wit sa ae tia teh Showa or work ‘nme Shun ig (Y01101) tends 1101119 trill tae place when Mpa. ata Land einer pe edits) ie» nad ocular Diet rt we» and Pa Diet = “stan Store Arama Diet) 22018 Fourth Semester, a ‘Computer Organization and Architecture 1.) Design a 4 ‘combinational ctreait decremet ter wig four fay, der circuit, AW InAs 2¥complement of =A 1011 va an a ei ee wen Ses testo scp maine res ng nth lr, ‘coded ltr (Pag Retr 4 Sinton Registers {einstin Retr (a Pera Conse 20) (2) Ragitere can be wed —_ werity(B-Te)-Akash Books piss Lp Uni iL are 8 bt General Purpose ay denerst Purpose Registers BODIE 8 oa abit register pairs CDE aod in et recite nee onl ristar when BC i wed a8 ant potter o memory pia: Ty are alee Set at ine Te een Programe Pete ate rel (Go temporary Data Registers Toe ALU pli tthe oe et gaat i ns a mont of sealing en nen xenon ‘Mtametic and loi tmtrctons. “Wand 2 Reiter W an Zeer a0 eat eld 8 mma ne 8S cro MH (a) Special Purpowe Registers iN a tare erations Tos Plog Reiter ti it reser inhi ee sign ag) za inp. AC Alay Seatiinop ersten ine cn a a ema) es tmareion Raga nati prt operon, he ese Beep wares thin opcode ina ester called 1 ee finctracton rom meer Sieiaereeer temporary regiters These registers 2% hem terol tehatate 6it eicer eis extenatvty weed tap Output operation. Result tthe bit carry iin information ‘tag Party a) 20 ito sckinrrrvedaen ofthe memory ina BAM Se seeping 8 {lmnach punterin weed olathe adress “GiGi aplnin block alneram of ie ee nace it a ocean er cuaining priority interrupt, 42018 Fourth Semester, Computer Orgatizaton and Architecsure Sorte which ie placed last inthe chai Tis method of connection between thee si in ei ne min re Sop siemens the lowlevel stat ad “Bate on internat are recognized iy th CPU eguvalnt tow negative lope (OR operation. The CPU responds to an nterrat requgn by enabling the Interrapt sekowwiede line. This signal erected by devi 1 ate PU partyin) pa, ae ‘sekonelag vgnal pases on tothe neat devi throuth the PO pity ou) ope only if device ent requeting an intrrupe If ive 1 ha spending inerrapei "Soc the aknowlnge signal om the net device iy placing «lm the PO output then proceeds to insert te own intarruye reson mrcs VAD) vcr addons DY lato the dca bow fr the CPU towering the itrrupt ce, ‘eve with in ta PL input generaen a inte PO output nfm the not tower-party vie thatthe acknowledge signal hae eon blacked. A device that ‘reqontinganintrreptand hava iit input nil crn the knonocae na ‘by placing a 0 ints PO output. the dovies dae nt have pending iearreetn [fansite the acknowiege lgnalothe nox eves by placing ns BO opt ‘Thos the devies wits PI= 1 and PO =O i the oom tthe highest peony te 6 ‘equating an inter, and thie deve place VAD onthe data Sunn dey ha srrangement given the highart pioty tothe device that recefves the intone ‘sekonviede vga fom the CPU. Thu tarher he devise fram tn st pton Somer nie poy, University BT) ~Akash Books sine timing diagram for fet opera 4. (a) Drase andox Sen Speed teh machine cxsle oo Sot oa eter tthe lero oe am cpl, Oped fic the he mene Po gle ny bev Yo 8 Patan Tt intron at fe nw that each mains eee may Dave Sern rue ee ar transtared wo adrova bos (B-A sctctmatigact ND ADOADD Ose aa atm rotentredthe ALE arm ty Ne a ont compte ioe ‘RaireneDats multiple Bos as Zane esate Dnt SERS the RD go i terse we Fa et cimanor vet andthe cononin oxi Gey raccomtentotaccums! poe Opcde etch gle, etches the oration tout nent Ta cbr ecinsing of hist, the RD signa "fe eced memory leatlon stot intractin eter of oped which wa etced from he me aes oo 1 0 o 1 ft SECOND TERM [ATION [APRIL 2015] steers FOURTH SEMESTER [B.TECH] eeai oul rae Cli Re Reo COMPUTER ORGANIZATION or ore of ote ARCHITECTURE [ETCS-2041 ‘Stat of the flag register ater addton: ‘time. 1 How am: 30 Ping Register | D1 | ps [ps | De | va px iscomputoy Atego two mare qustone om mr [os foe Foe [ne fos To + Qe Define the folowing @ ory fe fie Oe sion pros insets Te = ‘1 sr De persons sneer ic inn 0 einerto nether operation whch pevirme ata oeraons 06 SSS data ved ia rowstor™ Agnes “aicn port bit manipulation peratonsen non-umeris ine en perf stifoperton on at are Tae aarword wo ent %2015 Fourth Semester Computer Onpiation and Arehtectre Unies ett es wagt 9 HOM i logienl memory addres diferent from phyleal memeory —@.4. (e) #XP! 1» hardwired aoe sed contol is 1 contol ‘Sgraramed control: Miro progr sisy une namer el teeth mace seme 25 Anat perat yt C2 Iocan eens Hee loc aren The eo i lal adresse genarted by = ogra Te knee pacha seers one (Scan wee anu Toca ean es es ea a It ae memes gee oar Soa na a ae aa Peseta nasapisescnadape caine st cae = ' soy retiree {Tar prem sr rt sre. Tha program ent, Deh een a ane wage aa ap ion ace ee Saeaitre wens curr ese relied Sy nao sth i Starr oa Se erm tg i ay ied sont storaze (C3) ‘mupred phon adres tore they ve asd. Phil sadtones tae Getha rman tors teaser ragecrene oe raza Le = corel fe) Mcroprogramened cont! ee \t location 300 with its address field at a = anion er i ae raceme mansermmtcnnioy ‘Stunner to. tononte ants een man ans we tit) Emmet (it) Rotative (te) Register Indirect (e) Index = aistlihanioamoe erate minded moot Ce, meee Gea ns Mn witveaiomnannny |S speiinmeimarin ae octane mri toginy marron tent sa, ep iectad rma satu id cain mre memes vos Fowt Soman Compute Cri id Ants Stennett LP. University-(B.Tech) Akash ‘Books: Immediate addressing means that the addrees Gel contains the operand tat pecorino FUER hase eee eran gue omunecatenine Stef nti ferc wmeeet an abn rn ta i br Le yy ot one SED pemicemncsesnanyeaiadtiped eatin a TS ny 2 cen le MB adidrece would therefere be 301 + 400 = 701. |* Main memory (DRAM)- -mnay take hundreds of cycles, ‘but can be multiple sieabytes emoeruaeaee a tne ne repent me ath ier fon prndii e asm Eepnn arn re it, or samsloreeinel ret tre Sacre a aerate cnr inte Euan mh et coven erearamas ant coesai oe eateries gow ce tae = moe fae Maden Gaston en eee ne ee pend in truction formats A ere ee 1 vari cade ld dat epecifos he operation tobe Peon ne caer meri ceil mn senate arearng the civ mds is Sad endedting te coateosoftae inven” oe ‘eto adree would therfore be 400 R= 400+ 209 60, ee ncn scenes ad eco teach ad emery ate Srna it caer tp emuaen on ped eet pager Oreniaton ADD RIF, RO ROR + ES sc etgretalinintineerrercmgenes Sack Orwaiaten | TURE ‘Manors ero = 5 ee ames tration mc oe ah rd "The memory Merrchyin ort compe lo : po ae prone eter are emery PHO, ADD RLA.B AL@MIAT©M(B) _ Te et i xenenress sas /ZEEN eee recs = rene OM muons a RESETS Sai ease [[ mom \\ ‘Two Address Instruction eee rmrmcrl compar. Each aren el can omy ther * pros Star ons memory eo (==) worn men Ao LB RLORL SIM ES 12-2015 Fourth Semester, Computer Onguniaton and Archit MOV F.C REMIC) — Xea+B)*(CeD) ADD RD - RIORIeM ID) MUL RL? RI@RI=RD Mov xm aixeR One Address instruction I. soed an implied accumulator (AC) resister for all data manipulation. For LOD A ACOMIAI STORET Mmieac | i i | i stomex” “ania Spernd that ommonsote wih esta TOSS epee ‘As he name ai the fenton ofthis intrusion allow he branching in the cite timer Ry hang we mean te nerenions oman (04) Eeplnin LRU ana r1F0 pase rnincment ent et Reortly Cand (LRU) Page Replocement hae ao hase ued forthe longest period fine Tats leit the pase a Tonto rage Repco Agee Mat ink th ar dh we wd mon eet oe SL Meeaditnyn wl replace the MU Pa res0is, ourth Semester, Computer Onpaination and Achitetare Saami: Cie tn itn rn nng 9120 smeSSene Tols0s04gB0g2 1017 [END TERM EXAMINATION [JUNE 2015] ‘FOURTH SEMESTER [B.TECH] (COMPUTER ORGANIZATION AND ‘rime. Hours Mm.:75 aoe cans fee qution nding Qo 1c scampi Interact saint ete eran do yrs man by ban in number sen? EG ws numeral en, the io base mab fe — omtemnta tise: aes th a ane Og Stun etree eo et cad preven ont CED. anemia SEGRE alice weenie seams Seanison ofthe tnsretion “Qua What ir bandehake problen? Rid a aang rbleme areinczclatin, the mest common on sing oe ee an Pegi, how many aire handshakes are pose? Mrs) rane pl en eer oe ake was oer na soning eet pee amin Conti arate fr Computer Ongniaton and Architecture LP, University-(B-Tech)-Akash Books: iu " SRSA eaten -a)oa-m ea e2y _ quinmnaitimt mening mantener ne sma ria enna -tntnm ac aaries een nome eens rte Sr cage oman Sake wi of tnneistereed gta logic cireult used othar classes include = aoe ae SENT LSETE EE ett trey hgh Spc my ‘ss cetaler st, Un owe oe Nd -" oat mecern CPU arto fe that for mon wes Somnend te produc, Early 1 tote production (a me ‘Fafa root ned use came approach bry, ut quickly transitioned to hher- “Qty Write aecembiy language program to mblract wo 8 Dit numbers? Memory Mierarchy soot ‘Tae memory Morarchy in most computers oo: a moor, 1 Brocomor rpsers ase posible cers anual CPU cde ely hundreds evn ctomeclanine me "Tlewe UL cach fan amesoed in jut a tn, eval tens af es {oral 22) cache gh tay thm Li ty Bs vate S1SRB coe Sune {LeveL echo opal Reber latency than 2 ce mate MBS DAA {Mile eoemery (DRAM = may take hundreds of ceer, bat cam be multiple ‘era a002Hs eantytes * Dick storage -undrod of howard of ree any, but very are a 2015 Pouth Semester, Computer Orpaization and Arteta 121. (0 Ditterence between a direct and indirect instruction? 1 Uaiversiy-8 Thc Ahash Bos eae seach, Dict wring tars of mamaria th pring 92 to eprosnt floating pont ip TERE standard format 15 ve Se, nt rin lites of mea ration oth ranma sod em aero Se Psion sa SPN PG “The baste idea isto apie the processor i men he pcan nastier of ma So ect ‘ean ag iene ier + Beecute Unit Panne the nrraction ‘ene arennge season eine a eed Single Precision See Te singe preci dentine pint ganda sie ehh ay rose Pe Siac ee ae the exponent bits, an TRS Rom 2 te aren fractlon oy any ti wrny rn te re eee Tepe ito ec acevo “wie ret ewan “iss a ee ee ee Soaras en os soared oe ie yg i a ea SHSSESSE coer Shcmreacenmio rt toreeereennpni Wate “Eset nn gatns igi eas peace nao pee mantsin thee SeaiGe erin ie recencen Sie hacca eet | Gee 20-2015 Fourth Semester, Computer na 1 2000000 co00ee00000000000000050 = 0 (© 1111111 e9000000000000000000000 = ifinity 1 minim: o0000o.e.eece0000000000 tasty ‘© 1111111 e0000100000000000000000 = Nab ‘© reon0000 eoooeeeennon00000000000 = +1 * 218.127)" 10 © eter oromommonsomoten = +1 Ui 2 1301 = 6 tcce00; 101eeescooGe00000000000 = 3 = 2328-127)" 1301 = semen carranstocenne $s ann 1 Evia 0h beh a agnor The IEEE double precision floating point standard : ‘Me wond, which may be represented as sumbered fom Ot 63 loft right. “e Thenacanieacs aa Salen acer ee ep ere eneo irvassameneeereee Skepomrimasionae ae SS ‘Aether: 11003810, 1 Uoivesty-B-Teh)-Akath Books aos-21 rset shite: 0011100 overflow beaut a ngs number changed A (g) What do you mean by us arbitrationt What are the ndvantagns na "ane Bas aviation ae Dae eb operation of the os fam te master’s pin few and cng ey ome master on the ba "en wg onl oe master 6 ae SS altnsning ities t= ft conaon Soevach basin nen MCU tioous start coins MCU 3 ae a i cain ae awe, mls So astning MCU wt nS bs ack any cy on he Te ccln monter shat gig on haba ar nd ot) a ean ee! Famsacins ie geng bennett ed om SEB Sroree arto ST ee CU mien the START contin and tl inks a MO wi at taling oe bas ch a ee cs ama. Ti cou end Pee sa Se pew ee wo Son tates ciaeeccet ane an sano on IG, MUS ae es cas wil ony ere the re ene ack cote ie ste ie owing ee 22-2018 Fourth Semester, Computer Organization and Architcture ‘rom the example shove we can conclude that othe mater that line LOW Sn an aritrationstution tt always wine the arbitration, thi wanted the line tobe HIGH yeni eb Totes te bus Wecall hea las arbeation or a back af eondlon ‘When « MCU loses arbitration, the te wait for « STOP condi ‘the bar Ten knows Unt the protnu ranean nae ben mp ‘Advantages of Buses Vera: von | [voome 5 Tio devices ca be aed ey Peripherals can be moved bene computer eytoms that sat wotine Coa: 1 Ainge st of wires shared in mile ways + Manage complet by paritoning the denen Disadvantage of Buses nia semtancon lon to appr! "he bandit of tat bas ca mit the maximum DO throat + The maximum bus peed ie argly nied by re ngth of te ba he mer of eres on the bus ~The nod to suppres rang eves wih ® mses 1 Universi: Te- Aka Bol Filing ty 4a) What ae the oatare of 6 miroprocetor?Bapainn4Grneing ng ple low by the ther garde oF #8 #0 OBO eropoceer inant mops Lacan ant oie eae tt oe cca ay Sian erent potas +e Sere a Sy tne hn Once nroprestnr provide 16 arts net, three tn 2 ar REO. ates han ean ase 208 = 06st prt nt 2 tne tie lowing sitet a etme raion Hogs AND, + complemant end shi eta ve hardwacy interrupt: TRAP, RST 56, RST 4 HE mwa intacrant ari toc peratons sarcoma, oe ag regen, 6 ener ror pin ne et parse rete An regan cnte sem drone cot sgl etn ne 4 oimplement en ep rrr 508, 24.2018 Fourth Semester, Computer Organization and Arcitetare 18) 8085 microprocessor proven two serial UO ling which are SOD and SID; ‘means serial peripherals canbe nterared wit B86 micrprceeoe diel, ‘Thar ae five addressing meen 808, 1. Immediate Addressing Mode: the reser gr NVI, 90H GOH ie copied into the register A) ‘MVEB.AOHAOH i copied into the rpisar I, 2 Register Addrensing Moe: Data sep from one rita to anther Tg: MOV B, A the content o Ai coped into the rier B) MOV A.C (the content of ie epied int the ropstr A oul itgetAddremsing Mode Data ie ie me rom the vena ‘An immodiate is traneerre directly i Bg: = LDA 30004 The content ath oaion 3000H Se copied tothe eee. 4 Indirect Addressing Mode: The daa ls trensferved fru the addeeve pointod by the data n't rgiier ater regia a; MOV A.A Gua arated fem the manor eatin pone by the Mode: This made deen’ requte any operand The sn ut. Desire control gates asocated with the programm counter FC ‘Ane Acuna that ZDR = iDR=0, ZAC = 1,1fAC = 0) INR (PO) = RT, «y+ DeEEDR + PORCH» PPCO) + BAC, BAC, weo-np, 20 - ° Q5. (a) An output program resides memory sarting from address 2300.14 setae tht he computer ocogiza an intrrupt when POD becmet @iow @5.() Welton program loop, using a pointer and w counter that clears to 0 ‘he contonts of henndeimalloeitons 600 through OFF. cua ‘es om of BR ‘nave NBR a oostar 19 Universi -B-0)- Anas Boks 2ois-28 Loanpe ‘eam foncta ‘Clear AC Surm “MReset memory word srarrnr ro snore ere acre oe UN De x “Nbr of cleared words: NBR? fe Son ‘Start address ‘Romane 50 ssc ei) Dit diate between hardwired control and micro programe on Dimers to have s hardwired comol seocia “hn Fresh ntructon, o glts mer ine oma a stops correctly In tings happen Fer camps, wan we prom “ore taro dal oe itr ec kr and tet BSC =e ) wwesoacee weer us it 26-2015 ‘Fourth Semester, Computer Organization and Architecture LB, University-(B.Tech? fits rogistere, Moat computers fll ‘reattach er mp ma can Scere et iene ee eee ronan ae a a ge ge armen nee etn e {End lnter decides to extond the tnetracton xt, physieal component inthe compute persormed onan lied AAIDUS Ts ee toe wth the conten er eproorl rp tree eletetpomen rebar er Eis nafeaenhbarerecns a ee Sete ee a tal Wee itn ni sn the operation ACM eitaced an ‘mrinstraction pecs one r ore mionooperatiotine for tuesytam Aseqvenet Eee sees SO mem om ‘eS 0 Gomer towingmamril etme remem agro rn sts nye oir rns elite dato “sna ting reel: Se0I0G+0 The Faun ofthe couree ea yaogeea) te) sion ARS 1 natratione ADD RS Pot ache the iartroton PU rns el Pots esac Thus ate otnstecomputarmemary that prove enemas se em rer Toanumrat go repatrs we eed Ms ice 2°64 what inte it igre Cu mene anand is Meta Seer perc a am 284 werd wo can ws fr option Slap), oinena td dna ea acomplia er sa. 1e1d7ec Souter ante P= asaya a acento aves ‘Tacimtrecion oeteanbas aeons a ty sing an intance Bat secze-aoean- 0 Ms memory roves eter dn ern Senter dom ae ee it tr cy ee ‘Cache meme aa me a pier tie mepeneetay eocante sank ‘Ans. Computers may have instrostions of vevra ferent length containing SN tian te eeaortiy nrg nana thircen The subersfeddten fasinates ormatet 8 125-2018 Fourth Semestr, Computer Organlantion and Architecture up, University. Tehy-Akaa Book 2018-29 orng eck npn eer ne allorogwunen cau he 72 Cache memory ie faster than rain emer. eo ertac tote meer: for DMA sree “iteonmumes lee aeons ime ax eoropered o main menor ace and the DMA coral arses 7 {Sven the program that canbe eneotad within a shore period of time 1. heer tebe HOLD pin ace High one ORE CIP 1 Htotore data for turmporary se nd ete cier pnw contol of te bo a = aac ‘DMA buret-transer _qrtincemal ey he hte rm ila ee ere scent tn cere i aqutttoinghanl ahi Racergtcacieaae hath | ye ater aag ices PNA attain e Bagge rere ean ge, is xganbs rman er ‘ihc corral cpr ate creator Sth eee gations sada te yng ‘Taking control of the bus for # bus eycle is called Te iterface ates fhe cen! n usar mun be capeie of acing adres {the Bue requests dropped, the HOLD pin Se des eet ge tm eerste SEED tosated with a vinglainerfce, but they ave oes Othe ares registers nerementod BY sabi cemaciea tment “ eet nets Ho pinnae irom ae ec ct SSIES face cn uv gn en penne omnasn moana a Pelee tany igre mere ane ae sae tor sadessng tha main emery? Seceamecitroscenmttectcttiies ioemminerementtrtts tan oe acre nanan aE eres ae eae oa nn nme at “erect td thers gwar Torte, tenia Wes MT tusn ron so = ae er i isco rani emer TS oc Lo aa contrarian 9. (0) ep a ee ogden or WN na fata doer HAA random acces MEET oF a amt manacene omer] sumer ani the Spee tt 30-2015 Fourth Semerter, Computer Organization and Arcitetare ‘An 08 that ses virtual memory es up spice hy ranefeving data from the hich not immediate required Whon the datas nese tiscopied back tothe ‘When all RAMs bing used Vit saps data tothe HDD ad then back again. Th ‘Mowe larger taal rtm memory bowever eomplated ode wrung i required (@2. (6) How memory management is done. ‘Ans Memory Management, ; compute The werd an ade Stn fm ner ae ret ‘Seton te hat ramen eon Thess, sey progam we eee [A is sevesaiders footed te Woo ache csoceay reels tin somplte program islet tate ror but mame met tern part os ade tate min momtry oy when i called bythe pags, ncaa ynsmte Landing thie eae the prtormanss Aono ine coe progres dpendent an ame ther progr, each ca, rath ‘han dina he dopa popu CPU inks the dopant programe ead ‘Sting pear won equ Tchr carom en Dyce inka Saying: acne ihe n mao fr non, Bs tomtina ne Memory Protection Memory protection 2 phenomenon by which we conta memory necne ias on compute, The ui sin at ‘Momory Allcation ‘The fit ole thats genoa alata program, “The malt ole that bigenough ie located to progr, "The arget hole that bi enough i allecatad o program, 11m University Number ache — 2048328 = 18 ‘teu b unt ascene 8 ee 128 ew mae ro ca sani common to i Pe “ Sen yo nbroedirnsinen =» d= 18 We hae 16 chine 2.4 } os ec ee sea How many ins mot be dented for chip elect Ane Weed forchips select Spectytheny EyRGT TERM EXAMINATION [FEB. 2016] estts ete FOURTH SEMESTER [B.TECH] COMPUTER ORGANIZTION AND ‘ARCHITECTURE [ETCS-204] ete lscompulary and attempt ay tw fromthe remoining gusto ly) ineructon with xa, oN peigteig?too0001 ster 4s oe Aa esncfacempaer uth er sh SESE srl reece meson ‘22016 Pourth Semeter, Computer Oranization and Architaare [LP Univorny-(.-Heh>-Akash Boo mes (3. (e)Beplain the different shit operations. | shi Data mayor may not be numer Al it are moved the same nut ohh he contents of theres oso et OF Fh iGcsaaltcnaee se frtnmetieMicronperaions; "Egleston dated ethene taso cheng RSS RESRE Maaton ens ntes tpt erat oases anaes BBR Sn ate) Pee en erect at or ae nee een tere SSipatepnacipnvttrnnatttnrecsceThyainchnvome st ata he three gro yo fncration code format af “Euccircular micre operation cle. at sspataPuametyourery rtcrence,rexinter reference moa inpauowina ‘isto perform arithmetic operation on numeric data, i inMVAna. All Basic Computer instruction codes are 16 bits wide, There are 3 instruct Teeriere seta coaserrenementng tnt 0Ctsceared we, =H ae ooo structions tke a single memory address as an operand ranch Uncontionally "tegintorreference instructions gperate solely on the AC register, and hav the “These Instfustions are Recognised by opcode 111 with addressing mode 0. ‘eee Teen sna opi iactan te Magpie Tone and ne sniant nym ameter 88. Ren reward TLageAND. Oulart nang nda nspptetencroit Pina en nt a —_ ttt emt fe inden ple ee rae tnerdoponset i Pourth Semertr, Computer Organization and Architect Une. Aboh ate noes —— sr dren epratns in ae pt See Bere teste ih tavaear coal e, * * 2 aan cto RAN sn OM anon oertonn ter eect % Fe a ference between a direct and an indrest adres. splay Tavengn cane = “gt @) What in ilforence nc tite tor has wn input a ate nput rand ania npat The contre dentin mene te oti : ‘see io rw jut tke anor np That ‘ction enooding sl ontina te a ute Te "wave i ope “Who the contol input ot ative the cutpu a2". The valve" is pen, and ng DePetarese rect adaesting haw the addres of memory lcaton 4 ocgnTinmesaeeanrie re memes Sa Sig ema eee ener re f ° 2 (01234h1; direct. Loads loc DS:01234h into AX ann ce kere nn amon nh ne : 1 : ‘eenne jou tenet ba a tae ase isc eeu tenn rh, ia eee en alah pa rs s ann son ens anges peso tenotin “Gia Bea a eptat contro wit ot ese compton ws ccottntiefaia sincUiancmameatatacmpsurictnprceincont oy a MOV AX, [BXI; Indirect vi Fos orem NOVAK (izoih + BN, oda eter rd Lond DBO1224h + BXD 8 AK = |= SECOND TERM EXAMINATION [APRIL-2016] FOURTH SEMESTER [B.TECH] COMPUTER ORGANIZTION AND ARCHITECTURE [ETCS-204] ‘Time TAs; sent, Note: @ No. iccompuleryandattenpt any to fom the remaining questions 1. (a) Wnat in control word? “tzid ant rr ain ofr es re lean he a, the ALU. The thee it of SHL B nlc sour regatr forthe Binput ofthe ALD, ‘The threbitof ECD esac datnation ter ting te decade ind its even and ‘ord when aplid to th telco input apeiy«pertclar micro-peration ) Wa do you mann by addrening modes? cee ‘Ans, Adivnsing modes are an stpst ft inetraction set echiecture in most ‘ow in ealcalate the otutve memory areas oan operat by using nfermation held {nrepatere andor constants contained within s machine iatrvton or elarwhere, 1. What instrobe control? @ adjacent paral! ines In memory tachoalegy, he ) sigale are weed ts tata computer micropreeear an sexes ore qicly than ica acon reala RAL ‘hie memory ie tpl tegrated ety with the CPU chip or placed en arpa luring operation. Pat access to thee inatracion increasee te overall speed of ht erm 1 Univeriy-C-Tach Aka Books raw block agramof general configuration of eter oe MOVXRE -_ S-2016 Fourth Semester, Computer Organization and Architectre PusHD sup PoPx 2. (6) The contrat memory has 4006 words of 24 bits cach, multiplexers areneeded? as im each multiplexer snd how may {How many bit are therein the contro noes register? « (i) 12 mulipterer, each ote oH 3. a) What is basic advantage of using Interruptinitiated data trate ‘Ane. Inthe interrupt initatd data tran, the proeonr ves the ees = ‘ranner dhe ontrol [topo the tack ante eeumes back wth the ose ‘ile. the processor haste wastes Umeby performing all he ask, fr expe rh 3 pein command is given in the interrupt initiated , gives contol overt 1S a ‘esomes the work back where as mthnatintermup the presence towel anlesr [rin document is transfered to de pte, dae not require the continuous checking LO prt bythe computer. The expat heck the port only when an UO tnterrapeieneoutered. lenavesPresing ne Tt {CPU issues commande tothe UO sodule then proceeds wt normal otk at For inpat the devieinterropte the CPU when new data ha arrived andi rend te reteere bythe satem proctor Te aces neonate perform depend om tbe {edeviee ures LO ports momory mapping data orto acknowledge surreal dasa rater Messery mapped and DMA cap ‘devices usualy penarateinerraps tell he seers ey are de with th baer Althouch Interrupt relieves the CPU ofhavingt walt forthe devices, bat ities ‘neteent in data wafer f large amount teomses tne CPU has to tract the at Tors werd between UO mle snd memory. Below ae the hase operate? +10 module gots data from peripheral whet CPU doe ther work + Wo medal interrapte CPU 23,10) Acommutes mena memory nit with 0K words of 38 bit each A ‘eaters am indirect bit, an operation sade, a egies code part to "peciy one Sreregistora, and an adarest part % ‘he ndaress part? {Gd Bieaw the astevction word format and indicate the number of bits (@) Address: 16 ite 04 = 28 Rogier code it sie for opcode, sso (o Data: 2 tv 18 C2 peewtelmeralarchiecturest#085 microprocessor (0) ote LASTED Ta - 10-2016 Fourth Semester, Compater Orgniantion and Architecture LA Attempt All END TERM EXAMINATION [MAY. 2016] FOURTH SEMESTER [B.TECH]: | COMPUTER ORGANIZTION AND ARCHITECTURE [ETCS-204] fiero progam ey B10) Ditterentinte between Miro-operstion and Macro operation. (©) Eivery complex ina fally-amociative Associative Cache is much sere comples, ands tlio amore am dens “Ther ln price for that Insrdertocheck elude i ‘nditonal es [ancistors inten seheme tnd of eure cme titi aenra gee na et essa eS eay a y ‘Te micro-operations in comps 12-2016 Fourth Someaer Computer Organization a Architects {Unive ey -Aka teste shorten enon ime. Acer ime nals requ oe desert te sep eiven tbl SESH raernt arta at eater arc wi cond mtr Hore ‘iectiueannnn oak end natn ernest nm ig ea sectarian diy tat ntcarfniey ea ep ‘ris tinerepeente on etsnotins tere between to meron scenes eententes emerald Held Ta ames mactaeney Sune erat eaters mga Neve en ho nh ain oa k onte sete oemes tN ce ly haan nye ho tr icy emesis in nie rl es ase care een ct ee eta is‘ gus sen “atu DituenntetvonMardvrd ad Mr Proceed co fat recensione reeset pew etre a annie wt nanan ation ee re a Se an wren nee rae see Seeman carta are nna te ae ge es teed Seis anestttvteenen teers ge ot recensione sep te saga, Shes ghar vemmanpme orcs Geyabeimrarer sein erie uct SSRs Sarna connate at ae geet = nee - Me correaponding sigwed variable. Signed variables use one bit to fag arene ree dont awe thin itv ey ca tre ae = ntl ie Settee ah = ‘tumero in the sane Pevnich are intornaly represented without a mathematical sore ‘riables are variable Wun’ orpoutive values only. Lat us say the unsigned, variable oat MORSE el than ican regent Boece poem vate Ow G2 = Gti tein re aon : | ee C EE eis aa ouceeanad ith cvieiine can ci defines the snl comming betes a TE aa LP University {Tachy-Abath Books plications that proces dato ‘time Acca of sae byte in be ‘Saracen nd Uning Seige casing tegmental 7m res ly ere one wordt ne Se i cer tbe meng inate fn 2 aril ror won a standard entre of erate ech hat wor and thn nrc te bio he nr ware My Seer Terao te eer cer rs rcs ian ae wl ene hy i, ae encima ieee ee omer, MS 22 hate getty orton ote ‘see Hasta pans BOE a eh ane a ate pcan arent nadraing mod ue In computer me wag iy etaneear ea one ca toeepngetac S = port to connect to RS-292 peripherals. Neverthalee, RB-232 devices are sill wy "vee, dressing motes aethe ways how arcitacturesnpacty th adr of GPnmachine on eodreesing ma ean Pe ‘Spetaliy in industrial machines networking eipment, snd scene nate ey want oases. [0 - a ‘Tha various signal sooclaed with RS252 are “Trapsmited Data [Carson data from DTH DCE =D Teguet To Sond | DE rages the DE prepare RTs Taceived Date Carrie data fom DOE to DT 1D Tandy To Recaive | DT in ond to raeive data fom ROR landvantagee? 7 ‘rchiecuron it ar qrouped ogee to frm abe Bit aresabla marry ole {omreltecures whore data can be acconed 6 bis at time Tn computer architect ardor tte stor orbits hat ete normal ani n whieh informa ‘ndy be tore, trnanitin. be operated on within «gen computer I eompat ‘mernery is word-nddesatle thon each word memory Ie aeithed its own ec ‘Selecs-That nana thatthe processors ble to addreas and etchonl compete wt om the memory mache ‘tpund onesie o the arn Tite Ades Tut Word Addroaable 2. Word Addroanble ti ern a ae ae = rrp ops nt et co re aca nce nw nti code ex Mode ned eee ray pels arta ofthe array and ihe vals of the Ce oe cect IRDINECT MODE: Teale i uci eco cooing mechaniam over may cng at of erecta adroit erin i eal fet ane we CT MODE, Te err the oer pina iu nate eks ean ann cer ada inh ner ane repre Tadecsigmer [_Hanmoiesirveton : itn fam i004 fat 109) hs eo 16-2010 Fourth Semester, Computer Organication and Architecture 2-4 (a) Explain zero-addrensonoaddrew and two addrom instructions oie “tie Ans. Zero-Addreas Instructions: A sack rganized FUSHA epet Stach ok = PUSH /fopof tack = oo (rRop of Stack th + FUSHC —Tapat Stack <6 PUSHD ——/ioperStack CARRY 10100031 ONecStnuab) = 11101010 + 00101010 = 1-CAREY 40010100 Goree erp = LCARme 01101001, Be Bete 10111010 itis where Suteaigt 18-2016 Fourth Semester, Computer Organization and Architecture LP. Univeniy(8.Tec-Akaah Desks aoe-19 96. (a) Explain 8085 instruction “Ane Iatrontion ste are insrton dst perf cme tat Ia ann ot rm Torn a dat prt a acter tnt neato wise eeipcopn Vo cuca or ers NOP = Noopernion permed tha inatracton fhe an ese ent Meet, hl an tay ay rm nerapelie une and hyotrds tae pia LOGICAL INSTRUCTIONS: ‘heratand tho utp from Chews deve the computer spot Slay par? Cas cRanmrieencrormemarywihthescunanr ‘mart aaa opr gn iy ae Ee rae Eantaive the process of roading or seeing these representa wis rcenng it frome nareaiar i eeeaiser emesis epeiiasnbancnecsoecuat hat 2p | SicRtstegumretsenecon teammate "herr insn ragannng nina ge et Boo ete toute snr tote ett) needy acne wah prcnn arn gros 0 consists ofthe felowing netona unite “rei ceil ng cette ering nea ae te an ee ti att pe UA Las posi stern Sanchar perttm camper an 2 ie ce are iret anc per nicer eis d top uh ear trent hh nti as 2 eae rerun ie gresea he torme en caled eee ee Se es nao cvnnerng ring prea scion hae are ‘General purpose egater:ThereareSguncal purpose gitersin 08S pr csinal cough thas ny cao b handled wi the rogram te «MED BIE L adhregutercanhold bdo ie eh ee as ore Program conta: ina se iegerusedto stor tememary area ed ing GPUs cory eae onc operation cam rm ‘Steck poner lei lw 16DI register work ke stack, whch i inlede erection et Suchopratons may ove sncrementad decremented by uring push pop operations career ee ea ens umn ee ie ‘Temporary registers can i reise, which hos the femporcy dt esate opede whining iaucuon ina mache lang FOE ‘operation ie Ai earooceee: Set ree matt nape neers crt, Terra it Sa gauge ip ops, ie cn ag a mayan tenets nortan parece ohne Gnres eeee are ct ites Ged arene mana "ute ilerine stern ‘seep na en thse ae ere performed by he CPU' Moating punt unit PUD. "Control uns Te sontrl wnt fhe CPU contain ccutry that wae etic Git addrore bur, which ea address upto 64KB Si it ropitar arrange in pare: BC, DE, HL SSRs tetera woman wnt ALU oy 5.0) Discuss about Input-Output and Interruptsin detail. (0 Nehchmatiotogte unl: The aithmeticlople wit ALU i it ne amet ee a ge viele and bitin logic operations, The inpute _yAnINPUTOUTPUR In computing npaoutut or WO (or normal: ger 20-2010 Fourth Semester, Computer Organastion an Areiteetare 1 Univesity 4 en eas wand mote on the control wi indenting which operation ramet a Memory management unl ost high-end micrnreenn inden nt 7 Moses RGSraaactses, provide memory poecon nod ping bien eel bs ane Simpler proses crpocally mirocontcliers usally = 9.0 Sac ect Ce ‘iota tort LOGICAL SHIFT LEFT: 00111010 se CIRCULAR SHIFT RIGHT: 00011108 Qa. Write short note on any two ofthe following: 625020 neem ohn ae oe ae gate i nent Wosbee A eee ees eae “ to antbn netin,,2 DISTRIBUTED ATCT man nae teria a Tapue devices and breton! fr memory and CPU. rium th sl ae he puerta geno kt enact he Oral bur nren etrl signal. CU of CPU ust cor et hen gu more ees arta (eet te Spc Rison rm CPU ol other mp gal mae 5 wranaes bers dare os cris memory adron. A emery are QA) Levee Prope AS une it rienigiogtmemay nan. Compete prema sine LEVELS OF PROCES LANGUAGES eee nee inton fon CPU tal cher compares accomplish sapecineseto ao tamcloitaascence Machen 1 CENTHALIZED ARBITRATION: In centrale bs riention. i site punt th eee rao, bs alarm be he Poe er heheh Specht cinrr coon othe bu, sora ne sop ea yan prams that one ta en {@)Daay chaining Is snleandcnaprsmthd All mastre at Spe oeraione hat te longs rea eu oun Tarpon tas regan the constr ovat SPT me orci oc nai a nique machine angeage Arachne 22-2010 Fourth Saester, Compster Organon and Arhitctre wan at ny in te nadingis Preeamine a aainsimngngr mesg «FIRST TERM EXAMINATION (FED. 2017] SES Sits cat tne rn FOURTH SEMESTER [B.TECH] senna ineu cremcanteciemegegmomngnae; tannins COMPUTER ORGANISATION AND (GE,AbD, MOVE Ths nomen language are iusto pele omputer mci ARCHITECTURE [ETCS-204] vranenpr No which ecomplany nd ts mere gueion rom mani ‘nue wa ee ‘Qi What deyounean by base ofa number netomt? ™ Eee rcaoeteenesncttinn rae us Soe nt sch e e tee SEELSREET ilteces eaateroure cae pogane cov ne siete.” teal i or far choo et “qe onsany Crna nai standar. se Reana-e srananin to 230 angered standard CC") en ” corsa version) at desrbes tha physical interface and pratocal for eatvey an, 1) What lems neo ° ‘tpeed eerial data communication Networks between computers and related device for shor-Aarm, ntamedine ie Sesser Secs ses emperor ered sien, RS-2520 isthe interface Soccer weer ean aon an a Sipe ree eee ee fama sears nea ne ‘Saregama otc nor pen Sfasecprsicunieinctn be ee cesimarctnnrenton BO On eam ogee eres ie Be gene ata often Bepeing oe ier ane thnk af = “Trowindeced mada, Tirnmory bra ean re hatter et a memory loca rant eco, bt eather oder aig dhe CPU wre same tren eet vey pepinin HUN CBranch Unconditional) instruction with example, seta arocion fn» pram oni tou of oat SEE ea pcre Baer own Teample of fg PC- FOURTH SEMESTER [B.TECH] Comma | neti dee COMPUTER ORGANISATION AND “Hssalaitermr — ARCHITECTURE [ETCS-204] Space aa | mang Faner memory aco ne “gi Breil lit the pes interrupts with the hel ‘Note: Attempt all questions as dred. neal choles indicted ‘Qu. (a) Difforentinte between “hie” and “mina” with reepect to cae mma inrtt sony emputer each we SOM cage re object is satisfied by ¢ _ lardware interrupts: Ifthe signal ct rita eet mr mac eet 8 arts eee mana arene oe sian ct pa = “Maskable Interruy xe hardware interrupts which can be delaswd wt vais ie pgpnotectaesr aetna ran ede _ Sa tanner ye ate — sa ran tli the torn “Normal tnerrepa: Ts intarapi which ae caurey hectare introns fad normal nares rogptionanpanpdinarrpi ie xt Exeetgie cheng pear TStSvcedn exception = a eign Ditterentiate between HISE an ‘Ans. Bigcdian and iecnan are terms tat dtr he ode nw /DsC°E) into reverse polish notation. ‘Ano. REVERSE POLISH NOTATION. AbeED-CEres Qi. Differentiate between direct end indirect inetruction. a | Progam | Hehmeaharimredentet | te —= | noes = jane ae Faacompes ae oo Tieden tet histatins | Cano sesiefor mapping nin memery bert in tc nw Fert ean ‘he upping fnction Sctate hw the each i organize, Thee wchiqus on "= DIRECT MAPPING:"Th vnpeottechniqu, now a ree png [LP Univer: Tek FAB Publaher raw an epi bun ay for for regaer Ag open 1 hon > 2) ee (= thon cL <= 3) a inet cummin tha crenata boon eit —‘Thec t Wounctaf conan pom itt ory nthe oir Ther re ee arnines whieh eit tlc nbn a9 pre ei al geri a ste nafs ascend at wre edineimarineicnigw tains andimapvetonponont fel ress inca sponges 1 SET. ASSOCIATIVE MAPPING: Sc anoclative mapping a compromise th xh ern tthe dive tel ancative approaches Wah abe ‘mapping, ioscan terapped int ony athe ina ot 1.0) Kaplan Virtual memory Alt ata "Locale f Reference” pein incomputer anc leniy force own pence lea 1.) Whatar the diferent indsof operation wed in CPU design? (28 ‘Ans: The ier eperatons in eompulers are cafe into the allowing categorie “alc micropro, Thaw mre operate se ted opertrm it 1 Sum epration A tr ne ep thy ayo pvr sit ‘@2 (a) Starting from un nila value Re 1101110, determine the vosenct ‘otinary values In after logial shi tt followed by circular sarge ‘llowed by logtenl stright cui mo oa hi 1 lopeasineight = «0 1 Ot ot kg satan {fe connected to the inputs of all destination registers, ‘Stocted rar when te ray tenner ta, Poke, @ mL RS {2 (c) Define the term Mloro-operation etpttam exemple: eer vane arithmetic micro operations are Decree, Ine =e ain tore incon memory mieintrotion anitersioatre tat mates the hardware operate propery The format is unique te ra gonna i ea er ‘tam Matra ad they ent documented fre Pubic - 10-2017 Fourth Semester, Computar Onganianticin and Architecture on 3. a) Convert the decimal 61.6867 into its binary equivalent. Ans. Conversion stepe, 1: Divide the umber by 2 2. Got the intogor quotient forthe nex iteration, 4. Get the remainder forthe hex gi 44 Rape the sepa unl the quotient i equal t 0, (61.881), = (111101.1001013001000304108), .Q.. ») Convert 6.75 (rrtten in decimal) to floating point representa (aingle precision. Encoded an: Binary: ‘Value actly toed in oat inary Representation 1100000011011900000090eees000000 ecisal Represontation _Oxe 0480000 3.6) What do you monn by bus arbitration? Explain serial and para dbus arbitration deta ee Ann The vie that slowed ona dat trnafrson he bua any hen te ‘ncalled to bus mater In computor sytem thee may te more than one tes ase ‘ish a proces, DNAconiroller st Fhey share the system bas Whe sure nse ‘nih na then antennas cure ba ‘tudo mantershiptstranafrred to it The sloction ef bur maser a ursaly aceon ror bass‘There are two approcches tne arsntion Conenizd and anes scala gai thor acme mastery then mule mater dates whetae sully other toe woul elnne Misia wesley apereont ese as ‘quired the bus or not hy checking the bur bing equal tt wheat inost nei sashes cette teu gr mse ol ont ‘elene the bus nde conraliaed paral riatation ste eden Ties nian muir cre re tomes fm tune ‘aster vin one ofthe grant le: Consider tnezampic where sin ta hgherk ere nC the lowest. Since Alas the ghee pron Grant ail be ssecsck es nee: ‘oth requests Aand Bare atserted Device Avil Loop Request A secred sot ee longer needs the bus so when Request Agosto; theater wil dsae Crane h Si? [LP Univeray-18.Tch FAB Putaher st B remains asserted (Dove B has not gotten the us yt ral then assert Grant Bo grant Deca Wesnoth bn Sti ‘seuss unable Requeet B unt tr done withthe bon fe tte [oan doco) data Ano expan 4 (0 Replat naracon plane and tn Seeking efeomputerrogasrwesini tee oe Each computers CPU can have diferent tossed on diferent instruction we psa ch trace Tt tein fed ho th mary ee ‘na Rs Retna hore, pian natn at Tire tthe went ee a Disc teint: During hi cel ede iarction pete ee artsy ote thei Ganon eo i tna ue eect eddrenr Inne near nrc titan ts perorned (execsod) at a tenemos te CPO the sara Infomation att sequence a cmt taal Pe rete Acer ve SSG ciara pent tt nam aaa Pececcmrs Fre cate inte os ifarent aren fom which he neti wile etched 12-2017 Reurth Son tot, Computer Orgeniaation and Architecture ‘The eyelets thon repented. The various reglaters used are and for Memory Address Reglaters Thin register holds the meme ans "Thin roar ned to eenas data ad nate EP Univeri-(8.Teh HAD baer wulator Reglator: Tis Regine enlace wd rg nh = ve cee, vbtrtcnd fom) the, rogram Counters The program counter (PC), cmmanly called the iatracti ‘o1#20 ron portion oy oat a mrarncrsrn sd snes called te Inna frm 20 i ious regater r jon pert of the narition sequencer in toma computers, Memory Buffer Reglaters MBI stand fr Memory Buffer Reglter. 7 procncoronater pt th enon date rion wad aera he "eterio wed to soe dataorrcionsonig en he nese eet ‘Data Kegitor:Aresater wen mircenputroomprtely tare dss leg ransaited oor om 8 peripheral ee ‘ —s costae emanation nary mumbo H i machines any numer of machine iatructions am eauired- a 14-2017 Fourth Semester, Computer Organisation and Architecture + Push oD Tse D + ap ros = «C+D 2 Mut TOs = (C+D) Lopor x MMe 0s 5. (a) What are different types of fags used in 8086 microprocessor? what archisecture is 8086 based? Explain. « “Ane ALU of S085 have five ip Gaps whose state (cotrenat) are determined by soot bat of ter registers and acme, Ty ae ala Zar, Cars Purity and Ausinry Cary Sag. remy Bag) Wha an rithmic operation ean th ea ean ag (CY) Aer am adatin oo nambors ithe sm nthe acum mrt ih tn i ap sinned be a to 1 fie DT ofthe eeu = 1) theron reset DT the o LP, Universi. Tach AB Publisher «par fer tha an aven mambor 1, the aga et foram od rr ige-Awslliary Carr (AC):In.an aithaetc operation, when acre te ay sil D8 tnd noted tag Day th AC ag st. Gora hi ae by Si por Binary Coded Decimal (BCD) “Goss is pronounced ae “eighty-eighty-fve" microprocessor. 1¢ Is am ieetcosr designed by Inala 1977 uring BMOS tochsogs ‘nas the folowing configuration 1 sbi addcou bus, which can address upto GAB. 1 Sic registers arranged in pie: BC, DE, HL 1 Require «6V supply to operate at 3.2 MHZ Qs.) Consider the following program sex yosinson chine crt art sat ‘Steetin word) 21:24. respective aes tho word size ofthe instruction 32 it and the program has been, soa eee ery with earting nddrens of 100 (Decimal onwards), What at nt a eee cmt in PC during the execution of inst (aemmory Pye Sot words 4 bytes and 2 words = hes sed to execute Tat ee, Inst Ema, (Qa a) Expat instruction formate with examples, [Ans Zore-Addreas Instructions Aart to apnity the operand thet communscates with the stack ourth Semester, Computer Organisation and Architecture 16-2017 ‘aD topo Staak = (A+B Posie oop of Stack «C PusiD {top of Stace «=D app ‘7fypofStack (C+D) MUL Irtopot Stack <-(C + D)*A+B) PoPx top of Stace <- MIX} < Top of Sen ‘One-Addreos Instructions Oneaddress instructions ate an Accumulator (AC) register for all é “Arsume the AC contains the renal fl operations. wa A "mac < MAL app B mc

    You might also like