Compal La-5573p r1.0 Schematics

A B C D E
COMPAL CONFIDENTIAL
MODEL NAME : NAL22/23/24
1 1
PCB NO : LA-5573P ( DAA00001G00)

BOM P/N : 43177531LXX
M10 Margaux DIS/ASICS
rPGA Auburndale/Clarksfield
+FCBGA PCH IBEXPEAK-M
+ N10M-NS-B/N10P-GLM/N10P-GLM4
2010-01-21
2 2
REV : 1.0(A00)
@ : Nopop Component
7@ : N10P-GLM VID
8@ : N10M-NS-B & N10P-GLM4 VID
9@ : N10P-GLM4 only
3 3
Asics DIS N10P Margaux DIS N10M TCM TPM
MB Type BOM P/N BOM CONFIG
1@ 2@ W(3@) W/O(4@) W(5@) W/O(6@)
Margaux DIS, TPM EN,TCM DIS 43177531L01 * * * 2@,4@,5@,8@
Margaux DIS, TCM EN,TPM DIS 43177531L02 * * * 2@,3@,6@,8@
Margaux DIS, ALL TPM DISABLE 43177531L03 * * * 2@,4@,6@,8@
Asics GLM, TPM EN,TCM DIS 43177531L11 * * * 1@,4@,5@,7@
Asics GLM, TCM EN,TPM DIS 43177531L12 * * * 1@,3@,6@,7@
Asics GLM, ALL TPM DISABLE 43177531L13 * * * 1@,4@,6@,7@
Asics GLM4, TPM EN,TCM DIS 43177531L21 * * * 1@,4@,5@,8@,9@
Asics GLM4, TCM EN,TPM DIS 43177531L22 * * * 1@,3@,6@,8@,9@
Asics GLM4, ALL TPM DISABLE 43177531L23 * * * 1@,4@,6@,8@,9@
4 4
MB PCB
Part Number Description
DELL CONFIDENTIAL/PROPRIETARY
DAA00001G00 PCB 0AH LA-5573P REV0 M/B DIS
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5573P
Date: Thursday, January 21, 2010 Sheet 1 of 69
A B C D E
A B C D E
Block Diagram Thermal CPU/PCH XDP Port Clock Generator

GUARDIAN III SLG8SP585
Compal confidential +1.05V_VCCP
page 8,15
EMC4002 +3.3V_RUN page6
Model : NAL22 Auburndale/Clarksfield +3.3V_M page 23
CRT CONN 4MB (Socket G1) FAN

+5V_RUN page 27 Video Switch PGA CPU R3P TPF3000
1 PI3V712-AZLE VGA +VCC_CORE +FAN1_VOUT 1
page 23
VGA +1.5V_MEM 988A pins
+3.3V_RUN Memory BUS DDRIII-DIMM X2
page 27 +1.05V_1.1V_RUN_VTT
+VCC_GFXCORE
(DDR3) +1.5V_MEM 800Mhz/1066MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
DP Repeater eDP page 7-12 page 13,14
eDP CONN +1.5V_MEM
+5V_ALW DP119 N10M/N10P
+3.3V_RUN +3.3V_RUN DMI +V_DDR_REF
+PWR_SRC page 24
page 24
29X29 Lane x 4 +V_DDR_REF
DPC
+GPU_CORE PCIE-E 16X USB[11] Camera
+5V_RUN page 24 Trough eDP Cable
DP Switch DPB +1.5V_MEM_GFX INTEL
+1.05V_RUN_VTT_GFX
PI3VDP8200 page 24-27 IBEXPEAK-M SATA Repeater
+5V_RUN page 26 SN75LVCP412
SATA4
1060pin BGA +3.3V_RUN E-SATA
page 37
+1.8V_RUN
DP CONN +1.05V_RUN_VTT
USB[2,3] L SIDE USB Ports X2 USB2 : Left side pair top
+5V_RUN +5V_ALW page 37 USB3 Rear Right pair bottom
page 26 On IO/B +1.05V_M page 15-22
2
48MHz 2
+3.3V_ALW_PCH USB0 : Right side pair top
DOCKING PCMCIA IEEE1394 USB[0,10] R SIDE USB1 : Right side pair bottom
PORT SLOT page 33 USB Ports X2
+5V_ALW page 36
page 38 +3.3V_RUN page 34 On IO/B
+1.05V_RUN_VTT /100MHz
DAI
SD/MMC CardBus PCIE
PCIE3
USB[8,9] CONN R5U242 HD Audio I/F
SATA5 +3.3V_RUN page 33
+3.3V_RUN page 33-34
DOCK LPC BUS
+1.05V_RUN_VTT /100MHz PCI Express BUS S-ATA 0/1/4/5 3GB/s Intel Hanksville
Option SPI 82577LM
PCIE5 PCIE2 PCIE1 +3.3V_LAN
SATA1 SATA0
EXPRESS SATA/PCIE Mini Card2 Mini Card 1 China TPM1.2 SATA Repeater +1.0V_LAN page 30
Card MUX PI2DBS212 WLAN WWAN SSX35BCB W25Q64VSSIG E-Module SN75LVCP412
+3.3V_WLAN
+3.3V_RUN +3.3V_RUN_WWAN_PWR page 32 +3.3V_M page 15 +3.3V_RUN
+1.5V_RUN +1.5V_RUN +5V_MOD page 28 LAN SWITCH
page 35 page 36 page 36 LPC BUS 64M 4K sector page 28
+3V_RUN
INT.Speaker PI3L720
3 Mini Card 3 USH TPM1.2
33MHz Azalia Codec +3.3V_LAN pg 30 3
USB[7] USB[4] USB[5] page 29

PCIE\BKT W25X64VSSIG 92HD81B1
+3.3V_RUN +3.3V_RUN
+1.5V_RUN
TDA8034HN BCM5882 +3.3V_M page 15
page 36 Smartpage
Card32 +5V_RUN
+3.3V_RUN
+2.5V_RUN 32M 4K sector S-HDD +5V_RUN page 29
+3.3V_RUN page 32 +1.2V_RUN page 31,32 +5V_HDD HeadPhone & RJ45
USB[13] +3.3V_HDD
page 28
MIC Jack
SATA Repeater RFID USB[1] SMSC KBC +3.3V_RUN
page 33
SN75LVCP412 USBH WiFi ON/OFF
+3.3V_RUN MEC5045 DOCK LPC BUS
page 35
SMBUS On IO/B
SATA2 +RTC_CELL
+3.3V_ALW page 40 BC BUS SMSC SIO MDC TI
Trough Cable TLV320AIC3004 DOCK
+VCC_GFXCORE BC BUS ECE5028 +3V_SUS +3.3V_RUN page 29
page 34
page 53 page 40 +3.3V_ALW page 39 On IO/B
ECE1077
Biometric Touch Pad Stick +3.3V_ALW Dig. MIC
+3.3V_RUN page 36
0.75V RJ11
page 49
4 Trough LVDS Cable 4
Int.KBD & Trough Cable
VCORE (IMVP-6) 3V/5V PWR SELECT Stick
1.1V DELL CONFIDENTIAL/PROPRIETARY
page 51 page 47 page 54 page 50
Title
CHARGER 1.5V DC IN & BATT IN Power On/Off DC/DC Interface Block Diagram
page 52 page 48 page 46
SW & LED page 42 page 41
Size Document Number Rev
0.1
LA-5573P
A B C D E
5 4 3 2 1
POWER STATES USB PORT# DESTINATION

Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE 0 JUSB1 (Ext Right Side Bottom)
D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 JUSB1 (Ext Right Side Top) D
S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 2 JESA1 (Ext Left Side Top)
S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF 3 JESA1 (Ext Left Side Bottom)
S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 4 WLAN
PCH
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 WWAN
S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bluetooth
S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 USH->BIO
8 DOCKING
C
PM TABLE 9 DOCKING C
+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M

10 Express card
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power 11 Camera
plane +3.3V_RTC_LDO +1.5V_RUN
+0.75V_DDR_VTT
12 NA
+VCC_CORE
+1.05V_RUN_VTT
13 WPAN/NVMHCI
+1.05V_RUN
State
S0 ON ON ON ON
ON PCI EXPRESS DESTINATION
S3 ON ON OFF ON OFF Lane 1 MINI CARD-1 WWAN
S5 S4/AC ON OFF OFF ON OFF
B Lane 2 MINI CARD-2 WLAN B
S5 S4/AC don't exist OFF OFF OFF OFF OFF

Lane 3 Card Bus
Lane 4 EXPRESS CARD
Lane 5 MINI CARD-3 PCIE/BKT
Lane 6 10/100/1G LAN
Lane 7 None
Lane 8 None
A A
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5573P
5 4 3 2 1
5 4 3 2 1
MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q17
TPS51318
(PU3)
ADAPTER
DDR_ON
D SI3456BDV SI3456BDV D
(Q32) (Q29)
+1.5V_MEM
+PWR_SRC DGPI_PWR_EN TPS51728
+GPU_CORE
BATTERY (PU17) +5V_HDD +5V_MOD
TPS51100
RUN_ON
(PU7)
0.75V_DDR_VTT_ON
ALWON
NTMS4107
(Q151)
SN060898
CHARGER +0.75V_DDR_VTT
(PU2)
+1.5V_RUN
C +15V_ALW C
+5V_ALW RUN_ON
+3.3V_ALW
AUX_EN_WOWL
STS11NF30L
(Q55)
AUX_ON
PCH_ALW
SUS_ON
RUN_ON
M_ON
+5V_RUN
ISL8014 MAX17007 TPS51318
ISL62883
(PU6) (PU10) (PU8) SI3456BDV SI3456BDV STS11NF30L SI3456 NTMS4107 SI3456BDV
(PU11)
(Q47) (Q54) (Q60) (Q2) (Q61) (Q66)
H_VTTPWRGD
SIO_SLP_M#
IMVP_VR_ON
RUN_ON
Pop option
B B
+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M
+1.8V_RUN +1.05V_1.1V_RUN_VTT +1.05V_M
REGCTL_PNP10
+VCC_CORE
Pop option
RUN_ON
+3.3V_M
DCP69
STS11NF30L (Q45)
(Q183)
Pop option
+1.05V_M
A A
Pop option
+1.0V_LAN
+1.05V_RUN DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
LA-5573P
5 4 3 2 1
5 4 3 2 1
2.2K
2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202
C8 MEM_SMBDATA 200 DIMMA SMBUS Address [TBD]
2.2K
202
PCH
+3.3V_ALW_PCH 200 DIMMB
D
2.2K SMBUS Address [TBD] D
C6 LAN_SMBCLK 28
G8 LAN_SMBDATA 31 LOM SMBUS Address [C8]

G12 E10 53
XDP1 SMBUS Address [TBD]
51
SML1_SMBDATA 2.2K
+3.3V_ALW_PCH 2.2K
SML1_SMBCLK 2.2K
53
XDP2 2.2K
A5 B6 2.2K +3.3V_ALW 51 SMBUS Address [TBD]
3A 3A B4 127 2.2K
+3.3V_RUN
1A DOCK_SMB_CLK
129 DOCKING 2N7002
A3 DOCK_SMB_DAT 14
1A G Sensor
2.2K SMBUS Address [TBD] 2N7002 13 SMBUS Address [TBD]
2.2K +3.3V_ALW
B5 LCD_SMBCLK 21
1B LCD
C A4 20 C
LCD_SMDATA SMBUS Address [TBD]
1B (JeDP1)
2.2K
+3.3V_ALW
2.2K
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [TBD]
1C B59 PBAT_SMBDAT 100 ohm
KBC 2.2K
CONN
+3.3V_ALW 2.2K
2.2K
+3.3V_SUS
1E A50 USH_SMBCLK 27 2.2K
1E B53 USH_SMBDAT 29 USH SMBUS Address [TBD] EXP_SMBCLK 10
EXP_SMBDATA 11 Express card SMBUS Address [TBD]
2.2K
+3.3V_ALW
B
2.2K B
2B A49 CARD_SMBCLK
2B B52 CARD_SMBDAT
MEC 5035 2.2K

+3.3V_ALW
2.2K
B50 CHARGER_SMBCLK 10
1G
A47 CHARGER_SMBDAT 9 Charger
1G SMBUS Address [TBD]
2.2K
+3.3V_RUN 0 ohm 0 ohm
2.2K
B7 CKG_SMBDAT 32
2D
31 CLK GEN SMBUS Address [TBD]
A7 CKG_SMBCLK
2D
2.2K 2.2K
+3.3V_ALW +3.3V_RUN
A 2.2K 2.2K A
B49 DAI_SMBCLK_Q
2A 2N7002 8
B48
DAI_SMBDAT_Q 9
A/D,D/A SMBUS Address [TBD]
2A 2N7002 converter

Title
DAI_GPU_R3P_SMBCLK 18
2N7002 SMBUS TOPOLOGY
DAI_GPU_R3P_SMBDAT 19 R3P SMBUS Address [TBD] Size Document Number Rev
2N7002 0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V +3.3V_RUN
+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO

H_STP_CPU# 1 2
D L89 D
R92 10K_0402_5%~D
1 2 +1.05V_RUN 1 2
BLM18AG601SN1D_0603~D L2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1 1 1 1 1 1 BLM18AG601SN1D_0603~D CLKREF
1 1 1
C2
C3
C4
C5
C6
C7
1
C8
C10
C9
2 2 2 2 2 2 @C1707
@ C1707
2 2 2 10P_0402_50V8J~D
2
EMI
+CK_VDD_MAIN
+CLK_VDD_IO
U1
1 VDD_DOT CPU_0 23
5 VDD_27
CPU_0# 22
C C
15 VDDSRC_IO
18 VDDCPU_IO
20 BUF_BCLK 1 2 CLK_BUF_BCLK
CPU_1 CLK_BUF_BCLK 16
17 R11 0_0402_5%~D
VDDSRC_3.3 BUF_BCLK# CLK_BUF_BCLK#
24 VDDCPU_3.3 CPU_1# 19 1 2 CLK_BUF_BCLK# 16
29 R13 0_0402_5%~D
VDDREF_3.3
10 BUF_CKSSCD 1 2 CLK_BUF_CKSSCD CLK_BUF_CKSSCD 16
SRC_1/SATA R1181 0_0402_5%~D
11 BUF_CKSSCD# 1 2 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD# 16
SRC_1/SATA# R1180 0_0402_5%~D
CKG_FFS_SMBDAT 31 13 BUF_EXP 1 2 CLK_BUF_EXP CLK_BUF_EXP 16

40 CKG_FFS_SMBDAT SDA SRC_2 R49 0_0402_5%~D
CKG_FFS_SMBCLK 32 14 BUF_EXP# 1 2 CLK_BUF_EXP# CLK_BUF_EXP# 16
40 CKG_FFS_SMBCLK SCL SRC_2# R52 0_0402_5%~D
3 DOT96 1 2 CLK_BUF_DOT96
DOT_96 CLK_BUF_DOT96 16
H_STP_CPU# 16 R37 0_0402_5%~D
CPU_STOP# DOT96# CLK_BUF_DOT96#
4 1 2 CLK_BUF_DOT96# 16
DOT_96# R38 0_0402_5%~D
+3.3V_RUN
CLK_PWRGD 25
X1 CKPWRGD/PD# CLK_NV CLK_NV_27M
6 1 2 CLK_NV_27M 53
27MHz
1
2 1 14.318MHZ_16PF_7A14300083~D @ R43 33_0402_5%~D
C16 7 CLK_NVSS 1 2 CLK_NVSS_27M R132
27MHz_SS CLK_NVSS_27M 53
1
27P_0402_50V8J~D @ R39 33_0402_5%~D 1K_0402_5%~D
C17 CLK_XTAL_IN 28
2
27P_0402_50V8J~D XTAL_IN R369
2
2 1 R17 1 2 0_0402_5%~D CLK_XTAL_OUT 27 100_0402_5%~D

XTAL_OUT CLK_PWRGD
1 2
B B
2
VSS_DOT
8
VSS_27
1
D
9
CLK_PCH_14M R33 CLKREF VSS_SATA Q136
16 CLK_PCH_14M 1 2 30 12 50 CLK_EN# 2
33_0402_5%~D REF_0/CPU_SEL VSS_SRC G SSM3K7002FU_SC70-3~D
21
VSS_CPU
26 S
3
VSS_REF
33
EP
SLG8SP585VTR_QFN32_5X5~D
+3.3V_RUN
+1.05V_RUN
1
1
@ U23
@ R41 @ C1392 NC7SZ04P5X_NL_SC70-5~D
4.7K_0402_5%~D 0.1U_0402_16V4Z~D
1
2 @ R372
REF_O/CPU_SEL 0_0402_5%~D
NC
2
2 4 1 2
CLKREF A Y
PIN 30 CPU0 CPU1
G
1(0.7~1.5v) 100MHz 100MHz
3
1
R23 0 (DEFULT) 133MHz 133MHz

10K_0402_5%~D
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Clock Generator
LA-5573P
5 4 3 2 1
5 4 3 2 1
JCPUI
JCPUA K27
PEG_IRCOMP_R R1084 VSS161
PEG_ICOMPI B26 1 2 49.9_0402_1%~D K9 VSS162
PEG_ICOMPO A26 K6 VSS163
DMI_CRX_PTX_N0 A24 B27 K3
17 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_RX#[0] PEG_RCOMPO EXP_RBIAS VSS164
C23 A25 R1129 1 2 750_0402_1%~D J32
17 DMI_CRX_PTX_N1 DMI_RX#[1] PEG_RBIAS VSS165
DMI_CRX_PTX_N2 B22 J30
D 17 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_RX#[2] PEG_CRX_GTX_N0 PEG_CRX_GTX_N[0..15] 53 VSS166 D
17 DMI_CRX_PTX_N3 A21 K35 J21
DMI_RX#[3] PEG_RX#[0] PEG_CRX_GTX_N1 VSS167
J34 J19
DMI_CRX_PTX_P0 PEG_RX#[1] PEG_CRX_GTX_N2 VSS168
17 DMI_CRX_PTX_P0 B24 J33 H35
DMI_CRX_PTX_P1 DMI_RX[0] PEG_RX#[2] PEG_CRX_GTX_N3 VSS169
17 DMI_CRX_PTX_P1 D23 G35 H32
DMI_RX[1] PEG_RX#[3] VSS170
DMI
DMI_CRX_PTX_P2 B23 G32 PEG_CRX_GTX_N4 H28
17 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_RX[2] PEG_RX#[4] PEG_CRX_GTX_N5 VSS171
17 DMI_CRX_PTX_P3 A22 F34 H26
DMI_RX[3] PEG_RX#[5] PEG_CRX_GTX_N6 VSS172
F31 H24
DMI_CTX_PRX_N0 PEG_RX#[6] PEG_CRX_GTX_N7 VSS173
17 DMI_CTX_PRX_N0 D24 D35 H22
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] PEG_CRX_GTX_N8 VSS174
17 DMI_CTX_PRX_N1 G24 E33 H18
17 DMI_CTX_PRX_N2 F23 C33 H15
17 DMI_CTX_PRX_N3 H23 D32 H13
DMI_TX#[3] PEG_RX#[10] PEG_CRX_GTX_N11 VSS177
PEG_RX#[11] B32 H11 VSS178
17 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 D25 C31 PEG_CRX_GTX_N12 H8
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] PEG_CRX_GTX_N13 VSS179
17 DMI_CTX_PRX_P1 F24 DMI_TX[1] PEG_RX#[13] B28 H5 VSS180
17 DMI_CTX_PRX_P2 DMI_CTX_PRX_P2 E23 B30 PEG_CRX_GTX_N14 H2
DMI_CTX_PRX_P3 DMI_TX[2] PEG_RX#[14] PEG_CRX_GTX_N15 VSS181
17 DMI_CTX_PRX_P3 G23 DMI_TX[3] PEG_RX#[15] A31 PEG_CRX_GTX_P[0..15] 53 G34 VSS182
G31 VSS183
J35 PEG_CRX_GTX_P0 G20
PEG_RX[0] PEG_CRX_GTX_P1 VSS184
PEG_RX[1] H34 G9 VSS185
H33 PEG_CRX_GTX_P2 G6
PEG_RX[2] PEG_CRX_GTX_P3 VSS186
E22 FDI_TX#[0] PEG_RX[3] F35 G3 VSS187
D21 G33 PEG_CRX_GTX_P4 F30
FDI_TX#[1] PEG_RX[4] PEG_CRX_GTX_P5 VSS188
D19 FDI_TX#[2] PEG_RX[5] E34 F27 VSS189
D18 F32 PEG_CRX_GTX_P6 F25
G21 FDI_TX#[4] PEG_RX[7] D34 F22 VSS191
E19 F33 PEG_CRX_GTX_P8 F19
F21 FDI_TX#[6]
PCI EXPRESS -- GRAPHICS PEG_RX[9] B33 F16 VSS193
Intel(R) FDI
G18 D31 PEG_CRX_GTX_P10 E35
A32 E32
D22 FDI_TX[0]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
C30
A28
PEG_CRX_GTX_P12
PEG_CRX_GTX_P13
E29
E24
VSS195
VSS196
VSS197
VSS
C21 B29 PEG_CRX_GTX_P14 E21
C FDI_TX[1] PEG_RX[14] PEG_CRX_GTX_P15 VSS198 C
D20 FDI_TX[2] PEG_RX[15] A30 E18 VSS199
C18 FDI_TX[3] E13 VSS200
G22 L33 PEG_CTX_GRX_C_N0 PEG_CTX_GRX_P[0..15] E11
FDI_TX[4] PEG_TX#[0] PEG_CTX_GRX_C_N1 PEG_CTX_GRX_P[0..15] 53 VSS201
E20 FDI_TX[5] PEG_TX#[1] M35 E8 VSS202
F20 M33 PEG_CTX_GRX_C_N2 PEG_CTX_GRX_N[0..15] E5
FDI_TX[6] PEG_TX#[2] PEG_CTX_GRX_C_N3 PEG_CTX_GRX_N[0..15] 53 VSS203
G19 FDI_TX[7] PEG_TX#[3] M30 E2 VSS204 VSS_NCTF1 AT35
L31 PEG_CTX_GRX_C_N4 D33 AT1
FDI_GND PEG_TX#[4] PEG_CTX_GRX_C_N5 VSS205 VSS_NCTF2
F17 K32 D30 AR34
FDI_FSYNC[0] PEG_TX#[5] PEG_CTX_GRX_C_N6 PEG_CTX_GRX_C_P0 C1666 2 PEG_CTX_GRX_P0 VSS206 VSS_NCTF3
E17 M29 1 0.1U_0402_10V7K~D D26 B34
FDI_FSYNC[1] PEG_TX#[6] PEG_CTX_GRX_C_N7 PEG_CTX_GRX_C_N0 C1667 2 PEG_CTX_GRX_N0 VSS207 VSS_NCTF4
J31 1 0.1U_0402_10V7K~D D9 B2
NCTF
PEG_TX#[7] PEG_CTX_GRX_C_N8 VSS208 VSS_NCTF5
C17 K29 D6 B1
FDI_INT PEG_TX#[8] PEG_CTX_GRX_C_N9 PEG_CTX_GRX_C_P1 C1668 2 PEG_CTX_GRX_P1 VSS209 VSS_NCTF6
PEG_TX#[9]
H30 1 0.1U_0402_10V7K~D D3
VSS210 VSS_NCTF7
A35
F18 H29 PEG_CTX_GRX_C_N10 PEG_CTX_GRX_C_N1 C1669 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N1 C34
FDI_LSYNC[0] PEG_TX#[10] PEG_CTX_GRX_C_N11 VSS211
D17 F29 C32
FDI_LSYNC[1] PEG_TX#[11] PEG_CTX_GRX_C_N12 PEG_CTX_GRX_C_P2 C1670 2 PEG_CTX_GRX_P2 VSS212
PEG_TX#[12]
E28 1 0.1U_0402_10V7K~D C29
VSS213
1K_0402_5%~D
D29 PEG_CTX_GRX_C_N13 PEG_CTX_GRX_C_N2 C1671 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N2 C28

PEG_TX#[13] VSS214
2
D27 PEG_CTX_GRX_C_N14 C24

PEG_TX#[14] VSS215
R1147
C26 PEG_CTX_GRX_C_N15 PEG_CTX_GRX_C_P3 C1672 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_P3 C22

PEG_TX#[15] PEG_CTX_GRX_C_N3 C1673 2 PEG_CTX_GRX_N3 VSS216
1 0.1U_0402_10V7K~D C20
VSS217
L34 PEG_CTX_GRX_C_P0 C19
PEG_TX[0] PEG_CTX_GRX_C_P1 PEG_CTX_GRX_C_P4 C1674 2 PEG_CTX_GRX_P4 VSS218
M34 1 0.1U_0402_10V7K~D C16
1
PEG_TX[1] PEG_CTX_GRX_C_P2 PEG_CTX_GRX_C_N4 C1675 2 PEG_CTX_GRX_N4 VSS219

PEG_TX[2]
M32 1 0.1U_0402_10V7K~D B31
VSS220
L30 PEG_CTX_GRX_C_P3 B25
PEG_TX[4]
M31 1 0.1U_0402_10V7K~D B21
VSS222
K31 PEG_CTX_GRX_C_P5 PEG_CTX_GRX_C_N5 C1677 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N5 B18
PEG_TX[5] PEG_CTX_GRX_C_P6 VSS223
M28 B17
H31 1 0.1U_0402_10V7K~D B13
PEG_TX[7] PEG_CTX_GRX_C_P8 PEG_CTX_GRX_C_N6 C1679 2 PEG_CTX_GRX_N6 VSS225
PEG_TX[8]
K28 1 0.1U_0402_10V7K~D B11
VSS226
G30 PEG_CTX_GRX_C_P9 B8
PEG_TX[10]
G29 1 0.1U_0402_10V7K~D B6
VSS228
F28 PEG_CTX_GRX_C_P11 PEG_CTX_GRX_C_N7 C1681 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N7 B4
E27 A29
B PEG_TX[12] PEG_CTX_GRX_C_P13 PEG_CTX_GRX_C_P8 C1682 1 PEG_CTX_GRX_P8 VSS230 B
PEG_TX[13]
D28 2 0.1U_0402_10V7K~D A27
VSS231
C27 PEG_CTX_GRX_C_P14 PEG_CTX_GRX_C_N8 C1683 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_N8 A23
C25 A9
PEG_TX[15] PEG_CTX_GRX_C_P9 C1684 1 PEG_CTX_GRX_P9 VSS233
2 0.1U_0402_10V7K~D
PEG_CTX_GRX_C_N9 C1685 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_N9
REV1.0
TYCO_CALPELLA_AUBURNDALE PEG_CTX_GRX_C_P10 C1686 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P10
PEG_CTX_GRX_C_P11 C1688 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P11

REV1.0
PEG_CTX_GRX_C_P12 C1690 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P12 TYCO_CALPELLA_AUBURNDALE



A A
Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Auburndale (1/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
5 4 3 2 1
5 4 3 2 1
1.5V_PWRGD 42 +1.05V_1.1V_RUN_VTT
+3.3V_ALW2 +3.3V_ALW2
+3.3V_ALW
1
+1.05V_1.1V_RUN_VTT +1.05V_1.1V_RUN_VTT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
R1481 1 1
C1879
1
10K_0402_5%~D @ @
C19
C20
R1482 1 2 +1.05V_1.1V_RUN_VTT @ JXDP1
100K_0402_5%~D 1 2
2
2 2 XDP_PREQ# GND0 GND1 CFG8
3 OBSFN_A0 OBSFN_C0 4 CFG8 10
+1.5V_CPU_VDDQ 1.5V_PWRGD 0.1U_0402_16V4Z~D XDP_PRDY# CFG9
5 6 CFG9 10
2
OBSFN_A1 OBSFN_C1
1
7 GND2 GND3 8
U141 R25 XDP_OBS0 9 10 CFG0 CFG0 10
1 OBSDATA_A0 OBSDATA_C0
5
D 74AHC1G08GW_SOT353-5~D 10K_0402_5%~D XDP_OBS1 CFG1
11 12 CFG1 10
R1483 1.5V_CPU_VDDQ_PWRGD# 2 Q207 OBSDATA_A1 OBSDATA_C1
1 Place near JXDP1 13 14
P
D 1K_0402_5%~D G BSS138_SOT23~D IN1 XDP_OBS2 GND4 GND5 CFG2 D
4 15 16 CFG2 10
2
O XDP_OBS3 OBSDATA_A2 OBSDATA_C2 CFG3
S 2 17 18 CFG3 10
3
IN2 OBSDATA_A3 OBSDATA_C3
G
19 20
2
R1487 PM_EXTTS# 23 GND6 GND7
1
C 21 22 CFG10 CFG10 10
3
1.5V_CPU_VDDQ_PWRGD 1.5V_CPU_VDDQ_PWRGD_R Q205 R879 OBSFN_B0 OBSFN_D0 CFG11
1 2 2 23 24 CFG11 10
OBSFN_B1 OBSFN_D1
1
B PMST3904_SOT323-3~D 1.5K_0402_1%~D 25 26
E +1.5V_CPU_VDDQ @ R1145 XDP_OBS4 GND8 GND9 CFG4
2 1.8K_0402_5%~D 27 28 CFG4 10
3
12.4K_0402_1%~D XDP_OBS5 OBSDATA_B0 OBSDATA_D0 CFG5
29 30 CFG5 10
2
C1877 OBSDATA_B1 OBSDATA_D1
31 32
0.22U_0402_6.3V6K~D PM_DRAM_PWRGD_R XDP_OBS6 GND10 GND11 CFG6
1 2 33 34 CFG6 10
2
1 @ R1511 @ R6 XDP_OBS7 OBSDATA_B2 OBSDATA_D2 CFG7
35 36 CFG7 10
1.1K_0402_1%~D 1K_0402_5%~D OBSDATA_B3 OBSDATA_D3
37 GND12 GND13 38
1
H_CPUPWRGD
1 2 H_CPUPWRGD_XDP 39 40 CLK_CPU_ITP
R880 CFD_PWRBTN#_XDP PWRGOOD/HOOK0 ITPCLK/HOOK4 CLK_CPU_ITP#
15,17 SIO_PWRBTN#_R 1 2 41 42
750_0402_1%~D @ R68 0_0402_5%~D HOOK1 ITPCLK#/HOOK5
43 VCC_OBS_AB VCC_OBS_CD 44
H_PWRGD_XDP 1 2 PWRGD_XDP_R 45 46 XDP_RST#_R 2 1 H_CPURST#
@ R19 0_0402_5%~D HOOK2 RESET#/HOOK6 XDP_DBRESET# @ R7
@R7
47 48
2
HOOK3 DBR#/HOOK7 1K_0402_5%~D
49 GND14 GND15 50
+1.05V_1.1V_RUN_VTT 51 52 XDP_TDO
15 DDR_XDP_SMBDAT_R SDA TD0 XDP_TRST#
15 DDR_XDP_SMBCLK_R 53 SCL TRST# 54
XDP_TDI
1 2 H_THERMTRIP#
Refer to Intel S3 circuit XDP_TCLK
55
57
TCK1 TDI 56
58 XDP_TMS
R1285 56_0402_5%~D TCK0 TMS
59 GND16 GND17 60
1 2 H_CATERR# Keep R1132, R1133, R1136, R1137
R1232 49.9_0402_1%~D SAMTE_BSH-030-01-L-D-A
1 2 H_PROCHOT# JCPUB for slew rate control.
R1233 68_0402_1%~D H_COMP3 AT23
H_CPURST#_R COMP3 CPU_BCLK R1132 1
1 2 BCLK A16 2 0_0402_5%~D CLK_CPU_BCLK 19
MISC
@ R1234 68_0402_1%~D H_COMP2 AT24 B16 CPU_BCLK# 1 2
COMP2 BCLK# CLK_CPU_BCLK# 19
R1133 0_0402_5%~D
H_COMP1 CLK_CPU_ITP
CLOCKS
G16 COMP1 BCLK_ITP AR30
AT30 CLK_CPU_ITP#
C H_COMP0 BCLK_ITP# C
AT26 COMP0
E16 CPU_EXP R1136 1 2 0_0402_5%~D
PEG_CLK CLK_CPU_EXP 16
D16 CPU_EXP# 1 2 +3.3V_RUN
CPU_DETECT# PEG_CLK# CLK_CPU_EXP# 16
40 CPU_DETECT# AH24 R1137 0_0402_5%~D
SKTOCC#
DPLL_REF_SSCLK A18 1 2
A17 @ R1469 0_0402_5%~D XDP_DBRESET# 2 1
H_CATERR# DPLL_REF_SSCLK# Q199 R60
39 H_CATERR# AK14 CATERR#
THERMAL
BSS138_SOT23~D 1K_0402_5%~D
D
F6 DDR3_DRAMRST#_CPU 3 1
H_PECI SM_DRAMRST# DDR3_DRAMRST# 13,14
19 H_PECI AT15
PECI For production stuffing,
2
AL1 SM_RCOMP0
SM_RCOMP[0] SM_RCOMP1 R1504 Intel recommend stuffing R67
G
AM1
2
SM_RCOMP[1] SM_RCOMP2 100K_0402_5%~D +1.05V_1.1V_RUN_VTT
AN1
H_PROCHOT# SM_RCOMP[2] XDP_TCLK
50 H_PROCHOT# AN26 2 1
PROCHOT# PM_EXTTS# @ R67 51_0402_1%~D XDP_TMS
AN15 2 1
1
PM_EXT_TS#[0] DDR_HVREF_RST_GATE 13,14,40
AP15 @ R64 51_0402_1%~D
DDR3
MISC
PM_EXT_TS#[1] XDP_TDI_R
1 2 1
23 H_THERMTRIP# 1 2 H_THERMTRIP#_R AK15 @ R65 51_0402_1%~D
R1286 THERMTRIP# C1888 XDP_PREQ# 2 1
0_0402_5%~D 0.1U_0402_16V4Z~D @ R1149 51_0402_5%~D
XDP_PRDY# 2 XDP_TDO
place R1286 near CPU PRDY#
AT28
AP27 XDP_PREQ# @
2
R3
1
51_0402_1%~D
PREQ#
AN28 XDP_TCLK
H_CPURST# TCK
1 2 H_CPURST#_R AP26
RESET_OBS# TMS
AP28 XDP_TMS
PWR MANAGEMENT
R1088 0_0402_5%~D AT27 XDP_TRST#

TRST#
JTAG & BPM
17 H_PM_SYNC H_PM_SYNC AL15 AT29 XDP_TDI_R

PM_SYNC TDI XDP_TDO_R
39,50 IMVP_PWRGD 1 2 AR27
@R12
@ R12 0_0402_5%~D TDO XDP_TDI_M
AR29
TDI_M
1 2 VCCPWRGOOD_1_R AN14 AP29 XDP_TDO_M
B R1290 0_0402_5%~D VCCPWRGOOD_1 TDO_M B
AN25 XDP_DBRESET#_R 2 1 XDP_DBRESET# 15,17
DBR#
19 H_CPUPWRGD 1 2 VCCPWRGOOD_0_R AN27
VCCPWRGOOD_0
@ R1241
R1087 0_0402_5%~D 0_0402_5%~D
XDP_OBS0_R XDP_OBS0
1 2 PM_DRAM_PWRGD_R AK13
BPM#[0]
AJ22
AK22 XDP_OBS1_R @ R780 1
1 2
2 0_0402_5%~D XDP_OBS1 @ R1153
JTAG MAPPING
17 PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
R878 0_0402_5%~D AK24 XDP_OBS2_R @ R781 1 2 0_0402_5%~D XDP_OBS2 0_0402_5%~D
BPM#[2] XDP_OBS3_R @ R782 1 0_0402_5%~D XDP_OBS3 XDP_TDI_R XDP_TDI XDP_TRST#
AJ24 2 1 2 2 1
H_VTTPWRGD BPM#[3] XDP_OBS4_R @ R783 1 0_0402_5%~D XDP_OBS4 @ R66
49 H_VTTPWRGD AM15 AJ25 2
VTTPWRGOOD BPM#[4] XDP_OBS5_R @ R784 1 0_0402_5%~D XDP_OBS5 @ R1154 51_0402_1%~D
AH22 2
BPM#[5] XDP_OBS6_R @ R785 1 0_0402_5%~D XDP_OBS6 0_0402_5%~D
AK23 2
H_PWRGD_XDP BPM#[6] XDP_OBS7_R @ R22 1 0_0402_5%~D XDP_OBS7 XDP_TDO_M XDP_TDO
AM26 AH23 2 1 2
TAPPWRGOOD BPM#[7] @ R24 0_0402_5%~D
1 2 PCH_PLTRST#_R AL14
For ESD concern, please put near CPU
18,32,34,36,39,40 PCH_PLTRST#_EC RSTIN#
1
R1144
1.5K_0402_1%~D @ R1157 Scan Chain Stuff -> R1153,R1156,R1157
REV1.0
2
0_0402_5%~D
Refer to CRB 1.51 R1143 TYCO_CALPELLA_AUBURNDALE (Default) No stuff -> R1154,R1155
750_0402_1%~D
2
@ R1155
0_0402_5%~D CPU Only Stuff -> R1153,R1154
1
XDP_TDI_M 1 2
No stuff -> R1154,R1155,R1157
@R1156
@ R1156
0_0402_5%~D
XDP_TDO_R 1 2 PCH Only Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157
H_COMP0 SM_RCOMP2
A H_COMP1 SM_RCOMP1 A
H_COMP2 SM_RCOMP0
H_COMP3
100_0402_1%~D
130_0402_1%~D
24.9_0402_1%~D
1
1
20_0402_1%~D
20_0402_1%~D
49.9_0402_1%~D
49.9_0402_1%~D
1
R1140
R1141
R1142
R1235
R1093
R1094
R1095

2
Title
2
Auburndale (2/6)
0.1
5 4 3 2 1
5 4 3 2 1
JCPUC JCPUD
AA6 M_CLK_DDR0 W8 M_CLK_DDR2

D SA_CK[0] M_CLK_DDR#0 M_CLK_DDR0 13 14 DDR_B_D[0..63] SB_CK[0] M_CLK_DDR#2 M_CLK_DDR2 14 D
13 DDR_A_D[0..63] AA7 M_CLK_DDR#0 13 W9 M_CLK_DDR#2 14
SA_CK#[0] DDR_CKE0_DIMMA DDR_B_D0 SB_CK#[0] DDR_CKE2_DIMMB
P7 DDR_CKE0_DIMMA 13 B5 M3 DDR_CKE2_DIMMB 14
DDR_A_D0 SA_CKE[0] DDR_B_D1 SB_DQ[0] SB_CKE[0]
A10 A5
DDR_A_D1 SA_DQ[0] DDR_B_D2 SB_DQ[1]
C10 C3
DDR_A_D2 SA_DQ[1] DDR_B_D3 SB_DQ[2] M_CLK_DDR3
C7 B3 V7 M_CLK_DDR3 14
DDR_A_D3 SA_DQ[2] M_CLK_DDR1 DDR_B_D4 SB_DQ[3] SB_CK[1] M_CLK_DDR#3
A7 Y6 M_CLK_DDR1 13 E4 V6 M_CLK_DDR#3 14
DDR_A_D4 SA_DQ[3] SA_CK[1] M_CLK_DDR#1 DDR_B_D5 SB_DQ[4] SB_CK#[1] DDR_CKE3_DIMMB
B10 Y5 M_CLK_DDR#1 13 A6 M2 DDR_CKE3_DIMMB 14
DDR_A_D5 SA_DQ[4] SA_CK#[1] DDR_CKE1_DIMMA DDR_B_D6 SB_DQ[5] SB_CKE[1]
D10 P6 DDR_CKE1_DIMMA 13 A4
DDR_A_D6 SA_DQ[5] SA_CKE[1] DDR_B_D7 SB_DQ[6]
E10 C4
A8 D1
D8 D2
DDR_A_D9 SA_DQ[8] DDR_CS0_DIMMA# DDR_B_D10 SB_DQ[9] DDR_CS2_DIMMB#
F10 SA_DQ[9] SA_CS#[0] AE2 DDR_CS0_DIMMA# 13 F2 SB_DQ[10] SB_CS#[0] AB8 DDR_CS2_DIMMB# 14
DDR_A_D10 E6 AE8 DDR_CS1_DIMMA# DDR_B_D11 F1 AD6 DDR_CS3_DIMMB#
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# 13 SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# 14
DDR_A_D11 F7 DDR_B_D12 C2
E9 SA_DQ[12] F5 SB_DQ[13]
DDR_A_D13 B7 DDR_B_D14 F3
DDR_A_D14 SA_DQ[13] M_ODT0 DDR_B_D15 SB_DQ[14] M_ODT2
E7 SA_DQ[14] SA_ODT[0] AD8 M_ODT0 13 G4 SB_DQ[15] SB_ODT[0] AC7 M_ODT2 14
DDR_A_D15 C6 AF9 M_ODT1 DDR_B_D16 H6 AD1 M_ODT3
SA_DQ[15] SA_ODT[1] M_ODT1 13 SB_DQ[16] SB_ODT[1] M_ODT3 14
DDR_A_D16 H10 DDR_B_D17 G2
G8 SA_DQ[17] J6 SB_DQ[18]
DDR_A_D18 K7 DDR_B_D19 J3
DDR_A_D19 SA_DQ[18] DDR_B_D20 SB_DQ[19] DDR_B_DM[0..7] 14
J8 SA_DQ[19] G1 SB_DQ[20]
DDR_A_D20 G7 DDR_B_D21 G5 D4 DDR_B_DM0
DDR_A_D21 SA_DQ[20] DDR_A_DM[0..7] 13 DDR_B_D22 SB_DQ[21] SB_DM[0] DDR_B_DM1
G10 SA_DQ[21] J2 SB_DQ[22] SB_DM[1] E1
DDR_A_D22 J7 B9 DDR_A_DM0 DDR_B_D23 J1 H3 DDR_B_DM2
DDR_A_D23 SA_DQ[22] SA_DM[0] DDR_A_DM1 DDR_B_D24 SB_DQ[23] SB_DM[2] DDR_B_DM3
J10 SA_DQ[23] SA_DM[1] D7 J5 SB_DQ[24] SB_DM[3] K1
DDR_A_D24 L7 H7 DDR_A_DM2 DDR_B_D25 K2 AH1 DDR_B_DM4
M6 SA_DQ[25] SA_DM[3] M7 L3 SB_DQ[26] SB_DM[5] AL2
DDR_A_D26 M8 AG6 DDR_A_DM4 DDR_B_D27 M1 AR4 DDR_B_DM6
L9 SA_DQ[27] SA_DM[5] AM7 K5 SB_DQ[28] SB_DM[7] AT8
DDR_A_D28 L6 AN10 DDR_A_DM6 DDR_B_D29 K4
DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 DDR_B_D30 SB_DQ[29]
K8 SA_DQ[29] SA_DM[7] AN13 M4 SB_DQ[30]
C DDR_A_D30 DDR_B_D31 C
N8 SA_DQ[30] N5 SB_DQ[31]
DDR_A_D31 P9 DDR_B_D32 AF3
AH5 SA_DQ[32] AG1 SB_DQ[33] DDR_B_DQS#[0..7] 14
DDR_A_D33 AF5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D34 SA_DQ[33] DDR_A_DQS#0 DDR_A_DQS#[0..7] 13 DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AK6 SA_DQ[34] SA_DQS#[0] C9 AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D35 DDR_A_DQS#1 DDR_B_D36 DDR_B_DQS#2
DDR SYSTEM MEMORY A
AK7 SA_DQ[35] SA_DQS#[1] F8 AG4 SB_DQ[36] SB_DQS#[2] J4

DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D37 AG3 L4 DDR_B_DQS#3
DDR_A_D37 SA_DQ[36] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[3] DDR_B_DQS#4
AG5 N9 AJ4 AH2
AJ7 AH7 AH4 AL4
DDR SYSTEM MEMORY - B

AJ6 AK9 AK3 AR5
AJ10 AP11 AK4 AR8
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ9 AT13 AM6
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D43 SB_DQ[42]
AL10 AN2
AK12 AK5
AK8 AK2
AL7 DDR_A_DQS[0..7] 13 AM4
DDR_A_D46 SA_DQ[45] DDR_A_DQS0 DDR_B_D47 SB_DQ[46]
AK11 C8 AM3 DDR_B_DQS[0..7] 14
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AL8 F9 AP3 C5
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AN8 H9 AN5 E3
AM10 M9 AT4 H4
AR11 AH8 AN6 M5
AL11 AK10 AN4 AG2
AM9 AN11 AN3 AL5
AN9 AR13 AT5 AP5
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[6] DDR_B_DQS7
AT11 AT6 AR7
DDR_A_D55 SA_DQ[54] DDR_B_D56 SB_DQ[55] SB_DQS[7]
AP12 AN7
AM12 DDR_A_MA[0..15] 13 AP6
AN12 AP8
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AM13 Y3 AT9
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D60 SB_DQ[59]
AT14 W1 AT7
AT12 AA8 AP9 DDR_B_MA[0..15] 14
AL13 AA3 AR10
B DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AR14 V1 AT10 U5
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_DQ[63] SB_MA[0] DDR_B_MA1
AP14 AA9 V2
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[1] DDR_B_MA2
V8 T5
SA_MA[6] DDR_A_MA7 SB_MA[2] DDR_B_MA3
T1 V3
Y9 R1
DDR_A_BS0 SA_MA[8] DDR_A_MA9 DDR_B_BS0 SB_MA[4] DDR_B_MA5
13 DDR_A_BS0 AC3 U6 14 DDR_B_BS0 AB1 T8
DDR_A_BS1 SA_BS[0] SA_MA[9] DDR_A_MA10 DDR_B_BS1 SB_BS[0] SB_MA[5] DDR_B_MA6
13 DDR_A_BS1 AB2 AD4 14 DDR_B_BS1 W5 R2
DDR_A_BS2 SA_BS[1] SA_MA[10] DDR_A_MA11 DDR_B_BS2 SB_BS[1] SB_MA[6] DDR_B_MA7
13 DDR_A_BS2 U7 T2 14 DDR_B_BS2 R7 R6
SA_BS[2] SA_MA[11] DDR_A_MA12 SB_BS[2] SB_MA[7] DDR_B_MA8
U3 R4
AG8 R5
SA_MA[13] DDR_A_MA14 DDR_B_CAS# SB_MA[9] DDR_B_MA10
T3 14 DDR_B_CAS# AC5 AB5
DDR_A_CAS# SA_MA[14] DDR_A_MA15 DDR_B_RAS# SB_CAS# SB_MA[10] DDR_B_MA11
13 DDR_A_CAS# AE1 V9 14 DDR_B_RAS# Y7 P3
DDR_A_RAS# SA_CAS# SA_MA[15] DDR_B_WE# SB_RAS# SB_MA[11] DDR_B_MA12
13 DDR_A_RAS# AB3 14 DDR_B_WE# AC6 R3
DDR_A_WE# SA_RAS# SB_WE# SB_MA[12] DDR_B_MA13
13 DDR_A_WE# AE9 AF7
SA_WE# SB_MA[13] DDR_B_MA14
P5
SB_MA[14] DDR_B_MA15
N1
SB_MA[15]
REV1.0
TYCO_CALPELLA_AUBURNDALE
REV1.0
A A
Title
Auburndale (3/6)
0.1
5 4 3 2 1
5 4 3 2 1
JCPUE
AJ13 PAD~D T31 @

RSVD32 PAD~D T32 @
AJ12
RSVD33
Populate R84,R86 for Intel DDR3 AP25
RSVD1
VREFDQ multiple methods M3 AL25 AH25
RSVD2 RSVD34 PAD~D T40 @
AL24 AK26
RSVD3 RSVD35
AL22
RSVD4 PAD~D T26 @
AJ33 AL26
RSVD5 RSVD36
AG9 AR2
R84 RSVD6 RSVD_NCTF_37 CFG0
M27
0_0402_5%~D RSVD7
L28 AJ26
RSVD8 RSVD38
1
D DIMM0_VREF 1 2 DIMM0_VREF_R J17 AJ27 D
13 DIMM0_VREF SA_DIMM_VREF RSVD39
DIMM1_VREF 1 2 DIMM1_VREF_R H17 R1107
14 DIMM1_VREF SB_DIMM_VREF
R86 G25 3.01K_0402_1%~D
0_0402_5%~D RSVD11
G17 @
RSVD12
E31 AP1
2
RSVD13 RSVD_NCTF_40 PAD~D T41 @
E30 AT2
RSVD14 RSVD_NCTF_41
AT3
RSVD_NCTF_42
AR1
RSVD_NCTF_43
RSVD45 AL28
CFG0 AM30 AL29 PCI-Express Configuration Select
8 CFG0 CFG[0] RSVD46
CFG1 AM28 AP30
CFG2 AP31 AP32
CFG3 AL32 AL27 1 : Single PEG
CFG4 AL30 AT31 CFG0
CFG5 AM31 AT32 0 : Bifurcation enable
CFG6 AN29 AP33
CFG7 AM32 AR33
CFG8 AK32 AT33
8 CFG8 CFG[8] RSVD_NCTF_54
CFG9 AK31 AT34
8 CFG9
RESERVED
CFG10 CFG[9] RSVD_NCTF_55
8 CFG10 AK28 CFG[10] RSVD_NCTF_56 AP35
CFG11 AJ28 AR35
8 CFG11 CFG[11] RSVD_NCTF_57
@T18
@ T18 PAD~D CFG12 AN30 AR32
@T19
@ T19 PAD~D CFG13 CFG[12] RSVD58
AN32 CFG[13]
@T20
@ T20 PAD~D CFG14 AJ32
@T21
@ T21 PAD~D CFG15 CFG[14] CFG3
AJ29 CFG[15] RSVD_TP_59 E15
@T22
@ T22 PAD~D CFG16 AJ30 F15
CFG[16] RSVD_TP_60
1
@T23
@ T23 PAD~D CFG17 AK30 A2
@T24
@ T24 PAD~D CFG18 CFG[17] KEY R1108
H16 RSVD_TP_86 RSVD62 D15
C15 3.01K_0402_1%~D
RSVD63
RSVD64 AJ15 @
AH15
2
C RSVD65 C
B19 RSVD15
A19 RSVD16
H_RSVD17 A20
H_RSVD18 RSVD17
B20 RSVD18
RSVD_TP_66 AA5 PCI-Express Static Lane Reversal
U9 AA4
1
RSVD19 RSVD_TP_67
0_0402_5%~D
0_0402_5%~D
T9 R8
RSVD20 RSVD_TP_68
R830
R831
RSVD_TP_69
AD3 1 : Normal Operation
AC9
RSVD21 RSVD_TP_70
AD2 CFG3
@ @ AB9 AA2 0 : Lane Number Reversed
RSVD22 RSVD_TP_71
AA1
2
RSVD_TP_72
RSVD_TP_73
R9 15->0, 14->1 ...
AG7
RSVD_TP_74
C1 AE3
RSVD_NCTF_23 RSVD_TP_75
A3
RSVD_NCTF_24
V4
RSVD_TP_76
V5
RSVD_TP_77
N2
RSVD_TP_78
J29 AD5
RSVD26 RSVD_TP_79
J28 AD7
RSVD27 RSVD_TP_80
W3
RSVD_TP_81 CFG4
A34 W2
A33 N3
1
AE5
RSVD_TP_84 @R1109
@ R1109
C35 AD9
RSVD_NCTF_30 RSVD_TP_85 3.3K_0402_1%~D
B35
RSVD_NCTF_31
AP34
2
VSS
B REV1.0 B
Display Port Presence
1 : Disabled; No Physical Display Port

CFG4 attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Auburndale (4/6)
LA-5572P
5 4 3 2 1
5 4 3 2 1
JCPUF
+VCC_CORE
+VCC_CORE +1.05V_1.1V_RUN_VTT
52A 18A
AG35 AH14
VCC1 VTT0_1
D 1 1 1 1 1 AG34 AH12 1 1 1 1 1 D
VCC2 VTT0_2
AG33 AH11
C24 C25 C26 C27 C28 VCC3 VTT0_3 C1196 C1204 C1197 C1198 C1199
AG32 AH10
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC4 VTT0_4 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
AG31 J14
2 2 2 2 2 VCC5 VTT0_5 2 2 2 2 2
AG30 J13
VCC6 VTT0_6
AG29 H14
VCC7 VTT0_7
AG28 H12
VCC8 VTT0_8
AG27 G14
VCC9 VTT0_9
AG26 G13 1
VCC10 VTT0_10
1 1 1 1 1 AF35 G12
VCC11 VTT0_11 C1200
AF34 G11
C29 C30 C31 C34 VCC12 VTT0_12 10U_0805_4VAM~D
C35 AF33 F14
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC13 VTT0_13 2
AF32 VCC14 VTT0_14 F13
2 2 2 2 2 AF31 F12
VCC15 VTT0_15
AF30 VCC16 VTT0_16 F11
AF29 VCC17 VTT0_17 E14
AF28 VCC18 VTT0_18 E12
AF27 VCC19 VTT0_19 D14
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1 1 AF26 VCC20 VTT0_20 D13
1.1V RAIL POWER

AD35 VCC21 VTT0_21 D12 1 1 1
C36 C37 AD34 D11
VCC22 VTT0_22
C1087
C1085
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D AD33 C14 C1103
2 2 VCC23 VTT0_23 22U_0805_6.3V6M~D
AD32 VCC24 VTT0_24 C13
AD31 C12 2 2 2
VCC25 VTT0_25
AD30 VCC26 VTT0_26 C11
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33 +1.05V_1.1V_RUN_VTT
AC32 VCC34
AC31 VCC35
C
AC30 VCC36 VTT0_33 AF10 C
22U_0805_6.3V6M~D
AC29 VCC37 VTT0_34 AE10
AC28 VCC38 VTT0_35 AC10 1 1
CPU CORE SUPPLY
C1082
AC27 AB10 C1083
+VCC_CORE VCC39 VTT0_36 22U_0805_6.3V6M~D
AC26 VCC40 VTT0_37 Y10
AA35 VCC41 VTT0_38 W10
2 2
AA34 VCC42 VTT0_39 U10
AA33 VCC43 VTT0_40 T10
1 1 1 1 1 1 AA32 J12
VCC44 VTT0_41
AA31 J11
C44 C45 @ C46 C47 @C48
@ C48 C59 VCC45 VTT0_42
AA30 J16
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC46 VTT0_43
AA29 J15
2 2 2 2 2 2 VCC47 VTT0_44
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
1 1 1 1 1 1 Y31
VCC55
Y30
@C50
@ C50 C51 @C52
@ C52 C53 C54 C49 VCC56
Y29
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC57
Y28
2 2 2 2 2 2 VCC58
Y27
VCC59
Y26
VCC60 H_PSI#
V35 AN33 H_PSI# 50
VCC61 PSI#
V34
VCC62
POWER
V33
VCC63 VID0
V32 AK35 VID0 50
VCC64 VID[0] VID1
1 1 1 1 V31 AK33 VID1 50
VCC65 VID[1] VID2
V30 AK34 VID2 50
C56 C57 C55 C58 VCC66 VID[2] VID3
V29 AL35 VID3 50
VCC67 VID[3]
CPU VIDS
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D V28 AL33 VID4
2 2 2 2 VCC68 VID[4] VID4 50
V27 AM33 VID5
VCC69 VID[5] VID5 50
V26 AM35 VID6
VCC70 VID[6] VID6 50
B U35 AM34 H_DPRSLPVR_R 1 2 H_DPRSLPVR 50 B
VCC71 PROC_DPRSLPVR R1115 0_0402_5%~D
U34
VCC72
U33
VCC73
U32
VCC74
VTT_SELECT = low, 1.1V
U31 G15 CPU_VTT_SELECT 49
VCC75 VTT_SELECT
U30
VCC76
VTT_SELECT = high, 1.05V
U29
VCC77
U28
VCC78
U27
VCC79 +VCC_CORE
U26
VCC80
R35
VCC81
R34
VCC82
1
R33
VCC83 IMVP_IMON R1116
R32 AN35 IMVP_IMON 23,50
VCC84 ISENSE
R31 100_0402_1%~D
VCC85
R30
+VCC_CORE VCC86
R29
2
VCC87 VCCSENSE
SENSE LINES
R28 AJ34 VCCSENSE 50

VCC88 VCC_SENSE VSSSENSE
R27 AJ35 VSSSENSE 50
VCC89 VSS_SENSE
R26
VCC90
1 1 1 1 P35
VCC91
1
P34 B15 VTT_SENSE VTT_SENSE 49 Place R1116 and R1117 near CPU
+ C63 + C62 + C61 + C60 VCC92 VTT_SENSE R1236
P33 A15
330U_D_2VM_R4.5M~D 330U_D_2VM_R4.5M~D 330U_D_2VM_R4.5M~D 330U_D_2VM_R4.5M~D VCC93 VSS_SENSE_VTT
P32
VCC94 100_0402_1%~D Route VCCSENSE and VSSSENSE trace at
P31
2 3 2 3 2 3 2 3 VCC95 27.4 ohms, 7 mils spacing
P30
2
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
+VCC_CORE
A Margaux DIS-->330uFx4 (C60-C63) A

Asics/Asics II-->330uFx5 (C60-C63,C66)
1
+ 1@ C66
1
+
REV1.0
@ C64
330U_D_2VM_R4.5M~D 470U_D2_2V-M~D
2 3 2 3
LA-5573P
5 4 3 2 1
5 4 3 2 1
+1.5V_CPU_VDDQ Source
+1.5V_MEM Q200 +1.5V_CPU_VDDQ
+3.3V_ALW2 +15V_ALW AO4728L_SO8~D
8 1
7 2
20K_0402_5%~D
6 3 1
10U_0805_10V4Z~D
5
C1872
R1471
R1480 JCPUH
R1472 100K_0402_5%~D
4
100K_0402_5%~D 2 AT20 AE34
2
RUN_ON_CPU1.5VS3 @ VSS1 VSS81
AT17 AE33
D VSS2 VSS82 D
AR31 AE32
2
VSS3 VSS83
3
AR28 AE31
VSS4 VSS84
AR26 AE30
Q201B VSS5 VSS85
1 AR24 AE29
RUN_ON_CPU1.5VS3# DMN66D0LDW-7_SOT363-6~D VSS6 VSS86
5 AR23 AE28
C1873 VSS7 VSS87
AR20 AE27
4700P_0402_25V7K~D VSS8 VSS88
AR17 AE26
4
2 VSS9 VSS89
AR15 AE6
VSS10 VSS90
6
AR12 AD10
VSS11 VSS91
AR9 AC8
@ R1473 Q201A VSS12 VSS92
AR6 AC4
DMN66D0LDW-7_SOT363-6~D VSS13 VSS93
34,39,42,47,62 RUN_ON 1 2 2 AR3 VSS14 VSS94 AC2
0_0402_5%~D AP20 AB35
R1474 VSS15 VSS95
AP17 AB34
1
VSS16 VSS96
40 CPU1.5V_S3_GATE 1 2 AP13 VSS17 VSS97 AB33
0_0402_5%~D AP10 AB32
VSS18 VSS98
AP7 VSS19 VSS99 AB31
AP4 VSS20 VSS100 AB30
RUN_ON_CPU1.5VS3# 42 AP2 VSS21 VSS101 AB29
AN34 VSS22 VSS102 AB28
JCPUG AN31 AB27
VSS23 VSS103
AN23 VSS24 VSS104 AB26
AT21 VAXG1 AN20 VSS25 VSS105 AB6
AT19 AR22 T175 PAD~D AN17 AA10
VAXG2 VAXG_SENSE T178 PAD~D VSS26 VSS106
SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 AM29 VSS27 VSS107 Y8
AT16 VAXG4 AM27 VSS28 VSS108 Y4
AR21 VAXG5 AM25 VSS29 VSS109 Y2
AR19 VAXG6 AM20 VSS30 VSS110 W35
AR18 VAXG7 AM17 VSS31 VSS111 W34
AR16 VAXG8 GFX_VID[0] AM22 AM14 VSS32 VSS112 W33
AP21 AP22 C1874 2 1 0.1U_0402_10V7K~D AM11 W32
VAXG9 GFX_VID[1] VSS33 VSS113
GRAPHICS VIDs
AP19 VAXG10 GFX_VID[2] AN22 AM8 VSS34 VSS114 W31
C C
AP18 VAXG11 GFX_VID[3] AP23 AM5 VSS35 VSS115 W30
AP16 AM23 C1875 2 1 0.1U_0402_10V7K~D AM2 W29
VAXG12 GFX_VID[4] VSS36 VSS116
AN21 AP24 AL34 W28
VAXG13 GFX_VID[5] VSS37
VSS VSS117
GRAPHICS
AN19 VAXG14 GFX_VID[6] AN24 AL31 VSS38 VSS118 W27

AN18 C1876 2 1 0.1U_0402_10V7K~D AL23 W26
VAXG15 VSS39 VSS119
AN16 VAXG16 AL20 VSS40 VSS120 W6
AM21 VAXG17 GFX_VR_EN AR25 AL17 VSS41 VSS121 V10
AM19 AT25 C1878 2 1 0.1U_0402_10V7K~D AL12 U8
VAXG18 GFX_DPRSLPVR VSS42 VSS122
AM18 AM24 1 2 AL9 U4
VAXG19 GFX_IMON R1465 VSS43 VSS123
AM16 AL6 U2
VAXG20 1K_0402_5%~D @PJP57
@ PJP57 VSS44 VSS124
AL21 AL3 T35
VAXG21 VSS45 VSS125
AL19 1 2 AK29 T34
VAXG22 VSS46 VSS126
AL18 AK27 T33
AL16
VAXG23 6A +1.5V_CPU_VDDQ PAD-OPEN 4x4m AK25
VSS47 VSS127
T32
VAXG24 VSS48 VSS128
AK21 AJ1 +1.5V_MEM AK20 T31
VAXG25 VDDQ1 @PJP58
@ PJP58 VSS49 VSS129
AK19 AF1 AK17 T30
VAXG26 VDDQ2 VSS50 VSS130
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AK18 AE7 1 2 AJ31 T29
- 1.5V RAILS

AK16 AE4 1 1 1 1 1 1 AJ23 T28
VAXG28 VDDQ4 PAD-OPEN 4x4m VSS52 VSS132
AJ21 AC1 AJ20 T27
C1096
C1097
C1098
C1099
C1100
AJ19 AB7 + C1165 AJ17 T26
VAXG30 VDDQ6 330U_D2_2VM_R6M~D VSS54 VSS134
AJ18 AB4 AJ14 T6
VAXG31 VDDQ7 2 2 2 2 2 VSS55 VSS135
AJ16 Y1 AJ11 R10
VAXG32 VDDQ8 2 VSS56 VSS136
AH21 W7 AJ8 P8
AH19 W4 AJ5 P4
POWER

AH18 U1 AJ2 P2
AH16 T7 AH35 N35
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
T4 AH34 N34
VDDQ13 VSS61 VSS141
C1101
C1102
P1 1 1 AH33 N33
VDDQ14 VSS62 VSS142
N7 AH32 N32
+1.05V_1.1V_RUN_VTT VDDQ15 VSS63 VSS143
N4 AH31 N31
VDDQ16 VSS64 VSS144
DDR3
L1 AH30 N30
VDDQ17 2 2 VSS65 VSS145
J24 H1 AH29 N29
VTT1_45 VDDQ18 VSS66 VSS146
FDI
B B
J23 AH28 N28
VTT1_46 VSS67 VSS147
H25 AH27 N27
AH26 N26
VSS69 VSS149
AH20 N6
VSS70 VSS150
P10 +1.05V_1.1V_RUN_VTT AH17 M10
10U_0805_4VAM~D
10U_0805_4VAM~D
N10 AH13 L35

L10 1 1 AH9 L32
C1107
C1108
K10 AH6 L29

AH3 L8
VSS75 VSS155
AG10 L5
2 2 VSS76 VSS156
AF8 L2
VSS77 VSS157
AF4 K34
VSS78 VSS158
1.1V
J22 AF2 K33

+1.05V_1.1V_RUN_VTT K26 J20 AE35 K30
VTT1_48 VTT1_64 VSS80 VSS160
J27 J18 +1.05V_1.1V_RUN_VTT
VTT1_49 VTT1_65
PEG & DMI
J26 H21
VTT1_50 VTT1_66
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
J25 H20
VTT1_51 VTT1_67 REV1.0
C1111
C1112
H27 H19 1 1
VTT1_52 VTT1_68 TYCO_CALPELLA_AUBURNDALE
G28
VTT1_53
G27
VTT1_54
G26
F26
VTT1_55 600mA 2 2
VTT1_56
E26 L26
VTT1_57 VCCPLL1
1.8V
E25 L27
VTT1_58 VCCPLL2
M26 +1.8V_RUN
VCCPLL3
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
2.2U_0603_6.3V6K~D
4.7U_0603_6.3V6M~D
1 1 1 1 1
C1117
C1115
C1116
C67
C65
2 2 2 2 2
A
REV1.0 A
LA-5573P
5 4 3 2 1
5 4 3 2 1
Populate R87 for Intel DDR3 R87 0_0402_5%~D +1.5V_MEM +1.5V_MEM

1 2 JDIMMA
9 DDR_A_DQS#[0..7] VREFDQ multiple methods M1 +V_DDR_REF_QA
1 2
9 DDR_A_D[0..63] 3
VREF_DQ
VSS
VSS
DQ4 4 DDR_A_D4
JDIMMA H=5.2
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D0 5 6 DDR_A_D5
DDR_A_D1 DQ0 DQ5
9 DDR_A_DM[0..7] 7 DQ1 VSS 8
9 10 DDR_A_DQS#0 +1.5V_MEM
1 1 VSS DQS0#
DDR_A_DM0 11 12 DDR_A_DQS0
9 DDR_A_DQS[0..7] DM0 DQS0
C1119
C1120
13 VSS VSS 14
9 DDR_A_MA[0..15] DQ2 DQ6
1
2 2 DDR_A_D3 17 18 DDR_A_D7
DQ3 DQ7 R1476
19 20
D DDR_A_D8 VSS VSS DDR_A_D12 1K_0402_5%~D D
21 22
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24
DQ9 DQ13
25 26
2
DDR_A_DQS#1 VSS VSS DDR_A_DM1
27 28
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# 8,14
DQS1 RESET#
Note: 31
VSS VSS
32
Check voltage tolerance of DDR_A_D11 35
DQ10 DQ14
36 DDR_A_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
+1.5V_MEM DDR_A_D16 39 40 DDR_A_D20
41 42
@ R1477 0_0402_5%~D DQ17 DQ21
43 VSS VSS 44
1
1 2 DDR_A_DQS#2 45 46 DDR_A_DM2
R660 DDR_A_DQS2 DQS2# DM2
47 DQS2 VSS 48
1K_0402_1%~D 49 50 DDR_A_D22
DDR_A_D18 VSS DQ22 DDR_A_D23
Q202 51 DQ18 DQ23 52
DDR_A_D19 53 54
2
AO3420L_SOT23-3~D DQ19 VSS DDR_A_D28

55 VSS DQ28 56
S
+V_DDR_REF_QA DDR_A_D25 DQ24 DQ29
1 3 DIMM0_VREF 10 59 DQ25 VSS 60
61 62 DDR_A_DQS#3
VSS DQS3#
1
DDR_A_DM3 63 64 DDR_A_DQS3
DM3 DQS3
2
R670 65 66
2
1K_0402_1%~D R1485 DDR_A_D26 VSS VSS DDR_A_D30
67 68
G
100K_0402_5%~D 69 DQ27 DQ31 70
71 72
2
DDR_HVREF_RST_GATE 8,14,40 VSS VSS
1
DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
9 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 9
75 VDD VDD 76
77 78 DDR_A_MA15
DDR_A_BS2 NC A15 DDR_A_MA14
9 DDR_A_BS2 79 BA2 A14 80
C C
81 VDD VDD 82
DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
Layout Note: 85 A9 A7 86
87 88
Place near JDIMMA DDR_A_MA8 89
VDD VDD
90 DDR_A_MA6
DDR_A_MA5 A8 A6 DDR_A_MA4
91 A5 A4 92
93 VDD VDD 94
DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
97 98
A1 A0
99 100
+1.5V_MEM M_CLK_DDR0 VDD VDD M_CLK_DDR1
9 M_CLK_DDR0 101 102 M_CLK_DDR1 9
M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1
9 M_CLK_DDR#0 103 104 M_CLK_DDR#1 9
CK0# CK1#
105 106
DDR_A_MA10 VDD VDD DDR_A_BS1
107 108 DDR_A_BS1 9
A10/AP BA1
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
DDR_A_BS0 109 110 DDR_A_RAS#

9 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 9
1 1 1 1 111 112
VDD VDD
C1121
C1122
C1123
C1124
DDR_A_WE# 113 114 DDR_CS0_DIMMA#

9 DDR_A_WE# DDR_A_CAS# WE# S0# M_ODT0 DDR_CS0_DIMMA# 9
9 DDR_A_CAS# 115 116 M_ODT0 9
CAS# ODT0
117 118
2 2 2 2 DDR_A_MA13 VDD VDD M_ODT1
119 120 M_ODT1 9
DDR_CS1_DIMMA# A13 ODT1
9 DDR_CS1_DIMMA# 121 122
S1# NC
123 124
VDD VDD
125 126 +V_DDR_REF
TEST VREF_CA
127 128
VSS VSS
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_A_D32 129 130 DDR_A_D36
131 132
DQ33 DQ37
133 134 1 1
135 136
+1.5V_MEM DQS4# DM4
C1132
C1133
DDR_A_DQS4 137 138
DQS4 VSS DDR_A_D38
139 140
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 142
DDR_A_D35 DQ34 DQ39
143 144
DQ35 VSS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
B DDR_A_D44 B
145 146
147 148
DQ40 DQ45
330U_SX_2VY~D
1 DDR_A_D41 149 150

DQ41 VSS DDR_A_DQS#5
1 1 1 1 1 1 151 152
VSS DQS5#
C1126
C1127
C1128
C1129
C1130
C1131
C1125
+ DDR_A_DM5 153 154 DDR_A_DQS5

DM5 DQS5
155 156
DDR_A_D42 VSS VSS DDR_A_D46
157 158
2 2 2 2 2 2 2 DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
169 170
DDR_A_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_A_D54
173 174
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_A_D60
Layout Note: 179
VSS DQ60
180
DDR_A_D56 181 182 DDR_A_D61
Place near JDIMMA.203,204 DDR_A_D57 183
DQ56 DQ61
184
DQ57 VSS DDR_A_DQS#7
185 186
DDR_A_DM7 VSS DQS7# DDR_A_DQS7
187 188
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
VSS VSS
1 2 197 198
+0.75V_DDR_VTT R1182 10K_0402_5%~D199 SA0 EVENT# DDR_XDP_SMBDAT
+3.3V_RUN 200 DDR_XDP_SMBDAT 14,15,16,28
VDDSPD SDA
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
1 2 201 202 DDR_XDP_SMBCLK

SA1 SCL DDR_XDP_SMBCLK 14,15,16,28
1 1 R1183 10K_0402_5%~D203 204 +0.75V_DDR_VTT
VTT VTT
C1141
C1142
+0.75V_DDR_VTT
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
A A
205 GND1 GND2 206
2 2
1 1 1 1 1
FOX_AS0A626-U4SN-7F
C1134
C1135
C1136
C1137
C1138
2 2 2 2 2 DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT1
LA-5573P
5 4 3 2 1
5 4 3 2 1
R88 0_0402_5%~D
1 2 +1.5V_MEM +1.5V_MEM
+V_DDR_REF_QB
JDIMMB
1 VREF_DQ VSS 2
3 4 DDR_B_D4
VSS DQ4
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8
1 1 9 10 DDR_B_DQS#0
9 DDR_B_DQS#[0..7] DDR_B_DM0 11
VSS
DM0
DQS0#
DQS0 12 DDR_B_DQS0 JDIMMB H=9.2
C1143
C1144
9 DDR_B_D[0..63] Populate R88 for Intel DDR3 13 VSS VSS 14
VREFDQ multiple methods M1 2 2 DDR_B_D3 17
DQ2 DQ6
18 DDR_B_D7
9 DDR_B_DM[0..7] DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
9 DDR_B_DQS[0..7] 21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 24
DQ9 DQ13
9 DDR_B_MA[0..15] 25 26
DDR_B_DQS#1 VSS VSS DDR_B_DM1
27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#
Note: 29
DQS1 RESET#
30 DDR3_DRAMRST# 8,13
31 32
Check voltage tolerance of DDR_B_D10 33
VSS VSS
34 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15
VREF_DQ at the DIMM socket 35
DQ11 DQ15
36
+1.5V_MEM 37 38
39 40
@ R1478 0_0402_5%~D DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 42
DQ17 DQ21
1
1 2 43 44
R668 DDR_B_DQS#2 VSS VSS DDR_B_DM2
45 DQS2# DM2 46
1K_0402_1%~D DDR_B_DQS2 47 48
DQS2 VSS DDR_B_D22
49 VSS DQ22 50
Q203 DDR_B_D18 DDR_B_D23
51 52
2
AO3420L_SOT23-3~D DDR_B_D19 DQ18 DQ23
53 DQ19 VSS 54
55 56 DDR_B_D28
S
+V_DDR_REF_QB DDR_B_D24 VSS DQ28 DDR_B_D29
1 3 DIMM1_VREF 10 57 58
DDR_B_D25 DQ24 DQ29
59 DQ25 VSS 60
61 62 DDR_B_DQS#3
VSS DQS3#
1
2
DDR_B_DM3 63 64 DDR_B_DQS3
2
R671 R1486 DM3 DQS3
65 66
G
1K_0402_1%~D DDR_B_D26 VSS VSS DDR_B_D30
100K_0402_5%~D 67 DQ26 DQ30 68
DDR_HVREF_RST_GATE 8,13,40 DQ27 DQ31
71 72
2
1
VSS VSS
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
9 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 9
75 VDD VDD 76
77 78 DDR_B_MA15
DDR_B_BS2 NC A15 DDR_B_MA14
9 DDR_B_BS2 79 BA2 A14 80
81 VDD VDD 82
C DDR_B_MA12 DDR_B_MA11 C
Layout Note: 83 A12/BC# A11 84
DDR_B_MA9 85 86 DDR_B_MA7
Place near JDIMMB 87
A9 A7
88
DDR_B_MA8 VDD VDD DDR_B_MA6
89 A8 A6 90
A5 A4
93 VDD VDD 94
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
M_CLK_DDR2 VDD VDD M_CLK_DDR3
9 M_CLK_DDR2 101 102 M_CLK_DDR3 9
+1.5V_MEM M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
9 M_CLK_DDR#2 103 104 M_CLK_DDR#3 9
CK0# CK1#
105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 9
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
9 DDR_B_BS0 109 110
BA0 RAS# DDR_B_RAS# 9
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
111 112
DDR_B_WE# VDD VDD DDR_CS2_DIMMB#
1 1 1 1 9 DDR_B_WE# 113 114 DDR_CS2_DIMMB# 9
WE# S0#
C1145
C1146
C1147
C1148
DDR_B_CAS# 115 116 M_ODT2

9 DDR_B_CAS# CAS# ODT0 M_ODT2 9
117 118
DDR_B_MA13 VDD VDD M_ODT3
119 120 M_ODT3 9
2 2 2 2 DDR_CS3_DIMMB# A13 ODT1
9 DDR_CS3_DIMMB# 121 122
S1# NC
123 124
VDD VDD
125 126 +V_DDR_REF
TEST VREF_CA
127 128
VSS VSS
2.2U_0603_6.3V6K~D
0.1U_0402_16V4Z~D
DDR_B_D32 129 130 DDR_B_D36
131 132
DQ33 DQ37
133 134 1 1
135 136
+1.5V_MEM DQS4# DM4
C1156
C1157
DDR_B_DQS4 137 138
DQS4 VSS DDR_B_D38
139 140
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
145 146 DDR_B_D44

B DDR_B_D40 VSS DQ44 DDR_B_D45 B
147 148
DQ40 DQ45
330U_SX_2VY~D
1 DDR_B_D41 149 150

DQ41 VSS DDR_B_DQS#5
1 1 1 1 1 1 151 152
VSS DQS5#
C1150
C1151
C1152
C1153
C1154
C1155
C1149
+ DDR_B_DM5 153 154 DDR_B_DQS5

DM5 DQS5
155 156
157 158
2 2 2 2 2 2 2 DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 160
DQ43 DQ47
161 162
163 164
165 166
DQ49 DQ53
167 168
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
DDR_B_D50 VSS DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_B_D60
179 180
DDR_B_D56 VSS DQ60 DDR_B_D61
Layout Note: 181
DQ56 DQ61
182
DDR_B_D57 183 184
Place near JDIMMB.203,204 185
DQ57 VSS
186 DDR_B_DQS#7
DDR_B_DM7 VSS DQS7# DDR_B_DQS7
187 188
DM7 DQS7
189 190
191 192
193 194
DQ59 DQ63
195 196
+3.3V_RUN VSS VSS
197 198
SA0 EVENT# DDR_XDP_SMBDAT
+3.3V_RUN 199 200 DDR_XDP_SMBDAT 13,15,16,28
+0.75V_DDR_VTT VDDSPD SDA DDR_XDP_SMBCLK
2 1 201 202 DDR_XDP_SMBCLK 13,15,16,28
SA1 SCL
+0.75V_DDR_VTT 203 204 +0.75V_DDR_VTT
VTT VTT
1
0.1U_0402_16V4Z~D
2.2U_0603_6.3V6K~D
R1184
10K_0402_5%~D
10K_0402_5%~D
R1185
1 1 205 GND1 GND2 206

C1162
C1163
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
A A
1 1 1 1 FOX_AS0A626-U8SN-7F
2
2 2
C1158
C1159
C1160
C1161
2 2 2 2 DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
LA-5573P
5 4 3 2 1
5 4 3 2 1
CMOS_CLR1 CMOS setting +3.3V_ALW_PCH @ JXDP2

Shunt Clear CMOS USB_OC0#_R @ R78 1 2 33_0402_5%~D XDP_FN0 1 2
18 USB_OC0#_R USB_OC1#_R @ R91 33_0402_5%~D XDP_FN1 +3.3V_ALW_PCH GND0 GND1 XDP_FN16
1 2 3 OBSFN_A0 OBSFN_C0 4
18 USB_OC1#_R USB_OC2# @ R101 33_0402_5%~D XDP_FN2 XDP_FN17
Open Keep CMOS +3.3V_RUN 18 USB_OC2# USB_OC3#
1 2
XDP_FN3
5 OBSFN_A1 OBSFN_C1 6
@ R102 1 2 33_0402_5%~D 1 7 8
18 USB_OC3# USB_OC4# @ R103 33_0402_5%~D XDP_FN4 XDP_FN0 GND2 GND3 XDP_FN8
1 2 9 OBSDATA_A0 OBSDATA_C0 10
18 USB_OC4# USB_OC5# @ R104 33_0402_5%~D XDP_FN5 @ C1375 XDP_FN1 XDP_FN9
ME_CLR1 TPM setting 18 USB_OC5#
1 2 11 OBSDATA_A1 OBSDATA_C1 12
1
USB_OC6# @ R105 1 2 33_0402_5%~D XDP_FN6 0.1U_0402_16V4Z~D 13 14
@ R62 18 USB_OC6# USB_OC7# @ R106 33_0402_5%~D XDP_FN7 2 XDP_FN2 GND4 GND5 XDP_FN10
Shunt Clear ME RTC Registers 18 USB_OC7# PCMCLK_REQ#
1 2
XDP_FN8 XDP_FN3
15 OBSDATA_A2 OBSDATA_C2 16
XDP_FN11
10K_0402_5%~D @ R107 1 2 33_0402_5%~D 17 18
16,34 PCMCLK_REQ# LANCLK_REQ# @ R108 33_0402_5%~D XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers 16,30 LANCLK_REQ# HDD_DET#_R @ R109
1 2
33_0402_5%~D XDP_FN10
19 GND6 GND7 20
1 2 21 22
2
GPIO19 @ R110 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23
OBSFN_B1 OBSFN_D1
24
CONTACTLESS_DET# @ R111 1 2 33_0402_5%~D XDP_FN12 25 26
D +RTC_CELL PCH_AZ_SYNC 19,31 CONTACTLESS_DET# GPIO37 @ R112 33_0402_5%~D XDP_FN13 XDP_FN4 GND8 GND9 XDP_FN12 D
19 GPIO37 1 2 27
OBSDATA_B0 OBSDATA_D0
28
EN_ESATA_RPTR# @ R113 1 2 33_0402_5%~D XDP_FN14 XDP_FN5 29 30 XDP_FN13
19,37 EN_ESATA_RPTR# OBSDATA_B1 OBSDATA_D1
1
TEMP_ALERT# @ R114 1 2 33_0402_5%~D XDP_FN15 31 32
19,39 TEMP_ALERT# GND10 GND11
1
R120 ROUSH_PAID_TS_DET# @ R115 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14

R217 100K_0402_5%~D 19 ROUSH_PAID_TS_DET# SIO_EXT_SCI#_R @ R116 33_0402_5%~D XDP_FN17 XDP_FN7 OBSDATA_B2 OBSDATA_D2 XDP_FN15
1 2 35 36
330K_0402_1%~D 19 SIO_EXT_SCI#_R OBSDATA_B3 OBSDATA_D3
@ 37 38
RESET_OUT# GND12 GND13 +3.3V_ALW_PCH
39 40
2
17,40 RESET_OUT# PWRGOOD/HOOK0 ITPCLK/HOOK4
1 2 PCH_PWRBTN#_XDP 41 42
2
PCH_INTVRMEN 8,17 SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5

@ R69 0_0402_5%~D 43 44
VCC_OBS_AB VCC_OBS_CD PLTRST1#_XDP
8 DDR_XDP_SMBDAT_R 45 46
C296 HOOK2 RESET#/HOOK6 XDP_DBRESET#
8 DDR_XDP_SMBCLK_R 47 48
12P_0402_50V8J~D 0_0402_5%~D HOOK3 DBR#/HOOK7 XDP_DBRESET# 8,17
INTVRMEN- Integrated SUS On Die PLL VR is supplied by 49 GND14 GND15 50
2 1 PCH_RTCX1 @R1532
@ R1532 1 2 DDR_XDP_SMBDAT_R 51 52 PCH_JTAG_TDO
1.1V VRM Enable 1.5V when sampled high, 1.8 V 13,14,16,28 DDR_XDP_SMBDAT SDA TD0
@R1533
@ R1533 1 2 DDR_XDP_SMBCLK_R 53 54 PCH_JTAG_RST#_R 1 2 PCH_JTAG_RST#
13,14,16,28 DDR_XDP_SMBCLK SCL TRST# PCH_JTAG_TDI
High - Enable Internal VRs when sampled low 0_0402_5%~D 55 TCK1 TDI 56 @ R117
1
Disconnect XDP trace, PCH_JTAG_TCK 57 58 PCH_JTAG_TMS 0_0402_5%~D
TCK0 TMS
3
R222 59 60
add R1532/1533 GND16 GND17
NC NC
Y1 10M_0402_5%~D
32.768K_12.5PF_Q13MC30610018~D SAMTE_BSH-030-01-L-D-A
U73A
2
C297 R223 V1.5
12P_0402_50V8J~D 0_0402_5%~D B13 D33 LPC_LAD0
PCH_RTCX2 RTCX1 FWH0 / LAD0 LPC_LAD1 LPC_LAD0 31,32,39,40
2 1 1 2 D13 B33 LPC_LAD1 31,32,39,40
RTCX2 FWH1 / LAD1 LPC_LAD2
FWH2 / LAD2 C32 LPC_LAD2 31,32,39,40
A32 LPC_LAD3 @ R118
FWH3 / LAD3 LPC_LAD3 31,32,39,40
+RTC_CELL 1 2 PCH_RTCRST# C14 1K_0402_5%~D
R224 20K_0402_1%~D RTCRST# LPC_LFRAME# PLTRST1#_XDP 1
C34 2 PLTRST_XDP# 18
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# 31,32,39,40
1 2 D17 SRTCRST#
R225 20K_0402_5%~D A34 LPC_LDRQ0#
LPC
RTC
INTRUDER# LDRQ0# LPC_LDRQ1# LPC_LDRQ0# 39
1 2 A16 F34
R226 1M_0402_5%~D INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# 39
2 1 PCH_INTVRMEN A14 AB9 IRQ_SERIRQ +3.3V_RUN
C INTVRMEN SERIRQ IRQ_SERIRQ 31,32,39,40 C
C300 R265
27P_0402_50V8J~D R236 10K_0402_5%~D
1 2 1 2 33_0402_5%~D IRQ_SERIRQ 2 1
1 2 1 2 PCH_AZ_BITCLK
37 PCH_AZ_MDC_BITCLK 1 2 A30 HDA_BCLK
SATA0RXN AK7 PSATA_PRX_DTX_N0_C 28
1 2 PCH_AZ_SYNC D29 AK6
37 PCH_AZ_MDC_SYNC HDA_SYNC SATA0RXP PSATA_PRX_DTX_P0_C 28
@ @ R238 33_0402_5%~D AK11 HDD
ME1 SHORT PADS~D CMOS1 SHORT PADS~D SATA0TXN PSATA_PTX_DRX_N0_C 28
29 SPKR P1 AK9
SPKR SATA0TXP PSATA_PTX_DRX_P0_C 28
1 2 1 2
C298 1U_0402_6.3V6K~D C299 1U_0402_6.3V6K~D 1 2 PCH_AZ_RST# C30
37 PCH_AZ_MDC_RST# HDA_RST#
CMOS place near DIMM R240 33_0402_5%~D AH6
SATA1RXN SATA_ODD_PRX_DTX_N1_C 28
AH5 SATA_ODD_PRX_DTX_P1_C 28
PCH_AZ_CODEC_SDIN0 SATA1RXP
29 PCH_AZ_CODEC_SDIN0 G30
HDA_SDIN0 SATA1TXN
AH9
SATA_ODD_PTX_DRX_N1_C 28 ODD
AH8
SATA1TXP SATA_ODD_PTX_DRX_P1_C 28
29 PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT 37 PCH_AZ_MDC_SDIN1
PCH_AZ_MDC_SDIN1 F30
HDA_SDIN1
R234 33_0402_5%~D AF11
SATA2RXN
29 PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC E32 AF9
IHDA
R235 33_0402_5%~D HDA_SDIN2 SATA2RXP
AF7
SATA2TXN
29 PCH_AZ_CODEC_RST# 1 2 PCH_AZ_RST# F32
HDA_SDIN3 SATA2TXP
AF6
R239 33_0402_5%~D
29 PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK SATA3RXN
AH3 SATA_PRX_WWANTX_N3_C 35
1 R241 33_0402_5%~D 1 2 PCH_AZ_SDOUT B29 AH1
37 PCH_AZ_MDC_SDOUT HDA_SDO SATA3RXP SATA_PRX_WWANTX_P3_C 35
R242 33_0402_5%~D AF3 Mini card2
C302 +3.3V_ALW_PCH SATA3TXN SATA_PTX_WWANRX_N3_C 35
AF1
27P_0402_50V8J~D ME_FWP SATA3TXP SATA_PTX_WWANRX_P3_C 35
39 ME_FWP H32
SATA
2 HDA_DOCK_EN# / GPIO33
AD9 ESATA_PRX_DTX_N4_C 37
SATA4RXN
1
USB_MCARD3_DET# J30 AD8

36 USB_MCARD3_DET# HDA_DOCK_RST# / GPIO13 SATA4RXP ESATA_PRX_DTX_P4_C 37
R123 AD6 E-SATA
0_0603_5%~D SATA4TXN ESATA_PTX_DRX_N4_C 37
AD5
SATA4TXP ESATA_PTX_DRX_P4_C 37
Stuff R128,no stuff R123
51_0402_1%~D 2 1 R804 PCH_JTAG_TCK M3 AD3
2
when production JTAG_TCK SATA5RXN SATA_PRX_DKTX_N5_C 38

AD1 SATA_PRX_DKTX_P5_C 38
B 200_0402_5%~D 2 R807 PCH_JTAG_TMS SATA5RXP B
1 K3
JTAG_TMS SATA5TXN
AB3
SATA_PTX_DKRX_N5_C 38 DOCKED
AB1
200_0402_5%~D 2 R805 PCH_JTAG_TDI SATA5TXP SATA_PTX_DKRX_P5_C 38
1 K1
JTAG_TDI
JTAG
200_0402_5%~D 2 1 R806 PCH_JTAG_TDO J2 AF16 +1.05V_RUN
200 MIL SO8 JTAG_TDO SATAICOMPO R1201
PAD~D T174 PCH_JTAG_RST# SATA_COMP 1 2
64Mb Flash ROM J4
TRST# SATAICOMPI
AF15
100_0402_5%~D
100_0402_5%~D
100_0402_5%~D
+3.3V_M
1
C328 37.4_0402_1%~D
+3.3V_RUN
R1281
R1282
R1315
For iAMT 1 2
1
PCH_SPI_CLK BA2
SPI_CLK
1
0.1U_0402_16V4Z~D
1
R298 R299 PCH_SPI_CS0# AV3
2
3.3K_0402_5%~D 3.3K_0402_5%~D SPI_CS0#

U12 PCH_SPI_CS1# AY3 T3 SATA_ACT#_R R382
2
PCH_SPI_CS0# SPI_CS1# SATALED# SATA_ACT#_R 43 43K_0402_5%~D

1 8
2
/CS VCC R131
2
PCH_SPI_DIN 2 7 PCH_SPI_DO AY1 Y9 HDD_DET#_R 1 2
DO /HOLD SPI_MOSI SATA0GP / GPIO21 HDD_DET# 28
0_0402_5%~D
SPI
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK PCH_SPI_DIN 1 2 PCH_SPI_DIN_R AV1 V1 GPIO19 2 1 +3.3V_RUN
@ R1246 0_0402_5%~D /WP CLK R1247 33_0402_5%~D SPI_MISO SATA1GP / GPIO19 R58
4 5 PCH_SPI_DO 10K_0402_5%~D
GND DIO BD82QM57-SLGZQ-B3_FCBGA1071~D
SPI_WP#_SEL 39 +3.3V_RUN
W25Q64BVSSIG_SO8~D PCH JTAG Enable PCH JTAG Disable Production @R264
@ R264
1K_0402_5%~D
SPKR 2 1
PCH Pin Ref. ES1 ES2 ES1 ES2 All
+3.3V_M
C1205 R806 No Stuff 200 ohm No Stuff No Stuff No Stuff No Reboot Strap
1 2 TDO
200 MIL SO8 R1315 No Stuff 100 ohm No Stuff No Stuff No Stuff Low = Default
1
A 0.1U_0402_16V4Z~D SPKR A
R1237
32Mb Flash ROM R807 200 ohm 200 ohm No Stuff No Stuff No Stuff High = No Reboot
1
3.3K_0402_5%~D TMS
R1238 R1281 100 ohm 100 ohm No Stuff No Stuff No Stuff
U13 3.3K_0402_5%~D
2
PCH_SPI_CS1# 1 8 R805 200 ohm 200 ohm 20K ohm No Stuff No Stuff
/CS VCC
TDI
2
PCH_SPI_DIN R1282 No Stuff No Stuff

2 DO /HOLD 7 100 ohm 100 ohm 10K ohm Compal Electronics, Inc.
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK TCK R804 51 ohm 51 ohm 51 ohm 51 ohm No Stuff Title
/WP CLK
@ R1060 0_0402_5%~D
4 5 PCH_SPI_DO R808 20K ohm 20K ohm No Stuff No Stuff PCH (1/8)
GND DIO Size Document Number Rev
TRST#
R1316 10K ohm 10K ohm No Stuff No Stuff 0.1
W25Q32BVSSIG_SO8~D LA-5573P
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
2
@ Q190A
DMN66D0LDW-7_SOT363-6~D
MEM_SMBCLK 6 1 DDR_XDP_SMBCLK
DDR_XDP_SMBCLK 13,14,15,28
5
D MEM_SMBDATA DDR_XDP_SMBDAT D
3 4 DDR_XDP_SMBDAT 13,14,15,28
@ Q190B
U73B
1 2
V1.5 R51 0_0402_5%~D
PCIE_PRX_WANTX_N1 BG30 B9 PCH_SMB_ALERT#
35 PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 BJ30 PERN1 SMBALERT# / GPIO11
35 PCIE_PRX_WANTX_P1 1 2
C317 1 PCIE_PTX_WANRX_N1 BF29 PERP1 MEM_SMBCLK
MiniWWAN (Mini Card 1)---> 2 0.1U_0402_10V7K~D PETN1 SMBCLK
H14 R54 0_0402_5%~D
35 PCIE_PTX_WANRX_N1_C C319 1 PCIE_PTX_WANRX_P1 BH29
35 PCIE_PTX_WANRX_P1_C 2 0.1U_0402_10V7K~D PETP1
C8 MEM_SMBDATA
PCIE_PRX_WLANTX_N2 AW30 SMBDATA
36 PCIE_PRX_WLANTX_N2 PERN2 +3.3V_ALW_PCH
PCIE_PRX_WLANTX_P2 BA30
36 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 BC30 PERP2
MiniWLAN (Mini Card 2)---> C320 1 2 0.1U_0402_10V7K~D J14
36 PCIE_PTX_WLANRX_N2_C C321 1 PCIE_PTX_WLANRX_P2 BD30 PETN2 SML0ALERT# / GPIO60
2 0.1U_0402_10V7K~D
36 PCIE_PTX_WLANRX_P2_C PETP2 LAN_SMBCLK SML1_SMBCLK
SML0CLK C6 LAN_SMBCLK 30 1 2
PCIE_PRX_PCMTX_N3 AU30 R1178 2.2K_0402_5%~D
SMBus
33 PCIE_PRX_PCMTX_N3 PERN3
PCIE_PRX_PCMTX_P3 AT30 G8 LAN_SMBDATA SML1_SMBDATA 1 2
33 PCIE_PRX_PCMTX_P3 PCIE_PTX_PCMRX_N3 PERP3 SML0DATA LAN_SMBDATA 30
PCMCIA---> C1373 1 2 0.1U_0402_10V7K~D AU32 R1179 2.2K_0402_5%~D
33 PCIE_PTX_PCMRX_N3_C C1374 1 PCIE_PTX_PCMRX_P3 PETN3
2 0.1U_0402_10V7K~D AV32
33 PCIE_PTX_PCMRX_P3_C PETP3
SML1ALERT# / GPIO74 M14
PCIE_PRX_EXPTX_N4 BA32
34 PCIE_PRX_EXPTX_N4 PCIE_PRX_EXPTX_P4 PERN4 SML1_SMBCLK
34 PCIE_PRX_EXPTX_P4 BB32 PERP4 SML1CLK / GPIO58 E10 SML1_SMBCLK 40
Express card---> C1008 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_N4 BD32
34 PCIE_PTX_EXPRX_N4_C C1009 1 PCIE_PTX_EXPRX_P4 PETN4 SML1_SMBDATA +3.3V_ALW_PCH
34 PCIE_PTX_EXPRX_P4_C 2 0.1U_0402_10V7K~D BE32 PETP4 SML1DATA / GPIO75 G12 SML1_SMBDATA 40
PCI-E*
PCIE_PRX_WPANTX_N5 BF33
36 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 BH33 PERN5 PCH_CL_CLK1 MEM_SMBCLK
MiniPCIE 36 PCIE_PRX_WPANTX_P5 PERP5 CL_CLK1 T13 PCH_CL_CLK1 36 2 1
Controller
C1025 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_N5 BG32 @ R252 2.2K_0402_5%~D
(Mini Card 3)---> 36 PCIE_PTX_WPANRX_N5_C C1024 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_P5 BJ32 PETN5
T11 PCH_CL_DATA1 MEM_SMBDATA 2 1
36 PCIE_PTX_WPANRX_P5_C PETP5 CL_DATA1 PCH_CL_DATA1 36
@ R255 2.2K_0402_5%~D
Link
C PCIE_PRX_GLANTX_N6 PCH_CL_RST1# PCH_SMB_ALERT# 2 C
30 PCIE_PRX_GLANTX_N6 BA34 PERN6 CL_RST1# T9 1
PCIE_PRX_GLANTX_P6 PCH_CL_RST1# 36 R1175 10K_0402_5%~D
30 PCIE_PRX_GLANTX_P6 AW34 PERP6
10/100/1G LAN ---> C326 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_N6 BC34 @ R1
30 PCIE_PTX_GLANRX_N6_C C327 1 PCIE_PTX_GLANRX_P6 PETN6 10K_0402_5%~D
30 PCIE_PTX_GLANRX_P6_C 2 0.1U_0402_10V7K~D BD34 PETP6
H1 PEG_A_CLKRQ# 1 2
PEG_A_CLKRQ# / GPIO47
AT34 PERN7 1 2 CLK_REQ# 53
AU34 R55 0_0402_5%~D +3.3V_LAN
PERP7 CLK_PCIE_VGA#
AU36 AD43
PETN7 CLKOUT_PEG_A_N CLK_PCIE_VGA CLK_PCIE_VGA# 53
AV36 AD45
PETP7 CLKOUT_PEG_A_P CLK_PCIE_VGA 53 LAN_SMBCLK 2 1
BG34 AN4 CLK_CPU_EXP# R309 2.2K_0402_5%~D
PERN8 CLKOUT_DMI_N
PEG
CLK_CPU_EXP CLK_CPU_EXP# 8 LAN_SMBDATA
BJ34 AN2 2 1
PERP8 CLKOUT_DMI_P CLK_CPU_EXP 8 R377 2.2K_0402_5%~D
BG36
PETN8
BJ36
PETP8
AT1
CLKOUT_DP_N / CLKOUT_BCLK1_N
AT3
CLKOUT_DP_P / CLKOUT_BCLK1_P
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
From CLK BUFFER

AW24 CLK_BUF_EXP#
PCIECLKREQ0# CLKIN_DMI_N CLK_BUF_EXP CLK_BUF_EXP# 6
+3.3V_ALW_PCH 1 2 P9 BA24 CLK_BUF_EXP 6
R122 10K_0402_5%~D PCIECLKRQ0# / GPIO73 CLKIN_DMI_P
R1198 1 2 0_0402_5%~D PCIE_LAN# AM43 AP3 CLK_BUF_BCLK#

30 CLK_PCIE_LAN# PCIE_LAN CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK CLK_BUF_BCLK# 6
R1199 1 2 0_0402_5%~D AM45 AP1
30 CLK_PCIE_LAN CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK 6
10/100/1G LAN --->
LANCLK_REQ# U4
15,30 LANCLK_REQ# PCIECLKRQ1# / GPIO18 CLK_BUF_DOT96#
F18 CLK_BUF_DOT96# 6
CLKIN_DOT_96N CLK_BUF_DOT96
E18 CLK_BUF_DOT96 6
R1293 PCIE_PCM# CLKIN_DOT_96P
33 CLK_PCIE_PCM# 2 1 0_0402_5%~D AM47
CLKOUT_PCIE2N
R1294 2 1 0_0402_5%~D PCIE_PCM AM48
33 CLK_PCIE_PCM CLKOUT_PCIE2P CLK_BUF_CKSSCD#
PCMCIA---> +3.3V_RUN 1 2 CLKIN_SATA_N / CKSSCD_N
AH13 CLK_BUF_CKSSCD# 6
R876 10K_0402_5%~D PCMCLK_REQ# N4 AH12 CLK_BUF_CKSSCD
B 15,34 PCMCLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD 6 B
R1297 2 1 0_0402_5%~D PCIE_MINI3# AH42 P41 CLK_PCH_14M

36 CLK_PCIE_MINI3# PCIE_MINI3 CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M 6
MiniWPAN (Mini Card 3)---> R1302 2 1 0_0402_5%~D AH41
36 CLK_PCIE_MINI3 CLKOUT_PCIE3P
+3.3V_ALW_PCH R61 2 1 10K_0402_5%~D
MINI3CLK_REQ# A8 J42 CLK_PCI_LOOPBACK
36 MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK 18
R379
0_0402_5%~D
R1205 2 1 0_0402_5%~D PCIE_EXP# AM51 AH51 XTAL25_IN 2 1
34 CLK_PCIE_EXP# PCIE_EXP CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
Express card---> R1206 2 1 0_0402_5%~D AM53 AH53
34 CLK_PCIE_EXP CLKOUT_PCIE4P XTAL25_OUT
1
+3.3V_ALW_PCH R523 2 1 10K_0402_5%~D
EXPCLK_REQ# M9 AF38 1 2 +1.05V_RUN @ R685
34 EXPCLK_REQ# PCIECLKRQ4# / GPIO26 XCLK_RCOMP R686 90.9_0402_1%~D 1M_0402_5%~D
@ Y6
R1203 2 1 0_0402_5%~D PCIE_MINI2# AJ50 T45 SIO_14M R1223 2 1 22_0402_5%~D 25MHZ_18PF_1Y725000CE1A~D
36 CLK_PCIE_MINI2# CLK_SIO_14M 39
2
R1196 PCIE_MINI2 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
36 CLK_PCIE_MINI2 2 1 0_0402_5%~D AJ52 2 1
R45 CLKOUT_PCIE5P
MiniWLAN (Mini Card 2)---> +3.3V_ALW_PCH 2 1 10K_0402_5%~D
12P_0402_50V8J~D
MINI2CLK_REQ# H6 P43 PCI_TCM 3@ R1220 2 1 22_0402_5%~D
Clock Flex
36 MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 CLK_PCI_TPM_CHA 32

2
1
C1168
R1195 2 1 0_0402_5%~D PCIE_MINI1# AK53 T42 PCI_TPM R1219 2 1 22_0402_5%~D R381
36 CLK_PCIE_MINI1# PCIE_MINI1 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM 31
R1202 2 1 0_0402_5%~D AK51 0_0402_5%~D
36 CLK_PCIE_MINI1 R40 CLKOUT_PEG_B_P 1
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH 2 1 10K_0402_5%~D
MINI1CLK_REQ# P13 N50 JETWAY_14M @ R910 2 1 22_0402_5%~D @
2
36 MINI1CLK_REQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 JETWAY_CLK14M 32
BD82QM57-SLGZQ-B3_FCBGA1071~D
A A
Title
PCH (2/8)
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
D D
+3.3V_ALW_PCH
+3.3V_RUN
ME_SUS_PWR_ACK 2 1
R269 10K_0402_5%~D CLKRUN# 2 1
R282 8.2K_0402_5%~D
PCH_PCIE_WAKE# 2 1
R268 10K_0402_5%~D
SIO_SLP_LAN# 2 1
R380 10K_0402_5%~D
PCH_RI# 2 1
R267 10K_0402_5%~D
Intel request DDPB can not support eDP

U73C U73D
V1.5 BA18
DMI_CTX_PRX_N0 FDI_RXN0 V1.5
7 DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN1 BH17 T48 L_BKLTEN SDVO_TVCLKINN BJ46
DMI_CTX_PRX_N1 BJ22 BD16 T47 BG46
7 DMI_CTX_PRX_N1 DMI_CTX_PRX_N2 DMI1RXN FDI_RXN2 L_VDD_EN SDVO_TVCLKINP
7 DMI_CTX_PRX_N2 AW20 DMI2RXN FDI_RXN3 BJ16
DMI_CTX_PRX_N3 BJ20 BA16 Y48 BJ48
7 DMI_CTX_PRX_N3 DMI3RXN FDI_RXN4 L_BKLTCTL SDVO_STALLN
FDI_RXN5 BE14 SDVO_STALLP BG48
DMI_CTX_PRX_P0 BD24 BA14 AB48
C 7 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI0RXP FDI_RXN6 L_DDC_CLK C
7 DMI_CTX_PRX_P1 BG22 DMI1RXP FDI_RXN7 BC12 Y45 L_DDC_DATA SDVO_INTN BF45
DMI_CTX_PRX_P2 BA20 BH45
7 DMI_CTX_PRX_P2 DMI2RXP SDVO_INTP
DMI_CTX_PRX_P3 BG20 BB18 AB46
7 DMI_CTX_PRX_P3 DMI3RXP FDI_RXP0 L_CTRL_CLK
FDI_RXP1 BF17 V48 L_CTRL_DATA
DMI_CRX_PTX_N0 BE22 BC16
7 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI0TXN FDI_RXP2
7 DMI_CRX_PTX_N1 BF21 DMI1TXN FDI_RXP3 BG16 AP39 LVD_IBG SDVO_CTRLCLK T51
DMI_CRX_PTX_N2 BD20 AW16 AP41 T53
7 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI2TXN FDI_RXP4 LVD_VBG SDVO_CTRLDATA
7 DMI_CRX_PTX_N3 BE18 BD14
DMI3TXN FDI_RXP5
BB14 AT43
DMI_CRX_PTX_P0 FDI_RXP6 LVD_VREFH
7 DMI_CRX_PTX_P0 BD22 BD12 AT42 BG44
DMI_CRX_PTX_P1 DMI0TXP FDI_RXP7 LVD_VREFL DDPB_AUXN
7 DMI_CRX_PTX_P1 BH21 BJ44
DMI_CRX_PTX_P2 DMI1TXP DDPB_AUXP
7 DMI_CRX_PTX_P2 BC20 AU38
DMI2TXP DDPB_HPD
LVDS
DMI_CRX_PTX_P3 BD18 BJ14 AV53
7 DMI_CRX_PTX_P3 DMI3TXP FDI_INT LVDSA_CLK#
AV51 BD42
DMI
FDI
+1.05V_RUN LVDSA_CLK DDPB_0N

BF13 BC42
FDI_FSYNC0 DDPB_0P
BH25 BB47 BJ42
R385 DMI_ZCOMP LVDSA_DATA#0 DDPB_1N
BH13 BA52 BG42
Digital Display Interface

DMI_COMP_R FDI_FSYNC1 LVDSA_DATA#1 DDPB_1P
1 2 BF25 AY48 BB40
DMI_IRCOMP LVDSA_DATA#2 DDPB_2N
BJ12 AV47 BA40
49.9_0402_1%~D FDI_LSYNC0 LVDSA_DATA#3 DDPB_2P
AW38
DDPB_3N
BG14 BB48 BA38
FDI_LSYNC1 LVDSA_DATA0 DDPB_3P
BA50
PCH_PWROK R48 LVDSA_DATA1
1 2 8.2K_0402_5%~D AY49
LVDSA_DATA2
AV48 Y49
PCH_RSMRST# R260 1 LVDSA_DATA3 DDPC_CTRLCLK
2 10K_0402_5%~D AB49
DDPC_CTRLDATA
AP48
LVDSB_CLK#
AP47 BE44
XDP_DBRESET# PCH_PCIE_WAKE# LVDSB_CLK DDPC_AUXN
8,15 XDP_DBRESET# T6 J12 PCH_PCIE_WAKE# 39 BD44
SYS_RESET# WAKE# DDPC_AUXP
AY53 AV40
LVDSB_DATA#0 DDPC_HPD
AT49
SYS_PWROK CLKRUN# LVDSB_DATA#1
1 2 M6 Y1 CLKRUN# 32,39,40 AU52 BE40
B R253 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#2 DDPC_0N B
AT53 BD40
LVDSB_DATA#3 DDPC_0P
BF41
DDPC_1N
System Power Management
1 2 PCH_PWROK B17 AY51 BH41

15,40 RESET_OUT# PWROK LVDSB_DATA0 DDPC_1P
R254 0_0402_5%~D AT48 BD38
LVDSB_DATA1 DDPC_2N
AU50 BC38
PM_MEPWROK_R SUS_STAT#/LPCPD# T173 PAD~D LVDSB_DATA2 DDPC_2P
40 PM_MEPWROK 1 2 K5 P8 AT51 BB36
R256 0_0402_5%~D MEPWROK SUS_STAT# / GPIO61 LVDSB_DATA3 DDPC_3N
BA36
DDPC_3P
1 2 LAN_RST# A10 F3 SUSCLK T179 PAD~D
R257 0_0402_5%~D LAN_RST# SUSCLK / GPIO62
AA52 U50
T2 PAD~D CRT_BLUE DDPD_CTRLCLK
AB53 U52
PM_DRAM_PWRGD SIO_SLP_S5# CRT_GREEN DDPD_CTRLDATA
8 PM_DRAM_PWRGD D9 E4 AD53
DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# 40 CRT_RED
T3 PAD~D BC46
PCH_RSMRST# SIO_SLP_S4# DDPD_AUXN
40 PCH_RSMRST# C16 H7 V51 BD46
RSMRST# SLP_S4# SIO_SLP_S4# 39 CRT_DDC_CLK DDPD_AUXP
V53 AT38
T4 PAD~D CRT_DDC_DATA DDPD_HPD
ME_SUS_PWR_ACK M1 P12 SIO_SLP_S3# BJ40
40 ME_SUS_PWR_ACK SUS_PWR_DN_ACK / GPIO30 SLP_S3# SIO_SLP_S3# 39 DDPD_0N
8,15 SIO_PWRBTN#_R Y53 BG40
T5 PAD~D CRT_HSYNC DDPD_0P
Y51 BJ38
SIO_PWRBTN#_R SIO_SLP_M# CRT_VSYNC DDPD_1N
40 SIO_PWRBTN# 1 2 P5 K8 BG38
PWRBTN# SLP_M# SIO_SLP_M# 39,48 DDPD_1P
CRT
R53 0_0402_5%~D BF37
CRT_IREF DDPD_2N
AD48 BH37
AC_PRESENT DAC_IREF DDPD_2P
40 AC_PRESENT P7 N2 AB51 BE36
ACPRESENT / GPIO31 TP23 CRT_IRTN DDPD_3N
BD36
DDPD_3P
1
T6 PAD~D
+3.3V_ALW_PCH 1 2 PCH_BATLOW# A6 BJ10 H_PM_SYNC
H_PM_SYNC 8
R672 BD82QM57-SLGZQ-B3_FCBGA1071~D
R275 8.2K_0402_5%~D BATLOW# / GPIO72 PMSYNCH 1K_0402_5%~D
PCH_RI# F14 F6
2
RI# SLP_LAN# / GPIO29
A BD82QM57-SLGZQ-B3_FCBGA1071~D A
SIO_SLP_LAN#
SIO_SLP_LAN# 30,39
Title
PCH (3/8)
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
Stuff: R78,R89,R101~R116
+3.3V_RUN PCH XDP ENABLE
RP3 No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
1 8 PCI_DEVSEL#
2 7 PCI_PIRQA#
3 6 PCI_PLOCK# Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
4 5 PCI_PERR# PCH XDP DISABLE
8.2K_1206_8P4R_5%~D No Stuff: R78,R89,R101~R116
RP4
1 8 PCI_TRDY# U73E
D PCI_FRAME# V1.5 D
2 7 H40
AD0 NV_CE#0
AY9
3 6 PCI_REQ1# N34 BD1
PCI_PIRQD# AD1 NV_CE#1
4 5 C44
AD2 NV_CE#2
AP15
A38 BD8
8.2K_1206_8P4R_5%~D AD3 NV_CE#3
C36
AD4 +VCCPNAND
J34 AV9
AD5 NV_DQS0
A40 BG8
AD6 NV_DQS1
D45
AD7
1
+3.3V_RUN E36 AP7
AD8 NV_DQ0 / NV_IO0 @ R872
H48 AP6
RP5 AD9 NV_DQ1 / NV_IO1 10K_0402_5%~D
E40 AT6
PCI_PIRQB# AD10 NV_DQ2 / NV_IO2
1 8 C40 AD11 NV_DQ3 / NV_IO3 AT9
2 7 PCI_REQ0# M48 BB1
2
AD12 NV_DQ4 / NV_IO4 NV_ALE
3 6 M45 AV6
PCI_SERR# AD13 NV_DQ5 / NV_IO5
4 5 F53 AD14 NV_DQ6 / NV_IO6 BB3
M40 AD15 NV_DQ7 / NV_IO7 BA4
8.2K_1206_8P4R_5%~D
NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 AD17 NV_DQ9 / NV_IO9 BB6
RP6 K48 AD18 NV_DQ10 / NV_IO10 BD6 Danbury Technology Enabled
1 8 PCI_IRDY# F40 BB7
PCI_STOP# AD19 NV_DQ11 / NV_IO11
2 7 C42 BC8
LVDS_CBL_DET# AD20 NV_DQ12 / NV_IO12
3 6 K46 AD21 NV_DQ13 / NV_IO13 BJ8 High = Enabled (Default)
4 5 PCI_PIRQC# M51 BJ6 NV_ALE
AD22 NV_DQ14 / NV_IO14
J52 AD23 NV_DQ15 / NV_IO15 BG6 Low = Disabled
8.2K_1206_8P4R_5%~D K51 AD24 NV_ALE
L34 AD25 NV_ALE BD3
F42 AY6 NV_CLE
CAM_MIC_CBL_DET# AD26 NV_CLE
1 2 J40 AD27
R212 8.2K_0402_5%~D G46 AD28
F44 AD29 NV_RCOMP AU2
M47 AD30
BT_DET# +VCCPNAND
PCI
1 2 H36 AV7
C R590 8.2K_0402_5%~D AD31 NV_RB# C
J50 C/BE0# NV_WR#0_RE# AY8
1
1 2 SD_DET# G42 AY5
R786 8.2K_0402_5%~D C/BE1# NV_WR#1_RE# @R866
@R866
H47 C/BE2#
G34 AV11 1K_0402_5%~D
C/BE3# NV_WE#_CK0
NV_WE#_CK1 BF5
PCI_PIRQA# G38
2
PCI_PIRQB# PIRQA#
H51
PCI_GNT3# PCI_PIRQC# PIRQB# USBP0- NV_CLE
PCI_PIRQD#
B37
A44
PIRQC# USBP0N
H18
J18 USBP0+ USBP0- 37 ----->Right Side Bottom
PIRQD# USBP0P USBP1- USBP0+ 37
USBP1N
A18 USBP1- 37 ----->Right Side Top
1
PCI_REQ0# F51 C18 USBP1+

PCI_REQ1# REQ0# USBP1P USBP2- USBP1+ 37
R863
4.7K_0402_5%~D
A46
B45
REQ1# / GPIO50 USBP2N
N20
P20 USBP2+
USBP2- 37 ----->Left Side Top
36 PCIE_MCARD2_DET# BT_DET# REQ2# / GPIO52 USBP2P USBP3- USBP2+ 37
@ 41 BT_DET# M53
REQ3# / GPIO54 USBP3N
J20 USBP3- 37 ----->Left Side Bottom DMI Termination Voltage
L20 USBP3+
2
PCI_GNT0# USBP3P USBP4- USBP3+ 37

PCI_GNT1#
F48
K45
GNT0# USBP4N
F20
G20 USBP4+ USBP4- 36 ----->WLAN Set to Vss when LOW
GNT1# / GPIO51 USBP4P USBP4+ 36
PCIE_MCARD3_DET# USBP5- NV_CLE
36 PCIE_MCARD3_DET# PCI_GNT3#
F36
H53
GNT2# / GPIO53 USBP5N
A20
C20 USBP5+ USBP5- 36 ----->WWAN Set to Vcc when HIGH
GNT3# / GPIO55 USBP5P USBP6- USBP5+ 36
LVDS_CBL_DET# B41
USBP6N
M22
N22 USBP6+ USBP6- 41 ----->Blue Tooth
24 LVDS_CBL_DET# PIRQE# / GPIO2 USBP6P USBP6+ 41
SD_DET# USBP7-
A16 swap override Strap/Top-Block 33 SD_DET# CAM_MIC_CBL_DET#
K53
A36
PIRQF# / GPIO3 USBP7N
B21
D21 USBP7+ USBP7- 31 ----->BIO
24 CAM_MIC_CBL_DET# FFS_PCH_INT PIRQG# / GPIO4 USBP7P USBP8- USBP7+ 31
28,40 HDD_FALL_INT 1 2 A48 H22 USBP8- 38 ----->DOCK
PIRQH# / GPIO5 USBP8N USBP8+
Swap Override jumper R632 0_0402_5%~D
USBP8P
J22 USBP8+ 38
USB
@ R121 1 2 0_0402_5%~D PCH_PCIRST# K6 E22 USBP9-
USBP9- 38 ----->DOCK
PCIRST# USBP9N USBP9+
F22 USBP9+ 38
PCI_SERR# USBP9P USBP10- +3.3V_ALW_PCH
Low = A16 swap E44
SERR# USBP10N
A22 USBP10- 34 ----->Express Card
PCI_GNT#3 PCI_PERR# E50 C22 USBP10+
PERR# USBP10P USBP11- USBP10+ 34
High = Default USBP11N
G24 USBP11- 24 ----->Camera RP1
H24 USBP11+ USB_OC0# 4 5
B PCI_IRDY# USBP11P USBP11+ 24 USB_OC1# B
A42 L24 3 6
IRDY# USBP12N USB_OC3#
H44 M24 2 7
PCI_DEVSEL# PAR USBP12P USBP13- USB_OC4#
F46 A24 USBP13- 36 ----->PCIE/BKT 1 8
PCI_FRAME# DEVSEL# USBP13N USBP13+
C46 C24 USBP13+ 36
FRAME# USBP13P 10K_1206_8P4R_5%~D
PCI_PLOCK# D49 Within 500 mils RP2
PLOCK# USBRBIAS USB_OC5#
B25 1 2 4 5
PCI_STOP# USBRBIAS# R303 USB_OC6#
D41 3 6
R124 0_0402_5%~D PCI_TRDY# STOP# 22.6_0402_1%~D USB_OC7#
53 PLTRST_GPU# 1 2 C48 D25 2 7
R100 0_0402_5%~D TRDY# USBRBIAS USB_OC2#
31 PLTRST_USH# 1 2 1 8
R97 1 2 0_0402_5%~D M7
33 PLTRST_R5U242# PME#
R94 1 2 0_0402_5%~D N16 USB_OC0#_R R71 1 2 0_0402_5%~D 10K_1206_8P4R_5%~D
15 PLTRST_XDP# PCH_PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# 37
R14 1 2 0_0402_5%~D D5 J16 R77 1 2 0_0402_5%~D
30 PLTRST_LAN# PLTRST# OC1# / GPIO40 USB_OC2# USB_OC1# 37
F16 USB_OC2# 15
R1216 PCI_5028 OC2# / GPIO41 USB_OC3#
39 CLK_PCI_5028 2 1 22_0402_5%~D N52
CLKOUT_PCI0 OC3# / GPIO42
L16 USB_OC3# 15
R1217 2 1 22_0402_5%~D PCI_MEC P53 E14 USB_OC4#
40 CLK_PCI_MEC PCI_DOCK CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# USB_OC4# 15
R1215 1 2 22_0402_5%~D P46 G16
38 CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5# 15
P51 F12 USB_OC6# 15
16 CLK_PCI_LOOPBACK
R63 2 1 22_0402_5%~D PCI_LOOPBACKOUT P48
T15 USB_OC7#
USB_OC7# 15
+3.3V_RUN USB_OC0#_R 15
C40 USB_OC1#_R 15
1 2
0.1U_0402_16V4Z~D
5
U11
PCH_PLTRST# 1
P
B PCH_PLTRST#_EC
O
4 PCH_PLTRST#_EC 8,32,34,36,39,40 Boot BIOS Strap
2
G
A A PCI_GNT0# A
TC7SH08FU_SSOP5~D PCI_GNT#1 PCI_GNT#0 Boot BIOS Location
3
PCI_GNT1#
1K_0402_5%~D
1K_0402_5%~D
0 0 LPC
1
1
R79
R93
0 1 Reserved (NAND) Compal Electronics, Inc.
@ @
Title
2
1 0 PCI 2 PCH (4/8)

1 1 SPI 0.1
* LA-5573P
5 4 3 2 1
5 4 3 2 1
D D
R130 U73F
15 SIO_EXT_SCI#_R V1.5
0_0402_5%~D
SIO_EXT_SCI# 1 2 Y3 AH45
40 SIO_EXT_SCI# BMBUSY# / GPIO0 CLKOUT_PCIE6N
AH46
GPIO1 CLKOUT_PCIE6P
C38
TACH1 / GPIO1
GPIO6 D37
TACH2 / GPIO6 +3.3V_RUN
AF48
CLKOUT_PCIE7N
MISC
GPIO7 J32 AF47
TACH3 / GPIO7 CLKOUT_PCIE7P
SIO_EXT_SMI# F10 SIO_A20GATE 2 1
40 SIO_EXT_SMI# GPIO8 R230 8.2K_0402_5%~D
PM_LANPHY_ENABLE K9 U2 SIO_A20GATE SIO_RCIN# 2 1
30 PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 40
R231 10K_0402_5%~D
39 SIO_EXT_WAKE# T7 GPIO15
EN_ESATA_RPTR# AA2 AM3 CLK_CPU_BCLK# SIO_EXT_SCI# 1 2
15,37 EN_ESATA_RPTR# SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 8
R272 10K_0402_5%~D
SPEAKER_DET# F38 AM1 CLK_CPU_BCLK +1.05V_1.1V_RUN_VTT
29 SPEAKER_DET# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 8
1 2 SIO_EXT_SMI#
DGPU_PWROK Y7 BG10 H_PECI
39,62 DGPU_PWROK SCLOCK / GPIO22 PECI H_PECI 8
1
GPIO
@ R99 1K_0402_5%~D
H10 T1 SIO_RCIN# R237
36 PCIE_MCARD1_DET# GPIO24 RCIN# SIO_RCIN# 40
56_0402_5%~D
TP_ONDIE_PLL_VR AB12 BE10 H_CPUPWRGD
GPIO27 PROCPWRGD H_CPUPWRGD 8
CPU
2
ROUSH_PAID_TS_DET# V13 BD10 PCH_THRMTRIP#_R
15 ROUSH_PAID_TS_DET# GPIO28 THRMTRIP#
GPIO34 M11 1
+3.3V_ALW_PCH STP_PCI# / GPIO34
Internal pull up GPIO27 to USB_MCARD1_DET# V6 C33
C 36 USB_MCARD1_DET# GPIO35 0.1U_0402_16V4Z~D C
enable VccVRM
1
CONTACTLESS_DET# 2
15,31 CONTACTLESS_DET# AB7 SATA2GP / GPIO36 TP1 BA22
R1284 +3.3V_ALW_PCH
8.2K_0402_5%~D GPIO37 AB13 AW22
15 GPIO37 SATA3GP / GPIO37 TP2
@
TPM_ID0 V3 BB22
2
TP_ONDIE_PLL_VR SLOAD / GPIO38 TP3

TPM_ID1 P3 AY45
SDATAOUT0 / GPIO39 TP4 ROUSH_PAID_TS_DET# 1 2
USB_MCARD2_DET# H3 AY46 R74 10K_0402_5%~D
36 USB_MCARD2_DET# PCIECLKRQ6# / GPIO45 TP5
GPIO46 F1 AV43 SIO_EXT_SMI# 1 2
PCIECLKRQ7# / GPIO46 TP6 R274 10K_0402_5%~D
FFS_INT2 AB6 AV45
28 FFS_INT2 SDATAOUT1 / GPIO48 TP7 IO_LOOP 2 1
TEMP_ALERT# AA4 AF13 R835 100K_0402_5%~D
+3.3V_ALW_PCH 15,39 TEMP_ALERT# SATA5GP / GPIO49 / TEMP_ALERT# TP8
IO_LOOP F8 M18
37 IO_LOOP GPIO57 TP9
N18
TP10
1 2 SIO_EXT_WAKE# VSS_NCTF_1 A4
VSS_NCTF_1 TP11
AJ24
R1530 2.2K_0402_5%~D VSS_NCTF_2 A49
NCTF
VSS_NCTF_2
RSVD
1 2 GPIO46 VSS_NCTF_3 A5
VSS_NCTF_3 TP12
AK41
R1309 10K_0402_5%~D VSS_NCTF_4 A50
VSS_NCTF_5 VSS_NCTF_4
A52 AK42
VSS_NCTF_6 VSS_NCTF_5 TP13
A53
All NCTF pins should have thick VSS_NCTF_8
B2
VSS_NCTF_7 TP14
M32
+3.3V_RUN B4
traces at 45°from the pad. VSS_NCTF_9 VSS_NCTF_8
B52 N32
CONTACTLESS_DET# VSS_NCTF_10 VSS_NCTF_9 TP15
2 1 B53
R1242 10K_0402_5%~D VSS_NCTF_11 VSS_NCTF_10
BE1 M30
B GPIO37 VSS_NCTF_12 VSS_NCTF_11 TP16 B
2 1 BE53
BF1 N30
EN_ESATA_RPTR# VSS_NCTF_14 VSS_NCTF_13 TP17
2 1 BF53
BH1 H12
TEMP_ALERT# VSS_NCTF_16 VSS_NCTF_15 TP18
2 1 BH2
BH52 AA23
GPIO34 VSS_NCTF_18 VSS_NCTF_17 TP19
2 1 BH53
BJ1 AB45
VSS_NCTF_20 VSS_NCTF_19 NC_1
BJ2
SPEAKER_DET# VSS_NCTF_21 VSS_NCTF_20
1 2 BJ4 AB38
R95 8.2K_0402_5%~D VSS_NCTF_22 VSS_NCTF_21 NC_2
BJ49
GPIO1 VSS_NCTF_23 VSS_NCTF_22
1 2 BJ5 AB42
R1489 10K_0402_5%~D VSS_NCTF_24 VSS_NCTF_23 NC_3
BJ50
1 2 BJ52 AB41
BJ53
1 2 D1 T39
D2
D53
VSS_NCTF_30 VSS_NCTF_29 INIT3_3V# PAD~D T7 @
E1 P6
VSS_NCTF_31 VSS_NCTF_30 INIT3_3V#
E53
VSS_NCTF_31
C10
TP24
+3.3V_RUN
+3.3V_RUN
10K_0402_5%~D
5@
2
4@ R787
R273
20K_0402_5%~D
A A
2
1
TPM_ID0 TPM_ID1 TPM_ID0 TPM_ID1

2
1
10K_0402_5%~D
6@ China TPM 0 0
3@ R339 DELL CONFIDENTIAL/PROPRIETARY
R922
2.2K_0402_5%~D No TPM, No China TPM 0 1

USH1.0 (For SSI) 1 0
-----> will use MEMO control pop R339
1
Title
USH2.0 1 1 & de-pop R787 when USH1.0 enable PCH (5/8)
for SSI build only Size Document Number Rev
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
PCH Power Rail Table

+1.05V_RUN S0 Iccmax
+3.3V_RUN Voltage Rail Voltage
U73G POWER
V1.5
Current (A)
AB24 VCCCORE[1] VCCADAC[1] AE50
AB26 VCCCORE[2]
V_CPU_IO 1.1/1.05 < 1 (mA)
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1 1 AB28 VCCCORE[3] VCCADAC[2] AE52
AD26
VCCCORE[4]
C1139
C77
CRT
AD28
VCCCORE[5] VSSA_DAC[1]
AF53 V5REF 5 < 1 (mA)
AF26
D 2 2 VCCCORE[6] D
VCC CORE
AF28 AF51
VCCCORE[7] VSSA_DAC[2]
AF30
VCCCORE[8]
V5REF_Sus 5 < 1 (mA)
AF31
VCCCORE[9]
AH26
VCCCORE[10]
AH28
VCCCORE[11]
Vcc3_3 3.3 0.357
AH30
VCCCORE[12]
AH31 AH38
VCCCORE[13] VCCALVDS
AJ30
VCCCORE[14]
VccAClk 1.1 0.052
AJ31 AH39
VCCCORE[15] VSSA_LVDS
VccADAC 3.3 0.069
+1.05V_RUN AP43
VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 VccADPLLA 1.1 0.068
LVDS
VCCTX_LVDS[3]
AK24 VCCIO[24] VCCTX_LVDS[4] AT45
Place C78 Near BJ24 pin VccADPLLB 1.1 0.069

BJ24 VCCAPLLEXP
VCC3_3[2] AB34
1U_0402_6.3V6K~D
1 VccapllEXP 1.1 0.04
AN20 VCCIO[25] VCC3_3[3] AB35
C78
AN22
HVCMOS
VCCIO[26]
AN23 VCCIO[27] VCC3_3[4] AD35 +3.3V_RUN VccCore 1.1 1.432
2 @
AN24 VCCIO[28]
AN26 VCCIO[29] 1
AN28 VCCIO[30]
VccDMI 1.1 0.058
BJ26 C93
VCCIO[31]
BJ28 VCCIO[32] 0.1U_0402_10V7K~D
2 VccDMI 1.1 0.061
AT26 VCCIO[33]
AT28 VCCIO[34]
+1.05V_RUN AU26 VCCIO[35] +1.5V_1.8V_RUN_VCCADMI_VRM
AU28 VCCIO[36]
VccFDIPLL 1.1 0.037
C C
AV26 VCCIO[37]
AV28 AT24 1 2 +1.05V_+1.5V_1.8V_RUN
VCCIO[38] VCCVRM[2] R391
AW26 VCCIO[39]
VccIO 1.1 3.062
10U_0805_4VAM~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 1 1 1 AW28 0_0603_5%~D
VCCIO[40]
DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C80
C81
C82
C83
C84
BA28 VCCIO[42]
C1140 near pin AT16 VccLAN 1.1 0.32
BB26 VCCIO[43] VCCDMI[2] AU16 +1.05V_1.1V_RUN_VTT
2 2 2 2 2
BB28 1
VCCIO[44]
BC26
VCCIO[45]
VccME 1.1 1.849
PCI E*
BC28 C1140
VCCIO[46] 1U_0402_6.3V6K~D
BD26
VCCIO[47] 2
BD28
VCCIO[48]
VccME3_3 3.3 0.085
BE26 AM16 +VCCPNAND @ R489
+3.3V_RUN VCCIO[49] VCCPNAND[1] 0_0805_5%~D
BE28 AK16
VCCIO[50] VCCPNAND[2]
BG26
AK20 1 2 +3.3V_RUN VccpNAND 1.8 0.156
BG28 AK19
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
BH27 AK15
1 VCCPNAND[6]
AK13 1 1 2 +1.8V_RUN VccRTC 3.3 2 (mA)
AN30 AM12
C85
C94
R495
NAND / SPI
AN31 AM13
VCCIO[55] VCCPNAND[8] 0_0805_5%~D
VCCPNAND[9]
AM15 VccSATAPLL 1.1 0.031
2 2
AN35
VCC3_3[1]
VccSus3_3 3.3 0.163
+VCCAFDI_VRM AT22
VCCVRM[1]
Place C22 Near BJ18 pin VccSusHDA 3.3 0.006
BJ18 AM8 +3.3V_M
VCCFDIPLL VCCME3_3[1]
AM9
VCCME3_3[2]
1U_0402_6.3V6K~D
FDI
1 +1.05V_RUN AM23
VCCIO[1] VCCME3_3[3]
AP11 1 VccVRM 1.8 / 1.5 0.196
AP9
VCCME3_3[4]
C22
C95
B 0.1U_0402_10V7K~D VccVRM 1.05 < 1 (mA) B
2 @ 2
VccALVDS 3.3 < 1 (mA)
VccTX_LVDS 1.8 0.059

+1.05V_+1.5V_1.8V_RUN
R390
0_0603_5%~D
1 2 +VCCAFDI_VRM
+1.5V_RUN +1.05V_+1.5V_1.8V_RUN
@ R96
2 1 +1.05V_+1.5V_1.8V_RUN
+1.8V_RUN 0_0603_5%~D
2 1
R387
+1.05V_RUN 0_0603_5%~D
2 1
@ R80
@R80
0_0603_5%~D
A A
Title
PCH (6/8)
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
Place C39 Near AP51 pin

+VCCACLK
+5V_ALW +5V_ALW_PCH
1U_0402_6.3V6K~D
R651
1 U73J POWER
V1.5
R499 0_0603_5%~D
0_0603_5%~D
S
2 1 1 3
C39
0.1U_0402_10V7K~D
AP51 V24 +1.05V_RUN_VCCUSBCORE 2 1
VCCACLK[1] VCCIO[5] +1.05V_RUN
20K_0402_5%~D
V26 Q10
VCCIO[6]
1
2 @ AP53 Y24 SSM3K7002FU_SC70-3~D
1 1
G
2
+1.05V_M VCCACLK[2] VCCIO[7]
R57
Y26
VCCIO[8]
C18
D C96 D
1 2 +1.05V_M_VCCAUX AF23 V28 1U_0402_6.3V6K~D
VCCLAN[1] VCCSUS3_3[1] 2 42 ALW_ENABLE 2
1U_0402_6.3V6K~D
R669 1 U28
2
0_0603_5%~D VCCSUS3_3[2]
AF24 U26
VCCLAN[2] VCCSUS3_3[3]
C100
U24
VCCSUS3_3[4]
P28
2 +TP_PCH_VCCDSW Y20 VCCSUS3_3[5]
P26
DCPSUSBYP VCCSUS3_3[6] R500
1 N28
VCCSUS3_3[7] 0_0603_5%~D
N26
C110 VCCSUS3_3[8] +3.3V_ALW_VCCPUSB
AD38 M28 2 1 +3.3V_ALW_PCH
0.1U_0402_10V7K~D VCCME[1] VCCSUS3_3[9] +5V_ALW_PCH +3.3V_ALW_PCH
M26
+1.05V_M 2 VCCSUS3_3[10]
0.1U_0402_10V7K~D
R674 AD39 L28
USB
0_0805_5%~D VCCME[2] VCCSUS3_3[11]
Place C116 Near AD38 pin VCCSUS3_3[12] L26 1
2
1 2 +1.05V_M_VCCEPW AD41 J28
VCCME[3] VCCSUS3_3[13]
C97
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1 1 1 J26 R313 D16
VCCSUS3_3[14] 100_0402_5%~D
AF43 VCCME[4] VCCSUS3_3[15] H28 RB751S40T1_SOD523-2~D
2
C116
C112
C101
VCCSUS3_3[16] H26
AF41 G28
1
2 2 @ 2 VCCME[5] VCCSUS3_3[17] +PCH_V5REF_SUS
VCCSUS3_3[18] G26
AF42 VCCME[6] VCCSUS3_3[19] F28 1
VCCSUS3_3[20] F26
V39 E28 C342
VCCME[7] VCCSUS3_3[21] 1U_0603_10V6K~D
E26
Clock and Miscellaneous

VCCSUS3_3[22] +3.3V_ALW_VCCPUSB 2
0.1U_0402_10V7K~D
V41 VCCME[8] VCCSUS3_3[23] C28
22U_0805_6.3V6M~D
22U_0805_6.3V6M~D
1U_0402_6.3V6K~D
1 1 1 VCCSUS3_3[24] C26 1
Place C117 Near V39 pin V42 VCCME[9] VCCSUS3_3[25] B27 Follow DG 1.11
C99
C117
C111
C102
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
2 2 @ 2 2
Y41 U23 +5V_RUN +3.3V_RUN
VCCME[11] VCCSUS3_3[28]
Y42 VCCME[12] VCCIO[56] V23 +1.05V_RUN
2
C C
F24 +PCH_V5REF_SUS R311 D15
V5REF_SUS 100_0402_5%~D RB751S40T1_SOD523-2~D
+VCCRTCEXT V9 DCPRTC
1
1
+PCH_V5REF_RUN
C103 K49 +PCH_V5REF_RUN 1
0.1U_0402_10V7K~D V5REF R517 +3.3V_RUN
+1.05V_+1.5V_1.8V_RUN AU24
PCI/GPIO/LPC
2 VCCVRM[3] 0_0805_5%~D C335
J38 +3.3V_RUN_VCCPPCI 2 1 1U_0603_10V6K~D
VCC3_3[8] 2
+1.05V_RUN BB51
VCCADPLLA[1]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1 1 BB53 L38 1
VCCADPLLA[2] VCC3_3[9]
C1881
Place C105 Near BB51 pin C1883

C106 Near BD51 pin M36 C356
VCC3_3[10] 0.1U_0402_10V7K~D
BD51
+1.05V_RUN 2 @ 2 @ VCCADPLLB[1] 2
BD53 N36
VCCADPLLB[2] VCC3_3[11] +3.3V_RUN
AH23 P36
VCCIO[21] VCC3_3[12]
AJ35
VCCIO[22]
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
AH35 U35 1
VCCIO[23] VCC3_3[13]
1 1 1
AF34 C1203
VCCIO[2]
C108
C138
C139
AD13 0.1U_0402_10V7K~D
VCC3_3[14] 2
AH34
2 2 2 VCCIO[3]
AF32
VCCIO[4]
AK3
VCCSATAPLL[1]
1U_0402_6.3V6K~D
+VCCSST V12 AK1 +VCCSATAPLL
DCPSST VCCSATAPLL[2]
1 Place C610 Near AK3 pin
0.1U_0402_10V7K~D
C610
C217
0.1U_0402_10V7K~D
+DCPSUS Y22
B DCPSUS 2 @ B
1 AH22
2 VCCIO[9]
C677
P18 AT20 +1.05V_+1.5V_1.8V_RUN

2 VCCSUS3_3[29] VCCVRM[4]
+3.3V_ALW_PCH R690 U19
SATA
VCCSUS3_3[30]
0.1U_0402_10V7K~D
0_0805_5%~D R557
PCI/GPIO/LPC
AH19
+3.3V_ALW_VCCPSUS VCCIO[10] 0_0805_5%~D
1 2 U20
VCCSUS3_3[31] +VCCIO
1 AD20 2 1 +1.05V_RUN
VCCIO[11]
U22
VCCSUS3_3[32]
C759
1U_0402_6.3V6K~D
AF22 1
VCCIO[12]
2
C611
AD19
+3.3V_RUN R691 VCCIO[13]
V15 AF20
0_0805_5%~D VCC3_3[5] VCCIO[14] 2
AF19
+3.3_RUN_VCCPCORE VCCIO[15]
1 2 V16 AH20
VCC3_3[6] VCCIO[16]
1
Y16 AB19
C760 VCC3_3[7] VCCIO[17]
AB20
0.1U_0402_10V7K~D VCCIO[18] +1.05V_M
AB22
+1.05V_1.1V_RUN_VTT R692 2 VCCIO[19]
AD22
0_0603_5%~D VCCIO[20]
AT18
V_CPU_IO[1]
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2 +V_CPU_IO AA34 +VCCME_13 R559 2 1 0_0603_5%~D

CPU
VCCME[13] +VCCME_14 R573 0_0603_5%~D

1 1 1 Y34 2 1
VCCME[14] +VCCME_15 R591 0_0603_5%~D
AU18 Y35 2 1
V_CPU_IO[2] VCCME[15]
C777
C113
C763 AA35 +VCCME_16 R592 1 2 0_0603_5%~D

4.7U_0603_6.3V6K~D +RTC_CELL VCCME[16]
2 2 2
RTC
A12 L30 +VCCSUSHDA 2 1

VCCRTC VCCSUSHDA +3.3V_ALW_PCH
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
HDA
R650
1 1 1 0_0603_5%~D
C781
C783
A C672 A
1U_0402_6.3V6K~D
2 2 2
Title
PCH (7/8)
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
U73I
AY7 V1.5 H49
VSS[159] VSS[259]
B11 VSS[160] VSS[260] H5
B15 J24
VSS[161] VSS[261]
B19 K11
VSS[162] VSS[262]
B23 K43
D U73H VSS[163] VSS[263] D
B31 K47
V1.5 VSS[164] VSS[264]
AB16 B35 K7
VSS[0] VSS[165] VSS[265]
B39 L14
VSS[166] VSS[266]
AA19 AK30 B43 L18
VSS[1] VSS[80] VSS[167] VSS[267]
AA20 AK31 B47 L2
VSS[2] VSS[81] VSS[168] VSS[268]
AA22 AK32 B7 L22
VSS[3] VSS[82] VSS[169] VSS[269]
AM19 AK34 BG12 L32
VSS[4] VSS[83] VSS[170] VSS[270]
AA24 AK35 BB12 L36
VSS[5] VSS[84] VSS[171] VSS[271]
AA26 AK38 BB16 L40
VSS[6] VSS[85] VSS[172] VSS[272]
AA28 AK43 BB20 L52
VSS[7] VSS[86] VSS[173] VSS[273]
AA30 AK46 BB24 M12
VSS[8] VSS[87] VSS[174] VSS[274]
AA31 VSS[9] VSS[88] AK49 BB30 VSS[175] VSS[275] M16
AA32 VSS[10] VSS[89] AK5 BB34 VSS[176] VSS[276] M20
AB11 VSS[11] VSS[90] AK8 BB38 VSS[177] VSS[277] N38
AB15 VSS[12] VSS[91] AL2 BB42 VSS[178] VSS[278] M34
AB23 VSS[13] VSS[92] AL52 BB49 VSS[179] VSS[279] M38
AB30 VSS[14] VSS[93] AM11 BB5 VSS[180] VSS[280] M42
AB31 VSS[15] VSS[94] BB44 BC10 VSS[181] VSS[281] M46
AB32 VSS[16] VSS[95] AD24 BC14 VSS[182] VSS[282] M49
AB39 VSS[17] VSS[96] AM20 BC18 VSS[183] VSS[283] M5
AB43 VSS[18] VSS[97] AM22 BC2 VSS[184] VSS[284] M8
AB47 VSS[19] VSS[98] AM24 BC22 VSS[185] VSS[285] N24
AB5 VSS[20] VSS[99] AM26 BC32 VSS[186] VSS[286] P11
AB8 VSS[21] VSS[100] AM28 BC36 VSS[187] VSS[287] AD15
AC2 VSS[22] VSS[101] BA42 BC40 VSS[188] VSS[288] P22
AC52 VSS[23] VSS[102] AM30 BC44 VSS[189] VSS[289] P30
AD11 VSS[24] VSS[103] AM31 BC52 VSS[190] VSS[290] P32
AD12 VSS[25] VSS[104] AM32 BH9 VSS[191] VSS[291] P34
AD16 VSS[26] VSS[105] AM34 BD48 VSS[192] VSS[292] P42
AD31 VSS[29] VSS[108] AM39 BE12 VSS[195] VSS[295] R2
C C
AD32 VSS[30] VSS[109] AM42 BE16 VSS[196] VSS[296] R52
AD34 VSS[31] VSS[110] AU20 BE20 VSS[197] VSS[297] T12
AU22 VSS[32] VSS[111] AM46 BE24 VSS[198] VSS[298] T41
AD42 VSS[33] VSS[112] AV22 BE30 VSS[199] VSS[299] T46
AD46 VSS[34] VSS[113] AM49 BE34 VSS[200] VSS[300] T49
AD49 VSS[35] VSS[114] AM7 BE38 VSS[201] VSS[301] T5
AD7 VSS[36] VSS[115] AA50 BE42 VSS[202] VSS[302] T8
AE2 BB10 BE46 U30
VSS[37] VSS[116] VSS[203] VSS[303]
AE4 AN32 BE48 U31
VSS[38] VSS[117] VSS[204] VSS[304]
AF12 AN50 BE50 U32
VSS[39] VSS[118] VSS[205] VSS[305]
Y13 AN52 BE6 U34
VSS[40] VSS[119] VSS[206] VSS[306]
AH49 AP12 BE8 P38
VSS[41] VSS[120] VSS[207] VSS[307]
AU4 AP42 BF3 V11
VSS[42] VSS[121] VSS[208] VSS[308]
AF35 AP46 BF49 P16
VSS[43] VSS[122] VSS[209] VSS[309]
AP13 AP49 BF51 V19
VSS[44] VSS[123] VSS[210] VSS[310]
AN34 AP5 BG18 V20
VSS[45] VSS[124] VSS[211] VSS[311]
AF45 AP8 BG24 V22
VSS[46] VSS[125] VSS[212] VSS[312]
AF46 AR2 BG4 V30
VSS[47] VSS[126] VSS[213] VSS[313]
AF49 AR52 BG50 V31
VSS[48] VSS[127] VSS[214] VSS[314]
AF5 AT11 BH11 V32
VSS[49] VSS[128] VSS[215] VSS[315]
AF8 BA12 BH15 V34
VSS[50] VSS[129] VSS[216] VSS[316]
AG2 AH48 BH19 V35
VSS[51] VSS[130] VSS[217] VSS[317]
AG52 AT32 BH23 V38
VSS[52] VSS[131] VSS[218] VSS[318]
AH11 AT36 BH31 V43
VSS[53] VSS[132] VSS[219] VSS[319]
AH15 AT41 BH35 V45
VSS[54] VSS[133] VSS[220] VSS[320]
AH16 AT47 BH39 V46
VSS[55] VSS[134] VSS[221] VSS[321]
AH24 AT7 BH43 V47
VSS[56] VSS[135] VSS[222] VSS[322]
AH32 AV12 BH47 V49
VSS[57] VSS[136] VSS[223] VSS[323]
AV18 AV16 BH7 V5
VSS[58] VSS[137] VSS[224] VSS[324]
AH43 AV20 C12 V7
VSS[59] VSS[138] VSS[225] VSS[325]
AH47 AV24 C50 V8
VSS[60] VSS[139] VSS[226] VSS[326]
AH7 AV30 D51 W2
B VSS[61] VSS[140] VSS[227] VSS[327] B
AJ19 AV34 E12 W52
VSS[62] VSS[141] VSS[228] VSS[328]
AJ2 AV38 E16 Y11
VSS[63] VSS[142] VSS[229] VSS[329]
AJ20 AV42 E20 Y12
VSS[64] VSS[143] VSS[230] VSS[330]
AJ22 AV46 E24 Y15
VSS[65] VSS[144] VSS[231] VSS[331]
AJ23 AV49 E30 Y19
VSS[66] VSS[145] VSS[232] VSS[332]
AJ26 AV5 E34 Y23
VSS[67] VSS[146] VSS[233] VSS[333]
AJ28 AV8 E38 Y28
VSS[68] VSS[147] VSS[234] VSS[334]
AJ32 AW14 E42 Y30
VSS[69] VSS[148] VSS[235] VSS[335]
AJ34 AW18 E46 Y31
VSS[70] VSS[149] VSS[236] VSS[336]
AT5 AW2 E48 Y32
VSS[71] VSS[150] VSS[237] VSS[337]
AJ4 BF9 E6 Y38
VSS[72] VSS[151] VSS[238] VSS[338]
AK12 AW32 E8 Y43
VSS[73] VSS[152] VSS[239] VSS[339]
AM41 AW36 F49 Y46
VSS[74] VSS[153] VSS[240] VSS[340]
AN19 AW40 F5 P49
VSS[75] VSS[154] VSS[241] VSS[341]
AK26 AW52 G10 Y5
VSS[76] VSS[155] VSS[242] VSS[342]
AK22 AY11 G14 Y6
VSS[77] VSS[156] VSS[243] VSS[343]
AK23 AY43 G18 Y8
VSS[78] VSS[157] VSS[244] VSS[344]
AK28 AY47 G2 P24
VSS[79] VSS[158] VSS[245] VSS[345]
G22 T43
BD82QM57-SLGZQ-B3_FCBGA1071~D VSS[246] VSS[346]
G32 AD51
VSS[247] VSS[347]
G36 AT8
VSS[248] VSS[348]
G40 AD47
VSS[249] VSS[349]
G44 Y47
VSS[250] VSS[350]
G52 AT12
VSS[251] VSS[351]
AF39 AM6
VSS[252] VSS[352]
H16 AT13
VSS[253] VSS[353]
H20 AM5
VSS[254] VSS[354]
H30 AK45
VSS[255] VSS[355]
H34 AK39
VSS[256] VSS[356]
H38 AV14
VSS[257] VSS[366]
H42
VSS[258]
A A
Title
PCH (8/8)
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
+5V_RUN
+3.3V_M
Discrete
1
+5V_RUN +5V_RUN
1
@ R136 VGA_THERMDP VGA_THERMDP 54
4.7U_0603_10V6K~D
4.7U_0603_10V6K~D
10K_0402_5%~D
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
1 1 1 1 R142 1
2
@ @ @ @ 10K_0402_5%~D
C391
C72
C406
C73
+5V_RUN @ U140 @ R156 C1706
2
1 FAN1_TACH_FB 10K_0402_5%~D 470P_0402_50V7K~D
2 2 2 2 TACH FAN_OK +FAN1_VOUT VGA_THERMDN 2
11 VDD FAN_OKAY 2 2 1 +3.3V_RUN VGA_THERMDN 54
17 FAN1_TACH_FB
VDD
RB751S40T1_SOD523-2~D
22U_0805_6.3VAM~D
7 @ C434 1 2 1U_0402_6.3V6K~D Place Capacitor close to Guardian Chip
C_FILT
1
16 1
PARAM_SEL1
C219
D D
3 9 @ R1463 1 2 0.27_1210_1%~D
PARAM_SEL2 I_RET
0_0402_5%~D
D2
4
PARAM_SEL3
27K_0402_5%~D
R1457
Close to U140 pin 11 Close to U140 pin 17 5 12 PHASE_W_R @ R531 1 2 0_0805_5%~D PHASE_W JFAN1
PARAM_SEL4 PHASE_W 2
15K_0402_5%~D
R138
@ R536 13 PHASE_V_R @ R534 1 2 0_0805_5%~D PHASE_V FAN1_DET# R5071 2 0_0402_5%~D PHASE_U 1
2
PHASE_V 1
15K_0402_5%~D
MOT_COM
1 2 MOT_COM_R 10 14 PHASE_U_R @ R535 1 2 0_0805_5%~D PHASE_U +FAN1_VOUT R5161 2 0_0805_5%~D PHASE_V 2
MOT_COM PHASE_U 2
1
+3.3V_M
R1458
@ @ 0_0805_5%~D FAN1_TACH_FB R5191 2 0_0402_5%~D PHASE_W 3 5
2
3 G1
R1462
29,40,53 DAI_GPU_R3P_SMBCLK 18 8 R5291 2 0_0805_5%~D MOT_COM 4 6
2
SMCLK GND 4 G2
29,40,53 DAI_GPU_R3P_SMBDAT 19 15
SMDATA GND
1
@ 21 MOLEX_53398-0471~D
2
R134 @ PWM GND
20
2
8.2K_0402_5%~D PWM
6 IMVP_IMON 11,50
N/C R998
TPF3000-BP-TR_QFN20_4X4~D 1 2 MAX8731_IINP 51
2
+1.05V_1.1V_RUN_VTT THERMATRIP1#
R135 4.7K_0402_5%~D
1
2.2K_0402_5%~D C 1
1 2 2
B C218
Q5 E 0.1U_0402_16V4Z~D
3
PMST3904_SOT323-3~D 2
8 H_THERMTRIP# 40 BC_DAT_EMC4002
Place under CPU
Place C223 close to the Q8 as possible 40 BC_CLK_EMC4002
Place C224, close to the Guardian pins as possible
1
Diode circuit at DP2/DN2 is used
R1408
for skin temp sensor (placed
1
2 C 2 0_0402_5%~D
optimally @ C223 2 C224
between CPU, MCH and MEM). 100P_0402_50V8K~D B 2200P_0402_50V7K~D
2
E Q8
3
1 MMBT3904WT1G_SC70-3~D 1
C U3 C
BC_DAT_EMC4002 10 SMDATA/BC-LINK_DATA
1
1 C 1 BC_CLK_EMC4002 11 39
Place C221 close to the SMCLK/BC-LINK_CLK VIN1
2 VCP1 48
C222 @ Q7 B C221 Guardian pins as possible. 45
100P_0402_50V8K~D MMBT3904WT1G_SC70-3~D E VCP2
3
2 2200P_0402_50V7K~D 2 REM_DIODE1_P VGA_THERMDP

36 44
REM_DIODE1_N DP1/VREF_T DP4/DN8 VGA_THERMDN
Place C222 close to Q7 as 35 43
DN1/THERM DN4/DP8
possible.
REM_DIODE2_P 38 47
REM_DIODE2_N DP2 DP5/DN9
37 46
DN2 DN5/DP9
1 1
1
Q9 Place near DIMM C C228 REM_DIODE3_P 41 1

@ C227
@C227 2200P_0402_50V7K~D REM_DIODE3_N DP3/DN7 DP6/VREF_T2
2 40 2 GPU_IMON 62
100P_0402_50V8K~D B DN3/DP7 DN6/VIN2
Place C227 close 2 2
Q9 E
3
to Q9 MMBT3904WT1G_SC70-3~D 2 1 +3.3V_M
+3.3V_M R1218 1 2 22_0402_5%~D +VCC_4002 4 R141 10K_0402_5%~D
VDD
12 BC_INT#_EMC4002 40
ATF_INT#/BC-LINK_IRQ# POWER_SW#
1 +RTC_CELL 21 26
RTC_PWR3V POWER_SW#
1U_0402_6.3V6K~D
1 27 ACAV_IN 40,51,52
C229 +3.3V_M ACAVAIL_CLR PWM
20 2 1 +3.3V_M
THERMTRIP_SIO/PWM1/GPIO5
C230
0.1U_0402_16V4Z~D 25 R145 10K_0402_5%~D THERM_STP# 45

2 SYS_SHDN#
1 2 18 1 2 +RTC_CELL
+3.3V_M 2 R146 1 VDD_PWRGD
40 PCH_PWRGD# 2 10K_0402_5%~D 17 3V_PWROK#
@ R147 47K_0402_1%~D
R148 1K_0402_5%~D
THERMATRIP1# 22
THERMATRIP2# THERMTRIP1#
23
THERMTRIP2#
1
THERMATRIP3# 24 19 2 1
R137 THERMTRIP3# LDO_SHDN# R211 10K_0402_5%~D
8.2K_0402_5%~D VSET 42 34
B VSET LDO_POK B
1
1 +VCC_4002 2 1 3 33 LDO_SET
2
R151 +5V_RUN R150 4.7K_0402_5%~D ADDR_MODE/XEN LDO_SET

THERMATRIP2# C231 953_0402_1%~D
1
0.1U_0402_16V4Z~D 6 32 +3.3V_M
2 VDDH1 VDDH2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
1 5 31 R154
2
+3.3V_RUN VDDH1 VDDH2

C220 1 1 9 28 1K_0402_5%~D
VDDL1 VDDL2
C235
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
2
2
C234
Rset=953,Tp=88degree 1 1 +FAN1_VOUT 7 29
FAN_OUT1 LDO_OUT/FAN_OUT2 FAN1_DET#
8 30 2 1
2 2 FAN_OUT1 LDO_OUT/FAN_OUT2
C236
C237
R1498 10K_0402_5%~D
FAN1_TACH_FB 15 16 FAN1_DET# @ R594 1 2 0_0402_5%~D FAN_OK
2 2 TACH1/GPIO3 TACH2/GPIO4
14 13 PM_EXTTS# 8
CLK_IN/GPIO2 PWM2/GPIO1
VSS
EC_32KHZ_OUT
40 EC_32KHZ_OUT
EMC4002-HZH C_QFN48_7X7~D
49
+3.3V_M
+3.3V_RUN
+RTC_CELL C1050
0.1U_0402_16V4Z~D
1
1 2
8.2K_0402_5%~D
R155 Pull-up Resistor For Remote1 SMBUS
5
1
1
2.2K_0402_5%~D
8.2K_0402_5%~D U68
on ADDR_MODE/XEN mode Address TC7SH08FU_SSOP5~D 1
P
B DOCK_PWR_SW# 40
R1401
R1402
POWER_SW# 4 O
2
* <= 4.7K +/- 5% 2N3904 2F(r/w) A

2 POWER_SW_IN# 40
G
THERMATRIP3#
2
A A
10K 2N3904 2E(r/w)
3
1
C 1
THERM_B3 2 Q188 18K Thermistor 2F(r/w)
B PMST3904_SOT323-3~D C240
E 0.1U_0402_16V4Z~D >= 33K Thermistor 2E(r/w)
3
2
53 THERMTRIP_VGA#
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
LA-5573P
5 4 3 2 1
5 4 3 2 1
LCD Power Q12

JEDP1 SI3456BDV-T1-E3_TSOP6~D
45 44 LVDS_CBL_DET# 2 1 +LCDVDD +15V_ALW +LCDVDD +3.3V_ALW
D
MGND1 CONNTST LVDS_CBL_DET# 18 +LCDVDD
R180 0_0402_5%~D
S
46 MGND2 GND 43 6
+LCDVDD +15V_ALW
0.1U_0402_16V4Z~D
47 42 EDP_LANE_N1 LCD_SMBCLK 2 1 2 1 4 5
MGND3 LANE1_N +3.3V_RUN
1
48 41 EDP_LANE_P1 R548 2.2K_0402_5%~D @ R181 0_0402_5%~D 2
MGND4 LANE1_P LCD_SMBDAT
49 MGND5 GND 40 2 1 1 1
1
130_0402_5%~D
100K_0402_5%~D
EDP_LANE_N0 R549 2.2K_0402_5%~D R158
G
50 MGND6 LANE0_N 39 1
1
C244
R161
51 38 EDP_LANE_P0 100K_0402_5%~D
3
MGND7 LANE0_P
R162
52 37 C241
2
MGND8 GND MB_EDP_AUX C295 1 2
53 MGND9 AUX_CH_P 36 2 0.1U_0402_10V7K~D DPD_GPU_EDP_AUX 54
0.1U_0402_16V4Z~D
2
54 35 MB_EDP_AUX# C314 1 2 0.1U_0402_10V7K~D
6 2
MGND10 AUX_CH_N DPD_GPU_EDP_AUX# 54
0.1U_0402_25V4Z~D
55 34
2
MGND11 GND
3
56
MGND12 LCD_VCC
33 Close to JEDP1.18,19 1
57 32 +LCDVDD
MGND13 LCD_VCC
Q13B
C242
D Q13A D
31
LCD_VCC LCD_TST DMN66D0LDW-7_SOT363-6~D
30 1 2 LCD_TST 39 2 5
TEST R667 1K_0402_5%~D 2
29
GND
1
28 DPD_GPU_EDP_HPD
4
HPD DPD_GPU_EDP_HPD 53 +3.3V_RUN
27 D3
BL_GND
26
BL_GND
25 +BL_PWR_SRC 39,53 ENVDD_GPU 2
BL_PWR
1
24 1 EN_LCDPWR 2
BL_PWR C246 1 0.1U_0603_50V4Z~D R165
23 2
BL_PWR 10K_0402_5%~D Q15
22 39 LCD_VCC_TEST_EN 3
BL_PWR PDTC124EU_SC70-3~D
21
BL_GND
20
3
BL_GND BAT54CW_SOT323-3~D
BL_PWM 19 1 2 BIA_PWM_GPU 53
18 LCD_SMBCLK @ R166
SMBUS_CLK LCD_SMBDAT LCD_SMBCLK 40
17 0_0402_5%~D
SMBUS_DATA LCD_SMBDAT 40
ALS_VCC 16 +3.3V_RUN
15 ALS_INT#
ALS_INT# ALS_INT# 39
GND 14
13 CAM_MIC_CBL_DET#
CAM_MIC_CBL_DET# USBP11_D+ CAM_MIC_CBL_DET# 18
USB+ 12
11 USBP11_D- @ L59
USB- DLW21SN121SQ2L_4P~D
USB_VCC 10 +CAMERA_VDD
DMIC_CLK USBP11+ USBP11_D+ Q17
MIC_CLK 9 DMIC_CLK 29 18 USBP11+ 1 1 2 2
8 +PWR_SRC FDC654P_SSOT6~D
MIC_GND
7 DMIC0 40mil
40mil
D
MIC_DAT DMIC0 29
USBP11- USBP11_D-
S
GND 6 18 USBP11- 4 4 3 3 6 +BL_PWR_SRC
5 BREATH_BLUE_LED 4 5
PWR_LED BATT_YELLOW_LED BREATH_BLUE_LED 43
BATT2_LED 4 BATT_YELLOW_LED 43 2
1000P_0402_50V7K~D
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
3 BATT_BLUE_LED 1 2 1
BATT1_LED BATT_BLUE_LED 43
G
2 R457 0_0402_5%~D 1
GND
1
D49
1 1
3
CONNTST
D48
1 2 R167 C247
C248
C @ R513 0_0402_5%~D 100K_0402_5%~D 0.1U_0603_50V4Z~D C
I-PEX_20505-044E-011G @ 2
2
2
2
@ U50 PWR_SRC_ON
1 GND 4
USBP11_D-
VCC
USBP11_D+
+CAMERA_VDD
eDP Repeater +3.3V_RUN Q18
SSM3K7002FU_SC70-3~D
2 3
IO1 IO2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
U46 1 2 1 3
S
PRTR5V0U2X_SOT143-4~D 1 1 R168 47K_0402_5%~D
C265 1 2 0.1U_0402_10V7K~D DPD_EDP_LANE_P0_C 2
IN 0(p) VCC
4
54 DPD_GPU_LANE_P0 C351 1 2 0.1U_0402_10V7K~D DPD_EDP_LANE_N0_C 3 24
G
2
54 DPD_GPU_LANE_N0 IN 0(n) VCC
C200
C196
+3.3V_RUN C350 1 2 0.1U_0402_10V7K~D DPD_EDP_LANE_P1_C 5 2 2
54 DPD_GPU_LANE_P1 IN 1(p)
C266 1 2 0.1U_0402_10V7K~D DPD_EDP_LANE_N1_C 6
54 DPD_GPU_LANE_N1 IN 1(n)
DP119_EN EDP_LANE_P0
FDC654P: P CHANNAL
R361 1 2 20K_0402_5%~D C271 2 1 0.1U_0402_10V7K~D DPD_EDP_LANE_P0_RP 26 8 40 EN_INVPWR
EN_INVPWR
VOD_CTL EDP_LANE_N0 OUT 0(p) NC
R328 1 2 20K_0402_5%~D C358 2 1 0.1U_0402_10V7K~D DPD_EDP_LANE_N0_RP 25 OUT 0(n) NC
9
@ R336 1 2 20K_0402_5%~D VOD_CTL0 10
EQ_CTL EDP_LANE_P1 NC
R338 1 2 20K_0402_5%~D C359 2 1 0.1U_0402_10V7K~D DPD_EDP_LANE_P1_RP 23 OUT1 (p) NC
11
R357 1 2 20K_0402_5%~D PRECTL EDP_LANE_N1 C225 2 1 0.1U_0402_10V7K~D DPD_EDP_LANE_N1_RP 22 12 Panel backlight power control by EC
@ R356 4.99K_0402_1%~D PUP5K OUT1 (n) NC
1 2 13
NC
16
DP119_EN NC
14 17
DP119_EN EQ_CTL EN NC
@ R360 1 2 20K_0402_5%~D X1EDP & DP119 co-lay circuit: (Defult DP119) 15
EQ_CTL NC
18
@ R279 1 2 20K_0402_5%~D VOD_CTL 19
@ R1027 1 2 20K_0402_5%~D VOD_CTL0
X1EDP->R356,R1031,R336,R279,R1029==>POP VOD_CTL 31
NC
20
@ R1029 1 20K_0402_5%~D EQ_CTL R328,R338==>De-POP PRECTL VOD_CTL NC VOD_CTL0
2 33 27
@ R1030 1 20K_0402_5%~D PRECTL PRECTL NC
2 DP119->R356,R1031,R336,R279,R1029==>De-POP NC
28
@ R1031 1 2 4.99K_0402_1%~D PDN5K 1 29
R1028 1 2 100K_0402_5%~D DPD_GPU_EDP_HPD R328,R338==>POP 7
GND NC
30
B GND NC PUP5K B
21 34
GND NC PDN5K
32 35
GND NC
37 36
Thermal Pad(GND) NC
SN75DP119RHHR_QFN36_6X6~D
For Webcam @
R995
1 2
0_0603_5%~D
+CAMERA_VDD
R997
0_0603_5%~D Refer to SN75DP119RHHR rev. 0P35
S
2 1 +CAMERA_VDD_R 3 1 +3.3V_RUN
VOD (mV) PRE (dB) PRECTL VOD_CTL
0.1U_0402_16V4Z~D
10U_1206_16V4Z~D
Q132 EQ gain (dB) EQ_CTL

PMV45EN_SOT23-3~D 2.5 0 0
G
1 1
2
0 0
C249
C250
300 6 VCC/2 0
2 2 3 VCC/2
8.5 1 0
+15V_ALW * 6 1
1 0 0 VCC/2
C1043 400 3.5 VCC/2 VCC/2
1
0.1U_0402_16V4Z~D
R169 2
100K_0402_5%~D
5.5 1 VCC/2 MODE DP119_EN
0 0 1 PWR Down 0
600
2
A
2 VCC/2 1 OUT2 DIS VCC/2 A
Webcam PWR CTRL 800 0 1 1
* * OUT1 OUT2 EN 1
1
D
CCD_OFF 2 1
39 CCD_OFF
Q133
G
S C1044 DELL CONFIDENTIAL/PROPRIETARY
3
0.1U_0402_25V4Z~D
2
Title
eDP & CAM Conn
0.1
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
D AUX/DDC SW for E-DOCK 2 1 D
C337
0.1U_0402_16V4Z~D
C272 U86
0.1U_0402_10V7K~D 1 14
DPC_AUX_C BE0 VCC
54 DPC_GPU_AUX/DDC 2 1 2 13
A0 BE3
DPC_DOCK_AUX 3 12
38 DPC_DOCK_AUX B0 A3 DPC_GPU_AUX/DDC 54
4 BE1 B3 11
2 1 DPC_AUX#_C 5 10
54 DPC_GPU_AUX#/DDC A1 BE2
C274 0.1U_0402_10V7K~D
DPC_DOCK_AUX# 6 9 1 2 DPC_CA_DET
38 DPC_DOCK_AUX# B1 A2 DPC_GPU_AUX#/DDC 54
R996 1M_0402_5%~D
7 GND B2 8
PI3C3125LEX_TSSOP14~D
+5V_RUN
2 1
C277
1
5
0.1U_0402_16V4Z~D
NC
P
C DPC_CA_DET DPC_CA_DET# C
38 DPC_CA_DET 2 A Y 4
G
U8
NC7SZ04P5X_NL_SC70-5~D
B B
A A
Title
DP SW
0.1
LA-5573P
5 4 3 2 1
2 1
Display port Dip Connector
+3.3V_RUN
+3.3V_RUN
2
0_1206_5%~D
F1 @
R184
1.5A_6V_1206L150PR~D
1 2 DPB_MB_AUX# +VDISPLAY_VCC
1
B R278 100K_0402_5%~D B
0.1U_0402_10V7K~D
10U_0805_10V4Z~D
1 1
C1075
1 2 DPB_DOCK_CA_DET
C275
R1010 1M_0402_5%~D
1 2 DPB_MB_AUX
R1024 100K_0402_5%~D 2 2
1 2 DPB_MB_CA_DET
R185 1M_0402_5%~D
1 2 DPB_MB_HPD JDP1
R186 100K_0402_5%~D 20 DP_PWR
1 2 DPB_MB_P14 19 RTN
R797 5.1M_0603_1%~D DPB_MB_HPD 18
DPB_MB_AUX# HP_DET
17 AUX_CH-
16 GND
DPB_MB_AUX 15
DPB_MB_P14 AUX_CH+
14 GND
DPB_MB_CA_DET 13
MBDP_LANE_N3 CA_DET
12 LAN3-
11 LAN3_shield GND 21
MBDP_LANE_P3 10 22
DPB SW for MB & DOCK MBDP_LANE_N2
MBDP_LANE_P2
9
8
LAN3+
LAN2-
LAN2_shield
GND
GND
GND
23
24
7
MBDP_LANE_N1 LAN2+
6
U9 LAN1-
5
MBDP_LANE_P1 LAN1_shield
4
LAN1+
54 DPB_GPU_LANE_P0 C316 2 1 0.1U_0402_10V7K~D DPB_LANE_P0_C 55 IN_P1 OUT1_1P
33 DPB_MB_LANE_P0 C278 2 1 0.1U_0402_10V7K~D MBDP_LANE_P0 MBDP_LANE_N0 3
LAN0-
54 DPB_GPU_LANE_N0 C312 2 1 0.1U_0402_10V7K~D DPB_LANE_N0_C 56 32 DPB_MB_LANE_N0 C279 2 1 0.1U_0402_10V7K~D MBDP_LANE_N0 2
IN_N1 OUT1_1N MBDP_LANE_P0 LAN0_shield
1
LAN0+
54 DPB_GPU_LANE_P1 C309 2 1 0.1U_0402_10V7K~D DPB_LANE_P1_C 1 30 DPB_MB_LANE_P1 C280 2 1 0.1U_0402_10V7K~D MBDP_LANE_P1
IN_P2 OUT1_2P
54 DPB_GPU_LANE_N1 C301 2 1 0.1U_0402_10V7K~D DPB_LANE_N1_C 2
IN_N2 OUT1_2N
29 DPB_MB_LANE_N1 C281 2 1 0.1U_0402_10V7K~D MBDP_LANE_N1 MOLEX_105088-0001
54 DPB_GPU_LANE_P2 C315 2 1 0.1U_0402_10V7K~D DPB_LANE_P2_C 4

IN_P3 OUT1_3P
25 DPB_MB_LANE_P2 C282 2 1 0.1U_0402_10V7K~D MBDP_LANE_P2
54 DPB_GPU_LANE_N2 C318 2 1 0.1U_0402_10V7K~D DPB_LANE_N2_C 5 24 DPB_MB_LANE_N2 C283 2 1 0.1U_0402_10V7K~D MBDP_LANE_N2
IN_N3 OUT1_3N
54 DPB_GPU_LANE_P3 C338 2 1 0.1U_0402_10V7K~D DPB_LANE_P3_C 6
IN_P4 OUT1_4P
22 DPB_MB_LANE_P3 C284 2 1 0.1U_0402_10V7K~D MBDP_LANE_P3
54 DPB_GPU_LANE_N3 C322 2 1 0.1U_0402_10V7K~D DPB_LANE_N3_C 7 21 DPB_MB_LANE_N3 C285 2 1 0.1U_0402_10V7K~D MBDP_LANE_N3
IN_N4 OUT1_4N
54 DPB_GPU_AUX/DDC
C90 2 1 0.1U_0402_10V7K~D DPB_AUX_C 8
AUXP_S SCL1
19 DPB_MB_AUX
54 DPB_GPU_AUX#/DDC
C91 2 1 0.1U_0402_10V7K~D DPB_AUX#_C 9 18 DPB_MB_AUX#
AUXN_S SDA1
DPB_MB_HPD 17
DPB_DOCK_HPD HPD1 DPB_DOCK_P0 C286
38 DPB_DOCK_HPD 36
HPD2 OUT2_1P
49 2 1 0.1U_0402_10V7K~D
DPB_DOCK_N0 C287 DPB_DOCK_LANE_P0 38
48 2 1 0.1U_0402_10V7K~D
DPB_AUX_C OUT2_1N DPB_DOCK_LANE_N0 38
1 2
C1597 100P_0402_50V8J~D DPB_MB_CA_DET 26 46 DPB_DOCK_P1 C288 2 1 0.1U_0402_10V7K~D
DPB_DOCK_CA_DET CAD1 OUT2_2P DPB_DOCK_N1 C289 DPB_DOCK_LANE_P1 38
38 DPB_DOCK_CA_DET 27
CAD2 OUT2_2N
45 2 1 0.1U_0402_10V7K~D
DPB_DOCK_LANE_N1 38
43 DPB_DOCK_P2 C290 2 1 0.1U_0402_10V7K~D
DPB_AUX#_C OUT2_3P DPB_DOCK_N2 C291 DPB_DOCK_LANE_P2 38
1 2 54 DPB_GPU_AUX#/DDC 11
SDA_S OUT2_3N
42 2 1 0.1U_0402_10V7K~D
C1598 100P_0402_50V8J~D DPB_DOCK_LANE_N2 38
54 DPB_GPU_AUX/DDC 10
SCL_S DPB_DOCK_P3 C292
OUT2_4P
41 2 1 0.1U_0402_10V7K~D
Place C1597,C1598 close DP_PRIORITY DPB_DOCK_N3 C293 DPB_DOCK_LANE_P3 38
39 DP_PRIORITY 35 40 2 1 0.1U_0402_10V7K~D
HPDSEL OUT2_4N DPB_DOCK_LANE_N3 38
to U9 pin8 & pin9
2
100K_0402_5%~D
38 DPB_DOCK_AUX
@PAD~D T30 SCL2 DPB_DOCK_AUX# DPB_DOCK_AUX 38
14 37
EQ_S0/SDA_CTL SDA2 DPB_DOCK_AUX# 38
R190
@PAD~D T27 15
OEB/SCL_CNTL
@PAD~D T28 34 12 DPB_GPU_HPD
1
@PAD~D T29 EQ_S1/I2C_Address HPD_S DPB_GPU_HPD 53

16
A 12C_CTL_EN A
+3.3V_RUN
CAD_S
28 T25 PAD~D @
@PAD~D T37 54
CEC_S
1
P1_OC1
13 T33 PAD~D @
@PAD~D T38 52 23 T34 PAD~D @ R1495
@PAD~D T39 CEC1 P1_OC0
53 4.7K_0402_5%~D
CEC2
50 T35 PAD~D @
2
P2_OC1
+3.3V_RUN 44 47
+3.3V_RUN VDD4 P2_OC0
31
VDD3
20
VDD2
3 51
VDD1 Vbias
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
39
GND
GPAD 57
1 1 1 1
C92
C104
C98
C107
PI3VDP8200ZBEX_TQFN56_8X8~D
2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Display port
LA-5573P
2 1
2 1
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
+5V_RUN
2
3
@ @ @
D5
D6
D7
+3.3V_RUN
NC
D8
BAT1000-7-F_SOT23-3~D
1
+5V_RUN_CRT
RED_CRT 1 2
L61
27NH_LL1608-FSL27NJ_5%~D
GREEN_CRT 1 2
L62 +CRT_VCC
27NH_LL1608-FSL27NJ_5%~D
1U_0402_6.3V6K~D
5A_125V_R451005.MRL~D
BLUE_CRT 1 2
L63
2
0_1206_5%~D
27NH_LL1608-FSL27NJ_5%~D 1
2
2P_0402_50V8C~D
2P_0402_50V8C~D
2P_0402_50V8C~D
150_0402_1%~D
150_0402_1%~D
150_0402_1%~D
12P_0402_50V8J~D
12P_0402_50V8J~D
12P_0402_50V8J~D
@ F2
1 1 1
R171
C254
1 1 1
C390
C518
C996
R172
R173
R174
2
C251
C252
C253
1
2 2 2
1
2 2 2 JCRT1
6
11
R 1
+5V_RUN_SYNC 7
12
G 2
B B
8 16
2.2K_0402_5%~D
2.2K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
JVGA_HS 13 17
1
B 3
R794
R793
@ R175
@ R176
+CRT_VCC 9
JVGA_VS 14
M_ID2# 4
10
2
15
5
DAT_DDC2_CRT
CLK_DDC2_CRT SUYIN_070546FR015H358ZR~D
1
L11 C258
BLM18AG121SN1D_0603~D
HSYNC_CRT 2
1 2 HSYNC_L2 1 2 0.1U_0402_16V4Z~D
R177 0_0402_5%~D
VSYNC_CRT 1 2 VSYNC_L2 1 2
R178 0_0402_5%~D L12
BLM18AG121SN1D_0603~D
12P_0402_50V8J~D
12P_0402_50V8J~D
1 1
@ @
C267
C268
2 2
VGA SW for MB/DOCK

+3.3V_RUN
U131
1 4 +5V_RUN
53 GPU_CRT_VSYNC A0 VDD
53 GPU_CRT_HSYNC 2 16
A1 VDD
53 GPU_CRT_RED 5 23
A2 VDD
2
53 GPU_CRT_GRN 6 29
A3 VDD
53 GPU_CRT_BLU 7 32
A4 VDD D9
8 27 VSYNC_BUF SDM10U45-7_SOD523-2~D
SEL1 0B1 HSYNC_BUF
25
1
1B1 RED_CRT
22
2B1 GREEN_CRT +5V_RUN_SYNC
53 GPU_CRT_DAT_DDC 9 20 1 2 1 2
A5 3B1 BLUE_CRT R179 1K_0402_5%~D
53 GPU_CRT_CLK_DDC 10 18
A6 4B1 DAT_DDC2_CRT C269
12
5B1
1
CRT_SWITCH 30 14 CLK_DDC2_CRT 0.1U_0402_16V4Z~D
39 CRT_SWITCH SEL2 6B1
OE#
HSYNC_BUF 2 4 HSYNC_CRT
VSYNC_DOCK A Y
26
0B2 VSYNC_DOCK 38
G
24 HSYNC_DOCK U5
1B2 RED_DOCK HSYNC_DOCK 38 74AHCT1G125GW_SOT353-5~D
3 21
3
A GND 2B2 GREEN_DOCK RED_DOCK 38 A
11 19
GND 3B2 BLUE_DOCK GREEN_DOCK 38
28 17 1 2
GND 4B2 DAT_DDC2_DOCK BLUE_DOCK 38
31 13
GND 5B2 DAT_DDC2_DOCK 38
1
33 15 CLK_DDC2_DOCK C270
GPAD 6B2 CLK_DDC2_DOCK 38 0.1U_0402_16V4Z~D
OE#
P
PI3V712-AZLEX_TQFN32_6X3~D VSYNC_BUF 2 4 VSYNC_CRT
A Y
G
+3.3V_RUN U6
74AHCT1G125GW_SOT353-5~D
3
SEL1/SEL2 Chanel Source
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0 A=B1 MB
1 1 1 1 1 1
1 A=B2 APR/SPR
C259
C260
C261
C262
C263
C264
2 2 2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, CRT/Video switch
LA-5573P
2 1
5 4 3 2 1
For ODD +5VMOD Source

+15V_ALW +5V_ALW
JSATA1
1
1 +3.3V_ALW2
+5V_MOD C311 2 SATA_ODD_PTX_DRX_P1 GND
15 SATA_ODD_PTX_DRX_P1_C 1 0.01U_0402_16V7K~D 2 RX+
R316
C310 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3 100K_0402_5%~D
15 SATA_ODD_PTX_DRX_N1_C RX-
1
2
5
6
4 GND
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
D C374 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N1 5 R317 D D
2
15 SATA_ODD_PRX_DTX_N1_C TX- 100K_0402_5%~D G Q29
1 1 6 TX+
C375 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 7 2 MOD_EN 3 SI3456BDV-T1-E3_TSOP6~D
15 SATA_ODD_PRX_DTX_P1_C GND
C376
C377
3
ODD_DET# 8 +5V_MOD +5V_RUN
4
2 2 40 ODD_DET# DP
0.1U_0603_50V4Z~D
+5V_MOD 9 PJP15
+5V
Q31B
10 +5V 1 2
10U_0805_10V4Z~D
100K_0402_5%~D
11 MD 5 1
1
+3.3V_RUN 1 2 12 14 1 @ PAD-OPEN 4x4m
GND GND1
C378
R1239 10K_0402_5%~D 13 15 Q31A
4
GND GND2
C379
R318
TYCO_2-1759838-8 2
2 2
2
39 MODC_EN
Pleace near ODD CONN
1
Main SATA +5V Default R319
100K_0402_5%~D
2
+3.3V_RUN
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
R1308
R1305
HDD Repeater
2
1 1
C1383
C1384
0_0402_5%~D
0_0402_5%~D
2 2
1
U96
7 6
PSATA_PTX_DRX_P0_C PSATA_PTX_DRX_P0 EN VCC
15 PSATA_PTX_DRX_P0_C 2 1 10
C323 0.01U_0402_16V7K~D VCC
C 1 16 C
PSATA_PTX_DRX_N0_C PSATA_PTX_DRX_N0 RX_1P VCC
15 PSATA_PTX_DRX_N0_C 2 1 2 20
C324 0.01U_0402_16V7K~D RX_1N VCC
PSATA_PRX_DTX_P0_C 2 1 PSATA_PRX_DTX_P0 5 9
15 PSATA_PRX_DTX_P0_C C1382 0.01U_0402_16V7K~D TX_2P PE1
4 8
PSATA_PRX_DTX_N0_C TX_2N PE2
2 1 PSATA_PRX_DTX_N0
15 PSATA_PRX_DTX_N0_C C1385 0.01U_0402_16V7K~D PSATA_PTX_DRX_P0_RP
3 15
GND TX_1P PSATA_PTX_DRX_N0_RP
13 14
GND TX_1N
17
GND PSATA_PRX_DTX_N0_RP
18 12
GND RX_2N PSATA_PRX_DTX_P0_RP
19 11
GND RX_2P
21
PAD
1
1
SN75LVCP412ARTJR_QFN20_4X4~D
0_0402_5%~D
R1304
R1303
0_0402_5%~D
2
2
@
+3.3V_RUN
Free Fall Sensor HDD PWR
+5V_ALW
+15V_ALW
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
1 1 +3.3V_ALW2
1
U139
C435
C436
DE351DLTR R320
1
2
5
6
100K_0402_5%~D
1
2 2 1 D
VDD_IO G Q32
6 2
2
VDD GND R321 HDD_EN_5V SI3456BDV-T1-E3_TSOP6~D
4 3
HDD_FALL_INT GND 100K_0402_5%~D S
8 5
18,40 HDD_FALL_INT FFS_INT2 INT 1 GND +5V_HDD +5V_RUN
9 10
4
INT 2 GND
3
PJP16
0.1U_0603_50V4Z~D
12 1 2
SDO
Q34B
10U_0805_10V4Z~D
1 2 HDD_SMBDAT_R 13
40 HDD_SMBDAT SDA / SDI / SDO
100K_0402_5%~D
B 40 HDD_SMBCLK
@ R1534 1 20_0402_5%~D HDD_SMBCLK_R 14 5 1 1 @ PAD-OPEN 4x4m B
SCL / SPC
1
@ R1535 0_0402_5%~D 3 +3.3V_RUN Open
RSVD
C382
C383
R322
1 2 7 11 Q34A
4
3,14,15,16 DDR_XDP_SMBDAT CS RSVD
R1528 0_0402_5%~D DMN66D0LDW-7_SOT363-6~D
1 2 2 2
13,14,15,16 DDR_XDP_SMBCLK
R1529 0_0402_5%~D DE351DLTR8_LGA14_3X5~D 2
2
39 HDDC_EN
Disconnect to EC SSMBUS trace,
For HDD Temp.
1
add R1534/1535
1
R323
100K_0402_5%~D +5V_HDD Source
JSATA2
+3.3V_RUN 1
2
PSATA_PTX_DRX_P0_RP C308 2 SATA_PTX_DRX_P0 GND
1 0.01U_0402_16V7K~D 2
PSATA_PTX_DRX_N0_RP C307 2 SATA_PTX_DRX_N0 RX+
1 0.01U_0402_16V7K~D 3
HDD_SMBDAT_R RX-
1 2 4
GND
R445 2.2K_0402_5%~D PSATA_PRX_DTX_N0_RP 2 1 SATA_PRX_DTX_N0 5
HDD_SMBCLK_R PSATA_PRX_DTX_P0_RP C380 2 SATA_PRX_DTX_P0 TX-
1 2 1 0.01U_0402_16V7K~D 6
R463 2.2K_0402_5%~D C381 0.01U_0402_16V7K~D TX+
7
GND
8
3.3V
9
+3.3V_RUN +5V_HDD 3.3V
10
3.3V
11
HDD_DET# GND
12
15 HDD_DET# GND
13
GND
1
+5V_HDD 14
5V
15
@ R329 5V
16
100K_0402_5%~D 5V
17
GND
2
G
FFS_INT2_Q 18 23
2
Reserved GND1
19 24
FFS_INT2 FFS_INT2_Q GND GND2
3 1 1 2 20
19 FFS_INT2 12V
S
21
12V
22
D10 12V
Q118 SDM10U45-7_SOD523-2~D +5V_HDD FOX_LD2122H-S4SL6_RV
A SSM3K7002FU_SC70-3~D A
1000P_0402_50V7K~D
0.1U_0402_16V4Z~D
Main SATA +5V Default

1 1
C384
C385
2 2 DELL CONFIDENTIAL/PROPRIETARY
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD/HDD CONNECTOR
Pleace near HDD CONN BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
5 4 3 2 1
2 1
Speaker Connector +3.3V_RUN

15 mils trace JSPK1 +3.3V_RUN
1
1
1
INT_SPK_L+ 2
INT_SPK_L- 2 R365
3
3 Close pin 24 Close pin 18 Close pin 25
INT_SPK_R+ 4 100K_0402_5%~D 2 1
4
0.1U_0402_10V7K~D
1U_0603_10V6K~D
10U_0805_10V6K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
0.1U_0402_10V7K~D
1U_0603_10V6K~D
INT_SPK_R- 5 L70
5 47UH_CBMF1608T470K_10%~D
6
2
19 SPEAKER_DET# 6
1 1 1 1 1 1 1
7 PCH_AZ_CODEC_RST# 1 2 RST#
GND
C429
C458
C428
C398
C397
C431
C463
8 @R50
@ R50
GND U15
0.1U_0402_10V7K~D
33_0402_5%~D 1 2 2 2 2 2 2 2
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
100P_0402_50V8J~D
TYCO_1775765-6~D
C433
+3.3V_RUN_I2S_VDD 25 5 I2S_DO
AVDD DOUT AUD_DOCK_MIC_IN_L_R
27
2 LEFT_LO AUD_DOCK_MIC_IN_R_R
1 1 1 1 18 29
DRVDD RIGHT_LO
@ C423
@ C424
@ C425
@ C426
24
DRVDD
Place close to JSPK1
L18 +1.8V_RUN 32 20
2 2 2 2 @ D1 BLM18EG601SN1D_2P~D DVDD NC
19
INT_SPK_R+ INT_SPK_L+ +3.3V_RUN_IOVDD NC
1 6 +3.3V_RUN 1 2 7 22
V I/O V I/O IOVDD NC
23
NC
0.1U_0402_10V7K~D
1U_0603_10V6K~D
2 5 +5V_RUN I2S_BCLK 2 28
Ground V BUS I2S_DI# BCLK NC
1 1 4 11
INT_SPK_R- INT_SPK_L- XTALI_12MHZ DIN NC
3 4 1 13
V I/O V I/O MCLK NC
C392
C393
14
IP4223CZ6_SO6~D AUD_DOCK_HP_L_C NC
10 16
+3.3V_RUN +5V_RUN 2 2 AUD_DOCK_HP_R_C LINEL NC
12 LINER NC 15
L77 30
+3.3V_RUN +CODEC_DVDD_CORE BLM21PG600SN1D_0805~D RST# NC
1 1 31 RESET#
4700P_0402_25V7K~D
+VDDA_AVDD 1 2 @ @ 17
AVSS1
10U_0805_10V6K~D
4700P_0402_25V7K~D
C1066
C1067
0.1U_0402_10V7K~D
1U_0603_10V6K~D
DAI_GPU_R3P_SMBCLK 8 26
SCL AVSS2
1U_0603_10V6K~D
B 1 B
2 2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D L3 DAI_GPU_R3P_SMBDAT 9
1 1 SDA DRVSS 21 Close pin 32
C403
1 1 1 +VDDA_PVDD 1 2
U16 +1.8V_RUN
C399
C454
BLM21PG600SN1D_0805~D I2S_LRCLK 3 6
2 WCLK DVSS
C405
C402
C404
2 2
0.1U_0402_10V7K~D
1U_0603_10V6K~D
10U_0805_10V6K~D
1 DVDD_CORE AVDD 27 GPAD 33
2 2 2
0.1U_0402_10V7K~D
1U_0603_10V6K~D
AVDD 38 1 1 1
9 DVDD 1 1
C401
C456
C400
39 +3.3V_RUN TLV320AIC3004IRHBR_QFN32_5X5~D
PVDD
C430
C459
3 DVDD_IO PVDD 45
2 2 2
13 AUD_SENSE_A 2 2
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B
15 PCH_AZ_CODEC_BITCLK 6 HDA_BITCLK SENSE_B 14
R18
PCH_AC_SDIN0_R 0_0402_5%~D X4
15 PCH_AZ_CODEC_SDIN0 1 2 8 HDA_SDI
R332 33_0402_5%~D 28 1 2 4 1
HP0_PORT_A_L AUD_EXT_MIC_L 37 VDD ST/OE
0.1U_0402_10V7K~D
PCH_AZ_CODEC_SDOUT 5 29
15 PCH_AZ_CODEC_SDOUT HDA_SDO HP0_PORT_A_R AUD_EXT_MIC_R 37
23 +VREFOUT XTALI_12MHZ 3 2
VREFOUT_A_or_F OUT GND
15 PCH_AZ_CODEC_SYNC 10 HDA_SYNC 1
C432
31 12MHZ_15PF_SIT8102ACL3333E12T~D DAI_GPU_R3P_SMBCLK
HP1_PORT_B_L AUD_HP_OUT_L 37 DAI_GPU_R3P_SMBCLK 23,40,53
PCH_AZ_CODEC_RST# 11 32
15 PCH_AZ_CODEC_RST# HDA_RST# HP1_PORT_B_R AUD_HP_OUT_R 37
2
PORT_C_L 19
L4 20
BLM18BB221SN1D_2P~D PORT_C_R DAI_GPU_R3P_SMBDAT
VREFOUT_C 24 DAI_GPU_R3P_SMBDAT 23,40,53
24 DMIC_CLK 1 2 DMIC_CLK_R 2
DMIC_CLK/GPIO1
4 40 INT_SPK_L+
24 DMIC0 DMIC0/GPIO2 SPKR_PORT_D_L+
150P_0402_50V8J~D
41 INT_SPK_L- C1894 1 2 1000P_0402_50V7K~D

SPKR_PORT_D_L-
1 1 46 2 1
C676 @ DMIC1/GPIO0/SPDIF_OUT_1 C1895 1
SPKR_PORT_D_R-
43 INT_SPK_R- 2 1000P_0402_50V7K~D @ R1090 10M_0402_5%~D
C679
150P_0402_50V8J~D 48 44 INT_SPK_R+
SPDIF_OUT_0 SPKR_PORT_D_R+ R340 2K_0402_1%~D C410 1U_0603_10V6K~D
+3.3V_RUN 1 2
2 2 R1296 10K_0402_5%~D 47 15 AUD_DOCK_HP_OUT_L 1 2 AUD_DOCK_HP_L_R 1 2 AUD_DOCK_HP_L_C
39 AUD_NB_MUTE EAPD PORT_E_L
16 AUD_DOCK_HP_OUT_R 1 2 AUD_DOCK_HP_R_R 1 2 AUD_DOCK_HP_R_C
PORT_E_R R342 2K_0402_1%~D C411 1U_0603_10V6K~D
17 AUD_DOCK_MIC_IN_L 2 1
PORT_F_L AUD_DOCK_MIC_IN_R @R1089
@ R1089 10M_0402_5%~D
35 18
CAP- PORT_F_R
1 12 C408 1 2 1U_0603_10V6K~D DOCK_MIC_IN_L_C R1091 1 2 2K_0402_1%~D AUD_DOCK_MIC_IN_L_R
PC_BEEP C409 1
36
CAP+ 2 1U_0603_10V6K~D DOCK_MIC_IN_R_C R1092 1 2 2K_0402_1%~D AUD_DOCK_MIC_IN_R_R
C453 25
4.7U_0603_6.3V6M~D MONO_OUT C1896 1 2 1000P_0402_50V7K~D
2 7 AUD_PC_BEEP C1897 1 2 1000P_0402_50V7K~D
DVSS
33 22 CAP2 2 1 2 1
AVSS CAP2 SPKR 15
30 C389 0.1U_0402_16V4Z~D R327 510K_0402_5%~D
AVSS VREFFILT
26 21 2 1 2 1 BEEP 40
AVSS VREFFILT C394 0.1U_0402_16V4Z~D R828 510K_0402_5%~D
42 34
PVSS V-
Close to U16 pin5 Close to U16 pin6
49
DAP VREG
37 Resistor SENSE_A SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
92HD81B1B5NLGXUAX8_QFN48_7X7~D 39.2K PORT A (HP0) PORT E
1
10U_0805_10V6K~D
1U_0603_10V6K~D
4.7U_0603_6.3V6M~D
@ R344
@R344 @ R343
@R343 4.7U_0603_6.3V6M~D +3.3V_RUN +3.3V_RUN
47_0402_5%~D 10_0402_5%~D 1 1 1 1 20K PORT B (HP1) PORT F
C455
C414
C415
0.1U_0402_16V7K~D
C457
2
1 1 2 2 2 2
10K PORT C DMIC0
2
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
DA204U_SOT323-3~D
@C416
@C416 @ C412
@C412 2
C413
0.1U_0402_10V7K~D 10P_0402_50V8J~D 5.11K SPDIFOUT0 SPDIFOUT1 (DMIC0) @ @ @ @
2 2
D17
D18
D19
D55
2.49K Pull-up to AVDD 1 U17
16
1
VCC
I2S_BCLK 2 3
+VDDA_AVDD 1A 1Y# DAI_BCLK# 38
A A
Place closely to Pin 34 I2S_LRCLK 4 5
R346 +VDDA_AVDD 2A 2Y# DAI_LRCK# 38
Place closely to Pin 13. 2.49K_0402_1%~D R347 I2S_DO 6 7 DAI_DO# 38
AUD_SENSE_A 2.49K_0402_1%~D 3A 3Y#
2 1
AUD_SENSE_B 2 1 XTALI_12MHZ 10 9
+3.3V_RUN 4A 4Y# DAI_12MHZ# 38
1000P_0402_50V7K~D
1000P_0402_50V7K~D
+3.3V_RUN
39.2K_0402_1%~D
20K_0402_1%~D
1 1 12 11
5A 5Y#
1
20K_0402_1%~D
39.2K_0402_1%~D
+3.3V_RUN
1
+3.3V_RUN
R348
R349
C417
C420
14 13 I2S_DI#
+3.3V_RUN 6A 6Y#
R352
R350
1
2 2
R351
100K_0402_5%~D 1
39 EN_I2S_NB_CODEC# OE1#
1
2
100K_0402_5%~D
R355 2 1 15 8
2
OE2# GND
1
100K_0402_5%~D R345 D20

2
2
R353
R354 1K_0402_5%~D @ DA204U_SOT323-3~D

6
100K_0402_5%~D CD74HC366M96_SO16~D
2
1
37 AUD_MIC_SWITCH 2 5 AUD_HP_NB_SENSE 37,39
Q38A Q38B DAI_DI 38
39 DOCK_HP_DET 2 5 DOCK_MIC_DET 39
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
Q40A Q40B
1
DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
Azalia (HD) Codec
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5573P
2 1
5 4 3 2 1
+3.3V_LAN +3.3V_LAN
+3.3V_RUN R370
0_1210_5%~D
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
1 2 TP_LAN_JTAG_TMS +1.05V_M for VC10 not the 1 2 1 1
1
@R75
@ R75 10K_0402_5%~D
correct or complete
C804
C805
1 2 TP_LAN_JTAG_TCK R699
1
implementation to connect to
0_1210_5%~D
@R76
@ R76 10K_0402_5%~D 10K_0402_5%~D
2 2
+1.05V SVR.
R371
2
U79
0.01U_0402_16V7K~D
2
1
LANCLK_REQ# 48 13 LAN_TX0+ 1
15,16 LANCLK_REQ# CLK_REQ_N MDI_PLUS0 LAN_TX0- R72 +3.3V_LAN_R
18 PLTRST_LAN# 36 14
PE_RST_N MDI_MINUS0
4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
C1118
D 4.99K_0402_1%~D D
CLK_PCIE_LAN 44 17 LAN_TX1+
16 CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1- 2 Trace=12mil
45 18 1 1
2
16 CLK_PCIE_LAN#
PCIE
PE_CLKN MDI_MINUS1
MDI
C466
C465
16 PCIE_PRX_GLANTX_P6 2 1 PCIE_PRX_GLANTX_P6_C 38 20 LAN_TX2+
C451 0.1U_0402_10V7K~D PETp MDI_PLUS2 LAN_TX2-
39 21
PETn MDI_MINUS2
3
2 1 PCIE_PRX_GLANTX_N6_C Trace=12mil 2 2
+3.3V_LAN 16 PCIE_PRX_GLANTX_N6 LAN_TX3+
C452 0.1U_0402_10V7K~D 41 23
16 PCIE_PTX_GLANRX_P6_C PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10
16 PCIE_PTX_GLANRX_N6_C 42 24 1 2 1
PERn MDI_MINUS3 R73
1
0_0402_5%~D Q45
R44 LAN_SMBCLK 28 6 DCP69A-13_SOT223-3~D
2
4
16 LAN_SMBCLK SMB_CLK VCT
SMBUS
10K_0402_5%~D LAN_SMBDATA 31 +1.05V_M
16 LAN_SMBDATA SMB_DATA +1.0V_LAN
1 +RSVD_VCC3P3_1 R70 2 1 3.01K_0402_1%~D +3.3V_LAN @ R119
RSVD_VCC3P3_1 +RSVD_VCC3P3_2
SMBus Device Address 0xC8 2 2 1 0_0805_5%~D
2
RSVD_VCC3P3_2 R1291 3.01K_0402_1%~D

5 1 2
VDD3P3_IN
10U_0805_10V4Z~D
0.1U_0402_10V7K~D
1 2 LAN_DISABLE#_R 3
19 PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
R42 4 1 1
VDD3P3_OUT
C474
0_0402_5%~D
39 LAN_DISABLE#_R
C806
15 +3.3V_LAN_OUT_R 2 1 1
VDD3P3_15
1
LOM_ACTLED_YEL# 26 19 R693
@ R56 LOM_SPD100LED_ORG# LED0 VDD3P3_19 0_0603_5%~D C786 2 2
27 LED1 VDD3P3_29 29
LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 1U_0603_10V6K~D
LED2 2
47 R694 +1.0V_LAN +1.0V_LAN
2
VDD1P0_47 0_0603_5%~D
VDD1P0_46 46
PAD~D @ TP_LAN_JTAG_TDI 32 37 +1.0V_LAN_4 2 1
T176 JTAG_TDI VDD1P0_37
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
PAD~D @ TP_LAN_JTAG_TDO 34
T177 JTAG_TDO
JTAG
TP_LAN_JTAG_TMS 33 43 +1.0V_LAN_3 R695 2 1 0_0603_5%~D
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK 1 1 1 1
C427 11 +1.0V_LAN_2 R696 2 1 0_0603_5%~D
VDD1P0_11
C800
C801
C802
C803
10P_0402_50V8J~D
C XTALO C
1 2 9 XTAL_OUT VDD1P0_40 40
XTALI 2 2 2 2
10 XTAL_IN VDD1P0_22 22
Y2 16
25MHZ_18PF_1Y725000CE1A~D VDD1P0_16
VDD1P0_8 8
1 2 LAN_TEST_EN 30 TEST_EN
33P_0402_50V8J~D
33P_0402_50V8J~D
RES_BIAS 12 7 REGCTL_PNP10
RBIAS CTRL_1P0
2 2
3.01K_0402_1%~D
49 +1.0V_LAN_2 +1.0V_LAN_3 +1.0V_LAN_4

1
VSS_EPAD
C475
C476
1K_0402_5%~D
R1200
R59
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
WG82577LM-SLGWR-A3_QFN48_6X6~D
1 1
0.1U_0402_10V7K~D
1 1 1 1
C477
C478
C479
C480
2
2 2 2 2
R1200 Resistor Value:
Need to verify A3 silicon drive 3.01 kohm for Hanksville-M LOM +3.3V_M
power before removing C427 2.37 kohm for Hanksville-D LOM
KDS crystal vender verify
driving level in A3
2
@ R373
+3.3V_LAN 0_1210_5%~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
2 2 2
Q2
C460
C461
C462
+3.3V_ALW +3.3V_LAN
LAN ANALOG SI3456BDV-T1-E3_TSOP6~D
B 1 1 1 +15V_ALW B
SWITCH
D
6
S
+3.3V_ALW2
39
30
21
14
5 4
8
4
1
1
U25 2
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
R1310 1 1 1
VDD
VDD
VDD
VDD
VDD
VDD
VDD
38 SW_LAN_TX0+ 100K_0402_5%~D
G
B0+ SW_LAN_TX0+ 37
C482
C481
37 SW_LAN_TX0-
3
B0- SW_LAN_TX0- 37
1
LAN_TX0+ 1 2 LAN_TX0+R 2
2
L20 22NH_0603CS-220EJTS_5%~D A0+ SW_LAN_TX1+ R1311 ENAB_3VLAN 2 2
34 SW_LAN_TX1+ 37
LAN_TX0- LAN_TX0-R B1+ SW_LAN_TX1- 100K_0402_5%~D
1 2 3 33 SW_LAN_TX1- 37
A0- B1-
3
2200P_0402_50V7K~D
L21 22NH_0603CS-220EJTS_5%~D
Q184B
29 SW_LAN_TX2+
2
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ 37
2 6 28 1
L22 22NH_0603CS-220EJTS_5%~D A1+ B2- SW_LAN_TX2- 37
5
C1414
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ 37
6
L23 22NH_0603CS-220EJTS_5%~D 24 SW_LAN_TX3-
4
B3- SW_LAN_TX3- 37 2
Q184A
R2
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL# 0_0402_5%~D
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# 37
L24 22NH_0603CS-220EJTS_5%~D 18 1 2 2
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# 37 40 AUX_ON
1 2 10 41 LED_10_GRN# 37
L25 22NH_0603CS-220EJTS_5%~D A2- LEDB2
1
36 DOCK_LOM_TRD0+ 1 2
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ 38 17,39 SIO_SLP_LAN#
2 11 35 @R47
@ R47
A3+ C0- DOCK_LOM_TRD0- 38
L26 22NH_0603CS-220EJTS_5%~D 0_0402_5%~D
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1- DOCK_LOM_TRD1+ 38
L27 22NH_0603CS-220EJTS_5%~D 31
C1- DOCK_LOM_TRD1- 38
DOCKED 13 27 DOCK_LOM_TRD2+
39 DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ 38 +3.3V_LAN
26
C2- DOCK_LOM_TRD2- 38
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+
LEDA0 C3+ DOCK_LOM_TRD3+ 38
LOM_SPD100LED_ORG# 16 22 DOCK_LOM_TRD3-
A LOM_SPD10LED_GRN# LEDA1 C3- DOCK_LOM_TRD3- 38 A
Layout Notice : Place bead as 42 LEDA2
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
19 DOCK_LOM_ACTLED_YEL#
close PI3L500 as possible LEDC0 DOCK_LOM_ACTLED_YEL# 38
1
5 20 DOCK_LOM_SPD100LED_ORG#
PD LEDC1 DOCK_LOM_SPD10LED_GRN# DOCK_LOM_SPD100LED_ORG# 38
40 @ @ @
LEDC2 DOCK_LOM_SPD10LED_GRN# 38
R392
R393
R394
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK 2
2
FROM NIC DOCKED
0: TO RJ45 TO
PI3L720ZHEX_TQFN42_9X3P5~D Title
DOCK LOM_ACTLED_YEL#
LOM_SPD10LED_GRN# Intel Intel 82577/82578 (Hanksville) / LAN SW
LOM_SPD100LED_ORG# Size Document Number Rev
0.1
LA-5573P
5 4 3 2 1
5 4 3 2 1
Q208 +3.3V_ALW_PCH
USB_GPIO27 1 2 SI2301BDS-T1-E3_SOT23-3~D +3.3V_ALW
@ R1503 0_0402_5%~D
USBP7+ 2 RST_N
S
1 2 1 3 1
R470 1.5K_0402_5%~D R810 4.7K_0402_5%~D U32D
2
1 2 OVSTB
+3.3V_ALW R1496 R484 4.7K_0402_5%~D BCM5882
G
2
4.7K_0402_5%~D 1 2 FP_RESET# REF_XIN G14 REFCLK_XTALIN UART_TX_GPIO_1 D4 UART_TX/GPIO1
1 2 PLTRST1#_USH R1034 4.7K_0402_5%~D REF_XOUT F14 REFCLK_XTALOUT UART_RX_GPIO_0 C4 UART_RX/GPIO0
@ R1059 10K_0402_5%~D
UART
B3
1
UART_CTS_GPIO_2 FP_RESET# 37
1 2 USH_LPCEN Q209 U32A
UART_RTS_GPIO_3 A3 CLKDIV1
CLK
5@ R841 4.7K_0402_5%~D SSM3K7002FU_SC70-3~D R468 RST_N G1
BCM5882 RST_N
1
D
1 2 LPD# 0_0402_5%~D
@ R474 4.7K_0402_5%~D 2USB_GPIO27 1 2 USBP7-_R P5 P7 FP_USBD- JTAG_CLK_USH
18 USBP7- USBD_DN USBH_DN_0 FP_USBD- 37
@
1 2 IRQ_SERIRQ_R G
18 USBP7+ 1 2 USBP7+_R P6 USBD_UP USBH_UP_0 P8 FP_USBD+
FP_USBD+ 37
R895
NC L14
D R843 4.7K_0402_5%~D S R469 USB_GPIO27 N7 P9 USBH_OC0# 2 1 0_0402_5%~D D
+3.3V_ALW
3
USH_SMBCLK 0_0402_5%~D USBD_ATTACH_GPIO_27 USBH_OC_0 R844 4.7K_0402_5%~D JTAG_CLK_USH
1 2 1 2 L1 JTAG_TCK
R490 2.2K_0402_5%~D P11 JTAG_TDI_USH M1 J1 CONTACTLESS_DET#
USH_SMBDAT USBH_DN_1 JTAG_TDI_USH JTAG_TDO_USH JTAG_TDI GPIO_4 SCC_CMDVCC_N_R
1 2 P12 N1 D2
JTAG
R626 2.2K_0402_5%~D CLK_PCI_TPM USBH_UP_1 USBH_OC1 JTAG_TMS_USH JTAG_TDO GPIO_14 BCM5882_GPIO15
16 CLK_PCI_TPM P2 LCLK USBH_OC_1 P10 N2 JTAG_TMS GPIO_15 C2
1 2 BCM5882_ALERT# 15,32,39,40 LPC_LAD0
LPC_LAD0 R615 1 2 0_0402_5%~D N3 LAD0_GPIO_20
JTAG_RST#_USH L3 JTAG_TRSTN GPIO_16 B1 CLKDIV2
R629 2.2K_0402_5%~D LPC_LAD1 R618 1 2 0_0402_5%~D M4 JTAG_TDO_USH JTCE_USH L2
15,32,39,40 LPC_LAD1 LAD1_GPIO_21 JTCE
@
1 2 USH_PWR_STATE# 15,32,39,40 LPC_LAD2
LPC_LAD2 R619 1 2 0_0402_5%~D K5 LAD2_GPIO_22
R896
R630 4.7K_0402_5%~D LPC_LAD3 R620 1 2 0_0402_5%~D N4 G3 SPI_CLK 0_0402_5%~D D3 CLKOUT
@
15,32,39,40 LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6 CLKOUT T154 PAD~D
2
0_0402_5%~D
2 USBH_OC1 LPC_LFRAME# R621 1 2 0_0402_5%~D SPI_CS OVSTB
@
1 15,32,39,40 LPC_LFRAME# K4 LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7 G2 1 2 E1 OVSTB
R899 @
R637 4.7K_0402_5%~D @ R842 1 2 0_0402_5%~D IRQ_SERIRQ_R L4 H1 SPI_RXD
15,32,39,40 IRQ_SERIRQ LSERIRQ_GPIO_19 SSP_RXD0_GPIO_8
H2 SPI_TXD JTAG_TMS_USH C1 SPI_RST
CLK_PCI_TPM PLTRST_USH# R1048 1 SSP_TXD0_GPIO_9 RSTOUT_N
18 PLTRST_USH# 2 0_0402_5%~D PLTRST1#_USH M3 LRESET_N_GPIO_17 PAD~D T158 SCANACCMODE E3 SCANACCMODE
SPI
USH_LPCEN M5 C3 BCMGPIO_10
@@@@
T145PAD~D
LPC
1
LPCEN SSP_CLK1_GPIO_10
1
10_0402_5%~D
LPD# N6 B2 BCMGPIO_11 T148PAD~D JTAG_RST#_USH

LPCPD_N_GPIO_24 SSP_FSS1_GPIO_11
R744
@
A2 BCMGPIO_12 R897 SBOOT E2 J13 POR_MONITOR
@
SSP_RXD1_GPIO_12 T149PAD~D SECURE_BOOT POR_MONITOR T156 PAD~D
R466 1 2 0_0402_5%~D A1 BCMGPIO_13 T150PAD~D 0_0402_5%~D
32,39 SP_TPM_LPC_EN SSP_TXD1_GPIO_13
USH_SMBCLK M9 1 2
40 USH_SMBCLK SMBCLK
USH_SMBDAT L9 USH_TESTMODE D1 K11 SWV
@
40 USH_SMBDAT T155 PAD~D
2
BCM5882_ALERT# SMBDAT JTCE_USH TESTMODE SWV

39 BCM5882_ALERT# K9 SMBALERT_N
Smard Card
SC_DET R1460 1 2 150_0402_5%~D R472 0_0402_5%~D BCM5882_SCCLK
PCI_TPM_TERM
M7 M11 2 1
1K_0402_5%~D
SMB_GPIO_0 SC_CLK
2
SMB_GPIO1 N8 M12 R533 2 1 0_0402_5%~D AUX1UC POR_EXTR J14 C13 PLL_TESTOUT
@
PAD~D T147 SMB_GPIO_1 SC_FCB POR_EXTR PLL_TESTOUT T157 PAD~D
@R1501
@
F2 R767 2 1 0_0402_5%~D BCM5882_GPIO25 UART_RX/GPIO0
SC_SEL5V_GPIO_25
R1501
4.7P_0402_50V8C~D
@
1 2 JTAG_RST#_USH SC_SEL18V_GPIO_26 F1 R766 2 1 0_0402_5%~D BCM5882_GPIO26 R894 HF_RX_TEST2
@
R737 1K_0402_5%~D USH_PWR_STATE#_R R774 0_0402_5%~D BCM5882_SCDET 0_0402_5%~D HF_RX_TEST0 R908
SM BUS
39 USH_PWR_STATE# 1 2 L7 WAKEUP_N SC_DET M2 2 1
@
1 2 USH_LPCEN R1049 0_0402_5%~D L11 R608 2 1 0_0402_5%~D BCM5882_IO 1 2 R907 BCM5882KFBG-ES-B0_FBGA196~D 0_0402_5%~D
1
6@ R483 4.7K_0402_5%~D SC_IO R771 0_0402_5%~D BCM5882_SCRST 0_0402_5%~D
1 2 K1 IDDQ_EN SC_RST M10 2 1 1 2
2 R738 1K_0402_5%~D N14 +SC_PWR UART_TX/GPIO1 1 2
SC_PWR_N14 R775 HF_RX_TEST3
1 2 P1 CORE_PWRDN SC_PWR_P14 P14
C589
R739 1K_0402_5%~D L10 SC_TEST 2 1 SCC_CMDVCC_N HF_RX_TEST1 U32C

SC_VCC 0_0402_5%~D
1 2 E12
C
1 R481
0_0402_5%~D
R743 1K_0402_5%~D ALDO_PWRDN
R497 1 2 0_0402_5%~D RFTAG_VRXP A6
BCM5882 A8 RFREADER_TXP1 C
HF_RFIDTAG_VRX_P HF_TX_P
1 2 REF_XOUT R496 1 2 0_0402_5%~D RFTAG_VRXN B6 HF_RFIDTAG_VRX_N HF_TX_N B8 RFREADER_TXN1
C5 A10 RFREADER_RXP
REF_XIN BCM5882KFBG-ES-B0_FBGA196~D +1.2V_ALW_AVDD +2.5V_ALW_AVDD HF_RFIDTAG_VTX HF_RX_P RFREADER_RXN
1 2 C595 should be placed HF_RX_N B10
@
R486 10M_0402_5%~D
closer to pin A5
+3.3V_ALW
10U_0603_6.3V6M~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
4.7U_0603_6.3V6M~D
Y3 1 2 A5 B9 HF_RX_TEST0
XI XO C595 0.01U_0402_25V7K~D HF_RFIDTAG_VREF HF_RX_TEST0 HF_RX_TEST1
1 IN OUT 3 All XTAL components and traces should be HF_RX_TEST1 C9
2 2 1 2 2 1 1 B4 C10 HF_RX_TEST2
placed/layout on top layer. The gnd/pwr +1.2V_ALW_AVDD HF_RFIDTAG_DVDD1P2 HF_RX_TEST2
C1176
C1177
2 4 E9 HF_RX_TEST3
GND GND layer below will provide shielding from HF_RX_TEST3
5.1M_0402_5%~D
4.7K_0402_5%~D
C601
C602
C605
C606
C1021
1 1
2
27.12MHZ_12PF_1N227120CC0B~D 27.12Mhz interference which might affect +2.5V_ALW_AVDD C6 D7 +RFID_AVDD1P2
1 1 2 1 1 2 2 HF_RFIDTAG_AVDD2P5_C6 HF_TX_AVDD1P2
R485
C608 C609 E6 F8
cellular certification. HF_RFIDTAG_AVDD2P5_E6 HF_RX_AVDD1P2
R476
12P_0402_50V8J~D 15P_0402_50V8J~D D10
2 2 HF_RX_ADC_AVDD1P2
F9 +RFID_AVDD2P5
1
HF_RX_AVDD2P5
D6 HF_RFIDTAG_AVSS_D6 HF_TX_AVDD2P5 A7
B5
Smart Card +3.3V_ALW
SBOOT
POR_EXTR A4
HF_RFIDTAG_AVSS_B5
HF_RFIDTAG_DVSS
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3
+3.3V_ALW
2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
1 2 PORADJ HF_TX_AVSS_C7 C7
1 2 PORADJ @ R538 4.7K_0402_5%~D 1 1 1 R488
HF_TX_AVSS_C8 C8
C622
C620
R537 4.7K_0402_5%~D 1 2 CLKDIV2 +5V_ALW 3.3M_0402_5%~D E7

HF_TX_AVSS_E7
1
C706
1 2 CLKDIV1 R553 4.7K_0402_5%~D

R532 4.7K_0402_5%~D R555 A9
1
2 2 2 HF_RX_AVSS_A9
0.1U_0402_16V4Z~D
10U_0805_10V6M~D
15K_0402_1%~D B11
C639 HF_RX_AVSS_B11
2 1
U33 1U_0603_10V7K~D E8
2
HF_RX_ADC_AVSS1
C1014
C709
1 RFREADER_RXP 1 2 RFREADER_RXP_C D9
B PORADJ VDD(intf) L71 HF_RX_ADC_AVSS2 B
18 PORadj VDD 17
CLKDIV1 1 2 150NH_LLQ1608-FR15G_2%~D
6 CLKDIV1
CLKDIV2 7 16 +3.3V_ALW 3 RFREADER_TXP1 1 2 BCM5882KFBG-ES-B0_FBGA196~D
SCC_CMDVCC_N_R CLKDIV2 VDDP
1
BCM5882_SCRST 3 15 +SC_VCC 2 1 1
RSTIN VCC
2 1SCC_CMDVCC_N 5 CMDVCCN +3.3V_ALW
@ R776 BCM5882_GPIO25 2 14 R773 1 2 0_0402_5%~D SC_RST @ D31 3 C1070 C1887
0_0402_5%~D BCM5882_GPIO26 EN_5V/3VN RST R772 22_0402_5%~D SC_CLK DA204U_SOT323-3~D 390P_0603_50V8G~D 390P_0603_50V8G~D
4 13 1 2 1
AUX1UC
AUX2UC
21
EN_1.8VN
AUX1UC
CLK
I/O
AUX1
9
10
R491
R493
R492
1
1
2
2
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SC_IO
SC_C4
SC_C8
+3.3V_ALW 3
1
2
@ D32
2 2
RFID
22 11 1 2 2
@
PAD~D T143 AUX2UC AUX2

BCM5882_IO 20 8 R1459 1 2 0_0402_5%~D SC_DET C643 DA204U_SOT323-3~D RFREADER_TXN1_PI
BCM5882_SCDET I/OUC PRESN @ D33 1U_0603_10V7K~D JCS1
19 OFFN DA204U_SOT323-3~D RFREADER_RXN 1 2 RFREADER_RXN_C 1
BCM5882_SCCLK 1
23 XTAL1 XTAL2 24 2 2
+SC_VCC
10P_0402_50V8J~D
10P_0402_50V8J~D
2 2 3 3
1
25 GPAD GND 12 4 4
.47U_0402_6.3V6-K~D
C633
C1015
RFID MODE R633 RFREADER_TXP1_PI 5 7

15K_0402_1%~D 5 G1
TDA8034HN_HVQFN24_4X4~D 2 15,19 CONTACTLESS_DET# 6 6 G2 8
1 1
Component VOLTAGE CURRENT
C718
TYCO_2041084-6~D
2
SC_VCC should be 3X wide as R494,R498 NOPOP 3K L72
1 150NH_LLQ1608-FR15G_2%~D
+SC_VCC regular SC trace width to carry R555,R633 3K NOPOP RFREADER_TXN1 1 2
~60mA max. current per ISO spec
C1031 and C646 should be p +3.3V_ALW R634 3K NOPOP 1 1
0.22U_0402_6.3V6K~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
laced very close to SC cage pin +3.3V_ALW 3

1 2 Place C718 close +3.3V_ALW C641,C647 NOPOP 150P 1 C1071 C1886
@ C1031
to U33 pin15 1 2 390P_0603_50V8G~D 390P_0603_50V8G~D Hardware enable for USH TPM:Populate R841,
C646
2 2
C644
D28,D29 NOPOP POP

1 2 SPI_RST @ D34 No Stuff R483.
2 1 JSC1 R1510 4.7K_0402_5%~D D31-D34 POP NOPOP DA204U_SOT323-3~D
A 2 Hardware disable for USH TPM:No Stuff A
1 1
SC_RST 2 +3.3V_ALW R841, Populate R483
SC_CLK 2 @ U19 U34
3 3
SC_C4 4 SPI_CS 1 8 SPI_TXD 1 8 SPI_RXD +3.3V_ALW +2.5V_ALW_AVDD +1.2V_ALW_AVDD
4 /CS VCC SPI_CLK D Q BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D
5 2 7
SC_IO
6
5
6
SPI_RXD 2 DO /HOLD 7 SPI_RST SPI_RST
SPI_CS
3
C
RESET#
VSS
VCC 6
BCM5882_GPIO15
2
L38
1 +RFID_AVDD3P3 2
L36
1 +RFID_AVDD2P5 2
L37
1 +RFID_AVDD1P2 DELL CONFIDENTIAL/PROPRIETARY
7 7 4 S# W# 5
1U_0603_10V6K~D
1U_0603_10V6K~D
1U_0603_10V6K~D
3.3U_0603_10V6K~D
0.1U_0402_16V4Z~D
1U_0603_10V6K~D
1U_0603_10V6K~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
SC_C8
SC_DET
8
9
8
BCM5882_GPIO15
3 /WP CLK 6 SPI_CLK
M45PE16-VMW6TG_SO8W8~D 1 2 1 2 2 1 1 1 1
9
C626
1 2 10 4 5 SPI_TXD Title
10 GND DIO
C631
C624
C625
C630
C632
C627
C628
C629
R1468 11 GND
BCM5882_GPIO15 1 2 USH BCM5882 (1/2)
1.5K_0402_5%~D W25X32VSSIG_SO8~D R341 4.7K_0402_5%~D 2 1 2 1 1 2 2 2 2 Size Document Number Rev
12 GND 0.1
FCI_10089709-010010LF~D LA-5573P
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW +1.2V_ALW_PLL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
U32B
1 1 1
BCM5882
C1178
2 2 2 2 2 2 2 1
C1179
C592
C593
+1.2V_ALW_PLL H14 AVDD_1P2I_REF
C613
C614
C615
C616
C617
C618
C619
+1.2V_ALW_AVDD A11 AVDD_1P2O_A11
2 2 2 A12 C11
1 1 1 1 1 1 1 2 AVDD_1P2O_A12 AVSS_LDO12
+2.5V_ALW_AVDD
H13 B13
AVDD_2P5I AVSS_LDO25_B13
E10 C12
D +3.3V_ALW AVDD_2P5O_E10 AVSS_LDO25_C12 D
E11
AVDD_2P5O_E11
B14
AVSS_PLL
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
A13
AVDD25_LDO12_A13
4.7U_0603_6.3V6M~D
B12 F13
AVDD25_LDO12_B12 AVSS_REF
2 2 2 2 2 2 2
1 D12
PLL_AVSS
C621
C635
C636
C637
C638
C875
C612
A14
AVDD25_PLL_A14
C1017
E13
1 1 1 1 1 1 1 PLL_DVSS
2
D11
AVDD33_LDO25
POR_AVSS G13
+SC_PWR P13 OTP_PWR
USH BCM5882 and China TCM Z8H172T Option C1027

2 +1.2V_ALW_PLL D14 PLL_AVDD_1P2I
E14 PLL_AVDD_1P2O
PART/PIN Ref Des TCM Enable TPM Enable ALL TPM/TCM Disable 0.1U_0402_16V4Z~D C14 PLL_DVDD_1P2I VSSC_F4 F4
VSSC_F5 F5
1
TCM circuit All 3@ POP @ @ +VDDC_5882
D13 VDDC_D13 VSSC_F6 F6
F3 VDDC_F3 VSSC_F7 F7
USH_LPCEN PU R841 @ POP @ J4 VDDC_J4 VSSC_F10 F10
J5 VDDC_J5 VSSC_F11 F11
PD R483 POP @ @ J6 VDDC_J6 VSSC_F12 F12
J7 VDDC_J7 VSSC_G5 G5
SIO 5028 ->SP_TPM_LPC_EN PU R788 @ @ @ J8 VDDC_J8 VSSC_G6 G6
PCH GPIO39 ->TPM_ID1 PU R787 @ @ POP +3.3V_ALW
K7 VDDC_K7 VSSC_G9 G9
K8 VDDC_K8 VSSC_G10 G10
C
PD R339 POP POP @ VSSC_G11 G11
C
E4 VDDO_33_E4 VSSC_G12 G12
J2 VDDO_33_J2 VSSC_H5 H5
PCH GPIO38 ->TPM_ID0 PU R273 POP POP @ K3 VDDO_33_K3 VSSC_H6 H6
L8 VDDO_33_L8 VSSC_H7 H7
PD R922 @ @ POP +VDDC_5882 N10 H8
VDDO_33_N10 VSSC_H8
VSSC_H9 H9
G4 VDDO_33CORE_G4 VSSC_H10 H10
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
H3 H11
VDDO_33CORE_H3 VSSC_H11
H4 H12
VDDO_33CORE_H4 VSSC_H12
2 2 2 2 J3 J9
VDDO_33CORE_J3 VSSC_J9
J12
VSSC_J12
C596
C597
C598
C599
M13 K2
VDDO_33SC_M13 VSSC_K2
N13 K6
1 1 1 1 VDDO_33SC_N13 VSSC_K6
K13
VSSC_K13
L6 K14
VDDO_LPC_L6 VSSC_K14
M6 L5
VDDO_LPC_M6 VSSC_L5
M8
VSSC_M8
M14
VSSC_M14
K10 N9
VDDO_SC_K10 VSSC_N9
1U_0402_6.3V6K~D
1U_0402_6.3V6K~D
10U_0603_6.3V6M~D
K12 N11
VDDO_SC_K12 VSSC_N11
L12 N12
VDDO_SC_L12 VSSC_N12
2 2 1 L13 P3
VDDO_SC_L13 VSSC_P3
C1180
P4
VSSC_P4
C873
C877
LOW:Power Down Mode D5
E5
VDDO_VAR_D5
High:Working Mode China TCM: NationZ & Jetway co-lay 1 1 2 VDDO_VAR_E5
N5
VESD
+3.3V_RUN BCM5882KFBG-ES-B0_FBGA196~D
3@ U24
B B
10
VDD_0
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0603_6.3V6M~D
19
VDD_1
24
VDD_2
2 2 2 1
3@ 3@ 3@ 3@
C1171
C1172
C1173
C1174
3@ R893 1 2 0_0402_5%~D C_TPM_LPC_EN28
31,39 SP_TPM_LPC_EN LPC_LAD0_R LPCPD#
3@ R901 1 2 0_0402_5%~D 26 11
15,31,39,40 LPC_LAD0 LPC_LAD1_R LAD0 GND_11 1 1 1 2
3@ R902 1 2 0_0402_5%~D 23 18
15,31,39,40 LPC_LAD1 LPC_LAD2_R LAD1 GND_18
3@ R903 1 2 0_0402_5%~D 20 25
15,31,39,40 LPC_LAD2 LPC_LAD3_R LAD2 GND_25
3@ R904 1 2 0_0402_5%~D 17 4
15,31,39,40 LPC_LAD3 LAD3 GND_4
21 5 JETWAY_PIN5
16 CLK_PCI_TPM_CHA LCLK NC_5
3@ R905 1 2 0_0402_5%~D LPC_LFRAME#_R 22 12
15,31,39,40 LPC_LFRAME# PCI_RST#_R LFRAME# NC_12 JETWAY_CLK14M
3@ R906 1 2 0_0402_5%~D 16 13
8,18,34,36,39,40 PCH_PLTRST#_EC LRESET# NC_13 JETWAY_CLK14M 16
+3.3V_RUN 27
15,31,39,40 IRQ_SERIRQ CLKRUN#_R SERIRQ
3@ R909 1 2 0_0402_5%~D 15 1
17,39,40 CLKRUN# CLKRUN# NC_1
1 2 7 2 +3.3V_RUN
@R1210
@ R1210 4.7K_0402_5%~D TCM_BA1 PP NC_2
3 6
TCM_BA0 BA_1 NC_6
9 8
BA_0 NC_8
1U_0402_6.3V6K~D
14
NC_P
1
1
10K_0402_5%~D
10K_0402_5%~D
1 3@ @ @
C23
R1022
R1025
2
2
SSX44-B_TSSOP28~D 2
JETWAY_PIN5 TCM_BA0
TCM_BA1
2
A @ C1175 A
TCM Vender POP
1K_0402_5%~D
1K_0402_5%~D
0.1U_0402_16V4Z~D
1
1 NationZ R1026, R1023, C23, C1174 3@ 3@

R1023
R1026
Jetway C1175, R910

2

Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USH BCM5882 (2/2)
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN
+CBS_VCC
1U_0402_6.3V6K~D
1
C495
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
2 @
1 1
+5V_RUN
C496
C497
U27
2 2
1U_0402_6.3V6K~D
11 9
VCC3IN VCCOUT
1 14
D VCCOUT D
12
VCCOUT
C498
C645,Close to U94.C10
13
2 VCC5IN
C603,Close to U94.J4/K3 15
VCC5IN +CBS_VPP
C695,Close to U94.M13
VPPEN0 3 8
C697,Close to U94.M11/N11 34 VPPEN0 EN0 VPPOUT
0.1U_0402_16V4Z~D
0.01U_0402_16V7K~D
VPPEN1 4
C698,Close to U94.J3 34 VPPEN1 EN1
1 2 @
Crystal close to U94 C699,Close to U94.C8
C499
C500
VCC3EN# 2
34 VCC3EN# VCC5EN# VCC3_EN
2 1 34 VCC5EN# 1 VCC5_EN 2 1
C514
2
15P_0402_50V8J~D +3.3V_RUN 5 7
X3 U94A FLG NC
16 GND NC 6
24.576MHZ_12PF_X5H024576FC1H~D NC 10
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1
R5U241_XI A8 C10 1 1
R5U241_XO XI VCC_3V0 R5531V002-E2-FA_SSOP16~D
2 1 2 1 B8 XO VCC_3V1 J4
C603
C645
R421 0_0402_5%~D K3
C515 TPAP0 VCC_3V2
A5 TPAP0
15P_0402_50V8J~D TPAN0 B5 2 2 +3.3V_RUN_CARD
+3.3V_RUN TPBIAS0 TPAN0
C7
TPBP0 A6
TPBIAS0
TPBP0 +PCIE_PHY
SD Conn.
47U_0805_6.3V6M~D
0.1U_0402_16V4Z~D
TPBN0 B6 TPBN0
Pitch=0.5
1
1 2 CPS D4 1 1
CPS
C21
R1146 C8 R1464
PCIE_VOUT0
C767
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0_0402_5%~D J3 150K_0402_5%~D
PCIE_VOUT1
16 CLK_PCIE_PCM N8 REFCLKP 1 1 1 1 1 2 2 JSD1
M8
2
16 CLK_PCIE_PCM# REFCLKN
C695
C697
C698
C699
M13 C700 SD_DET# 1
C PCIE_PRX_PCMTX_P3_C N12 PCIE_VIN0 10U_0805_10V4Z~D 18 SD_DET# SDWP 1 C
C710,C713 as close 16 PCIE_PRX_PCMTX_P3
C710 1 2 0.1U_0402_10V7K~D TXP PCIE_VIN1 M11
2 2 2 2 2
2 2
C713 1 2 0.1U_0402_10V7K~D PCIE_PRX_PCMTX_N3_C N13 N11 SDCD#/MMCCD# 3
as possible to U94 16 PCIE_PRX_PCMTX_N3 TXN PCIE_VIN2 SDDAT1/MMCDAT1 3
Place close to 4 4
SDDAT0/MMCDAT0 5
N10
JSD1.9 MMCDAT7 6
5
16 PCIE_PTX_PCMRX_P3_C RXP C21 need to change MMCDAT6 6
16 PCIE_PTX_PCMRX_N3_C M10 RXN PCIe / Power / 7 7
1394 / MultiCard 47uF for R5U242 8 8
D7 SDCLK/MMC_CLK 9
AVCC_3V +3.3V_RUN 9
1U_0402_6.3V6K~D
0.1U_0402_16V4Z~D
10
PLTRST_R5U242# 10
18 PLTRST_R5U242# M12 1 1 +3.3V_RUN_CARD 11
RXC PERST# MMCDAT5 11
L9 +3.3V_RUN_CARD 12
RXC 12
10P_0402_50V8J~D
C701
C702
CPO L10 SDCMD/MMCCMD 13
RREF CPO MMCDAT4 13
L11 1 14
RREF 2 2 14
C491
0.1U_0402_16V4Z~D
D13 SDDAT3/MMCDAT3 15
MF_VOUT SDDAT2/MMCDAT2 15
1 16
16
0.022U_0402_16V7K~D
SDWP H13
MFIO00
1
2
1500P_0402_7K~D
C703
1 1 SDDAT1/MMCDAT1 R36 1 2 0_0402_5%~D SDDAT1/MMCDAT1_RH12
SDDAT0/MMCDAT0 R35 MFIO01
R1148 1 2 0_0402_5%~D SDDAT0/MMCDAT0_RG13 D8 C701,C702 Close to U94.D7 17
MFIO02 SD18C 2 G1
C707
C705
5.1K_0402_1%~D MMCDAT7 G12 18

MMCDAT6 MFIO03 G2
F13 K11
2 2 SDCLK/MMC_CLK MFIO04 AGND0
R8 Close to U94 R8 1 2 22_0402_5%~D SDCLK/MMC_CLK_R F12 L12 1 C703,Close to U94.D13
2
MFIO05 AGND1 C1889

SDCLK/MMC_CLK D12 A7
MMCDAT5 MFIO06 GND0 1U_0402_6.3V6K~D
D10 B7
need shield GND SDCMD/MMCCMD R34 MFIO07 GND1
1 2 0_0402_5%~D SDCMD/MMCCMD_R C13 MFIO08 GND2
C6 HRS_FH12-16S-0P5SH(55)~D
MMCDAT4 C12 D11 2
SDDAT3/MMCDAT3 R32 MFIO09 GND3
1 2 0_0402_5%~D SDDAT3/MMCDAT3_RB13 MFIO10 GND4
E12
C707,C705,R1148 as close SDDAT2/MMCDAT2 R31 1 2 0_0402_5%~D SDDAT2/MMCDAT2_RC11 E13 R46: only for MMC/SD
MFIO11 GND5
as possible to U94 A13 K4 For R5U241 should be 0 ohm,
MFIO12 GND8
B12 L8
MFIO13 GND9 R5U242 should be 1uF
A12 M9
MFIO14 GND10
GND11
N9 2A Current Capacity Required
0.33U_0603_10V7K~D
SDCD#/MMCCD# F11 L5 TPBIAS0
MFCD0# GND12 between R5U242 and SD Card Slot
54.9_0402_1%~D
54.9_0402_1%~D
B B
G11 1
MFCD1#
1
G10
MFCD2#
R398
R399
C493
H1
USBDP 2
H2
USBDM
2
R5U242-ES3-CSP144P_CSP144~D
TPAP0
TPAN0 TPAP0 37
MFIO Pin Assignment Table TPBP0 TPAN0 37
TPBN0 TPBP0 37
TPBN0 37
MFIO SD8 XD MS8
1
00 WP D7 BS
1
R401
01 D1 D6 - R403 54.9_0402_1%~D
54.9_0402_1%~D
02 D0 D5 D1
2
03 D7 D4 -
2
Z3008
04 D6 D3 D5
2
05 CLK D2 D0 2
R407
06 - D1 - C494 5.1K_0402_1%~D
07 D5 D0 D4 270P_0402_50V7K~D
1
08 CMD WP# D2
1
Close to U94
09 D4 WE# D6
10 D3 ALE D3
11 D2 CLE -
12 - CE# -
A A
13 - RE# D7
14 - R/B# CLK
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U242 (1/2)
5 4 3 2 1
5 4 3 2 1
+1.5V_CARD
+1.5V_RUN
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
U94B +3.3V_SUS +3.3V_RUN
0.1U_0402_16V4Z~D
1 1 1 1 +3.3V_CARD
L2 CBS_CAD19
CADR25
C997
C999
C1000
C1012
C9 K2 CBS_CAD17
GND CADR24
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
A10 H4 CBS_CFRAME# 1 1
GND CADR23 2 U52 2 2 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
A9 J1 CBS_CTRDY#
GND CADR22
C134
C135
+3.3V_RUN B9 G3 CBS_CDEVSEL# 12 11
GND CADR21 CBS_CSTOP# 1.5Vin 1.5Vout
B11 F3 14 13 1 1 1
GND CADR20 CBS_CBLOCK# 2 2 1.5Vin 1.5Vout
A11 G2
GND CADR19
1
C1001
C1002
C1003
D CBS_DATA18 D
CADR18
F2 R410 Close to U94, CBS_CCLK need shield GND
E2 CBS_CAD16 2 3
R1151 CADR17 CBS_CCLK_R CBS_CCLK 3.3Vin 3.3Vout 2 2 2
H10 H3 2 1 4 5
47K_0402_5%~D NC CADR16 CBS_CIRDY# R410 3.3Vin 3.3Vout
B10 J2
R81 GND CADR15 CBS_CPERR# 0_0402_5%~D
G1 17 15 +3.3V_CARDAUX
2
0_0402_5%~D CADR14 CBS_CPAR AUX_IN AUX_OUT

K13 F1
UDIO0 CADR13
0.1U_0402_16V4Z~D
10U_0805_6.3V6M~D
1 2 K12 K1 CBS_CC/BE2# PCH_PLTRST#_EC 6 19
15,16 PCMCLK_REQ# UDIO1 CADR12 8,18,32,36,39,40 PCH_PLTRST#_EC SYSRST# OC#
J13 C2 CBS_CAD12
UDIO2 CADR11 CBS_CAD9
J12 C3 20 8 1 1
UDIO3 CADR10 SHDN# PERST#
C1006
C1016
J11 D2 CBS_CAD14 R684 1 2 0_0402_5%~D
UDIO4 CADR9 CBS_CC/BE1# 12,39,42,47,62 RUN_ON EXPRCRD_STBY_R#
H11 E3 @ R683 1 2 0_0402_5%~D 1 16
SPKROUT UDIO5 CADR8 CBS_CAD18 39 EXPRCRD_STDBY# STBY# NC
J10 SPKROUT CADR7 L1
L13 M1 CBS_CAD20 @ R687 1 2 0_0402_5%~D EXPRCRD_CPPE# 10 7 2 2
PWR_ON_RST WAKE# CADR6 CBS_CAD21 39 EXPRCRD_PWREN# CPPE# GND
SROM: SPKROUT K9 GBRST# CADR5 M2
Pull-Hi: Disable L3 CBS_CAD22 CPUSB# 9
CADR4 CBS_CAD23 CPUSB#
Pull-Lo: Enable (Default) K10 TEST CADR3 M3
N3 CBS_CAD24 +3.3V_SUS 18
CARDBUS / MEDIA CARD / SD Card

CADR2 CBS_CAD25 RCLKEN
CADR1 N4
1
M4 CBS_CAD26 TPS2231MRGPR-1_QFN20_4X4~D CARD_RESET#

+3.3V_RUN CADR0
2.2K_0402_5%~D
2.2K_0402_5%~D
@ R1152 B1 CBS_CAD8
CDATA15
1
47K_0402_5%~D B2 CBS_DATA14
CDATA14
1
B3 CBS_CAD6
2
CDATA13
R126
R127
R1150 C4 CBS_CAD4
47K_0402_1%~D CDATA12 CBS_CAD2
CDATA11 B4
M7 CBS_CAD31
2
CDATA10 CBS_CAD30
M6
2
PWR_ON_RST CDATA9 CBS_CAD28 CARD_SMBDAT

CDATA8 M5 40 CARD_SMBDAT
A1 CBS_CAD7
CDATA7 CBS_CAD5
1 CDATA6 A2
A3 CBS_CAD3
C
2
C708
1U_0603_25V6-K~D
CDATA5
CDATA4
CDATA3
A4
C5
CBS_CAD1
CBS_CAD0
CBS_DATA2
Express Card BTB Conn. C
CDATA2 N7
N6 CBS_CAD29
CDATA1 CBS_CAD27 CARD_SMBCLK
CDATA0 N5 40 CARD_SMBCLK +1.5V_CARD: Max. 650mA, Average 500mA
CBS_CAD11
OE# C1
CBS_CGNT# +3.3V_CARD: Max. 1300mA, Average 1000mA
Power-On-Reset: GBRST# WE# F4
CBS_CAD10
D3
(Global Reset) CE2# CBS_CC/BE0#
D5
CE1# CBS_CC/BE3# +3.3V_ALW
Note: De-asserted BEFORE L4
REG# CBS_CRST# +1.5V_CARD
N1
RESET
PERST# de-assertion WAIT#
N2 CBS_CSERR#
0.1U_0402_16V4Z~D
L7 CBS_CCLKRUN#
WP#/IOIS16#
2
G4 CBS_CINT#
RDY/IREQ# CBS_CAUDIO
L6 1 2 1
BVD2 CBS_CSTSCHNG @ R791 0_0402_5%~D R947
K7
BVD1
C1007
K5 CBS_CVS2 100K_0402_5%~D
VS2# CBS_CVS1
E4
1
VPPEN1 VS1# CBS_CCD2# 2
D9 K8 1 2
33 VPPEN1 VPPEN0 VPPEN1 CD2# CBS_CCD1# @ R792 0_0402_5%~D JEXP1
E10 D6
33 VPPEN0 VCC3EN# VPPEN0 CD1# CBS_CREQ#
F10 K6 4 4
3 3
18 USBP10- 1 2 +3.3V_CARDAUX
33 VCC3EN# VCC5EN# VCC3EN# INPACK# CBS_CAD13 39 EXPRCRD_DET# 1 2 CARD_RESET#
E11 D1 3 4
33 VCC5EN# VCC5EN# IORD# 3 4
0.1U_0402_16V4Z~D
E1 CBS_CAD15 USBP10_D- 5 6
IOWR# USBP10_D+ 5 6
18 USBP10+ 1 2 7 8 1
1 2 7 8 EXPCLK_REQ# 16
C1004
CPUSB# 9 10 EXPRCRD_CPPE#
R5U242-ES3-CSP144P_CSP144~D L64 9 10
11 12
DLW21SN900SQ2_0805~D CARD_SMBCLK 11 12
13 14 CLK_PCIE_EXP# 16
CARD_SMBDAT 13 14 2
15 16 CLK_PCIE_EXP 16
15 16
17 18
17 18
19 20 PCIE_PRX_EXPTX_N4 16
19 20
21 22 PCIE_PRX_EXPTX_P4 16
PCIE_WAKE# 21 22
23 24
B JCBUS1 36,39 PCIE_WAKE# 23 24 B
+3.3V_CARD 25 26 PCIE_PTX_EXPRX_N4_C 16
25 26
1 35 27 28 PCIE_PTX_EXPRX_P4_C 16
CBS_CAD0 GND1 GND3 CBS_CCD1# 27 28
2 36 29 30
CBS_CAD1 CAD0 CCD1# CBS_CAD2 29 30
3 37
CBS_CAD3 CAD1 CAD2 CBS_CAD4 +CBS_VPP
4 38 31 32
CAD3 CAD4 G1 G2
0.1U_0402_10V7K~D
0.1U_0402_16V4Z~D
CBS_CAD5 5 39 CBS_CAD6
CBS_CAD7 CAD5 CAD6 CBS_DATA14 LOTES_YEA-BTB-020-130K13
6 40
CBS_CC/BE0# CAD7 CB_D14 CBS_CAD8
7 41 1 1
CBS_CAD9 CCBE0# CAD8 CBS_CAD10
8 42
CAD9 CAD10
C769
C1005
CBS_CAD11 9 43 CBS_CVS1
CBS_CAD12 CAD11 CVS1 CBS_CAD13
10 44
CBS_CAD14 CAD12 CAD13 CBS_CAD15 2 2
11 45
CBS_CC/BE1# CAD14 CAD15 CBS_CAD16
12 46
CBS_CPAR CCBE1# CAD16 CBS_DATA18
13 47
CBS_CPERR# CPAR CB_D18 CBS_CBLOCK#
14 48
CBS_CGNT# CPERR# CBLOCK# CBS_CSTOP#
15 49
CBS_CINT# CGNT# CSTOP# CBS_CDEVSEL#
16 50
CINT# CDEVSEL# Close to JCBUS1 Pin18/52
+CBS_VCC 17 51 +CBS_VCC
VCC VCC
+CBS_VPP 18 52 +CBS_VPP
CBS_CCLK VPP1 VPP2 CBS_CTRDY#
19 53
CBS_CIRDY# CCLK CTRDY# CBS_CFRAME#
20 54
CBS_CC/BE2# CIRDY# CFRAME# CBS_CAD17
21 55
CBS_CAD18 CCBE2# CAD17 CBS_CAD19 +CBS_VCC
22 56
CBS_CAD20 CAD18 CAD19 CBS_CVS2
23 57
CBS_CAD21 CAD20 CVS2 CBS_CRST#
24 58
CBS_CAD22 CAD21 CRST# CBS_CSERR#
25 59
CAD22 CSERR#
0.01U_0402_16V7K~D
0.01U_0402_16V7K~D
10U_0805_10V4Z~D
CBS_CAD23 26 60 CBS_CREQ#
CBS_CAD24 CAD23 CREQ# CBS_CC/BE3#
27 61
CBS_CAD25 CAD24 CCBE3# CBS_CAUDIO
28 62 1 1 1
CAD25 CAUDIO
C541
C542
C543
CBS_CAD26 29 63 CBS_CSTSCHNG
CBS_CAD27 CAD26 CSTSCHG CBS_CAD28
30 64
CBS_CAD29 CAD27 CAD28 CBS_CAD30
31 CAD29 CAD30 65
A CBS_DATA2 32 66 CBS_CAD31 2 2 2 A
CBS_CCLKRUN# CB_D2 CAD31 CBS_CCD2#
33 CCLKRUN# CCD2# 67
34 GND2 GND4 68
Close to JCBUS1 pin23,63
69 GND5 GND7 71 DELL CONFIDENTIAL/PROPRIETARY
70 GND6 GND8 72
MOLEX_48315-0013_RT Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U242 (2/2)
5 4 3 2 1
5 4 3 2 1
For Asics placement estimate PCIE/SATA SW for Mini card1

+1.5V_RUN
0.1U_0402_16V4Z~D
Impedance please keep 90 ohm
1@ C1715
1@ U138
VDD 9 1 1
PCIE_PRX_WWANTX_N1_SW 4 11 1@ C1714 The pin-out of the SATA Mini Card module
36 PCIE_PRX_WWANTX_N1_SW PCIE_PRX_WWANTX_P1_SW A0+ VDD
5 13 0.1U_0402_16V4Z~D
36 PCIE_PRX_WWANTX_P1_SW A0- VDD was changed. The change was the RX-
19
PCIE_PTX_WWANRX_N1_C_SW VDD 2 2
6 26 & RX+ were swapped on the module.
D 36 PCIE_PTX_WWANRX_N1_C_SW PCIE_PTX_WWANRX_P1_C_SW A1+ VDD D
7 28
36 PCIE_PTX_WWANRX_P1_C_SW A1- VDD
MCARD_PCIE_SATA# 3 24 SATA_PRX_WWANTX_P3 2 1 SATA_PRX_WWANTX_P3_C
36,39 MCARD_PCIE_SATA# SEL B0+ SATA_PRX_WWANTX_P3_C 15
23 SATA_PRX_WWANTX_N3 1@ C449 0.01U_0402_16V7K~D
B0- SATA_PTX_WWANRX_N3
22
B1+ SATA_PTX_WWANRX_P3
1 21
GND B1-
10 18
GND C0+ SATA_PRX_WWANTX_N3_C
12 17 2 1
GND C0- 1@C450
1@ C450 0.01U_0402_16V7K~D SATA_PRX_WWANTX_N3_C 15
14 16
GND C1+
20 15
GND C1-
25
GND SATA_PTX_WWANRX_N3_C
27 GND NC 2 2 1 SATA_PTX_WWANRX_N3_C 15
29 8 1@ C1393 0.01U_0402_16V7K~D
TPAD NC
PI2DBS212ZHEX_TQFN28_5P5X3P5~D 2 1 SATA_PTX_WWANRX_P3_C
SATA_PTX_WWANRX_P3_C 15
1@ C1394 0.01U_0402_16V7K~D
PCIE_PRX_WANTX_N1 16
PCIE_PRX_WANTX_P1 16
PCIE_PTX_WANRX_N1_C 16
2@ R1322 2 1 PCIE_PTX_WWANRX_P1_C_R 2@ R1347 2 1 PCIE_PTX_WANRX_P1_C 16
0_0402_5%~D 0_0402_5%~D
2@ R1323 2 1 PCIE_PTX_WWANRX_N1_C_R 2@ R1348 2 1
0_0402_5%~D 0_0402_5%~D
2@ R1324 2 1 PCIE_PRX_WWANTX_P1_R 2@ R1349 2 1
0_0402_5%~D 0_0402_5%~D
2@ R1326 2 1 PCIE_PRX_WWANTX_N1_R 2@ R1350 2 1
0_0402_5%~D 0_0402_5%~D
SEL Function
C C
0 A=B
1 A=C
Power Control for Mini card1 Power Control for Mini card2 Power Control for Mini card3
+15V_ALW +3.3V_ALW +3.3V_WLAN +15V_ALW +3.3V_ALW +3.3V_PCIE_BKT
+15V_ALW +3.3V_ALW +3.3V_PCIE_SATA_WAN +3.3V_RUN
100K_0402_5%~D
100K_0402_5%~D
D
D
100K_0402_5%~D
@ R504
@R504 6 6
S
1
1
D
100K_0402_5%~D
100K_0402_5%~D
6 0_0805_5%~D 5 4 5 4
S
1
1
R432
R436
100K_0402_5%~D
20K_0402_5%~D
5 4 1 2 2 2
1
1
R453
B Q47 Q50 B
2 1 1
20K_0402_5%~D
R431
R435
R1525
1 Q51 SI3456BDV-T1-E3_TSOP6~D SI3456BDV-T1-E3_TSOP6~D
G
1
R451
SI3456BDV-T1-E3_TSOP6~D
G
3
20K_0402_5%~D
R1524
2
2
1
2
2
3
3
4700P_0402_25V7K~D
4700P_0402_25V7K~D
R1523
3
Q53B
Q192B
4700P_0402_25V7K~D
1 1
2
Q193B
C551
C553
5 5
2
C571
5
6
6
2 2
4
6
2 Q53A Q192A
4
Q193A DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D

DMN66D0LDW-7_SOT363-6~D 2 2
39 AUX_EN_WOWL 39 MCARD_PCIE_BKT_PWREN
39 MCARD_WWAN_PWREN 2
1
1
1
1
1
R437 R450
1
R452 100K_0402_5%~D 100K_0402_5%~D

100K_0402_5%~D
2
2
2
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PCIE/SATA SW & PCIE PWR
LA-5573P
5 4 3 2 1
5 4 3 2 1
+3.3V_ALW_PCH +3.3V_RUN 1 2 +3.3V_ALW_PCH

@R428
@ R428 0_0402_5%~D
PCIE_MCARD1_DET# 1 2
1 2 WLAN_RADIO_DIS#_R R443 100K_0402_5%~D
USB_MCARD2_DET# 2 PCIE_MCARD2_DET# 1 39 WLAN_RADIO_DIS#
1 2
R447 100K_0402_5%~D R449 100K_0402_5%~D D21
MCARD_PCIE_SATA# 1 2 RB751S40T1_SOD523-2~D
R455 100K_0402_5%~D
+1.5V_RUN
USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
33P_0402_50V8J~D
0.047U_0402_16V4Z~D
@ R740 0_0402_5%~D
D D
1 1
Mini WWAN H=5.2

C569
C570
2 2 Mini WLAN H=4
+3.3V_PCIE_SATA_WAN +3.3V_PCIE_SATA_WAN
JMINI1 USB_MCARD1_DET# 1 2PCIE_MCARD1_DET# +3.3V_RUN
1 1 2 @ R741 0_0402_5%~D
2 +3.3V_WLAN +3.3V_WLAN
3 3 4
4
5 5 6 +1.5V_RUN
MINI1CLK_REQ# 6 JMINI2 +1.5V_RUN PCIE_MCARD1_DET# 1
7 7 8 +SIM_PWR 2
16 MINI1CLK_REQ# 8 UIM_DATA PCIE_WAKE# @ R439 100K_0402_5%~D
9 9 10 34,39 PCIE_WAKE# 1 2
CLK_PCIE_MINI1# 10 UIM_CLK COEX2_WLAN_ACTIVE R440 1 2 USB_MCARD1_DET#
11 11 12 12 1 2 0_0402_5%~D 3 3 4 4 1 2
16 CLK_PCIE_MINI1# CLK_PCIE_MINI1 UIM_RESET 41 COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE R441
13 13 14 1 2 0_0402_5%~D 5 6 R438 100K_0402_5%~D
16 CLK_PCIE_MINI1 14 UIM_VPP 41 COEX1_BT_ACTIVE 5 6
15 15 16 16 7 7 8 8
16 MINI2CLK_REQ#
17 17 18 9 10 1 2
18 WWAN_RADIO_DIS# 9 10
19 19 20 20 WWAN_RADIO_DIS# 39 11 11 12 12
16 CLK_PCIE_MINI2# C1705 4700P_0402_25V7K~D
21 21 22 1 2 PCH_PLTRST#_EC 8,18,32,34,39,40 13 14
PCIE_PRX_WWANTX_N1_SW 22 R442 0_0402_5%~D 16 CLK_PCIE_MINI2 13 14
23 23 24 24 15 15 16 16 HOST_DEBUG_TX 40
35 PCIE_PRX_WWANTX_N1_SW PCIE_PRX_WWANTX_P1_SW 25 25 26 26 17 17 18 18
35 PCIE_PRX_WWANTX_P1_SW 40 HOST_DEBUG_RX WLAN_RADIO_DIS#_R
27 27 28 28 40 MSCLK 19 19 20 20
29 29 30 30 21 21 22 22 2 1 PCH_PLTRST#_EC
PCIE_PTX_WWANRX_N1_C_SW 31 31 32 PCIE_PRX_WLANTX_N2 23 24 R444 0_0402_5%~D
35 PCIE_PTX_WWANRX_N1_C_SW PCIE_PTX_WWANRX_P1_C_SW 32 16 PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 23 24
35 PCIE_PTX_WWANRX_P1_C_SW 33 33 34 34 25 25 26 26
USBP5- 16 PCIE_PRX_WLANTX_P2
35 35 36 36 USBP5- 18 27 27 28 28
PCIE_MCARD2_DET# 37 37 38 USBP5+ 29 30
18 PCIE_MCARD2_DET# 38 USB_MCARD2_DET# USBP5+ 18 PCIE_PTX_WLANRX_N2_C 29 30
39 39 40 40 USB_MCARD2_DET# 19 16 PCIE_PTX_WLANRX_N2_C 31 31 32 32
41 41 42 LED_WWAN_OUT# COEX2_WLAN_ACTIVE PCIE_PTX_WLANRX_P2_C 33 34
42 LED_WWAN_OUT# 43 16 PCIE_PTX_WLANRX_P2_C 33 34 USBP4-
43 43 44 44 35 35 36 36 USBP4- 18
45 45 46 1 2 WIMAX_LED# 1 PCIE_MCARD1_DET# 37 38 USBP4+
46 19 PCIE_MCARD1_DET# 37 38 USB_MCARD1_DET# USBP4+ 18
47 47 48 R840 0_0402_5%~D 39 40
48 39 40 WIMAX_LED# USB_MCARD1_DET# 19
49 49 50 For WIMAX LED debug @ C552 41 42
C MCARD_PCIE_SATA# 50 33P_0402_50V8J~D 41 42 LED_WLAN_OUT# C
35,39 MCARD_PCIE_SATA# 51 51 52 52 43 43 44 44 LED_WLAN_OUT# 43
2
16 PCH_CL_CLK1 45 45 46 46
53 GND1 GND2 54 16 PCH_CL_DATA1 47 47 48 48 1 2 MSDATA 40
16 PCH_CL_RST1# 1 2 PCH_CL_RST1#_R 49 49 50 50 @ R1409 0_0402_5%~D
R448 0_0402_5%~D 51 52
TYCO_1775861-1~D 51 52
53 GND1 GND2 54
+1.5V_RUN +3.3V_WLAN
330U_D2E_6.3VM_R25~D
TYCO_1775861-1~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
+3.3V_PCIE_SATA_WAN
Primary Power Aux Power 1
PWR Voltage 1 1 1 1 1 1 1 1 @
C554
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
33P_0402_50V8J~D
22U_0805_6.3VAM~D
33P_0402_50V8J~D
330U_D2E_6.3VM_R25~D
@ +
Rail Tolerance
C555
C556
C557
C558
C559
C560
C561
C562
1 Peak Normal Normal
1 1 1 1 1 2 2 2 2 2 2 2 2 2
+
C564
C565
C566
C567
C568
C563
+3.3V +-9% 1000 750

2 2 2 2 2 2
250 (Wake enable)
+3.3Vaux +-9% 330 250 5 (Not wake enable)
+1.5V +-5% 500 375 NA USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET# WPAN Noise

@ R742 0_0402_5%~D
USB_MCARD3_DET#
PCIE/BKT Card H=4 1
+SIM_PWR
SIM Card Push-Push +3.3V_PCIE_BKT +3.3V_PCIE_BKT C572
4700P_0402_25V7K~D
JMINI3 2
B JSIM1 PCIE_WAKE# B
1 2
COEX2_WLAN_ACTIVE R454 1 1 2
1 5 2 0_0402_5%~D 3 4
UIM_RESET VCC GND UIM_VPP 3 4
2 6 5 6 +1.5V_RUN
UIM_CLK RST VPP UIM_DATA MINI3CLK_REQ# 5 6
3 7 16 MINI3CLK_REQ# 7 8
CLK I/O 7 8
4
NC NC
8 9
9 10
10 Confirm with DELL about UWB
9 CLK_PCIE_MINI3# 11 12
GND 16 CLK_PCIE_MINI3# 11 12
1U_0402_6.3V6K~D
10 CLK_PCIE_MINI3 13 14
GND 16 CLK_PCIE_MINI3 13 14
1 15 16
MOLEX_475531001 15 16
17 18
17 18
C573
19 20 UWB_RADIO_DIS#
19 20 UWB_RADIO_DIS# 39
21 22 2 1 PCH_PLTRST#_EC
2 PCIE_PRX_WPANTX_N5 21 22 R456 0_0402_5%~D
23 24
16 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 23 24
25 26
16 PCIE_PRX_WPANTX_P5 25 26
27 28
27 28
29 30
PCIE_PTX_WPANRX_N5_C 29 30
16 PCIE_PTX_WPANRX_N5_C 31 32
U31 PCIE_PTX_WPANRX_P5_C 31 32
16 PCIE_PTX_WPANRX_P5_C 33 34
33 34 USBP13-
35 36 USBP13- 18
PCIE_MCARD3_DET# 35 36 USBP13+
37 38 USBP13+ 18
UIM_RESET UIM_VPP 18 PCIE_MCARD3_DET# 37 38 USB_MCARD3_DET#
1 6 39 40 USB_MCARD3_DET# 15
39 40
+3.3V_RUN 1 2 41 42
R458 100K_0402_5%~D 41 42
43 44 2 1 +3.3V_ALW_PCH
43 44 R266 100K_0402_5%~D
2 5 +SIM_PWR 45 46
45 46
47 48
47 48
49 50
UIM_CLK UIM_DATA +1.5V_RUN +3.3V_PCIE_BKT 49 50
3 4 51 52
51 52
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
33P_0402_50V8J~D
53 54
GND1 GND2
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.047U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
4.7U_0603_6.3V6M~D
1 @ 1 @ 1 @ 1 @
SRV05-4.TCT_SOT23-6~D
C574
C575
C576
C577
1 1 1 1 1 1 1 1 TYCO_1775861-1~D
@
2 2 2 2
C578
C579
C580
C581
C582
C583
C584
C585
A A
2 2 2 2 2 2 2 2
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
LA-5573P
5 4 3 2 1
5 4 3 2 1
@ L29
DLW21SN121SQ2L_4P~D +5V_ESATA/USB3 +5V_ESATA/USB2
1 FP_USB_D+
31 FP_USBD+ 1 2 2
+5V_ALW PJP23
4 3 FP_USB_D- JUMP_43X79 U53
31 FP_USBD- 4 3 USB_OC1#
2 2 1 1 1 GND FAULT1# 10 USB_OC1# 18
1 2 +5V_ALW_USB 2 9
IN OUT1
0.1U_0402_16V4Z~D
10U_1206_16V4Z~D
R422 0_0402_5%~D +5V_RUN Place close to 3 IN OUT2 8
1 2 4 7 R28 1 2 +3.3V_RUN
R423 0_0402_5%~D
JBIO1.6 39 ESATA_USB_PWR_EN#
5
EN1# ILIM
6 24.9K_0402_1%~D
1 1 EN2# FAULT#2
C546
C547
11
Fingerprint CONN. 105 degree T-PAD
ESATA Repeater @
0.01U_0402_16V7K~D
0.1U_0402_16V4Z~D
R1298
R1299
D TPS2560DRCR-PG1.1_SON10_3X3~D D
2
+3.3V_RUN 2 2
1 1
JBIO1 R1494
0.1U_0402_16V4Z~D
C1378
C1379
1 @ R1497 2 1
1 +3.3V_RUN
0_0402_5%~D
0_0402_5%~D
2 0_0402_5%~D
2 FP_USB_D- EN_ESATA_RPTR 2 2
3 1 39 EN_ESATA_RPTR 1 2 ESATA_PWRSAVE 0_0402_5%~D
1
3 FP_USB_D+
4
4
C770
5 FP_RESET# 31 U95
5
6 7 6
6 2 ESATA_PTX_DRX_P4_C 2 ESATA_PTX_DRX_P4 EN VCC
7 15 ESATA_PTX_DRX_P4_C 1 10
GND C304 0.01U_0402_16V7K~D VCC
8 1 16
GND ESATA_PTX_DRX_N4_C 2 ESATA_PTX_DRX_N4 RX_1P VCC
15 ESATA_PTX_DRX_N4_C 1 2 RX_1N VCC 20
TYCO_2041070-6~D +3.3V_RUN Place close to C303 0.01U_0402_16V7K~D
ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4 5 9
JBIO1.1 @ R1513 15 ESATA_PRX_DTX_P4_C C1380 0.01U_0402_16V7K~D 4
TX_2P PE1
8
ESATA_PRX_DTX_N4_C 2 TX_2N PE2
0_0402_5%~D 1 ESATA_PRX_DTX_N4
15 ESATA_PRX_DTX_N4_C
1 2 EN_ESATA_RPTR# EN_ESATA_RPTR# 15,19 C1381 0.01U_0402_16V7K~D 3 GND TX_1P 15 ESATA_PTX_DRX_P4_RP
U51 13 14 ESATA_PTX_DRX_N4_RP
GND TX_1N
1 GND VCC 4 +3.3V_RUN 17 GND
+5V_ESATA/USB3 18 12 ESATA_PRX_DTX_N4_RP
GND RX_2N
1
D ESATA_PRX_DTX_P4_RP
19 GND RX_2P 11
FP_USB_D- 2 3 FP_USB_D+ ESATA_PWRSAVE 2 @ Q210 21
IO1 IO2 PAD
150U_D2_6.3VY_R15M~D
G SSM3K7002FU_SC70-3~D
1
1
0.1U_0402_16V4Z~D
PRTR5V0U2X_SOT143-4~D S SN75LVCP412ARTJR_QFN20_4X4~D
0_0402_5%~D
1 R1301
R1300
1 0_0402_5%~D
+
C544
C545
2
2
@
2 2
L30 L31
HCMC0805-900MFS_4P~D HCMC0805-900MFS_4P~D
C USBP2+ USBP2_D+ USBP3+ USBP3_D+ JESA1 C
18 USBP2+ 4 4 3 3 18 USBP3+ 4 4 3 3
1 A_VBUS
USBP3_D- 2
USBP2- USBP2_D- USBP3- USBP3_D- USBP3_D+ A_D-
18 USBP2- 1 1 2 2 18 USBP3- 1 1 2 2 3 A_D+
+5V_ESATA/USB2 4 A_GND
1 2 1 2 5 USB
B_VBUS
150U_D2_6.3VY_R15M~D
@ R424 0_0402_5%~D @ R426 0_0402_5%~D USBP2_D- 6
B_D-
0.1U_0402_16V4Z~D
1 USBP2_D+ 7
B_D+
1 2 1 2 1 8
@ R425 0_0402_5%~D @ R427 0_0402_5%~D + B_GND
C588
C548
ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 9
C1376 0.01U_0402_16V7K~D GND
10
2 2 ESATA_PTX_DRX_N4_RP A+
1 2 SATA_PTX_DRX_N4 11 ESATA
C1377 0.01U_0402_16V7K~D A-
12
ESATA_PRX_DTX_N4_RP GND
1 2 SATA_PRX_DTX_N4 13
C549 0.01U_0402_16V7K~D B-
14
ESATA_PRX_DTX_P4_RP B+
1 2 SATA_PRX_DTX_P4 15
C550 0.01U_0402_16V7K~D GND
I/O board 60 pin CONN. 16
G1
17
JIO1 G2
18
DETECT_GND G3
30 SW_LAN_TX3+ 1 2 19
1 2 G4
30 SW_LAN_TX3- 3 4
3 4 AUD_EXT_MIC_L 29 FCI_10100446-003RLF
5 6
5 6 AUD_EXT_MIC_R 29
30 SW_LAN_TX2- 7 8
7 8
30 SW_LAN_TX2+ 9 10 +VREFOUT
9 10 PCH_AZ_MDC_RST1#
S
11 12 15 PCH_AZ_MDC_RST# 1 3
11 12 AUD_MIC_SWITCH 29
30 SW_LAN_TX1+ 13 14 LAN_ACTLED_YEL# 30
13 14 @ D4 +5V_ALW
30 SW_LAN_TX1- 15 16 LED_10_GRN# 30
15 16
100K_0402_5%~D
17 18 USBP2_D- 1 6 USBP2_D+ Q35
G
2
17 18 LED_100_ORG# 30 V I/O V I/O
1
10K_0402_5%~D
19 20 LID_CL# SSM3K7002FU_SC70-3~D
30 SW_LAN_TX0- 19 20 LID_CL# 39,43
R325
B B
30 SW_LAN_TX0+ 21 22 +LOM_VCT_IO 2 5 +5V_ALW_USB
21 22 Ground V BUS
1
23 24 USB_SIDE_EN# 39
23 24
R326
25 26 USBP3_D+ 3 4 USBP3_D-
+3.3V_LAN 25 26 USB_OC0# 18 V I/O V I/O
27 28
2
27 28 WIRELESS_ON#/OFF IP4223CZ6_SO6~D
18 USBP0+ 29 30
29 30 LAT_ON_SW_BTN# WIRELESS_ON#/OFF 39
18 USBP0- 31 32 LAT_ON_SW_BTN# 40
2
31 32
33 34 39 MDC_RST_DIS#
33 34 AUD_HP_NB_SENSE 29,39
18 USBP1+ 35 36
35 36
18 USBP1- 37 38 AUD_HP_OUT_L 29
37 38
39 40
41
39
41
40
42
42
AUD_HP_OUT_R 29 MDC CONN. H=5.5, Pitch=0.8
43 44 TPAP0
43 44 TPAN0 TPAP0 33 JMDC1
45 46 TPAN0 33
45 46 +3.3V_ALW_PCH
+5V_ALW 47 48
BREATH_BLUE_LED_SNIFF 49 47 48 TPBP0
50 1 2
43 BREATH_BLUE_LED_SNIFF
40,41 POWER_SW#_MB
POWER_SW#_MB 51
49
51
50
52
52 TPBN0
TPBP0
TPBN0
33
33 15 PCH_AZ_MDC_SDOUT PCH_AZ_MDC_SDOUT 3
GND1
IAC_SDATA_OUT
RES0
RES1
4 W=20 mil
1 +3.3V_ALW 53 54 5 6
C623 53 54 PCH_AZ_MDC_SYNC GND2 3.3V
55 56 15 PCH_AZ_MDC_SYNC 7 8
55 56 PCH_AZ_MDC_SDIN1 IAC_SYNC GND3
0.1U_0402_16V4Z~D 57
57 58
58 15 PCH_AZ_MDC_SDIN1 1 2 MDC_SDIN 9
IAC_SDATA_IN GND4
10
0.1U_0402_16V4Z~D
59 60 R10 PCH_AZ_MDC_RST1# 11 12 PCH_AZ_MDC_BITCLK PCH_AZ_MDC_BITCLK 15
2 19 IO_LOOP 59 60 IAC_RESET# IAC_BITCLK
4.7U_0603_6.3V6M~D
33_0402_5%~D 1 1
61 62
G1 G2
C12
C13
GND
GND
GND
GND
GND
GND
LOTES_YEA-BTB-018-160K12 2 2
TYCO_1-1775149-2~D
13
14
15
16
17
18
Connector for MDC Rev1.5
+3.3V_LAN +VREFOUT +LOM_VCT_IO LID_CL# R15 C15
10_0402_5%~D 10P_0402_50V8J~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
1U_0402_6.3V6K~D
1 1 1 PCH_AZ_MDC_BITCLK 2 1 BITCLK_TERM 1 2
@C712
@
A A
2
C768
C634
C712
PCH_AZ_MDC_SDOUT 2 1 SDOUT_TERM 1 2
C685
2 2 2 @ R16 @C32
@ C32
1 10_0402_5%~D 10P_0402_50V8J~D
Place close Place close Place close Compal Electronics, Inc.
Title
to JIO1.13 to JIO1.30 to JIO1.36 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USB 2.0 PORT
5 4 3 2 1
2 1
JDOCK1
DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF 39,52
3 3 4 4
30 DOCK_LOM_SPD10LED_GRN# DPB_DOCK_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# 30
5 5 6 6
26 DPB_DOCK_CA_DET DPC_CA_DET 25
7 7 8 8
9 10 DPC_DOCK_LANE_P0 C361 2 1 0.1U_0402_10V7K~D
26 DPB_DOCK_LANE_P0 9 10 DPC_DOCK_LANE_N0 DPC_GPU_LANE_P0 54
11 12 C357 2 1 0.1U_0402_10V7K~D
26 DPB_DOCK_LANE_N0 11 12 DPC_GPU_LANE_N0 54
13 14
13 14 DPC_DOCK_LANE_P1 C355 2
26 DPB_DOCK_LANE_P1 15 16 1 0.1U_0402_10V7K~D DPC_GPU_LANE_P1 54
15 16 DPC_DOCK_LANE_N1 C313 2
26 DPB_DOCK_LANE_N1 17
17 18
18 1 0.1U_0402_10V7K~D DPC_GPU_LANE_N1 54
19 20
26 DPB_DOCK_LANE_P2 21
21 22
22 1 0.1U_0402_10V7K~D DPC_GPU_LANE_P2 54
23 24 DPC_DOCK_LANE_N2 C362 2 1 0.1U_0402_10V7K~D
25 26
26 DPB_DOCK_LANE_P3 27
27 28
28 1 0.1U_0402_10V7K~D DPC_GPU_LANE_P3 54
29 30 DPC_DOCK_LANE_N3 C363 2 1 0.1U_0402_10V7K~D
31 32
DPB_DOCK_AUX 31 32 DPC_DOCK_AUX
26 DPB_DOCK_AUX 33 34
DPB_DOCK_AUX# 33 34 DPC_DOCK_AUX# DPC_DOCK_AUX 25
26 DPB_DOCK_AUX# 35 36
35 36 DPC_DOCK_AUX# 25
37 38
DPB_DOCK_HPD 37 38 DPC_GPU_DOCK_HPD
26 DPB_DOCK_HPD 39 39 40 40 DPC_GPU_DOCK_HPD 53
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# 52
1 43 43 44 44 1
BLUE_DOCK 45 46
27 BLUE_DOCK 45 46 DAT_DDC2_DOCK 27
C985 47 48 C986
B 47 48 CLK_DDC2_DOCK 27 B
0.033U_0402_16V7K~D 49 50 0.033U_0402_16V7K~D
2 49 50 2
Close to DOCK 51 51 52 52
RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue. 27 RED_DOCK 53 54 SATA_PRX_DKTX_N5 SATA_PRX_DKTX_P5_C 15
55 55 56 56 C586 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C 15 Close to DOCK
57 58 C587 0.01U_0402_16V7K~D
GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
Its for Enhance ESD on dock issue.
27 GREEN_DOCK 59 60 SATA_PTX_DKRX_N5 SATA_PTX_DKRX_P5_C 15
61 62 C306 1 2 0.01U_0402_16V7K~D
61 62 C305 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C 15
63 63 64 64
27 HSYNC_DOCK 65 65 66 66 USBP8+ 18
27 VSYNC_DOCK 67 67 68 68 USBP8- 18
+3.3V_RUN 69 70
69 70
40 CLK_MSE 71 71 72 72 USBP9+ 18
40 DAT_MSE 73 73 74 74 USBP9- 18
75 75 76 76
29 DAI_BCLK# 77 77 78 78 CLK_KBD 40
1
+15V_ALW 79 80
29 DAI_LRCK# 79 80 DAT_KBD 40
81 81 82 82
R1505 83 84
29 DAI_DI 83 84
2.2K_0402_5%~D 85 86
29 DAI_DO# 85 86
87 88
2
87 88
1
+3.3V_ALW2 1 2 89 90
29 DAI_12MHZ# 89 90
R1515 @ R1516 0_0402_5%~D 91 92
100K_0402_5%~D 91 92
93 93 94 94
95 96
95 96
1
D
97 98
2
39 D_LAD0
1
Q214 97 98 BREATH_LED# 40,43

2 39 D_LAD1 99 100
R1514 G SSM3K7002FU_SC70-3~D 99 100 DOCK_LOM_ACTLED_YEL# 30
101 102
101 102
3
100K_0402_5%~D S 103 104

3
39 D_LAD2 103 104 DOCK_LOM_TRD0+ 30

Q211B 105 106
39 D_LAD3 105 106 DOCK_LOM_TRD0- 30
DMN66D0LDW-7_SOT363-6~D 107 108
2
DPB_DOCK_AUX 107 108

5 39 D_LFRAME# 109 110
+3.3V_RUN 109 110 DOCK_LOM_TRD1+ 30 +LOM_VCT
39 D_CLKRUN# 111 112
111 112 DOCK_LOM_TRD1- 30
6
113 114
4
Q211A 113 114 +3.3V_ALW

39 D_SERIRQ 115 116 1
115 116
1
DMN66D0LDW-7_SOT363-6~D 117 118 +LOM_VCT R1038

DPB_DOCK_CA_DET 39 D_DLDRQ1# 117 118
2 119 120 C42 100K_0402_5%~D
R1506 119 120 1U_0402_6.3V6K~D DOCK_DET#
18 CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ 30 1 2
2.2K_0402_5%~D 121 122 2
123 124
1
123 124 DOCK_LOM_TRD2- 30

125 126
2
125 126
40 DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ 30
127 128
1 2 40 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 30
@ R1517 0_0402_5%~D 129 130
131 132
131 132
40,44 DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ 51
133 134
44 DOCK_PSID 135 136 DOCK_DCIN_IS- 51
135 136
1
D
137 138
Q212 137 138 D71
2 40 DOCK_PWR_BTN# 139 140 DOCK_POR_RST# 40
G SSM3K7002FU_SC70-3~D 139 140 RB751S40T1_SOD523-2~D
141 142
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
S 143 144 1 2
3
39,44,52 SLICE_BAT_PRES# 143 144 DOCK_DET# 39

145 149 +DOCK_PWR_BAR
GND1 PWR2
+DOCK_PWR_BAR 146 150
PWR1 PWR2
4.7U_0805_25V6K~D
DPB_DOCK_AUX# 147 151
PWR1 PWR2
3
2
4.7U_0805_25V6K~D
148 152
PWR1 GND2
SM24.TCT_SOT23-3~D
+3.3V_RUN
0.1U_0603_50V4Z~D
C1033
0.1U_0603_50V4Z~D
D64
1 1 @
C1034
C1899
1 1 153 159
Shield_G Shield_G
C1898
@ 154 160
Shield_G Shield_G
155 161
Shield_G Shield_G 2 2
156 162
1
Shield_G Shield_G
1
+15V_ALW 2 2
157 163
R1507 Shield_G Shield_G
158 164
2.2K_0402_5%~D Shield_G Shield_G
JAE_WD2F144WB1
Reserve for EMI test
2
1
+3.3V_ALW2 1 2
A R1519 @ R1520 0_0402_5%~D A
100K_0402_5%~D
CLK_PCI_DOCK
1
D DPB_DOCK_HPD DPC_GPU_DOCK_HPD
2
1
1
2 Q216
R1518 G SSM3K7002FU_SC70-3~D @ R462
3
100K_0402_5%~D
100K_0402_5%~D
100K_0402_5%~D S 10_0402_5%~D
3
2
Q213B
2
2
R798
R796
5 DPC_DOCK_AUX 1
+3.3V_RUN
6
@C590
@C590
4
1
Q213A 4.7P_0402_50V8C~D
1
DMN66D0LDW-7_SOT363-6~D 2
DPC_CA_DET 2
R1508
2.2K_0402_5%~D
1
1 2
@R1521
@ R1521 0_0402_5%~D
1
D
2 Q215 Compal Electronics, Inc.
G SSM3K7002FU_SC70-3~D Title
S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
DOCKING CONN
3
DPC_DOCK_AUX# PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5573P
2 1
5 4 3 2 1
+3.3V_ALW
1 2 PCIE_WAKE#
R501 10K_0402_5%~D
1 2 SLICE_BAT_PRES#
R503 100K_0402_5%~D +3.3V_ALW
1 2 DCIN_CBL_DET#
R862 100K_0402_5%~D
1 1 1 1
1
C1072 C648 C649 C650
10U_0805_10V4Z~D 0.1U_0402_16V4Z~D C652 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D
2 2 0.1U_0402_16V4Z~D 2 2
2
D D
A17
B30
A43
A54
U35
+3.3V_ALW2 B68 +3.3V_ALW
VCC1
VCC1
VCC1
VCC1
NC
B35
PBAT_PRES# NC +3.3V_ALW
44 PBAT_PRES# B52 B34
USB_SIDE_EN# GPIOA[0] NC
1 2 A49 B1
R502 10K_0402_5%~D 43 SCRL_LED# GPIOA[1] NC
B53 B5
43 NUM_LED# GPIOA[2] VCC1
0.1U_0402_16V4Z~D
1 2 ESATA_USB_PWR_EN# DCIN_CBL_DET# A50 B8 DOCK_MIC_DET
44 DCIN_CBL_DET# PBATT_OFF GPIOA[3] GPIOJ[7] TEMP_ALERT# DOCK_MIC_DET 29 TP_DET#
R923 10K_0402_5%~D 52 PBATT_OFF B54 B11 2 1
MDC_RST_DIS# GPIOA[4] GPIOK[4] TEMP_ALERT# 15,19
A51 R756 100K_0402_5%~D
37 MDC_RST_DIS#
34,36 PCIE_WAKE#
PCIE_WAKE# B55
GPIOA[5]
GPIOA[6]
ECE5028-LZY GPIOI[1] B63 SIO_SLP_M#
SIO_SLP_M# 17,48
1
C653
A52 GPIOA[7]
A5 SIO_SLP_LAN#
WIRELESS_ON#/OFF GPIOJ[2] SIO_SLP_LAN# 17,30 2
+3.3V_RUN B13 B6
37 WIRELESS_ON#/OFF BT_RADIO_DIS# GPIOH[0] GPIOJ[3] DOCK_HP_DET
A13 A7 +3.3V_RUN
41 BT_RADIO_DIS# EXPRCRD_PWREN# GPIOH[1] GPIOJ[6] CRT_SWITCH DOCK_HP_DET 29
34 EXPRCRD_PWREN# B14 GPIOH[4] GPIOJ[5] B7 CRT_SWITCH 27
EXPRCRD_STDBY# A14 A8 ME_FWP ME_FWP 15
34 EXPRCRD_STDBY# BC_INT#_ECE5028 GPIOH[5] GPIOK[0] ME_FWP
40 BC_INT#_ECE5028 A29 BC_INT# GPIOK[1] B9 2 1
1 2 WIRELESS_ON#/OFF BC_DAT_ECE5028 B31 A10 DP_PRIORITY R1531 10K_0402_5%~D
40 BC_DAT_ECE5028 BC_CLK_ECE5028 BC_DAT GPIOK[3] DP_PRIORITY 26 D_CLKRUN#
R874 100K_0402_5%~D A30 B10 2 1
1 2 SP_TPM_LPC_EN 40 BC_CLK_ECE5028 BC_CLK GPIO GPIOK[2]
GPIOK[5] A11 RUN_ON 1.8V_RUN_PWRGD 47
RUN_ON 12,34,42,47,62
R510 100K_0402_5%~D
@ R788 10K_0402_5%~D A1 B12 CPU_CATERR# D_SERIRQ 2 1
LCD_TST GPIOE[0]/RXD GPIOK[6] R511 100K_0402_5%~D
1 2 B2
R816 100K_0402_5%~D DGPU_PWROK GPIOE[1]/TXD D_DLDRQ1#
19,62 DGPU_PWROK A2 GPIOE[2]/RTS# GPIOI[6] B66 1 2 IMVP_VR_ON 50 2 1
1 2 PANEL_BKEN_DGPU MCARD_PCIE_SATA# B3 A62 R509 0_0402_5%~D R512 100K_0402_5%~D
35,36 MCARD_PCIE_SATA# EXPRCRD_DET# GPIOE[3]/DSR# GPIOI[5] 0.75V_DDR_VTT_ON IMVP_PWRGD 8,50
R505 10K_0402_5%~D A3 A60
SYS_LED_MASK# 34 EXPRCRD_DET# GPIOE[4]/CTS# GPIOI[2] 0.75V_DDR_VTT_ON 47
1 2 B45 GPIOE[5]/DTR# CAP_LDO B46 +CAP_LDO 8mil
R658 10K_0402_5%~D A42 B67 C1051
DGPU_PWR_EN GFX_MEM_VTT_ON GPIOE[6]/RI# GPIOJ[0] AUX_EN_WOWL 35 +3.3V_ALW 0.1U_0402_16V4Z~D RUN_ON
1 2 55 GFX_MEM_VTT_ON B4 GPIOE[7]/DCD# 2 1
R1318 100K_0402_5%~D 1 2 R515 100K_0402_5%~D
C GFX_MEM_VTT_ON USB_SIDE_EN# C
1 2 37 USB_SIDE_EN# A33 GPIOB[0]/INIT#
R1319 100K_0402_5%~D EN_I2S_NB_CODEC# B36 CPU_VTT_ON 2 1
29 EN_I2S_NB_CODEC# GPIOB[1]/SLCTIN# ACAV_IN_NB 40,51,52
USH_PWR_STATE# A34 B19 2 1 R518 100K_0402_5%~D
31 USH_PWR_STATE# GPIOC[2]/SLCT TEST_PIN
5
EN_DOCK_PWR_BAR B37 R514
52 EN_DOCK_PWR_BAR
A35
GPIOC[3]/PE TEST 1K_0402_5%~D ACAV_IN_NB 1 0.75V_DDR_VTT_ON 2 1
GPIO
P
ENVDD_GPU GPIOC[4]/BUSY B R520 100K_0402_5%~D
24,53 ENVDD_GPU B38 GPIOC[5]/ACK# O 4 2 1
LCD_TST D65 DOCK_AC_OFF 38,52 PBATT_OFF
24 LCD_TST A36 2 2 1
GPIOC[6]/ERROR# A
G
PSID_DISABLE# A37 A63 DOCK_AC_OFF_EC RB751S40T1_SOD523-2~D R521 100K_0402_5%~D
44 PSID_DISABLE# GPIOC[7]/ALF# GPIOI[7]
1
PANEL_BKEN_DGPU B40 B65 U69
3
53 PANEL_BKEN_DGPU DOCKED GPIOD[0]/STROBE# GPIOI[4] SIO_SLP_S3# 17
A38 A61 TC7SH08FU_SSOP5~D R1078
30 DOCKED DOCK_DET# GPIOC[1]/PD7 GPIOI[3] SIO_SLP_S4# 17
B41 33K_0402_5%~D
38 DOCK_DET# GPIOC[0]/PD6 DOCK_AC_OFF_EC 52
AUD_NB_MUTE A39
29 AUD_NB_MUTE MCARD_WWAN_PWREN GPIOB[7]/PD5
B42 LPC_LAD[0..3] 15,31,32,40
2
35 MCARD_WWAN_PWREN LCD_VCC_TEST_EN GPIOB[6]/PD4 LPC_LAD0
24 LCD_VCC_TEST_EN A40 A27
CCD_OFF GPIOB[5]/PD3 LAD0 LPC_LAD1
24 CCD_OFF B43 A26
AUD_HP_NB_SENSE GPIOB[4]/PD2 LAD1 LPC_LAD2
29,37 AUD_HP_NB_SENSE A41 B26
ESATA_USB_PWR_EN# GPIOB[3]/PD1 LAD2 LPC_LAD3
37 ESATA_USB_PWR_EN# B44 B25
GPIOB[2]/PD0 LAD3 LPC_LFRAME#
A21 LPC_LFRAME# 15,31,32,40
+3.3V_RUN LID_CL_SIO# LFRAME# PCH_PLTRST#_EC
B32 B22
49 CPU_VTT_ON
CPU_VTT_ON A31
GPIOD[1]
GPIOD[2]
LPC LRESET#
PCICLK
A28 CLK_PCI_5028 PCH_PLTRST#_EC 8,18,32,34,36,40
CLK_PCI_5028 18
B20 CLKRUN#
DGPU_PWR_EN CLKRUN# LPC_LDRQ0# CLKRUN# 17,32,40
62 DGPU_PWR_EN B33 A23 LPC_LDRQ0# 15
ALS_INT# VCORE_LL_SELECT GPIOD[3]/VBUS_DET LDRQ0# LPC_LDRQ1#
1 2 50 VCORE_LL_SELECT B15 A22 LPC_LDRQ1# 15
R258 2.2K_0402_5%~D MCARD_PCIE_BKT_PWREN GPIOD[4]/OCS1_N LDRQ1# IRQ_SERIRQ
35 MCARD_PCIE_BKT_PWREN A15 B21 IRQ_SERIRQ 15,31,32,40
HDDC_EN GPIOD[5]/OCS2_N SER_IRQ
28 HDDC_EN B16
+3.3V_ALW MODC_EN GPIOD[6]/OCS3_N CLK_SIO_14M
28 MODC_EN A16 A32 CLK_SIO_14M 16
GPIOD[7]/OCS4_N CLKI (14.318 MHz) CLK_SIO_14M CLK_PCI_5028
SLICE_BAT_PRES# B17 B51
38,44,52 SLICE_BAT_PRES# GPIOH[6] VSS
B18
GPIOH[7]
1
1 2 VGA_ID_DISC B29 D_LAD0
R875 100K_0402_5%~D LAN_DISABLE#_R DLAD0 D_LAD1 D_LAD0 38 ME_FWP @R506
@ R506 R527
30 LAN_DISABLE#_R B47 B28
VGA_ID_UMA GPIOG[0] DLAD1 D_LAD2 D_LAD1 38 10_0402_5%~D 10_0402_5%~D
1 2 A45 A25
43 CAP_LED# GPIOG[1] DLAD2 D_LAD2 38
2
B @ R881 100K_0402_5%~D SYS_LED_MASK# D_LAD3 B
B48 A24
43 SYS_LED_MASK#
ALS_INT# A46
GPIOG[2] DLPC DLAD3
B23 D_LFRAME# D_LAD3 38 @ R649
2
24 ALS_INT# GPIOG[3] DLFRAME# D_CLKRUN# D_LFRAME# 38
19 SIO_EXT_WAKE# R526 1 2 0_0402_5%~D B49 A19 1K_0402_5%~D
EN_ESATA_RPTR GPIOG[4] DCLK_RUN# D_DLDRQ1# D_CLKRUN# 38
37 EN_ESATA_RPTR A47 B24 D_DLDRQ1# 38 1 1
PCH_PCIE_WAKE# GPIOG[5] DLDRQ1# D_SERIRQ
B50 A20
1
VGA_ID_DISC 17 PCH_PCIE_WAKE# WLAN_RADIO_DIS# GPIOG[6] DSER_IRQ D_SERIRQ 38
1 2 A48 @C654
@C654 C656
36 WLAN_RADIO_DIS# GPIOG[7] 4.7P_0402_50V8C~D
@R522
@ R522 100K_0402_5%~D 4.7P_0402_50V8C~D
VGA_ID_UMA 1 2 WWAN_RADIO_DIS# A53 R1130 2 2
36 WWAN_RADIO_DIS# GPU_CLKDWN SYSOPT1/GPIOH[2]
R558 100K_0402_5%~D B57 10K_0402_5%~D
53 GPU_CLKDWN SYSOPT0/GPIOH[3] RUNPWROK_R1
A4 2 1 +3.3V_RUN
PWRGD
B58
VGA_ID_UMA GPIOF[7] SP_TPM_LPC_EN
A55 B56 SP_TPM_LPC_EN 31,32
VGA_ID_DISC GPIOF[6] OUT65
B59
UWB_RADIO_DIS# GPIOF[5]
VGA_ID_UMA VGA_ID_DISC 36 UWB_RADIO_DIS# A56
GPIOF[4]
R528 A6
10K_0402_5%~D GPIOJ[4] GPIO_PSID_SELECT 44 +3.3V_ALW
Discrete 0 1 B60
IRTX VSS
A9
2 1 A57 A12
IRRX GPIOK[7] SPI_WP#_SEL 15
UMA 1 0 VSS
A18 1
B61 B27
GPIOF[3]/IRMODE/IRRX3B VSS
1
SG 1 1 A58 B39 C657
BCM5882_ALERT# GPIOF[2]/IRTX2 VSS 4.7U_0603_6.3V6M~D R524
31 BCM5882_ALERT# B62 A44
GPIOF[1]/IRRX2 VSS 2 +3.3V_RUN
A59 B64 100K_0402_5%~D
GPIOF[0]/IRMODE/IRRX3A VSS
A64
GPIOJ[1] R525
EP
2
1
10_0402_5%~D
TP_DET# 41 LID_CL_SIO# LID_CL#
ECE5028-LZY_DQFN132_11X11~D R1288 2 1
C1
LID_CL# 37,43
8.2K_0402_5%~D
1
2
+1.05V_1.1V_RUN_VTT CPU_CATERR# C655
R1289 0.047U_0402_16V4Z~D
1
2.2K_0402_5%~D C 2
1
A A
1 2 2
B C1372
Q182 E 0.1U_0402_16V4Z~D
3
PMST3904_SOT323-3~D 2
8 H_CATERR# DELL CONFIDENTIAL/PROPRIETARY
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5028
LA-5573P
5 4 3 2 1
5 4 3 2 1
+RTC_CELL
1
R539
100K_0402_5%~D 1 2
+3.3V_ALW @ C658
2
1U_0402_6.3V6K~D
POWER_SW_IN# 1 2
23 POWER_SW_IN# POWER_SW#_MB 37,41
1 2 BC_DAT_ECE5028 1 R541 10K_0402_5%~D
R543 100K_0402_5%~D
2 1 BC_DAT_EMC4002 C659
R545 100K_0402_5%~D +RTC_CELL +3.3V_ALW 1U_0402_6.3V6K~D
2 1 BC_DAT_ECE1077 2
R546 100K_0402_5%~D 1 2 +RTC_CELL_VBAT
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
2 1 DOCK_SMB_ALERT# R544 1
D R547 10K_0402_5%~D 0_0402_5%~D D
C660 +RTC_CELL
1 1 1 1 1 1 1 1 1
C661
0.1U_0402_16V4Z~D
2
C662
C663
C664
C665
C666
C667
C668
C651
1
0.1U_0402_16V4Z~D
1 2 PBAT_SMBDAT 2 2 2 2 2 2 2 2 2
R551 2.2K_0402_5%~D 1 2
B64
A11
A22
B35
A41
A58
A52
A26
PBAT_SMBCLK R550
B3
1 2
R552 2.2K_0402_5%~D U36 100K_0402_5%~D @ C669
2
2 1 LPC_LDRQ#_MEC +3.3V_RUN 1U_0402_6.3V6K~D
VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
@ R837 100K_0402_5%~D R1131 DOCK_PWR_SW# 1 2
23 DOCK_PWR_SW# DOCK_PWR_BTN# 38
1 2 CHARGER_SMBDAT 10K_0402_5%~D 1 R554 10K_0402_5%~D
R29 2.2K_0402_5%~D RUNPWROK 2 1
1 2 CHARGER_SMBCLK PS/2 INTERFACE MISC INTERFACE
R30 2.2K_0402_5%~D SML1_SMBDATA A5 A10 SYSTEM_ID
16 SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1 2 C670
SML1_SMBCLK B6 B10 BOARD_ID +3.3V_ALW
16 SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
CLK_TP_SIO A37 B14 DDR_ON 1U_0402_6.3V6K~D
41 CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON 46,47
+3.3V_RUN DAT_TP_SIO B40 B44 HOST_DEBUG_TX CHIPSET_ID for BID
41 DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX 36
2
CLK_KBD A38 B46 HOST_DEBUG_RX
38 CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX 36 function
DAT_KBD B41 B26 RUNPWROK R85
38 DAT_KBD GPIO113/PS2_DAT1A VCC_PRWGD
1 2 DAI_GPU_R3P_SMBDAT CLK_MSE A39 A25 EN_INVPWR 1K_0402_5%~D
38 CLK_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR 24
R26 2.2K_0402_5%~D DAT_MSE B42 B36
38 DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK
1 2 DAI_GPU_R3P_SMBCLK PBAT_SMBDAT B59 B37
44 PBAT_SMBDAT
1
R27 2.2K_0402_5%~D PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_SIN SYSTEM_ID
44 PBAT_SMBCLK A56 B38
GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_SOUT
4700P_0402_25V7K~D
A34 DDR_HVREF_RST_GATE
GPIO102/HSPI_SCLK DDR_HVREF_RST_GATE 8,13,14
A35
GPIO104/HSPI_MISO CPU1.5V_S3_GATE
A36 1
GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE 12
JTAG INTERFACE GPIO116/MSDATA
A40 MSDATA 36
C918
2 1 MSDATA JTAG_TDI A51 B43 MSCLK
GPIO145/JTAG_TDI GPIO117/MSCLK MSCLK 36
R589 10K_0402_5%~D JTAG_TDO B55 A45 SIO_A20GATE
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE 19 2
2 1 M_ON JTAG_CLK B56 A55 PS_ID
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID 44
R561 100K_0402_5%~D JTAG_TMS A53 A57 BAT1_LED# Bat2 = Amber LED +3.3V_ALW_PCH
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 BAT1_LED# 43
1 2 AUX_ON JTAG_RST# B57 B61 BAT2_LED#
JTAG_RST# GPIO157/LED2 BAT2_LED# 43 Bat1 = Blue LED
R563 2.7K_0402_5%~D C1053 B65 FWP#
DDR_ON 0.1U_0402_16V4Z~D nFWP 20mA drive pins AC_PRESENT
1 2 1 2
R564 100K_0402_5%~D 1 2 R1231 10K_0402_5%~D
1 2 SUS_ON FAN PWM & TACH
C R566 100K_0402_5%~D DOCK_POR_RST# B22 C
38 DOCK_POR_RST# GPIO050/FAN_TACH1
1 2 PCH_ALW_ON SUS_ON A21 GENERAL PURPOSE I/O
42 SUS_ON GPIO051/FAN_TACH2
R568 100K_0402_5%~D AUX_ON B23 +3.3V_ALW
30 AUX_ON GPIO052/FAN_TACH3
1 2 DOCK_POR_RST# BREATH_LED# B24 B2
38,43 BREATH_LED# GPIO053/PWM0 GPIO001/ECSPI_CS1
R1046 100K_0402_5%~D PCH_ALW_ON A23 A2 DOCK_SMB_ALERT# CPU_DETECT# 2 1
42 PCH_ALW_ON GPIO054/PWM1 GPIO002/ECSPI_CS2
1 2 EN_INVPWR KYBRD_BKLT_PWM B25 B8 FFS_INT1 @ R635 2 DOCK_SMB_ALERT#
1
38,44 R1512 100K_0402_5%~D
41 KYBRD_BKLT_PWM GPIO055/PWM2 GPIO014/GPTP-IN7/HSPI_CS1 HDD_FALL_INT 18,28
R595 100K_0402_5%~D A24 B18 CPU_DETECT# 0_0402_5%~D DOCK_SMB_DAT 2 1
GPIO056/PWM3 GPIO040/GPTP-OUT3/HSPI_CS2 CPU_DETECT# 8
A8 ME_SUS_PWR_ACK R565 2.2K_0402_5%~D
GPIO015/GPTP-OUT7 ME_SUS_PWR_ACK 17
B9 1.5V_SUS_PWRGD DOCK_SMB_CLK 2 1
GPIO016/GPTP-IN8 1.5V_SUS_PWRGD 46
BC-LINK A9 PM_MEPWROK R567 2.2K_0402_5%~D
GPIO017/GPTP-OUT8 PM_MEPWROK 17
BC_CLK_ECE5028 A43 A14 1.05V_M_PWRGD
+3.3V_ALW 39 BC_CLK_ECE5028 GPIO123/BCM_A_CLK GPIO26/GPTP-IN1 1.05V_M_PWRGD 48
BC_DAT_ECE5028 B45 B15 ALW_PWRGD_3V_5V
39 BC_DAT_ECE5028 GPIO122/BCM_A_DAT GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V 45
BC_INT#_ECE5028 A42 A17 ODD_DET#
39 BC_INT#_ECE5028 GPIO121/BCM_A_INT# GPIO041 ODD_DET# 28
BC_CLK_EMC4002 A12 B39 RESET_OUT# RESET_OUT# 2 1
23 BC_CLK_EMC4002 GPIO022/BCM_B_CLK GPIO107/nRESET_OUT RESET_OUT# 15,17
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
100K_0402_5%~D
23 BC_DAT_EMC4002 BC_DAT_EMC4002 B13 A44 M_ON @ R5 8.2K_0402_5%~D

GPIO023/BCM_B_DAT GPIO125/GPTP-IN5 M_ON 42,48
1
23 BC_INT#_EMC4002 BC_INT#_EMC4002 A13 B47 PCH_RSMRST#

GPIO024/BCM_B_INT# GPIO126 PCH_RSMRST# 17
@ B20 A54 AC_PRESENT
GPIO044/BCM_C_CLK GPIO151/GPTP-IN4 AC_PRESENT 17
R576
R1410
R575
R574
A18 B58 SIO_PWRBTN#

GPIO043/BCM_C_DAT GPIO152/GPTP-OUT4 SIO_PWRBTN# 17
B19 +5V_RUN
BC_CLK_ECE1077 GPIO042/BCM_C_INT#
A20
2
@ JDEG1 41 BC_CLK_ECE1077 BC_DAT_ECE1077 GPIO047/LSBCM_D_CLK CLK_KBD

41 BC_DAT_ECE1077 B21 2 1
BC_INT#_ECE1077 GPIO046/LSBCM_D_DAT R569 4.7K_0402_5%~D
1 41 BC_INT#_ECE1077 A19
1 MSCLK BEEP GPIO045/LSBCM_D_INT# DAT_KBD
2
2 29 BEEP A16
GPIO032/GPTP-IN3/BCM_E_CLK SMBUS INTERFACE 2 1
7 3 MSDATA SIO_SLP_S5# B16 A3 DOCK_SMB_DAT R570 4.7K_0402_5%~D
G1 3 17 SIO_SLP_S5# GPIO31/GPTP-OUT2/BCM_E_DAT GPIO003/I2C1A_DATA DOCK_SMB_DAT 38
8 4 1 2 HOST_DEBUG_TX ACAV_IN_NB A15 B4 DOCK_SMB_CLK CLK_MSE 2 1
G2 4 39,51,52 ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO004/I2C1A_CLK DOCK_SMB_CLK 38
5 R593 1 2 0_0402_5%~D HOST_DEBUG_RX A4 LCD_SMBDAT R571 4.7K_0402_5%~D
5 GPIO005/I2C1B_DATA LCD_SMBDAT 24
6 R577 0_0402_5%~D HOST INTERFACE B5 LCD_SMBCLK DAT_MSE 2 1
6 GPIO006/I2C1B_CLK LCD_SMBCLK 24
SIO_EXT_SMI# A6 B7 CKG_FFS_SMBDAT R572 4.7K_0402_5%~D
19 SIO_EXT_SMI# GPIO011/nSMI GPIO012/I2C1H_DATA/I2C2D_DATA CKG_FFS_SMBDAT 6
ACES_85204-06001~D SIO_RCIN# A27 A7 CKG_FFS_SMBCLK +3.3V_ALW
19 SIO_RCIN# GPIO061/LPCPD# GPIO013/I2C1H_CLK/I2C2D_CLK CKG_FFS_SMBCLK 6
LPC_LDRQ#_MEC B29 B48 DAI_GPU_R3P_SMBDAT
LDRQ# GPIO130/I2C2A_DATA DAI_GPU_R3P_SMBDAT 23,29,53
IRQ_SERIRQ A28 B49 DAI_GPU_R3P_SMBCLK +3.3V_RUN
15,31,32,39 IRQ_SERIRQ SER_IRQ GPIO131/I2C2A_CLK DAI_GPU_R3P_SMBCLK 23,29,53
PCH_PLTRST#_EC B30 A47 CHARGER_SMBDAT
8,18,32,34,36,39 PCH_PLTRST#_EC LRESET# GPIO132/I2C1G_DATA CHARGER_SMBDAT 51
2
+3.3V_ALW CLK_PCI_MEC A29 B50 CHARGER_SMBCLK CKG_FFS_SMBDAT 2 1
18 CLK_PCI_MEC PCI_CLK GPIO140/I2C1G_CLK CHARGER_SMBCLK 51
LPC_LFRAME# B31 B52 CARD_SMBDAT R578 R540 2.2K_0402_5%~D
15,31,32,39 LPC_LFRAME# LFRAME# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT 34
LPC_LAD0 A30 A49 CARD_SMBCLK 10K_0402_5%~D CKG_FFS_SMBCLK 2 1
15,31,32,39 LPC_LAD0 LAD0 GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK 34
LPC_LAD1 B32 B53 USH_SMBDAT R542 2.2K_0402_5%~D
15,31,32,39 LPC_LAD1 LAD1 GPIO143/I2C1E_DATA USH_SMBDAT 31
10K_0402_5%~D
49.9_0402_1%~D
10K_0402_5%~D
10K_0402_5%~D
10K_0402_5%~D
LPC_LAD2 A31 A50 USH_SMBCLK
1
15,31,32,39 LPC_LAD2 LAD2 GPIO144/I2C1E_CLK USH_SMBCLK 31
1
B LPC_LAD3 B33 B
15,31,32,39 LPC_LAD3 LAD3
R580
R581
R582
R583
CLKRUN# FWP# 1=JTAG interface Reset disabled

R584
17,32,39 CLKRUN# A32 2 1 HDD_SMBDAT 28

SIO_EXT_SCI# CLKRUN# @ R446 2
19 SIO_EXT_SCI# A33
GPIO100/nEC_SCI 1 0_0402_5%~D HDD_SMBCLK 28 0=Reset JTAG interface
DELL PWR SW INF @ R508 0_0402_5%~D
2
A59
2
@ JP2 BGPO0 LAT_ON_SW# @ R586

B63
VCI_IN2# ALWON 10K_0402_5%~D +RTC_CELL
1
1 MASTER CLOCK VCI_OUT
A60 ALWON 45
2 JTAG_TDI MEC_XTAL1 A61 A63 VCI_IN1# +RTC_CELL
2 JTAG_TMS MEC_XTAL2 XTAL1 VCI_IN1# POWER_SW_IN#
7 3 2 1 A62 B67
1
G1 3 JTAG_CLK R587 0_0402_5%~D XTAL2 VCI_IN0# ACAV_IN
8 4 B62 B1 ACAV_IN 23,51,52
G2 4 GPIO160/32KHZ_OUT VCI_OVRD_IN
1
5 JTAG_TDO A1 DOCK_PWR_SW#
5 23 EC_32KHZ_OUT VCI_IN3#
VR_CAP[1]
6 R560 VCI_IN1# 2 1
6
VSS_RO
100K_0402_5%~D 1 2 R657 100K_0402_5%~D

VSS[2]
VSS[5]
VSS[7]
VSS[8]
AGND
ACES_85204-06001~D
NC1
NC2
NC3
NC4
NC5
NC6
NC7
@ C1884
EP
2
1U_0402_6.3V6K~D
MEC5045-LZY_DQFN132_11X11~D LAT_ON_SW# 1 2 +3.3V_ALW
B17
B34
A46
A48
B51
A64
B68
B66
B27
B60
B11
B28
B12
B54
C1
LAT_ON_SW_BTN# 37
1 R1492 10K_0402_5%~D
1 10K_0402_5%~D
C1885
32 KHz Clock 1U_0402_6.3V6K~D
R579
Same as Laguna 2
Place closely pin A29
15mil
+3.3V_ALW
MEC_XTAL1 CLK_PCI_MEC
4.7U_0603_6.3V6M~D
2
8mil
1
1
2
C671
JTAG_RST#
Y4 @ R588 R98
0.1U_0402_16V4Z~D
32.768K_12.5PF_Q13MC30610018~D 10_0402_5%~D 1K_0402_5%~D R98 C919 REV
1
2
C1040
1
100_0402_1%~D
MEC_XTAL2 1 4 @
240K 4700p X00
1
2
R585
1 BOARD_ID
4700P_0402_25V7K~D
2 3
1
NC NC
1 @ C673 130K 4700p X01 2 JTAG1
2
@SHORT PADS~D
C674 C675
4.7P_0402_50V8C~D
2
1
33K 4700p X02 @
C919
33P_0402_50V8J~D 33P_0402_50V8J~D +3.3V_M

2 2 4.3K 4700p X03
2
2
A
2K 4700p A
2
1
R640
100K_0402_5%~D 1K 4700p A00
4700p
2
PCH_PWRGD# PCH_PWRGD# 23
4700p DELL CONFIDENTIAL/PROPRIETARY
1
D
RESET_OUT# 2
G
Q189
S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
3
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, EMC5045
LA-5573P
5 4 3 2 1
5 4 3 2 1
BlueTooth +3.3V_RUN
C1703
1 2
D 0.1U_0402_16V4Z~D D
Touch Pad
JBT
1 1
18 BT_DET# 2 2
+3.3V_ALW COEX1_BT_ACTIVE 3
36 COEX1_BT_ACTIVE 3
4 4
5 5
6 6
43 BT_ACTIVE
4.7K_0402_5%~D
4.7K_0402_5%~D
39 BT_RADIO_DIS# 7 7
1
COEX2_WLAN_ACTIVE 8
36 COEX2_WLAN_ACTIVE 8
R613
R614
9 9
10 @ FAN
10
18 USBP6- 11 11 Part Number Description
18 USBP6+ 12
2
12
13 G1 DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
TP_DATA R1545 1 2 100_0603_5%~D DAT_TP_SIO 14
DAT_TP_SIO 40 G2 @ Speak
TP_CLK R1546 1 2 100_0603_5%~D CLK_TP_SIO E&T_3703-E12N-03R Part Number Description
CLK_TP_SIO 40
C C
10P_0402_50V8J~D
10P_0402_50V8J~D
100P_0402_50V8J~D
PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG
10P_0402_50V8J~D
10P_0402_50V8J~D
33P_0402_50V8J~D
10K_0402_5%~D
1 1 1 1
@C1334
@
1 1 @SM CARD BODY
C680
C681
C682
C683
C1704
R1407
C1334
2 2 2 2 S SOCKET TYCO 1770551-1
2 2 SP070007V0L
10P H5.9 SMART
2
@PCMCIA BODY
PCMCIA TYCO
Touch Pad Conn. Pitch=0.5 DC000001Q0L
1759096-1
JTP1 @ MDC wire set cable

+3.3V_ALW 1 1
+5V_RUN Power Switch for debug Part Number Description
2 2
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
3 3 DC02000CS0L H-CONN SET ZGX

40 BC_CLK_ECE1077 4 4 1 MB-MDC
1 40 BC_DAT_ECE1077 5 5
C678
6 @ T/P wire set cable
40 BC_INT#_ECE1077 6
C771
+3.3V_ALW 7 POWER_SW#_MB 1 2 Part Number Description

7 2 37,40 POWER_SW#_MB 1 2
B +3.3V_RUN 8 8 B
2 TP_CLK H-CONN SET ZJX
9 9 1 DC02000840L
TP_DATA 10 MB-B/T-TP-FP
10 @C684
@ C684
+5V_RUN 11 11
12 100P_0402_50V8J~D PWRSW1 @ LVDS cable
+5V_ALW 12 2
Place close to KYBRD_BKLT_PWM 13 @SHORT PADS~D Part Number Description
40 KYBRD_BKLT_PWM 13
JTP1.5,6 14 14 @ Place on Top
15 DC020003Y0L H-CONN SET ZJX MB-LCD
TP_DET# 15 +5V_ALW 14 WXGA+(-1ch)
16 16
39 TP_DET#
0.1U_0402_16V4Z~D
@ LVDS cable
17 G1 1 Part Number Description
18 G2
C1413
1 2 DC02000870L H-CONN SET ZJX

1 2 MB-LCD 14 WXGA+(-2ch)
2
@ RTC BATT
HRS_FH12-16S-0P5SH(55)~D Part Number Description
TP_CLK PWRSW2
TP_DATA @SHORT PADS~D GC20323MX00 BATT CR2032 3V
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
Place on Bottom
@ 220MAH MAXELL
1
@ @
A A
D53
D54
2

Place close to JTP1 connector BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/LID
LA-5573P
5 4 3 2 1
5 4 3 2 1
DC/DC Interface +3.3V_ALW_PCH Source

+15V_ALW +3.3V_ALW Q54 +3.3V_ALW_PCH +5VRUN Source
SI3456BDV-T1-E3_TSOP6~D
+3.3V_ALW2 +15V_ALW +5V_ALW Q55
D
+3.3V_ALW2 6 SI4164DY-T1-GE3_SO8~D +5V_RUN
S
1
5 4 8 1
1
10U_0805_10V4Z~D
R598 2 7 2
10U_0805_10V4Z~D
100K_0402_5%~D 1 1 R597 6 3
1
100K_0402_5%~D 5 1
C687
R602 R601 R599 R600
C686
100K_0402_5%~D ALW_ENABLE 20K_0402_5%~D 100K_0402_5%~D 20K_0402_5%~D
4
21 ALW_ENABLE 2 5V_RUN_ENABLE
2
3
D 2 D
2
2
3
Q57B
2200P_0402_50V7K~D
DMN66D0LDW-7_SOT363-6~D 1 Q56B
ALW_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D
C688 RUN_ON_ENABLE# 5 1
6
3300P_0402_50V7K~D
4
2
C689
Q57A
4
6
2 2
40 PCH_ALW_ON
Q56A
1
2
+15V_ALW +3.3V_SUS Source 12,34,39,47,62 RUN_ON
+3.3V_ALW Q60
1
SI3456BDV-T1-E3_TSOP6~D +3.3V_SUS
1 +3.3V_RUN Source
D
R603 6
S
+3.3V_ALW2 100K_0402_5%~D 5 4 +3.3V_ALW Q61 +3.3V_RUN
2 +15V_ALW NTMS4107NR2G_SO8~D
1
20K_0402_5%~D
1 1 8 1
2
R1484
10U_0805_10V4Z~D
R605
7 2
G
1
1
C690
20K_0402_5%~D
1 2 6 3 1
3
8 1.5V_PWRGD 0.75V_VR_EN 47
10U_0805_10V4Z~D
R607
R604 SUS_ENABLE 5
2
C691
100K_0402_5%~D 100K_0402_5%~D R606
2
3
100K_0402_5%~D @
4
Q62B 2
2
2
SUS_ON_3.3V# 5 1 3.3V_RUN_ENABLE
Q206
6
C692 R1499 BSS138_SOT23~D

4
1
Q62A 4700P_0402_25V7K~D 0_0402_5%~D D D
2 1
DMN66D0LDW-7_SOT363-6~D RUN_ON_ENABLE# 1 2 2 2
C G G Q64 C693 C
40 SUS_ON 2
S S SSM3K7002FU_SC70-3~D 470P_0402_50V7K~D
3
@ R1500 2
1
0_0402_5%~D
RUN_ON_CPU1.5VS3# 1 2
+3.3VM Source Discharg Circuit

+3.3V_ALW Q66 +1.5V_RUN Source
+15V_ALW SI3456BDV-T1-E3_TSOP6~D +3.3V_M +3.3V_M Q151
100K_0402_5%~D
+3.3V_ALW2 +1.5V_MEM SI3456BDV-T1-E3_TSOP6~D

D
6 +15V_ALW +1.5V_RUN
S
1
D
5 4 6
S
R610
10U_0805_10V4Z~D
2 R616 5 4
1
1
20K_0402_5%~D
10U_0805_10V4Z~D
1 1 @ 39_0603_5%~D 2
1
R612
20K_0402_5%~D
C1190
R611 1 1
G
C694
R1225
100K_0402_5%~D R1224
G
2
2
M_ENABLE
+3.3V_M_CHG
100K_0402_5%~D
3
2
2
2
3
2
Q68B 1.5V_RUN_ENABLE
M_ON_3.3V# 5 1
1
D
1
6
1
D
Q72
C696 M_ON_3.3V# 2
4
Q68A 4700P_0402_25V7K~D G 2 Q152 C1191

DMN66D0LDW-7_SOT363-6~D 2 S G SSM3K7002FU_SC70-3~D 4700P_0402_25V7K~D
3
B 2 B
2 S
3
40,48 M_ON
1
Discharg Circuit +1.05V_RUN Source

+5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +1.5V_CPU_VDDQ +0.75V_DDR_VTT +15V_ALW +1.05V_M Q183
+3.3V_SUS +3.3V_ALW_PCH SI4164DY-T1-GE3_SO8~D +1.05V_RUN
8 1
1
1
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
1K_0402_5%~D
39_0402_5%~D
7 2
1
10U_0805_10V4Z~D
@ R622
@ R623
@ R636
R625 R1479 R1306 6 3
1
@ R627
@ R628
39_0603_5%~D 220_0402_5%~D R624 100K_0402_5%~D 5 1

22_0603_5%~D R1307
C1411
20K_0402_5%~D
2
4
1.05V_RUN_ENABLE
+5V_RUN_CHG
+1.5V_RUN_CHG
+3.3V_RUN_CHG
+1.05V_RUN_CHG
+1.5V_CPU_VDDQ_CHG
2
2
+3.3V_ALWPCH_CHG
2
+DDR_CHG
+3.3V_SUS_CHG
1
D
2200P_0402_50V7K~D
2 Q1
G SSM3K7002FU_SC70-3~D 1
S
3
12 RUN_ON_CPU1.5VS3#
C1412
1
1
D D D D D 2
@ @ @
1
D D
Q76
Q77
Q79
Q80
Q78
@ @ RUN_ON_ENABLE# 2 2 2 2 2
1
D
Q81
Q82
SUS_ON_3.3V# 2 ALW_ON_3.3V# 2 G G G G
Q204
G
G G S S S S 2 S
3
3
A G A
S S
3
S
3
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
LA-5573P
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN Fiducial Mark

HDD LED solution for Blue LED @ H1 @ H3 @ H4 @ H5 @ H6 EMI CLIP @ FD1
H_2P8 H_2P8 H_2P8 H_2P8 H_3P2 @ H13 @ H14 @ H15 @ H16 @ H17 1
1
+5V_RUN H_3P2 H_3P2 H_3P2 H_3P2 H_3P2 CLIP1
R654 EMI_CLIP FIDUCIAL MARK~D
10K_0402_5%~D
1
1 @ FD2
1
GND
1
3
@ H23 @ H24 @ H25
H_6P1 H_2P5X3P1 H_2P5X3P1 FIDUCIAL MARK~D
@ H7 @ H8 @ H9 @ H10 @ H11 @ H12 @ H19 @ H20 @ H21 @ H22
D
3 1 SATA_ACT# 2 H_3P0 H_3P0 H_3P0 H_3P0 H_3P2 H_3P2 H_5P0 H_5P0 H_5P3 H_5P3 @ FD3
15 SATA_ACT#_R
1
1
Q93 Q92
PDTA114EU_SC70-3~D FIDUCIAL MARK~D
G
1
D D
MASK_BASE_LEDS# @ FD4
1
1
1 2 SATA_LED 2 1
R659 1K_0402_5%~D +5V_ALW FIDUCIAL MARK~D
D42
LTST-C191ZBKT-Q_BLUE~D
3
+3.3V_WLAN 2
39 CAP_LED#
+5V_RUN Q120
Keyboard Status LED
3
PDTA114EU_SC70-3~D
1
1
3
R662 D67 2 1 2 R_CAP_LED# 2 1
39 NUM_LED#
100K_0402_5%~D SDM10U45-7_SOD523-2~D R556 1K_0402_5%~D
Q121 D57
2
3
PDTA114EU_SC70-3~D
S
3 1 1 2 2 LTST-C191ZBKT-Q_BLUE~D
36 LED_WLAN_OUT#
Q98 Q97
1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D R_NUM_LED#
G
2 1 2 2 1
2
39 SCRL_LED#
R596 1K_0402_5%~D
MASK_BASE_LEDS# Q122 D58
1
PDTA114EU_SC70-3~D LTST-C191ZBKT-Q_BLUE~D
1
1 2 R_SCRL_LED# 2 1
R655 1K_0402_5%~D
D45 +5V_ALW D59
LTST-C191ZBKT-Q_BLUE~D
1
D
1 2 WLAN_LED 2 1 R1006
3
R663 1K_0402_5%~D 100K_0402_5%~D MASK_BASE_LEDS# 2
LTST-C191ZBKT-Q_BLUE~D +5V_ALW 1 2 G
+3.3V_ALW Q150 S
3
2 SSM3K7002FU_SC70-3~D
C WLAN LED solution for Blue LED Q144A C
6
DMN66D0LDW-7_SOT363-6~D Q99
C1058
PDTA114EU_SC70-3~D Battery LED
1
D46
+3.3V_RUN R89 1 2 2 +5V_ALW BLUE
1
47K_0402_5%~D 1 2 BATT_BLUE 2 1
+5V_RUN R665 1K_0402_5%~D
1
1
1
5
1
0.1U_0402_16V4Z~D
2
R1004 +5V_ALW BATT_YELLOW 4 3
NC
P
R206 BAT2_LED# 2 4 BAT2_LED 100K_0402_5%~D
40 BAT2_LED#
3
100K_0402_5%~D A Y YEL
3
G
Q142
U63 LTST-C155TBJSKT_Blue/YEL~D
2
2
NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D
1
D
S
36 LED_WWAN_OUT# 3 1 2
Q141
5 Q144B 3 1 2 MASK_BASE_LEDS# 2
Q116 Q115 DMN66D0LDW-7_SOT363-6~D G
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D Q139
G
S
2
3
PDTA114EU_SC70-3~D
G
2
MASK_BASE_LEDS#
1
39 SYS_LED_MASK#
1 2 WWAN_LED 2 1
1
R125 1K_0402_5%~D +3.3V_ALW
D61
LTST-C191ZBKT-Q_BLUE~D R1007
3
100K_0402_5%~D
WWAN LED solution for Blue LED +3.3V_ALW 1 2
+3.3V_ALW 2
Q145A
6
DMN66D0LDW-7_SOT363-6~D Q101
+3.3V_RUN PDTA114EU_SC70-3~D
C1059
1
+5V_RUN R666
C1337 R82 1 2 2 +3.3V_ALW 150_0402_5%~D
1
1 2 47K_0402_5%~D 1 2
1
3
1
5
1
0.1U_0402_16V4Z~D U117 0.1U_0402_16V4Z~D
2
5
NC7SZ04P5X_NL_SC70-5~D R1005 +3.3V_ALW
NC
P
BAT1_LED# 2 4 BAT1_LED 100K_0402_5%~D
NC
P
40 BAT1_LED# A Y
S
41 BT_ACTIVE BT_ACTIVE 2 4 3 1 2
3
G
B A Y U64 Q143 B
2
G
10K_0402_5%~D
Q95 Q94 NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D R1002
3
1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D 1K_0402_5%~D

G
3
D
<BOM Structure> 5 3 1 2 1 2 BATT_BLUE_LED 24
R748
MASK_BASE_LEDS# Q145B
1
<BOM Structure> DMN66D0LDW-7_SOT363-6~D Q140
4
D43 PDTA114EU_SC70-3~D
G
2
2
1 2 WPAN_LED 2 1 R1003
R661 1K_0402_5%~D 150_0402_5%~D
1
39 SYS_LED_MASK#
LTST-C191ZBKT-Q_BLUE~D 1 2 BATT_YELLOW_LED 24
WPAN LED solution for Blue LED +5V_ALW
100K_0402_5%~D
1
+5V_ALW
R999
LED Circuit Control Table
3
Q134B
2
SYS_LED_MASK# LID_CL# 4 3 2
+3.3V_ALW
Q137
PDTA114EU_SC70-3~D
Q134A
Mask All LEDs (Sniffer Function) 0 X
5
C1060 +5V_ALW
Mask Base MB LEDs (Lid Closed) 1 0 2
1
1
1 2 1 2 BREATH_BLUE_LED BREATH_BLUE_LED 24
39 SYS_LED_MASK#
R90 R664 1K_0402_5%~D
Do not Mask LEDs (Lid Opened) 1 1
100K_0402_5%~D
1
1
47K_0402_5%~D +5V_ALW
0.1U_0402_16V4Z~D
R1000
5
1
2
3
NC
P
BREATH_LED#_R Q135B
2 4
2
38,40 BREATH_LED# A Y DMN66D0LDW-7_SOT363-6~D
G
U42 4 3 2
NC7SZ04P5X_NL_SC70-5~D
3
+3.3V_ALW
Q138
PDTA114EU_SC70-3~D
Q135A
A A
5
C1061
1 2 2
1
MASK_BASE_LEDS#
1 2 BREATH_BLUE_LED_SNIFF BREATH_BLUE_LED_SNIFF 37
1
5
U65 0.1U_0402_16V4Z~D R1001 150_0402_5%~D

SYS_LED_MASK# 1
P
39 SYS_LED_MASK# B
4 MASK_BASE_LEDS#
37,39 LID_CL#
LID_CL# 2
O DELL CONFIDENTIAL/PROPRIETARY
G
A
TC7SH08FU_SSOP5~D
3
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD and Standoff
LA-5573P
5 4 3 2 1
5 4 3 2 1
+COINCELL
COIN RTC Battery
1
PR1
1K_0402_5%~D
+3.3V_RTC_LDO
2
JRTC1
1
Z4012
+COINCELL 1
2 4
2 G1
3 5
+3.3V_ALW 3 G2
D D
MOLEX_53398-0371~D
3
+RTC_CELL
ESD Diodes
PD1
DA204U_SOT323~D
DA204U_SOT323~D
DA204U_SOT323~D
1
3
2
PD2
PD3
PD4
RB715F_SOT323~D 1
PL1 +3.3V_ALW PC1
@ @ @ FBMA-L18-453215-900LMA90T_1812~D 1U_0603_10V4Z~D
1 2
2
Primary Battery Connector
1
Move to power schematic
1
PJP1
10K_0402_1%~D
PBATT+_C 1 2 PBATT+
PR2
11
0.1U_0603_25V7K~D
GND
1
10 PAD-OPEN 4x4m
GND
PC2
9 PR4
2
9 100_0402_5%~D PR3
8
2
8 Z4304 100_0402_5%~D PR5
7 1 2 PBAT_SMBCLK 40
2200P_0402_50V7K~D
7 Z4305 100_0402_5%~D
6 1 2 PBAT_SMBDAT 40
6 Z4306
5 1 2 PBAT_PRES# 39
1
5
PC3
4
4 PQ1
3
3
2
2
2 FDN338P_NL_SOT23-3~D
1
1 PD6
3
1 2 1 3 DOCK_SMB_ALERT# 38,40
PBATT1
SUYIN_200275MR009G50PZR RB751V-40_SOD323-2~D
2
2
PR7
GND 1 2
38,39,52 SLICE_BAT_PRES#
0_0402_5%~D
C C
1
PC4
1500P_0402_7K~D
2
+5V_ALW
+3.3V_ALW
DA204U_SOT323~D
3
2
PD7
@ PR8 PU1
2.2K_0402_5%~D
2
1 2 GND 38 DOCK_PSID 1 6 GPIO_PSID_SELECT 39
0_0402_5%~D NO IN
PR9
2 5 +5V_ALW
PL2 PR10 GND V+
1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157
S
2 1 1 3 1 2 3 4 PS_ID 40
NC COM
100K_0402_1%~D PQ2 TS5A63157DCKR_SC70-6~D
2 FDV301N_NL_SOT23-3~D +5V_ALW
G
2
PR11
+5V_ALW
+5V_ALW
DA204U_SOT323~D
2
2
10K_0402_1%~D
DA204U_SOT323~D
1
C
PD9
PR12
2 PQ3
3
B MMST3904-7-F_SOT323~D
PD10
E @
15K_0402_1%~D
3
2
@
1
1
@ PD8
PR13
SM24_SOT23 PR14
GND 1 2
1
PSID_DISABLE# 39
1
PR15 @ 10K_0402_5%~D
0_0402_5%~D
1 2 DCIN_CBL_DET# 39
.47U_0402_6.3V6-K~D
B B
DC_IN+ Source
2
PC5
@ +DC_IN +DC_IN_SS
PQ4
FDS6679AZ_SO8~D
1 8
PL3 S D
2 7
FBMJ4516HS720NT_1806~D S D
3 6
+DC_IN S D
1 2 4 5
G D
1
1M_0402_5%~D
VZ0603M260APT_0603
2
0.022U_0805_50V7K~D
4.7K_0805_5%~D
10U_1206_25V6M~D
1
1
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PC6
PR16
1
PD11
1
1
PC7
PC8
PC10
PR17
PC11
2
2
1
0.1U_0603_25V7K~D
PJPDC1 PR20
4.7K_0805_5%~D
2
1
1 @ 1 2
2
SOFT_START_GC 52
1
0.1U_0603_25V7K~D
1
PC9
2
2
2 -DCIN_JACK 10K_0402_5%~D
@ PR18
3
1M_0402_5%~D
1
3 2
PC12
4
2
4 +DCIN_JACK
PR19
5
2
5
6
6 @
7
7
2
MOLEX_87438-0743 PL4
FBMJ4516HS720NT_1806~D
1 2
1
0.1U_0603_25V7K~D
PC13
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.1
LA-5772P
5 4 3 2 1
5 4 3 2 1
+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO
+DC1_PWR_SRC
PJP2
+PWR_SRC 1 2
PAD-OPEN 4x4m
2
PJP3 +5V_VCC1
0_0805_5%~D
0_0805_5%~D
D D
+5V_ALW2 1 2
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
PR22
PR23
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
@ PR24
1
PAD-OPEN1x1m 10_0603_5%~D
5 Volt +/-5%
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
1
PC20
PC21
PC22
PC23
PC24
2 1
4.7U_0805_6.3V6K~D
PC15
PC16
@ PC17
PC18
PC19
Thermal Design Current:7.13A
2
@
1
Peak Current:10.19A
PC25
OCP_MIN:11.2A +3.3V_ALW2
2
0.1U_0603_25V7K~D
1
PC26
PQ7 pop-option
1U_0603_10V6K~D
@ PR26
0_0402_5%~D
1U_0603_10V6K~D
1
1
DSC 2@ SI4134DY 0_0402_5%~D
PC27
2
1
PR25
PC28
ASICS & ASICS2 1@ AON6428L 1 2
2
@ PR27
2
PQ9 pop-option 0_0402_5%~D
2
1 2
DSC 2@ FDMS7692 5V_3V_REF
+5V_ALW2P
ASICS & ASICS2 1@ AON6706L +3.3V_RTC_LDO PC29
EN_3V_5V
+3.3V_ALW2
0.1U_0603_25V7K~D
1
GNDA_3V5V 1 2 GNDA_3V5V PR29
PR32 0_0402_5%~D
VIN
LDOREFIN 1 2
DSC 2@ 261K_ohm PQ7
3.3 Volt +/-5%
0.1U_0402_10V7K~D
ASICS 1@ 158K_ohm PR32 @ PR28
2
PR30
5
0.1U_0402_10V7K~D
SI4134DY-T1-GE3_SO8~D
PC31
0_0603_5%~D @
Thermal Design Current: 4.96A
8
7
6
5
6
7
8
3
2
5
4
SI4800BDY-T1-E3_SO8~D
2@ PQ7
GNDA_3V5V PU2 1 2
1
+5V_ALWP 0_0402_5%~D Peak current: 7.09A
PC30
LDOREFIN
VIN
D
D
D
D
LDO
TONSEL
VREF3
VREF2
V5FILT
EN_LDO
REFIN2
PQ8
@
2
AON6428L_1N_DFN8 OCP_MIN:8.5 A
2
1@ 4 @ 158K_1%_0402 PR31
1@ 9 32 294K_0402_1%~D 4
+5V_ALWP 2@ PR32 VSW REFIN2 GNDA_3V5V G
10 31 1 2
261K_0402_1%~D +5V_FB1 VOUT1 TRIP2 +3.3V_OUT2
11 30
VFB1 VOUT2
S
S
S
C GNDA_3V5V 1 2 12 29 2 PR33 0_0402_5%~D
1 +3.3V_ALWP C
1
2
3
PL5 POK1 TRIP1 SKIPSEL POK2 PL6

13 28
3
2
1
EN_3V_5V PGOOD1 PGOOD2 EN_3V_5V
14 27
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D +5V_ALW_UGATE EN1 EN2 +3.3V_ALW_UGATE 4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
15 26
+5V_ALWP +5V_ALW_PHASE DRVH1 DRVH2 +3.3V_ALW_PHASE +3.3V_ALWP
1 2 16 25 1 2
LL1 LL2
SECFB
V5DRV
VBST1
DRVL1
DRVL2
VBST2
0.1U_0603_25V7K~D
1000P_0603_50V7K~D
1
1
3
PGND
GNDA_3V5V
GND
0_0402_5%~D
0_0402_5%~D
PAD
1
0.1U_0603_25V7K~D
3
FDMS7692_NL_POWER56-8~D
PC32
PC33
D
330U_D3L_6.3VM_R25~D
330U_D3L_6.3VM_R25~D
PQ9 1000P_0603_50V7K~D
PR34
PR35
D
2
2
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
2@ PQ9
1
SN0608098_QFN32_5X5~D
PC36
PC37
1 1
33
17
18
19
20
21
22
23
24
PQ10
2
1
1
+ @ +
PC34
PC35
PC38
PC39
2
2
G
SECFB
GNDA_3V5V 2
2
2
PR37 PR38 G PR39
2
2
S
2 @ AON6706L_1N_DFN8 1_0603_5%~D 1_0603_5%~D 2.2_1206_1%~D @ 2
S
2+5V_ALW_BOOT +3.3V_ALW_BOOT 1
PR36
1@ 1 2
0_0402_5%~D
2.2_1206_1%~D
1
1
1
@
0_0402_5%~D
1
+3.3V_ALW_LGATE
PR41
1
1
PR40
2
+5V_ALW_LGATE
GNDA_3V5V
GNDA_3V5V
GNDA_3V5V PC40 PJP4
1
4.7U_0603_6.3V6K~D
+5V_ALWP 2 0.1U_0603_25V7K~D 1 2
+3.3V_ALWP +3.3V_ALWP
PC41
VOUT2=5V 1 1 2
3
+5V_ALW2
2
0.1U_0603_25V7K~D
L=3uF PAD-OPEN1x1m
Fsw=400KHz
1
PD12 GNDA_3V5V VOUT2=3.3V
100K_0402_1%~D
100K_0402_1%~D
D=0.256
PC42
BAT54SW-7-F_SOT323-3~D
2
Input Ripple Current=TDC*(D*(1-D))^0.5=3.11A L=3uF
2
PC43
PR42
PR43
Output Ripple Current=(19-5)*0.263/3.3u/400K=2.82A Fsw=300KHz
2 0.1U_0603_25V7K~D PD14
1
Output Ripple Voltage=3.1*18m=70.5mV 1 1 2 BAT54CW_SOT323~D D=0.173

B B
3 @ Input Ripple Current=TDC*(D*(1-D))^0.5=3.23A
1
PR44 PD13 POK2 Output ripple current=(19-3.3)*0.173/3u/300K=3.04A
2K_0402_5%~D Output ripple Voltage=1.96*18=54.72mV
2 1 BAT54SW-7-F_SOT323-3~D
3
40 ALWON
0_0402_5%~D
1
200K_0402_5%~D
2
PR45
PR46
0_0402_5%~D
PR47
23 THERM_STP# 2 1
2
1
POK1
PJP5 ALW_PWRGD_3V_5V 40
1 2
PAD-OPEN 4x4m PR48

PJP6 PJP7 200K_0402_1%~D
+5V_ALWP 1 2 +15V_ALW 2 1 +15V_ALWP 2 1
+5V_ALW
PAD-OPEN 4x4m
0.1U_0603_25V7K~D
PAD-OPEN1x1m
2
(100mA,20mils ,Via NO.=1)

1
PR49
PC44
PJP8 39K_0402_5%~D
1 2
2
+3.3V_ALWP +3.3V_ALW
1
PAD-OPEN 4x4m
PJP9
1 2
PAD-OPEN 4x4m
GNDA_3V5V
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DC/DC +3V/ +5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-5772P
5 4 3 2 1
5 4 3 2 1
@ PL9
1 2
D D
PJP11
1 2 +PWR_SRC
PAD-OPEN 4x4m
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
1
1
PC68
PC69
PC70
PC71
PC72
2
2
+3.3V_ALW
100K_0402_1%~D
1
5
6
7
8
PR69
PQ11
D
D
D
D
SI4162_SO8~D
2
40 1.5V_SUS_PWRGD PR70 PC73 4
PU5 0_0603_5%~D 0.22U_0603_10V7K~D G
PR71
1 10 1 2 1 2
PGOOD VBST
S
S
S
39.2K_0402_1%~D
PR72 GNDA_1.5V 1 2 2 9 PL10
3
2
1
0_0402_5%~D TRIP DRVH 0.45UH_ETQP4LR45XFC_25A_-25+20%~D
C 40,47 DDR_ON 1 2 3 8 1 2 C
EN SW +1.5V_SUS_P
5
4 7 +5V_ALW
VFB V5IN
1000P_0603_50V7K~D
5 6
1U_0603_6.3V6M~D
SIR468DP_MLP8~D
SIR468DP_MLP8~D
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
RF DRVL
330U_D2E_2.5VM_R15~D
330U_D2E_2.5VM_R15~D
1 1 1 1 1
1
PC74
PC75
PC79
PC80
11
1
TP
PQ12
PQ13
+ +
PC76
PC77
PC78
4 4
2
PR73 TPS51218DSCR_SON10_3X3~D
2
2 @ 2 2
470K_0402_5%~D
2 2
2
3
2
1
3
2
1
2.2_1206_1%~D
PR74
GNDA_1.5V
GNDA_1.5V @
2
PR75 PR76
19.6K_0402_1%~D 22.6K_0402_1%~D
1.5 Volt +/-5%
GNDA_1.5V 1 2 2 1 Thermal Design Current: 11.6A
Peak current: 16.58A
OCP_MIN:18.23A
B B
PJP44
1 2
PAD-OPEN1x1m
GNDA_1.5V
PJP13
1 2
PAD-OPEN 4x4m
PJP17
+1.5V_SUS_P 1 2 +1.5V_MEM
A A
PAD-OPEN 4x4m
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-4151P
5 4 3 2 1
5 4 3 2 1
+1.8V_RUNP
+3.3V_ALW PJP18
1 2 +1.8V_PWR_SRC
1.8 Volt +/-5%
PAD-OPEN 4x4m
Thermal Design Current: 0.951 A
1
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
0.1U_0603_25V7K~D
PR380
Peak current: 1.359 A
PC83
0_0603_5%~D
1
PC81
PC82
D D
PC317 100P_0402_50V8J~D
OCP_MIN: 4.5A
2
2 1
2
@ @
1
GNDA_1.8V
PR379
0_0402_5%~D
2
2 1
0_0402_5%~D
PR381 PL11
1
4
PU6
GNDA_1.8V
PL11 pop option
VDD
SYNCH
VIN
VIN
DSC (2@) use 2uH
1 2 5 EN TPAD 17
12,34,39,42,62 RUN_ON 1.1UH_#A915AY-H-1R1M=P3_4.07A_20% ASICS & ASICS2 (1@) use 1.1uH
PR77 1@
24k_0402_1%~D 16
NC 2@ PL11
6 NC 2UH_#A915AY-H-2R0M=P3_3.3A_20%
LX 15 2 1 +1.8V_RUNP
ISL8014IRZ-T_QFN16_4X4~D
7 PG
LX 14
C C
150P_0402_50V8F~D
680P_0603_50V8J~D
8 VFB NC 13
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
47P_0402_50V8J~D
39 1.8V_RUN_PWRGD
SGND
SGND
PGND
PGND
124K_0402_1%~D
PC84
1
1
2
1
PR79
PC85
PC86
PC87
PC324
10K_0402_5%~D @
10
11
12
2
PR78
2
2
1
PR80
4.7_0805_5%~D
100K_0402_1%~D
GNDA_1.8V
1
@ PJP19 +3.3V_RUN
PR81
1 2
@
PAD-OPEN1x1m
2
GNDA_1.8V
GNDA_1.8V
@ PJP20
+1.8V_RUNP 1 2 +1.8V_RUN
PAD-OPEN 4x4m
B B
VOUT=1.8V
+0.75V_DDR_VTT L=3.3uF
Fsw=290KHz
DDR3 Termination D=0.092
Input Ripple Current=TDC*(D*(1-D))^0.5=0.884A
+5V_ALW
Output Ripple Current=1.707A
Output Ripple Voltage=1.707*15m=20.5mV
+0.75V_P
PC88
2 1
+V_DDR_REF
4.7U_0805_10V4Z~D 0.75Volt +/-5%
PU7
10 3
PJP21 VIN VTT
+1.5V_MEM 2 1 DC_1+0.75V_VTT_PWR_SRC 2 5
Peak current: 1A
VLDOIN VTTSNS
10U_0805_6.3V6M~D
10U_0805_6.3V6M~D
PAD-OPEN 2x2m~D 1 6
VDDQSNS VTTREF
0.1U_0603_25V7K~D
@ PR82 0_0402_5%~D
1 2 7 4
S3 PGND
2
39 0.75V_DDR_VTT_ON
PC90
PC91
8
GND
2
PC89
10U_0805_6.3V6M~D
0.1U_0603_25V7K~D
PR428 1 2 9 11
0_0402_5%~D S5 BP PJP22
1
2 1 PR83 0_0402_5%~D TPS51100DGQRG4_MSOP10~D 2 1

1
+0.75V_DDR_VTT
2
42 0.75V_VR_EN
PC92
+0.75V_P
PC93
A PAD-OPEN 2x2m~D A
1
40,46 DDR_ON
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT +0.75V_DDR_VT/+1.8V_RUN
5 4 3 2 1
5 4 3 2 1
D D
+1.05V_M_P 1.05 Volt +/-5%

Peack current: 10.9A
@ PL12
OCP_MIN: 11.9A
1 2 +5V_ALW
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
@ PJP26
+3.3V_ALW
PC95
PC98
1 2
1
1U_0402_6.3V6K~D
PC97
PC94
PAD-OPEN 4x4m
17
16
PU8
2
VIN
VIN
PR378
PC99
1
3.3_0603_1%~D
PC96
1 15 1 2 1 2
VCCA VBST
2
2 14 1.05V_M_PWRGD
GNDA_1.05VM GND PGOOD 0.22U_0603_10V7K~D
PC100 PR84 3 13 1.05V_VM_EN
680P_0402_50V7K~D 5.6K_0402_5%~D COMP EN @PR85
@ PR85 +1.05V_VM_P
2 1 2 1 4 VFB FSET 12 1 2
22.1K_0402_1%~D
C PC101 C
5 VOUT MODE 11
22.1K_0402_1%~D
100P_0402_50V8J~D PL13
PR86
2 1 6 10 0.42UH_MPC0740LR42C_20A_25%~D
SS IMON +1.05V_VX 2 1
2200P_0402_50V7K~D
1
PGND
PGND
1
PC102
SW
PC103 PR87 @
10U_1206_25V6M~D
10U_1206_25V6M~D
PC113
PC114
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
22U_1206_6.3V6M~D
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
1200P_0402_50V7K~D
0_0402_5%~D PC104
2
1
1 2 1 2 SN0905030RUW_QFN17_3P5X3P5~D 0.1U_0603_25V7K~D
7
PC105
PC106
PC107
PC108
PC109
PC110
PC111
PC112
PR88
2
2K_0402_5%~D
1 2 @ @
2
GNDA_1.05VM
@ PR89
@PR89
7.68K_0805_1%~D
1
2.61K_0402_1%~D
1
+3.3V_ALW
PR90
@ PR410 0_0402_5%~D
2 1 TPS_1.05_IMON 100K_0402_1%~D
2
1
PR91
1
1.33K_0402_1%~D
GNDA_1.05VM
@ PR92
PR93
0_0402_5%~D
2
1 2 1.05V_M_PWRGD 40
40,42 M_ON
@ PR94
@PR94 PJP24
B 0_0402_5%~D B
1 2
1 2 1.05V_VM_EN
17,39 SIO_SLP_M# PAD-OPEN 4x4m
PJP25
+1.05V_VM_P 1 2 +1.05V_M
PAD-OPEN 4x4m
@ PJP50
1 2
PAD-OPEN1x1m
GNDA_1.05VM
A A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.05VM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-4151P
5 4 3 2 1
5 4 3 2 1
1.05 Volt +/-5%

1.1 Volt +/-5%
Peack current: 26.75A
PR101 Peack current: 18.059A
OCP_MIN: 32.096A
1 2 +5V_ALW OCP_MIN: 21.67A
1
10_0603_5% PC122
2.2U_0603_10V6K~D
1U_0603_6.3V6M~D
2
1
PC123
D 2 D
@ PL15
VTT_B+ 2 1 +PWR_SRC
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
2
1
@ PJP30
PU10
PC124
PC125
PC126
PC127
PC128
18
1 2
2
PAD-OPEN 4x4m
VCC
VDD
@
1 2 1 2
PR105
PR103 @ PR104 6 2 200K_0402_1%~D
1
TON1
0_0402_5% 0_0402_5% 16
GND PR106
7 2 200K_0402_1%~D
1
GNDA_VTT TON2
+5V_ALW 2 PR107
ILIM1 PC129
PQ15
2.2_0603_1%~D 4
15 1 2 2 1
2
PC130 BST1 PL16
0.22U_0603_10V7K~D 0.56UH_MPC1040LR56C_23A_+-20%~D
0_0402_5% +VTTP UG_VTT1
@ PR108
2 1 3 13
3
2
1
ILIM2 DH1
4 1
820P_0402_50V7K~D
5
220P_0402_50V8J~D 14 PHASE_VTT1 3 2
1
1
LX1
PC131
10_0402_1%~D
1
2
1 2 5
SKIP
BSC884N03MS_POWER56-8~D
LG_VTT1 PR110
PR386
17
11
DL1
VTT_SENSE
PR109 1.58K_0402_1%
2
PQ16
0_0402_5% PR111 @ PR395 4
4.7_0805_1%
2
0_0402_5% 0_0402_5%~D
1
PR112
39 CPU_VTT_ON 1 2 11 20 1 2 1 2
EN1 PGND
PR113 PR114
1
3
2
1
0.22U_0402_6.3V6K
10 6.98K_0402_1%~D 0_0402_5% +VTTP
1
1000P_0402_50V7K~D
220U_SX_2VY_R9M~D
220U_SX_2VY_R9M~D
220U_SX_2VY_R9M~D
2
CSH1
C C
1
PC132
1 1 1
GNDA_VTT 25 9 PR385
21
EN2 CSL1 + + +
PC134
PC135
PC136
0_0402_5%~D
PC133
2
PC137 1 PR115
2 2 2 2
2200P_0402_50V7K~D GNDA_VTT 10_0402_1%~D
GNDA_VTT 2 1 1 21 1 2 2 1
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
REF BST2 PR116 2.2_0603_1%~D VTT_B+
VTT_FB2 PC138
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
1
2
0.22U_0603_10V7K~D
1
+5V_ALW
PC139
PC140
PC141
PC142
PC143
23
PR117 DH2
1
40.2K_0402_1%~D 8
100K_0402_5%~D
REFIN1 @
22
1
LX2
2
PQ17
UG_VTT2
PR396
2 1 4
+5V_ALW 19
6
PR118 DL2 PL17

464K_0402_1% PR119 0.56UH_MPC1040LR56C_23A_+-20%~D

2
49.9K_0402_1%~D 12
100K_0402_5%~D
3
2
1
1
PGOOD1
PQ74A
2 26 PHASE_VTT2 4 1
2
CSH2
PR397
820P_0402_50V7K~D
PC144
PC146
3 2
1
3
1
24 27 0.22U_0402_6.3V6K
10_0402_1%~D
2 1
2
PGOOD2 CSL2
PQ74B
PR110 PR120
2
PR120
PR434
2
Margaux UMA and SG 3.01K
BSC884N03MS_POWER56-8~D
5 GNDA_VTT GNDA_VTT PC145 1.58K_0402_1%
28 1000P_0402_50V7K~D
GND_T
4.7_0805_1%
1
2
FB2 Margaux DSC and ASICS 1.58K
PQ18
PR399 +5V_ALW LG_VTT2 4
4
1
1
10K_0402_5%~D C GNDA_VTT
PR121
11 CPU_VTT_SELECT 1 2 2 PQ73 1 2 1 2
B MMST3904-7-F_SOT323-3~D MAX17007AGTI+_TQFN28_4X4~D PR113 PR122
29
1
1
E PR122 PR123
0_0402_5%~D
3
3
2
1
1
1
PR124 6.98K_0402_1%~D 0_0402_5% Margaux UMA and SG 4.99K
PR433
100K_0402_5%~D
PR398
9.31K_0402_1%~D 2 1
Margaux DSC and ASICS 6.98K
2
B B
@ PR125
PR126
0_0402_5%
2
2
0_0402_5%
2
1
@ PR127
0_0402_5%
8 H_VTTPWRGD
GNDA_VTT
1
1
11
VTT_SENSE
1 2
PR128
2
2.74K_0402_1%~D VTT_FB2 PR129

PJP31
+5V_ALW 10_0402_1%~D
2 1 @ PJP32
2
1 2
PAD-OPEN1x1m
PAD-OPEN 43X118
GNDA_VTT GNDA_VTT
@ PJP33
1 2
PAD-OPEN 43X118
+VTTP +1.05V_1.1V_RUN_VTT
@ PJP34
1 2
PAD-OPEN 43X118
@ PJP35
1 2
PAD-OPEN 43X118
A A
Title
<Title>

C LA-5772P 1A

5 4 3 2 1
8 7 6 5 4 3 2 1
+1.05V_1.1V_RUN_VTT +CPU_PWR_SRC
@ @
PJP37
PR130
PR131
PR132
PR133
PR134
PR135
PR136
1 2 +PWR_SRC
1
PAD-OPEN 4x4m
OCP calculation: Assume DCR=0.88mOhm
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
100U_25V_M~D
100U_25V_M~D
100U_25V_M~D
10U_1206_25VAK~D
10U_1206_25VAK~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
SIR472DP-T1-E3_SO8~D0.1U_0603_25V7K~D
G1=Rn/(Rn+Rsum/3), 1 1 1
PC151
PC152
PC153
2
1
11 VID0 where Rn=PR137//(PR134+PH2); Rsum=PR105,PR218,PR142 + + +
PC147
PC149
PC150
H H
PC148
PC328
11 VID1 DROOP=2*(DCR/3)*G1*Rdroop/Ri=1.91mOhm
2
2 2 2
where Rdroop=PR126;Ri=PR140
5
11 VID2
Iocp=60u*Rdroop/DROOP=~75A.
SIR472DP-T1-E3_SO8~D
11 VID3 @ @ @
PR137
PR138
PR139
1
1
11 VID4
PQ19
@ PQ70
4 4
Iccmax= 48A
11 VID5
I_TDC=33.6A
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
11 VID6 @ @ OCP=57.6 A, Intel spec=TDB
2
PR143
PR144
PR145
PR146
3
2
1
3
2
1
1
1
39 IMVP_VR_ON 1 2 PR142 PC154
PR141 0_0402_5%~D 0_0603_5%~D 0.22U_0603_10V7K~D
+1.05V_1.1V_RUN_VTT 1 2 BOOT2 2 1 BOOT2_2 1 2
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
1K_0402_1%~D
PR140 1K_0402_1%~D PL18
11 H_DPRSLPVR 1 2 UGATE2 0.36UH_ ETQP4LR36AFC_28A_20%~D
2
G PR147 100_0402_5%~D G
PHASE2 4 1 +VCC_CORE
1 2
680P_0603_50V8J~D
5
5
@ PR148 1K_0402_1%~D 3 2V2N
SI7658ADP_MLP8~D
1
PQ21
PR149
SI7658ADP_MLP8~D
51K_0402_1%~D PR150 @
PC155
6 CLK_EN#
PQ20
ISEN2 1 2 0_0402_5%~D
2
PR151 1.91K_0402_1%~D 2 1 ISEN1
+3.3V_RUN 1 2 CLK_EN# 4 4
PR154 PR155 @
1
1
3.65K_0603_1%~D 0_0402_5%~D
2.2_1206_1%~D
VSUM+ 1 1 ISEN3
PR153
2 2
PR152
3
2
1
3
2
1
PR156 1.91K_0402_1%~D
0_0402_5%~D LGATE2 PR157
2
2
1
8,39 IMVP_PWRGD 1 2 1_0402_5%~D
@ PR158 PR205 VSUM- 1 2
1K_0402_5%~D 0_0402_5%~D
+1.05V_1.1V_RUN_VTT 1 2
F F
2
PR159 0_0402_5%~D +CPU_PWR_SRC

1 2
11 H_PSI#
PR161 1K_0402_1%~D
PR160 1 2
147K_0402_1%~D
2200P_0402_50V7K~D
5
0.1U_0603_25V7K~D
1 2 PC156 +5V_ALW
GNDA_VCORE
10U_1206_25VAK~D
10U_1206_25VAK~D
1U_0603_10V6K~D
39
37
36
35
34
33
32
31
40
38
1
PR162 68_0402_5%~D PU11
PC157
1 2
PC158
PC159
PC160
1 2
DPRSLPVR
VID6
VID5
VID4
VID3
VID2
VID1
VID0
CLK_EN#
VR_ON
+1.05V_1.1V_RUN_VTT
1U_0603_10V6K~D
PQ22
@ PQ71
2
1
PR164 0_0402_5%~D PR163 PC161
PC162
30 4 4
BOOT2 PU12 0_0603_5%~D 0.22U_0603_10V7K~D
1 2 29
8 H_PROCHOT# UGATE2 BOOT3 1 BOOT3_31
1 28 5 1 2 2
2
@ PC163 56P_0402_50VNPO~D PGOOD PHASE2 VCC BOOT
2 27
PSI# VSSP2 UGATE3
1 2 3 26 6 8
3
2
1
3
2
1
VR_TT# RBIAS LGATE2 FCCM UGATE PL19
4 25 +5V_ALW
@ PR165 VR_TT# VCCP PHASE3 0.36UH_ ETQP4LR36AFC_28A_20%~D
E 5 24 2 7 E
NTC PWM3 PWM PHASE
GNDA_VCORE 1 2 2 1 6 23
4.02K_0402_1%~D VW LGATE1 LGATE3
7 22 3 4 4 1 +VCC_CORE
@ PH1 COMP VSSP1 GND LGATE
8 21
680P_0603_50V8J~D
5
5
GNDA_VCORE FB PHASE1
470K_0402_5%_ERTJ0EV474J~D 1 2 9 ISL6208CRZ-T_QFN8~D 3 2V3N
SI7658ADP_MLP8~D
SI7658ADP_MLP8~D
1
ISEN3
UGATE1
PQ23
PQ24
10 ISL62883HRZ-T_QFN40_5X5~D
BOOT1
ISUM+
ISEN2
ISEN1
ISUM-
VSEN
IMON
@ PC164 PR167
PC165
1 2
VDD
249K_0402_1%~D
8.06K_0402_1%~D
RTN
1U_0603_10V6K~D
1000P_0402_50V7K~D
VIN
22P_0402_50V8J~D 41 51K_0402_1%~D
2
1
AGND
PR169 @
0_0402_5%~D ISEN3 1 PR168 @

PC166
PC167
2
@ PR166 0_0402_5%~D
PR170
4 4
11
12
13
14
15
16
17
18
19
20
2 1 ISEN1
2
PR171 PC168 GNDA_VCORE
1
1 2 1 2 PR172 PR174 @
2.2_1206_1%~D
2
3.65K_0603_1%~D 0_0402_5%~D
PR173
3
2
1
3
2
1
562_0402_1%~D 390PF_0402_50V7K~D VSUM+ 1 2 2 1 ISEN2
PC169 PR175 PR176 0_0402_5%~D
1 2 1 2 1 2 IMVP_IMON 11,23
2
PR179
33P_0402_50V8J~D 2.43K_0402_1%~D PR177 0_0402_5%~D 1_0402_5%~D
D PR387 1 2 +CPU_PWR_SRC VSUM- 1 2 D
D
1 2 1 2 1 2 1 3
0.068U_0402_10V7K~D
PC170 PR178
150P_0402_50V8J~D 324K_0402_1%~D 15K_0402_1%~D PQ69 PR181 1_0402_5%~D
RHU002N06_SOT323-3~D 1 2
G
+5V_ALW
34.8K_0402_1%~D
2
+CPU_PWR_SRC
1
1
PC172
PC173
PR432
PC171
1U_0603_10V6K~D
6.81K_0402_1%~D
0.22U_0603_25V7K~D
ISEN3
PR184
1 2
39 VCORE_LL_SELECT PR180 0_0402_5%~D
2
ISEN2 @
BOOT1
1 2
1
10U_1206_25VAK~D
2200P_0402_50V7K~D
2200P_0402_50V7K~D
5
0.1U_0603_25V7K~D
PR182 0_0402_5%~D
2
10U_1206_25VAK~D
0.22U_0402_10V6K~D
0.22U_0402_10V6K~D
0.22U_0402_10V6K~D
ISEN1 1 2
5.1K_0402_1%~D
2
1
PR183 0_0402_5%~D D VSSSENSE 11
PC177
PQ25
PR388
PC329
PC178
PC179
PC180
2
GNDA_VCORE
@ PQ72
G
2
S UGATE1 4 4
3
1
@ PQ75
PC174
PC175
PC176
1
RHU002N06_SOT323-3~D
39 VCORE_LL_SELECT PR185 PC181
2
C 0_0603_5%~D 0.22U_0603_10V7K~D C
3
2
1
3
2
1
+5V_ALW VSUM+ 2 1 BOOT1_1 1 2
VSUM- PL20
82.5_0402_1%~D
Catch resistors R1116 R1236 0.36UH_ ETQP4LR36AFC_28A_20%~D

1
PHASE1 4 1 +VCC_CORE
1
0.022U_0402_50V7~D
PR187
GNDA_VCORE 1 2
2.61K_0402_1%~D
1
0.47U_0603_16V7K~D
0.047U_0603_25V7M~D
2V1N
PR189
SI7658ADP_MLP8~D
680P_0603_50V8J~D
PQ26
PQ27
PR203 @ 27.4_0402_1%~D
PC182
SI7658ADP_MLP8~D
1
1
0.01U_0402_25V7K~D
11 VCCSENSE VCCS PR190

PC183
PC184
@ PC185
1 2
2
2
51K_0402_1%~D
2
PR188 0_0402_5%~D ISEN1 2 1

2
2
1
4 4 PR192 @
1
1
PC186 0_0402_5%~D
330P_0402_50V7K~D PR193 1 ISEN2
PC187
2.2_1206_1%~D
2
3.65K_0603_1%~D
PR191
2
VSUM+ 1 2 PR194 @
3
2
1
3
2
1
GNDA_VCORE 0_0402_5%~D
2
LGATE1 2 1 ISEN3
330P_0402_50V7K~D
B PR195 B
11K_0402_1%~D
1
PC188 619_0402_1%~D PH2

PC189
PR197
0_0402_5%~D
1000P_0402_50V7K~D 1 2 PR199
PR198 0_0402_5%~D 10K_0402_1%_ERTJ0EG103FA~D 1_0402_5%~D
PR196
2
11 VSSSENSE 1 2 VSUM- 1 2
2
2
2
UMA&SG 1H/1L
PR201
100_0402_5%~D
DSC 1H/2L
1 2 1 2 VSUM- ASICS 2H/2L
PC190
1200P_0402_50V7K~D
.1U_0402_16V7K~D
GNDA_VCORE 1 2 VSSS
1
PR204 @ 27.4_0402_1%~D
PC191
2
A
PJP38 A
1 2 Compal Electronics, Inc.
Title
PAD-OPEN1x1m
GNDA_VCORE GNDA_VCORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCORE
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5772P
8 7 6 5 4 3 2 1
5 4 3 2 1
PD15
B540C-13-F_SMC2~D
2 1 @ PL27
2 1
PQ28 PR202
SI4835DDY-T1-E3_SO8~D +SDC_IN 0.01_1206_1%~D +PWR_SRC CHAGER_SRC
8 1 PJP39
7 2 4 1 1 2
+DC_IN_SS
0.1U_0603_25V7K~D
6 3
0.1U_0603_25V7K~D
5 3 2 PAD-OPEN 4x4m
47P_0402_50V8J~D
@
1
PC194
PC192
4
PC193
PR281
2
1
D PR391 @ D
1 2 DC_BLOCK_GC 52 D
1 2 2 PQ31
52 CSS_GC
0_0402_5%~D G NTR4502PT1G_SOT23-3~D
1
0_0402_5%~D D S
3
2 PQ33A
G NTGD4161PT1G_TSOP6~D
PQ32 S
S
NTR4502PT1G_SOT23-3~D
D
5 6 DOCK_DCIN_IS+ 38
E2 AC_OK=17.7 Volt
CSSN_1
CSSP_1
G
1
PR218 PQ33B
@ PR209 NTGD4161PT1G_TSOP6~D
TI bq24745 = 316K 10K_0402_5%~D
100K_0402_1%~D
Intersil ISL88731 = 226K
D
2 1 2 4 DOCK_DCIN_IS- 38
Maxim MAX8731= 383K
100K_0402_1%~D
1
1
PR213
G
3
+SDC_IN
PR214
MAX8731A_LDO MAX8731_REF PC196 PC197
10K_0402_1%~D
10K_0402_5%~D
PR392 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D PR217
2
52 +CHGR_DC_IN 1 2 1 2 1 2 0_0402_5%~D
2
1
1
316K_0402_1%~D
1 2 DK_CSS_GC 52
PR215
PR216
1_0805_5%~D
2
0_0402_5%~D
PR218
PR212
@ PC198
1U_0603_10V6K~D
28
27
1
@ PC199 GNDA_CHG PU13 VCC 1 2 GNDA_CHG
2
0.1U_0805_50V7M~D
ICREF
CSSP
CSSN
PR219 2 1 DCIN 22 26
1
DCIN ICOUT
2200P_0402_50V7K~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
49.9K_0402_1%~D PR220
BAT54HT1G_SOD323-2~D
2 1 2 2.2_0603_1%~D PR221 @
PR222 ACIN BOOT BOOT_D 33_0603_1%~D
25 1 2
BOOT
1
PC202
PC203
PC204
PC205
15.8K_0402_1%~D
C C
PC200 1 2 13 ACOK
23,40,52 ACAV_IN
1
PC201
0.1U_0603_25V7K~D
0_0402_5%~D
1
1
2 1 11
2
VDDSMB
5
6
7
8
5
6
7
8
PD17
PR223
PQ34
0.01U_0402_25V7K~D 10 PC206
2
SCL 1U_0603_10V6K~D
PQ35
GNDA_CHG +5V_ALW @ 9 21 MAX8731A_LDO 1 2
2
SDA VDDP
GNDA_CHG 14 4 4
NC CHG_UGATE
24
MAX8731_IINP UGATE
8
VICM
1
23 2 PR224 1 +VCHGR_B
PHASE
3300P_0402_50V7K~D
PC207 6
3
2
1
3
2
1
FBO
1
0.1U_0402_10V7K~D 1_0603_1%~D
2
1 2 5 @ PC208 PL21
EAI 220P_0402_50V7K~D 5.6UH_HMU1356B-5R6-F_8A_20%~D
1
4.7K_0402_5%~D
GNDA_CHG PR225 1 2 1 2 4 20 CHG_LGATE

EAO LGATE
56P_0402_50V8~D
+VCHGR
PC210
40 CHARGER_SMBCLK 200K_0402_5%~D PC209 PR226 PR228
1
3
2200P_0402_50V7K~D 7.5K_0402_5%~D 0.01_1206_1%~D
2
PR227
40 CHARGER_SMBDAT
2
PC211
MAX8731_REF 3 19 @ 2 1 +VCHGR_L
4 1
VREF PGND
18
CSOP
1.8K_1206_5%~D
PC212 PR229 3 2
2
23 MAX8731_IINP
1
10U_1206_25V6M~D
10U_1206_25V6M~D
10U_1206_25V6M~D
0.1U_0603_25V7K~D
120P_0402_50VNPO~D 1 2 7 17
CE CSON
5
6
7
8
0_0402_5%~D
220P_0402_50V8J~D
PR232
8.45K_0402_1%~D
1 2 10K_0402_5%~D
1
1
PQ36
0.1U_0402_10V7K~D
15 VFB
1 PR231 2 +VCHGR PC214
2
VFB
1
1
PR230
PC213
1U_0603_10V6K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
0.01U_0402_25V7K~D
12 1000P_0603_50V7K~D
GND
1
PR233
PC220
PC221
PC222
PC223
16 100_0402_5%~D @
2
NC
1
1
PC215
PC216
PC217
PC218
PC219
29
2
2
TP
2
@ 4 PR234
2
2
4.7_1206_5%~D
2
@ @ @ @ BQ24747RHDR_QFN28_5X5~D PC224
B PJP40 0.1U_0603_25V7K~D PC225 B
1
D
1 2 1 2 1 2
3
2
1
1
2
0.1U_0603_25V7K~D G
PAD-OPEN1x1m S
3
GNDA_CHG
GNDA_CHG GNDA_CHG @
Maximum charging current is 6.3A ACAV_IN
PQ37
MAX8731_REF RHU002N06_SOT323-3~D
+3.3V_ALW
+DC_IN MAX8731_REF
10K_0402_1%~D
PR235
232K_0402_1%~D
47K_0402_1%~D
1M_0402_1%~D
1
100K_0402_1%~D
1 2
1
PR237
PR238
PR241
+5V_ALW
PR240
2
2
2
8
PU14B @
5 PR245
P
+
7 1 2
O ACAV_IN_NB 39,40,52
100P_0402_50V8J~D
22.6K_0402_1%~D
41.2K_0402_1%~D
6 0_0402_5%~D
-
G
4
LM393DR_SO8~D
100P_0402_50V8J~D
42.2K_0402_1%~D
1
1
2 LM393DR_SO8~D
G
4
-
1
1
PC226
PR246
PC227
PR250
1
O
PR247
3
+
P
2
PU14A @
8
2
2
100P_0402_50V8J~D
0.01U_0402_25V7K~D
A A
1
1
PC233
PC234
2
@ @
+5V_ALW
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5772P
5 4 3 2 1
5 4 3 2 1
PD19
B540C-13-F_SMC2~D
2 1
PQ45
+DOCK_PWR_BAR 8 D S 1
0.47U_0805_25V7K~D
7 D S 2
6 3
D S
5 4
D G
PC235
D D
1
FDS6679AZ_SO8~D
2
PR253
330K_0402_5%~D PR279
1 2 STSTART_DCBLOCK_GC
2
0_0402_5%~D
PD20
2
1
PR265 3
330K_0402_5%~D
PDS5100H-13_POWERDI5-3~D
PBATT+ 1 2
PQ49 PQ50 PQ51
SI4835DDY-T1-E3_SO8~D FDS6679AZ_SO8~D 8 1
D S
8 1 1 S D 8 PBATT_IN_SS
7 D S 2
+VCHGR 7 2 2 S D 7 6 D S 3 +PWR_SRC
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
6 3 3 S
C D 6 5 D G 4
C
5 4 G D 5 FDS6679AZ_SO8~D
1
PC236
PC237
4
1
1K_1206_5%~D
PR277
PR252
0_0402_5%~D PR278
2
1 2 1 2
1U_0603_25V6-K~D
0_0402_5%~D
1U_0603_25V6-K~D
1
PC321
PC320
2
2
2
+DOCK_PWR_BAR
PR315
0_0402_5%~D
DSCHRG_MOSFET_GC
+DC_IN_SS
2
1
PR280
51 +CHGR_DC_IN
0_0402_5%~D
+DC_IN 1 2 CD3301_DCIN
1
PR262 47_0805_5%~D
1
PC323
0.1U_0603_50V4Z~D
2
P50ALW +5V_ALW
34
28
32
30
29
36
31
35
33
1 2
PU18 PR271 0_0402_5%~D
44 SOFT_START_GC
1 2
'W/K/ŶƉƵƚĨƌŽŵE
PBatt+
DC_IN_SS
BLK_MOSFET_GC
GND
DSCHRG_MOSFET_GC
NC
NC
CHARGERVR_DCIN
DK_PWRBAR
B +3.3V_ALW2 B
CD_PBATT_OFF 1 2 PBATT_OFF 39
PR409 100K_0402_5%~D PR272 0_0402_5%~D
38 ACAV_DOCK_SRC# 1 2 ACAVDK_SRC
1 2
ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ
DOCK_AC_OFF 38,39
PR261 0_0402_5%~D 1 27 PR273 0_0402_5%~D
DC_IN P50ALW
2 26
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25 1 2
ERC1 DK_AC_OFF_EN
PR263 0_0402_5%~D 4
ACAVDK_SRC ACAV_IN_NB
24 1 2 3301_ACAV_IN_NB ACAV_IN_NB 39,40,51
5 23 PR276 0_0402_5%~D 1M_0402_5%~D
CD3301_SDC_IN GND GND DK_AC_OFF_EN PR431
6 22 1 2 DOCK_AC_OFF_EC 39
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# PR275 0_0402_5%~D
7 21
51 DC_BLOCK_GC ACAVIN 8 DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
20
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR
23,40,51 ACAV_IN 1 2
SS_DCBLK_GC
PR264 0_0402_5%~D
DK_CSS_GC
1 2 1 2 SLICE_BAT_PRES# 38,39,44
PWR_SRC
PR430 0_0402_5%~D PR274 0_0402_5%~D

CSS_GC
P33ALW
@ PD21 37
TP
ERC3
ERC2
2 1 1 2
GND
+3.3V_ALW2 +NBDOCK_DC_IN_SS
PR270 0_0402_5%~D
RB751S40T1_SOD523-2~D
CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
1
0.1U_0603_25V7K~D
@ PR427 51 CSS_GC P33ALW 1 2

ERC2
51 DK_CSS_GC +3.3V_ALW
180_0402_1%~D PR269 0_0402_5%~D
1
PC238
ERC3
2
0.047U_0603_25V7K~D
EN_DK_PWRBAR 1 2
2
EN_DOCK_PWR_BAR 39
0.1U_0402_25V4Z~D
PR268 0_0402_5%~D
1 2
PC239
1
PC319
A STSTART_DCBLOCK_GC 1M_0402_5%~D A
@ PR429
2
@ 3301_PWRSRC 1 2 +PWR_SRC
PR267 0_0402_5%~D
Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
5 4 3 2 1
5 4 3 2 1
U106A
+3.3V_RUN
PEG_CTX_GRX_P0 AP17 Part 1 of 7 K1 GPU_VID_1
PEG_CTX_GRX_P[0..15] PEG_CTX_GRX_N0 PEX_RX0 GPIO0 DPB_GPU_HPD
7 PEG_CTX_GRX_P[0..15] AN17 PEX_RX0_N GPIO1 K2 DPB_GPU_HPD 26
PEG_CTX_GRX_P1 AN19 K3 BIA_PWM_GPU BIA_PWM_GPU 24
PEG_CTX_GRX_N[0..15] PEG_CTX_GRX_N1 PEX_RX1 GPIO2 ENVDD_GPU
7 PEG_CTX_GRX_N[0..15] AP19 PEX_RX1_N GPIO3 H3 ENVDD_GPU 24,39
10K_0402_5%~D10K_0402_5%~D
PEG_CTX_GRX_P2 AR19 H2 PANEL_BKEN_DGPU
PEX_RX2 GPIO4 PANEL_BKEN_DGPU 39
1
PEG_CRX_GTX_P[0..15] PEG_CTX_GRX_N2 AR20 H1 GPU_VID_2
7 PEG_CRX_GTX_P[0..15] PEG_CTX_GRX_P3 PEX_RX2_N GPIO5 GPU_VID_3
AP20 H4
R1354
PEG_CRX_GTX_N[0..15] PEG_CTX_GRX_N3 PEX_RX3 GPIO6 GPU_VID_4
7 PEG_CRX_GTX_N[0..15] AN20 PEX_RX3_N GPIO7 H5
PEG_CTX_GRX_P4 AN22 H6 THERMTRIP_VGA# THERMTRIP_VGA# 23
PEG_CTX_GRX_N4 PEX_RX4 GPIO8
AP22 J7
2
PEG_CTX_GRX_P5 PEX_RX4_N GPIO9 GPU_VID_3
AR22 K4 GPU_VID_3 62
PEG_CTX_GRX_N5 PEX_RX5 GPIO10
AR23 K5
PEX_RX5_N GPIO11
10K_0402_5%~D 10K_0402_5%~D
PEG_CTX_GRX_P6 AP23 H7 GPU_CLKDWN
GPIO
PEX_RX6 GPIO12 GPU_CLKDWN 39
1
D PEG_CRX_GTX_P0 C1439 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P0 PEG_CTX_GRX_N6 D
R1355
2 1 AN23
PEX_RX6_N GPIO13
J4
PEG_CRX_GTX_N0 C1440 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N0 PEG_CTX_GRX_P7 AN25 J6
R1357
PEG_CTX_GRX_N7 PEX_RX7 GPIO14 DPC_GPU_DOCK_HPD
AP25 L1 DPC_GPU_DOCK_HPD 38
PEG_CRX_GTX_P1 C1441 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P1 PEG_CTX_GRX_P8 PEX_RX7_N GPIO15 @
2 1 AR25 L2
2
PEG_CRX_GTX_N1 C1442 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N1 PEG_CTX_GRX_N8 PEX_RX8 GPIO16 7@
2 1 AR26 L4
2
PEG_CTX_GRX_P9 PEX_RX8_N GPIO17
AP26 M4
PEG_CRX_GTX_P2 C1443 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P2 PEG_CTX_GRX_N9 PEX_RX9 GPIO18 DPD_GPU_EDP_HPD GPU_VID_2
2 1 AN26 L7 DPD_GPU_EDP_HPD 24 GPU_VID_2 62
PEG_CRX_GTX_N2 C1444 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N2 PEG_CTX_GRX_P10 PEX_RX9_N GPIO19
2 1 AN28 L5
PEX_RX10 GPIO20
1
PEG_CTX_GRX_N10 AP28 K6 +3.3V_RUN
PEG_CRX_GTX_P3 C1446 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P3 PEG_CTX_GRX_P11 PEX_RX10_N GPIO21
R1360
2 1 AR28 L6
PEX_RX11 GPIO22
10K_0402_5%~D
PEG_CRX_GTX_N3 C1447 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N3 PEG_CTX_GRX_N11 AR29 M6
PEX_RX11_N GPIO23
1
PEG_CTX_GRX_P12 AP29 +3.3V_RUN
PEG_CRX_GTX_P4 C1448 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P4 PEG_CTX_GRX_N12 PEX_RX12 8@
2 1 AN29
R1374
2
PEG_CRX_GTX_N4 C1449 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N4 PEG_CTX_GRX_P13 PEX_RX12_N
2 1 AN31 N1
PEX_RX13 MIOA_D0
10K_0402_5%~D
PEG_CTX_GRX_N13 AP31 P4
PEX_RX13_N MIOA_D1
1
PEG_CRX_GTX_P5 C1450 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P5 PEG_CTX_GRX_P14 AR31 P1 7@
2
PEX_RX14 MIOA_D2
PEG_CRX_GTX_N5 C1451 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N5 PEG_CTX_GRX_N14 AR32 P2 BIA_PWM_GPU 1 2
R1375
PEX_RX14_N MIOA_D3 GPU_VID_1 62
PEG_CTX_GRX_P15 AR34 P3 R1353 10K_0402_5%~D
PEX_RX15 MIOA_D4
10K_0402_5%~D
PEG_CRX_GTX_P6 C1452 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P6 PEG_CTX_GRX_N15 AP34 T3 ENVDD_GPU 1 2
PEX_RX15_N MIOA_D5
1
PEG_CRX_GTX_N6 C1453 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N6 @ D R1327 10K_0402_5%~D
2 1 T2
10K_0402_5%~D 2
MIOA_D6
Q4
R1361
T1 62 GPU_VID_4 2
MIOA_D7
PCI EXPRESS
PEG_CRX_GTX_P7 C1454 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P7 PEG_CRX_GTX_C_P0 AL17 U4 G @
PEG_CRX_GTX_N7 C1455 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N7 PEG_CRX_GTX_C_N0 PEX_TX0 MIOA_D8
2 1 AM17 U1 S
3
PEX_TX0_N MIOA_D9
1
PEG_CRX_GTX_C_P1 AM18 U2 8@
2
PEG_CRX_GTX_P8 C1457 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P8 PEG_CRX_GTX_C_N1 PEX_TX1 MIOA_D10
2 1
R1379
AM19 U3
PEG_CRX_GTX_N8 C1458 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N8 PEG_CRX_GTX_C_P2 AL19
PEX_TX1_N
PEX_TX2
MIOA_D11
MIOA_D12 R6 Close to U106
PEG_CRX_GTX_C_N2 AK19 T6 L96
DVO
PEG_CRX_GTX_P9 C1459 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P9 PEG_CRX_GTX_C_P3 PEX_TX2_N MIOA_D13 100NH_LLQ1608-FR10G_2%~D
2 1 AL20 N6 150mA , 10mil
2
PEG_CRX_GTX_N9 C1460 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N9 PEG_CRX_GTX_C_N3 PEX_TX3 MIOA_D14 +SP_PLLVDD
2 1 AM20 PEX_TX3_N 2 1
PEG_CRX_GTX_C_P4 AM21 Y1 +1.05V_RUN_VTT_GFX
PEG_CRX_GTX_P10 C1461 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P10 PEG_CRX_GTX_C_N4 PEX_TX4 MIOB_D0
2 1 AM22 PEX_TX4_N MIOB_D1 Y2 1 1
1U_0402_6.3V6K~D
PEG_CRX_GTX_N10 C1462 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N10 PEG_CRX_GTX_C_P5 AL22 Y3 1
PEX_TX5 MIOB_D2
C1858
C PEG_CRX_GTX_C_N5 C1859 C1860 C
AK22 PEX_TX5_N MIOB_D3 AB3
PEG_CRX_GTX_P11 C1463 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P11 PEG_CRX_GTX_C_P6 AL23 AB2 4.7U_0603_6.3V6K~D 1U_0402_6.3V6K~D
PEG_CRX_GTX_N11 C1464 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N11 PEG_CRX_GTX_C_N6 PEX_TX6 MIOB_D4 2 2
2 1 AM23 PEX_TX6_N MIOB_D5 AB1
PEG_CRX_GTX_C_P7 2
AM24 PEX_TX7 MIOB_D6 AC4
PEG_CRX_GTX_P12 C1465 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P12 PEG_CRX_GTX_C_N7 AM25 AC1
PEG_CRX_GTX_N12 C1466 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N12 PEG_CRX_GTX_C_P8 PEX_TX7_N MIOB_D7
2 1 AL25 PEX_TX8 MIOB_D8 AC2
PEG_CRX_GTX_C_N8 AK25 AC3
PEG_CRX_GTX_P13 C1468 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P13 PEG_CRX_GTX_C_P9 PEX_TX8_N MIOB_D9
2 1 AL26 AE3
PEG_CRX_GTX_N13 C1469 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N13 PEG_CRX_GTX_C_N9 PEX_TX9 MIOBD_10
2 1 AM26 AE2
PEG_CRX_GTX_C_P10 PEX_TX9_N MIOB_D11
AM27 U6
PEG_CRX_GTX_P14 C1470 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P14 PEG_CRX_GTX_C_N10 PEX_TX10 MIOB_D12
2 1 AM28 W6
PEG_CRX_GTX_N14 C1471 2 1 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N14 PEG_CRX_GTX_C_P11 AL28
PEX_TX10_N
PEX_TX11
MIOB_D13
MIOB_D14
Y6 Close to U106 Close to Pin
PEG_CRX_GTX_C_N11 AK28 L90 150mA , 10mil
PEG_CRX_GTX_P15 C1472 0.1U_0402_10V7K~D PEG_CRX_GTX_C_P15 PEG_CRX_GTX_C_P12 PEX_TX11_N 100NH_LLQ1608-FR10G_2%~D
2 1 AK29 N3
PEG_CRX_GTX_N15 C1473 0.1U_0402_10V7K~D PEG_CRX_GTX_C_N15 PEG_CRX_GTX_C_N12 PEX_TX12 MIOA_HSYNC +PLLVDD
2 1 AL29 L3 +1.05V_RUN_VTT_GFX 2 1
PEX_TX12_N MIOA_VSYNC
1U_0402_6.3V6K~D
PEG_CRX_GTX_C_P13 AM29
PEG_CRX_GTX_C_N13 PEX_TX13
AM30 W1 1 1 1 1 1
PEX_TX13_N MIOB_HSYNC
C1735
PEG_CRX_GTX_C_P14 AM31 W2 C1710 C1711 C1712 C1713
PEG_CRX_GTX_C_N14 PEX_TX14 MIOB_VSYNC 1U_0402_6.3V6K~D
AM32
PEG_CRX_GTX_C_P15 PEX_TX14_N 4.7U_0603_6.3V6K~D 0.1U_0402_10V7K~D
AN32 N2
PEG_CRX_GTX_C_N15 PEX_TX15 MIOA_DE 2 2 2 2 2
AP32 P5
PEX_TX15_N MIOA_CTL3
N5
MIOA_VREF 0.1U_0402_10V7K~D
Y5
CLK_PCIE_VGA MIOB_DE
AR16 W3
+3.3V_RUN Differential signal 16 CLK_PCIE_VGA
16 CLK_PCIE_VGA#
CLK_PCIE_VGA# AR17
PEX_REFCLK MIOB_CTL3
AF1
CLK_REQ# PEX_REFCLK_N MIOB_VREF R1412
+3.3V_RUN 1 2 AR13
R9 10K_0402_5%~D PEX_CLKREQ_N 330R 100MHZ
N4 1 2
PEX_TSTCLK_OUT MIOA_CLKIN 10K_0402_5%~D BLM18PG331SN1D_2P~D
1 2 AJ17 R4
1 2 GPU_CRT_CLK_DDC
16 CLK_REQ#
@ R1345 200_0402_1%~D PEX_TSTCLK_OUT# AJ18
PEX_TSTCLK_OUT MIOA_CLKOUT +DACA_VDD 120mA 2 1 +3.3V_RUN
R1455 4.7K_0402_5%~D PEX_TSTCLK_OUT_N
MIOB_CLKIN
AE1 1 R1414 2 L92
4700P_0402_25V7K~D
470P_0402_50V7K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 2 GPU_CRT_DAT_DDC V4 10K_0402_5%~D 1 1 1 1 1 1 1 1
MIOB_CLKOUT
C1769
C1869
C1868
C1717
B R1454 4.7K_0402_5%~D PLTRST_GPU#_R B
18 PLTRST_GPU# 1 2 AM16
PEX_RST_N
C1716
C1867
C1718
1 2 HDCP_DAT R1346 0_0402_5%~D AG21 T4 C1719
R1359 2.2K_0402_5%~D PEX_TERMP MIOA_CLKOUT_N 4.7U_0603_6.3V6K~D
1 2 W4
R1351 2.49K_0402_1%~D MIOB_CLKOUT_N 2 2 2 2 2 2 2 2
U5
I2CB_SCL +PLLVDD MIOACAL_PD_VDDQ
2 1 AE9 T5
R1363 2.2K_0402_5%~D PLLVDD MIOACAL_PU_GND
2 1 I2CB_SDA +SP_PLLVDD AF9 AA7
R1364 2.2K_0402_5%~D SP_PLLVDD MIOBCAL_PD_VDDQ
AA6
I2CC_SCL MIOBCAL_PU_GND
2 1 AD9
R1365 2.2K_0402_5%~D @ R617 0_0402_5%~D VID_PLLVDD
CLK
2 1 I2CC_SDA 6 CLK_NV_27M 1 2 CLK_27M_IN B1

R1373 2.2K_0402_5%~D NV_CLK_27M_OUT XTAL_IN GPU_CRT_RED
1 2 B2 AM15 GPU_CRT_RED 27
R1522 0_0402_5%~D XTAL_OUT DACA_RED GPU_CRT_GRN
AM14 GPU_CRT_GRN 27
R1416 1 DACA_GREEN GPU_CRT_BLU
2 10K_0402_5%~D D1
XTAL_OUTBUFF DACA_BLUE
AL14 GPU_CRT_BLU 27
1 2 D2 +3.3V_RUN
6 CLK_NVSS_27M XTAL_SSIN
@ R1317 0_0402_5%~D AM13 GPU_CRT_HSYNC
DACA_HSYNC GPU_CRT_VSYNC GPU_CRT_HSYNC 27
1 2 AL13 GPU_CRT_VSYNC 27
R1417 10K_0402_5%~D DACA_VSYNC
DAI_GPU_R3P_SMBCLK E2 AJ12 +DACA_VDD DAI_GPU_R3P_SMBCLK @R1336
@ R1336 1 2 2.2K_0402_5%~D
23,29,40 DAI_GPU_R3P_SMBCLK I2CS_SCL DACA_VDD
DAI_GPU_R3P_SMBDAT E1 AK12 +DACA_VREF
+3.3V_RUN 23,29,40 DAI_GPU_R3P_SMBDAT I2CS_SDA DACA_VREF DAI_GPU_R3P_SMBDAT
AK13 @R1337
@ R1337 1 2 2.2K_0402_5%~D
DACs
I2CC_SCL DACA_RSET
E3
I2CC_SCL
I2CC_SDA E4
I2CC_SDA DACB_RED
AK4 1 2
1
AL4 R1325
R1328 I2CB_SCL DACB_GREEN 124_0402_1%~D C1456
G3 AJ4
2.2K_0402_5%~D I2CB_SDA I2CB_SCL DACB_BLUE Close to GPU
I2C
G2 0.1U_0402_10V7K~D
I2CB_SDA 1
AM1
2
GPU_CRT_CLK_DDC R1418 1 DACB_HSYNC GPU_CRT_RED

2 33_0402_5%~D G1 AM2 1 2
CRT 27 GPU_CRT_CLK_DDC
2
HDCP_CLK GPU_CRT_DAT_DDC R1419 1 I2CA_SCL DACB_VSYNC

27 GPU_CRT_DAT_DDC 2 33_0402_5%~D G4
I2CA_SDA
R1367 150_0402_1%~D
AG7 +DACB_VDD 1 2 GPU_CRT_GRN 1 2
DACB_VDD
1
HDCP_CLK F6 AK6 R1420 10K_0402_5%~D R1368 150_0402_1%~D

A @ R1329 HDCP_DAT I2CH_SCL DACB_VREF GPU_CRT_BLU A
G6 I2CH_SDA DACB_RSET AH7 1 2
10K_0402_5%~D R1369 150_0402_1%~D
Y7
CLK_27M_IN 1 3 NV_CLK_27M_OUT
2
2 G1 N10P-GLM-A3_BGA969~D
G2 4
Stuff R1328 for 27MHZ_10PF_X3S027000BA1H-U~D
standard I2C ROM.
1 1
Stuff R1329 for C1891 C1890 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
crypto ROM 10P_0402_50V8J~D 10P_0402_50V8J~D TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, N10P PCIE,GPIO,CLK,I2C
2 2 NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
LA-5573P
5 4 3 2 1
5 4 3 2 1
U106D
Part 4 of 7
AM11 IFPA_TXC NC_0 A2
AM12 IFPA_TXC_N NC_1 A7
AM8 IFPA_TXD0 NC_2 B7
1 2 DPB_GPU_AUX/DDC AL8 C5
R646 100K_0402_5%~D IFPA_TXD0_N NC_3
AM10 IFPA_TXD1 NC_4 C7
1 2 DPB_GPU_AUX#/DDC AM9 D5
R647 100K_0402_5%~D IFPA_TXD1_N NC_5
AK10 IFPA_TXD2 NC_6 D6
1 2 DPD_GPU_EDP_AUX AL10 D7
R648 100K_0402_5%~D IFPA_TXD2_N NC_7
AK11 IFPA_TXD3 NC_8 E5
1 2 DPD_GPU_EDP_AUX# AL11 E7
D
R652 100K_0402_5%~D IFPA_TXD3_N NC_9 D
NC_10 F4
1 2 DPC_GPU_AUX/DDC G5
R653 100K_0402_5%~D NC_11
AP13 IFPB_TXC NC_12 G11
1 2 DPC_GPU_AUX#/DDC AN13 G12
R656 100K_0402_5%~D IFPB_TXC_N NC_13
STRAP0 USER[3:0] AN8 IFPB_TXD4 NC_14 G14
AP8 IFPB_TXD4_N NC_15 G15
AP10 IFPB_TXD5 NC_16 G27
STRAP1 3GIO_PADCFG_LUT_ADR[3:0] AN10 IFPB_TXD5_N NC_17 G28
AR11 IFPB_TXD6 NC_18 G24
AR10 IFPB_TXD6_N NC_19 G25
STRAP2 PCI_DEVID[3:0] AN11 IFPB_TXD7 NC_20 H32
AP11 IFPB_TXD7_N NC_21 J18
NC_22 J19
NC
NC_23 J25
ROM_SCLK PCIDEVID_EXT, SUB_VENDOR, SLOT_CLK, PEX_PLL_EN 26 DPB_GPU_LANE_P0
AM7 IFPC_L0 NC_24 J26
26 DPB_GPU_LANE_N0 AM6 IFPC_L0_N NC_25 L29
26 DPB_GPU_LANE_P1 AL5 IFPC_L1 NC_26 M7
ROM_SI RAM_CFG[3:0] 26 DPB_GPU_LANE_N1
AM5 IFPC_L1_N NC_27 M29
26 DPB_GPU_LANE_P2
AM3 IFPC_L2 NC_28 P6
26 DPB_GPU_LANE_N2
AM4 IFPC_L2_N NC_29 P29
ROM_SO XCLK_417, FB_0_BAR_SIZE, ALT_ADOOR, VGA_DEVICE 26 DPB_GPU_LANE_P3 AP1 IFPC_L3 NC_30 R29
26 DPB_GPU_LANE_N3 AR2 IFPC_L3_N NC_31 U7
NC_32 V6
NC_33 Y4
24 DPD_GPU_LANE_P0
AR8 IFPD_L0 NC_34 AA4
24 DPD_GPU_LANE_N0 AR7 IFPD_L0_N NC_35 AB4
24 DPD_GPU_LANE_P1 AP7 IFPD_L1 NC_36 AB7
24 DPD_GPU_LANE_N1
AN7 IFPD_L1_N NC_37 AC5
LVDS/TMDS
AN5 IFPD_L2 NC_38 AD6
C
IFPD for eDP & DP only AP5 IFPD_L2_N NC_39 AD29 C
AR5 IFPD_L3 NC_40 AE29
AR4 IFPD_L3_N NC_41 AF6
R1332 R1341 R1342 R1333 NC_42 AG6
NC_43 AG20
Asics 10K depop 15K depop N10P-GS 38 DPC_GPU_LANE_P0
AH6 IFPE_L0 NC_44 AG29
38 DPC_GPU_LANE_N0 AH5 IFPE_L0_N NC_45 AH29
38 DPC_GPU_LANE_P1 AH4 IFPE_L1 NC_46 AJ5
Margaux 38 DPC_GPU_LANE_N1
AG4 IFPE_L1_N NC_47 AK15
38 DPC_GPU_LANE_P2
AF4 IFPE_L2 NC_48 AL7
38 DPC_GPU_LANE_N2
AF5 IFPE_L2_N
38 DPC_GPU_LANE_P3 AE6 IFPE_L3
38 DPC_GPU_LANE_N3 AE5 IFPE_L3_N
D35 +3.3V_RUN
VDD_SENSE_0 GPU_VDD_SENSE 62
AL2 IFPF_L0 VDD_SENSE_1 P7
Resistor Values PU/PD Bit3-Bit0 AL3 IFPF_L0_N VDD_SENSE_2 AD20
AJ3 IFPF_L1
STRAP0 PU 1111 45K AJ2 IFPF_L1_N
1
AJ1 @ R1421
IFPF_L2
STRAP1 PD 0110 35K AH1 IFPF_L2_N GND_SENSE_0 AD19 GPU_VSS_SENSE 62 10K_0402_5%~D
AH2 IFPF_L3 GND_SENSE_1 E35
STRAP2 PU 1100 25K AH3 IFPF_L3_N GND_SENSE_2 R7
2
ROM_SCLK PD 0010 15K GPU_TESTMODE
ROM_SI PD 0011 20K 26 DPB_GPU_AUX/DDC AP2 IFPC_AUX_I2CW _SCL
1
AN3 R1338
ROM_SO PD 0001 10K
26 DPB_GPU_AUX#/DDC IFPC_AUX_I2CW _SDA_N TEST 10K_0402_5%~D
B B
AP4 AP35 GPU_TESTMODE
24 DPD_GPU_EDP_AUX IFPD_AUX_I2CX_SCL TESTMODE
For Samsung 64Mx16 DDR3 part stuff R1343=20K AN4 AP14 TV2
2
24 DPD_GPU_EDP_AUX# IFPD_AUX_I2CX_SDA_N JTAG_TCK
For Hynix 64Mx16 DDR3 part stuff R1343=15K AN14 TV3
JTAG_TDI
JTAG_TDO AN16 TV4
Hynix H5TQ1G63BFR-12C SA00003240L AE4 AR14 TV5
25 DPC_GPU_AUX/DDC IFPE_AUX_I2CY_SCL JTAG_TMS
25 DPC_GPU_AUX#/DDC
AD4 IFPE_AUX_I2CY_SDA_N JTAG_TRST_N AP16 1 2
R1372 1K_0402_1%~D
1 2 AF3 IFPF_AUX_I2CZ_SCL
R1423 1 2 1K_0402_1%~D AF2
R1424 1K_0402_1%~D IFPF_AUX_I2CZ_SDA_N SERIAL
+3.3V_RUN C3
ROM_CS_N ROM_SI_GPU
ROM_SI D3
C4 ROM_SO_GPU
ROM_SO ROM_SCLK_GPU
D4
45.3K_0402_1%~D
4.99K_0402_1%~D
4.99K_0402_1%~D
ROM_SCLK
15K_0402_1%~D
R1366
34.8K_0402_1%~D
24.9K_0402_1%~D
2
SPDIF_OUT_GPU 1 2
2
R1330
R1334
R1335
R1331
R1333
GENERAL A5 SPDIF_OUT_GPU 36K_0402_5%~D

R1332
NC/SPDIF
A4 BUFRST_N
1@ @ @ N9 1 2
1
MULTI_STRAP_REF0_GND R1370 40.2K_0402_1%~D

+3.3V_RUN 1 2 AB5
1
@ R1426 100K_0402_5%~D CEC

MULTI_STRAP_REF1_GND M9 1 2
STRAP0 W5 R1371 40.2K_0402_1%~D
STRAP1 STRAP0
W7 STRAP1 THERMDP B5 VGA_THERMDP 23
STRAP2 V7 B4 1
ROM_SCLK_GPU STRAP2 THERMDN
ROM_SI_GPU @ C1467
ROM_SO_GPU 100P_0402_50V8K~D
A 2 A
VGA_THERMDN 23
N10P-GLM-A3_BGA969~D
4.99K_0402_1%~D
4.99K_0402_1%~D
Hynix H5TQ1G63BFR-12C SA00003240L

15K_0402_1%~D
15K_0402_1%~D
10K_0402_1%~D
34.8K_0402_1%~D
2
2
R1339
R1341
R1340
R1342
R1343
R1344
For Samsung 64Mx16 DDR3 part stuff R1343=20K

For Hynix 64Mx16 DDR3 part stuff R1343=15K
@ @ @ 2@ Compal Electronics, Inc.
1
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, N10P DP, STRAP
LA-5573P
5 4 3 2 1
5 4 3 2 1
U106F
B3 Part 6 of 7 +GPU_CORE +GPU_CORE

GND_0 U106G
B6 GND_1 GND_97 V18
B9 V20
B12
GND_2 GND_98
V22 AB11 P21 +1.5V_MEM_GFX Source
GND_3 GND_99 VDD_0 Part 7 of 7 VDD_56
B15 GND_4 GND_100 V24 AB13 VDD_1 VDD_57 P23
B21 V31 AB15 P25 +3.3V_ALW2 +15V_ALW +1.5V_MEM Q58
GND_5 GND_101 VDD_2 VDD_58 SI4164DY-T1-GE3_SO8~D +1.5V_MEM_GFX
B24 GND_6 GND_102 Y11 AB17 VDD_3 VDD_59 R11
B27 GND_7 GND_103 Y13 AB19 VDD_4 VDD_60 R12 8 1
1
B30 GND_8 GND_104 Y15 AB21 VDD_5 VDD_61 R13 7 2
10U_0805_10V4Z~D
D B33 Y17 AB23 R14 R642 6 3 D
GND_9 GND_105 VDD_6 VDD_62
1
C2 Y19 AB25 R15 100K_0402_5%~D 5 1
GND_10 GND_106 VDD_7 VDD_63 R643 R641
C34 GND_11 GND_107 Y21 AC11 VDD_8 VDD_64 R16
C714
E6 Y23 AC12 R17 100K_0402_5%~D 20K_0402_5%~D
4
GND_12 GND_108 VDD_9 VDD_65 GFX_MEM_VTT_EN
E9 GND_13 GND_109 Y25 AC13 VDD_10 VDD_66 R18
2
E12 AA2 AC14 R19
2
3
E15 GND_15 GND_111 AA5 AC15 VDD_12 VDD_68 R20
2200P_0402_50V7K~D
E18 AA11 AC16 R21 Q197B
GND_16 GND_112 VDD_13 VDD_69 DMN66D0LDW-7_SOT363-6~D
E27 AA13 AC18 R23 GFX_MEM_VTT_ON#5 1
C715
F2 AA15 AC20 R25
4
F31 GND_21 GND_117 AA16 AC21 VDD_18 VDD_74 T12
6
F34 AA17 AC22 T14 2
GND_22 GND_118 VDD_19 VDD_75 Q197A
F5 GND_23 GND_119 AA18 AC23 VDD_20 VDD_76 T16
POWER
J2 AA19 AC24 T18 DMN66D0LDW-7_SOT363-6~D
J5 GND_25 GND_121 AA20 AC25 VDD_22 VDD_78 T20 39 GFX_MEM_VTT_ON 2
J31 GND_26 GND_122 AA21 AD12 VDD_23 VDD_79 T22
J34 AA22 AD14 T24
1
K9 GND_28 GND_124 AA23 AD16 VDD_25 VDD_81 V11
L9 GND_29 GND_125 AA24 AD18 VDD_26 VDD_82 V13
M2 GND_30 GND_126 AA25 AD22 VDD_27 VDD_83 V15
M5 GND_31 GND_127 AA34 AD24 VDD_28 VDD_84 V17
M11 AB12 L11 V19
M13
GND_32 GND_128
AB14 L12
VDD_29 VDD_85
V21 +1.05V_RUN_VTT_GFX Source
M15 GND_34 GND_130 AB16 L13 VDD_31 VDD_87 V23
M17 AB18 L14 V25 +15V_ALW +1.05V_M Q59
GND_35 GND_131 VDD_32 VDD_88 SI4164DY-T1-GE3_SO8~D +1.05V_RUN_VTT_GFX
C M19 GND_36 GND_132 AB20 L15 VDD_33 VDD_89 W11 C
M21 GND_37 GND_133 AB22 L16 VDD_34 VDD_90 W12 8 1
1
M23 GND_38 GND_134 AB24 L17 VDD_35 VDD_91 W13 7 2
10U_0805_10V4Z~D
M25 AC9 L18 W14 R645 6 3
1
M31 AD2 L19 W15 100K_0402_5%~D 5 1
GND_40 GND_136 VDD_37 VDD_93 R644
M34 GND_41 GND_137 AD5 L20 VDD_38 VDD_94 W16
C717
20K_0402_5%~D
GND
N11 AD11 L21 W17
4
GND_42 GND_138 VDD_39 VDD_95 1.05V_RUN_VTT_GFX#_EN
N12 GND_43 GND_139 AD13 L22 VDD_40 VDD_96 W18
2
N13 AD15 L23 W19
2
1
D
N14 GND_45 GND_141 AD17 L24 VDD_42 VDD_98 W20
2200P_0402_50V7K~D
N15 AD21 L25 W21 2 Q198
GND_46 GND_142 VDD_43 VDD_99 G SSM3K7002FU_SC70-3~D
N16 GND_47 GND_143 AD23 M12 VDD_44 VDD_100 W22
N17 AD25 M14 W23 S 1
3
C716
N20 GND_51 GND_147 AE11 M20 VDD_48 VDD_104 Y12
2
N23 GND_54 GND_150 AE14 P11 VDD_51 VDD_107 Y18
P12 GND_57 GND_153 AE17 P17 VDD_54 VDD_110 Y24
P14 GND_58 GND_154 AE18 P19 VDD_55
P16 GND_59 GND_155 AE19
P18 AE20 +GPU_CORE
GND_60 GND_156
P20 GND_61 GND_157 AE21
P22 AE22 0.047U_0402_10V7K~D 0.022U_0402_25V7K~D NV DG for VDD Cap:
GND_62 GND_158
B P24 GND_63 GND_159 AE23 4700pF 10% X7R x2 B
R2 AE24 N10P-GLM-A3_BGA969~D
GND_64 GND_160 0.01uF 10% X7R x6
R5 GND_65 GND_161 AE25 1 1 1 1 1 1
R31 GND_66 GND_162 AG2 C1729 C1730 C1731 C1732 C1733 C1734 0.022uF 10% X7R x4
R34 AG5 0.047U_0402_10V7K~D 0.047uF 10% X7R x3
GND_67 GND_163
T11 AG31
T13
GND_68 GND_164
AG34
2 2 2 2 2 2 0.22uF 10% X7R x2
GND_69 GND_165 1uF 10% X5R x1
T15 AK2
T17
T19
GND_70
GND_71
GND_166
GND_167 AK5
AK14
Close to U106 0.047U_0402_10V7K~D 0.022U_0402_25V7K~D 0.022U_0402_25V7K~D
4.7uF 10% X5R x1
GND_72 GND_168
T21 AK31
T23
T25
GND_73
GND_74
GND_169
GND_170 AK34
AL6
+GPU_CORE Close to Pin
GND_75 GND_171 4.7U_0603_6.3V6K~D 0.22U_0603_10V7K~D
U11 GND_76 GND_172 AL9
U12 AL12 +GPU_CORE
GND_77 GND_173
U13 GND_78 GND_174 AL15
U14 AL18 2 2 1 1 1 1 1 1000P_0402_50V7K~D 1000P_0402_50V7K~D 1000P_0402_50V7K~D
GND_79 GND_175 C1722 C1723 C1724 C1725 C1726 C1727 C1728
U15 GND_80 GND_176 AL21
U16 AL24 0.022U_0402_25V7K~D
GND_81 GND_177 22U_0805_6.3V6M~D
U17 GND_82 GND_178 AL27
1 1 2 2 2 2 2 C1738 C1739 C1740 C1741 C1742 C1743 C1744
U18 GND_83 GND_179 AL30
U19 AN2 C1737
GND_84 GND_180 4700P_0402_25V7K~D 1000P_0402_50V7K~D
U20 GND_85 GND_181 AN34
U21 AP3 22U_0805_6.3V6M~D 1U_0402_6.3V6K~D 0.22U_0603_10V7K~D
GND_86 GND_182
U22 GND_87 GND_183 AP6
U23 GND_88 GND_184 AP9
U24 AP12 4700P_0402_25V7K~D 1000P_0402_50V7K~D 1000P_0402_50V7K~D
GND_89 GND_185
A U25 GND_90 GND_186 AP15 A
V2 GND_91 GND_187 AP18
V12 GND_94 GND_190 AP27
V14
V16
GND_95 GND_191 AP30
AP33
GND_96 GND_192 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, N10P GPU CORE, GND
N10P-GLM-A3_BGA969~D PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 3.0
LA-5573P
5 4 3 2 1
5 4 3 2 1
U106E
Close to Pin Close to U106
Part 5 of 7
+1.5V_MEM_GFX 0.01U_0402_25V7K~D 0.01U_0402_25V7K~D J23
2000mA AG11 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 10U_0805_6.3V6M~D +1.05V_RUN_VTT_GFX
FBVDDQ_0 PEX_IOVDDQ_0
J24 FBVDDQ_1 PEX_IOVDDQ_1 AG12
1 1 1 1 1 1 J29 FBVDDQ_2 PEX_IOVDDQ_2 AG13 1 1 1 1 1 1
AA27 FBVDDQ_3 PEX_IOVDDQ_3 AG15 1
C1747 C1762 C1748 C1745 C1746 C1749 AA29 AG16 C1750 C1751 C1752 C1753 C1754 C1755 C1114
4.7U_0603_6.3V6K~D 0.047U_0402_10V7K~D FBVDDQ_4 PEX_IOVDDQ_4
AA31 FBVDDQ_5 PEX_IOVDDQ_5 AG17
2 2 2 2 2 2 AB27 AG18 2 2 2 2 2 2 22U_0805_6.3V6M~D
FBVDDQ_6 PEX_IOVDDQ_6 2
AB29 FBVDDQ_7 PEX_IOVDDQ_7 AG22
0.01U_0402_25V7K~D 0.01U_0402_25V7K~D AC27 AG23 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 4.7U_0603_6.3V6K~D
D
AD27 FBVDDQ_9 PEX_IOVDDQ_9 AG24 D
AE27 FBVDDQ_10 PEX_IOVDDQ_10 AG25
AJ28 AG26 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 10U_0805_6.3V6M~D +1.05V_RUN_VTT_GFX
B18 FBVDDQ_12 PEX_IOVDDQ_12 AJ14
+1.5V_MEM_GFX 0.1U_0402_10V7K~D 0.047U_0402_10V7K~D E21 AJ15 1 1 1 1 1 1
G17 FBVDDQ_14 PEX_IOVDDQ_14 AJ19 1
G18 AJ21 C1756 C1757 C1758 C1759 C1760 C1761 C1113
1 1 1 1 1 1 FBVDDQ_15 PEX_IOVDDQ_15
G22 FBVDDQ_16 PEX_IOVDDQ_16 AJ22
C1768 C1763 C1764 C1765 C1766 C1767 G8 AJ24 2 2 2 2 2 2 22U_0805_6.3V6M~D
4.7U_0603_6.3V6K~D 0.047U_0402_10V7K~D FBVDDQ_17 PEX_IOVDDQ_17 2
G9 FBVDDQ_18 PEX_IOVDDQ_18 AJ25
2 2 2 2 2 2 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 4.7U_0603_6.3V6K~D
H29 FBVDDQ_19 PEX_IOVDDQ_19 AJ27
POWER
J14 FBVDDQ_20 PEX_IOVDDQ_20 AK18
0.1U_0402_10V7K~D 0.1U_0402_10V7K~D J15 AK20
J16 FBVDDQ_22 PEX_IOVDDQ_22 AK23
J17 AK26
J20
AL16 Close to Pin L79
Close to U106 Close to Pin J21

J22
FBVDDQ_24
FBVDDQ_25
PEX_IOVDDQ_24
0.1U_0402_10V7K~D 1U_0402_6.3V6K~D
10NH_LQW18AN10NJ00D_5%~D
2 1
FBVDDQ_26 +1.05V_RUN_VTT_GFX
N27 FBVDDQ_27 2000mA
P27 FBVDDQ_28 PEX_IOVDD_0 AK16 1 1 1 1 1
R27 AK17 C1514
FBVDDQ_29 PEX_IOVDD_1 @ C1511 @ C1512 C1770 C1513
T27 FBVDDQ_30 PEX_IOVDD_2 AK21
U27 AK24 4.7U_0603_6.3V6K~D
FBVDDQ_31 PEX_IOVDD_3 2 2 2 2 4.7U_0603_6.3V6K~D 2
U29 FBVDDQ_32 PEX_IOVDD_4 AK27
V27 FBVDDQ_33
V29 0.1U_0402_10V7K~D
V34
FBVDDQ_34 20 MIL
W 27
FBVDDQ_35 120mA AG14 +PEX_PLLVDD
FBVDDQ_36 PEX_PLLVDD
Y27 FBVDDQ_37 +3.3V_RUN
C C
1 2 +IFPAB_PLLVDD AK9 AG19
R1428 10K_0402_1%~D AJ11
IFPAB_PLLVDD PEX_SVDD_3V3_0
F7 Close to Pin
IFPAB_RSET PEX_SVDD_3V3_1 Close to Pin +3.3V_RUN
1
1 2 +IFPAB_IOVDD AG9 C1774

R1456 10K_0402_1%~D IFPA_IOVDD 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D
AG10 IFPB_IOVDD VDD33_0 J10
J11 2 0.1U_0402_10V7K~D
VDD33_1
VDD33_2 J12 1 1 1 1 1
+IFPCD_PLLVDD AJ9 J13
IFPC_PLLVDD VDD33_3 C1781 C1773 C1775 C1776 C1777
1 2 AK7 IFPC_RSET VDD33_4 J9
R1429 1K_0402_1%~D
+IFPCD_IOVDD AJ8 2 2 2 2 2 4.7U_0603_6.3V6K~D
IFPC_IOVDD
P9 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
+IFPCD_PLLVDD MIOA_VDDQ_0
AC6 IFPD_PLLVDD MIOA_VDDQ_1 R9
1 2 AB6 IFPD_RSET MIOA_VDDQ_2 T9
R1430 1K_0402_1%~D U9
+IFPCD_IOVDD MIOA_VDDQ_3
AK8 IFPD_IOVDD
MIOB_VDDQ_0 AA9
+IFPEF_PLLVDD AJ6 AB9 +3.3V_RUN
IFPEF_PLLVDD MIOB_VDDQ_1
1 2 AL1 IFPEF_RSET MIOB_VDDQ_2 W9
R1431 1K_0402_1%~D Y9
+IFPEF_IOVDD MIOB_VDDQ_3
AE7 IFPE_IOVDD 1 1
AD7 C1778 C1779
IFPF_IOVDD
0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
2 2
B B
+3.3V_RUN 220R 100MHZ 220mA

+3.3V_RUN 220R 100MHZ 220mA L87 BLM18PG221SN1D_2P~D
L83 BLM18PG221SN1D_2P~D 2 1 +IFPEF_PLLVDD
2 1 +IFPCD_PLLVDD
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
4.7U_0603_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
1 1 1 1 1 1
C1592
C1591
C1590
C1783
C1865
C1866
1 1 1 1 1 1 1
C1576
C1575
C1574
C1780
C1870
C1871
C1863
2 2 2 2 2 2
2 2 2 2 2 2 2
+1.05V_RUN_VTT_GFX
+1.05V_RUN_VTT_GFX 220R 100MHZ 285mA L88 BLM18PG221SN1D_2P~D 285mA
L84 BLM18PG221SN1D_2P~D 2 1 4.7U_0603_6.3V6K~D 0.1U_0402_10V7K~D +IFPEF_IOVDD
2 1 +IFPCD_IOVDD
1 1 1 1 1 1
1U_0402_6.3V6K~D
4.7U_0603_6.3V6K~D
1U_0402_6.3V6K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
0.1U_0402_10V7K~D
C1787 C1791
C1595 C1594 C1593 C1786
1 1 1 1 1 1
C1579
C1600
C1577
C1784
C1785
C1583
0.1U_0402_10V7K~D
2 4.7U_0603_6.3V6K~D 2 2 2 2 2
A A
2 2 2 2 2 2 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, N10P Power
LA-5573P
5 4 3 2 1
5 4 3 2 1
FBAD[0..63] FBCD[0..63]
+1.5V_MEM_GFX FBAD[0..63] 58,59 FBCD[0..63] 60,61
FBA_CMD[0..30] FBC_CMD[0..30]
1
FBA_CMD[0..30] 58,59
GPU CMD - Mirror Mode Mapping FBC_CMD[0..30] 60,61
1.1K_0402_1%~D1.1K_0402_1%~D
DQMA#[0..7] DQMC#[0..7]
DQMA#[0..7] 58,59 DQMC#[0..7] 60,61
@ DATA Bus
R1376
DQSA_RN[0..7] DQSC_RN[0..7]
DQSA_RN[0..7] 58,59 DQSC_RN[0..7] 60,61
12mil Address 0..31 32..63
DQSA_WP[0..7] DQSC_WP[0..7]
DQSA_WP[0..7] 58,59 DQSC_WP[0..7] 60,61
2
+FB_VREF CMD0 CKE_L

U106B
1
0.01U_0402_25V7K~D
D 1 @ CMD1 A8 A8 D
C1502
@ Part 2 of 7 V32 FBA_CMD0 U106C

FBA_CMD0
R1377
FBAD0 L32 W31 FBA_CMD1 CMD2 CS0#_L

FBAD1 FBA_D0 FBA_CMD1 FBA_CMD2 Part 3 of 7
N33 FBA_D1 FBA_CMD2 U31
2 FBAD2 FBA_CMD3 FBCD0 FBC_CMD0
L33 Y32 CMD3 A7 A6 B13 C17
2
FBAD3 FBA_D2 FBA_CMD3 FBA_CMD4 FBCD1 FBC_D0 FBC_CMD0 FBC_CMD1

N34 FBA_D3 FBA_CMD4 AB35 D13 FBC_D1 FBC_CMD1 B19
FBAD4 N35 AB34 FBA_CMD5 CMD4 A2 A1 FBC_CMD0 FBCD2 A13 D18 FBC_CMD2
P35 FBA_D5 FBA_CMD6 W35 A14 FBC_D3 FBC_CMD3 F21
1
FBAD6 P33 W33 FBA_CMD7 CMD5 A11 A9 FBCD4 C16 A23 FBC_CMD4
P34 FBA_D7 FBA_CMD8 W30 10K_0402_5%~D B16 FBC_D5 FBC_CMD5 D21
FBAD8 K35 T34 FBA_CMD9 CMD6 A5 A4 FBCD6 A17 B23 FBC_CMD6
FBA_CMD0 FBAD9 FBA_D8 FBA_CMD9 FBA_CMD10 1@ R1381 FBCD7 FBC_D6 FBC_CMD6 FBC_CMD7
K33 FBA_D9 FBA_CMD10 T35 D16 FBC_D7 FBC_CMD7 E20
FBAD10 K34 AB31 FBA_CMD11 CMD7 A0 A12 FBCD8 C13 G21 FBC_CMD8
2
FBA_D10 FBA_CMD11 FBC_D8 FBC_CMD8
1
FBAD11 H33 Y30 FBA_CMD12 FBCD9 B11 F20 FBC_CMD9

10K_0402_5%~D G34 FBA_D12 FBA_CMD13 Y34 CMD8 CAS# CAS# C11 FBC_D10 FBC_CMD10 F19
FBAD13 G33 W32 FBA_CMD14 FBCD11 A11 F23 FBC_CMD11
R1380 FBAD14 FBA_D13 FBA_CMD14 FBA_CMD15 FBCD12 FBC_D11 FBC_CMD11 FBC_CMD12
E34 FBA_D14 FBA_CMD15 AA30 T153 CMD9 BA1 A3 C10 FBC_D12 FBC_CMD12 A22
FBAD15 E33 AA32 FBA_CMD16 FBCD13 C8 C22 FBC_CMD13
2
FBAD16 FBA_D15 FBA_CMD16 FBA_CMD17 FBC_CMD16 FBCD14 FBC_D13 FBC_CMD13 FBC_CMD14

G31 FBA_D16 FBA_CMD17 Y33 CMD10 A9 A11 B8 FBC_D14 FBC_CMD14 B17
FBAD17 F30 U32 FBA_CMD18 FBCD15 A8 F24 FBC_CMD15 T162
1
FBAD18 G30 Y31 FBA_CMD19 CMD11 CS0#_H FBCD16 E8 C25 FBC_CMD16
G32 FBA_D19 FBA_CMD20 U34 10K_0402_5%~D F8 FBC_D17 FBC_CMD17 E22
FBAD20 K30 Y35 FBA_CMD21 CMD12 BA0 BA0 FBCD18 F10 C20 FBC_CMD18
FBA_CMD16 FBAD21 FBA_D20 FBA_CMD21 FBA_CMD22 1@ R1383 FBCD19 FBC_D18 FBC_CMD18 FBC_CMD19
K32 FBA_D21 FBA_CMD22 W34 F9 FBC_D19 FBC_CMD19 B22
FBAD22 H30 V30 FBA_CMD23 T160 CMD13 BA2 A15 FBCD20 F12 A19 FBC_CMD20
2
1
FBAD23 K31 U35 FBA_CMD24 FBCD21 D8 D22 FBC_CMD21

10K_0402_5%~D L31 FBA_D24 FBA_CMD25 U30 CMD14 A3 BA1 D11 FBC_D22 FBC_CMD22 D20
C FBAD25 L30 U33 FBA_CMD26 FBCD23 E11 E19 FBC_CMD23 T151 C
R1382 FBA_D25 FBA_CMD26 FBC_D23 FBC_CMD23
MEMORY INTERFACE
FBAD26 M32 AB30 FBA_CMD27 CMD15 CS1#_H FBCD24 D12 D19 FBC_CMD24
N30 AB33 T161 E13 F18
2

M30 T33 CMD16 ODT_H F13 C19
MEMORY INTERFACE C
FBAD29 FBA_D28 FBA_CMD29 FBA_CMD30 FBC_CMD25 FBCD27 FBC_D26 FBC_CMD26 FBC_CMD27
P31 FBA_D29 FBA_CMD30 W29 F14 FBC_D27 FBC_CMD27 F22
FBAD30 R32 CMD17 A4 A5 FBCD28 F15 C23 FBC_CMD28 T152
FBA_D30 FBC_D28 FBC_CMD28
1
FBAD31 R30 FBCD29 E16 B20 FBC_CMD29
FBAD32 FBA_D31 FBCD30 FBC_D29 FBC_CMD29 FBC_CMD30
AG30 FBA_D32 CMD18 A13 A14 10K_0402_5%~D F16 FBC_D30 FBC_CMD30 A20
FBAD33 AG32 P32 DQMA#0 FBCD31 F17
FBA_CMD25 FBAD34 FBA_D33 FBA_DQM0 DQMA#1 1@ R1385 FBCD32 FBC_D31
AH31 FBA_D34 FBA_DQM1 H34 CMD19 WE# A10 D29 FBC_D32
FBAD35 AF31 J30 DQMA#2 FBCD33 F27
2
FBA_D35 FBA_DQM2 FBC_D33
1
FBAD36 AF30 P30 DQMA#3 CMD20 A1 A2 FBCD34 F28 A16 DQMC#0

FBAD37 FBA_D36 FBA_DQM3 DQMA#4 FBCD35 FBC_D34 FBC_DQM0 DQMC#1
10K_0402_5%~D AE30 FBA_D37 FBA_DQM4 AF32 E28 FBC_D35 FBC_DQM1 D10
FBAD38 AC32 AL32 DQMA#5 CMD21 A10 WE# FBCD36 D26 F11 DQMC#2
R1384 FBAD39 FBA_D38 FBA_DQM5 DQMA#6 FBCD37 FBC_D36 FBC_DQM2 DQMC#3
AD30 FBA_D39 FBA_DQM6 AL34 F25 FBC_D37 FBC_DQM3 D15
FBAD40 AN33 AF35 DQMA#7 CMD22 A12 A0 FBCD38 D24 D27 DQMC#4
2
FBAD41 FBA_D40 FBA_DQM7 FBCD39 FBC_D38 FBC_DQM4 DQMC#5

AL31 FBA_D41 E25 FBC_D39 FBC_DQM5 D34
A
FBAD42 AM33 CMD23 CS1#_L FBC_CMD27 FBCD40 E32 A34 DQMC#6

FBAD43 FBA_D42 FBCD41 FBC_D40 FBC_DQM6 DQMC#7
AL33 FBA_D43 F32 FBC_D41 FBC_DQM7 D28
1
FBAD44 AK30 L35 DQSA_RN0 CMD24 RAS# RAS# FBCD42 D33
FBAD45 FBA_D44 FBA_DQS_RN0 DQSA_RN1 FBCD43 FBC_D42
AK32 FBA_D45 FBA_DQS_RN1 G35 10K_0402_5%~D E31 FBC_D43
FBAD46 AJ30 H31 DQSA_RN2 CMD25 ODT_L FBCD44 C33 B14 DQSC_RN0
FBA_CMD27 FBAD47 FBA_D46 FBA_DQS_RN2 DQSA_RN3 1@ R1388 FBCD45 FBC_D44 FBC_DQS_RN0 DQSC_RN1
AH30 FBA_D47 FBA_DQS_RN3 N32 F29 FBC_D45 FBC_DQS_RN1 B10
FBAD48 AH33 AD32 DQSA_RN4 CMD26 A6 A7 FBCD46 D30 D9 DQSC_RN2
2
FBA_D48 FBA_DQS_RN4 FBC_D46 FBC_DQS_RN2
1
FBAD49 AH35 AJ31 DQSA_RN5 FBCD47 E29 E14 DQSC_RN3

FBAD50 FBA_D49 FBA_DQS_RN5 DQSA_RN6 FBCD48 FBC_D47 FBC_DQS_RN3 DQSC_RN4
10K_0402_5%~D AH34 FBA_D50 FBA_DQS_RN6 AJ35 CMD27 CKE_H B29 FBC_D48 FBC_DQS_RN4 F26
FBAD51 AH32 AC34 DQSA_RN7 FBCD49 C31 D31 DQSC_RN5
R1386 FBAD52 FBA_D51 FBA_DQS_RN7 FBCD50 FBC_D49 FBC_DQS_RN5 DQSC_RN6
B AJ33 FBA_D52 CMD28 RST RST C29 FBC_D50 FBC_DQS_RN6 A31 B
FBAD53 AL35 FBCD51 B31 A26 DQSC_RN7
2
FBAD54 FBA_D53 FBCD52 FBC_D51 FBC_DQS_RN7

AM34 FBA_D54 CMD29 A14 A13 C32 FBC_D52
FBAD55 AM35 L34 DQSA_WP0 FBC_CMD28 FBCD53 B32
FBAD56 FBA_D55 FBA_DQS_WP0 DQSA_WP1 FBCD54 FBC_D53
AF33 FBA_D56 FBA_DQS_WP1 H35 CMD30 A15 BA2 B35 FBC_D54
1
FBAD57 AE32 J32 DQSA_WP2 FBCD55 B34 C14 DQSC_WP0
FBAD58 FBA_D57 FBA_DQS_WP2 DQSA_WP3 FBCD56 FBC_D55 FBC_DQS_WP0 DQSC_WP1
AF34 FBA_D58 FBA_DQS_WP3 N31 10K_0402_5%~D A29 FBC_D56 FBC_DQS_WP1 A10
FBAD59 AE35 AE31 DQSA_WP4 FBCD57 B28 E10 DQSC_WP2
FBA_CMD28 FBAD60 FBA_D59 FBA_DQS_WP4 DQSA_WP5 1@ R1391 FBCD58 FBC_D57 FBC_DQS_WP2 DQSC_WP3
AE34 FBA_D60 FBA_DQS_WP5 AJ32 A28 FBC_D58 FBC_DQS_WP3 D14
FBAD61 AE33 AJ34 DQSA_WP6 FBCD59 C28 E26 DQSC_WP4
2
FBA_D61 FBA_DQS_WP6 FBC_D59 FBC_DQS_WP4
1
FBAD62 AB32 AC33 DQSA_WP7 FBCD60 C26 D32 DQSC_WP5

FBAD63 FBA_D62 FBA_DQS_WP7 FBCD61 FBC_D60 FBC_DQS_WP5 DQSC_WP6
10K_0402_5%~D AC35 FBA_D63 D25 FBC_D61 FBC_DQS_WP6 A32
FBCD62 B25 B26 DQSC_WP7
R1387 FBCD63 FBC_D62 FBC_DQS_WP7
A25 FBC_D63
+FB_AVDD AG27
2
FB_DLLAVDD CLKA0
AF27 FB_PLLAVDD FBA_CLK0 T32 CLKA0 58
T31 CLKA0# +1.5V_MEM_GFX 1 2 K27 E17 CLKC0
FBA_CLK0_N CLKA0# 58 R1432 40.2_0402_1%~D FBCAL_PD_VDDQ FBC_CLK0 CLKC0# CLKC0 60
FBC_CLK0_N D17 CLKC0# 60
+FB_VREF J27 1 2 L27
FB_VREF CLKA1 R1433 40.2_0402_1%~D FBCAL_PU_GND CLKC1
FBA_CLK1 AC31 CLKA1 59 FBC_CLK1 D23 CLKC1 61
+1.5V_MEM_GFX 2 1 T30 AC30 CLKA1# 1 2 M27 E23 CLKC1#
R1378 10K_0402_5%~D FBA_DEBUG FBA_CLK1_N CLKA1# 59 2@ R1434 60.4_0402_1%~D FBCAL_TERM_GND FBC_CLK1_N CLKC1# 61
1 2 FBC_DEBUG G19 1 2 +1.5V_MEM_GFX
1@ R1436 40.2_0402_1%~D R1435 10K_0402_5%~D
A A
L94 BLM18PG221SN1D_2P~D 20 mil

+1.05V_RUN_VTT_GFX 2 1 +FB_AVDD
C1788
1
C1789
1 1 Compal Electronics, Inc.
C1790 PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
4.7U_0603_6.3V6K~D 4.7U_0603_6.3V6K~D 1U_0402_6.3V6K~D TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
2 2 2 BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, N10P Memory
LA-5573P
5 4 3 2 1
5 4 3 2 1
FBA_CMD[0..30]
FBA_CMD[0..30] 57,59
Memory Partition A - Lower 32 bits FBAD[0..63]
FBAD[0..63] 57,59
DQMA#[0..7]
DQMA#[0..7] 57,59
U109 U110
DQSA_RN[0..7]
DQSA_RN[0..7] 57,59
E3 FBAD0 E3 FBAD27
DQL0 FBAD1 DQL0 FBAD26 DQSA_WP[0..7]
DQL1 F7 DQL1 F7 DQSA_WP[0..7] 57,59
+1.5V_MEM_GFX F2 FBAD2 F2 FBAD29
FBA_CMD7 DQL2 FBAD3 FBA_CMD7 DQL2 FBAD25
N3 A0 DQL3 F8 N3 A0 DQL3 F8
D FBA_CMD20 P7 H3 FBAD4 Group0 FBA_CMD20 P7 H3 FBAD31 Group3 D
1
FBA_CMD4 A1 DQL4 FBAD5 FBA_CMD4 A1 DQL4 FBAD28
P3 A2 DQL5 H8 P3 A2 DQL5 H8
R1389 FBA_CMD14 N2 G2 FBAD6 FBA_CMD14 N2 G2 FBAD30
FBA_CMD17 A3 DQL6 FBAD7 FBA_CMD17 A3 DQL6 FBAD24
1.1K_0402_1%~D FBA_CMD6 P2 FBA_CMD6 P2
FBA_CMD26 A5 FBA_CMD26 A5
R8 R8
2
+FBA_VREF0 FBA_CMD3 A6 FBAD20 FBA_CMD3 A6 FBAD12

R2 A7 DQU0 D7 R2 A7 DQU0 D7
FBA_CMD1 T8 C3 FBAD18 FBA_CMD1 T8 C3 FBAD11
A8 DQU1 A8 DQU1
1
1 FBA_CMD10 R3 C8 FBAD23 FBA_CMD10 R3 C8 FBAD14

R1390 C1596 FBA_CMD21 A9 DQU2 FBAD19 FBA_CMD21 A9 DQU2 FBAD9
L7 A10/AP DQU3 C2 Group2 L7 A10/AP DQU3 C2
0.01U_0402_25V7K~D FBA_CMD5 R7 A7 FBAD22 FBA_CMD5 R7 A7 FBAD13 Group1
1.1K_0402_1%~D FBA_CMD22 A11 DQU4 FBAD17 FBA_CMD22 A11 DQU4 FBAD8
N7 A12/BC# DQU5 A2 N7 A12/BC# DQU5 A2
2 FBA_CMD18 FBAD21 FBA_CMD18 FBAD15
T3 B8 T3 B8
2
FBA_CMD30 A13 DQU6 FBAD16 FBA_CMD30 A13 DQU6 FBAD10

M7 A15 DQU7 A3 M7 A15 DQU7 A3
+1.5V_MEM_GFX +1.5V_MEM_GFX
FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
FBA_CMD9 BA0 VDD FBA_CMD9 BA0 VDD
N8 BA1 VDD D9 N8 BA1 VDD D9
FBA_CMD13 M3 G7 FBA_CMD13 M3 G7
BA2 VDD BA2 VDD
VDD K2 VDD K2
CLKA0 K8 K8
VDD VDD
VDD N1 VDD N1
CLKA0 J7 N9 CLKA0 J7 N9
57 CLKA0 CK VDD CK VDD
2
CLKA0# K7 R1 CLKA0# K7 R1
57 CLKA0# CK# VDD CK# VDD
R1393 FBA_CMD0 K9 R9 FBA_CMD0 K9 R9
243_0402_1%~D CKE VDD CKE VDD
C C
FBA_CMD25 K1 A1 FBA_CMD25 K1 A1
1
FBA_CMD24 ODT VDDQ FBA_CMD24 ODT VDDQ

J3 RAS# VDDQ A8 J3 RAS# VDDQ A8
CLKA0# FBA_CMD2 L2 C1 FBA_CMD2 L2 C1
FBA_CMD8 CS# VDDQ FBA_CMD8 CS# VDDQ
K3 CAS# VDDQ C9 K3 CAS# VDDQ C9
FBA_CMD19 L3 D2 FBA_CMD19 L3 D2
WE# VDDQ WE# VDDQ
VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1
DQSA_WP0 F3 H2 DQSA_WP3 F3 H2
DQSA_WP2 DQSL VDDQ DQSA_WP1 DQSL VDDQ
C7 DQSU VDDQ H9 C7 DQSU VDDQ H9
DQMA#0 E7 A9 DQMA#3 E7 A9
DQMA#2 DML VSS DQMA#1 DML VSS
D3 DMU VSS B3 D3 DMU VSS B3
VSS E1 VSS E1
VSS G8 VSS G8
DQSA_RN0 G3 J2 DQSA_RN3 G3 J2
DQSA_RN2 DQSL VSS DQSA_RN1 DQSL VSS
B7 DQSU VSS J8 B7 DQSU VSS J8
VSS M1 VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
FBA_CMD28 T2 P9 FBA_CMD28 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1
L8 ZQ VSS T9 L8 ZQ VSS T9
1
1
+FBA_VREF0 M8 B1 +FBA_VREF0 M8 B1
VREFCA VSSQ VREFCA VSSQ
B H1 VREFDQ VSSQ B9 H1 VREFDQ VSSQ B9 B
R1437 D1 R1438 D1
243_0402_1%~D VSSQ 243_0402_1%~D VSSQ
VSSQ D8 VSSQ D8
E2 E2
2
2
VSSQ VSSQ
J1 NC VSSQ E8 J1 NC VSSQ E8
J9 NC VSSQ F9 J9 NC VSSQ F9
L1 NC VSSQ G1 L1 NC VSSQ G1
T7 NC T7 NC
96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3
H5TQ1G63BFR-12C_FBGA96~D H5TQ1G63BFR-12C_FBGA96~D
+1.5V_MEM_GFX
+1.5V_MEM_GFX
1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
1 1 1 1 1 1 1
1 1 1 1 1 1 1 C1799 C1800 C1801 C1802 C1803 C1804 C1805
C1792 C1793 C1794 C1795 C1796 C1797 C1798
2 2 2 2 2 2 2
2 2 2 2 2 2 2 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM A Lower
LA-5573P
5 4 3 2 1
5 4 3 2 1
Memory Partition A - Upper 32 bits FBA_CMD[0..30]
FBAD[0..63]
FBA_CMD[0..30]
FBAD[0..63]
57,58
57,58
DQMA#[0..7]
DQMA#[0..7] 57,58
U111 U112 DQSA_RN[0..7]
+1.5V_MEM_GFX DQSA_RN[0..7] 57,58
E3 FBAD32 E3 FBAD56 DQSA_WP[0..7]
DQL0 DQL0 DQSA_WP[0..7] 57,58
F7 FBAD33 F7 FBAD57
DQL1 DQL1
1
F2 FBAD34 F2 FBAD58
R1395 FBA_CMD22 DQL2 FBAD35 FBA_CMD22 DQL2 FBAD59
D N3 A0 DQL3 F8 Group4 N3 A0 DQL3 F8 D
FBA_CMD4 P7 H3 FBAD36 FBA_CMD4 P7 H3 FBAD60 Group7
1.1K_0402_1%~D FBA_CMD20 A1 DQL4 FBAD37 FBA_CMD20 A1 DQL4 FBAD61
FBA_CMD9 N2 G2 FBAD38 FBA_CMD9 N2 G2 FBAD62
2
+FBA_VREF1 FBA_CMD6 A3 DQL6 FBAD39 FBA_CMD6 A3 DQL6 FBAD63

FBA_CMD17 P2 FBA_CMD17 P2
A5 A5
1
1 FBA_CMD3 R8 FBA_CMD3 R8
R1396 C1631 FBA_CMD26 A6 FBAD41 FBA_CMD26 A6 FBAD51
R2 A7 DQU0 D7 R2 A7 DQU0 D7
0.01U_0402_25V7K~D FBA_CMD1 T8 C3 FBAD45 FBA_CMD1 T8 C3 FBAD52
1.1K_0402_1%~D FBA_CMD5 A8 DQU1 FBAD42 FBA_CMD5 A8 DQU1 FBAD48
R3 A9 DQU2 C8 R3 A9 DQU2 C8
2 FBA_CMD19 FBAD44 FBA_CMD19 FBAD53
L7 C2 L7 C2
2
FBA_CMD10 A10/AP DQU3 FBAD43 FBA_CMD10 A10/AP DQU3 FBAD49

R7 A11 DQU4 A7 Group5 R7 A11 DQU4 A7 Group6
FBA_CMD7 N7 A2 FBAD46 FBA_CMD7 N7 A2 FBAD54
FBA_CMD29 A12/BC# DQU5 FBAD40 FBA_CMD29 A12/BC# DQU5 FBAD50
T3 A13 DQU6 B8 T3 A13 DQU6 B8
FBA_CMD13 M7 A3 FBAD47 FBA_CMD13 M7 A3 FBAD55
A15 DQU7 A15 DQU7
FBA_CMD12 M2 B2 FBA_CMD12 M2 B2
FBA_CMD14 BA0 VDD FBA_CMD14 BA0 VDD
CLKA1 FBA_CMD30 M3 G7 FBA_CMD30 M3 G7
BA2 VDD BA2 VDD
VDD K2 VDD K2
VDD K8 VDD K8
2
VDD N1 VDD N1
R1399 CLKA1 J7 N9 CLKA1 J7 N9
243_0402_1%~D 57 CLKA1 CK VDD CK VDD
CLKA1# K7 R1 CLKA1# K7 R1
57 CLKA1# CK# VDD CK# VDD
FBA_CMD27 K9 R9 FBA_CMD27 K9 R9
CKE VDD CKE VDD
C C
1
CLKA1# FBA_CMD16 K1 A1 FBA_CMD16 K1 A1

FBA_CMD24 ODT VDDQ FBA_CMD24 ODT VDDQ
FBA_CMD11 L2 C1 FBA_CMD11 L2 C1
FBA_CMD8 CS# VDDQ FBA_CMD8 CS# VDDQ
FBA_CMD21 L3 D2 FBA_CMD21 L3 D2
WE# VDDQ WE# VDDQ
VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1
DQSA_WP4 F3 H2 DQSA_WP7 F3 H2
DQSA_WP5 DQSL VDDQ DQSA_WP6 DQSL VDDQ
DQMA#4 E7 A9 DQMA#7 E7 A9
DQMA#5 DML VSS DQMA#6 DML VSS
VSS E1 VSS E1
VSS G8 VSS G8
DQSA_RN4 G3 J2 DQSA_RN7 G3 J2
DQSA_RN5 DQSL VSS DQSA_RN6 DQSL VSS
VSS M1 VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
FBA_CMD28 T2 P9 FBA_CMD28 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1
1
1
B +FBA_VREF1 M8 B1 +FBA_VREF1 M8 B1 B
R1439 VREFCA VSSQ VREFCA VSSQ
H1 VREFDQ VSSQ B9 H1 VREFDQ VSSQ B9
243_0402_1%~D D1 R1440 D1
VSSQ 243_0402_1%~D VSSQ
D8 D8
2
VSSQ VSSQ
E2 E2
2
VSSQ VSSQ
T7 NC T7 NC
96-BALL 96-BALL
1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
1 1 1 1 1 1 1 1 1 1 1 1 1 1
C1806 C1807 C1808 C1809 C1810 C1811 C1812 C1813 C1814 C1815 C1816 C1817 C1818 C1819
2 2 2 2 2 2 2 2 2 2 2 2 2 2
1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM A Upper
LA-5573P
5 4 3 2 1
5 4 3 2 1
FBCD[0..63]
FBCD[0..63] 57,61
Memory Partition C - Lower 32 bits FBC_CMD[0..30]
FBC_CMD[0..30] 57,61
DQMC#[0..7]
DQMC#[0..7] 57,61
DQSC_RN[0..7]
DQSC_RN[0..7] 57,61
+1.5V_MEM_GFX 1@ U134 1@ U135 DQSC_WP[0..7]
DQSC_WP[0..7] 57,61
E3 FBCD24 E3 FBCD23
DQL0 DQL0
1
D F7 FBCD25 F7 FBCD17 D
1@ R1442 DQL1 FBCD26 DQL1 FBCD18
DQL2 F2 DQL2 F2
FBC_CMD7 N3 F8 FBCD27 FBC_CMD7 N3 F8 FBCD19
1.1K_0402_1%~D FBC_CMD20 A0 DQL3 FBCD28 FBC_CMD20 A0 DQL3 FBCD20
P7 A1 DQL4 H3 Group3 P7 A1 DQL4 H3 Group2
FBC_CMD4 P3 H8 FBCD29 FBC_CMD4 P3 H8 FBCD21
2
+FBB_VREF0 FBC_CMD14 A2 DQL5 FBCD30 FBC_CMD14 A2 DQL5 FBCD22

N2 A3 DQL6 G2 N2 A3 DQL6 G2
A4 DQL7 A4 DQL7
1
1 FBC_CMD6 P2 FBC_CMD6 P2
1@ R1441 C1820 FBC_CMD26 A5 FBC_CMD26 A5
R8 A6 R8 A6
0.01U_0402_25V7K~D FBC_CMD3 R2 D7 FBCD5 FBC_CMD3 R2 D7 FBCD13
1.1K_0402_1%~D 1@ FBC_CMD1 A7 DQU0 FBCD1 FBC_CMD1 A7 DQU0 FBCD9
T8 A8 DQU1 C3 T8 A8 DQU1 C3
2 FBC_CMD10 FBCD6 FBC_CMD10 FBCD14
R3 C8 R3 C8
2
FBC_CMD21 A9 DQU2 FBCD3 FBC_CMD21 A9 DQU2 FBCD11

L7 A10/AP DQU3 C2 Group0 L7 A10/AP DQU3 C2
FBC_CMD5 R7 A7 FBCD4 FBC_CMD5 R7 A7 FBCD12 Group1
FBC_CMD18 T3 B8 FBCD7 FBC_CMD18 T3 B8 FBCD15
FBC_CMD12 M2 B2 FBC_CMD12 M2 B2
FBC_CMD9 BA0 VDD FBC_CMD9 BA0 VDD
CLKC0 FBC_CMD13 M3 G7 FBC_CMD13 M3 G7
BA2 VDD BA2 VDD
VDD K2 VDD K2
VDD K8 VDD K8
2
VDD N1 VDD N1
1@ R1443 CLKC0 J7 N9 CLKC0 J7 N9
243_0402_1%~D 57 CLKC0 CK VDD CK VDD
C CLKC0# K7 R1 CLKC0# K7 R1 C
57 CLKC0# CK# VDD CK# VDD
FBC_CMD0 K9 R9 FBC_CMD0 K9 R9
CKE VDD +1.5V_MEM_GFX CKE VDD +1.5V_MEM_GFX
1
CLKC0# FBC_CMD25 K1 A1 FBC_CMD25 K1 A1

FBC_CMD24 ODT VDDQ FBC_CMD24 ODT VDDQ
FBC_CMD2 L2 C1 FBC_CMD2 L2 C1
FBC_CMD8 CS# VDDQ FBC_CMD8 CS# VDDQ
FBC_CMD19 L3 D2 FBC_CMD19 L3 D2
WE# VDDQ WE# VDDQ
VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1
DQSC_WP3 F3 H2 DQSC_WP2 F3 H2
DQSC_WP0 DQSL VDDQ DQSC_WP1 DQSL VDDQ
DQMC#3 E7 A9 DQMC#2 E7 A9
DQMC#0 DML VSS DQMC#1 DML VSS
VSS E1 VSS E1
VSS G8 VSS G8
DQSC_RN3 G3 J2 DQSC_RN2 G3 J2
DQSC_RN0 DQSL VSS DQSC_RN1 DQSL VSS
VSS M1 VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
FBC_CMD28 T2 P9 FBC_CMD28 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1
B B
1
+FBB_VREF0 M8 B1 +FBB_VREF0 M8 B1
VREFCA VSSQ VREFCA VSSQ
1
1@ R1445 D1 D1
243_0402_1%~D VSSQ 1@ R1446 VSSQ
VSSQ D8 VSSQ D8
E2 243_0402_1%~D E2
2
VSSQ VSSQ
J1 E8 J1 E8
2
NC VSSQ NC VSSQ
T7 NC T7 NC
96-BALL 96-BALL
1 1 1 1 1 1 1 1 1 1 1 1 1 1
C1821 C1822 C1823 C1824 C1825 C1826 C1827 C1828 C1829 C1830 C1831 C1832 C1833 C1834
1@
1@
1@ 1@ 1@ 1@ 1@ 1@ 0.1U_0402_10V7K~D 1@ 1@ 1@ 1@ 1@ 1@ 0.1U_0402_10V7K~D
2 2 2 2 2 2 2 2 2 2 2 2 2 2
A 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D 1U_0402_6.3V6K~D 0.1U_0402_10V7K~D 0.1U_0402_10V7K~D A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM C Lower
LA-5573P
5 4 3 2 1
5 4 3 2 1
FBCD[0..63]
FBCD[0..63] 57,60
Memory Partition C - Upper 32 bits FBC_CMD[0..30]
FBC_CMD[0..30] 57,60
DQMC#[0..7]
DQMC#[0..7] 57,60
1@ U136 1@ U137 DQSC_RN[0..7]
DQSC_RN[0..7] 57,60
+1.5V_MEM_GFX E3 FBCD32 E3 FBCD54 DQSC_WP[0..7]
DQL0 DQL0 DQSC_WP[0..7] 57,60
F7 FBCD33 F7 FBCD50
DQL1 FBCD34 DQL1 FBCD55
D DQL2 F2 DQL2 F2 D
1
FBC_CMD22 N3 F8 FBCD35 FBC_CMD22 N3 F8 FBCD48
1@ R1447 FBC_CMD4 A0 DQL3 FBCD36 FBC_CMD4 A0 DQL3 FBCD52
P7 A1 DQL4 H3 Group4 P7 A1 DQL4 H3 Group6
1.1K_0402_1%~D FBC_CMD9 A2 DQL5 FBCD38 FBC_CMD9 A2 DQL5 FBCD53
N2 A3 DQL6 G2 N2 A3 DQL6 G2
2
+FBB_VREF1 FBC_CMD17 A4 DQL7 FBC_CMD17 A4 DQL7

P2 A5 P2 A5
FBC_CMD3 R8 FBC_CMD3 R8
A6 A6
1
1 FBC_CMD26 R2 D7 FBCD44 FBC_CMD26 R2 D7 FBCD63

1@ R1448 C1835 FBC_CMD1 A7 DQU0 FBCD47 FBC_CMD1 A7 DQU0 FBCD57
T8 A8 DQU1 C3 T8 A8 DQU1 C3
0.01U_0402_25V7K~D FBC_CMD5 R3 C8 FBCD41 FBC_CMD5 R3 C8 FBCD61
1.1K_0402_1%~D 1@ FBC_CMD19 A9 DQU2 FBCD46 FBC_CMD19 A9 DQU2 FBCD59
L7 A10/AP DQU3 C2 L7 A10/AP DQU3 C2
2 FBC_CMD10 FBCD42 FBC_CMD10 FBCD60
R7 A7 Group5 R7 A7 Group7
2

FBC_CMD29 T3 B8 FBCD40 FBC_CMD29 T3 B8 FBCD62
FBC_CMD12 M2 B2 FBC_CMD12 M2 B2
FBC_CMD14 BA0 VDD FBC_CMD14 BA0 VDD
FBC_CMD30 M3 G7 FBC_CMD30 M3 G7
CLKC1 BA2 VDD BA2 VDD
VDD K2 VDD K2
VDD K8 VDD K8
VDD N1 VDD N1
2
CLKC1 J7 N9 CLKC1 J7 N9
57 CLKC1 CK VDD CK VDD
1@ R1449 CLKC1# K7 R1 CLKC1# K7 R1
243_0402_1%~D 57 CLKC1# CK# VDD CK# VDD
C FBC_CMD27 K9 R9 FBC_CMD27 K9 R9 C
CKE VDD +1.5V_MEM_GFX CKE VDD +1.5V_MEM_GFX
1
FBC_CMD16 K1 A1 FBC_CMD16 K1 A1
CLKC1# FBC_CMD24 ODT VDDQ FBC_CMD24 ODT VDDQ
FBC_CMD11 L2 C1 FBC_CMD11 L2 C1
FBC_CMD8 CS# VDDQ FBC_CMD8 CS# VDDQ
FBC_CMD21 L3 D2 FBC_CMD21 L3 D2
WE# VDDQ WE# VDDQ
VDDQ E9 VDDQ E9
VDDQ F1 VDDQ F1
DQSC_WP4 F3 H2 DQSC_WP6 F3 H2
DQSC_WP5 DQSL VDDQ DQSC_WP7 DQSL VDDQ
DQMC#4 E7 A9 DQMC#6 E7 A9
DQMC#5 DML VSS DQMC#7 DML VSS
VSS E1 VSS E1
VSS G8 VSS G8
DQSC_RN4 G3 J2 DQSC_RN6 G3 J2
DQSC_RN5 DQSL VSS DQSC_RN7 DQSL VSS
VSS M1 VSS M1
VSS M9 VSS M9
VSS P1 VSS P1
FBC_CMD28 T2 P9 FBC_CMD28 T2 P9
RESET VSS RESET VSS
VSS T1 VSS T1
1
B B
1
+FBB_VREF1 M8 B1 +FBB_VREF1 M8 B1
1@ R1450 VREFCA VSSQ VREFCA VSSQ
243_0402_1%~D D1 1@ R1451 D1
VSSQ 243_0402_1%~D VSSQ
D8 D8
2
VSSQ VSSQ
E2 E2
2
VSSQ VSSQ
T7 NC T7 NC
96-BALL 96-BALL
1 1 1 1 1 1 1 1 1 1 1 1 1 1
C1837 C1838 C1839 C1840 C1841 C1842 C1843 C1844 C1845 C1846 C1847 C1848 C1849 C1850
1@ 1@
1@ 1@ 1@ 1@ 1@ 1@ 0.1U_0402_10V7K~D 1@ 1@ 1@ 1@ 1@ 1@ 0.1U_0402_10V7K~D
2 2 2 2 2 2 2 2 2 2 2 2 2 2
A A

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, VRAM C Upper
LA-5573P
5 4 3 2 1
5 4 3 2 1
+3.3V_RUN +5V_RUN
VREF
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1
1
+3.3V_RUN
PR338
PR339
PR340
2
@ @
2
PR341 TRIPSEL
1.91K_0402_1%
0_0402_5%~D
1
PR342
1
+3.3V_RUN
2
D D
@
2
PR344
10K_0402_5%~D
GNDA_GPU
1
PL24
12,34,39,42,47 RUN_ON 2 1 GPU_PWRGD 2 1 FBMJ4516HS720NT_1806~D
DGPU_PWROK 19,39
@ PR345 0_0402_5%~D VGA_B+ 2 1 +PWR_SRC
39 DGPU_PWR_EN 2 1 PR346
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
PR347 0_0402_5%~D 0_0402_5%~D @ PJP51
+3.3V_RUN +5V_RUN 1 2
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
2
1
VREF
PAD-OPEN 4x4m
1@ PC287
1@ PC288
1@ PC289
1@ PC290
1@ PC291
PC292
2
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1
1
GNDA_GPU 2 1
+3.3V_RUN +5V_RUN
PR348
PR349
PR350
5
TON
PC327
VREF
1U_0603_6.3V6M~D PQ63
1 2
@ @ SIR472DP-T1-E3_SO8~D ?V / ?V
2
68P_0402_50V8F~D
0_0402_5%~D
0_0402_5%~D
0_0402_5%~D
1@
1
PR354 GNDA_GPU
thermal design current 23.19A
0_0402_5%~D
1
PC293 4.02K_0402_1%~D UG_VGA2
PR351
PR352
PR353
4
peak current 30A
PR355
1 2 1 2
@ @ 1000P_0402_50V7K~D
249K_0402_1%~D
2
2
@ 1@ PL25
3
2
1
TON 0.56UH_MPC1040LR56C_23A_+-20%~D
PR356
PC294
V5FILT
0.22U_0402_6.3V6K PHASE_VGA2 4 1
0_0402_5%~D
1
GNDA_GPU 2 1 GNDA_GPU
820P_0402_50V7K~D
1
5
PR357
3 2
VREF
1
1@ PC295
1
@ PR358 TRIPSEL
22.6K_0402_1%~D
SI7658ADP_MLP8~D
SI7658ADP_MLP8~D
@ 0_0402_5%~D
1@ PR359
2
2
1 2 GNDA_GPU
1@ PQ64
1@PQ64
1@ PQ65
LG_VGA2 4 LG_VGA2 1@ PR362
33
41
32
37
39
34
38
36
40
35
31
4
4.7_1206_5%~D
2
C 1@ PR360 1@ 357K_0402_1%~D C
2
GNDA_GPU PU17 2.2_0603_1%~D PC296
1@ PR361
1 2
PGOOD
OSRSEL
GND
CLK_EN#
TONSEL
TRIPSEL
VR_ON
ISLEW
VREF
V5FILT
DROOP
2 1 1 2 PH4
1@ 1@
3
2
1
3
2
1
V5FILT 1 30 0.22U_0603_10V7K~D 1 2SN-2 1 2 +GPU_COREP
1
MODE DRVH2
330U_D2E_2.5VM_R9~D
330U_D2E_2.5VM_R9~D
330U_D2E_2.5VM_R9~D
PR363
2200P_0402_50V7K~D
0.1U_0402_10V7K~D
PR364 1@ GNDA_GPU 2 29 43.2K_0402_1%~D 1 1 1
470_0402_5% GND VBST2 RB751V-40_SOD323-2~D 150K_0402_5%_ ERTJ0EV154J~D
1 2
1
CSP2 1 2 PR365 1@ PD27 1@ PC297 + + +
2@ PC298
2@ PC299
2@ PC300
3 28
CSN2
CSP2
470_0402_5% CSP2 LL2 0.022U_0402_25V7K~D
PC301
PC302
2
CSN2 PR366 1 2 4 27 +5V_ALW 1@
2
470_0402_5% CSN2 DRVL2 2 2 2
CSN1 1 2 PR367 5 26
470_0402_5% CSN1 TPS51728RHAR_QFN40_6X6 V5IN
1
CSP1 1 2 6 25
CSP1 PGND PC303
2
GPUVSS 7 24 10U_0805_6.3V6M~D PC298 PC299
2
GNDSNS DRVL1 PD28
33P_0402_50V8J~D
33P_0402_50V8J~D
1
GPUVDD 8 23 RB751V-40_SOD323-2~D
0_0402_5%~D
VSNS LL1 PC306

2@ PR421
1@ PC304
PC305
CSN1
CSP1
GNDA_GPU 1 2 9 22 0.022U_0402_25V7K~D
1
PR368 THERM VBST1
1 2
DPRSLPVR
2
20K_0402_1%~D 10 21 PC309 330U_D2_2VM_R6M~D 330U_D2_2VM_R6M~D

2
33P_0402_50V8J~D
33P_0402_50V8J~D
PH5
1
VR_TT# DRVH1 PR370 1@ 1@

2 1 1 2
0_0402_5%~D
IMON
THAL#
2@ PR422
1@ PC307
PC308
1 2 1 2
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
3
2
1
3
2
1
1
SN-1
PR369 0.22U_0603_10V7K~D PC300
4.7_1206_5%~D
2.2_0603_1%~D 43.2K_0402_1%~D
SI7658ADP_MLP8~D
SI7658ADP_MLP8~D
PR371
2
150K_0402_5%_ ERTJ0EV154J~D
1 2
2
11
12
13
14
15
16
17
18
19
20
23 GPU_IMON
PQ66
1@ PQ67
PC310 LG_VGA1 4 LG_VGA1 4
22.6K_0402_1%~D
820P_0402_50V7K~D
2
GPUVSS 1 2 PR372
2
357K_0402_1%~D
PR373
3300P_0402_50V7K~D 330U_D2_2VM_R6M~D
2
GNDA_GPU 1 2 GNDA_GPU 1@
2@ PR374
PC311
1
21.5K_0402_1%~D 3 2
1
+5V_RUN 2@ PR420
1 2 PHASE_VGA1 4 1
B B
GNDA_GPU +1.05V_RUN 0_0402_5%~D 1@ PR375
1 2 0.56UH_MPC1040LR56C_23A_+-20%~D Output Cap
PSI# pull high dual channel @ PR376 0_0402_5%~D PL26
0_0402_5%~D PQ68 DSC (2@) 330U_D2E_2.5VM_R9~D
PSI# pull low single channel GNDA_GPU 1 2
3
2
1
PR406 SIR472DP-T1-E3_SO8~D
ASICS / ASICS2 (1@) 330U_D2_2VM_R6M~D
0_0402_5%~D
GPU_VID_6 1 2 PR405
+1.05V_RUN 0_0402_5%~D UG_VGA1 4
GPU_VID_5 1 2 PR404
0_0402_5%~D
PR403 1 2
53 GPU_VID_4
0_0402_5%~D
1
1 2 PR402
0_0402_5%~D
53 GPU_VID_3
0_0402_5%~D
1@ PR389
PR401 1 2
53 GPU_VID_2
0_0402_5%~D
1 2 PR400
2
53 GPU_VID_1
0_0402_5%~D VGA_B+
GPU_VID_0 1 2 @ PJP52
1 2
10K_0402_5%~D
1
0.1U_0603_25V7K~D
0.1U_0603_25V7K~D
THAL#
PR408
PAD-OPEN 43X118
10K_0402_5%~D
10U_1206_25VAK
10U_1206_25VAK
10U_1206_25VAK
PJP53
1
2
10K_0402_5%~D
PR411
PC312
PC313
PC314
PC315
PC316
2 1
PR407
PR374 PR374
2
1
PAD-OPEN1x1m GPU_IMON setting @ PJP54
1 2
2
GNDA_GPU DSC (2@) 21.5K_ohm

ASICS (7@) 11.5K_ohm PAD-OPEN 43X118
+3.3V_RUN +GPU_CORE
ASICS2 (9@) 10.7K_ohm 11.5K_0402_1%~D 10.7K_0402_1%~D
PR425 7@ 9@ +GPU_COREP @ PJP55
10_0402_5%~D 1 2
GNDA_GPU 2 1
PAD-OPEN 43X118
PR423 Margaux DSC & ASICS2

A 0_0402_5%~D
* A
GPUVSS
defult voltage 1V
54 GPU_VSS_SENSE 2 1
@ PJP56
ASICS defult voltage 0.925V 1 2
PR424
0_0402_5%~D PAD-OPEN 43X118
2 1 GPUVDD Voltage\VID GPU_VID_0 GPU_VID_1 GPU_VID_2 GPU_VID_3 GPU_VID_4 GPU_VID_5 GPU_VID_6
54 GPU_VDD_SENSE
* 1 0 0 0 1 0 1 0
2 1 * 0.925 0 1 1 1 0 1 0
+GPU_COREP PR426 Title
10_0402_5%~D
0.85 0 0 1 0 1 1 0 <Title>
0.8 0 0 0 1 1 1 0 Size Document Number Rev
C <Doc> 3.0

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SIO_PWRBTN#
CPU PWRBTN#
GFX_VR_ON +1.05V_RUN_VTT PCH
PM_DRAM_PWRGD ISL62881 +VCC_GFXCORE PCH_RSMRST#
15 SM_DRAMPWROK
VAXG
VCCDMI
V_CPU_IO
RSMRST#
SIO_SLP_S5#
4
SLP_S5#
H_CPUPWRGD +1.05V_RUN_VTT SIO_SLP_S4#
+1.05V_M
16 VCCPWRGD_0/1 VTT
VCCME
SLP_S4#
SIO_SLP_S3#
+VCC_CORE SLP_S3#
PCH_PLTRST#_R +1.05V_RUN 5
D
17 RSTIN# VCC
VCCIO SLP_M#
SIO_SLP_M# D
+1.5V_MEM SIO_SLP_LAN#
SLP_LAN#
VDDQ +3.3V_M DGPU_PWROK
VCCME3_3 GPIO22
VTTPWRGOOD
H_VTTPWRGD
12
+3.3V_ALW_PCH PM_MEPWROK
Power Button VCCSUS MEPWROK 10
2BAT +15V_ALW +3.3V_RUN PWROK
RESET_OUT#
VCC3_3
1BAT 2AC BAT54
14
1AC PCH_PLTRST# DRAMPWROK
PM_DRAM_PWRGD
ADAPTER 17 PLTRST#
15
ALWON +5V_ALW
EC 5045 SN0608098 H_CPUPWRGD
PROCPWRGD
+3.3V_ALW 16
ALW_PWRGD_3V_5V
+0.75V_DDR_VTT
C +5V_ALW 7 VTT DDR C
BATTERY DDR_ON
+1.5V_MEM VDDQ
VT357FCX
1.5V_SUS_PWRGD
11
+3.3V_LAN
+5V_ALW
REGCTL_PNP10 RUN_ON
PCH_RSMRST# 82577 +5V_RUN
4 M_ON +3.3V_ALW CTRL_1P0 SIO_SLP_S3# SIO 5028 FDS8878
SIO_SLP_S4# +1.5V_MEM
SIO_SLP_LAN# SI3456BD +3.3V_M +3.3V_LAN
DCP69 +1.0V_LAN 5 SIO_SLP_M#
+3.3V_ALW
6 SI3456BD +1.5V_RUN
PM_MEPWROK SIO_SLP_LAN#
10 +1.05V_RUN_VTT
PCH_ALW_ON
SI3456BD +3.3V_ALW_PCH
3
+5V_ALW
FDS8878 +1.05V_RUN
RESET_OUT# +3.3V_ALW
7 TPS51100
DDR_ON
B
14 SUS_ON
+0.75V_DDR_VTT 0.75V_DDR_VTT_ON
B
+3.3V_ALW
SI3456BD +3.3V_SUS
SIO_SLP_S5#
9 +5V_ALW
NTMS4107 +3.3V_RUN
5 12
+3.3V_ALW
+1.05V_RUN_VTT CPU_VTT_ON
MAX17007
ISL8014 +1.8V_RUN
+3.3V_ALW 1.8V_RUN_PWRGD
1.8VRUNPWROK
M_ON
ISL8014 +1.05V_M H_VTTPWRGD
6 IMVP_VR_ON
1.05V_M_PWRGD
ISL62883 +VCC_CORE 13
+3.3V_ALW IMVP_PWRGD
AUX_EN_WOWL
8 +3.3V_WLAN
SI3456BD DGPU_PWR_EN
+3.3V_RUN ISL62870 +GPU_CORE
RUNPWROK DGPU_PWROK
A BC BUS 11 A
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Sequence
LA-5573P
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5 4 3 2 1
V ersion Change L ist ( P. I. R . L ist )

R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
D D
1 8,12,13, HW 6/30/2009 Intel Intel S3 reduction circuit. Add R1469, R1471-R1480, C1872-C1877, Q199-Q204, change R624 to 27 ohm, X01
14,42 pop Q78, add net DDR_HVREF_RST_GATE from U36.B36, CPU1.5V_S3_GATE from
U36.B37, change CPU VDDQ net name to +1.5V_CPU_VDDQ
2 40 HW 6/30/2009 COMPAL Board ID R98 change to 130k ohm X01
3 43 HW 6/30/2009 COMPAL for derating concern Change R1001 from 82 to 150 ohm X00
4 8 HW 6/30/2009 Intel Follow CRB by Intel request R1286 needs to change to 0-ohm X00
5 39,40 HW 6/30/2009 COMPAL MEMO implementation de-pop R1319, R595 X00
6 8 HW 7/01/2009 Intel Intel S3 reduction circuit. Change R879 to 2k, R880 to 1.1k, add U141 X01
7 55 HW 7/01/2009 COMPAL Rdson concern by ADC Change Q55/Q58/Q59/Q183 to SI4164 X01
8 8,42,47 HW 7/02/2009 Intel Intel S3 reduction circuit. Add R1481-R1484, Q205, Q206, Q207, C1877, PR428, change R879 to 1.5k, X01
R880 to 750 ohm, change net DDR_HVREF_RST_GATE to U36.A34,
CPU1.5V_S3_GATE to U36.A36
9 30 HW 7/03/2009 COMPAL +3.3V_LAN enable control follow M09 De-pop R47 X01
10 12 HW 7/03/2009 DELL Intel S3 reduction circuit. De-pop R1473, separated +V_DDR_REF_Q for each SO-DIMM, The dividers X01
HW should use 1% part replacement for 5% as well
C 11 8,12,13, HW 7/08/2009 DELL Intel S3 reduction circuit. Add C1879, PJP57, PJP58, R1485, R1486, change Q205 to PMST3904, Q200 to X01 C
14,42 Intel AO4728L, R624 to 22 ohm, connect RUN_ON_CPU1.5VS3# to Q78.2 Q204.2,

12 8 HW 7/09/2009 COMPAL Intel S3 reduction circuit. Add R1487 X01
13 24 HW 7/14/2009 COMPAL NVidia BIA_PWM implementation POP R165, de-pop R166 X01
14 8,15 HW 7/14/2009 COMPAL Depop all related components where are Depop JXDP1, JXDP2, JDEG1, JP2 circuit X02
located at 0 Z-hight area
15 24 HW 7/14/2009 DELL ENVDD_PCH connection Remove D91 and connect ENVDD_GPU to 5028.pin B38 X02
16 19 HW 7/14/2009 Intel GPIO1,6,7 PU if not being used Add R1489-R1491 X02
17 24 HW 7/14/2009 COMPAL Camera need to be changed from 7 to 8 pin Change JEDP1 pin definition X02
18 37 HW 7/16/2009 COMPAL JTP1, JBIO1 power gnd pins redefined Change JTP1, JBIO1 pin definition X02
19 37,40 HW 7/16/2009 SMSC LAT_ON_SW# needs to be added a 1uF cap Add @C1884, C1885, R1492, change R560 to 100K, JIO.32 change to X02
LAT_ON_SW_BTN#
20 23 HW 7/16/2009 SMSC R594 has to be a group with R3P circuit De-pop R594 for M09 fan solution X02
21 31 HW 7/17/2009 Braodcom Found both PD R898 and PU R485 pop depopulate R898 for normal operation X02
22 40 HW 7/17/2009 COMPAL Board ID Change R98 to 62K ohm. X02
23 31 HW 7/17/2009 Braodcom RFID disable circuit remove Remove R1062-R1065 X02
B 24 28,37 HW 7/17/2009 TI Please reserve 1 resistor and connect Add R1493 & R1494 at pin 18 of U95 & U96 for power saving X02 B
connector (Pin1 or 7) to MAX4951

25 31 HW 7/17/2009 Braodcom +SC_VCC Capacitor (C718) Value Change Broadcom has recommneded changing the value of C718 from .47uF to 220nF X02
26 42 HW 7/17/2009 COMPAL Backdrive EA Failure on Margaux/ASICS Pop R625 and Q79 X02
27 24 HW 7/17/2009 DELL eDP repeater change to SN75DP119. update U46 circuit for eDP repeater X02
28 23 HW 7/17/2009 COMPAL R3P circuit by SMSC request R536 depop for 3P FAN, R1457 change to 0 ohm, R138 change to 27K ohm X02
29 21 HW 7/17/2009 Intel The PLLs aren’t used in a DIS system De-pop C105 & C106 X02
30 33 HW 7/17/2009 TXC EA result C514, C515 have to change to 22pF X02
31 36,39 HW 7/22/2009 DELL Reconnect the signal UWB_RADIO_DIS# connect UWB_RADIO_DIS# from EC5028.A56 to MINI3.20 X02
32 23 HW 7/22/2009 DELL Change FAN solution to M09 De-pop R3P circuit component & pop M09 solution X02
33 42 HW 7/23/2009 COMPAL de-rating result fail Change Q61 from AO4456 to NTMS4107 X02
34 26 HW 7/23/2009 PERICOM Pericom 8200 SW issue DVI can not work Add R1495 to pull up U9 pin 23 (P1_OC0) of Pericom 8200 SW with a 4.7K X02
ohm resistor to 3.3_RUN
35 24 HW 7/23/2009 TI eDP repeater DP119 vender review request reserve pop option for X1EDP & DP119, change PU/PD to 20K. X02
36 28 HW 7/23/2009 DELL We will never disable the power to HDD Remove R1493 & delete SATA_PWRSAVE X02
redriver, go back connected in SSI
A 37 18,28,40 HW 7/23/2009 DELL There has been some confusion due to the change net name HDD_FALL_INT1# to HDD_FALL_INT to show correct polarity X02 A
net name showing active low

Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE PIR
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D 38 29 HW 7/24/2009 DELL use the SiTimes part due to the cost savings change X4 from TXC to SiTimes. X02 D
39 31 HW 7/24/2009 Braodcom connect pin-L10 of U32 to pin-5 of U33, pop R775, de-pop R776 X02
and disconnect pin-D2 from pin-5 of U33
40 33 HW 7/24/2009 COMPAL fixed SD/MMC Clock overshoot and undershoot Changing R8 dumping from 0-ohm to 10-ohm X02
41 31 HW 7/24/2009 Braodcom BCM5880 Leakage Issue on Margaux Add Q208,Q209,R1496 circuit to fix. X02
42 37,39 HW 7/27/2009 DELL ESATA repeater power saving Add a 0 ohm jumper between EN pin and VDD, but no-pop it. Then connect X02
the EN pin to 5028.A47 with a 0 ohm jumper that is popped.
43 39 HW 7/27/2009 DELL Sometimes VGA_ID_DISC and VGA_ID_UMA both Change R875 and R881 to +3.3V_ALW rail. X02
read as low
44 23 HW 7/27/2009 SMSC SMSC review feedback The pull-up source of the R150 should be changed to +VCC_4002 X02
45 31 HW 7/27/2009 NXP Better for decoupling noise Change C1015 ,C633 to 10pf X02
46 36 HW 7/27/2009 DELL For PCH GPIOs rail. PCIE_MCARD3_DET# & USB_MCARD1_DET# pull-ups (R458 & R438) need to change X02
from +3.3V_ALW_PCH rail to +3.3V_RUN rail
47 11 HW 7/27/2009 Intel The VCC_Core de-coupling requirements for C60-64, C66 change to 470uF/4mOhm, C44-C59 change to 22uF(0805) X02
Clarksfield XE processor
48 23,40 HW 7/29/2009 SMSC per SMSC 5045 AN 19.6, 4002 AN 16.11 R541, R554, R1492 should be 10K, R147 should be populate, Add R1498 X02
C 49 35 HW 7/29/2009 DELL Braidwood has been removed from Ibex Peak De-pop JBW1 & R1453 X02 C
platforms
50 39 HW 7/29/2009 DELL GPIO MAP update change net name from RESERVED FOR ESATA to EN_ESATA_RPTR X02
51 42 HW 7/29/2009 Compal By Intel S3 timing concern reserve R1500 & @R1499 0 ohm for Q206.2 from RUN_ON_CPU1.5VS3# X02
& RUN_ON_ENABLE#
52 37 HW 7/30/2009 Intel Intel continues to recommend that all Add @L30, @L31, R424-R427 X02
pre-production and production motherboards
include common mode choke footprints to
enable a stuffing option in case a choke is
required to pass EMI testing
53 31 HW 7/30/2009 Broadcom Broadcom schematic review request pop R537; Remove C647, C641,R634, R498, R898; Add @C1886 & @C1887; X02
Remove L73, R631, C1026, R494, Short net RFREADER_TXN1_PI_R to
RFREADER_RXP_C; Remove C642, C640, change R487, R496 to 0 ohm;
Add @R1501; de-pop R496 & R497; JCS1 pin2 & pin3 and pin4 & pin5
should be short to carry higher current.
54 31 HW 7/30/2009 Compal Solve smart card cage vender reverse pin Reverse JSC1 pin definition X02
B definition. B
55 31 HW 7/31/2009 Broadcom Broadcom schematic review request The pin1 of R497 and R496 should be connected to GND X02
56 15,40 HW 7/31/2009 KDS KDS crystal EA result change DIS C296 & C297 to 12pF, C674, C675 to 33pF X02
57 8,15 HW 7/31/2009 Intel For XDP debug concern Populate all the resistors and leave out the connector X02
58 27 HW 8/03/2009 Compal CRB EA result C251-C253 to 4.7pF; L61-L63 to 10-Ohm Bead ; De-pop C996, C518, C390 X02
59 23 HW 8/03/2009 Compal If populate R147 PU resistor for THERM_STP#, De-pop R147 X02
it will impact ALWON signal at MEC 5045
60 15,40 HW 8/04/2009 KDS KDS crystal EA result change DIS C427 change to 200 ohm, C514, C515 back to 15P and change X3 X02
from CL=16pF to CL=12pF
61 8 HW 8/05/2009 DELL fix the Intel S3 power up timing change C1877 from 0.01uF to 0.22uF 0402 cap. X02
62 28,37 HW 8/06/2009 Compal Per ESATA/SATA EA result pop R1301, R1304, de-pop R1298, R1308 X02
63 28 HW 8/06/2009 Compal ODD_DET# PU from +5V_MOD to +3.3V_RUN connect R1239.1 to +3.3V_RUN & pop R1239 X02
64 42 HW 8/06/2009 SMSC Watch dog timer may not be resetED when Pop R616 to 39 & pop Q72 X02
4002 VDD_PWRGD is not completely at Logic Low
65 30 HW 8/10/2009 Intel Remove the VCT trace Remove @R562, @C41 X02
66 35 HW 8/10/2009 DELL Braidwood Removal on RAM Remove @JBW1, @C1851, @R1452, @R1453, @C1852, R1411 X02
A 67 31 HW 8/11/2009 Broadcom Broadcom review request Remove @R1061, Change C718 value to 470pF, change C646 value to 220pF. X02 A
pin2 of R470 should have a 0ohm but de-pop resistor to USB_GPIO27 net.
Title
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D 68 8 HW 8/11/2009 Intel Intel review request add @R1504 for DDR3_DRAMRST#_CPU PD & add C1888 for PM_DRAMRST# to slow X02 D
down gate of FET

69 33 HW 8/11/2009 Richo Change pop option for R5U242 Change C21 from 10U to 47U, change R46 to C1889 (1uF) X02
70 38 HW 8/11/2009 Compal For DVI DOCK issue Add R1505-R1508 X02
71 21 HW 8/12/2009 Intel Follow CRB rev 1.6 schematic No stuff C111 and C112 X02
72 31 HW 8/12/2009 Broadcom Per Broadcom request pop R496 & R497 (0 ohm) X02
73 31 HW 8/12/2009 Compal Smart card EA result change R772 to 47 Ohm for resolving SC_CLK Rise/Fail timing issue X02
74 8 HW 8/12/2009 Intel Follow Intel S3 white paper rev0.9 pop R1504 & change C1888 to 470pF X02
75 37 HW 8/12/2009 DELL add a pull-up to +3.3V_ALW for IO_LOOP change R835.1 from +3.3V_ALW_PCH to +3.3V_ALW X02
76 37 HW 8/12/2009 Compal disconnect IO & DOCK VCT rename IO VCT to +LOM_VCT_IO & reserve C712 pad for test. X02
77 31 HW 8/13/2009 Broadcom Per Broadcom request need to have 4.7K pull-up to 3.3V_ALW for BCM5882 pin-C1 "RSTOUT_N" X02
78 8 HW 8/13/2009 DELL Avoid a glitch for DDR_HVREF_RST_GATE, change C1888 to 0.1u, add @R1511 for PM_DRAM_PWRGD_R X02
please add a 1.1K 1% no-stuff pull-up to
+1.5V_CPU_VDDQ rail on the PM_DRAM_PWRGD_R
signal for a back-up option
79 8,45 HW 8/13/2009 DELL CPU detection since the edge diode has been Add R1512 for CPU_DETECT# and connect JCPU.AH24 to U36.B18 X02
C removed from M'09 C
80 37 HW 8/14/2009 DELL Invert the EN_ESATA_RPTR signal and connect

Add @R1513 & @Q210, pop R1494 and de-pop R1497, change net name from X02
this to SATAGP4/GPIO16 GPIO16 to EN_ESATA_RPTR#
81 33 HW 8/14/2009 Compal Solve 1394 impedance issue Change R399, R400, R401, R403 to 54.9 ohm. X02
82 37 HW 8/14/2009 Compal EMI solution pop L30 & L31, de-pop R424-R427 X02
83 38 HW 8/17/2009 NV Solve DIV issue Add Q211-Q216, R1514-R1521 for SW DDC PU. X02
84 11 HW 8/17/2009 Compal PWR team request de-pop C66, C64, change C60-C63 to 330uF, C44-C59 to 10uF, can meet X02
Intel spec.
85 55 HW 8/18/2009 NV Reserve crystal for 27M. add @R1522, @y7, @C1890, @C1891 X02
86 26 HW 8/19/2009 Pericom 8200 pin 8,9 add cpas to minimize noise Add C1597 & C1598 X02
87 29 HW 8/19/2009 COMPAL EMI solution C676 to 150pF and R1295 to L4 (220 ohm), POP C1121-C1124, C1145-C1148 X02
88 33,34 HW 8/20/2009 COMPAL EMI solution for SD CLOCK & EXP card USB R8 change to 22 ohm, pop L64 & depop R791, R792 X02
89 11 HW 9/11/2009 DELL To meet Intel spec C60-C63, Margaux DIS-->330uF, Asics/Asics II-->470uF X02
90 55 HW 9/11/2009 DELL 27M crystal for NV add Y7, C1890, C1891, R1522, R1417, de-pop R617, R1317, R43, R39 X02
91 21 HW 9/11/2009 Intel Intel request de-pop C39, C610 X02
92 31 HW 9/11/2009 Broadcom Broadcom review feedback change C718 from 470p to .47u, C646 from 220p to .22u X02
B 93 30 HW 9/11/2009 Intel Follow Intel document request change R1502 to C427 10pF, C475, C476 to 33pF X02 B
94 35 HW 9/11/2009 Compal Add PD 10k for Minicard PWR Add R1523-R1525 X03
95 31 HW 10/23/2009 Compal Smart card connector DFM issue change JSC1 type (the same with Rothschild) X03
96 54 HW 10/23/2009 NV JTAG_TRST#: Populate R1372 with 1K resistor. Change R1372 to 1K and pop X03
97 40 HW 10/23/2009 COMPAL Board ID Change R98 to 4.3K ohm. X03
98 17 HW 10/23/2009 Intel Intel schematic check list 2.0 request R268 change from 1k ohm to 10k ohm, R672 change from 0.5% to 5% X03
99 40 HW 10/23/2009 SMSC SMSC review feed back R561 and R1046 are too large it is recommend that no PU/PD be larger X03
than 100K
100 12,42 HW 10/23/2009 COMPAL avoid double bleed off +3.3V_M, +3.3V_RUN, +1.5V_CPU_VDDQ power plane discharge circuit have X03
been pop, de-pop R612, R607, R1471.
101 36 HW 10/23/2009 DELL support WiMax LED status Need to populate R840 X03
102 16,32 HW 10/25/2009 COMPAL Change R910 placement Please put R910 close to PCH not TCM chip X03
103 41 HW 10/25/2009 COMPAL Touch Pad PU need to move from 5V to 3V R613, R614 change power rail from +5V_ALW to +3.3V_ALW X03
104 31 HW 10/28/2009 Broadcom For 5882-B0 request L71, L72 68nH, 2%, 400mA; C1070, C1071 1500pF, 2%, 50V; C1886, C1887 X03
150pF, 2%, 50V
105 29 HW 10/28/2009 IDT create a low pass filter with the pole set de-pop C1066 & C1067, R1090, R1089 ; R340 & R342, R1091 & R1092 change X03
A at 36kHz to filter out of band noise to 2k, add C1894-C1897 1000pF. A
110 29 HW 10/28/2009 COMPAL ME request for JSPK1 swap JSPK1 Pin 2 and pin 4 swap, pin 3 and pin 5 swap X03
Title
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D 111 8,12,13, HW 10/29/2009 DELL MEM SMBus design needs to change Move Q190 connection, add R1528,R1529, add net name DDR_XDP_CLK/DAT X03 D
15,16,28
112 31 HW 10/29/2009 DELL smart card clock resistor Change R772 from 47 ohm to 22 ohm X03
113 37 HW 10/29/2009 COMPAL EMI concern pop R15 with 10 ohm and C15 with 10pF X03
114 36 HW 10/29/2009 COMPAL USB_MCARD2_DET# change to +3.3V_ALW_PCH R447 pull up should change to +3.3V_ALW_PCH X03
115 40 HW 10/29/2009 COMPAL avoid RESET_OUT# double PD de-pop R5 X03
116 15 HW 11/02/2009 COMPAL EMI, RF team concern pop C300, C302 X03
117 24 HW 11/04/2009 COMPAL LCD power sequencing issue change R161 from 470 to 130 ohm . X03
118 37 HW 11/05/2009 COMPAL EMI concern Change choke vender from Murata to Delta on L30,L31 X03
119 29 HW 11/05/2009 COMPAL RF team concern X4 change from Sitime to TXC X03
120 15 HW 11/05/2009 COMPAL RTC issue Y1 & Y4 change from 30ppm to 10ppm. X03
121 15 HW 11/05/2009 COMPAL For flash ROM EOL issue U13 change from W25X32 to W25Q32 X03
122 19 HW 11/09/2009 DELL PCH driving the siganl low at GPIO15 initial add R1530 2.2K PU resistor to +3.3V_ALW_PCH on the SIO_EXT_WAKE# signal. X03
123 55 HW 11/10/2009 COMPAL By power team request Please pop 22u*2 at original reserved location C1722 and C1723. X03
124 39 HW 11/10/2009 DELL add a 10K 5% PU to +3.3V_RUN on ME_FWP Add R1531 X03
125 24, 53 HW 11/11/2009 NV By NV review request pop R180, de-pop R181; change GPU booting voltage setting, GPU_VID1: X03
C @Q4, 7@R1374, 8@R1361, GPU_VID4:pop R1379, GPU VID2: 7@R1357, 8@R1360, C
GPU_VID3: pop R1354

126 15,28 HW 11/13/2009 COMPAL To cut redundant trace for SMBUS Add @R1532/R1533/R1534/R1535 X03
127 19 HW 11/17/2009 Intel By Intel check list request Add R1544 for PCH GPIO34 X03
128 41 HW 12/24/2009 Compal To solve touch pad ESD issue Change L41 and L42 to R1545 & R1546 with 100 ohm. X03
129 29 HW 12/24/2009 Compal RF noise issue concern change Sitime 12MHz oscillator X4 to driver strength 1x X03
130 15 HW 12/24/2009 Intel Follow Intel check list rev2.0 Change R224 to tolerance from 5% to 1% X03
131 36 HW 12/24/2009 DELL Wimax LED abnormal operation. de-pop R1409 X03
132 11 HW 12/24/2009 Compal PWR team request Change C60-C63, add C66 to 330uF for Ascis/AsicsII X03
133 38 HW 12/24/2009 Compal Simplo battery slice EMI issue Add C1898 and C1899(Depop,reserve for EMI test) A00
134 31 HW 12/24/2009 Braodcom By Broadcom request Change L71,L72 from 68nH to 150nH, C1070,C1071 from 1500pF to A00
390pF.C1887, C1888 from 150pF to 390pF.
135 40 HW 12/30/2009 DELL Board ID Change R98 from 4.3K to 1K for A00 A00
136 33,34 HW 12/30/2009 COMPAL Change R5U242 to rev ES3 Change U94 from ES2 to ES3 A00
137 8,15 HW 12/30/2009 Intel De-pop XDP & JTAG resistor de-pop C19,C20,R6,R7,R68,R19,R3,R1153,R1156,R1157,R66,R1241,R780-R785, A00
R22,R24,R78,R91,R101-R116,C1375,R69,R118,R123,R804,R807,R805,R806,R1281,
B R1282,R1315 B
138 28,37 HW 01/15/2010 COMPAL Change Esata repeater for power save Change U95 U96 from 412 to 412A A00
139 27 HW 01/15/2010 COMPAL EMI concern Change L61-L63 to 27nH, C251-C253 to 2P, pop C390, C518, C996 A00
140 11 HW 01/18/2010 COMPAL No stuff MLCC caps to fix Acoustic noise de-pop C46, C48, C50, C52 A00
141 15 HW 01/21/2010 COMPAL For factory to do JTAG test Pop R123, R804-R807, R1281, R1282, R1315 A00
A A
Title
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Item P age# T itle D ate Issue D escription Solution D escription R ev.
O w ner
1 50 +VCORE_DSC 6/12 Dell Adjust Vimon ASICS and ASICS2 Change PR184 to 7.5K
D D
2 62 Graphic ASICS 6/19 TI Adjust compensation DSC Change PR370 to 43.2K, PR372 to 357K, PR373 to 22.6K, PC 306 to 0.022uF
ASICS/ASICS2 Change PR370&PR363 to 43.2K, PR372&PR362 to 357K, PR373&PR359 to 22.6K, PC306&PC297 to 0.022uF
Graphic ASICS DSC, ASICS and ASICS2 Change PD26 to PC327 68pF
62 6/19 TI Droop circuit add cap for filtering the
3
noise
Graphic ASICS Adjust to operate single phase DSC PR364,PR365,PC304,PC307 unpop and add PR421&PR422 0_ohm to avoid PIN3,4 floating
4 62 6/19 TI
Add PR420 0_ohm connect +5V_RUN to control PSI# for Single phase
5 Graphic ASICS add 0_ohm for cut power rail to debug Add PR423 PR424 PR425 PR426
62 6/30 TI
Graphic ASICS
TI CSS GC logic wrong issue Add PR427 180_ohm to GND
6 62 7/01
7 62 Graphic ASICS 7/2 ADC Change PR374 and PC310 reference GND to connect PR374 and PC310 pin1 to GPUVSS
C
Guangyong GPUVSS C
090612
8 50 +VCORE 7/14 Dell / change Cisense GND to VSUM- PC174 PC175 PC176 pin2 connect to VSUM-
intersil
9 52 Selector 7/16 Compal Add 1M_ohm pull down to fix ACAV_IN_NB Add PR429
oscillation when battery mode S5
10 52 Selector 7/22 TI new version CD3301 (PG2.1) dont need PD21 un-pop PD21 add PR430
11 53 Selector 7/22 TI DOCK_AC_OFF_EC floating issue add PR431
12 62 Graphic ASICS 8/3 TI Pin38 V5FILT is output pin. don't need to Delete connection to +5V_RUN
connect to power rail.
45 / 49 +5V/+3.3V 8/11 Compal / solve EMI issue pop PC32 PC33 PR36 PR39 PL15 PC155 PC165 PC182 PR153 PR173 PR191 PL24
13 50 / 51 +1.1VTT EMC add PL27
+Vcore
charger
B B
PR195 change to 619, PR175 change to 2.43K, PR387 change to 15K
14 50 +VCORE 8/13 Intersil Adjust Imon and Load line PR184 change to 8.45K, add PR432 34.8K and PQ75 (PR432 and PQ75 un-pop Merle 0820)
PC171 change to 0.068uF, PC183 add 0.022uF
15 49 +1.1VTT 8/13 DELL Improve ESD PQ74 change SB57002528L to SB00000DH0L
change PU13 to BQ24747 to improve IC ESD change PU13 from SA00001RK0L to SA00003KX0L
16 51 Charger 8/13 Dell / TI
to change strong
17 48 8/13 TI change from TPS51318 to SN0905030 change PU8 to SN0905030

+1.05V_VM_DSC
18 45 +5V/+3.3V 8/17 TI/Compal adjust OCP setting Change PR31 from 243K to 294K, PR32 from 232K to 261K(DSC) 158K(ASICS)
19 46 +1.5V_MEM_DSC 8/17 TI/Compal adjust OCP setting Change PR71 from 61.9K to 39.2K
20 50 +VCORE 0820 Dell EMC Add 2 2200pF caps. (jerry lin 0820) Add PC328 PC329
A A
Title
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C <Doc> 3.0
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R equest
Item P age# T itle D ate Issue D escription Solution D escription R ev.
O w ner
21 44 +DCIN 10/23 TI/Compal slow soft star to fast issue Change PR20 from 0_ohm to 10K.
D D
Change PR124 from 28.7K to 9.31K.

22 49 +1.1VTT 10/23 Intel VTT power good voltage level change
Change PR128 from 10K to 2.74K.
pop PC214 1000pF, PR234 4.7_ohm

23 51 Charger 10/23 Compal EMI EMI solution
ILIM = 30mV, un-pop PR104, PR103=0_ohm, PC130=220pF

PR110, PR120=1.58K_ohm ; PR113, PR122=6.98K_ohm ; PR114, PR123=0_ohm
24 49 +1.1VTT 10/23 Maxim fix VTT drop issue Ceq PC132, PC144 =0.22uF ; Filter PC133, PC145=un-pop ; PR115, PR129=0_ohm
REF capacitor PC137 change to 2.2nF ; REFIN PR117, PR118 and PR119 increase by 10x
Add PR432, PR433 for dual remote sense
25 51 Charger 10/23 TI Reduce CD3301 pin34 pin 35 peak current Change PR392 to 0805 size.
26 51 Charger 11/10 Compal ACAV_IN_NB level adjust. (10/29) Change PR246 from 21.5K to 22.6K
27 50 +Vcore 11/17 Compal pop PC190 PR201 for improve 2nd source pop PC190 PR201
FDIM
C
28 49 +1.1VTT 01/20 Maxim fix dual palse issue pop filter PC133, PC145=1000p ; PR115, PR129=10_ohm C
29 51 Charger 01/20 Compal reduce surge current. (for CD3301) Change PR392 form 0_ohm to 1ohm
change PC199 from 1uF to 0.1uF
30 51 Charger 01/20 Compal EMI can pass without this bead. un-pop PL27
remove for cost saving.
31 62 Graphic ASICS 8/3 Compal RF boardband issue pop PC295 PC311 820pF , pop PR361 PR371 4.7ohm.
32 49 +1.1VTT 01/20 Compal fix RF boardband issue change PC131 PC146 from 680pF to 820pF
RF/EMI
B B
A A
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Compal La-5573p r1.0 Schematics

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Compal La-5573p r1.0 Schematics

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A B C D E

PCB NO : LA-5573P ( DAA00001G00)

Block Diagram Thermal CPU/PCH XDP Port Clock Generator

CRT CONN 4MB (Socket G1) FAN

USB[7] USB[4] USB[5] page 29

POWER STATES USB PORT# DESTINATION

+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M

S5 S4/AC don't exist OFF OFF OFF OFF OFF

Lane 4 EXPRESS CARD

Lane 5 MINI CARD-3 PCIE/BKT

Lane 6 10/100/1G LAN

+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M

+1.8V_RUN +1.05V_1.1V_RUN_VTT +1.05V_M

C8 MEM_SMBDATA 200 DIMMA SMBUS Address [TBD]

G8 LAN_SMBDATA 31 LOM SMBUS Address [C8]

MEC 5035 2.2K

Compal Electronics, Inc.

+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V +3.3V_RUN

+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO

CKG_FFS_SMBDAT 31 13 BUF_EXP 1 2 CLK_BUF_EXP CLK_BUF_EXP 16

27P_0402_50V8J~D @ R39 33_0402_5%~D 1K_0402_5%~D

2 1 R17 1 2 0_0402_5%~D CLK_XTAL_OUT 27 100_0402_5%~D

R23 0 (DEFULT) 133MHz 133MHz

D29 PEG_CTX_GRX_C_N13 PEG_CTX_GRX_C_N2 C1671 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_N2 C28

D27 PEG_CTX_GRX_C_N14 C24

C26 PEG_CTX_GRX_C_N15 PEG_CTX_GRX_C_P3 C1672 2 1 0.1U_0402_10V7K~D PEG_CTX_GRX_P3 C22

PEG_TX[1] PEG_CTX_GRX_C_P2 PEG_CTX_GRX_C_N4 C1675 2 PEG_CTX_GRX_N4 VSS219

PEG_CTX_GRX_C_P11 C1688 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P11

PEG_CTX_GRX_C_P13 C1692 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P13

PEG_CTX_GRX_C_P14 C1694 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P14

PEG_CTX_GRX_C_P15 C1696 1 2 0.1U_0402_10V7K~D PEG_CTX_GRX_P15

R1487 PM_EXTTS# 23 GND6 GND7

R1088 0_0402_5%~D AT27 XDP_TRST#

17 H_PM_SYNC H_PM_SYNC AL15 AT29 XDP_TDI_R

Compal Electronics, Inc.

AA6 M_CLK_DDR0 W8 M_CLK_DDR2

AK7 SA_DQ[35] SA_DQS#[1] F8 AG4 SB_DQ[36] SB_DQS#[2] J4

DDR SYSTEM MEMORY - B

AJ13 PAD~D T31 @

Display Port Presence

1 : Disabled; No Physical Display Port

1.1V RAIL POWER

CPU CORE SUPPLY

R28 AJ34 VCCSENSE 50

A Margaux DIS-->330uFx4 (C60-C63) A

AN19 VAXG14 GFX_VID[6] AN24 AL31 VSS38 VSS118 W27

VAXG27 VDDQ3 VSS51 VSS131

VAXG34 VDDQ10 VSS58 VSS138

N10 AH13 L35

K10 AH6 L29

J22 AF2 K33

Populate R87 for Intel DDR3 R87 0_0402_5%~D +1.5V_MEM +1.5V_MEM

AO3420L_SOT23-3~D DQ19 VSS DDR_A_D28

DDR_HVREF_RST_GATE 8,14,40 VSS VSS

DDR_A_BS0 109 110 DDR_A_RAS#

DDR_A_WE# 113 114 DDR_CS0_DIMMA#

1 DDR_A_D41 149 150

+ DDR_A_DM5 153 154 DDR_A_DQS5

1 2 201 202 DDR_XDP_SMBCLK

DDR_B_CAS# 115 116 M_ODT2

145 146 DDR_B_D44

1 DDR_B_D41 149 150

+ DDR_B_DM5 153 154 DDR_B_DQS5