1MRK506370-UEN J en Technical Manual Line Distance Protection REL670 Version 2.2 IEC

Relion® 670 SERIES
Line distance protection REL670

Version 2.2 IEC
Technical manual
Document ID: 1MRK 506 370-UEN
Issued: October 2019
Revision: J
Product version: 2.2
© Copyright 2017 ABB. All rights reserved

Copyright
This document and parts thereof must not be reproduced or copied without written
permission from ABB, and the contents thereof must not be imparted to a third party, nor
used for any unauthorized purpose.
The software and hardware described in this document is furnished under a license and may
be used or disclosed only in accordance with the terms of such license.
This product includes software developed by the OpenSSL Project for use in the OpenSSL
Toolkit. (http://www.openssl.org/) This product includes cryptographic software written/
developed by: Eric Young (eay@cryptsoft.com) and Tim Hudson (tjh@cryptsoft.com).
Trademarks
ABB and Relion are registered trademarks of the ABB Group. All other brand or product names
mentioned in this document may be trademarks or registered trademarks of their respective
holders.
Warranty
Please inquire about the terms of warranty from your nearest ABB representative.
Disclaimer
The data, examples and diagrams in this manual are included solely for the concept or product
description and are not to be deemed as a statement of guaranteed properties. All persons
responsible for applying the equipment addressed in this manual must satisfy themselves that
each intended application is suitable and acceptable, including that any applicable safety or
other operational requirements are complied with. In particular, any risks in applications where
a system failure and/or product failure would create a risk for harm to property or persons
(including but not limited to personal injuries or death) shall be the sole responsibility of the
person or entity applying the equipment, and those so responsible are hereby requested to
ensure that all measures are taken to exclude or mitigate such risks.
This document has been carefully checked by ABB but deviations cannot be completely ruled
out. In case any errors are detected, the reader is kindly requested to notify the manufacturer.
Other than under explicit contractual commitments, in no event shall ABB be responsible or
liable for any loss or damage resulting from the use of this manual or the application of the
equipment.
Conformity
This product complies with the directive of the Council of the European Communities on the
approximation of the laws of the Member States relating to electromagnetic compatibility
(EMC Directive 2004/108/EC) and concerning electrical equipment for use within specified
voltage limits (Low-voltage directive 2006/95/EC). This conformity is the result of tests
conducted by ABB in accordance with the product standard EN 60255-26 for the EMC directive,
and with the product standards EN 60255-1 and EN 60255-27 for the low voltage directive. The
product is designed in accordance with the international standards of the IEC 60255 series.
Table of contents
Table of contents
Section 1 Introduction.................................................................................................. 45
1.1 This manual................................................................................................................................. 45
1.1.1 Presumptions for Technical Data......................................................................................... 45
1.2 Intended audience......................................................................................................................45
1.3 Product documentation............................................................................................................46
1.3.1 Product documentation set...................................................................................................46
1.3.2 Document revision history..................................................................................................... 47
1.3.3 Related documents.................................................................................................................. 47
1.4 Document symbols and conventions.....................................................................................48
1.4.1 Symbols......................................................................................................................................48
1.4.2 Document conventions...........................................................................................................49
1.5 IEC 61850 edition 1 / edition 2 mapping................................................................................51
Section 2 Available functions.......................................................................................59

2.1 Main protection functions........................................................................................................59
2.2 Back-up protection functions.................................................................................................. 61
2.3 Control and monitoring functions.......................................................................................... 62
2.4 Communication...........................................................................................................................71
2.5 Basic IED functions.................................................................................................................... 74
Section 3 Analog inputs................................................................................................ 77

3.1 Introduction................................................................................................................................. 77
3.2 Function block............................................................................................................................. 77
3.3 Signals...........................................................................................................................................77
3.4 Settings........................................................................................................................................80
3.5 Monitored data...........................................................................................................................86
3.6 Operation principle.................................................................................................................... 87
3.7 Technical data.............................................................................................................................88
Section 4 Binary input and output modules...............................................................91

4.1 Binary input..................................................................................................................................91
4.1.1 Binary input debounce filter...................................................................................................91
4.1.2 Oscillation filter........................................................................................................................ 91
4.1.3 Settings...................................................................................................................................... 91
4.1.3.1 Setting parameters for binary input modules.............................................................. 91
4.1.3.2 Setting parameters for binary input/output module................................................. 92
Section 5 Local Human-Machine-Interface LHMI ......................................................93

5.1 Local HMI screen behaviour..................................................................................................... 93
5.1.1 Identification.............................................................................................................................93
5.1.2 Settings...................................................................................................................................... 93
5.2 Local HMI signals........................................................................................................................93
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5.2.1 Identification.............................................................................................................................93
5.2.2 Function block.......................................................................................................................... 93
5.2.3 Signals........................................................................................................................................ 94
5.3 Basic part for LED indication module.................................................................................... 94
5.3.1 Identification............................................................................................................................ 94
5.3.2 Function block.......................................................................................................................... 94
5.3.3 Signals........................................................................................................................................ 95
5.3.4 Settings......................................................................................................................................95
5.4 LCD part for HMI function keys control module.................................................................. 96
5.4.1 Identification............................................................................................................................ 96
5.4.2 Function block.......................................................................................................................... 96
5.4.3 Signals........................................................................................................................................ 96
5.4.4 Settings...................................................................................................................................... 97
5.5 Operation principle....................................................................................................................98
5.5.1 Local HMI................................................................................................................................... 98
5.5.1.1 Keypad.................................................................................................................................. 99
5.5.1.2 Display................................................................................................................................. 101
5.5.1.3 LEDs.....................................................................................................................................103
5.5.2 LED configuration alternatives........................................................................................... 104
5.5.2.1 Functionality .....................................................................................................................104
5.5.2.2 Status LEDs........................................................................................................................104
5.5.2.3 Indication LEDs................................................................................................................. 105
5.5.3 Function keys...........................................................................................................................112
5.5.3.1 Functionality ......................................................................................................................112
5.5.3.2 Operation principle........................................................................................................... 112
5.5.3.3 Enabling and Disabling Authority on Function keys.................................................. 114
Section 6 Wide area measurement system.............................................................. 115

6.1 C37.118 Phasor Measurement Data Streaming Protocol Configuration PMUCONF... 115
6.1.1 Identification........................................................................................................................... 115
6.1.2 Functionality............................................................................................................................ 115
6.1.3 Operation principle................................................................................................................ 115
6.1.3.1 IEEE C37.118 Message Framework.................................................................................116
6.1.3.2 Short guidance for use of TCP........................................................................................ 117
6.1.3.3 Short guidance for use of UDP....................................................................................... 117
6.1.4 Settings.................................................................................................................................... 119
6.2 Protocol reporting via IEEE 1344 and C37.118 PMUREPORT.............................................121
6.2.1 Identification........................................................................................................................... 121
6.2.2 Functionality............................................................................................................................ 121
6.2.3 Function block.........................................................................................................................123
6.2.4 Signals.......................................................................................................................................125
6.2.5 Settings.................................................................................................................................... 129
6.2.6 Monitored data.......................................................................................................................140
6.2.7 Operation principle................................................................................................................144
6.2.7.1 Frequency reporting.........................................................................................................145
6.2.7.2 Reporting filters................................................................................................................146
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6.2.7.3 Scaling Factors for ANALOGREPORT channels........................................................... 147

6.2.8 Technical data.........................................................................................................................149
Section 7 Differential protection...............................................................................151

7.1 High impedance differential protection, single phase HZPDIF ......................................151
7.1.1 Identification........................................................................................................................... 151
7.1.2 Functionality............................................................................................................................ 151
7.1.3 Function block......................................................................................................................... 151
7.1.4 Signals.......................................................................................................................................151
7.1.5 Settings.................................................................................................................................... 152
7.1.6 Monitored data....................................................................................................................... 152
7.1.7.1 Logic diagram....................................................................................................................154
7.1.8 Technical data......................................................................................................................... 154
7.2 Additional security logic for differential protection LDRGFC ........................................ 155
7.2.1 Identification...........................................................................................................................155
7.2.2 Functionality............................................................................................................................155
7.2.3 Function block.........................................................................................................................156
7.2.4 Signals...................................................................................................................................... 156
7.2.5 Settings.................................................................................................................................... 157
7.2.6 Monitored data....................................................................................................................... 158
7.2.8 Technical data......................................................................................................................... 161
Section 8 Impedance protection............................................................................... 163

8.1 Distance measuring zones, quadrilateral characteristic ZMQPDIS,
ZMQAPDIS, ZDRDIR.................................................................................................................. 163
8.1.1 Identification...........................................................................................................................163
8.1.2 Functionality............................................................................................................................163
8.1.3 Function block........................................................................................................................ 164
8.1.4 Signals...................................................................................................................................... 165
8.1.5 Settings.................................................................................................................................... 166
8.1.6 Monitored data.......................................................................................................................169
8.1.7.1 Full scheme measurement.............................................................................................. 169
8.1.7.2 Impedance characteristic................................................................................................170
8.1.7.3 Minimum operating current............................................................................................174
8.1.7.4 Measuring principles........................................................................................................ 174
8.1.7.5 Directional impedance element for quadrilateral characteristics.......................... 176
8.1.7.6 Simplified logic diagrams............................................................................................... 178
8.1.8 Technical data......................................................................................................................... 181
8.2 Phase selection, quad, fixed angle, load encroachment FDPSPDIS............................... 182
8.2.1 Identification...........................................................................................................................182
8.2.1.1 Identification..................................................................................................................... 182
8.2.2 Functionality............................................................................................................................182
8.2.3 Function block.........................................................................................................................183
8.2.4 Signals...................................................................................................................................... 183

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8.2.5 Settings.................................................................................................................................... 184

8.2.6.1 Phase-to-earth fault......................................................................................................... 186
8.2.6.2 Phase-to-phase fault........................................................................................................188
8.2.6.3 Three-phase faults............................................................................................................189
8.2.6.4 Load encroachment......................................................................................................... 190
8.2.6.5 Minimum operate currents............................................................................................. 194
8.2.7 Technical data.........................................................................................................................199
8.3 Distance measuring zone, quadrilateral characteristic for series compensated
lines ZMCPDIS, ZMCAPDIS, ZDSRDIR....................................................................................199
8.3.1 Identification...........................................................................................................................199
8.3.2 Functionality........................................................................................................................... 200
8.3.3 Function block.........................................................................................................................201
8.3.4 Signals...................................................................................................................................... 201
8.3.5 Settings....................................................................................................................................203
8.3.6 Monitored data...................................................................................................................... 206
8.3.7.1 Full scheme measurement..............................................................................................207
8.3.7.2 Impedance characteristic............................................................................................... 207
8.3.7.3 Minimum operating current........................................................................................... 210
8.3.7.4 Measuring principles........................................................................................................210
8.3.7.5 Directionality for series compensation........................................................................ 213
8.3.8 Technical data......................................................................................................................... 217
8.4 Full-scheme distance measuring, Mho characteristic ZMHPDIS ................................... 218
8.4.1 Identification...........................................................................................................................218
8.4.2 Functionality............................................................................................................................218
8.4.3 Function block.........................................................................................................................219
8.4.4 Signals...................................................................................................................................... 219
8.4.5 Settings....................................................................................................................................220
8.4.6.3 Basic operation characteristics..................................................................................... 223
8.4.6.4 Theory of operation......................................................................................................... 225
8.4.7 Technical data.........................................................................................................................236
8.5 Full-scheme distance protection, quadrilateral for earth faults ZMMPDIS,
ZMMAPDIS..................................................................................................................................237
8.5.1 Identification...........................................................................................................................237
8.5.2 Functionality............................................................................................................................237
8.5.3 Function block........................................................................................................................ 238
8.5.4 Signals...................................................................................................................................... 238
8.5.5 Settings....................................................................................................................................239

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8.5.6.5 Directionality..................................................................................................................... 245
8.5.7 Technical data.........................................................................................................................250
8.6 Directional impedance element for mho characteristic and additional distance
protection directional function for earth faults ZDMRDIR, ZDARDIR............................250
8.6.1 Identification.......................................................................................................................... 250
8.6.2 Functionality............................................................................................................................251
8.6.3 Function block.........................................................................................................................251
8.6.4 Signals.......................................................................................................................................251
8.6.5 Settings.................................................................................................................................... 252
8.6.6 Monitored data.......................................................................................................................253
8.6.7.1 Directional impedance element for mho characteristic ZDMRDIR.........................254
8.6.7.2 Additional distance protection directional function for earth faults ZDARDIR...256
8.7 Mho impedance supervision logic ZSMGAPC..................................................................... 258
8.7.1 Identification.......................................................................................................................... 258
8.7.2 Functionality........................................................................................................................... 258
8.7.3 Function block........................................................................................................................ 258
8.7.4 Signals...................................................................................................................................... 259
8.7.5 Settings....................................................................................................................................259
8.7.6 Operation principle............................................................................................................... 260
8.7.6.1 Fault inception detection............................................................................................... 260
8.8 Faulty phase identification with load encroachment FMPSPDIS....................................261
8.8.1 Identification...........................................................................................................................261
8.8.2 Functionality............................................................................................................................261
8.8.3 Function block.........................................................................................................................261
8.8.4 Signals...................................................................................................................................... 261
8.8.5 Settings.................................................................................................................................... 262
8.8.6.1 The phase selection function......................................................................................... 263
8.8.7 Technical data......................................................................................................................... 273
8.9 Distance protection zone, quadrilateral characteristic, separate settings
ZMRPDIS, ZMRAPDIS and ZDRDIR......................................................................................... 273
8.9.1 Identification...........................................................................................................................273
8.9.2 Functionality........................................................................................................................... 274
8.9.3 Function block.........................................................................................................................275
8.9.4 Signals...................................................................................................................................... 275
8.9.5 Settings.................................................................................................................................... 277
8.9.6.2 Impedance characteristic............................................................................................... 280

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8.9.6.5 Directional impedance element for quadrilateral characteristics......................... 286
8.9.7 Technical data........................................................................................................................ 290
8.10 Phase selection, quadrilateral characteristic with settable angle FRPSPDIS...............291
8.10.1 Identification...........................................................................................................................291
8.10.2 Functionality............................................................................................................................291
8.10.3 Function block........................................................................................................................ 292
8.10.4 Signals...................................................................................................................................... 292
8.10.5 Settings....................................................................................................................................293
8.10.6.1 Phase-to-earth fault.........................................................................................................295
8.10.6.2 Phase-to-phase fault........................................................................................................297
8.10.6.3 Three-phase faults........................................................................................................... 299
8.10.6.5 Minimum operate currents.............................................................................................303
8.10.6.6 Simplified logic diagrams...............................................................................................303
8.10.7 Technical data.........................................................................................................................307
8.11 High speed distance protection ZMFPDIS..........................................................................308
8.11.1 Identification.......................................................................................................................... 308
8.11.2 Functionality........................................................................................................................... 308
8.11.3 Function block........................................................................................................................ 309
8.11.4 Signals......................................................................................................................................309
8.11.5 Settings.................................................................................................................................... 312
8.11.6 Monitored data....................................................................................................................... 317
8.11.7.1 Filtering...............................................................................................................................318
8.11.7.2 Distance measuring zones.............................................................................................. 319
8.11.7.3 Phase-selection element................................................................................................. 319
8.11.7.4 Directional criteria............................................................................................................ 321
8.11.7.5 Fuse failure......................................................................................................................... 321
8.11.7.6 Power swings.....................................................................................................................322
8.11.7.9 Simplified logic schemes................................................................................................ 334
8.11.7.10 Measurement.....................................................................................................................338
8.11.8 Technical data.........................................................................................................................343
8.12 High speed distance protection for series compensated lines ZMFCPDIS ................ 344
8.12.1 Identification.......................................................................................................................... 344
8.12.2 Functionality........................................................................................................................... 344
8.12.3 Function block........................................................................................................................ 345
8.12.4 Signals......................................................................................................................................346
8.12.5 Settings....................................................................................................................................348
8.12.6 Monitored data.......................................................................................................................355
8.12.7.1 Filtering.............................................................................................................................. 356

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8.12.7.2 Distance measuring zones............................................................................................. 356

8.12.7.3 Phase-selection element................................................................................................. 357
8.12.7.4 Directional criteria............................................................................................................358
8.12.7.5 Transient directional element........................................................................................359
8.12.7.6 Fuse failure........................................................................................................................ 360
8.12.7.7 Power swings.................................................................................................................... 360
8.12.7.8 Measurement principles................................................................................................. 360
8.12.7.9 Load encroachment..........................................................................................................372
8.12.7.10 Simplified logic schemes.................................................................................................372
8.12.7.11 Measurement.....................................................................................................................378
8.12.8 Technical data.........................................................................................................................383
8.13 Power swing detection ZMRPSB ..........................................................................................384
8.13.1 Identification.......................................................................................................................... 384
8.13.2 Functionality........................................................................................................................... 384
8.13.3 Function block........................................................................................................................ 384
8.13.4 Signals......................................................................................................................................384
8.13.5 Settings....................................................................................................................................385
8.13.6.1 Resistive reach in forward direction.............................................................................387
8.13.6.2 Resistive reach in reverse direction..............................................................................388
8.13.6.3 Reactive reach in forward and reverse direction....................................................... 388
8.13.6.4 Basic detection logic....................................................................................................... 389
8.13.6.5 Operating and inhibit conditions..................................................................................390
8.13.7 Technical data......................................................................................................................... 391
8.14 Automatic switch onto fault logic ZCVPSOF ..................................................................... 391
8.14.1 Identification...........................................................................................................................391
8.14.2 Functionality........................................................................................................................... 392
8.14.3 Function block........................................................................................................................ 392
8.14.4 Signals...................................................................................................................................... 392
8.14.5 Settings....................................................................................................................................392
8.14.6 Monitored data.......................................................................................................................393
8.14.8 Technical data.........................................................................................................................395
8.15 Power swing logic PSLPSCH ................................................................................................. 395
8.15.1 Identification.......................................................................................................................... 395
8.15.2 Functionality........................................................................................................................... 395
8.15.3 Function block........................................................................................................................ 396
8.15.4 Signals...................................................................................................................................... 396
8.15.5 Settings.................................................................................................................................... 397
8.15.6.1 Communication and tripping logic............................................................................... 397
8.15.6.2 Blocking logic.................................................................................................................... 398
8.16 Pole slip protection PSPPPAM .............................................................................................. 399
8.16.1 Identification.......................................................................................................................... 399
8.16.2 Functionality........................................................................................................................... 399
8.16.3 Function block........................................................................................................................400

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8.16.4 Signals..................................................................................................................................... 400

8.16.5 Settings....................................................................................................................................401
8.16.6 Monitored data.......................................................................................................................401
8.16.8 Technical data........................................................................................................................ 404
8.17 Out-of-step protection OOSPPAM....................................................................................... 405
8.17.1 Identification.......................................................................................................................... 405
8.17.2 Functionality...........................................................................................................................405
8.17.3 Function block........................................................................................................................405
8.17.4 Signals......................................................................................................................................406
8.17.5 Settings................................................................................................................................... 406
8.17.6 Monitored data...................................................................................................................... 407
8.17.7.1 Lens characteristic........................................................................................................... 410
8.17.7.2 Detecting an out-of-step condition.............................................................................. 412
8.17.7.3 Maximum slip frequency................................................................................................. 412
8.17.7.4 Taking care of the circuit breaker .................................................................................413
8.17.7.5 Design................................................................................................................................. 415
8.17.8 Technical data.........................................................................................................................416
8.18 Phase preference logic PPLPHIZ........................................................................................... 416
8.18.1 Identification...........................................................................................................................416
8.18.2 Functionality........................................................................................................................... 416
8.18.3 Function block.........................................................................................................................417
8.18.4 Signals...................................................................................................................................... 417
8.18.5 Settings.................................................................................................................................... 418
8.18.6.1 Residual current criteria.................................................................................................. 419
8.18.6.2 Phase selection................................................................................................................. 420
8.18.6.3 Preference logic.................................................................................................................421
8.18.6.4 Output.................................................................................................................................423
8.19 Phase preference logic PPL2PHIZ......................................................................................... 424
8.19.1 Identification.......................................................................................................................... 424
8.19.2 Functionality........................................................................................................................... 425
8.19.3 Function block........................................................................................................................ 425
8.19.4 Signals...................................................................................................................................... 425
8.19.5 Settings....................................................................................................................................426
8.19.6.1 Residual current criteria.................................................................................................. 427
8.19.6.2 Phase selection................................................................................................................. 428
8.19.6.3 Preference logic................................................................................................................ 429
8.19.6.4 Output.................................................................................................................................431
8.19.7 Technical data.........................................................................................................................432
Section 9 Current protection..................................................................................... 433

9.1 Instantaneous phase overcurrent protection PHPIOC .................................................... 433
9.1.1 Identification.......................................................................................................................... 433

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9.1.2 Functionality........................................................................................................................... 433

9.1.3 Function block........................................................................................................................ 433
9.1.4 Signals...................................................................................................................................... 433
9.1.5 Settings....................................................................................................................................434
9.1.6 Monitored data...................................................................................................................... 434
9.1.8 Technical data.........................................................................................................................435
9.2 Directional phase overcurrent protection, four steps OC4PTOC.................................. 436
9.2.1 Identification.......................................................................................................................... 436
9.2.2 Functionality........................................................................................................................... 436
9.2.3 Function block........................................................................................................................ 437
9.2.4 Signals...................................................................................................................................... 437
9.2.5 Settings....................................................................................................................................439
9.2.6 Monitored data...................................................................................................................... 444
9.2.8 Technical data........................................................................................................................ 450
9.3 Instantaneous residual overcurrent protection EFPIOC ................................................. 451
9.3.1 Identification...........................................................................................................................451
9.3.2 Functionality............................................................................................................................451
9.3.3 Function block........................................................................................................................ 451
9.3.4 Signals...................................................................................................................................... 451
9.3.5 Settings....................................................................................................................................452
9.3.6 Monitored data.......................................................................................................................452
9.3.8 Technical data.........................................................................................................................453
9.4 Directional residual overcurrent protection, four steps EF4PTOC ...............................454
9.4.1 Identification.......................................................................................................................... 454
9.4.2 Functionality........................................................................................................................... 454
9.4.3 Function block........................................................................................................................ 455
9.4.4 Signals......................................................................................................................................455
9.4.5 Settings....................................................................................................................................456
9.4.6 Monitored data.......................................................................................................................462
9.4.7.1 Operating quantity within the function.......................................................................462
9.4.7.2 Internal polarizing............................................................................................................ 463
9.4.7.3 External polarizing for earth-fault function................................................................465
9.4.7.4 Directional detection for earth fault function............................................................465
9.4.7.5 Base quantities within the protection......................................................................... 465
9.4.7.6 Internal earth-fault protection structure.................................................................... 465
9.4.7.7 Four residual overcurrent steps....................................................................................466
9.4.7.8 Directional supervision element with integrated directional
comparison function....................................................................................................... 467
9.4.7.9 Second harmonic blocking element............................................................................. 469
9.4.7.10 Switch on to fault feature............................................................................................... 471
9.4.8 Technical data.........................................................................................................................473
9.5 Four step directional negative phase sequence overcurrent protection NS4PTOC . 474

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9.5.1 Identification.......................................................................................................................... 474

9.5.2 Functionality........................................................................................................................... 474
9.5.3 Function block........................................................................................................................ 475
9.5.4 Signals...................................................................................................................................... 475
9.5.5 Settings....................................................................................................................................476
9.5.6 Monitored data...................................................................................................................... 480
9.5.7.1 Operating quantity within the function...................................................................... 480
9.5.7.2 Internal polarizing facility of the function................................................................... 481
9.5.7.3 External polarizing for negative sequence function..................................................481
9.5.7.4 Internal negative sequence protection structure......................................................482
9.5.7.5 Four negative sequence overcurrent stages.............................................................. 482
9.5.7.6 Directional supervision element with integrated directional comparison
function.............................................................................................................................. 483
9.5.8 Technical data........................................................................................................................ 485
9.6 Sensitive directional residual overcurrent and power protection SDEPSDE ..............486
9.6.1 Identification.......................................................................................................................... 486
9.6.2 Functionality........................................................................................................................... 486
9.6.3 Function block........................................................................................................................488
9.6.4 Signals......................................................................................................................................488
9.6.5 Settings................................................................................................................................... 489
9.6.6 Monitored data.......................................................................................................................491
9.6.7.1 Function inputs................................................................................................................. 491
9.6.8 Technical data.........................................................................................................................497
9.7 Thermal overload protection, one time constant, Celsius/Fahrenheit
LCPTTR/LFPTTR.......................................................................................................................498
9.7.1 Identification.......................................................................................................................... 498
9.7.2 Functionality........................................................................................................................... 498
9.7.3 Function block........................................................................................................................ 499
9.7.4 Signals......................................................................................................................................499
9.7.5 Settings................................................................................................................................... 500
9.7.6 Monitored data.......................................................................................................................502
9.7.8 Technical data........................................................................................................................ 505
9.8 Breaker failure protection CCRBRF...................................................................................... 505
9.8.1 Identification.......................................................................................................................... 505
9.8.2 Functionality........................................................................................................................... 505
9.8.3 Function block........................................................................................................................ 506
9.8.4 Signals......................................................................................................................................506
9.8.5 Settings....................................................................................................................................507
9.8.6 Monitored data...................................................................................................................... 508
9.8.8 Technical data......................................................................................................................... 513
9.9 Stub protection STBPTOC ..................................................................................................... 514
9.9.1 Identification...........................................................................................................................514

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9.9.2 Functionality............................................................................................................................514
9.9.3 Function block........................................................................................................................ 514
9.9.4 Signals...................................................................................................................................... 514
9.9.5 Settings.................................................................................................................................... 515
9.9.6 Monitored data....................................................................................................................... 515
9.9.8 Technical data......................................................................................................................... 516
9.10 Pole discordance protection CCPDSC..................................................................................516
9.10.1 Identification...........................................................................................................................516
9.10.2 Functionality............................................................................................................................517
9.10.3 Function block.........................................................................................................................517
9.10.4 Signals.......................................................................................................................................517
9.10.5 Settings.................................................................................................................................... 518
9.10.6 Monitored data....................................................................................................................... 518
9.10.7.1 Pole discordance signaling from circuit breaker....................................................... 520
9.10.7.2 Unsymmetrical current detection..................................................................................521
9.10.8 Technical data......................................................................................................................... 521
9.11 Directional underpower protection GUPPDUP................................................................... 521
9.11.1 Identification........................................................................................................................... 521
9.11.2 Functionality............................................................................................................................521
9.11.3 Function block........................................................................................................................ 522
9.11.4 Signals...................................................................................................................................... 523
9.11.5 Settings.................................................................................................................................... 523
9.11.6 Monitored data.......................................................................................................................525
9.11.7.1 Low pass filtering............................................................................................................. 526
9.11.7.2 Calibration of analog inputs...........................................................................................527
9.11.8 Technical data.........................................................................................................................528
9.12 Directional overpower protection GOPPDOP ....................................................................528
9.12.1 Identification.......................................................................................................................... 528
9.12.2 Functionality........................................................................................................................... 528
9.12.3 Function block........................................................................................................................ 529
9.12.4 Signals...................................................................................................................................... 529
9.12.5 Settings....................................................................................................................................530
9.12.6 Monitored data....................................................................................................................... 531
9.12.7.1 Low pass filtering............................................................................................................. 533
9.12.7.2 Calibration of analog inputs...........................................................................................533
9.12.8 Technical data.........................................................................................................................534
9.13 Broken conductor check BRCPTOC ..................................................................................... 535
9.13.1 Identification...........................................................................................................................535
9.13.2 Functionality........................................................................................................................... 535
9.13.3 Function block........................................................................................................................ 535
9.13.4 Signals...................................................................................................................................... 535
9.13.5 Settings....................................................................................................................................536

Technical manual
Table of contents
9.13.6 Monitored data.......................................................................................................................536

9.13.8 Technical data......................................................................................................................... 537
9.14 Voltage-restrained time overcurrent protection VRPVOC...............................................538
9.14.1 Identification.......................................................................................................................... 538
9.14.2 Functionality........................................................................................................................... 538
9.14.3 Function block........................................................................................................................ 538
9.14.4 Signals...................................................................................................................................... 538
9.14.5 Settings....................................................................................................................................539
9.14.6 Monitored data...................................................................................................................... 540
9.14.7.1 Measured quantities........................................................................................................540
9.14.7.2 Base quantities.................................................................................................................540
9.14.7.3 Overcurrent protection...................................................................................................540
9.14.7.4 Logic diagram................................................................................................................... 542
9.14.7.5 Undervoltage protection................................................................................................ 542
9.14.8 Technical data.........................................................................................................................543
Section 10 Voltage protection.....................................................................................545

10.1 Two step undervoltage protection UV2PTUV ................................................................... 545
10.1.1 Identification.......................................................................................................................... 545
10.1.2 Functionality........................................................................................................................... 545
10.1.3 Function block........................................................................................................................ 545
10.1.4 Signals......................................................................................................................................546
10.1.5 Settings....................................................................................................................................547
10.1.6 Monitored data...................................................................................................................... 549
10.1.7.1 Measurement principle................................................................................................... 549
10.1.7.2 Time delay..........................................................................................................................550
10.1.7.3 Blocking.............................................................................................................................. 555
10.1.7.4 Design................................................................................................................................. 556
10.1.8 Technical data.........................................................................................................................557
10.2 Two step overvoltage protection OV2PTOV ...................................................................... 557
10.2.1 Identification...........................................................................................................................557
10.2.2 Functionality OV2PTOV.........................................................................................................557
10.2.3 Function block........................................................................................................................ 558
10.2.4 Signals...................................................................................................................................... 558
10.2.5 Settings....................................................................................................................................559
10.2.6 Monitored data....................................................................................................................... 561
10.2.7.1 Measurement principle....................................................................................................562
10.2.7.2 Time delay.......................................................................................................................... 562
10.2.7.3 Blocking.............................................................................................................................. 567
10.2.7.4 Design................................................................................................................................. 567
10.2.8 Technical data........................................................................................................................ 568
10.3 Two step residual overvoltage protection ROV2PTOV ....................................................569

Technical manual
Table of contents
10.3.1 Identification.......................................................................................................................... 569

10.3.2 Functionality........................................................................................................................... 569
10.3.3 Function block........................................................................................................................ 569
10.3.4 Signals...................................................................................................................................... 570
10.3.5 Settings....................................................................................................................................570
10.3.6 Monitored data....................................................................................................................... 572
10.3.7.2 Time delay.......................................................................................................................... 572
10.3.7.3 Blocking.............................................................................................................................. 578
10.3.7.4 Design................................................................................................................................. 578
10.3.8 Technical data.........................................................................................................................579
10.4 Overexcitation protection OEXPVPH .................................................................................. 579
10.4.1 Identification...........................................................................................................................579
10.4.2 Functionality........................................................................................................................... 579
10.4.3 Function block........................................................................................................................580
10.4.4 Signals......................................................................................................................................580
10.4.5 Settings................................................................................................................................... 580
10.4.6 Monitored data....................................................................................................................... 581
10.4.7.1 Measured voltage.............................................................................................................584
10.4.7.2 Operate time of the overexcitation protection......................................................... 584
10.4.7.3 Cooling............................................................................................................................... 588
10.4.7.4 Overexcitation protection function measurands...................................................... 588
10.4.7.5 Overexcitation alarm....................................................................................................... 589
10.4.7.6 Logic diagram................................................................................................................... 589
10.4.8 Technical data........................................................................................................................ 589
10.5 Voltage differential protection VDCPTOV ......................................................................... 590
10.5.1 Identification.......................................................................................................................... 590
10.5.2 Functionality........................................................................................................................... 590
10.5.3 Function block........................................................................................................................ 590
10.5.4 Signals......................................................................................................................................590
10.5.5 Settings.................................................................................................................................... 591
10.5.6 Monitored data.......................................................................................................................592
10.5.8 Technical data.........................................................................................................................593
10.6 Loss of voltage check LOVPTUV .......................................................................................... 594
10.6.1 Identification.......................................................................................................................... 594
10.6.2 Functionality........................................................................................................................... 594
10.6.3 Function block........................................................................................................................ 594
10.6.4 Signals......................................................................................................................................594
10.6.5 Settings....................................................................................................................................595
10.6.7 Technical data........................................................................................................................ 596
10.7 Radial feeder protection PAPGAPC.......................................................................................597
10.7.1 Identification...........................................................................................................................597

Technical manual
Table of contents
10.7.2 Functionality........................................................................................................................... 597

10.7.3 Function block........................................................................................................................ 597
10.7.4 Signals......................................................................................................................................598
10.7.5 Settings....................................................................................................................................598
10.7.6 Monitored data...................................................................................................................... 599
10.7.7 Principle of operation........................................................................................................... 599
10.7.7.1 Faulted phase selection.................................................................................................. 599
10.7.7.2 Residual current detection.............................................................................................600
10.7.7.3 Fast fault clearance ......................................................................................................... 601
10.7.7.4 Delayed fault clearance................................................................................................... 601
10.7.7.5 Trip and autoreclose logic.............................................................................................. 602
10.7.8 Technical data........................................................................................................................ 603
Section 11 Frequency protection................................................................................ 605

11.1 Underfrequency protection SAPTUF ...................................................................................605
11.1.1 Identification.......................................................................................................................... 605
11.1.2 Functionality........................................................................................................................... 605
11.1.3 Function block........................................................................................................................ 605
11.1.4 Signals......................................................................................................................................606
11.1.5 Settings................................................................................................................................... 606
11.1.6.1 Measurement principle................................................................................................... 607
11.1.6.2 Time delay..........................................................................................................................607
11.1.6.3 Voltage dependent time delay...................................................................................... 608
11.1.6.4 Blocking..............................................................................................................................609
11.1.6.5 Design.................................................................................................................................609
11.1.7 Technical data.........................................................................................................................610
11.2 Overfrequency protection SAPTOF ..................................................................................... 610
11.2.1 Identification...........................................................................................................................610
11.2.2 Functionality........................................................................................................................... 610
11.2.3 Function block......................................................................................................................... 611
11.2.4 Signals.......................................................................................................................................611
11.2.5 Settings.................................................................................................................................... 611
11.2.6.1 Measurement principle.................................................................................................... 612
11.2.6.2 Time delay.......................................................................................................................... 612
11.2.6.3 Blocking.............................................................................................................................. 612
11.2.6.4 Design................................................................................................................................. 613
11.2.7 Technical data......................................................................................................................... 613
11.3 Rate-of-change of frequency protection SAPFRC ............................................................ 614
11.3.1 Identification...........................................................................................................................614
11.3.2 Functionality........................................................................................................................... 614
11.3.3 Function block........................................................................................................................ 614
11.3.4 Signals...................................................................................................................................... 614
11.3.5 Settings.................................................................................................................................... 615

Technical manual
Table of contents

11.3.6.2 Time delay.......................................................................................................................... 616
11.3.6.3 Blocking.............................................................................................................................. 616
11.3.6.4 Design................................................................................................................................. 616
11.3.7 Technical data......................................................................................................................... 617
Section 12 Multipurpose protection........................................................................... 619

12.1 General current and voltage protection CVGAPC.............................................................. 619
12.1.1 Identification...........................................................................................................................619
12.1.2 Functionality........................................................................................................................... 619
12.1.3 Function block........................................................................................................................ 619
12.1.4 Signals......................................................................................................................................620
12.1.5 Settings.................................................................................................................................... 621
12.1.6 Monitored data.......................................................................................................................628
12.1.7.1 Measured quantities within CVGAPC........................................................................... 628
12.1.7.2 Base quantities for CVGAPC function...........................................................................631
12.1.7.3 Built-in overcurrent protection steps........................................................................... 631
12.1.7.4 Built-in undercurrent protection steps........................................................................636
12.1.7.5 Built-in overvoltage protection steps.......................................................................... 636
12.1.7.6 Built-in undervoltage protection steps........................................................................636
12.1.7.7 Logic diagram................................................................................................................... 636
12.1.8 Technical data.........................................................................................................................641
Section 13 System protection and control................................................................ 643

13.1 Multipurpose filter SMAIHPAC.............................................................................................. 643
13.1.1 Identification.......................................................................................................................... 643
13.1.2 Functionality........................................................................................................................... 643
13.1.3 Function block........................................................................................................................ 643
13.1.4 Signals......................................................................................................................................643
13.1.5 Settings................................................................................................................................... 644
13.1.7 Filter calculation example.................................................................................................... 647
Section 14 Secondary system supervision................................................................ 649

14.1 Current circuit supervision CCSSPVC.................................................................................. 649
14.1.1 Identification.......................................................................................................................... 649
14.1.2 Functionality........................................................................................................................... 649
14.1.3 Function block........................................................................................................................ 649
14.1.4 Signals......................................................................................................................................649
14.1.5 Settings................................................................................................................................... 650
14.1.7 Technical data......................................................................................................................... 651
14.2 Fuse failure supervision FUFSPVC........................................................................................ 652
14.2.1 Identification.......................................................................................................................... 652
14.2.2 Functionality........................................................................................................................... 652
14.2.3 Function block........................................................................................................................ 652

Technical manual
Table of contents
14.2.4 Signals...................................................................................................................................... 653

14.2.5 Settings....................................................................................................................................654
14.2.6 Monitored data.......................................................................................................................655
14.2.7.1 Zero and negative sequence detection....................................................................... 655
14.2.7.2 Delta current and delta voltage detection.................................................................. 657
14.2.7.3 Dead line detection.......................................................................................................... 659
14.2.7.4 Main logic...........................................................................................................................660
14.2.8 Technical data.........................................................................................................................663
14.3 Fuse failure supervision VDSPVC.......................................................................................... 663
14.3.1 Identification.......................................................................................................................... 663
14.3.2 Functionality........................................................................................................................... 663
14.3.3 Function block........................................................................................................................ 664
14.3.4 Signals......................................................................................................................................664
14.3.5 Settings....................................................................................................................................665
14.3.6 Monitored data...................................................................................................................... 665
14.3.8 Technical data.........................................................................................................................667
14.4 Voltage based delta supervision DELVSPVC...................................................................... 667
14.4.1 Identification.......................................................................................................................... 667
14.4.2 Functionality........................................................................................................................... 667
14.4.3 Function block........................................................................................................................ 668
14.4.4 Signals......................................................................................................................................668
14.4.5 Settings................................................................................................................................... 669
14.4.6 Monitored data...................................................................................................................... 669
14.4.7.1 Minimum signal level check............................................................................................ 670
14.4.7.2 Mode of operation........................................................................................................... 670
14.4.7.3 Instantaneous 1 cycle / 2 cycle ..................................................................................... 670
14.4.7.4 RMS/DFT based supervision.......................................................................................... 671
14.4.7.5 Angle based supervision or vector shift supervision.................................................671
14.4.8 Technical data.........................................................................................................................673
14.5 Current based delta supervision DELISPVC........................................................................ 673
14.5.1 Identification...........................................................................................................................673
14.5.2 Functionality........................................................................................................................... 673
14.5.3 Function block........................................................................................................................ 674
14.5.4 Signals...................................................................................................................................... 674
14.5.5 Settings....................................................................................................................................675
14.5.6 Monitored data.......................................................................................................................675
14.5.7.1 Minimum signal level check............................................................................................ 676
14.5.7.2 Mode of operation............................................................................................................676
14.5.7.3 Instantaneous 1 cycle / 2 cycle ......................................................................................676
14.5.7.4 RMS/DFT based supervision.......................................................................................... 677
14.5.7.5 2nd Harmonic blocking..................................................................................................... 677
14.5.7.6 3rd Harmonic based adaption........................................................................................ 678

Technical manual
Table of contents
14.5.8 Technical data.........................................................................................................................679

14.6 Delta supervision of real input DELSPVC............................................................................ 679
14.6.1 Identification.......................................................................................................................... 679
14.6.2 Functionality........................................................................................................................... 679
14.6.3 Function block........................................................................................................................ 679
14.6.4 Signals......................................................................................................................................680
14.6.5 Settings................................................................................................................................... 680
Section 15 Control.........................................................................................................683
15.1 Synchrocheck, energizing check, and synchronizing SESRSYN...................................... 683
15.1.1 Identification.......................................................................................................................... 683
15.1.2 Functionality........................................................................................................................... 683
15.1.3 Function block........................................................................................................................ 684
15.1.4 Signals......................................................................................................................................684
15.1.5 Settings................................................................................................................................... 686
15.1.6 Monitored data...................................................................................................................... 688
15.1.7.1 Basic functionality............................................................................................................689
15.1.7.2 Logic diagrams................................................................................................................. 689
15.1.8 Technical data........................................................................................................................ 698
15.2 Autorecloser for 1 phase, 2 phase and/or 3 phase operation SMBRREC .....................699
15.2.1 Identification.......................................................................................................................... 700
15.2.2 Functionality........................................................................................................................... 700
15.2.3 Function block........................................................................................................................ 700
15.2.4 Signals...................................................................................................................................... 701
15.2.5 Settings....................................................................................................................................702
15.2.6.1 Terminology explanation................................................................................................ 704
15.2.6.2 Status descriptions..........................................................................................................704
15.2.6.3 Description of the status transition.............................................................................705
15.2.6.4 Functional sequence description..................................................................................706
15.2.6.5 Time sequence diagrams.................................................................................................717
15.2.7 Technical data.........................................................................................................................720
15.3 Interlocking ...............................................................................................................................720
15.3.1 Functionality........................................................................................................................... 720
15.3.3 Logical node for interlocking SCILO .................................................................................. 723
15.3.3.1 Identification..................................................................................................................... 723
15.3.3.2 Functionality...................................................................................................................... 723
15.3.3.3 Function block................................................................................................................... 723
15.3.3.4 Signals.................................................................................................................................724
15.3.3.5 Logic diagram....................................................................................................................724
15.3.4 Interlocking for busbar earthing switch BB_ES .............................................................. 724
15.3.4.1 Identification..................................................................................................................... 724
15.3.4.2 Functionality...................................................................................................................... 725

Technical manual
Table of contents
15.3.4.3 Function block................................................................................................................... 725

15.3.4.4 Logic diagram....................................................................................................................725
15.3.4.5 Signals.................................................................................................................................725
15.3.5 Interlocking for bus-section breaker A1A2_BS................................................................. 726
15.3.5.1 Identification..................................................................................................................... 726
15.3.5.2 Functionality...................................................................................................................... 726
15.3.5.3 Function block................................................................................................................... 727
15.3.5.4 Logic diagram....................................................................................................................727
15.3.5.5 Signals.................................................................................................................................728
15.3.6 Interlocking for bus-section disconnector A1A2_DC ..................................................... 729
15.3.6.1 Identification..................................................................................................................... 729
15.3.6.2 Functionality......................................................................................................................730
15.3.6.3 Function block...................................................................................................................730
15.3.6.4 Logic diagram.................................................................................................................... 731
15.3.6.5 Signals................................................................................................................................. 731
15.3.7 Interlocking for bus-coupler bay ABC_BC .........................................................................732
15.3.7.1 Identification..................................................................................................................... 732
15.3.7.2 Functionality...................................................................................................................... 732
15.3.7.3 Function block................................................................................................................... 733
15.3.7.4 Logic diagram................................................................................................................... 734
15.3.7.5 Signals.................................................................................................................................736
15.3.8 Interlocking for 1 1/2 CB BH ................................................................................................ 738
15.3.8.1 Identification..................................................................................................................... 738
15.3.8.2 Functionality...................................................................................................................... 738
15.3.8.3 Function blocks.................................................................................................................740
15.3.8.4 Logic diagrams................................................................................................................. 742
15.3.8.5 Signals.................................................................................................................................745
15.3.9 Interlocking for double CB bay DB .....................................................................................749
15.3.9.1 Identification.....................................................................................................................750
15.3.9.2 Functionality......................................................................................................................750
15.3.9.3 Logic diagrams.................................................................................................................. 751
15.3.9.4 Function block...................................................................................................................754
15.3.9.5 Signals.................................................................................................................................755
15.3.10 Interlocking for line bay ABC_LINE .................................................................................... 758
15.3.10.1 Identification..................................................................................................................... 758
15.3.10.2 Functionality......................................................................................................................758
15.3.10.3 Function block...................................................................................................................760
15.3.10.4 Logic diagram....................................................................................................................761
15.3.10.5 Signals.................................................................................................................................766
15.3.11 Interlocking for transformer bay AB_TRAFO ...................................................................768
15.3.11.1 Identification..................................................................................................................... 768
15.3.11.2 Functionality......................................................................................................................768
15.3.11.3 Function block...................................................................................................................769
15.3.11.4 Logic diagram................................................................................................................... 770
15.3.11.5 Signals................................................................................................................................. 771
15.3.12 Position evaluation POS_EVAL.............................................................................................773

Technical manual
Table of contents
15.3.12.1 Identification..................................................................................................................... 773

15.3.12.2 Functionality...................................................................................................................... 773
15.3.12.3 Function block................................................................................................................... 773
15.3.12.4 Logic diagram....................................................................................................................773
15.3.12.5 Signals.................................................................................................................................774
15.4 Apparatus control.................................................................................................................... 774
15.4.1 Functionality............................................................................................................................774
15.4.3 Error handling......................................................................................................................... 775
15.4.4 Bay control QCBAY.................................................................................................................778
15.4.4.1 Functionality...................................................................................................................... 778
15.4.4.2 Function block................................................................................................................... 779
15.4.4.3 Signals.................................................................................................................................779
15.4.4.4 Settings...............................................................................................................................779
15.4.4.5 Operation principle.......................................................................................................... 780
15.4.5 Local/Remote switch LOCREM............................................................................................781
15.4.5.1 Function block................................................................................................................... 782
15.4.5.2 Signals.................................................................................................................................782
15.4.5.3 Settings.............................................................................................................................. 783
15.4.6 Switch controller SCSWI....................................................................................................... 784
15.4.6.1 Functionality .....................................................................................................................784
15.4.6.2 Function block...................................................................................................................785
15.4.6.3 Signals.................................................................................................................................785
15.4.6.4 Settings...............................................................................................................................787
15.4.7 Circuit breaker SXCBR........................................................................................................... 792
15.4.7.1 Functionality ..................................................................................................................... 793
15.4.7.2 Function block................................................................................................................... 793
15.4.7.3 Signals.................................................................................................................................793
15.4.7.4 Settings.............................................................................................................................. 794
15.4.8 Circuit switch SXSWI..............................................................................................................797
15.4.8.1 Functionality .....................................................................................................................798
15.4.8.2 Function block...................................................................................................................798
15.4.8.3 Signals................................................................................................................................ 798
15.4.8.4 Settings.............................................................................................................................. 799
15.4.9 Proxy for signals from switching device via GOOSE XLNPROXY ................................ 803
15.4.9.1 Functionality..................................................................................................................... 803
15.4.9.2 Function block.................................................................................................................. 803
15.4.9.3 Signals................................................................................................................................ 804
15.4.9.4 Settings..............................................................................................................................805
15.4.9.5 Operation principle..........................................................................................................805
15.4.9.6 Position supervision........................................................................................................ 805
15.4.9.7 Command response evaluation.................................................................................... 805

Technical manual
Table of contents
15.4.10 Bay reserve QCRSV................................................................................................................ 807

15.4.10.1 Functionality......................................................................................................................807
15.4.10.2 Function block...................................................................................................................807
15.4.10.3 Signals................................................................................................................................ 807
15.4.10.4 Settings..............................................................................................................................808
15.4.11 Reservation input RESIN....................................................................................................... 810
15.4.11.1 Functionality......................................................................................................................810
15.4.11.2 Function block...................................................................................................................810
15.4.11.3 Signals................................................................................................................................. 811
15.4.11.4 Settings...............................................................................................................................812
15.4.11.5 Operation principle...........................................................................................................812
15.5 Logic rotating switch for function selection and LHMI presentation SLGAPC............813
15.5.1 Identification...........................................................................................................................813
15.5.2 Functionality............................................................................................................................813
15.5.3 Function block........................................................................................................................ 814
15.5.4 Signals...................................................................................................................................... 814
15.5.5 Settings.................................................................................................................................... 815
15.5.6 Monitored data.......................................................................................................................816
15.5.7.1 Graphical display...............................................................................................................816
15.6 Selector mini switch VSGAPC................................................................................................. 817
15.6.1 Identification........................................................................................................................... 817
15.6.2 Functionality............................................................................................................................817
15.6.3 Function block........................................................................................................................ 818
15.6.4 Signals...................................................................................................................................... 818
15.6.5 Settings.................................................................................................................................... 818
15.7 Generic communication function for Double Point indication DPGAPC.......................819
15.7.1 Identification...........................................................................................................................819
15.7.2 Functionality........................................................................................................................... 820
15.7.3 Function block........................................................................................................................ 820
15.7.4 Signals......................................................................................................................................820
15.7.5 Settings....................................................................................................................................820
15.8 Single point generic control 8 signals SPC8GAPC............................................................. 821
15.8.1 Identification...........................................................................................................................821
15.8.2 Functionality............................................................................................................................821
15.8.3 Function block.........................................................................................................................821
15.8.4 Signals...................................................................................................................................... 822
15.8.5 Settings.................................................................................................................................... 822
15.9 AutomationBits, command function for DNP3.0 AUTOBITS........................................... 823
15.9.1 Identification...........................................................................................................................823
15.9.2 Functionality........................................................................................................................... 823
15.9.3 Function block........................................................................................................................ 824

Technical manual
Table of contents
15.9.4 Signals...................................................................................................................................... 824

15.9.5 Settings....................................................................................................................................825
15.10 Single command, 16 signals SINGLECMD............................................................................826
15.10.1 Identification.......................................................................................................................... 826
15.10.2 Functionality........................................................................................................................... 826
15.10.3 Function block........................................................................................................................ 826
15.10.4 Signals...................................................................................................................................... 826
15.10.5 Settings.................................................................................................................................... 827
Section 16 Scheme communication............................................................................ 829

16.1 Scheme communication logic for distance or overcurrent protection ZCPSCH........ 829
16.1.1 Identification.......................................................................................................................... 829
16.1.2 Functionality........................................................................................................................... 829
16.1.3 Function block........................................................................................................................ 829
16.1.4 Signals......................................................................................................................................830
16.1.5 Settings................................................................................................................................... 830
16.1.6.1 Blocking scheme............................................................................................................... 831
16.1.6.2 Delta blocking scheme.................................................................................................... 832
16.1.6.3 Permissive underreaching scheme............................................................................... 832
16.1.6.4 Permissive overreaching scheme..................................................................................833
16.1.6.5 Unblocking scheme.......................................................................................................... 833
16.1.6.6 Intertrip scheme............................................................................................................... 834
16.1.6.7 Simplified logic diagram.................................................................................................834
16.1.7 Technical data.........................................................................................................................835
16.2 Phase segregated scheme communication logic for distance protection
ZC1PPSCH ................................................................................................................................. 836
16.2.1 Identification.......................................................................................................................... 836
16.2.2 Functionality........................................................................................................................... 836
16.2.3 Function block........................................................................................................................ 837
16.2.4 Signals...................................................................................................................................... 837
16.2.5 Settings....................................................................................................................................838
16.2.6.1 Blocking scheme...............................................................................................................839
16.2.6.2 Permissive underreach scheme.....................................................................................839
16.2.6.3 Permissive overreach scheme....................................................................................... 840
16.2.6.4 Unblocking scheme......................................................................................................... 840
16.2.6.5 Intertrip scheme...............................................................................................................840
16.2.6.6 Simplified logic diagram................................................................................................ 840
16.2.7 Technical data.........................................................................................................................842
16.3 Current reversal and Weak-end infeed logic for distance protection 3-phase
ZCRWPSCH ............................................................................................................................... 842
16.3.1 Identification.......................................................................................................................... 842
16.3.2 Functionality........................................................................................................................... 842
16.3.3 Function block........................................................................................................................ 843

Technical manual
Table of contents
16.3.4 Signals......................................................................................................................................843
16.3.5 Settings................................................................................................................................... 844
16.3.6.1 Current reversal logic...................................................................................................... 844
16.3.6.2 Weak-end infeed logic..................................................................................................... 845
16.3.7 Technical data........................................................................................................................ 846
16.4 Current reversal and weak-end infeed logic for phase segregated
communication ZC1WPSCH .................................................................................................. 847
16.4.1 Identification.......................................................................................................................... 847
16.4.2 Functionality........................................................................................................................... 847
16.4.3 Function block........................................................................................................................ 847
16.4.4 Signals......................................................................................................................................848
16.4.5 Settings................................................................................................................................... 849
16.4.6.1 Current reversal logic ..................................................................................................... 849
16.4.6.2 Weak-end infeed logic.....................................................................................................850
16.4.7 Technical data........................................................................................................................ 854
16.5 Local acceleration logic ZCLCPSCH..................................................................................... 854
16.5.1 Identification.......................................................................................................................... 854
16.5.2 Functionality........................................................................................................................... 854
16.5.3 Function block........................................................................................................................ 854
16.5.4 Signals...................................................................................................................................... 855
16.5.5 Settings....................................................................................................................................855
16.5.6.1 Zone extension................................................................................................................. 856
16.5.6.2 Loss-of-Load acceleration..............................................................................................856
16.6 Scheme communication logic for residual overcurrent protection ECPSCH ..............857
16.6.1 Identification...........................................................................................................................857
16.6.2 Functionality........................................................................................................................... 857
16.6.3 Function block........................................................................................................................ 858
16.6.4 Signals......................................................................................................................................858
16.6.5 Settings....................................................................................................................................859
16.6.6.1 Blocking scheme...............................................................................................................859
16.6.6.2 Permissive under/overreaching scheme.....................................................................860
16.6.6.3 Unblocking scheme.......................................................................................................... 861
16.6.7 Technical data.........................................................................................................................862
16.7 Current reversal and weak-end infeed logic for residual overcurrent protection
ECRWPSCH................................................................................................................................ 862
16.7.1 Identification.......................................................................................................................... 862
16.7.2 Functionality........................................................................................................................... 863
16.7.3 Function block........................................................................................................................ 863
16.7.4 Signals...................................................................................................................................... 863
16.7.5 Settings................................................................................................................................... 864
16.7.6.1 Directional comparison logic function........................................................................ 864

Technical manual
Table of contents
16.7.6.2 Fault current reversal logic.............................................................................................865

16.7.6.3 Weak-end infeed logic..................................................................................................... 865
16.7.7 Technical data.........................................................................................................................867
16.8 Direct transfer trip logic......................................................................................................... 867
16.8.1 Introduction............................................................................................................................ 867
16.8.2 Low active power and power factor protection LAPPGAPC......................................... 868
16.8.2.1 Identification.....................................................................................................................868
16.8.2.2 Functionality..................................................................................................................... 869
16.8.2.3 Function block.................................................................................................................. 869
16.8.2.4 Signals................................................................................................................................ 869
16.8.2.5 Settings.............................................................................................................................. 870
16.8.2.6 Monitored data..................................................................................................................871
16.8.2.7 Operation principle...........................................................................................................871
16.8.2.8 Technical data................................................................................................................... 873
16.8.3 Compensated over and undervoltage protection COUVGAPC..................................... 873
16.8.3.1 Identification..................................................................................................................... 873
16.8.3.2 Functionality...................................................................................................................... 873
16.8.3.3 Function block...................................................................................................................874
16.8.3.4 Signals................................................................................................................................ 874
16.8.3.5 Settings.............................................................................................................................. 875
16.8.3.6 Monitored data................................................................................................................. 876
16.8.3.8 Technical data................................................................................................................... 877
16.8.4 Sudden change in current variation SCCVPTOC..............................................................878
16.8.4.1 Identification..................................................................................................................... 878
16.8.4.2 Functionality......................................................................................................................878
16.8.4.3 Function block...................................................................................................................878
16.8.4.4 Signals................................................................................................................................ 878
16.8.4.5 Settings.............................................................................................................................. 879
16.8.4.7 Technical data...................................................................................................................880
16.8.5 Carrier receive logic LCCRPTRC.......................................................................................... 880
16.8.5.1 Identification.................................................................................................................... 880
16.8.5.2 Functionality..................................................................................................................... 880
16.8.5.3 Function block................................................................................................................... 881
16.8.5.4 Signals.................................................................................................................................881
16.8.5.5 Settings.............................................................................................................................. 881
16.8.5.7 Technical data................................................................................................................... 882
16.8.6 Negative sequence overvoltage protection LCNSPTOV................................................ 882
16.8.6.1 Identification.....................................................................................................................882
16.8.6.2 Functionality......................................................................................................................882
16.8.6.3 Function block...................................................................................................................882
16.8.6.4 Signals................................................................................................................................ 883
16.8.6.5 Settings.............................................................................................................................. 883
16.8.6.6 Monitored data................................................................................................................. 883

Technical manual
Table of contents

16.8.6.8 Technical data...................................................................................................................884
16.8.7 Zero sequence overvoltage protection LCZSPTOV........................................................ 884
16.8.7.1 Identification.....................................................................................................................884
16.8.7.2 Functionality..................................................................................................................... 884
16.8.7.3 Function block.................................................................................................................. 884
16.8.7.4 Signals................................................................................................................................ 885
16.8.7.5 Settings.............................................................................................................................. 885
16.8.7.6 Monitored data................................................................................................................. 885
16.8.7.8 Technical data...................................................................................................................886
16.8.8 Negative sequence overcurrent protection LCNSPTOC................................................ 886
16.8.8.1 Identification.....................................................................................................................886
16.8.8.2 Functionality..................................................................................................................... 886
16.8.8.3 Function block.................................................................................................................. 886
16.8.8.4 Signals................................................................................................................................ 887
16.8.8.5 Settings.............................................................................................................................. 887
16.8.8.6 Monitored data................................................................................................................. 887
16.8.8.8 Technical data...................................................................................................................888
16.8.9 Zero sequence overcurrent protection LCZSPTOC........................................................ 888
16.8.9.1 Identification.....................................................................................................................888
16.8.9.2 Functionality..................................................................................................................... 888
16.8.9.3 Function block.................................................................................................................. 889
16.8.9.4 Signals................................................................................................................................ 889
16.8.9.5 Settings.............................................................................................................................. 889
16.8.9.6 Monitored data.................................................................................................................889
16.8.9.8 Technical data...................................................................................................................890
16.8.10 Three phase overcurrent LCP3PTOC................................................................................. 890
16.8.10.1 Identification.................................................................................................................... 890
16.8.10.2 Functionality..................................................................................................................... 890
16.8.10.3 Function block................................................................................................................... 891
16.8.10.4 Signals.................................................................................................................................891
16.8.10.5 Settings.............................................................................................................................. 892
16.8.10.6 Monitored data................................................................................................................. 892
16.8.10.8 Technical data................................................................................................................... 892
16.8.11 Three phase undercurrent LCP3PTUC............................................................................... 893
16.8.11.1 Identification.....................................................................................................................893
16.8.11.2 Functionality......................................................................................................................893
16.8.11.3 Function block...................................................................................................................893
16.8.11.4 Signals................................................................................................................................ 894
16.8.11.5 Settings.............................................................................................................................. 894
16.8.11.6 Monitored data.................................................................................................................894

Technical manual
Table of contents
16.8.11.8 Technical data................................................................................................................... 895
Section 17 Logic.............................................................................................................897
17.1 Tripping logic SMPPTRC ........................................................................................................ 897
17.1.1 Identification.......................................................................................................................... 897
17.1.2 Functionality........................................................................................................................... 897
17.1.3 Function block........................................................................................................................ 897
17.1.4 Signals......................................................................................................................................898
17.1.5 Settings................................................................................................................................... 899
17.1.6.1 Logic diagram................................................................................................................... 902
17.1.7 Technical data........................................................................................................................ 905
17.2 General start matrix block SMAGAPC.................................................................................. 905
17.2.1 Identification.......................................................................................................................... 905
17.2.2 Functionality........................................................................................................................... 905
17.2.3 Function block........................................................................................................................ 905
17.2.4 Signals......................................................................................................................................906
17.2.5 Settings................................................................................................................................... 906
17.3 Trip matrix logic TMAGAPC.....................................................................................................911
17.3.1 Identification........................................................................................................................... 911
17.3.2 Functionality............................................................................................................................912
17.3.3 Function block.........................................................................................................................912
17.3.4 Signals...................................................................................................................................... 912
17.3.5 Settings.................................................................................................................................... 914
17.3.7 Technical data......................................................................................................................... 915
17.4 Logic for group alarm ALMCALH...........................................................................................915
17.4.1 Identification...........................................................................................................................915
17.4.2 Functionality............................................................................................................................915
17.4.3 Function block........................................................................................................................ 916
17.4.4 Signals...................................................................................................................................... 916
17.4.5 Settings.................................................................................................................................... 917
17.4.7 Technical data......................................................................................................................... 917
17.5 Logic for group warning WRNCALH......................................................................................917
17.5.1 Identification........................................................................................................................... 917
17.5.2 Functionality............................................................................................................................917
17.5.3 Function block........................................................................................................................ 918
17.5.4 Signals...................................................................................................................................... 918
17.5.5 Settings.................................................................................................................................... 919
17.5.7 Technical data.........................................................................................................................919
17.6 Logic for group indication INDCALH.................................................................................... 919
17.6.1 Identification...........................................................................................................................919
17.6.2 Functionality........................................................................................................................... 919

Technical manual
Table of contents
17.6.3 Function block........................................................................................................................ 920

17.6.4 Signals......................................................................................................................................920
17.6.5 Settings.................................................................................................................................... 921
17.6.7 Technical data......................................................................................................................... 921
17.7 Basic configurable logic blocks............................................................................................. 921
17.7.1 AND function block AND....................................................................................................... 922
17.7.1.1 Function block...................................................................................................................922
17.7.1.2 Signals.................................................................................................................................923
17.7.1.3 Technical data................................................................................................................... 923
17.7.2 Controllable gate function block GATE............................................................................. 923
17.7.2.1 Function block...................................................................................................................923
17.7.2.2 Signals.................................................................................................................................923
17.7.2.3 Settings.............................................................................................................................. 924
17.7.2.4 Technical data................................................................................................................... 924
17.7.3 Inverter function block INV.................................................................................................. 924
17.7.3.1 Function block...................................................................................................................924
17.7.3.2 Signals................................................................................................................................ 924
17.7.3.3 Technical data................................................................................................................... 925
17.7.4 Loop delay function block LLD............................................................................................ 925
17.7.4.1 Function block...................................................................................................................925
17.7.4.2 Signals.................................................................................................................................925
17.7.4.3 Technical data................................................................................................................... 925
17.7.5 OR function block...................................................................................................................925
17.7.5.1 Function block...................................................................................................................926
17.7.5.2 Signals................................................................................................................................ 926
17.7.5.3 Technical data................................................................................................................... 926
17.7.6 Pulse timer function block PULSETIMER...........................................................................926
17.7.6.1 Function block................................................................................................................... 927
17.7.6.2 Signals.................................................................................................................................927
17.7.6.3 Settings.............................................................................................................................. 927
17.7.6.4 Technical data................................................................................................................... 927
17.7.7 Reset-set with memory function block RSMEMORY....................................................... 927
17.7.7.1 Function block...................................................................................................................928
17.7.7.2 Signals................................................................................................................................ 928
17.7.7.3 Settings.............................................................................................................................. 928
17.7.7.4 Technical data................................................................................................................... 928
17.7.8 Set-reset with memory function block SRMEMORY....................................................... 929
17.7.8.1 Function block...................................................................................................................929
17.7.8.2 Signals................................................................................................................................ 929
17.7.8.3 Settings.............................................................................................................................. 929
17.7.8.4 Technical data...................................................................................................................930
17.7.9 Settable timer function block TIMERSET.......................................................................... 930
17.7.9.1 Function block.................................................................................................................. 930
17.7.9.2 Signals................................................................................................................................ 930
17.7.9.3 Settings...............................................................................................................................931

Technical manual
Table of contents
17.7.9.4 Technical data....................................................................................................................931

17.7.10 Exclusive OR function block XOR........................................................................................ 931
17.7.10.1 Function block................................................................................................................... 931
17.7.10.2 Signals.................................................................................................................................932
17.7.10.3 Technical data................................................................................................................... 932
17.8 Configurable logic blocks Q/T...............................................................................................932
17.8.1 ANDQT function block...........................................................................................................933
17.8.1.1 Function block...................................................................................................................933
17.8.1.2 Signals.................................................................................................................................933
17.8.1.3 Technical data................................................................................................................... 934
17.8.2 Single point indication related signals combining function block INDCOMBSPQT.934
17.8.2.1 Function block...................................................................................................................934
17.8.2.2 Signals................................................................................................................................ 934
17.8.2.3 Technical data................................................................................................................... 935
17.8.3 Single point input signal attributes converting function block INDEXTSPQT.......... 935
17.8.3.1 Function block...................................................................................................................935
17.8.3.2 Signals................................................................................................................................ 935
17.8.3.3 Technical data................................................................................................................... 936
17.8.4 Invalid logic function block INVALIDQT............................................................................. 936
17.8.4.1 Function block...................................................................................................................936
17.8.4.2 Signals.................................................................................................................................937
17.8.4.3 Technical data................................................................................................................... 938
17.8.5 Inverter function block INVERTERQT................................................................................. 938
17.8.5.1 Function block...................................................................................................................938
17.8.5.2 Signals................................................................................................................................ 938
17.8.5.3 Technical data................................................................................................................... 938
17.8.6 ORQT function block............................................................................................................. 938
17.8.6.1 Function block...................................................................................................................939
17.8.6.2 Signals................................................................................................................................ 939
17.8.6.3 Technical data................................................................................................................... 939
17.8.7 Pulse timer function block PULSETIMERQT..................................................................... 939
17.8.7.1 Function block.................................................................................................................. 940
17.8.7.2 Signals................................................................................................................................ 940
17.8.7.3 Settings..............................................................................................................................940
17.8.7.4 Technical data...................................................................................................................940
17.8.8 Reset/Set function block RSMEMORYQT..........................................................................941
17.8.8.1 Function block................................................................................................................... 941
17.8.8.2 Signals.................................................................................................................................941
17.8.8.3 Settings.............................................................................................................................. 942
17.8.8.4 Technical data................................................................................................................... 942
17.8.9 Set/Reset function block SRMEMORYQT......................................................................... 942
17.8.9.1 Function block...................................................................................................................942
17.8.9.2 Signals................................................................................................................................ 942
17.8.9.3 Settings.............................................................................................................................. 943
17.8.9.4 Technical data................................................................................................................... 943
17.8.10 Settable timer function block TIMERSETQT.....................................................................943

Technical manual
Table of contents
17.8.10.1 Function block...................................................................................................................943

17.8.10.2 Signals................................................................................................................................ 944
17.8.10.3 Settings..............................................................................................................................944
17.8.10.4 Technical data...................................................................................................................944
17.8.11 Exclusive OR function block XORQT.................................................................................. 944
17.8.11.1 Function block.................................................................................................................. 945
17.8.11.2 Signals................................................................................................................................ 945
17.8.11.3 Technical data...................................................................................................................945
17.9 Extension logic package.........................................................................................................945
17.10 Fixed signals FXDSIGN............................................................................................................946
17.10.1 Identification.......................................................................................................................... 946
17.10.2 Functionality........................................................................................................................... 946
17.10.3 Function block........................................................................................................................ 946
17.10.4 Signals...................................................................................................................................... 947
17.10.5 Settings....................................................................................................................................947
17.11 Boolean 16 to Integer conversion B16I.................................................................................947
17.11.1 Identification.......................................................................................................................... 947
17.11.2 Functionality........................................................................................................................... 947
17.11.3 Function block........................................................................................................................ 948
17.11.4 Signals......................................................................................................................................948
17.11.5 Monitored data...................................................................................................................... 949
17.11.6 Settings................................................................................................................................... 949
17.11.8 Technical data........................................................................................................................ 950
17.12 Boolean to integer conversion with logical node representation, 16 bit BTIGAPC.... 950
17.12.1 Identification.......................................................................................................................... 950
17.12.2 Functionality........................................................................................................................... 950
17.12.3 Function block........................................................................................................................ 950
17.12.4 Signals...................................................................................................................................... 951
17.12.5 Settings.................................................................................................................................... 951
17.12.6 Monitored data....................................................................................................................... 951
17.12.8 Technical data.........................................................................................................................952
17.13 Integer to boolean 16 conversion IB16.................................................................................952
17.13.1 Identification.......................................................................................................................... 952
17.13.2 Functionality........................................................................................................................... 953
17.13.3 Function block........................................................................................................................ 953
17.13.4 Signals...................................................................................................................................... 953
17.13.5 Setting parameters............................................................................................................... 954
17.13.7 Technical data.........................................................................................................................955
17.14 Integer to Boolean 16 conversion with logic node representation ITBGAPC...............955
17.14.1 Identification.......................................................................................................................... 955
17.14.2 Functionality........................................................................................................................... 955
17.14.3 Function block........................................................................................................................ 956

Technical manual
Table of contents
17.14.4 Signals......................................................................................................................................956
17.14.5 Settings....................................................................................................................................957
17.14.7 Technical data........................................................................................................................ 958
17.15 Elapsed time integrator with limit transgression and overflow supervision
TEIGAPC..................................................................................................................................... 958
17.15.1 Identification.......................................................................................................................... 958
17.15.2 Functionality........................................................................................................................... 958
17.15.3 Function block........................................................................................................................ 959
17.15.4 Signals......................................................................................................................................959
17.15.5 Settings....................................................................................................................................959
17.15.6.1 Operation accuracy.......................................................................................................... 961
17.15.6.2 Memory storage................................................................................................................961
17.15.7 Technical data.........................................................................................................................961
17.16 Comparator for integer inputs INTCOMP........................................................................... 961
17.16.1 Identification...........................................................................................................................961
17.16.2 Functionality........................................................................................................................... 962
17.16.3 Function block........................................................................................................................ 962
17.16.4 Signals...................................................................................................................................... 962
17.16.5 Settings....................................................................................................................................962
17.16.6 Monitored data.......................................................................................................................963
17.16.8 Technical data........................................................................................................................ 964
17.17 Comparator for real inputs REALCOMP.............................................................................. 964
17.17.1 Identification.......................................................................................................................... 964
17.17.2 Functionality........................................................................................................................... 964
17.17.3 Function block........................................................................................................................ 964
17.17.4 Signals......................................................................................................................................964
17.17.5 Settings....................................................................................................................................965
17.17.7 Technical data.........................................................................................................................967
Section 18 Monitoring.................................................................................................. 969

18.1 Measurements.......................................................................................................................... 969
18.1.1 Identification.......................................................................................................................... 969
18.1.2 Functionality........................................................................................................................... 969
18.1.3 Function block........................................................................................................................ 970
18.1.4 Signals...................................................................................................................................... 972
18.1.5 Settings....................................................................................................................................975
18.1.6 Monitored data...................................................................................................................... 986
18.1.7.1 Measurement supervision.............................................................................................. 988
18.1.7.2 Measurements CVMMXN................................................................................................ 993
18.1.7.3 Phase current measurement CMMXU.......................................................................... 998
18.1.7.4 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU...... 998
18.1.7.5 Voltage and current sequence measurements VMSQI, CMSQI...............................998

Technical manual
Table of contents
18.1.8 Technical data........................................................................................................................ 998

18.2 Gas medium supervision SSIMG......................................................................................... 1000
18.2.1 Identification........................................................................................................................ 1000
18.2.2 Functionality.........................................................................................................................1000
18.2.3 Function block......................................................................................................................1000
18.2.4 Signals.................................................................................................................................... 1001
18.2.5 Settings.................................................................................................................................. 1001
18.2.6 Monitored data.....................................................................................................................1002
18.2.7 Operation principle..............................................................................................................1002
18.2.8 Technical data...................................................................................................................... 1003
18.3 Liquid medium supervision SSIML..................................................................................... 1003
18.3.1 Identification........................................................................................................................ 1003
18.3.2 Functionality......................................................................................................................... 1003
18.3.3 Function block......................................................................................................................1004
18.3.4 Signals....................................................................................................................................1004
18.3.5 Settings................................................................................................................................. 1005
18.3.6 Monitored data.................................................................................................................... 1005
18.3.7 Operation principle............................................................................................................. 1005
18.3.8 Technical data...................................................................................................................... 1006
18.4 Breaker monitoring SSCBR.................................................................................................. 1006
18.4.1 Identification........................................................................................................................ 1006
18.4.2 Functionality......................................................................................................................... 1007
18.4.3 Function block...................................................................................................................... 1007
18.4.4 Signals.................................................................................................................................... 1007
18.4.5 Settings................................................................................................................................. 1008
18.4.6 Monitored data.................................................................................................................... 1009
18.4.7.1 Circuit breaker contact travel time............................................................................. 1012
18.4.7.2 Circuit breaker status.................................................................................................... 1013
18.4.7.3 Remaining life of circuit breaker..................................................................................1013
18.4.7.4 Accumulated energy.......................................................................................................1014
18.4.7.5 Circuit breaker operation cycles.................................................................................. 1015
18.4.7.6 Circuit breaker operation monitoring........................................................................ 1016
18.4.7.7 Circuit breaker spring charge monitoring................................................................. 1017
18.4.7.8 Circuit breaker gas pressure indication..................................................................... 1017
18.4.8 Technical data....................................................................................................................... 1018
18.5 Event function EVENT............................................................................................................1018
18.5.1 Identification.........................................................................................................................1018
18.5.2 Functionality..........................................................................................................................1019
18.5.3 Function block.......................................................................................................................1019
18.5.4 Signals.................................................................................................................................... 1019
18.5.5 Settings..................................................................................................................................1020
18.6 Disturbance report DRPRDRE.............................................................................................. 1023
18.6.1 Identification.........................................................................................................................1023
18.6.2 Functionality......................................................................................................................... 1023

Technical manual
Table of contents
18.6.3 Function block...................................................................................................................... 1024

18.6.4 Signals.................................................................................................................................... 1025
18.6.5 Settings..................................................................................................................................1026
18.6.6 Monitored data.....................................................................................................................1032
18.6.8 Technical data.......................................................................................................................1042
18.7 Logical signal status report BINSTATREP......................................................................... 1042
18.7.1 Identification........................................................................................................................ 1042
18.7.2 Functionality......................................................................................................................... 1042
18.7.3 Function block...................................................................................................................... 1043
18.7.4 Signals.................................................................................................................................... 1043
18.7.5 Settings................................................................................................................................. 1044
18.8 Measured value expander block RANGE_XP..................................................................... 1045
18.8.1 Identification........................................................................................................................ 1045
18.8.2 Functionality......................................................................................................................... 1045
18.8.3 Function block...................................................................................................................... 1045
18.8.4 Signals....................................................................................................................................1045
18.9 Fault locator LMBRFLO......................................................................................................... 1046
18.9.1 Identification........................................................................................................................ 1046
18.9.2 Functionality......................................................................................................................... 1046
18.9.3 Function block...................................................................................................................... 1047
18.9.4 Signals.................................................................................................................................... 1047
18.9.5 Settings................................................................................................................................. 1048
18.9.6 Monitored data.................................................................................................................... 1049
18.9.7.1 Measuring Principle....................................................................................................... 1050
18.9.7.2 Accurate algorithm for measurement of distance to fault................................... 1050
18.9.7.3 The non-compensated impedance model.................................................................1053
18.9.7.4 IEC 60870-5-103.............................................................................................................. 1053
18.9.8 Technical data...................................................................................................................... 1054
18.10 Limit counter L4UFCNT........................................................................................................ 1054
18.10.1 Identification........................................................................................................................ 1054
18.10.2 Functionality......................................................................................................................... 1054
18.10.3.1 Design...............................................................................................................................1054
18.10.3.2 Reporting......................................................................................................................... 1056
18.10.4 Function block...................................................................................................................... 1056
18.10.5 Signals....................................................................................................................................1056
18.10.6 Settings.................................................................................................................................. 1057
18.10.7 Monitored data.....................................................................................................................1057
18.10.8 Technical data.......................................................................................................................1057
18.11 Running hour-meter TEILGAPC ...........................................................................................1057
18.11.1 Identification.........................................................................................................................1057
18.11.2 Functionality......................................................................................................................... 1058

Technical manual
Table of contents
18.11.3 Function block...................................................................................................................... 1058

18.11.4 Signals.................................................................................................................................... 1059
18.11.5 Settings..................................................................................................................................1059
18.11.6.1 Operation accuracy........................................................................................................ 1061
18.11.6.2 Memory storage..............................................................................................................1061
18.11.7 Technical data....................................................................................................................... 1061
18.12 Through fault monitoring PTRSTHR .................................................................................. 1061
18.12.1 Identification.........................................................................................................................1061
18.12.2 Functionality......................................................................................................................... 1062
18.12.3 Function block...................................................................................................................... 1062
18.12.4 Signals.................................................................................................................................... 1062
18.12.5 Settings..................................................................................................................................1063
18.12.6 Monitored data.................................................................................................................... 1066
18.12.7.1 Transformer winding currents calculation................................................................1068
18.12.7.2 Through fault detection................................................................................................1069
18.12.7.3 Through fault duration and count of occurrence calculation............................... 1070
18.12.7.4 Through fault withstand capability calculation........................................................1071
18.12.7.5 Preparation of data for reporting............................................................................... 1072
18.12.8 Technical data.......................................................................................................................1075
18.13 Current harmonic monitoring CHMMHAI.......................................................................... 1076
18.13.1 Identification.........................................................................................................................1076
18.13.2 Functionality......................................................................................................................... 1076
18.13.3 Function block...................................................................................................................... 1076
18.13.4 Signals.................................................................................................................................... 1077
18.13.5 Settings.................................................................................................................................. 1077
18.13.6 Monitored data.....................................................................................................................1078
18.13.7 Graphical display configurable data................................................................................ 1079
18.13.8.1 Total harmonic distortion (THD).................................................................................1082
18.13.8.2 Individual harmonic distortion (IHD)..........................................................................1082
18.13.8.3 Total demand distortion (TDD)................................................................................... 1083
18.13.8.4 Crest factor (CF)............................................................................................................. 1083
18.13.8.5 Blocking and alarm logic............................................................................................... 1083
18.13.9 Technical data...................................................................................................................... 1084
18.14 Voltage harmonic monitoring VHMMHAI..........................................................................1085
18.14.1 Identification........................................................................................................................ 1085
18.14.2 Functionality......................................................................................................................... 1085
18.14.3 Function block...................................................................................................................... 1086
18.14.4 Signals....................................................................................................................................1086
18.14.5 Settings..................................................................................................................................1087
18.14.6 Monitored data.................................................................................................................... 1088
18.14.7 Graphical display configurable data................................................................................ 1089
18.14.8.1 Total harmonic distortion (THD).................................................................................1092

Technical manual
Table of contents
18.14.8.2 Individual harmonic distortion (IHD)..........................................................................1092

18.14.8.3 Crest factor (CF)............................................................................................................. 1093
18.14.8.4 Blocking and alarm logic............................................................................................... 1093
18.14.9 Technical data...................................................................................................................... 1094
Section 19 Metering.................................................................................................... 1095

19.1 Pulse-counter logic PCFCNT................................................................................................ 1095
19.1.1 Identification........................................................................................................................ 1095
19.1.2 Functionality......................................................................................................................... 1095
19.1.3 Function block...................................................................................................................... 1095
19.1.4 Signals.................................................................................................................................... 1095
19.1.5 Settings..................................................................................................................................1096
19.1.6 Monitored data.................................................................................................................... 1096
19.1.8 Technical data...................................................................................................................... 1098
19.2 Function for energy calculation and demand handling ETPMMTR.............................. 1098
19.2.1 Identification........................................................................................................................ 1098
19.2.2 Functionality......................................................................................................................... 1099
19.2.3 Function block...................................................................................................................... 1099
19.2.4 Signals....................................................................................................................................1099
19.2.5 Settings.................................................................................................................................. 1100
19.2.6 Monitored data..................................................................................................................... 1101
19.2.7 Operation principle.............................................................................................................. 1102
19.2.8 Technical data.......................................................................................................................1104
Section 20 Ethernet..................................................................................................... 1105

20.1 Access point............................................................................................................................ 1105
20.1.1 Introduction...........................................................................................................................1105
20.1.2 Settings.................................................................................................................................. 1105
20.2 Access point diagnostics...................................................................................................... 1107
20.2.1 Functionality..........................................................................................................................1107
20.2.2 Function block.......................................................................................................................1107
20.2.3 Signals.....................................................................................................................................1107
20.2.4 Monitored data..................................................................................................................... 1108
20.3 Redundant communication.................................................................................................. 1108
20.3.1 Identification.........................................................................................................................1108
20.3.2 Functionality..........................................................................................................................1108
20.4 Merging unit.............................................................................................................................1110
20.4.1 Introduction........................................................................................................................... 1110
20.4.2 Settings...................................................................................................................................1110
20.4.3 Monitored data...................................................................................................................... 1111
20.5 Routes........................................................................................................................................1116
20.5.1 Introduction........................................................................................................................... 1116
20.5.2 Settings...................................................................................................................................1116
20.5.3 Monitored data......................................................................................................................1116

Technical manual
Table of contents
Section 21 Station communication............................................................................1117

21.1 Communication protocols.....................................................................................................1117
21.2 Communication protocol diagnostics................................................................................ 1117
21.3 DNP3 protocol..........................................................................................................................1118
21.4 IEC 61850-8-1 communication protocol............................................................................. 1118
21.4.1 Functionality.......................................................................................................................... 1118
21.4.2 Communication interfaces and protocols.......................................................................1119
21.4.3 Settings...................................................................................................................................1119
21.4.4 Technical data........................................................................................................................1119
21.4.5 Generic communication function for Single Point indication SPGAPC, SP16GAPC 1120
21.4.5.1 Functionality.................................................................................................................... 1120
21.4.5.2 Function block................................................................................................................. 1120
21.4.5.3 Signals................................................................................................................................1121
21.4.5.4 Settings............................................................................................................................. 1121
21.4.5.5 Monitored data................................................................................................................ 1121
21.4.5.6 Operation principle......................................................................................................... 1122
21.4.6 Generic communication function for Measured Value MVGAPC.................................1122
21.4.6.1 Functionality.....................................................................................................................1123
21.4.6.2 Function block..................................................................................................................1123
21.4.6.3 Signals............................................................................................................................... 1123
21.4.6.4 Settings............................................................................................................................. 1123
21.4.6.5 Monitored data................................................................................................................1124
21.4.6.6 Operation principle.........................................................................................................1124
21.4.7 GOOSE function block to receive a double point value GOOSEDPRCV..................... 1124
21.4.7.1 Identification....................................................................................................................1124
21.4.7.2 Functionality.................................................................................................................... 1124
21.4.7.3 Function block................................................................................................................. 1125
21.4.7.4 Signals............................................................................................................................... 1125
21.4.7.5 Settings............................................................................................................................. 1125
21.4.7.6 Operation principle ........................................................................................................ 1125
21.4.8 GOOSE function block to receive an integer value GOOSEINTRCV............................ 1126
21.4.8.1 Identification....................................................................................................................1126
21.4.8.2 Functionality.................................................................................................................... 1126
21.4.8.3 Function block..................................................................................................................1127
21.4.8.4 Signals............................................................................................................................... 1127
21.4.8.5 Settings............................................................................................................................. 1127
21.4.9 GOOSE function block to receive a measurand value GOOSEMVRCV....................... 1128
21.4.9.1 Identification....................................................................................................................1128
21.4.9.2 Functionality.................................................................................................................... 1128
21.4.9.3 Function block................................................................................................................. 1129
21.4.9.4 Signals............................................................................................................................... 1129
21.4.9.5 Settings.............................................................................................................................1129
21.4.9.6 Operation principle ........................................................................................................1129
21.4.10 GOOSE function block to receive a single point value GOOSESPRCV....................... 1130

Technical manual
Table of contents
21.4.10.1 Identification................................................................................................................... 1130

21.4.10.2 Functionality.................................................................................................................... 1130
21.4.10.3 Function block..................................................................................................................1131
21.4.10.4 Signals................................................................................................................................1131
21.4.10.5 Settings............................................................................................................................. 1131
21.4.11 Horizontal communication via GOOSE for interlocking GOOSEINTLKRCV.............. 1132
21.4.11.1 Functionality.....................................................................................................................1132
21.4.11.2 Function block..................................................................................................................1133
21.4.11.3 Signals............................................................................................................................... 1133
21.4.11.4 Settings............................................................................................................................. 1135
21.4.12 GOOSE binary receive GOOSEBINRCV.............................................................................. 1137
21.4.12.1 Function block..................................................................................................................1137
21.4.12.2 Signals............................................................................................................................... 1137
21.4.12.3 Settings.............................................................................................................................1139
21.4.13 GOOSE function block to receive a switching device GOOSEXLNRCV ..................... 1140
21.4.13.1 Identification................................................................................................................... 1140
21.4.13.2 Functionality.................................................................................................................... 1140
21.4.13.3 Function block................................................................................................................. 1140
21.4.13.4 Signals............................................................................................................................... 1141
21.4.13.5 Settings.............................................................................................................................1142
21.5 IEC/UCA 61850-9-2LE communication protocol.............................................................. 1143
21.5.1 Introduction...........................................................................................................................1143
21.5.2 Function block.......................................................................................................................1143
21.5.3 Signals.....................................................................................................................................1143
21.5.3.1 Output signals................................................................................................................. 1143
21.5.4 Settings.................................................................................................................................. 1144
21.5.5 Monitored data..................................................................................................................... 1144
21.5.6.1 Conditional blocking...................................................................................................... 1152
21.5.6.2 IEC 61850 quality expander QUALEXP........................................................................ 1156
21.5.7 Technical data....................................................................................................................... 1157
21.6 LON communication protocol..............................................................................................1157
21.6.1 Functionality.......................................................................................................................... 1157
21.6.2 Settings.................................................................................................................................. 1158
21.6.4 Technical data....................................................................................................................... 1174
21.7 SPA communication protocol...............................................................................................1175
21.7.1 Functionality.......................................................................................................................... 1175
21.7.2 Design..................................................................................................................................... 1175
21.7.3 Settings...................................................................................................................................1175
21.7.4.1 Communication ports.................................................................................................... 1183

Technical manual
Table of contents
21.7.5 Technical data....................................................................................................................... 1183

21.8 IEC 60870-5-103 communication protocol........................................................................1184
21.8.1 Introduction...........................................................................................................................1184
21.8.2 Measurands for IEC 60870-5-103 I103MEAS................................................................... 1184
21.8.2.1 Functionality.................................................................................................................... 1184
21.8.2.2 Identification................................................................................................................... 1184
21.8.2.3 Function block................................................................................................................. 1185
21.8.2.4 Signals............................................................................................................................... 1185
21.8.2.5 Settings.............................................................................................................................1185
21.8.3 Measurands user defined signals for IEC 60870-5-103 I103MEASUSR...................... 1186
21.8.3.1 Functionality.................................................................................................................... 1186
21.8.3.2 Identification................................................................................................................... 1186
21.8.3.3 Function block................................................................................................................. 1186
21.8.3.4 Signals............................................................................................................................... 1186
21.8.3.5 Settings............................................................................................................................. 1187
21.8.4 Function status auto-recloser for IEC 60870-5-103 I103AR......................................... 1187
21.8.4.1 Functionality.................................................................................................................... 1187
21.8.4.2 Identification................................................................................................................... 1188
21.8.4.3 Function block................................................................................................................. 1188
21.8.4.4 Signals............................................................................................................................... 1188
21.8.4.5 Settings.............................................................................................................................1188
21.8.5 Function status earth-fault for IEC 60870-5-103 I103EF.............................................. 1188
21.8.5.1 Functionality.................................................................................................................... 1188
21.8.5.2 Identification................................................................................................................... 1188
21.8.5.3 Function block................................................................................................................. 1189
21.8.5.4 Signals............................................................................................................................... 1189
21.8.5.5 Settings.............................................................................................................................1189
21.8.6 Function status fault protection for IEC 60870-5-103 I103FLTPROT........................ 1189
21.8.6.1 Functionality.................................................................................................................... 1189
21.8.6.2 Identification................................................................................................................... 1189
21.8.6.3 Function block................................................................................................................. 1190
21.8.6.4 Signals...............................................................................................................................1190
21.8.6.5 Settings............................................................................................................................. 1191
21.8.7 IED status for IEC 60870-5-103 I103IED............................................................................1191
21.8.7.1 Functionality.....................................................................................................................1191
21.8.7.2 Identification....................................................................................................................1191
21.8.7.3 Function block................................................................................................................. 1192
21.8.7.4 Signals............................................................................................................................... 1192
21.8.7.5 Settings.............................................................................................................................1192
21.8.8 Supervison status for IEC 60870-5-103 I103SUPERV.....................................................1192
21.8.8.1 Functionality.................................................................................................................... 1192
21.8.8.2 Identification....................................................................................................................1192
21.8.8.3 Function block................................................................................................................. 1193
21.8.8.4 Signals............................................................................................................................... 1193
21.8.8.5 Settings.............................................................................................................................1193
21.8.9 Status for user defined signals for IEC 60870-5-103 I103USRDEF............................. 1193

Technical manual
Table of contents
21.8.9.1 Functionality.................................................................................................................... 1193

21.8.9.2 Identification................................................................................................................... 1194
21.8.9.3 Function block................................................................................................................. 1194
21.8.9.4 Signals............................................................................................................................... 1194
21.8.9.5 Settings.............................................................................................................................1195
21.8.10 Function commands for IEC 60870-5-103 I103CMD......................................................1196
21.8.10.1 Functionality.................................................................................................................... 1196
21.8.10.2 Identification................................................................................................................... 1196
21.8.10.3 Function block................................................................................................................. 1196
21.8.10.4 Signals............................................................................................................................... 1196
21.8.10.5 Settings............................................................................................................................. 1197
21.8.11 IED commands for IEC 60870-5-103 I103IEDCMD..........................................................1197
21.8.11.1 Functionality.................................................................................................................... 1197
21.8.11.2 Identification....................................................................................................................1197
21.8.11.3 Function block................................................................................................................. 1197
21.8.11.4 Signals............................................................................................................................... 1197
21.8.11.5 Settings.............................................................................................................................1198
21.8.12 Function commands user defined for IEC 60870-5-103 I103USRCMD...................... 1198
21.8.12.1 Functionality.................................................................................................................... 1198
21.8.12.2 Identification................................................................................................................... 1198
21.8.12.3 Function block................................................................................................................. 1198
21.8.12.4 Signals............................................................................................................................... 1199
21.8.12.5 Settings.............................................................................................................................1199
21.8.13 Function commands generic for IEC 60870-5-103 I103GENCMD...............................1200
21.8.13.1 Functionality....................................................................................................................1200
21.8.13.2 Identification...................................................................................................................1200
21.8.13.3 Function block.................................................................................................................1200
21.8.13.4 Signals.............................................................................................................................. 1200
21.8.13.5 Settings.............................................................................................................................1201
21.8.14 IED commands with position and select for IEC 60870-5-103 I103POSCMD........... 1201
21.8.14.1 Functionality.................................................................................................................... 1201
21.8.14.2 Identification................................................................................................................... 1201
21.8.14.3 Function block................................................................................................................. 1201
21.8.14.4 Signals...............................................................................................................................1202
21.8.14.5 Settings............................................................................................................................ 1202
21.8.15 IED commands with position for IEC 60870-5-103 I103POSCMDV............................ 1202
21.8.15.1 Functionality.................................................................................................................... 1202
21.8.15.2 Identification................................................................................................................... 1202
21.8.15.3 Function block................................................................................................................. 1203
21.8.15.4 Signals...............................................................................................................................1203
21.8.15.5 Settings............................................................................................................................ 1203
21.8.16 Operation principle ............................................................................................................. 1203
21.8.16.1 General.............................................................................................................................. 1203
21.8.16.2 Communication ports.................................................................................................... 1212
21.8.17 Technical data....................................................................................................................... 1213
21.9 MULTICMDRCV and MULTICMDSND................................................................................... 1213

Technical manual
Table of contents
21.9.1 Functionality.......................................................................................................................... 1213

21.9.2 Design..................................................................................................................................... 1213
21.9.2.1 General...............................................................................................................................1213
21.9.3 Function block.......................................................................................................................1214
21.9.4 Signals.....................................................................................................................................1214
21.9.5 Settings.................................................................................................................................. 1216
21.10 Activity logging parameters ACTIVLOG............................................................................. 1216
21.10.1 Activity logging ACTIVLOG................................................................................................. 1216
21.10.2 Settings...................................................................................................................................1217
Section 22 Remote communication...........................................................................1219

22.1 Binary signal transfer............................................................................................................. 1219
22.1.1 Identification......................................................................................................................... 1219
22.1.2 Functionality.......................................................................................................................... 1219
22.1.3 Signals.....................................................................................................................................1219
22.1.4 Settings.................................................................................................................................. 1223
22.1.5 Monitored data..................................................................................................................... 1227
22.2 Transmission of local analog data via LDCM to remote end, function block
LDCMTRN called LDCMTransmit......................................................................................... 1229
22.2.1 Identification.........................................................................................................................1229
22.2.2 Function block...................................................................................................................... 1230
22.2.3 Signals.................................................................................................................................... 1230
Section 23 Security...................................................................................................... 1233

23.1 Authority check ATHCHCK.................................................................................................... 1233
23.1.1 Identification......................................................................................................................... 1233
23.1.2 Functionality..........................................................................................................................1233
23.1.3.1 Authorization with Central Account Management enabled IED............................1236
23.2 Authority management AUTHMAN..................................................................................... 1238
23.2.1 Identification.........................................................................................................................1238
23.2.2 AUTHMAN.............................................................................................................................. 1238
23.2.3 Settings.................................................................................................................................. 1238
23.3 FTP access with password FTPACCS................................................................................. 1238
23.3.1 Identification.........................................................................................................................1238
23.3.2 FTP access with TLS, FTPACCS..........................................................................................1238
23.3.3 Settings.................................................................................................................................. 1239
23.4 Authority status ATHSTAT....................................................................................................1239
23.4.1 Identification.........................................................................................................................1239
23.4.2 Functionality..........................................................................................................................1239
23.4.3 Function block.......................................................................................................................1239
23.4.4 Signals.................................................................................................................................... 1240
23.4.5 Settings..................................................................................................................................1240
23.4.6 Operation principle .............................................................................................................1240
23.5 Self supervision with internal event list INTERRSIG........................................................ 1240

Technical manual
Table of contents
23.5.1 Functionality......................................................................................................................... 1240

23.5.2 Function block...................................................................................................................... 1240
23.5.3 Signals.....................................................................................................................................1241
23.5.4 Settings.................................................................................................................................. 1241
23.5.5.1 Internal signals................................................................................................................ 1242
23.5.5.2 Supervision of analog inputs........................................................................................1245
23.5.6 Technical data.......................................................................................................................1245
23.6 ChangeLock function CHNGLCK......................................................................................... 1245
23.6.1 Functionality......................................................................................................................... 1245
23.6.2 Function block...................................................................................................................... 1245
23.6.3 Signals.................................................................................................................................... 1245
23.7 Denial of service DOS............................................................................................................ 1246
23.7.1 Functionality ........................................................................................................................ 1246
Section 24 Basic IED functions.................................................................................. 1249

24.1 Time synchronization TIMESYNCHGEN............................................................................. 1249
24.1.1 Functionality......................................................................................................................... 1249
24.1.2 Settings..................................................................................................................................1249
24.1.3 Description of SyncLostMode........................................................................................... 1255
24.1.4.1 General concepts............................................................................................................ 1256
24.1.4.2 Real-time clock (RTC) operation.................................................................................. 1258
24.1.4.3 Synchronization alternatives........................................................................................1258
24.1.4.4 Process bus IEC/UCA 61850-9-2LE synchronization............................................... 1261
24.1.4.5 Precision Time Protocol (PTP) ..................................................................................... 1261
24.1.5 Technical data....................................................................................................................... 1262
24.2 Parameter setting groups.................................................................................................... 1263
24.2.1 Functionality..........................................................................................................................1263
24.2.2 Function block.......................................................................................................................1263
24.2.3 Signals.................................................................................................................................... 1263
24.2.4 Settings..................................................................................................................................1264
24.3 Test mode functionality TESTMODE.................................................................................. 1265
24.3.1 Functionality......................................................................................................................... 1265
24.3.2 Function block...................................................................................................................... 1266
24.3.3 Signals.................................................................................................................................... 1266
24.3.4 Settings.................................................................................................................................. 1266
24.4 IED identifiers TERMINALID..................................................................................................1267
24.4.1 Functionality..........................................................................................................................1267
24.4.2 Settings ................................................................................................................................. 1268
24.5 Product information PRODINF............................................................................................ 1268
24.5.1 Functionality......................................................................................................................... 1268

Technical manual
Table of contents
24.5.2 Settings ................................................................................................................................. 1268

24.5.3 Factory defined settings.................................................................................................... 1269
24.6 Signal matrix for binary inputs SMBI..................................................................................1269
24.6.1 Functionality......................................................................................................................... 1269
24.6.2 Function block.......................................................................................................................1270
24.6.3 Signals.................................................................................................................................... 1270
24.6.4 Operation principle...............................................................................................................1271
24.7 Signal matrix for binary outputs SMBO .............................................................................1271
24.7.1 Functionality.......................................................................................................................... 1271
24.7.2 Function block....................................................................................................................... 1271
24.7.3 Signals..................................................................................................................................... 1271
24.8 Signal matrix for mA inputs SMMI.......................................................................................1272
24.8.1 Functionality.......................................................................................................................... 1272
24.8.2 Function block.......................................................................................................................1272
24.8.3 Signals.....................................................................................................................................1272
24.9 Signal matrix for analog inputs SMAI................................................................................. 1273
24.9.1 Functionality..........................................................................................................................1273
24.9.2 Function block.......................................................................................................................1273
24.9.3 Signals.................................................................................................................................... 1274
24.9.4 Settings.................................................................................................................................. 1275
24.9.5.1 Frequency values.............................................................................................................1278
24.10 Summation block 3 phase 3PHSUM.................................................................................... 1278
24.10.1 Functionality..........................................................................................................................1278
24.10.2 Function block.......................................................................................................................1279
24.10.3 Signals.................................................................................................................................... 1279
24.10.4 Settings.................................................................................................................................. 1279
Section 25 IED hardware............................................................................................. 1281

25.1 Overview................................................................................................................................... 1281
25.1.1 Variants of case size with local HMI display....................................................................1281
25.1.2 Case from the front and rear sides...................................................................................1282
25.2 Hardware modules.................................................................................................................1286
25.2.1 Overview................................................................................................................................ 1286
25.2.2 Numeric module (NUM).......................................................................................................1287
25.2.2.1 Introduction..................................................................................................................... 1287
25.2.2.2 Functionality....................................................................................................................1288
25.2.2.3 Technical data................................................................................................................. 1288
25.2.3 Power supply module (PSM).............................................................................................. 1289
25.2.3.1 Introduction.....................................................................................................................1289
25.2.3.2 Design............................................................................................................................... 1289
25.2.3.3 Technical data................................................................................................................. 1290
25.2.4 Local human-machine interface (Local HMI).................................................................. 1290

Technical manual
Table of contents
25.2.5 Transformer input module (TRM)..................................................................................... 1290

25.2.5.1 Introduction.....................................................................................................................1290
25.2.5.2 Design............................................................................................................................... 1290
25.2.5.3 Technical data..................................................................................................................1291
25.2.6 Analog digital conversion module (ADM)........................................................................ 1292
25.2.6.1 Introduction..................................................................................................................... 1292
25.2.6.2 Design............................................................................................................................... 1293
25.2.7 Binary input module (BIM)..................................................................................................1294
25.2.7.1 Introduction.....................................................................................................................1294
25.2.7.2 Design............................................................................................................................... 1295
25.2.7.3 Signals............................................................................................................................... 1297
25.2.7.4 Settings............................................................................................................................ 1298
25.2.7.5 Monitored data............................................................................................................... 1298
25.2.7.6 Technical data................................................................................................................. 1298
25.2.8 Binary output modules (BOM)...........................................................................................1300
25.2.8.1 Introduction.....................................................................................................................1300
25.2.8.2 Design...............................................................................................................................1300
25.2.8.3 Signals............................................................................................................................... 1301
25.2.8.4 Settings............................................................................................................................ 1302
25.2.8.5 Monitored data............................................................................................................... 1302
25.2.8.6 Technical data................................................................................................................. 1306
25.2.9 Static binary output module (SOM)................................................................................. 1306
25.2.9.1 Introduction.....................................................................................................................1306
25.2.9.2 Design............................................................................................................................... 1306
25.2.9.3 Signals.............................................................................................................................. 1309
25.2.9.4 Settings............................................................................................................................ 1309
25.2.9.5 Monitored data............................................................................................................... 1309
25.2.9.6 Technical data.................................................................................................................. 1311
25.2.10 Binary input/output module (IOM)................................................................................... 1313
25.2.10.1 Introduction......................................................................................................................1313
25.2.10.2 Design................................................................................................................................1313
25.2.10.3 Signals............................................................................................................................... 1315
25.2.10.4 Settings.............................................................................................................................1316
25.2.10.5 Monitored data................................................................................................................1316
25.2.10.6 Technical data..................................................................................................................1318
25.2.11 mA input module (MIM)...................................................................................................... 1320
25.2.11.1 Introduction..................................................................................................................... 1320
25.2.11.2 Design............................................................................................................................... 1320
25.2.11.3 Signals............................................................................................................................... 1322
25.2.11.4 Settings.............................................................................................................................1323
25.2.11.5 Monitored data............................................................................................................... 1324
25.2.11.6 Technical data..................................................................................................................1325
25.2.12 Serial and LON communication module (SLM) ..............................................................1325
25.2.12.1 Introduction..................................................................................................................... 1325
25.2.12.2 Design............................................................................................................................... 1325
25.2.12.3 Technical data................................................................................................................. 1326

Technical manual
Table of contents
25.2.13 Galvanic RS485 communication module......................................................................... 1327

25.2.13.1 Introduction..................................................................................................................... 1327
25.2.13.2 Design................................................................................................................................1327
25.2.13.3 Technical data................................................................................................................. 1328
25.2.14 Optical Ethernet module.....................................................................................................1328
25.2.14.1 Introduction..................................................................................................................... 1328
25.2.14.2 Functionality.................................................................................................................... 1329
25.2.14.3 Design............................................................................................................................... 1329
25.2.14.4 Technical data................................................................................................................. 1329
25.2.15 Line data communication module (LDCM)..................................................................... 1329
25.2.15.1 Introduction..................................................................................................................... 1329
25.2.15.2 Design............................................................................................................................... 1330
25.2.15.3 Technical data.................................................................................................................. 1331
25.2.16 Galvanic X.21 line data communication (X.21-LDCM).....................................................1331
25.2.16.1 Introduction......................................................................................................................1331
25.2.16.2 Design................................................................................................................................1331
25.2.16.3 Functionality.................................................................................................................... 1333
25.2.16.4 Technical data................................................................................................................. 1334
25.2.17 GPS time synchronization module (GTM)....................................................................... 1334
25.2.17.1 Introduction..................................................................................................................... 1334
25.2.17.2 Design............................................................................................................................... 1334
25.2.17.3 Monitored data................................................................................................................1335
25.2.17.4 Technical data................................................................................................................. 1335
25.2.18 GPS antenna.......................................................................................................................... 1335
25.2.18.1 Introduction..................................................................................................................... 1335
25.2.18.2 Design............................................................................................................................... 1335
25.2.18.3 Technical data..................................................................................................................1337
25.2.19 IRIG-B time synchronization module IRIG-B.................................................................... 1337
25.2.19.1 Introduction..................................................................................................................... 1337
25.2.19.2 Design................................................................................................................................1337
25.2.19.3 Encoding...........................................................................................................................1338
25.2.19.4 TimeZoneAs1344............................................................................................................ 1338
25.2.19.5 Settings.............................................................................................................................1338
25.2.19.6 Technical data................................................................................................................. 1338
25.3 Dimensions.............................................................................................................................. 1339
25.3.1 Case with protective cover.................................................................................................1339
25.3.2 Case without protective cover.......................................................................................... 1342
25.3.3 Flush mounting dimensions.............................................................................................. 1344
25.3.4 Side-by-side flush mounting dimensions....................................................................... 1344
25.3.5 Wall mounting dimensions.................................................................................................1345
25.3.6 External resistor unit for high impedance differential protection............................ 1346
25.4 Mounting alternatives........................................................................................................... 1347
25.4.1 Flush mounting.....................................................................................................................1347
25.4.1.1 Overview........................................................................................................................... 1347
25.4.1.2 Mounting procedure for flush mounting...................................................................1348
25.4.2 Wall mounting.......................................................................................................................1348

Technical manual
Table of contents
25.4.2.1 Overview...........................................................................................................................1348
25.4.2.2 Mounting procedure for wall mounting.....................................................................1349
25.4.2.3 How to reach the rear side of the IED........................................................................ 1349
25.4.3 19” panel rack mounting..................................................................................................... 1350
25.4.3.1 Overview...........................................................................................................................1350
25.4.3.2 Mounting procedure for 19” panel rack mounting................................................... 1351
25.4.4 Side-by-side 19” rack mounting.........................................................................................1352
25.4.4.1 Overview........................................................................................................................... 1352
25.4.4.2 Mounting procedure for side-by-side rack mounting............................................. 1352
25.4.4.3 IED mounted with a RHGS6 case................................................................................. 1352
25.4.5 Side-by-side flush mounting.............................................................................................. 1353
25.4.5.1 Overview........................................................................................................................... 1353
25.4.5.2 Mounting procedure for side-by-side flush mounting............................................1354
25.5 Technical data......................................................................................................................... 1354
25.5.1 Enclosure............................................................................................................................... 1354
25.5.2 Electrical safety.................................................................................................................... 1355
25.5.3 Connection system.............................................................................................................. 1355
25.5.4 Influencing factors............................................................................................................... 1356
25.5.5 Type tests according to standard.....................................................................................1357
Section 26 Labels......................................................................................................... 1359

26.1 Labels on IED........................................................................................................................... 1359
Section 27 Connection diagrams...............................................................................1361
Section 28 Inverse time characteristics................................................................... 1363

28.1 Application...............................................................................................................................1363
28.2 Principle of operation............................................................................................................ 1365
28.2.1 Mode of operation............................................................................................................... 1365
28.3 Inverse characteristics.......................................................................................................... 1370
Section 29 Glossary..................................................................................................... 1397

Technical manual
44
1MRK 506 370-UEN J Section 1
Introduction
Section 1 Introduction
1.1 This manual GUID-AB423A30-13C2-46AF-B7FE-A73BB425EB5F v19
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per
function. The manual can be used as a technical reference during the engineering phase,
installation and commissioning phase, and during normal service.
1.1.1 Presumptions for Technical Data GUID-1E949E38-E04D-4374-A086-912C25E9F93C v2
The technical data stated in this document are only valid under the following circumstances:
1. Main current transformers with 1 A or 2 A secondary rating are wired to the IED 1 A rated
CT inputs.
2. Main current transformer with 5 A secondary rating are wired to the IED 5 A rated CT
inputs.
3. CT and VT ratios in the IED are set in accordance with the associated main instrument
transformers. Note that for functions which measure an analogue signal which do not
have corresponding primary quantity the 1:1 ratio shall be set for the used analogue inputs
on the IED. Example of such functions are: HZPDIF, ROTIPHIZ and STTIPHIZ.
4. Parameter IBase used by the tested function is set equal to the rated CT primary current.
5. Parameter UBase used by the tested function is set equal to the rated primary phase-to-
phase voltage.
6. Parameter SBase used by the tested function is set equal to:
• √3 × IBase × UBase
7. The rated secondary quantities have the following values:
• Rated secondary phase current Ir is either 1 A or 5 A depending on selected TRM.
• Rated secondary phase-to-phase voltage Ur is within the range from 100 V to 120 V.
• Rated secondary power for three-phase system Sr = √3 × Ur × Ir
8. For operate and reset time testing, the default setting values of the function are used if
not explicitly stated otherwise.
9. During testing, signals with rated frequency have been injected if not explicitly stated
otherwise.
1.2 Intended audience GUID-C9B8127F-5748-4BEA-9E4F-CC762FE28A3A v11
This manual addresses system engineers and installation and commissioning personnel, who
use technical data during engineering, installation and commissioning, and in normal service.
The system engineer must have a thorough knowledge of protection systems, protection
equipment, protection functions and the configured functional logic in the IEDs. The
installation and commissioning personnel must have a basic knowledge in handling electronic
equipment.

Technical manual
Section 1 1MRK 506 370-UEN J
Introduction
1.3 Product documentation
1.3.1 Product documentation set GUID-3AA69EA6-F1D8-47C6-A8E6-562F29C67172 v16
Deinstalling & disposal

Planning & purchase
Decommissioning
Commissioning
Maintenance
Engineering
Operation
Installing
Engineering manual
Installation manual
Commissioning manual
Operation manual
Application manual
Technical manual
Communication
protocol manual
Cyber security
deployment guideline
IEC07000220-4-en.vsd
IEC07000220 V4 EN-US
Figure 1: The intended use of manuals throughout the product lifecycle

The engineering manual contains instructions on how to engineer the IEDs using the various
tools available within the PCM600 software. The manual provides instructions on how to set
up a PCM600 project and insert IEDs to the project structure. The manual also recommends a
sequence for the engineering of protection and control functions, as well as communication
engineering for IEC 61850.
The installation manual contains instructions on how to install the IED. The manual provides
procedures for mechanical and electrical installation. The chapters are organized in the
chronological order in which the IED should be installed.
The commissioning manual contains instructions on how to commission the IED. The manual
can also be used by system engineers and maintenance personnel for assistance during the
testing phase. The manual provides procedures for the checking of external circuitry and
energizing the IED, parameter setting and configuration as well as verifying settings by
secondary injection. The manual describes the process of testing an IED in a substation which
is not in service. The chapters are organized in the chronological order in which the IED should
be commissioned. The relevant procedures may be followed also during the service and
maintenance activities.
The operation manual contains instructions on how to operate the IED once it has been
commissioned. The manual provides instructions for the monitoring, controlling and setting of
the IED. The manual also describes how to identify disturbances and how to view calculated
and measured power grid data to determine the cause of a fault.

Technical manual
Introduction
The application manual contains application descriptions and setting guidelines sorted per
function. The manual can be used to find out when and for what purpose a typical protection
function can be used. The manual can also provide assistance for calculating settings.
The technical manual contains operation principle descriptions, and lists function blocks, logic
diagrams, input and output signals, setting parameters and technical data, sorted per
function. The manual can be used as a technical reference during the engineering phase,
The communication protocol manual describes the communication protocols supported by

the IED. The manual concentrates on the vendor-specific implementations.
The point list manual describes the outlook and properties of the data points specific to the
IED. The manual should be used in conjunction with the corresponding communication
protocol manual.
The cyber security deployment guideline describes the process for handling cyber security
when communicating with the IED. Certification, Authorization with role based access control,
and product engineering for cyber security related events are described and sorted by
function. The guideline can be used as a technical reference during the engineering phase,
1.3.2 Document revision history GUID-34B323E4-1319-4D42-80CE-29B0F2D36E2C v3
Document Date Product revision History

revision
- 2017-07 2.2.0 First release for product version 2.2
A 2017-10 2.2.1 Ethernet ports with RJ45 connector added.
enhancements/updates made to ZMFPDIS and
ZMFCPDIS.
B 2017-11 2.2.1 ZMFPDIS and ZMFCPDIS - Added missing setting tables
C 2018–03 2.2.1 Document enhancements and corrections
D 2018-06 2.2.2 LDCM galvanic X.21 added. Function PTRSTHR added.
Ordering section updated.
E 2018-06 2.2.2 Technical data updated for PSM and EF4PTOC.
Corrections/enhancements made to OC4PTOC, TRPTTR,
UV2PTUV and OV2PTOV. Case dimensions updated.
F 2018–09 2.2.2 Updated KEMA test values
G 2018-11 2.2.3 Functions CHMMHAI, VHMMHAI, DELVSPVC, DELSPVC and
DELISPVC added. Updates/enhancements made to
ZMFPDIS, ZMFCPDIS, CCRBRF, REALCOMP, PTRSTHR and
FNKEYMDx. Ordering section updated.
H 2019-05 2.2.3 PTP enhancements and corrections
J 2019-10 2.2.3 SOM redesign updates
1.3.3 Related documents GUID-94E8A5CA-BE1B-45AF-81E7-5A41D34EE112 v7
Documents related to REL670 Document numbers

Application manual 1MRK 506 369-UEN
Commissioning manual 1MRK 506 371-UEN
Product guide 1MRK 506 372-BEN
Technical manual 1MRK 506 370-UEN
Type test certificate 1MRK 506 372-TEN

Technical manual
Introduction
670 series manuals Document numbers

Operation manual 1MRK 500 127-UEN
Engineering manual 1MRK 511 398-UEN
Installation manual 1MRK 514 026-UEN
Communication protocol manual, DNP3 1MRK 511 391-UUS
Communication protocol manual, IEC 60870-5-103 1MRK 511 394-UEN
Communication protocol manual, IEC 61850 Edition 1 1MRK 511 392-UEN
Communication protocol manual, IEC 61850 Edition 2 1MRK 511 393-UEN
Communication protocol manual, LON 1MRK 511 395-UEN
Communication protocol manual, SPA 1MRK 511 396-UEN
Point list manual, DNP3 1MRK 511 397-UUS
Accessories guide 1MRK 514 012-BEN
Cyber security deployment guideline 1MRK 511 399-UEN
Connection and Installation components 1MRK 513 003-BEN
Test system, COMBITEST 1MRK 512 001-BEN
Application guide, Communication set-up 1MRK 505 382-UEN
1.4 Document symbols and conventions
1.4.1 Symbols GUID-2945B229-DAB0-4F15-8A0E-B9CF0C2C7B15 v13
The electrical warning icon indicates the presence of a hazard which could
result in electrical shock.
The warning icon indicates the presence of a hazard which could result in
personal injury.
The caution hot surface icon indicates important information or warning about
the temperature of product surfaces.
Class 1 Laser product. Take adequate measures to protect the eyes and do not
view directly with optical instruments.
The caution icon indicates important information or warning related to the

concept discussed in the text. It might indicate the presence of a hazard which
could result in corruption of software or damage to equipment or property.

Technical manual
Introduction
The information icon alerts the reader of important facts and conditions.
The tip icon indicates advice on, for example, how to design your project or
how to use a certain function.
Although warning hazards are related to personal injury, it is necessary to understand that
under certain operational conditions, operation of damaged equipment may result in
degraded process performance leading to personal injury or death. It is important that the
user fully complies with all warning and cautionary notices.
1.4.2 Document conventions GUID-96DFAB1A-98FE-4B26-8E90-F7CEB14B1AB6 v8
• Abbreviations and acronyms in this manual are spelled out in the glossary. The glossary
also contains definitions of important terms.
• Push button navigation in the LHMI menu structure is presented by using the push button
icons.
For example, to navigate between the options, use and .
• HMI menu paths are presented in bold.
For example, select Main menu/Settings.
• LHMI messages are shown in Courier font.
For example, to save the changes in non-volatile memory, select Yes and press .
• Parameter names are shown in italics.
For example, the function can be enabled and disabled with the Operation setting.
• Each function block symbol shows the available input/output signal.
• the character ^ in front of an input/output signal name indicates that the signal
name may be customized using the PCM600 software.
• the character * after an input signal name indicates that the signal must be
connected to another function block in the application configuration to achieve a
valid application configuration.
• Dimensions are provided both in inches and millimeters. If it is not specifically mentioned
then the dimension is in millimeters.
• Logic diagrams describe the signal logic of the function block and are bordered by dashed
lines.
In a logic diagram, input and output signal paths are shown as lines that touch the outer
border of the diagram. Input signals are always on the left-hand side and output signals
are on the right-hand side.
Input and output signals can be configured using PCM600. They can be connected to the
inputs and outputs of other functions and to binary inputs and outputs. Examples of input
signals are BLKTR, BLOCK, and VTSZ. Examples of output signals are TRIP, START, STL1,
STL2, and STL3.
• Frames with a shaded area on the right-hand side represent setting parameters.
These parameters can only be set via the PST or LHMI. Their values are high (1) only
when the corresponding setting parameter is set to the symbolic value specified
within the frame. Example is the signal Timer tPP=On. Their logical values
correspond automatically to the selected setting value.
• Internal signals are illustrated graphically and end approximately 2 mm from the
frame edge. If an internal signal path cannot be drawn with a continuous line, the
same signal name is used where the signal should continue, see figure 2 and figure 3.
Example of the internal signal is BLK.
• Signal paths that extend beyond the logic diagram and continue in another diagram
will be approximately 2 mm from the frame edge, see figure 3 and figure 4. Examples
are STNDL1N, STNDL2N, STNDL3N, STNDL1L2, STNDL2L3, and STNDL3L1.

Technical manual
Introduction
STZMPP
OR
STCND
AND STNDL1L2
L1L2
STNDL2L3
L2L3 AND
L3L1 AND STNDL3L1
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STPE
OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK
99000557-2.vsd
IEC99000557-TIFF V3 EN-US
Figure 2: Logic diagram example with intermediate output signals
Figure 3: Logic diagram example with intermediate input signals

Technical manual
Introduction
Timer tPP=On
STZMPP AND tPP
AND
t
BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
IEC09000887-3-en.vsdx
Figure 4: Logic diagram example with a parameter input
Illustrations are used as an example and might show other products than the
one the manual describes. The example that is illustrated is still valid.
1.5 IEC 61850 edition 1 / edition 2 mapping GUID-C5133366-7260-4C47-A975-7DBAB3A33A96 v7
Function block names are used in ACT and PST to identify functions. Respective function block
names of Edition 1 logical nodes and Edition 2 logical nodes are shown in the table below.
Table 1: IEC 61850 edition 1 / edition 2 mapping

Function block name Edition 1 logical nodes Edition 2 logical nodes
AEGPVOC AEGGAPC AEGPVOC
AGSAL AGSAL AGSAL
SECLLN0
ALMCALH ALMCALH ALMCALH
ALTIM - ALTIM
ALTMS - ALTMS
ALTRK - ALTRK
BCZPDIF BCZPDIF BCZPDIF
BCZSPDIF BCZSPDIF BCZSPDIF
BCZTPDIF BCZTPDIF BCZTPDIF
BDCGAPC SWSGGIO BBCSWI
BDCGAPC
Table continues on next page

Technical manual
Introduction

BDZSGAPC BBS6LLN0 LLN0
BDZSGAPC BDZSGAPC
BFPTRC_F01 BFPTRC BFPTRC
BICPTRC_01 BICPTRC BICPTRC
BRCPTOC BRCPTOC BRCPTOC
BRPTOC BRPTOC BRPTOC
BTIGAPC B16IFCVI BTIGAPC
BUSPTRC_B1 BUSPTRC BUSPTRC
BBSPLLN0

Technical manual
Introduction

BUTPTRC_B1 BUTPTRC BUTPTRC
BBTPLLN0
BZISGGIO BZISGGIO BZISGAPC
BZITGGIO BZITGGIO BZITGAPC
BZNPDIF_Z1 BZNPDIF BZNPDIF
BZNSPDIF_A BZNSPDIF BZASGAPC
BZASPDIF
BZNSGAPC
BZNSPDIF
BZNSPDIF_B BZNSPDIF BZBSGAPC
BZBSPDIF
BZNSGAPC
BZNSPDIF
BZNTPDIF_A BZNTPDIF BZATGAPC
BZATPDIF
BZNTGAPC
BZNTPDIF

Technical manual
Introduction

BZNTPDIF_B BZNTPDIF BZBTGAPC
BZBTPDIF
BZNTGAPC
BZNTPDIF
CBPGAPC CBPLLN0 CBPMMXU
CBPMMXU CBPPTRC
CBPPTRC HOLPTOV
HOLPTOV HPH1PTOV
HPH1PTOV PH3PTOC
PH3PTUC PH3PTUC
PH3PTOC RP3PDOP
RP3PDOP
CCPDSC CCRPLD CCPDSC
CCRBRF CCRBRF CCRBRF
CCRWRBRF CCRWRBRF CCRWRBRF
CCSRBRF CCSRBRF CCSRBRF
CCSSPVC CCSRDIF CCSSPVC
CMMXU CMMXU CMMXU
CMSQI CMSQI CMSQI
COUVGAPC COUVLLN0 COUVPTOV
COUVPTOV COUVPTUV
COUVPTUV
CVGAPC GF2LLN0 GF2MMXN
GF2MMXN GF2PHAR
GF2PHAR GF2PTOV
GF2PTOV GF2PTUC
GF2PTUC GF2PTUV
GF2PTUV GF2PVOC
GF2PVOC PH1PTRC
PH1PTRC
CVMMXN CVMMXN CVMMXN
D2PTOC D2LLN0 D2PTOC
D2PTOC PH1PTRC
PH1PTRC
DPGAPC DPGGIO DPGAPC
DRPRDRE DRPRDRE DRPRDRE
ECPSCH ECPSCH ECPSCH
ECRWPSCH ECRWPSCH ECRWPSCH
EF2PTOC EF2LLN0 EF2PTRC
EF2PTRC EF2RDIR
EF2RDIR GEN2PHAR
GEN2PHAR PH1PTOC
PH1PTOC
EF4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR GEN4PHAR
GEN4PHAR PH1PTOC
PH1PTOC
EFPIOC EFPIOC EFPIOC
EFRWPIOC EFRWPIOC EFRWPIOC
ETPMMTR ETPMMTR ETPMMTR
FDPSPDIS FDPSPDIS FDPSPDIS
FMPSPDIS FMPSPDIS FMPSPDIS

Technical manual
Introduction

FRPSPDIS FPSRPDIS FPSRPDIS
FTAQFVR FTAQFVR FTAQFVR
FUFSPVC SDDRFUF FUFSPVC
SDDSPVC
GENPDIF GENPDIF GENGAPC
GENPDIF
GENPHAR
GENPTRC
GOPPDOP GOPPDOP GOPPDOP
PH1PTRC
GRPTTR GRPTTR GRPTTR
GSPTTR GSPTTR GSPTTR
GUPPDUP GUPPDUP GUPPDUP
PH1PTRC
HZPDIF HZPDIF HZPDIF
INDCALCH INDCALH INDCALH
ITBGAPC IB16FCVB ITBGAPC
L3CPDIF L3CPDIF L3CGAPC
L3CPDIF
L3CPHAR
L3CPTRC
L4CPDIF L4CLLN0 LLN0
L4CPDIF L4CGAPC
L4CPTRC L4CPDIF
L4CPSCH
L4CPTRC
L4UFCNT L4UFCNT L4UFCNT
L6CPDIF L6CPDIF L6CGAPC
L6CPDIF
L6CPHAR
L6CPTRC
LAPPGAPC LAPPLLN0 LAPPPDUP
LAPPPDUP LAPPPUPF
LAPPPUPF
LCCRPTRC LCCRPTRC LCCRPTRC
LCNSPTOC LCNSPTOC LCNSPTOC
LCNSPTOV LCNSPTOV LCNSPTOV
LCP3PTOC LCP3PTOC LCP3PTOC
LCP3PTUC LCP3PTUC LCP3PTUC
LCPTTR LCPTTR LCPTTR
LCZSPTOC LCZSPTOC LCZSPTOC
LCZSPTOV LCZSPTOV LCZSPTOV
LD0LLN0 LLN0 -
LDLPSCH LDLPDIF LDLPSCH
LDRGFC STSGGIO LDRGFC
LEXPDIS LEXPDIS LEXPDIS
LEXPTRC
LFPTTR LFPTTR LFPTTR
LMBRFLO LMBRFLO LMBRFLO
LOLSPTR LOLSPTR LOLSPTR

Technical manual
Introduction

LOVPTUV LOVPTUV LOVPTUV
LPHD LPHD
LPTTR LPTTR LPTTR
LT3CPDIF LT3CPDIF LT3CGAPC
LT3CPDIF
LT3CPHAR
LT3CPTRC
LT6CPDIF LT6CPDIF LT6CGAPC
LT6CPDIF
LT6CPHAR
LT6CPTRC
MVGAPC MVGGIO MVGAPC
NS2PTOC NS2LLN0 NS2PTOC
NS2PTOC NS2PTRC
NS2PTRC
NS4PTOC EF4LLN0 EF4PTRC
EF4PTRC EF4RDIR
EF4RDIR PH1PTOC
GEN4PHAR
PH1PTOC
O2RWPTOV GEN2LLN0 O2RWPTOV
O2RWPTOV PH1PTRC
PH1PTRC
OC4PTOC OC4LLN0 GEN4PHAR
GEN4PHAR PH3PTOC
PH3PTOC PH3PTRC
PH3PTRC
OEXPVPH OEXPVPH OEXPVPH
OOSPPAM OOSPPAM OOSPPAM
OOSPTRC
OV2PTOV GEN2LLN0 OV2PTOV
OV2PTOV PH1PTRC
PH1PTRC
PAPGAPC PAPGAPC PAPGAPC
PCFCNT PCGGIO PCFCNT
PH4SPTOC GEN4PHAR GEN4PHAR
OCNDLLN0 PH1BPTOC
PH1BPTOC PH1PTRC
PH1PTRC
PHPIOC PHPIOC PHPIOC
PSLPSCH ZMRPSL PSLPSCH
PSPPPAM PSPPPAM PSPPPAM
PSPPTRC
QCBAY QCBAY BAY/LLN0
QCRSV QCRSV QCRSV
RCHLCCH RCHLCCH RCHLCCH
REFPDIF REFPDIF REFPDIF
ROTIPHIZ ROTIPHIZ ROTIPHIZ
ROTIPTRC
ROV2PTOV GEN2LLN0 PH1PTRC
PH1PTRC ROV2PTOV
ROV2PTOV
SAPFRC SAPFRC SAPFRC

Technical manual
Introduction

SAPTOF SAPTOF SAPTOF
SAPTUF SAPTUF SAPTUF
SCCVPTOC SCCVPTOC SCCVPTOC
SCHLCCH SCHLCCH SCHLCCH
SCILO SCILO SCILO
SCSWI SCSWI SCSWI
SDEPSDE SDEPSDE SDEPSDE
SDEPTOC
SDEPTOV
SDEPTRC
SESRSYN RSY1LLN0 AUT1RSYN
AUT1RSYN MAN1RSYN
MAN1RSYN SYNRSYN
SYNRSYN
SLGAPC SLGGIO SLGAPC
SMBRREC SMBRREC SMBRREC
SMPPTRC SMPPTRC SMPPTRC
SP16GAPC SP16GGIO SP16GAPC
SPC8GAPC SPC8GGIO SPC8GAPC
SPGAPC SPGGIO SPGAPC
SSCBR SSCBR SSCBR
SSIMG SSIMG SSIMG
SSIML SSIML SSIML
PTRSTHR PTRSTHR PTRSTHR
STBPTOC STBPTOC BBPMSS
STBPTOC
STEFPHIZ STEFPHIZ STEFPHIZ
STTIPHIZ STTIPHIZ STTIPHIZ
SXCBR SXCBR SXCBR
SXSWI SXSWI SXSWI
T2WPDIF T2WPDIF T2WGAPC
T2WPDIF
T2WPHAR
T2WPTRC
T3WPDIF T3WPDIF T3WGAPC
T3WPDIF
T3WPHAR
T3WPTRC
TCLYLTC TCLYLTC TCLYLTC
TCSLTC
TCMYLTC TCMYLTC TCMYLTC
TEIGAPC TEIGGIO TEIGAPC
TEIGGIO
TEILGAPC TEILGGIO TEILGAPC
TMAGAPC TMAGGIO TMAGAPC
TPPIOC TPPIOC TPPIOC
TR1ATCC TR1ATCC TR1ATCC
TR8ATCC TR8ATCC TR8ATCC

Technical manual
Introduction

TRPTTR TRPTTR TRPTTR
U2RWPTUV GEN2LLN0 PH1PTRC
PH1PTRC U2RWPTUV
U2RWPTUV
UV2PTUV GEN2LLN0 PH1PTRC
PH1PTRC UV2PTUV
UV2PTUV
VDCPTOV VDCPTOV VDCPTOV
VDSPVC VDRFUF VDSPVC
VMMXU VMMXU VMMXU
VMSQI VMSQI VMSQI
VNMMXU VNMMXU VNMMXU
VRPVOC VRLLN0 PH1PTRC
PH1PTRC PH1PTUV
PH1PTUV VRPVOC
VRPVOC
VSGAPC VSGGIO VSGAPC
WRNCALH WRNCALH WRNCALH
ZC1PPSCH ZPCPSCH ZPCPSCH
ZC1WPSCH ZPCWPSCH ZPCWPSCH
ZCLCPSCH ZCLCPLAL ZCLCPSCH
ZCPSCH ZCPSCH ZCPSCH
ZCRWPSCH ZCRWPSCH ZCRWPSCH
ZCVPSOF ZCVPSOF ZCVPSOF
ZGVPDIS ZGVLLN0 PH1PTRC
PH1PTRC ZGVPDIS
ZGVPDIS ZGVPTUV
ZGVPTUV
ZMCAPDIS ZMCAPDIS ZMCAPDIS
ZMCPDIS ZMCPDIS ZMCPDIS
ZMFCPDIS ZMFCLLN0 PSFPDIS
PSFPDIS ZMFPDIS
ZMFPDIS ZMFPTRC
ZMFPTRC ZMMMXU
ZMMMXU
ZMFPDIS ZMFLLN0 PSFPDIS
PSFPDIS PSFPDIS
ZMFPDIS ZMFPDIS
ZMFPTRC ZMFPTRC
ZMMMXU ZMMMXU
ZMHPDIS ZMHPDIS ZMHPDIS
ZMMAPDIS ZMMAPDIS ZMMAPDIS
ZMMPDIS ZMMPDIS ZMMPDIS
ZMQAPDIS ZMQAPDIS ZMQAPDIS
ZMQPDIS ZMQPDIS ZMQPDIS
ZMRAPDIS ZMRAPDIS ZMRAPDIS
ZMRPDIS ZMRPDIS ZMRPDIS
ZMRPSB ZMRPSB ZMRPSB
ZSMGAPC ZSMGAPC ZSMGAPC

Technical manual
Available functions
Section 2 Available functions

GUID-F5776DD1-BD04-4872-BB89-A0412B4B5CC3 v1
The following tables list all the functions available in the IED. Those functions
that are not exposed to the user or do not need to be configured are not
described in this manual.
2.1 Main protection functions GUID-66BAAD98-851D-4AAC-B386-B38B57718BD2 v15
Table 2: Example of quantities
2 = number of basic instances

0-3 = option quantities
3-A03 = optional function included in packages A03 (refer to ordering details)
IEC 61850 or ANSI Function description Line Distance

function name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
Differential protection
HZPDIF 87 High impedance differential 00-03 3-A02 3-A02 3-A02
protection, single phase
LDRGFC 11REL Additional security logic for 0-1
differential protection
Impedance protection
ZMQPDIS, 21 Distance protection zone, 0-5
ZMQAPDIS quadrilateral characteristic
ZDRDIR 21D Directional impedance 0-2
quadrilateral
ZMCPDIS, 21 Distance measuring zone, 0-6
ZMCAPDIS quadrilateral characteristic for
series compensated lines
ZDSRDIR 21D Directional impedance 0-2
quadrilateral, including series
compensation
FDPSPDIS 21 Phase selection, quadrilateral 0-2
characteristic with fixed angle
ZMHPDIS 21 Full-scheme distance 0-5
protection, mho characteristic
ZMMPDIS, 21 Full-scheme distance 0-5
ZMMAPDIS protection, quadrilateral for
earth faults
ZDMRDIR 21D Directional impedance element 0-2
for mho characteristic

Technical manual
Available functions

function name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
ZDARDIR Additional distance protection 0-2

directional function for earth
faults
ZSMGAPC Mho impedance supervision 0-1
logic
FMPSPDIS 21 Faulty phase identification with 0-2
load enchroachment
ZMRPDIS, 21 Distance measuring zone, quad 0-5
ZMRAPDIS characteristic separate Ph-Ph
and Ph-E settings
FRPSPDIS 21 Phase selection, quadrilateral 0-2
characteristic with settable
angle
ZMFPDIS 21 High speed distance 0-2 1 1 1 1
protection, quad and mho
characteristic
ZMFCPDIS 21 High speed distance protection 0-2
for series comp. lines, quad and
mho characteristic
PPLPHIZ Phase preference logic 0-1
PPL2PHIZ Phase preference logic 0-1 1
ZMRPSB 68 Power swing detection 0-1 1 1 1 1
PSLPSCH Power swing logic 0-1 1 1 1 1
PSPPPAM 78 Poleslip/out-of-step protection 0-2 1-B24 1-B24 1-B24
OOSPPAM 78 Out-of-step protection 0-1 1 1 1
ZCVPSOF Automatic switch onto fault 1 1 1 1 1
logic, voltage and current
based

Technical manual
Available functions
2.2 Back-up protection functions GUID-A8D0852F-807F-4442-8730-E44808E194F0 v15

function name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
Current protection
PHPIOC 50 Instantaneous phase 0-3 1 1 1 1
overcurrent protection
OC4PTOC 51_671) Directional phase overcurrent 0-3 1 1 1 1
protection, four steps
EFPIOC 50N Instantaneous residual 0-3 1 1 1 1
EF4PTOC 51N Directional residual 0-3 1 1 1 1
67N2) overcurrent protection, four
steps
NS4PTOC 46I2 Four step directional negative 0-2 1 1 1 1
phase sequence overcurrent
protection
SDEPSDE 67N Sensitive directional residual 0-1 1 1-C16 1-C16 1-C16
overcurrent and power
protection
LCPTTR 26 Thermal overload protection, 0-2 1 1 1 1
one time constant, Celsius
LFPTTR 26 Thermal overload protection, 0-2 1 1 1 1
one time constant, Fahrenheit
CCRBRF 50BF Breaker failure protection 0-2 1 1 2 1
STBPTOC 50STB Stub protection 0-2 1 1 1B 1
1-B27
CCPDSC 52PD Pole discordance protection 0-2 1 1 2 1
GUPPDUP 37 Directional underpower 0-2 1-C39 1-C39 1-C39
protection
GOPPDOP 32 Directional overpower 0-2 1-C39 1-C39 1-C39
protection
BRCPTOC 46 Broken conductor check 1 1 1 1 1
VRPVOC 51V Voltage restrained 0-3 1 1 1 1
Voltage protection
UV2PTUV 27 Two step undervoltage 0-2 1 1 1 1
protection
OV2PTOV 59 Two step overvoltage 0-2 1 1 1 1
protection
ROV2PTOV 59N Two step residual overvoltage 0-2 1 1 1 1
protection
OEXPVPH 24 Overexcitation protection 0-1 1-D03 1-D03 1-D03

Technical manual
Available functions

function name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
VDCPTOV 60 Voltage differential protection 0-2 2 2 2

LOVPTUV 27 Loss of voltage check 1 1 1 1 1
PAPGAPC 27 Radial feeder protection 0-1
Frequency protection
SAPTUF 81 Underfrequency protection 0-6 1B 1B 1B 1B
3-E04 3-E04 3-E04 3-E04
SAPTOF 81 Overfrequency protection 0-6 1B 1B 1B 1B
3-E04 3-E04 3-E04 3-E04
SAPFRC 81 Rate-of-change of frequency 0-6 1B 1B 1B 1B
protection 3-E04 3-E04 3-E04 3-E04
Multipurpose protection
CVGAPC General current and voltage 0-4 1 4-F01 4-F01 4-F01
protection
General calculation
SMAIHPAC Multipurpose filter 0-6
1) 67 requires voltage
2) 67N requires voltage
2.3 Control and monitoring functions GUID-E3777F16-0B76-4157-A3BF-0B6B978863DE v19
IEC 61850 or ANSI Function Line Distance

function name description
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
Control
SESRSYN 25 Synchrocheck 0-2 1 1 2 1
, energizing
check and
synchronizin
g
SMBRREC 79 Autorecloser 0-4 1 1B 2B 1B
1-H04 2-H05 1-H04

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
APC10 3 Control 0-1 1-H37 1-H37 1-H37

functionality
for a single
bay, max 10
objects (1CB),
including
interlocking
(see Table 4)
APC15 3 Control 0-1 1-H38
functionality
for a single
bay, max 15
objects
(2CB),
including
interlocking
(see Table 5)
QCBAY Bay control 1 1 1 1 1
LOCREM Handling of 1 1 1 1 1
LR-switch
positions
LOCREMCTRL LHMI control 1 1 1 1 1
of PSTO
SXCBR Circuit 6 3 3 6 3
breaker
SLGAPC Logic 15 15 15 15 15
rotating
switch for
function
selection and
LHMI
presentation
VSGAPC Selector mini 30 30 30 30 30
switch
DPGAPC Generic 32 32 32 32 32
communicati
on function
for Double
Point
indication
SPC8GAPC Single point 5 5 5 5 5
generic
control
function 8
signals
AUTOBITS Automation 3 3 3 3 3
bits,
command
function for
DNP3.0
SINGLECMD Single 8 8 8 8 8
command, 16
signals

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
I103CMD Function 1 1 1 1 1
commands
for IEC
60870-5-103
I103GENCMD Function 50 50 50 50 50
commands
generic for
IEC
60870-5-103
I103POSCMD IED 50 50 50 50 50
commands
with position
and select for
IEC
60870-5-103
I103POSCMDV IED direct 50 50 50 50 50
commands
with position
for IEC
60870-5-103
I103IEDCMD IED 1 1 1 1 1
commands
for IEC
60870-5-103
I103USRCMD Function 4 4 4 4 4
commands
user defined
for IEC
60870-5-103
Secondary
system
supervision
CCSSPVC 87 Current 0-2 1 2 1
circuit
supervision
FUFSPVC Fuse failure 0-3 1 3 3 3
supervision
VDSPVC 60 Fuse failure 0-2 1-G03 1-G03 1-G03 1-G03
supervision
based on
voltage
difference
DELVSPVC 7V_78 Voltage delta 4 4 4 4 4
V supervision, 2
phase
DELISPVC 71 Current delta 4 4 4 4 4
supervision, 2
phase
DELSPVC 78 Real delta 4 4 4 4 4
supervision,
real
Logic

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
SMPPTRC 94 Tripping 12 12 12 12 12
logic
SMAGAPC General start 12 12 12 12 12
matrix block
STARTCOMB Start 32 32 32 32 32
combinator
TMAGAPC Trip matrix 12 12 12 12 12
logic
ALMCALH Logic for 5 5 5 5 5
group alarm
WRNCALH Logic for 5 5 5 5 5
group
warning
INDCALH Logic for 5 5 5 5 5
group
indication
AND, GATE, INV, Basic 40-420 40-42 40-42 40-42 40-42
LLD, OR, configurable 0 0 0 0
PULSETIMER, logic blocks
RSMEMORY, (see Table 3)
SRMEMORY,
TIMERSET, XOR
ANDQT, Configurable 0-1
INDCOMBSPQT, logic blocks
INDEXTSPQT, Q/T (see
INVALIDQT, Table 6)
INVERTERQT,
ORQT,
PULSETIMERQT,
RSMEMORYQT,
SRMEMORYQT,
TIMERSETQT,
XORQT
AND, GATE, INV, Extension 0-1
LLD, OR, logic package
PULSETIMER, (see Table 7)
RSMEMORY,
SLGAPC,
SRMEMORY,
TIMERSET,
VSGAPC, XOR
FXDSIGN Fixed signal 1 1 1 1 1
function
block
B16I Boolean to 18 18 18 18 18
integer
conversion,
16 bit

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
BTIGAPC Boolean to 16 16 16 16 16
integer
conversion
with logical
node
representatio
n, 16 bit
IB16 Integer to 18 18 18 18 18
Boolean 16
conversion
ITBGAPC Integer to 16 16 16 16 16
Boolean 16
conversion
with Logic
Node
representatio
n
TEIGAPC Elapsed time 12 12 12 12 12
integrator
with limit
transgressio
n and
overflow
supervision
INTCOMP Comparator 30 30 30 30 30
for integer
inputs
REALCOMP Comparator 30 30 30 30 30
for real
inputs
Table 3: Total number of instances for basic configurable logic blocks

Basic configurable logic block Total number of instances
AND 280
GATE 40
INV 420
LLD 40
OR 298
PULSETIMER 40
RSMEMORY 40
SRMEMORY 40
TIMERSET 60
XOR 40

Technical manual
Available functions
Table 4: Number of function instances in APC10

Function name Function description Total number of instances
SCILO Interlocking 10
BB_ES 3
A1A2_BS 2
A1A2_DC 3
ABC_BC 1
BH_CONN 1
BH_LINE_A 1
BH_LINE_B 1
DB_BUS_A 1
DB_BUS_B 1
DB_LINE 1
ABC_LINE 1
AB_TRAFO 1
SCSWI Switch controller 10
SXSWI Circuit switch 9
QCRSV Apparatus control 2
RESIN1 1
RESIN2 59
POS_EVAL Evaluation of position indication 10
XLNPROXY Proxy for signals from switching 12
device via GOOSE
GOOSEXLNRCV GOOSE function block to receive a 12
switching device
Table 5: Number of function instances in APC15

SCILO Interlocking 15
BB_ES 3
A1A2_BS 2
A1A2_DC 3
ABC_BC 1
BH_CONN 1
BH_LINE_A 1
BH_LINE_B 1
DB_BUS_A 1
DB_BUS_B 1
DB_LINE 1
ABC_LINE 1
AB_TRAFO 1
SCSWI Switch controller 15
SXSWI Circuit switch 14

Technical manual
Available functions

QCRSV Apparatus control 2
RESIN1 1
RESIN2 59
POS_EVAL Evaluation of position indication 15
XLNPROXY Proxy for signals from switching 20
device via GOOSE
GOOSEXLNRCV GOOSE function block to receive a 20
switching device
Table 6: Total number of instances for configurable logic blocks Q/T

Configurable logic blocks Q/T Total number of instances
ANDQT 120
INDCOMBSPQT 20
INDEXTSPQT 20
INVALIDQT 22
INVERTERQT 120
ORQT 120
PULSETIMERQT 40
RSMEMORYQT 40
SRMEMORYQT 40
TIMERSETQT 40
XORQT 40
Table 7: Total number of instances for extended logic package

Extended configurable logic block Total number of instances
AND 220
GATE 49
INV 220
LLD 49
OR 220
PULSETIMER 89
RSMEMORY 40
SLGAPC 74
SRMEMORY 130
TIMERSET 113
VSGAPC 120
XOR 89

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
Monitoring
CVMMXN Power 6 6 6 6 6
system
measuremen
t
CMMXU Current 10 10 10 10 10
measuremen
t
VMMXU Voltage 6 6 6 6 6
measuremen
t phase-
phase
CMSQI Current 6 6 6 6 6
sequence
measuremen
t
VMSQI Voltage 6 6 6 6 6
sequence
measuremen
t
VNMMXU Voltage 6 6 6 6 6
measuremen
t phase-earth
AISVBAS General 1 1 1 1 1
service value
presentation
of analog
inputs
EVENT Event 20 20 20 20 20
function
DRPRDRE, Disturbance 1 1 1 1 1
A4RADR, report
SPGAPC Generic 96 96 96 96 96
communicati
on function
for Single
Point
indication
SP16GAPC Generic 16 16 16 16 16
communicati
on function
for Single
Point
indication 16
inputs
MVGAPC Generic 24 24 24 24 24
communicati
on function
for measured
values
BINSTATREP Logical signal 3 3 3 3 3
status report

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
RANGE_XP Measured 66 66 66 66 66
value
expander
block
SSIMG 63 Insulation 21 21 21 21 21
supervision
for gas
medium
SSIML 71 Insulation 3 3 3 3 3
supervision
for liquid
medium
SSCBR Circuit 0-6 3 3 6 3
breaker
condition
monitoring
LMBRFLO Fault locator 1 1 1 1 1
I103MEAS Measurands 1 1 1 1 1
for IEC
60870-5-103
I103MEASUSR Measurands 3 3 3 3 3
user defined
signals for
IEC
60870-5-103
I103AR Function 1 1 1 1 1
status auto-
recloser for
IEC
60870-5-103
I103EF Function 1 1 1 1 1
status earth-
fault for IEC
60870-5-103
I103FLTPROT Function 1 1 1 1 1
status fault
protection
for IEC
60870-5-103
I103IED IED status for 1 1 1 1 1
IEC
60870-5-103
I103SUPERV Supervison 1 1 1 1 1
status for IEC
60870-5-103
I103USRDEF Status for 20 20 20 20 20
user defined
signals for
IEC
60870-5-103
L4UFCNT Event 30 30 30 30 30
counter with
limit
supervision

Technical manual
Available functions

REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
TEILGAPC Running hour 6 6 6 6 6

meter
PTRSTHR 51TF Through fault 0-2 2-M22 2-M22 2-M22 2-M22
monitoring
CHMMHAI ITHD Current 0-3 0-3 0-3 0-3 0-3
harmonic
monitoring, 3
phase
VHMMHAI VTHD Voltage 0-3 0-3 0-3 0-3 0-3
harmonic
monitoring, 3
phase
Metering
PCFCNT Pulse-counter 16 16 16 16 16
logic
ETPMMTR Function for 6 6 6 6 6
energy
calculation
and demand
handling
2.4 Communication GUID-5F144B53-B9A7-4173-80CF-CD4C84579CB5 v17
IEC 61850 or function ANSI Function description Line Distance

name REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
Station communication
ADE LON communication protocol 1 1 1 1 1
HORZCOMM Network variables via LON 1 1 1 1 1
DNPGEN DNP3.0 communication general 1 1 1 1 1
protocol
IEC 61850-8-1 IEC 61850 1 1 1 1 1
GOOSEINTLKRCV Horizontal communication via 59 59 59 59 59
GOOSE for interlocking
GOOSEBINRCV GOOSE binary receive 16 16 16 16 16
GOOSEDPRCV GOOSE function block to 64 64 64 64 64
receive a double point value
GOOSEINTRCV GOOSE function block to 32 32 32 32 32
receive an integer value
GOOSEMVRCV GOOSE function block to 60 60 60 60 60
receive a measurand value

Technical manual
Available functions

name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
GOOSESPRCV GOOSE function block to 64 64 64 64 64

receive a single point value
MULTICMDRCV, Multiple command and transmit 60/10 60/10 60/10 60/10 60/10
MULTICMDSND
AGSAL Generic security application 1 1 1 1 1
component
LD0LLN0 IEC 61850 LD0 LLN0 1 1 1 1 1
SYSLLN0 IEC 61850 SYS LLN0 1 1 1 1 1
LPHD Physical device information 1 1 1 1 1
PCMACCS IED configuration protocol 1 1 1 1 1
FSTACCS Field service tool access 1 1 1 1 1
IEC 61850-9-2 Process bus 0-1 1-P30 1-P30 1-P30 1-P30
communication, 8 merging
units
ACTIVLOG Activity logging 1 1 1 1 1
ALTRK Service tracking 1 1 1 1 1
PRP IEC 62439-3 Parallel redundancy 0-1 1-P23 1-P23 1-P23 1-P23
protocol
HSR IEC 62439-3 High-availability 0-1 1-P24 1-P24 1-P24 1-P24
seamless redundancy
PMUCONF, Synchrophasor report, 8 0-1 1-P32 1-P32 1-P32 1
PMUREPORT, phasors (see Table 8)
PHASORREPORT1,
ANALOGREPORT1
BINARYREPORT1,
SMAI1 - SMAI12
3PHSUM
PMUSTATUS
PTP Precision time protocol 1 1 1 1 1
SCHLCCH Access point diagnostic for 6 6 6 6 6
non-redundant Ethernet port
RCHLCCH Access point diagnostic for 3 3 3 3 3
redundant Ethernet ports
QUALEXP IEC 61850 quality expander 96 96 96 96 96
Remote communication
BinSignRec1_1 Binary signal transfer receive 3/3/6 3/3/6 3/3/6 3/3/6 3/3/6
BinSignRec1_2
BinSignReceive2
BinSignTrans1_1 Binary signal transfer transmit 3/3/6 3/3/6 3/3/6 3/3/6 3/3/6
BinSignTrans1_2
BinSignTransm2
BinSigRec1_12M Binary signal transfer, 2Mbit 3 3 3 3 3
BinSigRec1_22M receive/transmit
BinSigTran1_12M
BinSigTran1_22M
LDCMTRN Transmission of analog data 1 1 1 1 1
from LDCM

Technical manual
Available functions

name
REL670 (D42)
REL670 (A42)
REL670 (B42)
REL670 (A41)
REL670
(Customized)
LDCMTRN_2M Transmission of analog data 6 6 6 6 6

from LDCM, 2Mbit
LDCMRecBinStat1 Receive binary status from 6/3/3 6/3/3 6/3/3 6/3/3 6/3/3
LDCMRecBinStat2 remote LDCM
LDCMRecBinStat3
LDCMRecBinS2_2M Receive binary status from 3 3 3 3 3
LDCM, 2Mbit
LDCMRecBinS3_2M Receive binary status from 3 3 3 3 3
remote LDCM, 2Mbit
Scheme communication
ZCPSCH 85 Scheme communication logic 0-2 1 1 1 1
with delta based blocking
scheme signal transmit
ZC1PPSCH 85 Phase segregated scheme 0-2 1-B05 1-B05 1-B05
communication logic for
distance protection
ZCRWPSCH 85 Current reversal and weak-end 0-2 1 1 1 1
infeed logic for distance
protection
ZC1WPSCH 85 Current reversal and weak-end 0-2 1-B05 1-B05 1-B05
infeed logic for phase
segregated communication
ZCLCPSCH Local acceleration logic 0-1 1 1 1 1
ECPSCH 85 Scheme communication logic 0-1 1 1 1
for residual overcurrent
protection
ECRWPSCH 85 Current reversal and weak-end 0-1 1 1 1
infeed logic for residual
DTT Direct transfer trip 0-1
Table 8: Number of function instances in Synchrophasor report, 8 phasors

Function name Function description Number of instances
PMUCONF Configuration parameters for C37.118 2011 and IEEE1344 protocol 1
PMUREPORT Protocol reporting via IEEE 1344 and C37.118 1
PHASORREPORT1 Protocol reporting of phasor data via IEEE 1344 and C37.118, phasors 1-8 1
ANALOGREPORT1 Protocol reporting of analog data via IEEE 1344 and C37.118, analogs 1-8 1
BINARYREPORT1 Protocol reporting of binary data via IEEE 1344 and C37.118, binary 1-8 1
SMAI1–SMAI12 Signal matrix for analog inputs 1
3PHSUM Summation block 3 phase 6
PMUSTATUS Diagnostics for C37.118 2011 and IEEE1344 protocol 1

Technical manual
Available functions
2.5 Basic IED functions GUID-C8F0E5D2-E305-4184-9627-F6B5864216CA v13
Table 9: Basic IED functions

IEC 61850 or function Description
name
INTERRSIG Self supervision with internal event list
TIMESYNCHGEN Time synchronization module
BININPUT, Time synchronization
SYNCHCAN,
SYNCHGPS,
SYNCHCMPPS,
SYNCHLON,
SYNCHPPH,
SYNCHPPS, SNTP,
SYNCHSPA
TIMEZONE Time synchronization
IRIG-B Time synchronization
SETGRPS Number of setting groups
ACTVGRP Parameter setting groups
TESTMODE Test mode functionality
CHNGLCK Change lock function
SMBI Signal matrix for binary inputs
SMBO Signal matrix for binary outputs
SMMI Signal matrix for mA inputs
SMAI1 - SMAI12 Signal matrix for analog inputs
3PHSUM Summation block 3 phase
ATHSTAT Authority status
ATHCHCK Authority check
AUTHMAN Authority management
FTPACCS FTP access with password
ALTMS Time master supervision
ALTIM Time management
COMSTATUS Protocol diagnostic
Table 10: Local HMI functions

IEC 61850 or function ANSI Description
name
LHMICTRL Local HMI signals
LANGUAGE Local human machine language
SCREEN Local HMI Local human machine screen behavior
FNKEYTY1–FNKEYTY5 Parameter setting function for HMI in PCM600
FNKEYMD1–
FNKEYMD5

Technical manual
Available functions
IEC 61850 or function ANSI Description

name
LEDGEN General LED indication part for LHMI
OPENCLOSE_LED LHMI LEDs for open and close keys
GRP1_LED1– Basic part for CP HW LED indication module
GRP1_LED15
GRP2_LED1–
GRP2_LED15
GRP3_LED1–
GRP3_LED15

Technical manual
76
Analog inputs
Section 3 Analog inputs SEMOD55010-1 v3
3.1 Introduction SEMOD55003-5 v11
Analog input channels must be configured and set properly in order to get correct
measurement results and correct protection operations. For power measuring, all directional
and differential functions, the directions of the input currents must be defined in order to
reflect the way the current transformers are installed/connected in the field ( primary and
secondary connections ). Measuring and protection algorithms in the IED use primary system
quantities. Setting values are in primary quantities as well and it is important to set the data
about the connected current and voltage transformers properly.
An AISVBAS reference PhaseAngleRef can be defined to facilitate service values reading. This
analog channel's phase angle will always be fixed to zero degrees and remaining analog
channel's phase angle information will be shown in relation to this analog input. During testing
and commissioning of the IED, the reference channel can be changed to facilitate testing and
service values reading.
The IED has the ability to receive analog values from primary equipment, that
are sampled by Merging units (MU) connected to a process bus, via the IEC
61850-9-2 LE protocol.
The availability of VT inputs depends on the ordered transformer input module

(TRM) type.
3.2 Function block SEMOD116577-1 v5
The hardware channels appear in the signal matrix tool (SMT) and in ACT when
a TRM is included in the configuration with the hardware configuration tool. In
the SMT or the ACT, they can be mapped to the desired virtual input (SMAI) of
the IED and used internally in the configuration.
3.3 Signals
PID-3920-OUTPUTSIGNALS v6
Table 11: TRM_12I Output signals

Name Type Description
STATUS BOOLEAN Analogue input module status
CH1(I) STRING Analogue current input 1

Technical manual
Analog inputs

Table 12: TRM_6I_6U Output signals

CH7(U) STRING Analogue voltage input 7
Table 13: TRM_6I Output signals



Technical manual
Analog inputs




Technical manual
Analog inputs

3.4 Settings
SEMOD129840-4 v2
Dependent on ordered IED type.
PID-4153-SETTINGS v8
Table 17: AISVBAS Non group settings (basic)

Name Values (Range) Unit Step Default Description
PhaseAngleRef TRM40-Ch1 - Ch12 - - TRM40-Ch1 Reference channel
TRM41-Ch1 - Ch12 for phase angle
MU1-L1I - L4I presentation
MU1-L1U - L4U
MU2-L1I - L4I
MU2-L1U - L4U
MU3-L1I - L4I
MU3-L1U - L4U
MU4-L1I - L4I
MU4-L1U - L4U
MU5-L1I - L4I
MU5-L1U - L4U
MU6-L1I - L4I
MU6-L1U - L4U
MU7-L1I - L4I
MU7-L1U - L4U
MU8-L1I - L4I
MU8-L1U - L4U
MU9-L1I - L4I
MU9-L1U - L4U
MU10-L1I - L4I
MU10-L1U - L4U
MU11-L1I - L4I
MU11-L1U - L4U
MU12-L1I - L4I
MU12-L1U - L4U
Table 18: TRM_12I Non group settings (basic)

CTStarPoint1 FromObject - - ToObject ToObject= towards protected object,
ToObject FromObject= the opposite
CTsec1 1 - 10 A 1 1 Rated CT secondary current
CTprim1 1 - 99999 A 1 3000 Rated CT primary current

Technical manual
Analog inputs

Table 19: TRM_6I_6U Non group settings (basic)


Technical manual
Analog inputs

VTsec7 0.001 - 999.999 V 0.001 110.000 Rated VT secondary voltage
VTprim7 0.05 - 2000.00 kV 0.05 400.00 Rated VT primary voltage
Table 20: TRM_6I Non group settings (basic)


Technical manual
Analog inputs



Technical manual
Analog inputs



Technical manual
Analog inputs



Technical manual
Analog inputs

3.5 Monitored data

PID-6531-MONITOREDDATA v3
Table 24: AISVBAS Monitored data

Name Type Values (Range) Unit Description
Status INTEGER 0=Ok - Service value status
1=Error
2=AngRefLow
3=Uncorrelated
Table 25: TRM_12I Monitored data

STATUS BOOLEAN 0=Ok - Analogue input module status
1=Error
Table 26: TRM_6I_6U Monitored data

1=Error
Table 27: TRM_6I Monitored data

1=Error

Technical manual
Analog inputs

1=Error

1=Error

1=Error
3.6 Operation principle SEMOD55028-5 v9
The direction of a measured current depends on the connection of the CT. The main CTs are
typically star connected and can be connected with the star point towards the object or away
from the object. This information must be set in the IED.
Once the CT direction settings is correctly entered the internal IED convention of the
directionality is defined as follows:
• Positive value of current or power means that the quantity has the direction into the
protected object.
• Negative value of current or power means that the quantity has the direction out from the
protected object.
For directional functions the directional conventions are defined as follows (see Figure 5)
• Forward means the direction is into the object.

• Reverse means the direction is out from the object.

Technical manual
Analog inputs
Definition of direction Definition of direction

for directional functions for directional functions
Reverse Forward Forward Reverse
Protected Object
Line, transformer, etc
e.g. P, Q, I e.g. P, Q, I
Measured quantity is Measured quantity is
positive when flowing positive when flowing
towards the object towards the object
Set parameter Set parameter

CTStarPoint CTStarPoint
Correct Setting is Correct Setting is
"ToObject" "FromObject"
en05000456.vsd
Figure 5: Internal convention of the directionality in the IED

If the settings of the primary CT is correct, that is CTStarPoint set as FromObject or ToObject
according to the plant condition, then a positive quantity always flows towards the protected
object, and a Forward direction always looks towards the protected object.
The settings of the IED is performed in primary values. The ratios of the main CTs and VTs are,
therefore, basic data for the IED. The user has to set the rated secondary and primary currents
and voltages of the CTs and VTs to provide the IED with their rated ratios.
The CT and VT ratio and the name on respective channel is done under Main menu/Hardware/
Analog modules in the Parameter Settings tool or on the HMI.
3.7 Technical data SEMOD55412-1 v1
M16988-1 v11
Table 31: TRM - Energizing quantities, rated values and limits for protection transformer
Description Value
Frequency
Rated frequency fr 50/60 Hz
Operating range fr ± 10%
Current inputs
Rated current Ir 1 or 5 A
Operating range (0-100) x Ir
Thermal withstand 100 × Ir for 1 s *)

30 × Ir for 10 s
10 × Ir for 1 min
4 × Ir continuously
Dynamic withstand 250 × Ir one half wave
Burden < 20 mVA at Ir = 1 A

< 150 mVA at Ir = 5 A
*) max. 350 A for 1 s when COMBITEST test switch is included.

Voltage inputs **)
Rated voltage Ur 110 or 220 V
Operating range 0 - 340 V


Technical manual
Analog inputs
Description Value
Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
**) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency
Table 32: TRM - Energizing quantities, rated values and limits for measuring transformer
Description Value
Frequency
Rated frequency fr 50/60 Hz
Operating range fr ± 10%
Current inputs
Rated current Ir 1A 5A
Operating range (0-1.8) × Ir (0-1.6) × Ir
Thermal withstand 80 × Ir for 1 s 65 × Ir for 1 s

25 × Ir for 10 s 20 × Ir for 10 s
10 × Ir for 1 min 8 × Ir for 1 min
1.8 × Ir for 30 min 1.6 × Ir for 30 min
1.1 × Ir continuously 1.1 × Ir continuously
Burden < 200 mVA at Ir < 350 mVA at Ir
Voltage inputs *)
Rated voltage Ur 110 or 220 V
Operating range 0 - 340 V

Thermal withstand 450 V for 10 s
420 V continuously
Burden < 20 mVA at 110 V
< 80 mVA at 220 V
*) all values for individual voltage inputs
Note! All current and voltage data are specified as RMS values at rated frequency
SEMOD53376-2 v6
Table 33: CT and VT circuit connectors

Connector type Rated voltage and current Maximum conductor area
Screw compression type 250 V AC, 20 A 4 mm2 (AWG12)
2 x 2.5 mm2 (2 x AWG14)
Terminal blocks suitable for ring lug 250 V AC, 20 A 4 mm2 (AWG12)
terminals

Technical manual
90
Binary input and output modules
Section 4 Binary input and output modules

4.1 Binary input
4.1.1 Binary input debounce filter GUID-AE43976C-E966-484C-AF39-89B2B12F56DC v5
The debounce filter eliminates bounces and short disturbances on a binary input.
A time counter is used for filtering. The time counter is increased once in a millisecond when a
binary input is high, or decreased when a binary input is low. A new debounced binary input
signal is forwarded when the time counter reaches the set DebounceTime value and the
debounced input value is high or when the time counter reaches 0 and the debounced input
value is low. The default setting of DebounceTime is 1 ms.
The binary input ON-event gets the time stamp of the first rising edge, after which the counter
does not reach 0 again. The same happens when the signal goes down to 0 again.
4.1.2 Oscillation filter GUID-41B89E6F-50C3-44BF-9171-3CC82EB5CA15 v4
Binary input wiring can be very long in substations and there are electromagnetic fields from
for example nearby breakers. An oscillation filter is used to reduce the disturbance from the
system when a binary input starts oscillating.
An oscillation counter counts the debounced signal state changes during 1 s. If the counter
value is greater than the set value OscBlock, the input signal is blocked. The input signal is
ignored until the oscillation counter value during 1 s is below the set value OscRelease.
4.1.3 Settings
GUID-07348953-4A72-444B-A31A-030ABEA8E0C4 v1
OscBlock must always be set to a value greater than OscRelease. If this is not
done, oscillation detection will not function correctly, and the resulting
behaviour will be undefined.
4.1.3.1 Setting parameters for binary input modules

Table 34: BIM Non group settings (basic)

Operation Off - - On Operation Off/On
On
DebounceTime 0.001 - 0.020 s 0.001 0.001 Debounce time for binary inputs
OscBlock 1 - 40 Hz 1 40 Oscillation block limit
OscRelease 1 - 30 Hz 1 30 Oscillation release limit

Technical manual
Binary input and output modules
4.1.3.2 Setting parameters for binary input/output module

Table 35: IOMIN Non group settings (basic)

Operation Off - - On Binary input/output module in
On operation (On) or not (Off)
DebounceTime 0.001 - 0.020 s 0.001 0.001 Debounce time for binary inputs
OscBlock 1 - 40 Hz 1 40 Oscillation block limit
OscRelease 1 - 30 Hz 1 30 Oscillation release limit

Technical manual
Local Human-Machine-Interface LHMI
Section 5 Local Human-Machine-Interface

LHMI
5.1 Local HMI screen behaviour
5.1.1 Identification
GUID-84392EFF-4D3F-4A67-A6ED-34C6E98574D6 v1
Function description IEC 61850 IEC 60617 ANSI/IEEE C37.2

identification identification device number
Local HMI screen behaviour SCREEN - -
5.1.2 Settings
Table 36: SCREEN Non group settings (basic)

DisplayTimeout 1 - 120 Min 1 10 Local HMI display timeout
ContrastLevel -100 - 100 % 10 0 Contrast level for display
DefaultScreen - 0 Default screen
EvListSrtOrder Latest on top - - Latest on top Sort order of event list
Oldest on top
AutoIndicationDRP Off - - Off Automatic indication of disturbance
On report
SubstIndSLD No - - No Substitute indication on single line
Yes diagram
InterlockIndSLD No - - No Interlock indication on single line
Yes diagram
BypassCommands No - - No Enable bypass of commands
Yes
5.2 Local HMI signals
GUID-03AB7AEE-87D3-4F3C-B6B9-B1EB1B538E38 v1

Local HMI signals LHMICTRL - -
5.2.2 Function block GUID-A8AC51E9-5BD7-4A80-9576-4816F14DD08D v2

Technical manual
LHMICTRL
CLRLEDS HMI-ON
RED-S
YELLOW-S
YELLOW-F
CLRPULSE
LEDSCLRD
Figure 6: LHMICTRL function block
5.2.3 Signals
PID-3992-INPUTSIGNALS v6
Table 37: LHMICTRL Input signals

Name Type Default Description
CLRLEDS BOOLEAN 0 Input to clear the LCD-HMI LEDs
Table 38: LHMICTRL Output signals

HMI-ON BOOLEAN Backlight of the LCD display is active
RED-S BOOLEAN Red LED on the LCD-HMI is steady
YELLOW-S BOOLEAN Yellow LED on the LCD-HMI is steady
YELLOW-F BOOLEAN Yellow LED on the LCD-HMI is flashing
CLRPULSE BOOLEAN A pulse is provided when the LEDs on the LCD-HMI are
cleared
LEDSCLRD BOOLEAN Active when the LEDs on the LCD-HMI are not active
5.3 Basic part for LED indication module
GUID-6E36C0BC-F284-4C88-A4A8-9535D3BE8B14 v2

Basic part for LED indication module LEDGEN - -
Basic part for LED indication HW GRP1_LED1 - - -
module GRP1_LED15
GRP2_LED1 -
GRP2_LED15
GRP3_LED1 -
GRP3_LED15
5.3.2 Function block GUID-BDB5797F-F27E-4FEE-9FDB-1C9E2F572BB6 v3

Technical manual
LEDGEN
BLOCK NEWIND
RESET ACK
Figure 7: LEDGEN function block
GRP1_LED1
^HM1L01R
^HM1L01Y
^HM1L01G
Figure 8: GRP1_LED1 function block

The GRP1_LED1 function block is an example. The 15 LEDs in each of the three groups have a
similar function block.
5.3.3 Signals
Table 39: LEDGEN Input signals

BLOCK BOOLEAN 0 Input to block the operation of the LEDs
RESET BOOLEAN 0 Input to acknowledge/reset the indication LEDs
Table 40: LEDGEN Output signals

NEWIND BOOLEAN New indication signal if any LED indication input is set
ACK BOOLEAN A pulse is provided when the LEDs are acknowledged
Table 41: GRP1_LED1 Input signals

HM1L01R BOOLEAN 0 Red indication of LED1, local HMI alarm group 1
HM1L01Y BOOLEAN 0 Yellow indication of LED1, local HMI alarm group 1
HM1L01G BOOLEAN 0 Green indication of LED1, local HMI alarm group 1
5.3.4 Settings
Table 42: LEDGEN Non group settings (basic)

Operation Off - - On Operation Off/On
On
tRestart 0.0 - 100.0 s 0.1 0.0 Defines the disturbance length
tMax 0.1 - 100.0 s 0.1 1.0 Maximum time for the definition of a
disturbance

Technical manual
Table 43: GRP1_LED1 Non group settings (basic)

SequenceType Follow-S - - Follow-S Sequence type for LED 1, local HMI
Follow-F alarm group 1
LatchedAck-F-S
LatchedAck-S-F
LatchedColl-S
LatchedReset-S
LabelOff 0 - 18 - 1 G1L01_OFF Label string shown when LED 1, alarm
group 1 is off
LabelRed 0 - 18 - 1 G1L01_RED Label string shown when LED 1, alarm
group 1 is red
LabelYellow 0 - 18 - 1 G1L01_YELLOW Label string shown when LED 1, alarm
group 1 is yellow
LabelGreen 0 - 18 - 1 G1L01_GREEN Label string shown when LED 1, alarm
group 1 is green
5.4 LCD part for HMI function keys control module GUID-EECAE7FA-7078-472C-A429-F7607DB884EB v2
GUID-E6611022-5EA3-420D-ADCD-9D1E7604EFEB v1

LCD part for HMI Function Keys FNKEYMD1 - - -
Control module FNKEYMD5
5.4.2 Function block

GUID-A803A728-5CFC-4606-98E4-793E873B99D4 v3
FNKEYMD1
^LEDCTL1 ^FKEYOUT1
Figure 9: FNKEYMD1 function block

Only the function block for the first button is shown above. There is a similar block for every
function key button.
5.4.3 Signals
Table 44: FNKEYMD1 Input signals

LEDCTL1 BOOLEAN 0 LED control input for function key
Table 45: FNKEYMD1 Output signals

FKEYOUT1 BOOLEAN Output controlled by function key

Technical manual
5.4.4 Settings
Table 46: FNKEYMD1 Non group settings (basic)

Mode Off - - Off Output operation mode
Toggle
Pulsed
PulseTime 0.001 - 60.000 s 0.001 0.200 Pulse time for output controlled by
LCDFn1
LabelOn 0 - 18 - 1 LCD_FN1_ON Label for LED on state
LabelOff 0 - 18 - 1 LCD_FN1_OFF Label for LED off state
ReqAuthority Off - - On User authorization needed for
On function key operation
Table 47: FNKEYTY1 Non group settings (basic)

Type Off - - Off Function key type
Menu shortcut
Control
MenuShortcut - 0 Menu shortcut for function key
GUID-BCE87D54-C836-40EE-8DA7-779B767059AB v2
For setting ReqAuthority, when users are configured through local or central
account management, the default behavior of the function keys are to only
operate if a user is logged in, and the user have the required rights. This
authentication check can be configured to be bypassed per function key by
changing the ReqAuthority from ON to OFF. To be able to change this, the user
changing it have to have the Security advanced right.
MenuShortcut values are product dependent and created dynamically depending on the
product main menu.

Technical manual
5.5 Operation principle
5.5.1 Local HMI AMU0600442 v15
Figure 10: Local human-machine interface

The LHMI of the IED contains the following elements
• Keypad
• Display (LCD)
• LED indicators
• Communication port for PCM600
The LHMI is used for setting, monitoring and controlling.

Technical manual
5.5.1.1 Keypad AMU0600428 v19
The LHMI keypad contains push-buttons which are used to navigate in different views or
menus. The push-buttons are also used to acknowledge alarms, reset indications, provide help
and switch between local and remote control mode.
The keypad also contains programmable push-buttons that can be configured either as menu
shortcut or control buttons.

Technical manual
24
1
23
2
18
3
19
4
6 20
21
7 22
8 9 10 11 12 13 14 15 16 17
Figure 11: LHMI keypad with object control, navigation and command push-buttons and
RJ-45 communication port
1...5 Function button

6 Close
7 Open
8 Escape
9 Left
10 Down
11 Up
12 Right
13 Key
14 Enter
15 Remote/Local
16 Uplink LED
17 Not in use
18 Multipage
19 Menu
20 Clear
21 Help

Technical manual
22 Communication port
23 Programmable indication LEDs
24 IED status LEDs
5.5.1.2 Display GUID-55739D4F-1DA5-4112-B5C7-217AAF360EA5 v13
The LHMI includes a graphical monochrome liquid crystal display (LCD) with a resolution of 320
x 240 pixels. The character size can vary. The amount of characters and rows fitting the view
depends on the character size and the view that is shown.
The display view is divided into four basic areas.
Figure 12: Display layout
1 Path
2 Content
3 Status
4 Scroll bar (appears when needed)

Technical manual
• The path shows the current location in the menu structure. If the path is too long to be
shown, it is truncated from the beginning, and the truncation is indicated with three dots.
• The content area shows the menu content.
• The status area shows the current IED time, the user that is currently logged in and the
object identification string which is settable via the LHMI or with PCM600.
• If text, pictures or other items do not fit in the display, a vertical scroll bar appears on the
right. The text in content area is truncated from the beginning if it does not fit in the
display horizontally. Truncation is indicated with three dots.
Figure 13: Truncated path

The number after : (colon sign) at the end of the function instance, for example, 1 in SMAI1:1,
indicates the number of that function instance.
The function key button panel shows on request what actions are possible with the function
buttons. Each function button has a LED indication that can be used as a feedback signal for
the function button control action. The LED is connected to the required signal with PCM600.

Technical manual
GUID-C98D972D-D1D8-4734-B419-161DBC0DC97B V1 EN-US
Figure 14: Function button panel

The indication LED panel shows on request the alarm text labels for the indication LEDs. Three
indication LED pages are available.
GUID-5157100F-E8C0-4FAB-B979-FD4A971475E3 V1 EN-US
Figure 15: Indication LED panel

The function button and indication LED panels are not visible at the same time. Each panel is
shown by pressing one of the function buttons or the Multipage button. Pressing the ESC
button clears the panel from the display. Both panels have a dynamic width that depends on
the label string length.
5.5.1.3 LEDs AMU0600427 v15
The LHMI includes three status LEDs above the display: Ready, Start and Trip.
There are 15 programmable indication LEDs on the front of the LHMI. Each LED can indicate
three states with the colors: green, yellow and red. The texts related to each three-color LED
are divided into three panels.
There are 3 separate panels of LEDs available. The 15 physical three-color LEDs in one LED
group can indicate 45 different signals. Altogether, 135 signals can be indicated since there are
three LED groups. The LEDs are lit according to priority, with red being the highest and green

Technical manual
the lowest priority. For example, if on one panel there is an indication that requires the green
LED to be lit, and on another panel there is an indication that requires the red LED to be lit, the
red LED takes priority and is lit. The LEDs can be configured with PCM600 and the operation
mode can be selected with the LHMI or PCM600.
Information panels for the indication LEDs are shown by pressing the Multipage button.
Pressing that button cycles through the three pages. A lit or un-acknowledged LED is indicated
with a highlight. Such lines can be selected by using the Up/Down arrow buttons. Pressing the
Enter key shows details about the selected LED. Pressing the ESC button exits from
information pop-ups as well as from the LED panel as such.
The Multipage button has a LED. This LED is lit whenever any LED on any panel is lit. If there are
un-acknowledged indication LEDs, then the Multipage LED blinks. To acknowledge LEDs, press
the Clear button to enter the Reset menu (refer to description of this menu for details).
There are two additional LEDs which are next to the control buttons and . These
LEDs can indicate the status of two arbitrary binary signals by configuring the
OPENCLOSE_LED function block. For instance, OPENCLOSE_LED can be connected to a circuit
breaker to indicate the breaker open/close status on the LEDs.
Figure 16: OPENCLOSE_LED connected to SXCBR
5.5.2 LED configuration alternatives
5.5.2.1 Functionality GUID-1A03E0EF-C10F-4797-9D9F-5CCA86CA29EB v5
The function blocks LEDGEN and GRP1_LEDx, GRP2_LEDx and GRP3_LEDx (x=1-15) controls and
supplies information about the status of the indication LEDs. The input and output signals of
the function blocks are configured with PCM600. The input signal for each LED is selected
individually using SMT or ACT. Each LED is controlled by the GRPn_LEDx (n=1-3) function block
that controls the color and the operating mode.
Each indication LED on local HMI can be set individually to operate in 6 different sequences;
two as follow type and four as latch type. Two of the latching sequence types are intended to
be used as a protection indication system, either in collecting or restarting mode, with reset
functionality. The other two are intended to be used as signalling system in collecting mode
with acknowledgment functionality.
5.5.2.2 Status LEDs GUID-4822DF9C-E343-442B-B3F1-3FA8CD8DF234 v4
There are three status LEDs above the LCD in front of the IED: green, yellow and red.

Technical manual
The green LED has a fixed function that presents the healthy status of the IED. The yellow and
red LEDs are user configured. The yellow LED can be used to indicate that a disturbance report
is triggered (steady) or that the IED is in test mode (flashing). The red LED can be used to
indicate a trip command.
Here is a typical configuration of the status LEDs:
• Green LED: unlit > no power; blinking > startup or abnormal situation (IED is not in
service); steady > IED is in service
• Yellow LED: unlit > no attention required; blinking > IED is in Testmode (IED is not in
normal service); steady > at least one of the signals configured to turn the yellow LED on
has been active
• Red LED: unlit > no attention required; blinking > user performs a common write from
PCM600; steady > at least one of the signals configured to turn the red LED on has been
active
The yellow and red status LEDs are configured in the disturbance recorder function, DRPRDRE,
by connecting a start or trip signal from the actual function to a BxRBDR binary input function
block using the PCM600, and configuring the setting to Off, Start or Trip for that particular
signal.
5.5.2.3 Indication LEDs
Operating modes GUID-B67F1ED3-900B-4D34-8EEB-A3005999CE50 v4
Collecting mode
• LEDs that are used in the collecting mode of operation are accumulated continuously until
the unit is acknowledged manually. This mode is suitable when the LEDs are used as a
simplified alarm system. When all three inputs (red, yellow and green) are connected to
different sources of events for the same function block, collecting mode shows the
highest priority LED color that was activated since the latest acknowledgment was made.
If a number of different indications were made since the latest acknowledgment, it is not
possible to get a clear view of what triggered the latest event without looking at the
sequence of events list. A condition for getting the sequence of events is that the signals
have been engineered in the disturbance recorder.
Re-starting mode
• In the re-starting mode of operation each new start resets all previous active LEDs and
activates only those which appear during one disturbance. Only LEDs defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S) will initiate a reset and a
restart at a new disturbance. A disturbance is defined to end a settable time after the
reset of the activated input signals or when the maximum time limit has elapsed. In
sequence 6, the restarting or reset mode means that upon occurrence of any new event,
all previous indications will be reset. This facilitates that only the LED indications related
to the latest event is shown.
Acknowledgment/reset GUID-E6727E8F-C28B-4295-AE21-BC5643363805 v3
• From local HMI

• The active LED indications can be acknowledged/reset manually. Manual
acknowledgment and manual reset have the same meaning and is a common signal
for all the operating sequences and LEDs. The function is positive edge triggered,
not level triggered. The acknowledgment/reset is performed via the button and
menus on the LHMI.

Technical manual
• From function input

• The active LED indications can also be acknowledged/reset via an input, CLRLEDS, to
the function block LHMICTRL. This input can for example be configured to a binary
input operated from an external push button or a function button. The function is
positive edge triggered, not level triggered. This means that even if the button is
continuously pressed, the acknowledgment/reset only affects indications active at
the moment when the button is first pressed.
• Automatic reset
• The automatic reset can only be performed for LED indications defined for re-
starting mode with the latched sequence type 6 (LatchedReset-S). When the
automatic reset of the LEDs has been performed, still persisting indications will be
indicated with a steady light.
Operating sequence GUID-DFCA880B-308C-4334-94DF-97C7765E8C13 v5

The sequences can be of type Follow or Latched. For the Follow type, the LED follows the input
signal completely. For the Latched type, each LED latches to the corresponding input signal
until it is reset.
The figures below show the function of available sequences selectable for each LED separately.
The following 6 sequences are available:
• Sequence 1: Follow-S
• Sequence 2: Follow-F
• Sequence 3: LatchedAck-F-S
• Sequence 4: LatchedAck-S-F
• Sequence 5: LatchedColl-S
• Sequence 6: LatchedReset-S
For sequence 1 and 2, which are of the Follow type, the acknowledgment (Ack ) /reset function
is not applicable because the indication shown by the LED follows its input signal. Sequence 3
and 4, which are of the Latched type with acknowledgement, are only working in collecting
(Coll) mode. Sequence 5 is working according to Latched type and collecting mode while
Sequence 6 is working according to Latched type and re-starting (Reset) mode. The letters S
and F in the sequence names have the meaning S = Steady and F = Flash.
At the activation of the input signal to any LED, the indication on the corresponding LED
obtains a color that corresponds to the activated input, and operates according to the
selected sequence diagrams shown below.
In the sequence diagrams the different statuses of the LEDs are shown using the following
symbols:
= No indication = Steady light = Flash
G= Green Y= Yellow R= Red

IEC09000311.vsd
Figure 17: Symbols used in the sequence diagrams
Sequence 1 (Follow-S) SEMOD56072-39 v4

This sequence follows the corresponding input signals all the time with a steady light. It does
not react on acknowledgment or reset. Every LED is independent of the other LEDs in its
operation.

Technical manual
Activating
signal
LED
IEC01000228_2_en.vsd
Figure 18: Operating Sequence 1 (Follow-S)

GUID-107FE952-3B4C-4C01-831A-3147E652327C v4
If inputs for two or more colors are active at the same time to the same LED, the priority color
it shows is in accordance with the color described above. An example of the operation when
two colors are activated in parallel to the same LED is shown in figure19.
Activating
signal GREEN
Activating
signal RED
LED G G R G
Figure 19: Operating sequence 1, two colors
Sequence 2 (Follow-F) SEMOD56072-47 v2

This sequence is the same as Sequence 1, Follow-S, but the LEDs are flashing instead of
showing steady light.
Sequence 3 LatchedAck-F-S SEMOD56072-50 v2

This sequence has a latched function and works in collecting mode. Every LED is independent
of the other LEDs in its operation. At the activation of the input signal, the indication starts
flashing. After acknowledgment the indication disappears if the signal is not present any
more. If the signal is still present after acknowledgment it gets a steady light.
Activating
signal
LED
Acknow.
en01000231.vsd
Figure 20: Operating Sequence 3 LatchedAck-F-S

GUID-CC607709-5344-4C88-AA97-6395FD335E55 v5
The sequence described below is valid only if the same function block is used
for all three colour LEDs.
When an acknowledgment is performed, all indications that appear before the indication with
higher priority has been reset, will be acknowledged, independent of if the low priority
indication appeared before or after acknowledgment. In figure 21 it is shown the sequence

Technical manual
when a signal of lower priority becomes activated after acknowledgment has been performed
on a higher priority signal. The low priority signal will be shown as acknowledged when the
high priority signal resets.
Activating
signal GREEN
Activating
signal RED
R R G
LED
Acknow
Figure 21: Operating Sequence 3 (LatchedAck-F-S), 2 colors involved

GUID-A652A49D-F016-472D-8D38-6D3E75DAB1DB v3
If all three signals are activated the order of priority is still maintained. Acknowledgment of
indications with higher priority will acknowledge also low priority indications, which are not
visible according to figure 22.
Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G Y R R Y
Acknow.
Figure 22: Operating sequence 3, three colors involved, alternative 1

GUID-071B9EB5-A1D2-49C5-9458-4D21B7E068BE v3
If an indication with higher priority appears after acknowledgment of a lower priority
indication the high priority indication will be shown as not acknowledged according to figure
23.

Technical manual
Activating
signal GREEN
Activating
signal YELLOW
Activating
signal RED
LED G G R R Y
Acknow.
Figure 23: Operating sequence 3, three colors involved, alternative 2
Sequence 4 (LatchedAck-S-F) SEMOD56072-64 v1

This sequence has the same functionality as sequence 3, but steady and flashing light have
been alternated.
Sequence 5 LatchedColl-S SEMOD56072-67 v4

This sequence has a latched function and works in collecting mode. At the activation of the
input signal, the indication will light up with a steady light. The difference to sequence 3 and 4
is that indications that are still activated will not be affected by the reset that is, immediately
after the positive edge of the reset has been executed a new reading and storing of active
signals is performed. Every LED is independent of the other LEDs in its operation.
Activating
signal
LED
Reset
Figure 24: Operating Sequence 5 LatchedColl-S

GUID-4D52D221-F54F-4966-95B1-6ED6C536CEC9 v3
That means if an indication with higher priority has reset while an indication with lower
priority still is active at the time of reset, the LED will change color according to figure25.

Technical manual
Activating
signal GREEN
Activating
signal RED
R G
LED
Reset
Figure 25: Operating sequence 5, two colors
Sequence 6 LatchedReset-S SEMOD56072-75 v4

In this mode all activated LEDs, which are set to Sequence 6 (LatchedReset-S), are
automatically reset at a new disturbance when activating any input signal for other LEDs set to
Sequence 6 LatchedReset-S. Also in this case indications that are still activated will not be
affected by manual reset, that is, immediately after the positive edge of that the manual reset
has been executed a new reading and storing of active signals is performed. LEDs set for
sequence 6 are completely independent in its operation of LEDs set for other sequences.
Timing diagram for sequence 6 SEMOD56072-86 v4

Figure 26 shows the timing diagram for two indications within one disturbance.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
IEC01000239_2-en.vsd
Figure 26: Operating sequence 6 (LatchedReset-S), two indications within same

disturbance
Figure 27 shows the timing diagram for a new indication after tRestart time has elapsed.

Technical manual
Disturbance Disturbance
tRestart tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 27: Operating sequence 6 (LatchedReset-S), two different disturbances

Figure 28 shows the timing diagram when a new indication appears after the first one has
reset but before tRestart has elapsed.
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 28: Operating sequence 6 (LatchedReset-S), two indications within same

disturbance but with reset of activating signal between
Figure 29 shows the timing diagram for manual reset.

Technical manual
Disturbance
tRestart
Activating
signal 1
Activating
signal 2
LED 1
LED 2
Automatic
reset
Manual
reset
Figure 29: Operating sequence 6 (LatchedReset-S), manual reset
5.5.3 Function keys
5.5.3.1 Functionality GUID-BED38E9A-C90D-4B7F-AA20-42821C4F6A1C v3
Local Human-Machine-Interface (LHMI) has five function buttons, directly to the left of the
LCD, that can be configured either as menu shortcut or control buttons. Each button has an
indication LED that can be configured in the application configuration.
When used as a menu shortcut, a function button provides a fast way to navigate between
default nodes in the menu tree. When used as a control, the button can control a binary signal.
5.5.3.2 Operation principle GUID-977C3829-B19B-457E-8A4D-45317226EF22 v3
Each output on the FNKEYMD1 - FNKEYMD5 function blocks can be controlled from the LHMI
function keys. By pressing a function button on the LHMI, the output status of the actual
function block will change. These binary outputs can in turn be used to control other function
blocks, for example, switch control blocks, binary I/O outputs etc.
FNKEYMD1 - FNKEYMD5 function block also has a number of settings and parameters that
control the behavior of the function block. These settings and parameters are normally set
using the PST.
Operating sequence GUID-84CA7C61-4F83-4F86-A07F-BF9EC4E309BF v5

The operation mode is set individually for each output, either OFF, TOGGLE or PULSED.
Setting OFF
This mode always sets the outputs to a low value (0).

Technical manual
Input value
Output value
Figure 30: Sequence diagram for setting OFF

Setting TOGGLE
In this mode the output toggles each time the function key has been pressed for more than
500ms. Note that the input attribute is reset each time the function block executes. The
function block execution is marked with a dotted line below.
Input value
500ms 500ms 500ms
Output value
Figure 31: Sequence diagram for setting TOGGLE

Setting PULSED
In this mode the output sets high (1) when the function key has been pressed for more than
500ms and remains high according to set pulse time. After this time the output will go back to
0. The input attribute is reset when the function block detects it being high and there is no
output pulse.
Note that the third positive edge on the input attribute does not cause a pulse, since the edge
was applied during pulse output. A new pulse can only begin when the output is zero; else the
trigger edge is lost.
Input value
500ms 500ms 500ms 500ms
pulse time pulse time pulse time

Output value
Figure 32: Sequence diagram for setting PULSED
Input function GUID-8EA4AE21-7A74-403A-84AE-D5CEF9292A63 v2

All function keys work the same way: When the LHMI is configured so that a certain function
button is of type CONTROL, then the corresponding input on this function block becomes
active, and will light the yellow function button LED when high. This functionality is active even
if the function block operation setting is set to off. It has been implemented this way for

Technical manual
safety reasons; the idea is that the function key LEDs should always reflect the actual status of
any primary equipment monitored by these LEDs.
5.5.3.3 Enabling and Disabling Authority on Function keys GUID-27413370-00F4-477D-886F-30359C788B55 v1
When users are configured through local or central account management, the default behavior
of the function keys are to only operate if a user is logged in, and the user have the required
rights. This authentication check can be configured to be bypassed per function key by
changing the ReqAuthority from ON to OFF. To be able to change this, the user changing it
have to have the Security advanced right.
Authority can be disabled using parameter Authority. Each function key has the parameter
Authority, which can be enabled or disabled using LHMI or PCM 600. User must have Security
Advanced rights to configure the Authority parameter of the function key.
The possible values for the Authority parameter are as below:
• Enabled: Requires authentication

• Disabled: No user authentication
If there is no User Account Management or Central Account Management

configured in the IED then this parameter has no effect and the function key
can be operated without any authentication.

Technical manual
Wide area measurement system
Section 6 Wide area measurement system

6.1 C37.118 Phasor Measurement Data Streaming Protocol
Configuration PMUCONF GUID-747C6AD7-E6A1-466E-92D1-68865681F92F v1
GUID-1E140EA0-D198-443A-B445-47CEFD2E6134 v1

Configuration parameters for IEEE PMUCONF - -
1344 and C37.118 protocol
6.1.2 Functionality GUID-33694C62-A109-4D8F-9063-CEFA5D0E78BC v4
The IED supports the following IEEE synchrophasor standards:
• IEEE 1344-1995 (Both measurements and data communication)

• IEEE Std C37.118-2005 (Both measurements and data communication)
• IEEE Std C37.118.1–2011 and C37.118.1a-2014 (Measurements)
• IEEE Std C37.118.2-2011 (Data communication)
PMUCONF contains the PMU configuration parameters for both IEEE C37.118 and IEEE 1344
protocols. This means all the required settings and parameters in order to establish and define
a number of TCP and/or UDP connections with one or more PDC clients (synchrophasor client).
This includes port numbers, TCP/UDP IP addresses, and specific settings for IEEE C37.118 as
well as IEEE 1344 protocols.
6.1.3 Operation principle GUID-2608FBC4-9036-476A-942B-13452019BC11 v2
The Figure 33 demonstrates the communication configuration diagram. As can be seen, the
IED can support communication with maximum 8 TCP clients and 6 UDP client groups,
simultaneously. Every client can communicate with only one instance of the two available
PMUREPORT function block instances at a time. It means that one client cannot communicate
with both PMUREPORT:1 and PMUREPORT:2 at the same time. However, multiple clients can
communicate with the same instance of PMUREPORT function block at the same time. For TCP
clients, each client can decide to communicate with an existing instance of PMUREPORT by
knowing the corresponding PMU ID for that PMUREPORT instance. Whereas, for UDP clients,
the PMUREPORT instance for each UDP channel is defined by the user in the PMU and the client
has to know the PMU ID corresponding to that instance in order to be able to communicate.
More information is available in the sections Short guidance for the use of TCP and Short
guidance for the use of UDP.

Technical manual
IED
PMU ID
1344/C37.118
PMUREPORT: 1 PMUREPORT: 2 TCP Client_1
1344/C37.118
TCP Client_2
1344/C37.118
TCP Client_3
PMU ID: X
1344/C37.118
TCP IP TCP Client_4
PMU ID: Y 1344/C37.118
TCP Port TCP Client_5
1344/C37.118 TCP Client_6
PMU ID
PMUREPORT Instance: 1 or 2 1344/C37.118

UDP 1 Unicast/Multicast
UDP Client Group_1

UDP Client Group_2

UDP Client Group_3

UDP Client Group_4

UDP Client Group_5

UDP Client Group_6
IEC140000117-1.en.vsd
IEC140000117 V2 EN-US
Figure 33: The communication configuration (PMUCONF) structure in the IED
6.1.3.1 IEEE C37.118 Message Framework GUID-B8CC9D53-1CC5-43CC-9AF0-9B4D8CDC1922 v2
Four message types are defined in IEEE C37.118 standard: data, configuration, header, and
command frames. The first three message types are transmitted from the PMU/PDC that
serves as the data source, and the last one (command frame) is received by the PMU/PDC.
These four message types are defined in IEEE C37.118 standard as follows:
• Data messages are the measurements made by a PMU.

• Configuration is a machine-readable message describing the data types, calibration
factors, and other metadata for the data that the PMU/PDC sends.
• Header information is human readable descriptive information sent from the PMU/PDC
but provided by the user.
There is a default header file, named "ieee1344header.txt", located in the "tools" folder in the
IED. The user is allowed to access and update this text file and write it back to the IED using a
FTP client (e.g. Filezilla).
If the user-defined (updated) header file is larger than 1400 bytes, then it will be truncated to
1400 bytes in both IEEE C37.118 and IEEE1344 protocols.
Both PMU reporting instances are using the same header file (ieee1344header.txt) and this
header file is used for both IEEE C37.118 and IEEE1344 protocols.
• Commands are machine-readable codes sent to the PMU/PDC for control or

configuration.

Technical manual
6.1.3.2 Short guidance for use of TCP GUID-700B2618-3719-4C17-A1F8-3B8F5834FE95 v3
Port 7001 is used by the SPA on TCP/IP (field service tool). If the port is used for
any other protocol, for example C37.118, the SPA on TCP/IP stops working.
The IED supports 8 concurrent TCP connections using IEEE1344 and/or C37.118 protocol. The
following parameters are used to define the TCP connection between the IED and the TCP
clients:
1. 1344TCPport– TCP port for control of IEEE 1344 data for TCP clients
2. C37.118TCPport – TCP port for control of IEEE C37.118 data for TCP clients
As can be seen, there are two separate parameters in the IED for selecting port numbers for
TCP connections; one for IEEE1344 protocol (1344TCPport) and another one for C37.118
protocol (C37.118 TCPport). Client can communicate with the IED over IEEE1344 protocol using
the selected TCP port defined in 1344TCPport, and can communicate with the IED over IEEE
C37.118 protocol using the selected TCP port number in C37.118TCPport.
All the frames (the header frame, configuration frame, command frame and data frame) are
communicated over the same TCP port. The client can request (by sending a command frame)
a configuration and/or header via the TCP channel and the requested configuration and/or
header will be sent back to the client (as Configuration frame/Header frame) over the same
TCP channel.
Once the TCP client connects to the IED, the client has to necessarily send a command frame
to start a communication. As shown in Figure 33, the IED can support 2 PMUREPORT instances
and the client has to specify the PMU ID Code in order to know which PMUREPORT data needs
to be sent out to that client. In this figure, X and Y are referring to the user-defined PMU ID
Codes for PMUREPORT instances 1 or 2, respectively. It is up to the TCP client to decide which
PMUREPORT function block shall communicate with that client. Upon successful reception of
the first command by the IED, the PMU ID will be extracted out of the command; if there is a
PMUREPORT instance configured in the IED with matching PMU ID, then the client connection
over TCP with the IED will be established and further communication will take place.
Otherwise, the connection will be terminated and the TCPCtrlCfgErrCnt is incremented in the
PMU Diagnostics on the Local HMI under Main menu/Diagnostics/Communication/PMU
diagnostics/PMUSTATUS:1
It is possible to turn off/on the TCP data communication by sending a IEEE1344 or C37.118
command frame remotely from the client to the PMU containing RTDOFF/RTDON command.
At any given point of time maximum of 8 TCP clients can be connected to the IED for
IEEE1344/C37.118 protocol. If there is an attempt made by the 9th client, the connection to the
new client will be terminated without influencing the connection of the other clients already
connected. A list of active clients can be seen on the Local HMI in the diagnostics menu under
Main menu/Diagnostics/Communication/PMU diagnostics/PMUSTATUS:1
6.1.3.3 Short guidance for use of UDP GUID-F5BCBBF7-4EED-4E79-9E86-AF046D201BB1 v3
The IED supports maximum of 6 concurrent UDP streams. They can be individually configured
to send IEEE1344 or C37.118 data frames as unicast / multicast. Note that [x] at the end of
each parameter is referring to the UDP stream number (UDP client group) and is a number
between 1 and 6. Each of the 6 UDP groups in the IED has the following settings:
1. SendDataUDP[x] – Enable / disable UDP data stream

2. ProtocolOnUDP[x] – Send IEEE1344 or C37.118 on UDP
3. PMUReportUDP[x] – Instance number of PMUREPORT function block that must send data
on this UDP stream (UDP client group[x])

Technical manual
4. UDPDestAddres[x] – UDP destination address for UDP client group[x] (unicast / multicast
address range)
5. UDPDestPort[x] – UDP destination port number for UDP client group[x]
6. TCPportUDPdataCtrl[x] – TCP port to control of data sent over UDP client group[x], i.e. to
receive commands and send configuration frames
7. SendCfgOnUDP[x] – Send configuration frame 2 (CFG-2) on UDP for client group[x]
It is possible to turn off/on the UDP data communication either by setting the parameter
SendDataUDP[x] to Off/On locally in the PMU or by sending a C37.118 or IEEE1344 command
frame (RTDOFF/RTDON) remotely from the client to the PMU as defined in IEEE 1344/C37.118
standard.
However, such a remote control to stop the streams from the client is only possible when the
parameter SendDataUDP[x] is set to SetByProtocol. The command RTDOFF/RTDON sent by
the client is stored in the IED, i.e. if the IED is rebooted for some reason, the state of the
stream will remain the same.
If the parameter SendDataUDP[x] is set toOn the RTDOFF/RTDON commands received from
the clients are ignored in the IED.
It is recommended not to set the parameter SendDataUDP[x] to SetByProtocol in case of a

multicast. This is because if one of the clients sends the RTDOFF command, all the clients will
stop receiving the frames.
The UDP implementation in the IED is a UDP_TCP. This means that by default, only the data
frames are sent out on UDP stream and the header frame, configuration frame and command
frame are sent over TCP. This makes the communication more reliable especially since
commands are sent over TCP which performs request/acknowledgment exchange to ensure
that no data (command in this case) is lost.
However, by setting the parameter SendCfgOnUDP[x] to On, the configuration frame 2 (CFG-2)
of IEEEC37.118 data stream is cyclically sent on the corresponding UDP stream (UDP client
group[x]) once per minute. This is useful in case of multicast UDP data stream when a lot of
PMU clients are receiving the same UDP stream from the same UDP group (UDP client
group[x]).
As shown in Figure 33, there are maximum 2 instances of PMUREPORT function blocks
available in the IED. Each UDP client group[x] can only connect to one of the PMUREPORT
instances at the same time. This is defined in the PMU by the parameter PMUReportUDP[x]
which is used to define the instance number of PMUREPORT function block that must send
data on this UDP stream (UDP client group[x]).
The data streams in the IED can be sent as unicast or as multicast. The user-defined IP address
set in the parameter UDPDestAddress[x] for each UDP stream defines if it is a Unicast or
Multicast. The address range 224.0.0.0 to 239.255.255.255 (Class D IP addresses) is treated as
multicast. Any other IP address outside this range is treated as unicast and the UDP data will
be only sent to that specific unicast IP address. In addition to UDPDestAddress[x] parameter,
UDPDestPort[x] parameter is used to define the UDP destination port number for UDP client
group[x].
In case of multicast IP, it will be the network switches and routers that take care of replicating
the packet to reach multiple receivers. Multicast mechanism uses network infrastructure
efficiently by requiring the IED to send a packet only once, even if it needs to be delivered to a
large number of receivers.
If there are more than one UDP client group defined as multicast, the user shall set different
multicast IP addresses for each UDP group.
The PMU clients receiving the UDP frames can also connect to the IED to request (command
frame) config frame 1, config frame 2, config frame 3, or header frame, and to disable/enable
real time data. This can be done by connecting to the TCP port selected in

Technical manual
TCPportUDPdataCtrl[x] for each UDP group. This connection is done using TCP. The IED allows
4 concurrent client connections for every TCPportUDPdataCtrl[x] port (for each UDP client
group[x]).
If the client tries to connect on TCPportUDPdataCtrl[x] port using a PMU-ID other than what is
configured for that PMUREPORT instance (PMUReportUDP[x]), then that client is immediately
disconnected and the UDPCtrlCfgErrCnt is incremented in PMU Diagnostics on LHMI at Main
menu/Diagnostics/Communication/PMU diagnostics/PMUSTATUS:1
Even if the parameter SendDataUDP[x] is set to Off it is still possible for the clients to connect
on the TCP port and request the configuration frames.
6.1.4 Settings SEMOD119927-1 v2
Table 48: PMUCONF Non group settings (basic)

1344TCPport 1024 - 65534 - 1 4711 TCP port for control of IEEE 1344 data
for TCP clients
C37.118TCPport 1024 - 65534 - 1 4712 TCP port for control of IEEE C37.118
data for TCP clients
TCPportUDPdataCtrl1 1024 - 65534 - 1 4713 TCP port for control of data sent over
UDP client group1
SendDataUDP1 Off - - Off Send data to UDP client group1
On
SetByProtocol
ProtocolOnUDP1 IEEE1344 - - C37.118 Select protocol for UDP client group1
C37.118
PMUReportUDP1 1-2 - 1 1 PMUREPORT instance used for UDP
client group1
UDPDestAddres1 0 - 16 IP 1 234.5.6.7 UDP destination address for UDP
Address client group1
UDPDestPort1 1024 - 65534 - 1 8910 UDP destination port for UDP client
group1
SendCfgOnUDP1 Off - - Off Send Config frame2 on UDP for
On group1
UDP client group2
On
SetByProtocol
C37.118
client group2
group2
On group2
UDP client group3

Technical manual

On
SetByProtocol
C37.118
client group3
group3
On group3
UDP client group4
On
SetByProtocol
C37.118
client group4
group4
On group4
UDP client group5
On
SetByProtocol
C37.118
client group5
group5
On group5
UDP client group6
On
SetByProtocol
C37.118
client group6

Technical manual

group6
On group6
6.2 Protocol reporting via IEEE 1344 and C37.118

PMUREPORT GUID-0C45D2FA-1B95-4FCA-B23B-A28C2770B817 v1
GUID-0090956B-48F1-4E8B-9A40-90044C71DF20 v1

Protocol reporting via IEEE 1344 and PMUREPORT - -
C37.118
6.2.2 Functionality GUID-8DF29209-252A-4E51-9F4A-B14B669E71AB v4
The phasor measurement reporting block moves the phasor calculations into an IEEE C37.118
and/or IEEE 1344 synchrophasor frame format. The PMUREPORT block contains parameters
for PMU performance class and reporting rate, the IDCODE and Global PMU ID, format of the
data streamed through the protocol, the type of reported synchrophasors, as well as settings
for reporting analog and digital signals.
The message generated by the PMUREPORT function block is set in accordance with the IEEE
C37.118 and/or IEEE 1344 standards.
There are settings for Phasor type (positive sequence, negative sequence or zero sequence in
case of 3-phase phasor and L1, L2 or L3 in case of single phase phasor), PMU's Service class
(Protection or Measurement), Phasor representation (polar or rectangular) and the data types
for phasor data, analog data and frequency data.
Synchrophasor data can be reported to up to 8 clients over TCP and/or 6 UDP group clients for
multicast or unicast transmission of phasor data from the IED. More information regarding
synchrophasor communication structure and TCP/UDP configuration is available in section
C37.118 Phasor Measurement Data Streaming Protocol Configuration.
Multiple PMU functionality can be configured in the IED, which can stream out same or
different data at different reporting rates or different performance (service) classes. There are
2 instances of PMU functionality available in the IED. Each instance of PMU functionality
includes a set of PMU reporting function blocks tagged by the same instance number (1 or 2).
As shown in the following figures, each set of PMU reporting function blocks includes
PMUREPORT, PHASORREPORT1-4, ANALOGREPORT1-3, and BINARYREPORT1-3 function blocks.
In general, each instance of PMU functionality has 32 configurable phasor channels
(PHASORREPORT1–4 blocks), 24 analog channels (ANALOGREPORT1-3 blocks), and 28 digital
channels (24 digital-report channels in BINARYREPORT1-3 and 4 trigger-report channels in
PMUREPORT function block). Special rules shall be taken into account in PCM600 for
Application Configuration and Parameter Settings of multiple PMUREPORT blocks. These rules
are explained in the Application Manual in section PMU Report Function Blocks Connection
Rules.

Technical manual
Figure 34 shows both instances of the PMUREPORT function block. As seen, each PMUREPORT
instance has 4 predefined binary input signals corresponding to the Bits 03-00: Trigger Reason
defined in STAT field of the Data frame in IEEE C37.118.2 standard. These are predefined inputs
for Frequency Trigger, Rate of Change of Frequency trigger, Magnitude High and Magnitude
Low triggers.
IEC140000118-2-en.vsd
IEC140000118 V2 EN-US
Figure 34: Multiple instances of PMUREPORT function block

Figure 35 shows both instances of the PHASORREPORT function blocks. The instance number
is visible in the bottom of each function block. For each instance, there are four separate
PHASORREPORT blocks including 32 configurable phasor channels (8 phasor channels in each
PHASORREPORT block). Each phasor channel can be configured as a 3-phase (symmetrical
components positive/negative/zero) or single-phase phasor (L1/L2/L3).
IEC140000119-2-en.vsd
IEC140000119 V2 EN-US
Figure 35: Multiple instances of PHASORREPORT blocks

Figure 36 shows both instances of ANALOGREPORT function blocks. The instance number is
visible in the bottom of each function block. For each instance, there are three separate
ANALOGREPORT blocks capable of reporting up to 24 Analog signals (8 Analog signals in each
ANALOGREPORT block). These can include for example transfer of active and reactive power or
reporting the milliampere input signals to the PDC clients as defined in IEEE C37.118 data
frame format.

Technical manual
IEC140000120-2-en.vsd
IEC140000120 V2 EN-US
Figure 36: Multiple instances of ANALOGREPORT blocks

Figure 37 shows both instances of BINARYREPORT function blocks. The instance number is
visible in the bottom of each function block. For each instance, there are three separate
BINARYREPORT blocks capable of reporting up to 24 Binary signals (8 Binary signals in each
BINARYREPORT block). These binary signals can be for example dis-connector or breaker
position indications or internal/external protection alarm signals.
IEC140000121-2-en.vsd
IEC140000121 V2 EN-US
Figure 37: Multiple instances of BINARYREPORT blocks
6.2.3 Function block GUID-45150D7E-3231-4661-A8B4-17364AF25035 v2
PMUREPORT
BLOCK TIMESTAT
^FREQTRIG
^DFDTTRIG
^MAGHIGHTRIG
^MAGLOWTRIG
IEC140000102-1_en.vsd
IEC140000102 V1 EN-US
ANALOGREPORT1
ÂNALOG1
ÂNALOG2
ÂNALOG3
ÂNALOG4
ÂNALOG5
ÂNALOG6
ÂNALOG7
ÂNALOG8
IEC140000107-1_en.vsd
IEC140000107 V1 EN-US

Technical manual
ANALOGREPORT2
ÂNALOG9
ÂNALOG10
ÂNALOG11
ÂNALOG12
ÂNALOG13
ÂNALOG14
ÂNALOG15
ÂNALOG16
IEC140000108-1_en.vsd
IEC140000108 V1 EN-US
ANALOGREPORT3
ÂNALOG17
ÂNALOG18
ÂNALOG19
ÂNALOG20
ÂNALOG21
ÂNALOG22
ÂNALOG23
ÂNALOG24
IEC140000109-1_en.vsd
IEC140000109 V1 EN-US
BINARYREPORT1
^BINARY1
^BINARY2
^BINARY3
^BINARY4
^BINARY5
^BINARY6
^BINARY7
^BINARY8
IEC140000110-1_en.vsd
IEC140000110 V1 EN-US
BINARYREPORT2
^BINARY9
^BINARY10
^BINARY11
^BINARY12
^BINARY13
^BINARY14
^BINARY15
^BINARY16
IEC140000111-1_en.vsd
IEC140000111 V1 EN-US
BINARYREPORT3
^BINARY17
^BINARY18
^BINARY19
^BINARY20
^BINARY21
^BINARY22
^BINARY23
^BINARY24
IEC140000112-1_en.vsd
IEC140000112 V1 EN-US
PHASORREPORT1
^PHASOR1
^PHASOR2
^PHASOR3
^PHASOR4
^PHASOR5
^PHASOR6
^PHASOR7
^PHASOR8
IEC140000103-1_en.vsd
IEC140000103 V1 EN-US

Technical manual
PHASORREPORT2
^PHASOR9
^PHASOR10
^PHASOR11
^PHASOR12
^PHASOR13
^PHASOR14
^PHASOR15
^PHASOR16
IEC140000104-1_en.vsd
IEC140000104 V1 EN-US
PHASORREPORT3
^PHASOR17
^PHASOR18
^PHASOR19
^PHASOR20
^PHASOR21
^PHASOR22
^PHASOR23
^PHASOR24
IEC140000105-1_en.vsd
IEC140000105 V1 EN-US
PHASORREPORT4
^PHASOR25
^PHASOR26
^PHASOR27
^PHASOR28
^PHASOR29
^PHASOR30
^PHASOR31
^PHASOR32
IEC140000106-1_en.vsd
IEC140000106 V1 EN-US
6.2.4 Signals SEMOD55830-1 v2
Table 49: PMUREPORT Input signals

BLOCK BOOLEAN 0 Block of output signals
FREQTRIG BOOLEAN 0 Frequency trigger
DFDTTRIG BOOLEAN 0 Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN 0 Magnitude high trigger
MAGLOWTRIG BOOLEAN 0 Magnitude low trigger
Table 50: PMUREPORT Output signals

TIMESTAT BOOLEAN Time synchronization status
Table 51: ANALOGREPORT1 Input signals

ANALOG1 REAL 0.0 Analog input channel 1

Technical manual



Table 54: BINARYREPORT1 Input signals

BINARY1 BOOLEAN 0 Binary input channel1

Technical manual

BINARY9 BOOLEAN 0 Binary input channel 9

Table 57: PHASORREPORT1 Input signals

PHASOR1 GROUP - Group signal Input for Phasor1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
PHASOR5 GROUP - Group signal Input for Phasor 5
SIGNAL
SIGNAL
SIGNAL
SIGNAL

Technical manual

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL

SIGNAL
SIGNAL
SIGNAL
SIGNAL

Technical manual

SIGNAL
SIGNAL
SIGNAL
SIGNAL
Table 61: PMUREPORT Non group settings (basic)

Operation Off - - On Operation mode off/on
On
SvcClass P class - - P class Service class
M class
Global_PMU_ID 0 - 16 - 1 0 Global PMU Identifier (G_PMU_ID)
PMUdataStreamIDCOD 1 - 65534 - 1 1 PMU Data Stream ID Number
E (IDCODE)
PhasorFormat Rectangular - - Rectangular Select phasor format
Polar
PhasorDataType Float - - Float Select phasor datatype
Integer
FrequencyDataType Float - - Float Select frequency datatype
Integer
AnalogDataType Float - - Float Select analog data type
Integer
SendFreqInfo Off - - On Send frequency and rate of change of
On frequency information
ReportRate 10/10 fr/s - - 10/10 fr/s Phasor data report rate
(60/50Hz) (60/50Hz)
12/10 fr/s
(60/50Hz)
15/10 fr/s
(60/50Hz)
20/25 fr/s
(60/50Hz)
30/25 fr/s
(60/50Hz)
60/50 fr/s
(60/50Hz)
120/100 fr/s
(60/50Hz)
240/200 fr/s
(60/50Hz)
RptTimetag FirstSample - - MiddleSample Method of phasor timetag
MiddleSample
LastSample

Technical manual
Table 62: ANALOGREPORT1 Non group settings (basic)

Analog1Range 3277.0 - - 0.1 3277.0 (+/-) Range for scaling analog 1 in
10000000000.0 integer format
Analog1UnitType Single point-on- - - RMS of analog Unit type for analog 1
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

Technical manual

wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

Technical manual

wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

Technical manual

wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input
wave input
RMS of analog
input
Peak of analog
input

Technical manual
Table 65: PHASORREPORT1 Non group settings (basic)

Phasor2 POSSEQ - - POSSEQ Group selector for Phasor2
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor5 POSSEQ - - POSSEQ Group selector for phasor5
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor8 L1 - - POSSEQ Group selector for phasor8
L2
L3
POSSEQ
NEGSEQ
ZEROSEQ
Phasor1Report Off - - On Reporting phasor 1
On
Phasor1UseFreqSrc Off - - On Include phasor 1 for automatic
On frequency source selection
On
On
On

Technical manual

On
On
On
On
Phasor1 POSSEQ - - POSSEQ Group Selector for Phasor1
NEGSEQ
ZEROSEQ
L1
L2
L3

NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
Phasor11 POSSEQ - - POSSEQ Group selector for Phasor 11
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3

Technical manual

NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
On
On
On
On
On
On
On
On

Technical manual

NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
On
On
On

Technical manual

On
On
On
On
On

NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3

Technical manual

NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
NEGSEQ
ZEROSEQ
L1
L2
L3
On
On
On
On
On
On
On
On

Technical manual
6.2.6 Monitored data

Table 69: PMUREPORT Monitored data

TIMESTAT BOOLEAN 1=Ready - Time synchronization status
0=Fail
FREQ REAL - Hz Frequency
FREQGRAD REAL - - Rate of change of frequency
FREQREFCHSEL INTEGER - - Frequency reference channel number
selected
FREQREFCHERR BOOLEAN 0=Freq ref not - Frequency reference channel error
available
1=Freq ref error
2=Freq ref
available
FREQTRIG BOOLEAN - - Frequency trigger
DFDTTRIG BOOLEAN - - Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN - - Magnitude high trigger
MAGLOWTRIG BOOLEAN - - Magnitude low trigger
Table 70: ANALOGREPORT1 Monitored data

ANALOG1 REAL - - Analog input channel 1


Technical manual

Table 73: BINARYREPORT1 Monitored data

BINARY1 BOOLEAN - - Binary input channel 1



Technical manual

Table 76: PHASORREPORT1 Monitored data

PHASOR1 REAL - - Phasor 1 amplitude
PHASOR1 REAL - deg Phasor 1 angle


Technical manual




Technical manual
6.2.7 Operation principle GUID-EB2B9096-2F9D-4264-B2D2-8D9DC65697E8 v3
The Phasor Measurement Unit (PMU) features three main functional principles:
• To measure the power system related AC quantities (voltage, current) and to calculate the
phasor representation of these quantities.
• To synchronize the calculated phasors with the UTC by time-tagging, in order to make
synchrophasors (time is reference).
• To publish all phasor-related data by means of TCP/IP or UDP/IP, following the standard
IEEE C37.118 protocol.
The C37.118 standard imposes requirements on the devices and describes the communication
message structure and data. The PMU complies with all the standard requirements with a
specific attention to the Total Vector Error (TVE) requirement. The TVE is calculated using the
following equation:
2
( X r ( n ) - X r )2 + ( X i ( n ) - X i )
TVE =
X r2 + X i2
GUID-80D9B1EA-A770-4F50-9530-61644B4DEBBE V1 EN-US (Equation 1)
where,
Xr(n) and Xi(n) are the measured values
Xr and Xi are the theoretical values
In order to comply with TVE requirements, special calibration is done in the factory on the
analog input channels of the PMU, resulting in increased accuracy of the measurements. The
IEEE C37.118 standard also imposes a variety of steady state and dynamic requirements which
are fulfilled in the IED with the help of high accuracy measurements and advanced filtering
techniques.
Figure 38 shows an overview of the PMU functionality and operation. In this figure, only one
instance of PMUREPORT (PMUREPORT1) is shown. Note that connection of different signals to
the PMUREPORT, in this figure, is only an example and the actual connections and reported
signals on the IEEEC37.118/1344 can be defined by the user.

Technical manual
U/I samples
PMUREPORT1
MU PHASOR1
PHASOR2 8 TCP
U IEEEC37.118 / 1344
TRM SMAI messages NUM
I
U 6 UDC
TRM PHASOR32
I
ANALOG1
I/P MIM SMMI ANALOG2
MEAS. ANALOG24
BINARY1
BINARY2
BIM
OR
BINARY24
PROTECTION
GPS / OP
IRIG-B FREQTRIG
UP
DFDTTRIG
OC
PPS time data MAGHIGHTRIG
MAGLOWTRIG
UV
IEC140000146-1-en.vsd
IEC140000146 V2 EN-US
Figure 38: Overview of reporting functionality (PMUREPORT)
The TRM modules are individually AC-calibrated in the factory. The calibration data is stored in
the prepared area of the TRM EEProm. The pre-processor block is extended with calibration
compensation and a new angle reference method based on timestamps. The AI3P output of
the preprocessor block is used to provide the required information for each respective
PMUREPORT phasor channel. More information about preprocessor block is available in the
section Signal matrix for analog inputs SMAI.
6.2.7.1 Frequency reporting GUID-4F3BA7C7-8C9B-4266-9F72-AFB139E9DC21 v2
By using patented algorithm the IED can track the power system frequency in quite wide range
from 9 Hz to 95 Hz. In order to do that, the three-phase voltage signal shall be connected to
the IED. Then IED can adapt its filtering algorithm in order to properly measure phasors of all
current and voltage signals connected to the IED. This feature is essential for proper operation
of the PMUREPORT function or for protection during generator start-up and shut-down
procedure.
This adaptive filtering is ensured by proper configuration and settings of all relevant pre-
processing blocks, see Signal matrix for analog inputs in the Application manual. Note that in
all preconfigured IEDs such configuration and settings are already made and the three-phase
voltage are used as master for frequency tracking. With such settings the IED will be able to
properly estimate the magnitude and the phase angle of measured current and voltage
phasors in this wide frequency range.
One of the important functions of a PMU is reporting a very accurate system frequency to the
PDC client. In the IED, each of the PMUREPORT instances is able to report an accurate
frequency. Each voltage-connected preprocessor block (SMAI block) delivers the frequency
data, derived from the analog input AC voltage values, to the respective voltage phasor

Technical manual
channel. Every phasor channel has a user-settable parameter (PhasorXUseFreqSrc) to be used

as a source of frequency data for reporting to the PDC client. It is very important to set this
parameter to On for the voltage-connected phasor channels. There is an automatic frequency
source selection logic to ensure an uninterrupted reporting of the system frequency to the
PDC client. In this frequency source selection logic, the following general rules are applied:
• Only the voltage phasor channels are used

• The phasor channel with a lower channel number is prioritized to the one with a higher
channel number
As a result, the first voltage phasor is always the one delivering the system frequency to the
PDC client and if, by any reason, this voltage gets disconnected then the next available voltage
phasor is automatically used as the frequency source and so on. If the first voltage phasor
comes back, since it has a higher priority compare to the currently selected phasor channel,
after 500 ms it will be automatically selected again as the frequency source. There is also an
output available on the component which shows if the reference frequency is good, error or
reference channel unavailable.
It is possible to monitor the status of the frequency reference channel (frequency source) for
the respective PMUREPORT instance on Local HMI under Test/Function status/
Communication/Station Communication/PMU Report/PMUREPORT:1/Outputs, where the
FREQREFCHSEL output shows the selected channel as the reference for frequency and
FREQREFCHERR output states if the reference frequency is good, or if there is an error or if the
reference channel is unavailable. For more information refer to the table PMUREPORT
monitored data.
Table 80: PMUREPORT Monitored data

TIMESTAT BOOLEAN 1=Ready - Time synchronization status
0=Fail
FREQ REAL - Hz Frequency
FREQGRAD REAL - - Rate of change of frequency
FREQREFCHSEL INTEGER - - Frequency reference channel number
selected
FREQREFCHERR BOOLEAN 0=Freq ref not - Frequency reference channel error
available
1=Freq ref error
2=Freq ref
available
FREQTRIG BOOLEAN - - Frequency trigger
DFDTTRIG BOOLEAN - - Rate of change of frequency trigger
MAGHIGHTRIG BOOLEAN - - Magnitude high trigger
MAGLOWTRIG BOOLEAN - - Magnitude low trigger
6.2.7.2 Reporting filters GUID-D39153B5-81CE-4C1F-A816-C7A4C3407048 v2
The PMUREPORT function block implements the reporting filters designed to avoid aliasing as
the reporting frequency is lower than the sample/calculation frequency. This means, the
synchrophasor and frequency data which are included in the C37.118 synchrophasor streaming
data are filtered in order to suppress aliasing effects, as the rate of the C37.118 data is slower
than the data rate for internal processing. For this purpose, there is an anti-aliasing filter
designed for each reporting rate. The correct anti-aliasing filter will be automatically selected
based on the reporting rate and the performance class (P/M) settings. The filters are designed
to attenuate all aliasing frequencies to at least -40 dB (a gain of 0.01) at M class.

Technical manual
The synchrophasor measurement is adaptive as it follows the fundamental

frequency over a wide range despite the reporting rate.
For example, when the synchrophasor measurement follows the fundamental frequency
beyond the fixed Nyquist limits in C37.118 standard, the anti-aliasing filter stopband moves
with the measured fundamental frequency. This has to be considered in connection with
C37.118, where the passband is defined relative to a fixed nominal frequency as shown in the
equation 2.
Fs
f0 ±
2
IECEQUATION2418 V1 EN-US (Equation 2)
where,
f0 is the nominal frequency
Fs is the reporting rate
6.2.7.3 Scaling Factors for ANALOGREPORT channels GUID-0DDAF6A9-8643-4FDD-97CF-9E35EF40AF7E v2
The internal calculation of analog values in the IED is based on 32 bit floating point. Therefore,
if the user selects to report the analog data (AnalogDataType) as Integer, there will be a down-
conversion of a 32 bit floating value to a new 16 bit integer value. In such a case, in order to
optimize the resolution of the reported analog data, the user-defined analog scaling is
implemented in the IED.
The analog scaling in the IED is automatically calculated by use of the user-defined parameters
AnalogXRange for the respective analog channel X. The analog data value on the input X will
have a range between -AnalogXRange and +AnalogXRange. The resulting scale factor will be
applied to the reported analog data where applicable.
If the AnalogDataType is selected as Float, then these settings are ignored.
The analog scaling in the IED is calculated using the equation:
AnalogXRange ´ 2
S calefactor =
65535.0
offset = 0.0
65535.0 = 16 bit integer range
IECEQUATION2443 V1 EN-US
According to the IEEE C37.118.2 standard, the scale factors (conversion factor) for analog
channels are defined in configuration frame 2 (CFG-2) and configuration frame 3 (CFG-3)
frames as follows:
• CFG-2 frame: The field ANUNIT (4 bytes) specifies the conversion factor as a signed 24 bit
word for user defined scaling. Since it is a 24 bit integer, in order to support the floating
point scale factor, the scale factor itself is multiplied in 10, so that a minimum of 0.1 scale
factor can be sent over the CFG-2 frame. The resulting scale factor is rounded to the
nearest decimal value. The clients receiving the Analog scale factor over CFG-2 should
divide the received scale factor by 10 and then apply it to the corresponding analog data
value.
• CFG-3 frame: The field ANSCALE (8 bytes) specifies the conversion factor as X’ = M * X + B
where; M is magnitude scaling in 32 bit floating point (first 4 bytes) and B is the offset in
32 bit floating point (last 4 bytes).

Technical manual
The server uses CFG-3 scale factor to scale the analog data values. As a result, the clients which
use scale factors in CFG-3 in order to recalculate analog values, will get a better resolution than
using the scale factors in CFG-2.
The following examples show how the scale factor is calculated.
Example 1:
AnalogXRange = 3277.0
The scale factor is calculated as follows:
(3277.0 ´ 2.0 )
sc alefactor = = 0.1 a nd offset = 0.0
65535.0
The scale factor will be sent as 1 on configuration frame 2, and 0.1 on configuration frame 3.
The range of analog values that can be transmitted in this case is -0.1 to -3276.8 and +0.1 to
+3276.7.
Example 2:
AnalogXRange = 4915.5
(4915.5 ´ 2.0 )
sc alefac tor = = 0.15 a nd offse t = 0.0
65535.0
The scale factor will be sent as 1 on configuration frame 2, and 0.15 on configuration frame 3.
The range of analog values that can be transmitted in this case is -0.15 to -4915.5 and +0.15 to
+4915.5.
Example 3:
Analo gXRange = 10000000000

(10000000000 ´ 2.0)
sc alefac tor = = 305180.43 a nd offse t = 0.0
65535.5
The scale factor will be sent as 3051804 on configuration frame 2, and 305180.43 on
configuration frame 3. The range of analog values that can be transmitted in this case is
-305181 to -10000000000 and +305181 to +10000000000.

Technical manual
6.2.8 Technical data SEMOD172233-1 v1
GUID-F0BAEBD8-E361-4D50-9737-7DF8B043D66A v4
Table 81: PMUREPORT technical data

Influencing quantity Range Accuracy
Signal frequency ± 0.1 x fr ≤ 1.0% TVE
Signal magnitude:
Voltage phasor (0.1–1.2) x Ur
Current phasor (0.5–2.0) x Ir
Phase angle ± 180°

Harmonic distortion 10% from 2nd – 50th
Interfering signal:
Magnitude 10% of fundamental signal
Minimum frequency 0.1 x fr
Maximum frequency 1000 Hz

Technical manual
150
Section 7 Differential protection

7.1 High impedance differential protection, single phase
HZPDIF IP14239-1 v4
7.1.1 Identification M14813-1 v4
IEC 61850 IEC 60617 ANSI/IEEE C37.2

Function description
High impedance differential

HZPDIF Id 87
protection, single phase
SYMBOL-CC V2 EN-US
7.1.2 Functionality M13071-3 v13
High impedance differential protection, single phase (HZPDIF) functions can be used when the
involved CT cores have the same turns ratio and similar magnetizing characteristics. It utilizes
an external CT secondary current summation by wiring. Actually all CT secondary circuits which
are involved in the differential scheme are connected in parallel. External series resistor, and a
voltage dependent resistor which are both mounted externally to the IED, are also required.
The external resistor unit shall be ordered under IED accessories in the Product Guide.
HZPDIF can be used to protect tee-feeders or busbars, reactors, motors, auto-transformers,

capacitor banks and so on. One such function block is used for a high-impedance restricted
earth fault protection. Three such function blocks are used to form three-phase, phase-
segregated differential protection.
7.1.3 Function block M13737-3 v3
HZPDIF
ISI* TRIP
BLOCK ALARM
BLKTR MEASVOLT
Figure 39: HZPDIF function block
7.1.4 Signals IP14244-1 v2
Table 82: HZPDIF Input signals

ISI GROUP - Single phase current input
SIGNAL
BLOCK BOOLEAN 0 Block of function
BLKTR BOOLEAN 0 Block of trip

Technical manual
Table 83: HZPDIF Output signals

TRIP BOOLEAN Trip signal
ALARM BOOLEAN Alarm signal
MEASVOLT REAL Measured RMS voltage on CT secondary side
7.1.5 Settings IP14245-1 v2
Table 84: HZPDIF Group settings (basic)

Operation Off - - Off Operation Off / On
On
U>Alarm 5 - 500 V 1 10 Alarm voltage level in volts on CT
secondary side
tAlarm 0.000 - 60.000 s 0.001 5.000 Time delay to activate alarm
U>Trip 10 - 900 V 1 100 Operate voltage level in volts on CT
secondary side
SeriesResistor 50 - 20000 Ohm 1 250 Value of series resistor in Ohms

Table 85: HZPDIF Monitored data

MEASVOLT REAL - kV Measured RMS voltage on CT
secondary side
7.1.7 Operation principle IP14242-1 v2
M13075-3 v11
High impedance protection system is a simple technique which requires that all CTs, used in
the protection scheme, have relatively high knee point voltage, similar magnetizing
characteristic and the same ratio. These CTs are installed in all ends of the protected object. In
order to make a scheme all CT secondary circuits belonging to one phase are connected in
parallel. From the CT junction points a measuring branch is connected. The measuring branch
is a series connection of one variable setting resistor (or series resistor) RS with high ohmic
value and an over-current element. Thus, the high impedance differential protection responds
to the current flowing through the measuring branch. However, this current is result of a
differential voltage caused by this parallel CT connection across the measuring branch. Non-
linear resistor (that is, metrosil) is used in order to protect entire scheme from high peak
voltages which may appear during internal faults. Typical high impedance differential scheme
is shown in Figure 40. Note that only one phase is shown in this figure.

Technical manual
RS
3 U
I
1
I> (50) 5
2
GUID-5CEAF088-D92B-45E5-B98F-3083894A694C V1 EN-US
Figure 40: HZPDIF scheme

Where in the Figure:
1. shows one main CT secondary winding connected in parallel with all other CTs, from the
same phase, connected to this scheme.
2. shows the scheme earthing point.
It is of utmost importance to insure that only one earthing point exists in

such protection scheme.
3. shows the setting (stabilizing) resistor RS.

4. shows the over-current measuring element.
The series connection of stabilizing resistor and over-current element is

designated as measuring branch.
5. shows the non-linear resistor (that is, metrosil).

6. U is the voltage across the CT paralleling point (for example, across the measuring
branch).
7. I is the current flowing through the measuring branch.
U and I are interrelated in accordance with the following formula U=RS × I.
Due to the parallel CT connections the high impedance differential relay can only measure one
current and that is the relay operating quantity. That means that there is no any stabilizing
quantity (that is, bias) in high-impedance differential protection schemes. Therefore in order
to guaranty the stability of the differential relay during external faults the operating quantity
must not exceed the set pickup value. Thus, for external faults, even with severe saturation of
some of the current transformers, the voltage across the measuring branch shall not rise
above the relay set pickup value. To achieve that a suitable value for setting resistor RS is
selected in such a way that the saturated CT secondary winding provides a much lower
impedance path for the false differential current than the measuring branch. In case of an
external fault causing current transformer saturation, the non-saturated current transformers
drive most of the spill differential current through the secondary winding of the saturated
current transformer and not through the measuring brunch of the relay. The voltage drop

Technical manual
across the saturated current transformer secondary winding appears also across the
measuring brunch, however it will typically be relatively small. Therefore, the pick-up value of
the relay has to be set above this false operating voltage.
See the application manual for operating voltage and sensitivity calculation.
7.1.7.1 Logic diagram M13075-9 v5
The logic diagram shows the operation principles for the 1Ph High impedance differential
protection function HZPDIF, see Figure 41.
The function utilizes the raw samples from the single phase current input connected to it. Thus
the twenty samples per fundamental power system cycle are available to the HZPDIF function.
These current samples are first multiplied with the set value for the used stabilizing resistor in
order to get voltage waveform across the measuring branch. The voltage waveform is then
filtered in order to get its RMS value. Note that used filtering is designed in such a way that it
ensures complete removal of the DC current component which may be present in the primary
fault current. The voltage RMS value is then compared with set Alarm and Trip thresholds. Note
that the TRIP signal is intentionally delayed on drop off for 30 ms within the function. The
measured RMS voltage is available as a service value from the function. The function has block
and trip block inputs available as well.
Figure 41: Logic diagram for 1Ph High impedance differential protection HZPDIF
7.1.8 Technical data IP14246-1 v1
M13081-1 v12
Table 86: HZPDIF technical data

Function Range or value Accuracy
Operate voltage (10-900) V ±1.0% of Ir at I ≤ Ir
I=U/R ±1.0% of I at I > Ir
Reset ratio >95% at (30-900) V -

Maximum continuous power U>Trip2/SeriesResistor ≤200 W -
Operate time at 0 to 10 x Ud Min. = 5 ms

Max. = 15 ms
Reset time at 10 x Ud to 0 Min. = 75 ms
Max. = 95 ms

Technical manual

Critical impulse time 2 ms typically at 0 to 10 x Ud -
Operate time at 0 to 2 x Ud Min. = 25 ms

Max. = 35 ms
Reset time at 2 x Ud to 0 Min. = 50 ms
Max. = 70 ms
Critical impulse time 15 ms typically at 0 to 2 x Ud -
7.2 Additional security logic for differential protection

LDRGFC GUID-0E064528-0E70-4FA1-87C7-581DADC1EB55 v2
GUID-3081E62B-3E96-4615-97B8-2CCA92752658 v2

Additional security logic for LDRGFC - 11
differential protection
7.2.2 Functionality GUID-8F918A08-E50E-4E7B-BDCA-FF0B5534B289 v3
Additional security logic for differential protection (LDRGFC) can help the security of the
protection especially when the communication system is in abnormal status or for example
when there is unspecified asymmetry in the communication link. It helps to reduce the
probability for mal-operation of the protection. LDRGFC is more sensitive than the main
protection logic to always release operation for all faults detected by the differential function.
LDRGFC consists of four sub functions:
• Phase-to-phase current variation

• Zero sequence current criterion
• Low voltage criterion
• Low current criterion
Phase-to-phase current variation takes the current samples as input and it calculates the
variation using the sampling value based algorithm. Phase-to-phase current variation function
is major one to fulfill the objectives of the startup element.
Zero sequence criterion takes the zero sequence current as input. It increases the security of
protection during the high impedance fault conditions.
Low voltage criterion takes the phase voltages and phase-to-phase voltages as inputs. It
increases the security of protection when the three-phase fault occurred on the weak end side.
Low current criterion takes the phase currents as inputs and it increases the dependability
during the switch onto fault case of unloaded line.
The differential function can be allowed to trip as no load is fed through the line and
protection is not working correctly.
Features:

Technical manual
• Startup element is sensitive enough to detect the abnormal status of the protected
system
• Startup element does not influence the operation speed of main protection
• Startup element would detect the evolving faults, high impedance faults and three phase
fault on weak side
• It is possible to block the each sub function of startup element
• Startup signal has a settable pulse time
7.2.3 Function block GUID-A205A0BB-C09E-42E2-B664-1863E1FF2A0A v2
LDRGFC
I3P* START
U3P* STCVL1L2
BLOCK STCVL2L3
BLKCV STCVL3L1
BLKUC STUC
BLK3I0 ST3I0
BLKUV STUV
REMSTUP
Figure 42: LDRGFC function block
7.2.4 Signals
Table 87: LDRGFC Input signals

I3P GROUP - Group signal for current input
SIGNAL
U3P GROUP - Group signal for voltage input
SIGNAL
BLKCV BOOLEAN 0 Block of ph to ph current variation criterion
BLKUC BOOLEAN 0 Block of the low current criterion
BLK3I0 BOOLEAN 0 Block of zero sequence current criterion
BLKUV BOOLEAN 0 Block of under voltage criterion
REMSTUP BOOLEAN 0 Startup signal of remote end
Table 88: LDRGFC Output signals

START BOOLEAN General startup signal
STCVL1L2 BOOLEAN Start signal for current variation criterion for phase L1L2
STUC BOOLEAN Start signal for low current criterion
ST3I0 BOOLEAN Start signal for zero sequence current criterion
STUV BOOLEAN Start signal for under voltage criterion

Technical manual
7.2.5 Settings
Table 89: LDRGFC Group settings (basic)

Operation Off - - Off Operation Off/On
On
tStUpReset 0.000 - 60.000 s 0.001 7.000 Reset delay for startup signal
OperationCV Off - - On Operation current variation Off/On
On
ICV> 1 - 100 %IB 1 20 Fixed threshold for ph to ph current
variation criterion
OperationUC Off - - On Operation low current criterion
On Off/On
IUC< 1 - 100 %IB 1 5 Start value for low current operation
in % of IBase
Operation3I0 Off - - On Operation zero sequence current
On criterion Off/On
I3I0> 1 - 100 %IB 1 10 Start value for zero sequence current
criterion in % of IBase
OperationUV Off - - On Operation under voltage criterion
On Off/On
UPhN< 1 - 100 %UB 1 60 Start value for phase voltage criterion
in % of UBase
UPhPh< 1 - 100 %UB 1 60 Start value for ph to ph voltage
criterion in % of UBase
Table 90: LDRGFC Group settings (advanced)

tCV 0.000 - 0.005 s 0.001 0.002 Time delay for phase to phase current
variation
tUC 0.000 - 60.000 s 0.001 0.200 Time delay for low current criterion
t3I0 0.000 - 60.000 s 0.001 0.000 Time delay for zero sequence current
criterion
tUV 0.000 - 60.000 s 0.001 0.000 Time delay for low voltage criterion
Table 91: LDRGFC Non group settings (basic)

GlobalBaseSel 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

Technical manual

Table 92: LDRGFC Monitored data

IL1 REAL - A Current RMS value for phase L1
3I0 REAL - A Zero sequence current value
UL1 REAL - kV Voltage RMS value for phase L1
UL12 REAL - kV Voltage RMS value for ph to ph L1L2
7.2.7 Operation principle GUID-60091A2A-AC10-4E04-B4B8-C190E3E07D3E v5
Additional security logic for differential protection (LDRGFC) takes the current samples,
current RMS values, phase voltage values, phase-to-phase voltage values, zero sequence
current and remote side startup signals as inputs.
Startup signal becomes activated when any one of the current variation startup signal, zero
sequence current startup signal, voltage startup signal, and current startup signal is activated.
Phase-to-phase current variation takes current samples and generates the startup signal by
comparing with the start value.
If the zero sequence current value is greater than the start value of zero sequence current then
the zero sequence current startup signal will be activated.
Voltage startup signal becomes activated when the any of phase voltage and line voltage is
less than the voltage start value and the remote startup signal has to be activated.
Current startup signal becomes activated when the current value in all phases is less than
current start value.
Phase-to-phase current variation
Phase-to-phase current variation one is main startup element. It covers most of the abnormal
status of the system. The phase-to-phase current variation fails in high impedance faults,
three-phase fault on weak side and switch onto fault on unloaded line because of low
sensitivity in these cases.
Phase-to-phase current variation takes the current samples as input and the signal is
evaluated using the sampling value based algorithm.
The phase-to-phase current variation criterion is shown below:
DiFF > 1.8DIT + DI ZD

EQUATION2255 V1 EN-US

Technical manual
Where:
ΔiФФ sampling value of phase-to-phase current variation
ΔIZD setting of fixed threshold, which corresponds to setting ICV>. The default value for the
setting is 0.2·IBase, where IBase is the base current.
ΔIT float threshold
It is the full-circle integral of the phase-to-phase current variation
1 2T -1
DI T = å | DiFF (t - n) |
T n =T
Where:
T count of sample values in one cycle
ΔiФФ is calculated using the below formula:
Di (k ) = [i ( k ) - i (k - N )] - [i (k - N ) - i (k - 2 N )]
= i ( k ) - 2i ( k - N ) + i (k - 2 N )
N is the number of samples in one cycle.
tCV
STCVL1L2
t
cont
I3P Current variation tCV

STCVL2L3
subfunction t
i
tCV
STCVL3L1
t
OR STCV
cont
Figure 43: Current variation logic diagram

tCV is the time setting for the change of current criterion. Phase current samples are included
in input signal I3P.
Zero sequence current criterion
Zero sequence criterion is mainly for detection of remote IED high resistance faults or some
gradual faults. The criterion takes the zero sequence current as input. Zero sequence current is
compared with I3I0> for the t3I0 time to generate the zero sequence current startup signal.

Technical manual
I3P a
a>b t3I0
I3IO> b ST3I0
AND t
BLK3I0
BLOCK OR
Figure 44: Zero sequence current criterion logic diagram

Here I3I0> is the setting of the maximum possible non-faulted zero sequence current for the
protected line. The default value for this setting is 0.1 · IBase where IBase is the rated current
of the CT.
t3I0 is the time setting for the zero sequence current criterion.
The zero sequence current criterion can be blocked by activating the BLK3I0 input signal.
Low voltage criterion
Low voltage criterion is mainly for detection of the three phase faults occurring on weak side
with pre fault no load condition. The low voltage criterion takes the voltage phase values,
voltage phase-to-phase values and remote startup signals as inputs. The logic for low voltage
criterion is shown below:
U3P (UPhN) a
a<b
UPhN< b
OR
U3P (UPhPh) a
a<b
UPhPh< b
tUV STUV
REMSTUP (Recived)
AND t
BLKUV
BLOCK OR
Figure 45: Low voltage criterion logic diagram

Voltage phase value is compared with the start value of voltage phase and voltage phase-to-
phase value is compared with the start value of voltage phase-to-phase. If any of the phase
voltage or phase-to-phase voltages is below the set voltage levels for some time duration
(tUV) then the low voltage START signal becomes activated after receiving the remote startup
signal. Low voltage criterion can be blocked by activating BLKUV input signal.
If there are more than one remote IED, all the startup signals of the remote ends are logically
OR to obtain the REMSTUP signal from the remote side as input.
Low current criterion
The current in each phase is compared to the set current level. If all currents are below setting
IUC<, the STUC output is activated after the set delay tUC.

Technical manual
I3P
a
a<b tUC
IUC< b STUC
AND t
BLKUC
BLOCK OR
Figure 46: Low current criterion logic diagram

Security logic for differential protection
The configuration for the additional security logic for differential protection is shown in Figure
47. The function will release tripping of the line differential protection up to the end of timer
tStUpReset.
Phase-phase STCV
i
current variation
Zero sequence ST3IO

I0 > tStUpReset
current criterion START Local side start-up
t
Send signal to
Low voltage
OR remote side
criterion STUV
ULOW <
Low current
criterion STUC
I0 <
REMSTUP
Figure 47: Additional security logic for differential protection. Logic diagram for start up
element.
7.2.8 Technical data

GUID-0BD8D3C9-620A-426C-BDB5-DAA0E4F8247F v4
Table 93: LDRGFC technical data

Operate current, zero sequence current (1-100)% of lBase ±1.0% of Ir
Operate current, low current operation (1-100)% of lBase ±1.0% of Ir
Operate voltage, phase to neutral (1-100)% of UBase ±0.5% of Ur
Operate voltage, phase to phase (1-100)% of UBase ±0.5% of Ur
Independent time delay, zero sequence (0.000-60.000) s ±0.2% or ±40 ms

current at 0 to 2 x Iset whichever is
greater

Technical manual

Independent time delay, low current (0.000-60.000) s ±0.2% or ± 40 ms
operation at 2 x Iset to 0 whichever is
greater
Independent time delay, low voltage (0.000-60.000) s ±0.2% or ±40 ms
operation at 2 x Uset to 0 whichever is
greater
Reset time delay for startup signal at 0 to 2 (0.000-60.000) s ±0.2% or ±40 ms
x Uset whichever is
greater

Technical manual
Section 8 Impedance protection

8.1 Distance measuring zones, quadrilateral characteristic
ZMQPDIS, ZMQAPDIS, ZDRDIR IP14498-1 v4
8.1.1 Identification M14852-1 v6

Distance protection zone, ZMQPDIS 21
quadrilateral characteristic (zone 1)
Z
S00346 V2 EN-US
Distance protection zone, ZMQAPDIS 21

quadrilateral characteristic (zone
2-5) Z
S00346 V2 EN-US
Directional impedance quadrilateral ZDRDIR 21D
Z<->
The line distance protection is an up to five (depending on product variant) zone full scheme
protection function with three fault loops for phase-to-phase faults and three fault loops for
phase-to-earth faults for each of the independent zones. Individual settings for each zone in
resistive and reactive reach gives flexibility for use as back-up protection for transformer
connected to overhead lines and cables of different types and lengths.
Distance measuring zone, quadrilateral characteristic (ZMQPDIS) together with Phase

selection with load encroachment (FDPSPDIS) has functionality for load encroachment, which
increases the possibility to detect high resistive faults on heavily loaded lines, as shown in
figure 48.

Technical manual
Forward
operation
Reverse
operation
en05000034.vsd
Figure 48: Typical quadrilateral distance protection zone with Phase selection with load
encroachment function FDPSPDIS activated
The independent measurement of impedance for each fault loop together with a sensitive and
reliable built-in phase selection makes the function suitable in applications with single-phase
autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load

exporting end at phase-to-earth faults on heavily loaded power lines.
The distance protection zones can operate independently of each other in directional (forward
or reverse) or non-directional mode. This makes them suitable, together with different
communication schemes, for the protection of power lines and cables in complex network
configurations, such as parallel lines, multi-terminal lines.
8.1.3 Function block IP12800-1 v2
SEMOD115983-4 v8
ZMQPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 49: ZMQPDIS function block
ZMQAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 50: ZMQAPDIS function block (zone 2 - 5)

Technical manual
The two inputs I3P — Three phase group signal for current and U3P — Three
phase group signal for voltage, must be connected to non-adaptive SMAI
blocks if ANY OF THE ZONES are set for directional operation. That is, the
parameter DFTReference in used SMAI must be set to InternalDFTRef. If
adaptive SMAI block is used this might result in a wrong directional and reach
evaluation.
SEMOD54537-4 v5
ZDRDIR
I3P* STDIRCND
U3P*
Figure 51: ZDRDIR function block
8.1.4 Signals
Table 94: ZMQPDIS Input signals

SIGNAL
SIGNAL
VTSZ BOOLEAN 0 Blocks all output by fuse failure signal
BLKTR BOOLEAN 0 Blocks all trip outputs
STCND INTEGER 0 External start condition (loop enabler)
DIRCND INTEGER 0 External directional condition
Table 95: ZMQPDIS Output signals

TRIP BOOLEAN General Trip, issued from any phase or loop
TRL1 BOOLEAN Trip signal from phase L1
START BOOLEAN General Start, issued from any phase or loop
STL1 BOOLEAN Start signal from phase L1
STND BOOLEAN Non-directional start, issued from any phase or loop

Technical manual
Table 96: ZMQAPDIS Input signals

SIGNAL
SIGNAL
Table 97: ZMQAPDIS Output signals

Table 98: ZDRDIR Input signals

SIGNAL
SIGNAL
Table 99: ZDRDIR Output signals

STDIRCND INTEGER Binary coded directional information per measuring loop
8.1.5 Settings
GUID-62142086-79A9-46FF-A14F-BA0CDD6B6466 v1
Signals and settings for ZMQPDIS are valid for zone 1 while signals and settings
for ZMQAPDIS are valid for zone 2 - 5

Technical manual
Table 100: ZMQPDIS Group settings (basic)

On
OperationDir Non-directional - - Forward Operation mode of directionality
Forward NonDir / Forw / Rev
Reverse
X1 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach
R1 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for zone
characteristic angle
X0 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach
R0 0.01 - 3000.00 Ohm/p 0.01 15.00 Zero seq. resistance for zone
RFPP 0.10 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach in ohm/loop,
Ph-Ph
RFPE 0.10 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach in ohm/loop,
Ph-E
OperationPP Off - - On Operation mode Off / On of Phase-
On Phase loops
OpModetPP Off - - On Operation mode Off / On of Zone
On timer, Ph-Ph
tPP 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-Ph
OperationPE Off - - On Operation mode Off / On of Phase-
On Earth loops
OpModetPE Off - - On Operation mode Off / On of Zone
On timer, Ph-E
tPE 0.000 - 60.000 s 0.001 0.000 Time delay of trip, Ph-E
IMinOpPP 10 - 1000 %IB 1 20 Minimum operate delta current for
Phase-Phase loops
IMinOpPE 10 - 1000 %IB 1 20 Minimum operate phase current for
Phase-Earth loops
IMinOpIN 5 - 1000 %IB 1 5 Minimum operate residual current for
Phase-Earth loops
Table 101: ZMQPDIS Non group settings (basic)

Value groups
Table 102: ZMQAPDIS Group settings (basic)

On
Reverse

Technical manual

Ph-Ph
Ph-E
On Phase loops
On timer, Ph-Ph
On Earth loops
On timer, Ph-E
Phase-Phase loops
Phase-Earth loops
Table 103: ZMQAPDIS Non group settings (basic)

Value groups
Table 104: ZDRDIR Group settings (basic)

IMinOpPP 5 - 30 %IB 1 10 Minimum operate phase-phase
current for Phase-Phase loops
Phase-Earth loops
ArgNegRes 90 - 175 Deg 1 115 Angle of blinder in second quadrant
for forward direction
ArgDir 5 - 45 Deg 1 15 Angle of blinder in fourth quadrant for
forward direction
Table 105: ZDRDIR Non group settings (basic)

Value groups

Technical manual

Table 106: ZDRDIR Monitored data

L1Dir INTEGER 1=Forward - Direction in phase L1
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
L1R REAL - Ohm Resistance in phase L1
L1X REAL - Ohm Reactance in phase L1
8.1.7 Operation principle
8.1.7.1 Full scheme measurement M16923-92 v4
The execution of the different fault loops within the IED are of full scheme type, which means
that each fault loop for phase-to-earth faults and phase-to-phase faults for forward and
reverse faults are executed in parallel.
Figure 52 presents an outline of the different measuring loops for up to five, impedance-
measuring zones. There are 3 to 5 zones depending on product type and variant.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1 Zone 1
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1

Zone RV
Figure 52: The different measuring loops at phase-to-earth fault and phase-to-phase
fault.
The use of full scheme technique gives faster operation time compared to switched schemes
which mostly uses a start element to select correct voltages and current depending on fault
type. Each distance protection zone performs like one independent distance protection IED
with six measuring elements.

Technical manual
8.1.7.2 Impedance characteristic M16923-100 v8
The distance measuring zone includes six impedance measuring loops; three intended for
phase-to-earth faults, and three intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone will essentially operate according to the non-directional
impedance characteristics presented in figure 53 and figure 54. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase characteristic
presents the per phase reach.
X (Ohm/loop)
R1+Rn
RFPE RFPE
X0-X1
Xn =
3
X1+Xn R0-R1
Rn =
3
jN jN
R (Ohm/loop)
RFPE RFPE
X1+Xn
RFPE RFPE
R1+Rn
Figure 53: Characteristic for phase-to-earth measuring, ohm/loop domain

Technical manual
X (Ohm/phase)
RFPP R1 RFPP
2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG--X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00PE
0PE
PG --1X
-X 11FWPE
XFWPE
FWPG
XNFW =
=
XNFW =
XNFW
X1 3
3 3
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1
RFPP R1 RFPP
2 2
Figure 54: Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in Figure. Note in
particular the difference in definition regarding the (fault) resistive reach for phase-to-phase
faults and three-phase faults.

Technical manual
IL1 R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
fault in phase L1 RFPE
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
IL1 R1 + j X1 Phase-to-phase
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
UL2 (Arc resistance)
R1 + j X1
IL1 R1 + j X1 0.5·RFPP Phase-to-phase

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP
Figure 55: Fault loop model

The R1 and jX1 55 represents the positive sequence impedance from the measuring point to
the fault location. The settings and RFPP are the eventual fault resistances in the faulty place.
Regarding the illustration of three-phase fault in Figure 55, there is of course fault current
flowing also in the third phase during a three-phase fault. The illustration merely reflects the
loop measurement, which is made phase-to-phase.
The zone can be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in Figure. The
impedance reach is symmetric, in the sense that it conforms for forward and reverse direction.
Therefore, all reach settings apply to both directions.

Technical manual
X X X
R R R
Non-directional Forward Reverse
Figure 56: Directional operating modes of the distance measuring zones

The zone impedance characteristic is a product of the two separate characteristics:
• The quadrilateral characteristic

• The directional characteristic
The estimated impedance needs to be inside both characteristics for the zone to start or trip.
(The non-directional start STND is an exception however. It is only dependent on the
quadrilateral characteristic.)
In the following figure, the zone with the shorter reactive reach follows the directional line
(R∙tan(15⁰)) only up to X1PP, where the quadrilateral characteristic will start to limit the reach.
X (ohm)
X1PP’
X1PP
15° R (ohm)
-X1PP RFPP/2
R· tan15°
-X1PP’
IEC19000141-1-en-us.vsdx
Figure 57: Line distance protection

Technical manual
8.1.7.3 Minimum operating current M16923-127 v5
The operation of Distance measuring zones, quadrilateral characteristic (ZMQPDIS) is blocked

if the magnitude of input currents fall below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn < IMinOpPE.
For zone 1 with load compensation feature the additional criterion applies, that all phase-to-
earth loops will be blocked when IN < IMinOpIN, regardless of the phase currents.
ILn is the RMS value of the current in phase Ln. IN is the RMS value of the vector sum of the
three-phase currents, that is, residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLn < IMinOpPP.
ILmLn is the RMS value of the vector difference between phase currents Lm and Ln.
All three current limits IMinOpPE, IMinOpIN and IMinOpPP are automatically
reduced to 75% of regular set values if the zone is set to operate in reverse
direction, that is, OperationDir = Reverse.
8.1.7.4 Measuring principles M16923-4 v7
Fault loop equations use the complex values of voltage, current, and changes in the current.
Apparent impedances are calculated and compared with the set limits. The apparent
impedances at phase-to-phase faults follow equation 3 (example for a phase L1 to phase L2
fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2
EQUATION1222 V1 EN-US (Equation 3)
Here U and I represent the corresponding voltage and current phasors in the respective phase
Ln (n = 1, 2, 3)
The earth return compensation applies in a conventional manner to phase-to-earth faults

(example for a phase L1 to earth fault) according to equation 4.
U L1
Z app =
I L1 + I N × KN
Where:
are the phase voltage, phase current and residual current present to the IED
U L1
I L1
IN
KN
is defined as:

Technical manual
Z 0 - Z1
KN =
3 × Z1
EQUATION-2105 V2 EN-US
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
R0 is setting of the resistive zero sequence reach
X0 is setting of the reactive zero sequence reach
R1 is setting of the resistive positive sequence reach
X1 is setting of the reactive positive sequence reach
Here IN is a phasor of the residual current in IED point. This results in the same reach along the
line for all types of faults.
The apparent impedance is considered as an impedance loop with resistance R and reactance
X.
The formula given in equation 4 is only valid for radial feeder application without load. When
load is considered in the case of single phase-to-earth fault, conventional distance protection
might overreach at exporting end and underreach at importing end. The IED has an adaptive
load compensation which increases the security in such applications.
Measuring elements receive current and voltage information from the A/D converter. The
check sums are calculated and compared, and the information is distributed into memory
locations. For each of the six supervised fault loops, sampled values of voltage (U), current (I),
and changes in current between samples (DI) are brought from the input memory and fed to a
recursive Fourier filter.
The filter provides two orthogonal values for each input. These values are related to the loop
impedance according to equation 5,
X Di
U = R × i + ------ × -----
w 0 Dt
in complex notation, or:
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with

Technical manual
w0 = 2 × p × f 0
where:
Re designates the real component of current and voltage,
Im designates the imaginary component of current and voltage and
f0 designates the rated system frequency
The algorithm calculates Rm measured resistance from the equation for the real value of the
voltage and substitutes it in the equation for the imaginary part. The equation for the Xm
measured reactance can then be solved. The final result is equal to:
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
The calculated Rm and Xm values are updated each sample and compared with the set zone
reach. The adaptive tripping counter counts the number of permissive tripping results. This
effectively removes any influence of errors introduced by the capacitive voltage transformers
or by other factors.
The directional evaluations are performed simultaneously in both forward and reverse
directions, and in all six fault loops. Positive sequence voltage and a phase locked positive
sequence memory voltage are used as a reference. This ensures unlimited directional
sensitivity for faults close to the IED point.
8.1.7.5 Directional impedance element for quadrilateral characteristics M16923-139 v6
The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR. Equation 11 and equation 12 are used to classify that the fault is in forward direction
for phase-to-earth fault and phase-to-phase fault.
0.8 × U 1L1 + 0.2 × U 1L1 M

- ArgDir < arg < ArgNeg Re s
I L1
For the L1-L2 element, the equation in forward direction is according to.

Technical manual
0.8 × U 1L1 L 2 + 0.2 × U 1L1 L 2 M

I L1 L 2
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees) and
ArgNegRes is the setting for the upper boundary of the forward directional characteristic, by default set to
115 degrees, see figure 58.
is positive sequence phase voltage in phase L1
U 1L1
is positive sequence memorized phase voltage in phase L1
U 1L1M
is phase current in phase L1
I L1
is voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2 M
is current difference between phase L1 and L2 (L2 lagging L1)
I L1L 2
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees respectively
(as shown in figure 58). It should not be changed unless system studies have shown the
necessity.
ZDRDIR gives binary coded directional information per measuring loop on the output
STDIRCND.
STDIR= STFWL1*1+STFWL2*2+STFWL3*4+STFWL1L2*8+
+STFWL2L3*16+STFWL3L1*32+STRVL1*64+STRVL2*128+
+STRVL3*256+STRVL1L2*512+STRVL2L3*1024+STRVL3L1*2048

Technical manual
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 58: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR
The reverse directional characteristic is equal to the forward characteristic rotated by 180
degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the
set base voltage UBase. So the directional element can use it for all unsymmetrical faults
including close-in faults.
For close-in three-phase faults, the U1L1M memory voltage, based on the same positive
sequence voltage, ensures correct directional discrimination.
The memory voltage is used for 100 ms or until the positive sequence voltage is restored.
After 100 ms the following occurs:
• If the current is still above the set value of the minimum operating current (between 10
and 30% of the set IED rated current IBase), the condition seals in.
• If the fault has caused tripping, the trip endures.
• If the fault was detected in the reverse direction, the measuring element in the
reverse direction remains in operation.
• If the current decreases below the minimum operating value, the memory resets until the
positive sequence voltage exceeds 10% of its rated value.
8.1.7.6 Simplified logic diagrams M13841-35 v2
Distance protection zones M13841-10 v9

The design of the distance protection zones are presented for all measuring loops: phase-to-
earth as well as phase-to-phase.
Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-phase
signals are designated by L1L2, L2L3, and L3L1.

Technical manual
Fulfillment of two different measuring conditions is necessary to obtain the one logical signal
for each separate measuring loop:
• Zone measuring condition, which follows the operating equations described above.
• Group functional input signal (STCND), as presented in figure 59.
Two types of function block, ZMQPDIS and ZMQAPDIS, are used in the IED. ZMQPDIS is used
for zone 1 and ZMQAPDIS for zone 2 - 5.
The STCND input signal represents a connection of six different integer values from Phase
selection with load encroachment, quadrilateral characteristic function FDPSPDIS within the
IED, which are converted within the zone measuring function into corresponding boolean
expressions for each condition separately. Input signal STCND is connected to FDPSPDIS or
FMPSPDIS function output STCNDZ.
The input signal DIRCND is used to give condition for directionality for the distance measuring
zones. The signal contains binary coded information for both forward and reverse direction.
The zone measurement function filters out the relevant signals depending on the setting of
the parameter OperationDir. It must be configured to the STDIR output on ZDRDIR function.
STZMPP
OR
STCND
AND STNDL1L2
L1L2
STNDL2L3
L2L3 AND
L3L1 AND STNDL3L1
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STPE
OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK
99000557-2.vsd
Figure 59: Conditioning by a group functional input signal STCND, external start
condition
Composition of the phase start signals for a case, when the zone operates in a non-directional
mode, is presented in figure 60.

Technical manual
Figure 60: Composition of starting signals in non-directional operating mode

Results of the directional measurement enter the logic circuits, when the zone operates in
directional (forward or reverse) mode, as shown in figure 61.
STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND
STZMPP
OR
BLK
15 ms
OR START
AND t
Figure 61: Composition of start signals in directional operating mode

Tripping conditions for the distance protection zone one are symbolically presented in figure
62.

Technical manual
Timer tPP=On
STZMPP AND tPP
AND
t
BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
Figure 62: Tripping logic for the distance protection zone
M13842-1 v15
Table 107: ZMQPDIS Technical data

Number of zones Max 5 with selectable -
direction
Minimum operate residual (5-1000)% of IBase -
current, zone 1
Minimum operate current, (10-1000)% of IBase -
phase-to-phase and phase-to-
earth
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
±2.0 degrees static angular accuracy
Positive sequence resistance (0.01-1000.00) Ω/phase Conditions:
Zero sequence reactance (0.10-9000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
Current range: (0.5-30) x Ir
Angle: at 0 degrees and 85 degrees
Zero sequence resistance (0.01-3000.00) Ω/phase
Fault resistance, phase-to- (0.10-9000.00) Ω/loop
earth
Fault resistance, phase-to- (0.10-3000.00) Ω/loop
phase
Dynamic overreach <5% at 85 degrees -
measured with CVT’s
and 0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
Ph-E operation

Technical manual

Operate time 25 ms typically IEC 60255-121
Reset ratio 105% typically -
Reset time at 0.1 x Zreach to 2 Min. = 20 ms -
x Zreach Max. = 50 ms
8.2 Phase selection, quad, fixed angle, load encroachment

FDPSPDIS IP12400-1 v4
8.2.1.1 Identification M14850-1 v6

Phase selection, quad, fixed angle, FDPSPDIS 21
load encroachment
Z<phs
SYMBOL-DD V1 EN-US
The operation of transmission networks today is in many cases close to the stability limit. Due
to environmental considerations, the rate of expansion and reinforcement of the power
system is reduced, for example, difficulties to get permission to build new power lines. The
ability to accurately and reliably classify the different types of fault, so that single pole tripping
and autoreclosing can be used plays an important role in this matter. Phase selection,
quadrilateral characteristic with fixed angle (FDPSPDIS) is designed to accurately select the
proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault
resistance coverage difficult to achieve. Therefore, FDPSPDIS has a built-in algorithm for load
encroachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s), which can be used for fault analysis.
A current-based phase selection is also included. The measuring elements continuously

measure three phase currents and the residual current and, compare them with the set values.

Technical manual
FDPSPDIS
I3P* TRIP
U3P* START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDLE
Figure 63: FDPSPDIS function block
8.2.4 Signals
Table 108: FDPSPDIS Input signals

SIGNAL
SIGNAL
Table 109: FDPSPDIS Output signals

TRIP BOOLEAN Trip output
START BOOLEAN Start in any phase or loop
STFWL1 BOOLEAN Fault detected in phase L1 - forward direction
STFWPE BOOLEAN Earth fault detected in forward direction
STRVL1 BOOLEAN Fault detected in phase L1 - reverse direction
STRVPE BOOLEAN Earth fault detected in reverse direction
STNDL1 BOOLEAN Non directional start in L1

Technical manual

STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth measuring
elements
STPP BOOLEAN Current conditions release of phase-phase measuring
elements
STCNDZ INTEGER Start condition (Z< with LE and 3I0 E/F detection)
STCNDLE INTEGER Start condition (only LE and 3I0 E/F detection)
8.2.5 Settings
Table 110: FDPSPDIS Group settings (basic)

INBlockPP 10 - 100 %IPh 1 40 3I0 limit for blocking phase-to-phase
measuring loops
INReleasePE 10 - 100 %IPh 1 20 3I0 limit for releasing phase-to-earth
measuring loops
RLdFw 1.00 - 3000.00 Ohm/p 0.01 80.00 Forward resistive reach within the
load impedance area
RLdRv 1.00 - 3000.00 Ohm/p 0.01 80.00 Reverse resistive reach within the load
impedance area
ArgLd 5 - 70 Deg 1 30 Load angle determining the load
impedance area
RFFwPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, forward
RFRvPP 0.50 - 3000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, reverse
RFFwPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, forward
RFRvPE 1.00 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, reverse
Phase-Phase loops
Phase-Earth loops
Table 111: FDPSPDIS Group settings (advanced)

OperationZ< Off - - On Operation of impedance based
On measurement
OperationI> Off - - Off Operation of current based
On measurement
IPh> 10 - 2500 %IB 1 120 Start value for phase over-current
element

Technical manual

IN> 10 - 2500 %IB 1 20 Start value for trip from 3I0 over-
current element
TimerPP Off - - Off Operation mode Off / On of Zone
On timer, Ph-Ph
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off - - Off Operation mode Off / On of Zone
On timer, Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
Table 112: FDPSPDIS Non group settings (basic)

Value groups

M13140-3 v6
The basic impedance algorithm for the operation of the phase selection measuring elements is
the same as for the distance zone measuring function. Phase selection with load
encroachment, quadrilateral characteristic FDPSPDIS includes six impedance measuring loops;
three intended for phase-to-earth faults, and three intended for phase-to-phase faults as well
as for three-phase faults.
The difference, compared to the distance zone measuring function, is in the combination of
the measuring quantities (currents and voltages) for different types of faults.

measure three phase currents and the residual current, and compare them with the set values.
The current signals are filtered by Fourier's recursive filter, and separate trip counter prevents
too high overreaching of the measuring elements.
The characteristic is basically non-directional, but FDPSPDIS uses information from the
directional function to discriminate whether the fault is in forward or reverse direction.
The start condition STCNDZ is essentially based on the following criteria:
1. Residual current criteria, that is, separation of faults with and without earth connection
2. Regular quadrilateral impedance characteristic or current based criteria
3. Load encroachment characteristics is always active but can be switched off by selecting a
high setting.
The current start condition STCNDLE is based on the following criteria:
1. Residual current criteria

2. No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum
operating current limits.
3. Load encroachment characteristic is always active, but can be switched off by selecting a
high setting.
The STCNDLE output is non-directional. The directionality is determined by the distance zones
directional function. There are outputs from FDPSPDIS that indicate whether a start is in
forward or reverse direction or non-directional, for example STFWL1, STRVL1 and STNDL1.

Technical manual
These directional indications are based on the sector boundaries of the directional function
and the impedance setting of FDPSPDIS function. Their operating characteristics are
illustrated in figure 64.
X X X
R
R R
Non-directional (ND) Forward (FW) Reverse (RV)
en08000286.vsd
Figure 64: Characteristics for non-directional, forward and reverse operation of Phase
selection with load encroachment, quadrilateral characteristic FDPSPDIS
The setting of the load encroachment function may influence the total operating
characteristic, (for more information, refer to section "Load encroachment").
The input DIRCND contains binary coded information about the directional coming from the
directional function . It shall be connected to the STDIR output on ZDRDIR, directional
measuring block. This information is also transferred to the input DIRCND on the distance
measuring zones, that is, the ZMQPDIS, distance measuring block.
The code built up for the directionality is as follows:
If the binary information is 1 then it will be considered that we have start in forward direction
in phase L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2,
binary code 192 means start in reverse direction in phase L1 and L2A and B etc.
The STCNDZ or STCNDLE output contains, in a similar way as DIRCND, binary coded
information, in this case information about the condition for opening correct fault loop in the
distance measuring element. It shall be connected to the STCND input on the ZMQPDIS,
distance measuring block.
The code built up for release of the measuring fault loops is as follows:
STCND = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
8.2.6.1 Phase-to-earth fault M13140-22 v3
For a phase-to-earth fault, the measured impedance by FDPSPDIS will be according to

equation 13.

Technical manual
Index PHS in images and equations reference settings for Phase selection with
load encroachment function FDPSPDIS.
ULn
ZPHSn =
ILn
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FDPSPDIS function at phase-to-earth fault is according to figure 65. The
characteristic has a fixed angle for the resistive boundary in the first quadrant of 60°.
The resistance RN and reactance XN are the impedance in the earth-return path defined
according to equation 14 and equation 15.
R0 - R1
RN =
3
X 0 - X1
XN =
3
X (ohm/loop)
Kr·(X1+XN)
RFRvPE RFFwPE
X1+XN
60 deg
RFFwPE
RFRvPE R (Ohm/loop)
60 deg
X1+XN
1
Kr =
tan(60deg)
RFRvPE RFFwPE
Kr·(X1+XN)
en06000396.vsd
Figure 65: Characteristic of FDPSPDIS for phase-to-earth fault (setting parameters in

italic), ohm/loop domain (directional lines are drawn as "line-dot-dot-line")

Technical manual
Besides this, the 3I0 residual current must fulfil the conditions according to equation 16 and
equation 17.
3 × I0 ³ 0.5 × IMinOpPE
3 × I0 ³ INReleasePE
------------------------------------ × Iphmax
100
where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-to-
earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
8.2.6.2 Phase-to-phase fault M13140-56 v3
For a phase-to-phase fault, the measured impedance by FDPSPDIS will be according to

equation 18.
ULm - ULn
ZPHS =
-2 × ILn
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in
the lagging phase n.
The operation characteristic is shown in figure 66.

Technical manual
X (W / phase)
0.5·RFRvPP 0.5·RFFwPP
Kr·X1
X1
0.5·RFFwPP
60 deg
R (W / phase)
60 deg
0.5·RFRvPP
X1
1
Kr =
tan(60 deg)
Kr·X1
Figure 66: The operation characteristics for FDPSPDIS at phase-to-phase fault (setting
parameters in italic, directional lines drawn as "line-dot-dot-line"), ohm/phase
domain
In the same way as the condition for phase-to-earth fault, there are current conditions that
have to be fulfilled in order to release the phase-to-phase loop. Those are according to
equation 19 or equation 20.
3I 0 < IMinOpPE
INBlockPP
3I 0 < × Iph max
100
where:
IMinOpPE is the minimum operation current for earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.
8.2.6.3 Three-phase faults M13140-80 v4
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that
is equation , equation and equation are used to release the operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is
shown in figure 67.

Technical manual
X (ohm/phase)
4 × X1
3
90 deg
0.5·RFFwPP·K3
X1·K3 4 × RFFwPP
6
R (ohm/phase)
0.5·RFRvPP·K3
2
K3 =
3 30 deg
Figure 67: The characteristic of FDPSPDIS for three-phase fault (setting parameters in
italic)
8.2.6.4 Load encroachment M13140-86 v6
Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can
be switched off by selecting a high setting.
The outline of the characteristic is presented in figure 68. As illustrated, the resistive blinders
are set individually in forward and reverse direction while the angle of the sector is the same in
all four quadrants.

Technical manual
RLdFw
ArgLd ArgLd
R
ArgLd ArgLd
RLdRv
Figure 68: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on
the chosen operation mode of FDPSPDIS function. When output signal STCNDZ is selected, the
characteristic for FDPSPDIS (and also zone measurement depending on settings) will be
reduced by the load encroachment characteristic (see figure 69, left illustration).
When output signal STCNDLE is selected, the operation characteristic will be as the right
illustration in figure 69. The reach will in this case be limit by the minimum operation current
and the distance measuring zones.
X X
R R
STCNDZ STCNDLE
IEC10000099-1-
en.vsd
Figure 69: Difference in operating characteristic depending on operation mode when

load encroachment is activated

Technical manual
When FDPSPDIS is set to operate together with a distance measuring zone the resultant
operate characteristic could look like in figure 70. The figure shows a distance measuring zone
operating in forward direction. Thus, the operating area is highlighted in black.
"Phase selection"
"quadrilateral" zone
Distance measuring zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 70: Operating characteristic in forward direction when load encroachment is

activated
Figure 70 is valid for phase-to-earth. During a three-phase fault, or load, when the quadrilateral
phase-to-phase characteristic is subject to enlargement and rotation the operate area is
transformed according to figure 71. Notice in particular what happens with the resistive
blinders of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation, the angle
of the blinder in quadrant one is now 90 degrees instead of the original 60 degrees. The
blinder that is nominally located to quadrant four will at the same time tilt outwards and
increase the resistive reach around the R-axis. Consequently, it will be more or less necessary
to use the load encroachment characteristic in order to secure a margin to the load
impedance.

Technical manual
X (W / phase)
Phase selection
”Quadrilateral” zone
R (W / phase)
Figure 71: Operating characteristic for FDPSPDIS in forward direction for three-phase
fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented
in fig 72. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when
subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink",
divided by 2/√3, from the full RLdFw and RLdRv reach, which is valid at load or three-phase
fault.

Technical manual
IEC08000437.vsd
Figure 72: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral
characteristic since not all phase-to-phase loops will be fully affected by a fault between two
phases. It should also provide better fault resistive coverage in quadrant one. The relative loss
of fault resistive coverage in quadrant four should not be a problem even for applications on
series compensated lines.
8.2.6.5 Minimum operate currents M13140-102 v3
The operation of the Phase selection with load encroachment function (FDPSPDIS) is blocked if
the magnitude of input currents falls below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the
current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).
Figure 73 presents schematically the general logic diagram for phase-selection function.

Technical manual
INMag Residual current
based PhSel.
INReleasePE
STPP
PP
INBLOCKPP STPE
PE
Imin
I3P PP
PE STZPHLmn AND
PHSLmn
X
OR
U3P STZPHLm
R,X settings R
LEPHLm AND PHSLm
OR
Binary to word
LEPHLmn
OperationZ< Enable
b1 – b3
word
b4 – b6
IPELm
IL1 IRELPE
Set level
IPh> T
IRELPP STCNDZ
IN> AND 63 F
t
OperationI> Binary to word
b1 – b3
OR
STCNDLE
word
Relative current AND b4 – b6
IPELm RELPHLmn AND
based PP release
detection
m = L1G, L2G, L3G
mn = L1L2, L2L3, L3L1
Figure 73: General phase-selection logic diagram

Figure 74 presents schematically the creation of the phase-to-phase and phase-to-earth
operating conditions. Consider only the corresponding part of measuring and logic circuits,
when only a phase-to-earth or phase-to-phase measurement is available within the IED.
OperationZ<
AND
LDEblock
3I 0  0.5  IMinOpPE IRELPE
& 15 ms
AND t STPE
INReleasePE
3I 0   Iphmax
100 STCNDLE
Bool to AND
BLOCK integer
15 ms
3I 0  IMinOpPE 10 ms 20 ms & t STPP
OR AND t t
IRELPP
INBlockPP
3I 0   Iphmax
100
Figure 74: Phase-to-phase and phase-to-earth operating conditions (residual current

criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDLE output
signal is created as a combination of the load encroachment characteristic and current
criteria, refer to figure 74. This signal can be configured to STCND functional input signals of
the distance protection zone and this way influence the operation of the phase-to-phase and
phase-to-earth zone measuring elements, residual current and the load encroachment
characteristic.

Technical manual
Figure 75 presents schematically the composition of non-directional phase selective signals

STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three
according to the phase number) represent the fulfilled operating criteria for each separate
loop measuring element, that is, within the impedance characteristic. These signals are
released if the setting OperationZ< is set to On. Similarly, another group of internal signals
ILm and ILn represent the fulfilled phase current measurement criteria, which are released by
setting the OperationI> parameter to On.
INDL1N
INDL2N
INDL3N
15 ms
STNDPE
IRELPE OR t
LDEblockL1N
IL1 AND 15 ms
OR STNDL1
ZML1N OR t
LDEblockL2N
IL2 AND
OR
ZML2N 15 ms
LDEblockL3N STNDL2
OR t
IL3 AND
OR
ZML3N
LDEblockL1L2 15 ms
STNDL3
IL1 & IL2 AND OR t
OR
ZML1L2
LDEblockL2L3
IL2 & IL3 AND INDL1L2
OR
ZML2L3 INDL2L3
LDEblockL3L1
IL3 & IL1 AND
OR INDL3L1
ZML3L1
IRELPP 15 ms
STNDPP
OR t
Figure 75: Composition on non-directional phase selection signals

Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 77 and figure 76. The directional criteria appears as a condition for the
correct phase selection in order to secure a high phase selectivity for simultaneous and
evolving faults on lines within the complex network configurations. Internal signals DFWLn and
DFWLnLm present the corresponding directional signals for measuring loops with phases Ln
and Lm. Designation FW (figure 77) represents the forward direction as well as the designation
RV (figure 76) represents the reverse direction. All directional signals are derived within the
corresponding digital signal processor.
Figure 76 presents additionally a composition of a STCNDZ output signal, which is created on

the basis of the continuation of the impedance measuring conditions and the load
encroachment characteristic. This signal can be configured to STCND functional input signals
of the distance protection zone and this way influence the operation of the phase-to-phase
and phase-to-earth zone measuring elements and their phase related starting and tripping
signals.

Technical manual
INDL1N
AND
DRVL1N
INDL1L2 15 ms STRVL1
AND OR t
DRVL1L2
INDL3L1
AND
DRVL3L1 15 ms
STRVPE
INDL2N OR t
AND
DRVL2N
INDL1L2 15 ms
STRVL2
AND OR t
INDL2L3 INDL1N
AND INDL2N
DRVL2L3
INDL3N Bool to STCNDZ
INDL3N INDL1L2 integer
AND INDL2L3
DRVL3N INDL3L1
INDL2L3 15 ms
STRVL3
AND OR t
INDL3L1
15 ms
AND STRVPP
OR t
Figure 76: Composition of phase selection signals for reverse direction
AND
INDL1N
AND 15 ms 15 ms
DFWL1N STFW1PH
AND OR t t
INDL1L2
15 ms STFWL1
AND OR t
DFWL1L2
INDL3L1
AND
AND
DFWL3L1 15 ms
STFWPE
INDL2N OR t
AND
DFWL2N
AND 15 ms
INDL1L2 STFWL2
t
AND OR
15 ms 15 ms
INDL2L3 STFW2PH
AND OR t t
AND
DFWL2L3
INDL3N
AND AND
DFWL3N 15 ms
STFWL3
t
INDL2L3
AND OR
15 ms
INDL3L1 STFW3PH
AND t
AND
15 ms
STFWPP
OR t
Figure 77: Composition of phase selection signals for forward direction

Technical manual
Figure 78 presents the composition of output signals TRIP and START, where internal signals
STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and
STRVPE, but for the phase-to-phase loops.
TimerPP=Off
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Off
t
AND AND
STNDPP
STFWPP OR
STRVPP
START
OR
STNDPE
STFWPE OR
STRVPE
IEC08000441-1 V2 EN-US
Figure 78: TRIP and START signal logic

Technical manual

M16024-1 v12
Table 113: FDPSPDIS technical data

Minimum operate current (5-500)% of IBase ±1.0% of Ir at I ≤ Ir
±1.0% of I at I > Ir
Reactive reach, positive (0.50–3000.00) Ω/phase ±2.5% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
sequence
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase

Fault resistance, phase-to- (1.00–9000.00) Ω/loop
earth faults, forward and
reverse
Fault resistance, phase-to- (0.50–3000.00) Ω/loop
phase faults, forward and
reverse
Load encroachment criteria:
Load resistance, forward and (1.00–3000.00) Ω/phase
reverse (5-70) degrees
Safety load impedance angle
8.3 Distance measuring zone, quadrilateral characteristic

for series compensated lines ZMCPDIS, ZMCAPDIS,
ZDSRDIR SEMOD168167-1 v3
SEMOD168165-2 v2

Distance measuring zone, ZMCPDIS 21
quadrilateral characteristic for series
compensated lines (zone 1) Z
S00346 V2 EN-US
Distance measuring zone, ZMCAPDIS 21

quadrilateral characteristic for series
compensated lines (zone 2-5) Z
S00346 V2 EN-US
Directional impedance quadrilateral, ZDSRDIR 21D

including series compensation
Z<->

Technical manual
8.3.2 Functionality SEMOD168173-4 v11
protection with three fault loops for phase-to-phase faults and three fault loops for phase-to-
earth fault for each of the independent zones. Individual settings for each zone resistive and
reactive reach give flexibility for use on overhead lines and cables of different types and
lengths.
Quadrilateral characteristic is available.
Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS)
function has functionality for load encroachment which increases the possibility to detect high
resistive faults on heavily loaded lines.
Forward
operation
Reverse
operation
en05000034.vsd
Figure 79: Typical quadrilateral distance protection zone with load encroachment
function activated
reliable built in phase selection makes the function suitable in applications with single phase
auto-reclosing.
Built-in adaptive load compensation algorithm for the quadrilateral function prevents
overreaching of zone1 at load exporting end at phase to earth-faults on heavily loaded power
lines.
The distance protection zones can operate, independent of each other, in directional (forward

Technical manual
8.3.3 Function block SEMOD168196-1 v2
SEMOD168198-4 v2
ZMCPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 80: ZMCPDIS function block
ZMCAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
VTSZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 81: ZMCAPDIS function block

SEMOD168200-4 v2
ZDSRDIR
I3P* STFW
U3P* STRV
STDIRCND
Figure 82: ZDSRDIR function block
Input and output signals is shown for zone 1, zone 2 - 5 are equal.
Table 114: ZMCPDIS Input signals

SIGNAL
SIGNAL

Technical manual
Table 115: ZMCPDIS Output signals

Table 116: ZMCAPDIS Input signals

SIGNAL
SIGNAL
Table 117: ZMCAPDIS Output signals


Technical manual
Table 118: ZDSRDIR Input signals

SIGNAL
SIGNAL
Table 119: ZDSRDIR Output signals

STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction
Settings for ZMCPDIS are valid for zone 1, while settings for ZMCAPDIS are valid
for zone 2 - 5
Table 120: ZMCPDIS Group settings (basic)

On
Reverse
On Phase loops
X1FwPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-Ph, forward
R1PP 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for
characteristic angle, Ph-Ph
X1RvPP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-Ph, reverse
On timer, Ph-Ph
On Earth loops
X1FwPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-E, forward
R1PE 0.01 - 1000.00 Ohm/p 0.01 5.00 Positive seq. resistance for
characteristic angle, Ph-E

Technical manual

X0PE 0.10 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E
R0PE 0.01 - 3000.00 Ohm/p 0.01 47.00 Zero seq. resistance for zone
X1RvPE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-E, reverse
On timer, Ph-E
Phase-Phase loops
Phase-Earth loops
Phase-Earth loops
Table 121: ZMCPDIS Non group settings (basic)

Value groups
Table 122: ZMCAPDIS Group settings (basic)

On
Reverse
On Phase loops
Ph-Ph, forward
Ph-Ph, reverse
On timer, Ph-Ph
On Earth loops
Ph-E, forward

Technical manual

Ph-E, reverse
On timer, Ph-E
Phase-Phase loops
Phase-Earth loops
Table 123: ZMCAPDIS Non group settings (basic)

Value groups
Table 124: ZDSRDIR Group settings (basic)

OperationSC NoSeriesComp - - SeriesComp Special directional criteria for voltage
SeriesComp reversal
Phase-Earth loops
forward direction
measuring loops
measuring loops
OperationLdCh Off - - On Operation of load discrimination
On characteristic
load impedance area
impedance area
impedance area
Ph-Ph, forward

Technical manual

Ph-Ph, reverse
Ph-E, forward
X0FwPE 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
forward
Ph-E, reverse
X0RvPE 0.50 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
reverse
Table 125: ZDSRDIR Non group settings (basic)

Value groups

Table 126: ZDSRDIR Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction

Technical manual
8.3.7.1 Full scheme measurement SEMOD168177-4 v2
that earth fault loop for phase-to-earth faults and phase-to-phase faults for forward and
Figure 83 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1

Zone RV
fault
8.3.7.2 Impedance characteristic SEMOD168177-11 v5
Distance measuring zone, quadrilateral characteristic for series compensated lines (ZMCPDIS)
include six impedance measuring loops; three intended for phase-to-earth faults, and three
intended for phase-to-phase as well as, three-phase faults.
The distance measuring zone operates according to the non-directional impedance

characteristics presented in figure 84 and figure 85. The phase-to-earth characteristic is
illustrated with the full loop reach while the phase-to-phase characteristic presents the per-
phase reach.

Technical manual
X (Ohm/loop)
R1PE+RNFw
X 0 PE - X 1FwPE
RFRvPE RFFwPE XNFw =
3
PG- -
XX00PE 1RVPG X 1RvPE
1XRVPE
XNRV XNRv
XNRV == =XXNFw ×
33 X 1FwPE
XX0 PE - X-1X
0 PG FWPE
1FWPG
XNFW==
XNFW
X1FwPE+XNFw 3 3 R0 PE - R1PE
RNFw =
jN jN 3
R (Ohm/loop)
RFRvPE RFFwPE
X1RvPE+XNRv
jN
RFRvPE RFFwPE
Figure 84: Characteristic for the phase-to-earth measuring loops, ohm/loop domain
X (Ohm/phase)
RFRvPP R1PP RFFwPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PE PG- -
X31XRVPE
1RVPG
XNRV ==
XNRV
33
XX
X00PE
0PE-
PG --1X
X 11FWPE
XFWPE
FWPG
XNFW===
XNFW
XNFW
3
X1FwPP 3 3
j j
jN R (Ohm/phase)
RFRvPP RFFwPP
2 2
X1RvPP
jN
RFRvPP RFFwPP
2 2
Figure 85: Characteristic for the phase-to-phase measuring loops

Technical manual
The fault loop reach with respect to each fault type may also be presented as in figure 86. Note
in particular the difference in definition regarding the (fault) resistive reach for phase-to-
phase faults and three-phase faults.
IL1 R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
R1 + j X1

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP

The R1 and jX1 in figure 86 represents the positive sequence impedance from the measuring
point to the fault location. The RFPE and RFPP is the eventual fault resistance in the fault place.
Regarding the illustration of three-phase fault in figure 86, there is of course fault current
The zone may be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 87. It may be
convenient to once again mention that the impedance reach is symmetric, forward and reverse
direction. Therefore, all reach settings apply to both directions.

Technical manual
X X X
R R R
Figure 87: Directional operating modes of the distance measuring zone
8.3.7.3 Minimum operating current SEMOD168177-36 v2
The operation of Distance measuring zone, quadrilateral characteristic for series compensated
lines (ZMCPDIS,ZMCAPDIS) is blocked if the magnitude of input currents fall below certain
threshold values.
three phase currents, that is, residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLnAB (BC or CA)< IMinOpPP.
direction, that is, OperationDir=Reverse.
8.3.7.4 Measuring principles SEMOD168177-46 v3
Apparent impedances are calculated and compared with the set limits. The calculation of the
apparent impedances at ph-ph faults follows equation 21 (example for a phase L1 to phase L2
fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2

Technical manual
Here U and I represent the corresponding voltage and current phasors in the respective phase.
The earth return compensation applies in a conventional manner to ph-E faults (example for a
phase L1 to earth fault) according to equation 22.
U L1
Z app =
I L1 + I N × KN
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
Here IN is a phasor of the residual current at the IED point. This results in the same reach along
the line for all types of faults.
X.
The formula given in equation 22 is only valid for no loaded radial feeder applications. When
might overreach at exporting end and underreach at importing end. IED has an adaptive load
compensation which increases the security in such applications.

Technical manual
X Di
U = R × i + ------ × -----
w 0 Dt
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitute it in the equation for the imaginary part. The equation for the Xm
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )

Technical manual
8.3.7.5 Directionality for series compensation SEMOD168177-97 v4
In the basic distance protection function, the control of the memory for polarizing voltage is
performed by an undervoltage control. In case of series compensated line, a voltage reversal
can occur with a relatively high voltage also when the memory must be locked. Thus, a simple
undervoltage type of voltage memory control can not be used in case of voltage reversal. In the
option for series compensated network the polarizing quantity and memory are controlled by
an impedance measurement criterion.
The polarizing voltage is a memorized positive sequence voltage. The memory is continuously
synchronized via a positive sequence filter. The memory is starting to run freely
instantaneously when a voltage change is detected in any phase. A non-directional impedance
measurement is used to detect a fault and identify the faulty phase or phases.
At a three phase fault when no positive sequence voltage remains (all three phases are
disconnected) the memory is used for direction polarization during 100 ms.
The memory predicts the phase of the positive sequence voltage with the pre-fault frequency.
This extrapolation is made with a high accuracy and it is not the accuracy of the memory that
limits the time the memory can be used. The network is at a three phase fault under way to a
new equilibrium and the post-fault condition can only be predicted accurately for a limited
time from the pre-fault condition.
In case of a three phase fault after 100 ms the phase of the memorized voltage can not be
relied upon and the directional measurement has to be blocked. The achieved direction criteria
are sealed-in when the directional measurement is blocked and kept until the impedance fault
criteria is reset (the direction is stored until the fault is cleared).
This memory control allows in the time domain unlimited correct directional measurement for
all unsymmetrical faults also at voltage reversal. Only at three phase fault within the range of
the set impedance reach of the criteria for control of the polarization voltage the memory has
to be used and the measurement is limited to 100 ms and thereafter the direction is sealed-in.
The special impedance measurement to control the polarization voltage is set separately and
has only to cover (with some margin) the impedance to fault that can cause the voltage
reversal.
The evaluation of the directionality takes place in Directional impedance quadrilateral,

including series compensation (ZDSRDIR) function. Equation 29 and equation 30 are used to
classify that the fault is in forward direction for phase-to-earth fault and phase-to-phase fault.
U 1L1M
I L1
For the L1-L2 element, the equation in forward direction is according to:

Technical manual
U 1L1L 2 M
I L1L 2
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15
(= -15 degrees) and
115 degrees, see Figure 88.
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
U1L1L2M is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 is current difference between phase L1 and L2 (L2 lagging L1)
The setting of ArgDir and ArgNegRes is by default set to 15 (= -15) and 115 degrees
respectively, see Figure 88, and it should not be changed unless system studies have shown
the necessity.
ZDSRDIR generates a binary coded signal on the output STDIR depending on the evaluation
where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4.
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 88: Setting angles for discrimination of forward and reverse fault
degrees.
8.3.7.6 Simplified logic diagrams SEMOD168192-4 v2

Technical manual
Distance protection zones SEMOD168192-6 v5

The design of distance protection zones are presented for all measuring loops: phase-to-earth
as well as phase-to-phase.
Phase-to-earth related signals are designated by Ln, where n represents the corresponding
phase number (L1, L2, and L3). The phase-to-phase signals are designated by LnLm, where n
and m represent the corresponding phase numbers (L1L2, L2L3, and L3L1).
Two types of function block, ZMCPDIS and ZMCAPDIS, are used in the IED. ZMCPDIS is used for
zone 1 and ZMCAPDIS for zone 2 - 5.
The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to Phase
selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output
STCNDZ.
STZMPP
OR
STCND
AND STNDL1L2
L1L2
STNDL2L3
L2L3 AND
L3L1 AND STNDL3L1
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STPE
OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK
99000557-2.vsd
Figure 89: Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a non-
directional mode, is presented in figure 90.

Technical manual

STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND
STZMPP
OR
BLK
15 ms
OR START
AND t
Figure 91: Composition of starting signals in directional operating mode

92.

Technical manual
Timer tPP=On
STZMPP AND tPP
AND
t
BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
Figure 92: Tripping logic for the distance protection zone one
SEMOD173239-2 v10
Table 127: ZMCPDIS, ZMCAPDIS Technical data

direction
current, zone 1
Minimum operate current, Ph- (10-1000)% of IBase -
Ph and Ph-E
Positive sequence reactance (0.10-3000.00) Ω/phase ±2.0% static accuracy
Zero sequence resistance (0.01-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, Ph-E (0.10-9000.00) Ω/loop
Fault resistance, Ph-Ph (0.10-3000.00) Ω/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
Definite time delay Ph-Ph and (0.000-60.000) s ±0.2% or ± 35 ms whichever is greater
Ph-E operation

Technical manual
8.4 Full-scheme distance measuring, Mho characteristic

ZMHPDIS SEMOD154227-1 v4
SEMOD154447-2 v2
Function description IEC 61850 IEC 60617 ANSI/IEEE

identification identification C37.2 device
number
Full-scheme distance protection, ZMHPDIS 21
mho characteristic
Z
S00346 V2 EN-US
The numerical mho line distance protection is an up to five (depending on product variant)
zone full scheme protection of short circuit and earth faults.
The zones have fully independent measuring and settings, which gives high flexibility for all
types of lines. Each zone is an individual function block available for independent configuration
in ACT.
The IED can be used up to the highest voltage levels. It is suitable for the protection of heavily
loaded lines and multi-terminal lines where the requirement for tripping is one-, two- and/or
three-pole.
reliable phase selection makes the function suitable in applications with single phase
autoreclosing.
Built-in selectable zone timer logic is also provided in the function.
Adaptive load compensation algorithm prevents overreaching at phase-to-earth faults on

heavily loaded power lines, see Figure 93.
Load compensation algorithm prevents overreaching at phase-to-earth faults on heavily

loaded power lines, see Figure 93. This Load encroachment characteristic is taken from the
FMPSPDIS function.

Technical manual
jX
Operation area Operation area
Operation area
No operation area No operation area
Figure 93: Load encroachment influence on the offset mho characteristic

or reverse) or non-directional mode (offset). This makes them suitable, together with different
configurations, such as parallel lines, multi-terminal lines and so on.
The integrated control and monitoring functions offer effective solutions for operating and
monitoring all types of transmission and sub-transmission lines.
ZMHPDIS
I3P* TRIP
U3P* TRL1
CURR_INP* TRL2
VOLT_INP* TRL3
POL_VOLT* TRPE
BLOCK TRPP
BLKZ START
BLKZMTD STL1
BLKHSIR STL2
BLKTRIP STL3
BLKPE STPE
BLKPP STPP
EXTNST STTIMER
INTRNST
DIRCND
STCND*
LDCND
Figure 94: ZMHPDIS function block
Table 128: ZMHPDIS Input signals

I3P GROUP - Connection for current sample signals
SIGNAL
U3P GROUP - Connection for voltage sample signals
SIGNAL
CURR_INP GROUP - Connection for current signals
SIGNAL

Technical manual

VOLT_INP GROUP - Connection for voltage signals
SIGNAL
POL_VOLT GROUP - Connection for polarizing voltage
SIGNAL
BLKZ BOOLEAN 0 Block due to fuse failure
BLKZMTD BOOLEAN 0 Block signal for blocking of time domaine function
BLKHSIR BOOLEAN 0 Blocks time domain function at high SIR
BLKTRIP BOOLEAN 0 Blocks all operate output signals
BLKPE BOOLEAN 0 Blocks phase-to-earth operation
BLKPP BOOLEAN 0 Blocks phase-to-phase operation
EXTNST BOOLEAN 0 External start
INTRNST BOOLEAN 0 Internal start
LDCND INTEGER 0 External load condition (loop enabler)
Table 129: ZMHPDIS Output signals

TRIP BOOLEAN Trip General
TRL1 BOOLEAN Trip phase L1
TRPE BOOLEAN Trip phase-to-earth
TRPP BOOLEAN Trip phase-to-phase
START BOOLEAN Start General
STL1 BOOLEAN Start phase L1
STPE BOOLEAN Start phase-to-earth
STPP BOOLEAN Start phase-to-phase
STTIMER BOOLEAN Start timer

Technical manual
Table 130: ZMHPDIS Group settings (basic)

On
DirMode Off - - Forward Direction mode
Offset
Forward
Reverse
LoadEncMode Off - - Off Load encroachment mode Off/On
On
ReachMode Overreach - - Overreach Reach mode Over/Underreach
Underreach
ZnTimerSel Timers seperated - - Timers Zone timer selection
Timers linked seperated
Internal start
Start from PhSel
External start
OpModePE Off - - On Operation mode Off / On of Phase-
On Earth loops
ZPE 0.005 - 3000.000 Ohm/p 0.001 30.000 Positive sequence impedance setting
for Phase-Earth loop
ZAngPE 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Earth loop
KN 0.00 - 3.00 - 0.01 0.80 Magnitude of earth return
compensation factor KN
KNAng -180 - 180 Deg 1 -15 Angle for earth return compensation
factor KN
ZRevPE 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to earth
loop(magnitude)
tPE 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
earth elements
IMinOpPE 10 - 30 %IB 1 20 Minimum operation phase to earth
current
OpModePP Off - - On Operation mode Off / On of Phase-
On Phase loops
ZPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Impedance setting reach for phase to
phase elements
ZAngPP 10 - 90 Deg 1 85 Angle for positive sequence line
impedance for Phase-Phase elements
ZRevPP 0.005 - 3000.000 Ohm/p 0.001 30.000 Reverse reach of the phase to phase
loop(magnitude)
tPP 0.000 - 60.000 s 0.001 0.000 Delay time for operation of phase to
phase
IMinOpPP 10 - 30 %IB 1 20 Minimum operation phase to phase
current

Technical manual
Table 131: ZMHPDIS Group settings (advanced)

OffsetMhoDir Non-directional - - Non-directional Direction mode for offset mho
Forward
Reverse
On timer, Ph-E
On timer, Ph-ph
Table 132: ZMHPDIS Non group settings (basic)

Value groups
8.4.6 Operation principle SEMOD154230-1 v2
that each fault loop for phase-to-earth faults and phase-to-phase faults are executed in
parallel for all zones.
type. So each distance protection zone performs like one independent distance protection
function with six measuring elements.
The Mho distance function ZMHPDIS is present with five instances so that five separate zones
could be designed. Each instance can be selected to be either forward or reverse with positive
sequence polarized mho characteristic; alternatively self polarized offset mho characteristics
is also available. One example of the operating characteristic is shown in Figure 95 A) where
zone 5 is selected offset mho.
The directional mho characteristic of Figure 95 B) has a dynamic expansion due to the source
impedance. Instead of mho characteristic crossing origin, which is only valid where the source
impedance is zero, the crossing point is moved to the coordinates of the negative source
impedance giving an expansion of the circle of Figure 95 B).

Technical manual
A B
jx X
Mho, zone4
Mho, zone3 Zs=0
Mho, zone2 R
Mho, zone1
Zs=Z1
Zs=2Z1
R
Offset mho, zone5
Figure 95: Mho, offset mho characteristic and the source impedance influence on the mho
characteristic
The polarization quantities used for the mho circle are 100% memorized positive sequence
voltages. This will give a somewhat less dynamic expansion of the mho circle during faults
than a plain cross polarized characteristic. However, if the source impedance is high, the
dynamic expansion of the mho circle might lower the security of the function too much with
high loading and mild power swing conditions.
The mho distance element has a load encroachment function which cuts off a section of the
characteristic when enabled. The function is enabled by setting the setting parameter
LoadEnchMode to On. Enabling of the load encroachment function increases the possibility to
detect high resistive faults without interfering with the load impedance. The algorithm for the
load encroachment is located in the Faulty phase identification with load encroachment for
mho function FMPSPDIS, where also the relevant settings can be found. Information about the
load encroachment from FMPSPDIS to the zone measurement is given in binary format to the
input signal LDCND.
8.4.6.3 Basic operation characteristics SEMOD154224-21 v9
Each impedance zone can be switched On and Off by the setting parameter Operation.
Each zone can be set to Non-directional, Forward or Reverse by setting the parameter
DirMode .
The mho characteristics can be classified into - Offset or Directional. The directional mho
characteristics can be set to Offset, Forward or Reverse by the setting parameter DirMode.
The offset mho characteristic can be set to Forward or Reverse or Non-Directional by the
setting parameter OffsetMhoDir.
The operation for phase-to-earth and phase-to-phase fault can be individually switched On
and Off by the setting parameter OpModePE and OpModePP.

Technical manual
For critical applications such as for lines with high SIRs as well as CVTs, it is possible to
improve the security by setting the parameter ReachMode to Underreach. In this mode the
reach for faults close to the zone reach is reduced by 20% and the filtering is also introduced
to increase the accuracy in the measuring. If the ReachMode is set to Overreach no reduction
of the reach is introduced and no extra filtering introduced. The latter setting is recommended
for overreaching pilot zone, zone 2 or zone 3 elements and reverse zone where overreaching on
transients is not a major issue either because of less likelihood of overreach with higher
settings or the fact that these elements do not initiate tripping unconditionally.
The offset Mho characteristic can be set in Non-directional, Forward or Reverse by the setting
parameter OffsetMhoDir. When Forward or Reverse is selected a directional line is introduced.
Information about the directional line is given from the directional element and given to the
measuring element as binary coded signal to the input DIRCND.
When DirMode is set to offset and offsetMhoDir is set as Non-Directional, ZDMRDIR does not
have any effect on the measurement loop and operation of the function. When DirMode is
selected as Forward or Reverse, a directional line is introduced. Information about the
directional line is given from the directional element (ZDMRDIR) and given to the measuring
element as binary coded signal to the input DIRCND.
The zone reach for phase-to-earth fault and phase-to-phase fault is set individually in polar
coordinates.
The impedance is set by the parameters ZPE and ZPP and the corresponding arguments by the
parameters ZAngPE and ZAngPP.
Compensation for earth -return path for faults involving earth is done by setting the
parameter KN and KNAng where KN is the magnitude of the earth -return path and KNAng is
the argument of the earth-return path.
Z 0 - Z1
KN =
3 × Z1
KNAng = arg
( Z 0 - Z1
3 × Z1
)
where
Z0 is the complex zero sequence impedance of the line in Ω/phase
Z1 is the complex positive sequence impedance of the line in Ω/phase
The phase-to-earth and phase-to-phase measuring loops can be time delayed individually by
setting the parameter tPE and tPP respectively. To release the time delay, the operation mode
for the timers, OpModetPE and OpModetPP, has to be set to On. This is also the case for
instantaneous operation. In instantaneous case, the timers tPE and tPP need to be set as zero.
The operate timers triggering input depends on the parameter ZnTimerSel setting. The
parameter ZnTimerSel can be set to:

Technical manual
• Timers separated: Phase-to-earth and phase-to-phase timers are triggered by the

respective measuring loop start signals.
• Timers linked: Start of any of the phase-to-earth or phase-to-phase loops will trigger both
the phase-to-earth or phase-to-phase timers.
• Internal start: Phase-to-earth and phase-to-phase timers are triggered by the INTRNST
input.
• Start from PhSel: The phase-to-earth and phase-to-phase timers are triggered by the
STCND and LDCND inputs. Each of the two inputs consist binary status information related
to the six measuring loops. Hence if any of the measuring loop status is high in both two
inputs STCND and LDCND, then the timers will be triggered. In case when LoadEnchMode is
off then only STCND enables the timer.
It is not recommended to use this timer setting for the Zone instance
where LoadEnchMode is off.
• External start: Phase-to-earth and phase-to-phase timers are triggered by the EXTNST
input.
The function can be blocked in the following ways:
• activating of input BLOCK blocks the whole function

• activating of the input BLKZ (fuse failure) blocks all output signals
• activating of the input BLKZMTD blocks the delta based time domain algorithm
• activating of the input BLKHSIR blocks the instantaneous part of the algorithm for high
SIR values
• activating of the input BLKTRIP blocks all output signals
• activating the input BLKPE blocks the phase-to-earth fault loop outputs
• activating the input BLKPP blocks the phase-to-phase fault loop outputs
The activation of input signal BLKZ can be made by external fuse failure function or from the
loss of voltage check in the Mho supervision logic (ZSMGAPC). In both cases the output BLKZ
in the Mho supervision logic shall be connected to the input BLKZ in the Mho distance function
block (ZMHPDIS)
The input signal BLKZMTD is activated during some ms after fault has been detected by
ZSMGAPC to avoid unwanted operations due to transients. It shall be connected to the
BLKZMTD output signal of ZSMGAPC function.
At SIR values >10, the use of electronic CVT might cause overreach due to the built-in
resonance circuit in the CVT, which reduce the secondary voltage for a while. The input
BLKHSIR is connected to the output signal HSIR on ZSMGAPC for increasing of the filtering
and high SIR values. This is valid only when permissive underreach scheme is selected by
setting ReachMode=Underreach.
8.4.6.4 Theory of operation SEMOD154224-46 v6
The mho algorithm is based on the phase comparison of an operating phasor and a polarizing
phasor. When the operating phasor leads the reference polarizing phasor by 90 degrees or
more, the function operates and gives a trip output.
Phase-to-phase fault SEMOD154224-240 v2
Mho SEMOD154224-217 v5
The plain Mho circle has the characteristic as in Figure 96. The condition for deriving the angle
β is according to equation 33.

Technical manual
where
U L1L2 is the voltage vector difference between phases L1 and L2

EQUATION1790 V2
EN-US
I L1L2 is the current vector difference between phases L1 and L2

EQUATION1791
EN-US V2
ZPP is the positive sequence impedance setting for phase-to-phase fault

Upol is the polarizing voltage
The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase
L1 to L2 fault). The memorized voltage will prevent collapse of the Mho circle for close in faults.
Operation occurs if 90≤β≤270
IL1L2·X
Ucomp = UL1L2 - IL1L2 • ZPP
IL1L2 • ZPP
ß
Upol
UL1L2
IL1L2·R
en07000109.vsd
Figure 96: Simplified mho characteristic and vector diagram for phase L1-to-L2 fault
Offset Mho SEMOD154224-242 v4

The characteristic for offset mho is a circle where two points on the circle are the setting
parameters ZPP and ZRevPP. The vector ZPP in the impedance plane has the settable angle
AngZPP and the angle for ZRevPP is AngZPP+180°.
The condition for operation at phase-to-phase fault is that the angle β between the two
compensated voltages Ucomp1 and Ucomp2 is greater than or equal to 90° (figure 97). The
angle will be 90° for fault location on the boundary of the circle.
The angle β for L1-to-L2 fault can be defined according to equation 34.

Technical manual
æ U -IL1L2 × ZPPö
b = arg ç ÷
è U-(-IL1L2 × ZRevPP) ø
where
U is the UL1L2 voltage

ZRevPP is the positive sequence impedance setting for phase-to-phase fault in reverse direction
IL1L2jX
Ucomp1 = UL1L2 - IL1L2 • ZPP

IL1L2 • ZPP
U
Ucomp2 = U = IF•ZF=UL1L2
IL1L2R
- IL1L2 • Z RevPP
en07000110.vsd
Figure 97: Simplified offset mho characteristic and voltage vectors for phase L1-to-L2
fault.
Operation occurs if 90≤β≤270.
Offset mho, forward direction SEMOD154224-249 v4

When forward direction has been selected for the offset mho, an extra criteria beside the one
for offset mho (90<β<270) is introduced, that is the angle φ between the voltage and the
current must lie between the blinders in second quadrant and fourth quadrant. See figure 98.
Operation occurs if 90≤β≤270 and ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional
element, ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional
element, ZDMRDIR.
β is calculated according to equation
The directional information is brought to the mho distance measurement from the mho
directional element as binary coded information to the input DIRCND. See Directional

Technical manual
impedance element for mho characteristic (ZDMRDIR) for information about the mho
directional element.
IL1L2jX
ZPP
UL1L2
ArgNegRes f
IL1L2
ArgDir
en07000111.vsd
Figure 98: Simplified offset mho characteristic in forward direction for phase L1-to-L2
fault
Offset mho, reverse direction SEMOD154224-265 v4

The operation area for offset mho in reverse direction is according to figure 99. The operation
area in second quadrant is ArgNegRes+180°.
Operation occurs if 90≤β≤270 and 180° - ArgDir ≤φ ≤ ArgNegRes + 180°
The β is derived according to equation for the mho circle and φ is the angle between the
voltage and current.

Technical manual
ZPP
ArgNegRes
ϕ
IL1L2
ArgDir R
UL1L2
ZRevPP
en06000469.eps
Figure 99: Operation characteristic for reverse phase L1-to-L2 fault
Phase-to-earth fault SEMOD154224-283 v2
Mho SEMOD154224-120 v5
The measuring of earth faults uses earth-return compensation applied in a conventional way.
The compensation voltage is derived by considering the influence from the earth-return path.
For an earth fault in phase L1, the compensation voltage Ucomp can be derived, as shown in
Figure 100.
Ucomp = U pol - I L1 × Z loop

where
Upol is the polarizing voltage (memorized UL1 for Phase L1-to- earth
fault)
Zloop is the loop impedance, which in general terms can be expressed
as
(
Z1+ZN = Z 1 × 1 + KN )
where
Z1 is the positive sequence impedance of the line (Ohm/phase)
KN is the zero-sequence compensator factor
The angle β between the Ucomp and the polarize voltage Upol for a L1-to-earth fault is

Technical manual
(
β = arg U L1 − I L1 + 3I 0 ⋅ KN ⋅ ZPE  − arg (Upol )
  )
GUID-A9492CDF-D3B7-4DC5-8E06-6638BEE2540B V2 EN-US (Equation 36)
where
UL1 is the phase voltage in faulty phase L1
IL1 is the phase current in faulty phase L1
3I0 is the zero-sequence current in faulty phase L1
KN Z0-Z1
3 × Z1
the setting parameter for the zero sequence
compensation consisting of the magnitude KN and the
angle KNAng.
Upol is the 100% of positive sequence memorized voltage UL1
IL1·X
IL1·ZN
Ucomp
IL1 • Zloop
IL1·ZPE
Upol
f
IL1 (Ref) IL1·R
en06000472_2.vsd
Figure 100: Simplified offset mho characteristic and vector diagram for phase L1-to-earth
fault
Offset mho SEMOD154224-309 v5

The characteristic for offset mho at earth fault is a circle containing the two vectors from the
origin ZPE and ZRevPE where ZPE and ZrevPE are the setting reach for the positive sequence
impedance in forward respective reverse direction. The vector ZPE in the impedance plane has
the settable angle AngZPE and the angle for ZRevPP is AngZPE+180°.
The condition for operation at phase-to-earth fault is that the angle β between the two
compensated voltages Ucomp1 and Ucomp2 is greater or equal to 90° see figure 101. The
angle will be 90° for fault location on the boundary of the circle.
The angle β for L1-to-earth fault can be defined as

Technical manual
æ UL1- IL1L × ZPE ö

b = arg ç ÷
è UL1-(- IL1 × Z Re vPE ) ø
is the phase L1 voltage

U L1
805 V1 EN-
EQUATION1
US
IL1L 2 • jX
U comp1 = UL1 - I L1• ZPE

IL1 • ZPE
UL1
U comp2 = UL1 - (-IL1 • ZRevPE)
IL1L2 • R
- I L1 • Z Re vPe
en 06000465.vsd
Figure 101: Simplified offset mho characteristic and voltage vector for phase L1-to-earth
fault
Offset mho, forward direction SEMOD154224-327 v3

In the same way as for phase-to-phase fault, selection of forward direction of offset mho will
introduce an extra criterion for operation. Beside the basic criteria for offset mho according to
equation and 90≤β≤270, also the criteria that the angle φ between the voltage and the current
must lie between the blinders in second and fourth quadrant. See figure 102. Operation occurs
if 90≤β≤270 and ArgDir≤φ≤ArgNegRes.
where
ArgDir is the setting parameter for directional line in fourth quadrant in the directional
element, ZDMRDIR.
ArgNegRes is the setting parameter for directional line in second quadrant in the directional
element, ZDMRDIR.
β is calculated according to equation

Technical manual
IL1 jX
UL1
ArgNegRes f
IL1 IL1·R
ArgDir
en 06000466.vsd
Figure 102: Simplified characteristic for offset mho in forward direction for L1-to-earth
fault
Offset mho, reverse direction SEMOD154224-341 v4

In the same way as for offset in forward direction, the selection of offset mho in reverse
direction will introduce an extra criterion for operation compare to the normal offset mho. The
extra is that the angle between the fault voltage and the fault current shall lie between the
blinders in second and fourth quadrant. The operation area in second quadrant is limited by
the blinder defined as 180° -ArgDir and in fourth quadrant ArgNegRes+180°, see figure 103.
The conditions for operation of offset mho in reverse direction for L1-to-earth fault is
90≤β≤270 and 180°-Argdir≤φ≤ArgNegRes+180°.
The β is derived according to equation for the offset mho circle and φ is the angle between the
voltage and current.

Technical manual
ZPE
ArgNegRes
ϕ
IL
1
ArgDir R
UL1
ZRevPE
en06000470.eps
Figure 103: Simplified characteristic for offset mho in reverse direction for L1-to-earth
fault
8.4.6.5 Simplified logic diagrams GUID-22B4A410-6F8E-4569-A354-51A1F4951F79 v3
Distance protection zones

Phase-to-earth related signals are designated by L1N, L2N and L3N. The phase-to-phase
The ZMHPDIS function block is used in the IED for each zone.
selection with load encroachment function FMPSPDIS within the IED, which are converted
within the zone measuring function into corresponding boolean expressions for each
condition separately. Input signal STCND is connected from FMPSPDIS function output signal
STCNDPHS.
The zone measurement function filters out the relevant signals depending on the setting of

Technical manual
the parameter DirMode. Input signal DIRCND must be configured to the STDIRCND output
signal on ZDMRDIR function.
OffsetMhoDir=
Non-directional
AND AND
DirMode=Offset
STCND T
AND F
AND
LoadEnchMode=
On/Off
LDCND
T
True F
AND Release
DIRCND
OffsetMhoDir=
Forward/Reverse
AND
DirMode=
Forward/Reverse
BLKZ
BLOCK OR
Figure 104: Simplified logic for release start signal

When load encroachment mode is switched on (LoadEnchMode=On), start signal STCND is
also checked against LDCND signal.
Results of the directional measurement enter the logic circuits when the zone operates in
Composition of the phase start signals is presented in figure 105.

Technical manual
Release STPE
OR
AND
STL1N STL1
OR
AND
STL2N
AND
STL3N
STL2
OR
AND
STL1L2
AND
STL2L3
STL3
OR
AND
STL3L1
START
OR
STPP
OR
Figure 105: Composition of starting signals

106.
Timer tPP=On tPP

AND t
STPP
OR
Timer tPE=On tPE
AND t
STPE
15ms
BLKTRIP AND t
TRIP
STL1 AND TRL1
AND TRL2
STL2
STL3 AND TRL3

Zone timer logic for the distance protection is symbolically presented in figure 107.

Technical manual
STPE
BLOCK
TRPE
&
tON
& ³1 t
a
Internal a=b
start b STTIMER
&
Internal
a
a<b
start b
tON
³1 t && TRPP
&
STPP
ZnTimerSel
FALSE 1 timers seperated
³1 2 timers linked
internalCommonStart
3 internal start
phSelStart 4 start from phSel
externalCommonStart
5 external start
Figure 107: Zone timer logic
SEMOD173242-2 v14
Table 133: ZMHPDIS technical data

Number of zones, Ph-E Max 5 with selectable -
direction
Minimum operate current (10–30)% of IBase -
Positive sequence impedance, (0.005–3000.000) W/phase ±2.0% static accuracy
Ph-E loop Conditions:
Voltage range: (0.1-1.1) x Ur
Positive sequence impedance (10–90) degrees
angle, Ph-E loop
Angle: 85 degrees
Reverse reach, Ph-E loop (0.005–3000.000) Ω/phase
(Magnitude)
Magnitude of earth return (0.00–3.00)
compensation factor KN
Angle for earth compensation (-180–180) degrees
factor KN
measured with CVT’s and
0.5<SIR<30
Ph-E operation
Reset time at 0.5 x Zreach to Min. = 30 ms -
1.5 x Zreach Max. = 50 ms

Technical manual
8.5 Full-scheme distance protection, quadrilateral for

earth faults ZMMPDIS, ZMMAPDIS SEMOD154561-1 v2
SEMOD154542-2 v2

Fullscheme distance protection, ZMMPDIS 21
quadrilateral for earth faults (zone 1)
Z
S00346 V2 EN-US
Fullscheme distance protection, ZMMAPDIS 21

quadrilateral for earth faults (zone
2-5) Z
S00346 V2 EN-US
protection function with three fault loops for phase-to-earth fault for each of the independent
zones. Individual settings for each zone resistive and reactive reach give flexibility for use on
overhead lines and cables of different types and lengths.
The Full-scheme distance protection, quadrilateral for earth fault functions have functionality
for load encroachment, which increases the possibility to detect high resistive faults on heavily
loaded lines , see Figure 108.
Forward
operation
Reverse
operation
en05000034.vsd
Figure 108: Typical quadrilateral distance protection zone with Phase selection,
quadrilateral characteristic with settable angle function FRPSPDIS activated
reliable built in phase selection makes the function suitable in applications with single phase
auto-reclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone1 at load

exporting end at phase to earth faults on heavily loaded power lines.

Technical manual
ZMMPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 109: ZMMPDIS function block
ZMMAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 110: ZMMAPDIS function block
8.5.4 Signals
Table 134: ZMMPDIS Input signals

SIGNAL
SIGNAL
BLKZ BOOLEAN 0 Blocks all output by fuse failure signal
Table 135: ZMMPDIS Output signals


Technical manual

Table 136: ZMMAPDIS Input signals

SIGNAL
SIGNAL
Table 137: ZMMAPDIS Output signals

8.5.5 Settings
Table 138: ZMMPDIS Group settings (basic)

On
Reverse

Technical manual

Ph-E
On timer, Ph-E
Phase-Earth loops
Phase-Earth loops
Table 139: ZMMPDIS Non group settings (basic)

Value groups
Table 140: ZMMAPDIS Group settings (basic)

On
Reverse
Ph-E
On timer, Ph-E
Phase-Earth loops
Table 141: ZMMAPDIS Non group settings (basic)

Value groups

Technical manual
The different fault loops within the IED are operating in parallel in the same principle as a full
scheme measurement.
Figure 111 presents an outline of the different measuring loops for the basic five, impedance-
measuring zones l.
L1-N L2-N L3-N Zone 1
en07000080.vsd
Figure 111: The different measuring loops at line-earth fault and phase-phase fault.
The distance measuring zone include three impedance measuring loops; one fault loop for
each phase.
impedance characteristics presented in Figure 112. The characteristic is illustrated with the full
loop reach.

Technical manual
X (Ohm/loop)
R1PE+Rn
RFPE RFPE
X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)
RFPE RFPE
X1PE+Xn
RFPE RFPE
en08000280-2-en.vsd
R1PE+Rn
Figure 112: Characteristic for the phase-to-earth measuring loops, ohm/loop domain.
The fault loop reach may also be presented as in Figure 113.
ILn R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 ) en06000412.vsd

The R1 and jX1 in Figure 113 represent the positive sequence impedance from the measuring
point to the fault location. The RFPE is presented in order to “convey” the fault resistance
reach.
The zone may be set to operate in Non-directional, Forward, Off or Reverse direction through
the setting OperationDir. The result from respective set value is illustrated in Figure 114. The
impedance reach is symmetric, in the sense that it is conform for forward and reverse
direction. Therefore, all reach settings apply to both directions.

Technical manual
X X X
R R R
Figure 114: Directional operating modes of the distance measuring zone
8.5.6.3 Minimum operating current SEMOD154546-36 v2
The operation of the distance measuring zone is blocked if the magnitude of input currents fall
below certain threshold values.
three phase currents, that is, residual current 3I0.
Both current limits IMinOpPE and IMinOpIN are automatically reduced to 75%
of regular set values if the zone is set to operate in reverse direction, that is,
OperationDir=Reverse.
8.5.6.4 Measuring principles SEMOD154546-46 v3
Apparent impedances are calculated and compared with the set limits.
Ln (n = 1, 2, 3).
The calculation of the apparant impedances at phase-to-earth fault follow equation 38
The earth return compensation applies in a conventional manner.

Technical manual
U L1
Z app =
I L1 + I N × KN
Where:
UL1, IL1 and IN are the phase voltage, phase current and residual current present to the IED
KN is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
X.
The formula given in equation 38 is only valid for no loaded radial feeder applications. When
might overreach at exporting end and underreach at importing end. IED has an adaptive load
compensation which increases the security in such applications.
X Di
U = R × i + ------ × -----
w 0 Dt

Technical manual
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitute it in the equation for the imaginary part. The equation for the Xm
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )
8.5.6.5 Directionality SEMOD154546-97 v3
The evaluation of the directionality takes place in the Directional impedance element for mho
characteristic ZDMRDIR function. Equation 45 is used to classify that the fault is in forward
direction for line-to-earth fault.

Technical manual
0.85 × U1L1 + 0.15 × U1L1M

I L1
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to 15
(= -15 degrees) and
U1L1 is positive sequence phase voltage in phase L1
U1L1M is positive sequence memorized phase voltage in phase L1
IL1 is phase current in phase L1
(see figure 115) and it should not be changed unless system studies have shown the necessity.
ZDMRDIR gives a binary coded signal on the output STDIRCND depending on the evaluation
where STFWL1N=1 adds 1, STRVL1N=1 adds 2, STFWL2N=1 adds 4 etc.
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 115: Setting angles for discrimination of forward and reverse fault
degrees.
The polarizing voltage is available as long as the positive-sequence voltage exceeds 5% of the

Technical manual
After 100 ms, the following occurs:
8.5.6.6 Simplified logic diagrams SEMOD154548-4 v1
Distance protection zones SEMOD154548-6 v3

The design of distance protection zone 1 is presented for all measuring phase-to-earth loops.
Phase-to-earth related signals are designated by LnE, where n represents the corresponding
phase number (L1E, L2E, and L3E).
The STCND input signal represents a connection of six different integer values from the phase
selection function within the IED, which are converted within the zone measuring function into
corresponding boolean expressions for each condition separately. It is connected to the Phase
selection with load enchroachment, quadrilateral characteristic (FDPSPDIS) function output
STCNDZ.
The zone measurement function filter out the relevant signals on the DIRCND input depending
on the setting of the parameter OperationDir. It shall be configured to the DIRCND output on
the Directional impedance element for mho characteristic (ZDMRDIR) function.

Technical manual
STCND
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STNDPE
OR
BLKZ STND
OR AND
BLOCK
BLK
en06000408-2.vsd
Figure 116: Conditioning by a group functional input signal STCND

Composition of the phase starting signals for a case, when the zone operates in a non-
directional mode, is presented in figure 117.
STNDL1N 15 ms
AND t STL1
STNDL2N 15 ms
AND t STL2
STNDL3N 15 ms
AND t STL3
15 ms
AND t START
OR
BLK
en06000409.vsd

directional (forward or reverse) mode, see figure 118.

Technical manual
STNDL1N
DIRL1N AND
OR STZMPE.
&
STNDL2N
DIRL2N AND
STNDL3N 15 ms
STL1
& t
DIRL3N AND
15 ms
STL2
& t
15 ms
STL3
& t
BLK
15 ms
OR START
& t
en07000081.vsd
Figure 118: Composition of starting signals in directional operating mode

119.
Timer tPE=On tPE

AND t
STZMPE
15ms
BLKTR AND t
TRIP
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3
en07000082.vsd
Figure 119: Tripping logic for the distance protection zone one

Technical manual

SEMOD173249-2 v8
Table 142: ZMMPDIS technical data

direction
Minimum operate current (10-30)% of IBase -
Positive sequence reactance (0.50-3000.00) W/phase ±2.0% static accuracy
Zero sequence resistance (0.50-3000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Fault resistance, Ph-E (1.00-9000.00) W/loop
Dynamic overreach <5% at 85 degrees measured -
with CCVT’s and 0.5<SIR<30
Ph-E operation
8.6 Directional impedance element for mho characteristic

and additional distance protection directional function
for earth faults ZDMRDIR, ZDARDIR SEMOD154813-1 v3
SEMOD155886-2 v2

Directional impedance element for ZDMRDIR 21D
mho characteristic
Z
S00346 V2 EN-US
GUID-39299546-12A2-4D9D-86D0-A33F423944E4 v2

Additional distance protection ZDARDIR -
directional function for earth faults
Z
S00346 V2 EN-US

Technical manual
The phase-to-earth impedance elements can be supervised by a phase unselective directional

function based on symmetrical components (option).
ZDMRDIR
I3P* DIR_CURR
U3P* DIR_VOLT
DIR_POL
STFW
STRV
STDIRCND
Figure 120: ZDMRDIR function block

SEMOD155560-4 v3
ZDARDIR
I3P* STFWPE
U3P* STRVPE
I3PPOL* DIREFCND
DIRCND
Figure 121: ZDARDIR function block
8.6.4 Signals
Table 143: ZDMRDIR Input signals

SIGNAL
SIGNAL
Table 144: ZDMRDIR Output signals

CURR GROUP SIGNAL Group signal for current signals to Mho function
VOLT GROUP SIGNAL Group signal for voltage signals to Mho function
POL GROUP SIGNAL Group signal for polarization voltage signals to Mho function
STFW BOOLEAN Start in forward direction
STRV BOOLEAN Start in reverse direction

Technical manual
Table 145: ZDARDIR Input signals

I3P GROUP - Current signals
SIGNAL
U3P GROUP - Voltage signals
SIGNAL
I3PPOL GROUP - Polarisation current signals
SIGNAL
DIRCND INTEGER 0 Binary coded directional signal
Table 146: ZDARDIR Output signals

STFWPE BOOLEAN Forward start signal from phase-to-ground directional
element
STRVPE BOOLEAN Reverse start signal from phase-to-ground directional
element
DIREFCND INTEGER Start direction Binary coded
8.6.5 Settings
Table 147: ZDMRDIR Group settings (basic)

DirEvalType Impedance - - Comparator Directional evaluation mode
Comparator Impedance / Comparator
Imp/Comp
forward direction
Phase-Earth loops
Table 148: ZDMRDIR Non group settings (basic)

Value groups

Technical manual
Table 149: ZDARDIR Group settings (basic)

PolMode -3U0 - - -3U0 Polarization quantity for opt dir
-U2 function for P-E faults
IPol
Dual
-3U0Comp
-U2comp
AngleRCA -90 - 90 Deg 1 75 Characteristic relay angle (= MTA or
base angle)
I> 5 - 200 %IB 1 5 Minimum operation current in % of
IBase
UPol> 4 - 100 %UB 1 4 Minimum polarizing voltage in % of
UBase
IPol> 5 - 100 %IB 1 10 Minimum polarizing current in % of
IBase
Table 150: ZDARDIR Group settings (advanced)

AngleOp 90 - 180 Deg 1 160 Operation sector angle
Kmag 0.50 - 3000.00 Ohm 0.01 40.00 Boost-factor in -U0comp and -
U2comp polarization
Table 151: ZDARDIR Non group settings (basic)

Value groups

Table 152: ZDMRDIR Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction

Technical manual
8.6.7.1 Directional impedance element for mho characteristic ZDMRDIR SEMOD154817-5 v7
The evaluation of the directionality takes place in Directional impedance element for mho
characteristic (ZDMRDIR). Equation 46 and equation 47 are used to classify that the fault is in
the forward direction for phase-to-earth fault and phase-to-phase fault respectively.
0.85 × U1L1 + 0.15 × U1L1M

I L1
0.85 × U1L1L 2 + 0.15 × U1L1L 2 M

I L1L 2
Where:
ArgDir Setting for the lower boundary of the forward directional characteristic, by
default set to 15 (= -15 degrees)
ArgNegRes Setting for the upper boundary of the forward directional characteristic, by
default set to 115 degrees, see figure 122 for mho characteristics.
U1L1 Positive sequence phase voltage in phase L1
U1L1M Positive sequence memorized phase voltage in phase L1
IL1 Phase current in phase L1
U1L1L2 Voltage difference between phase L1 and L2 (L2 lagging L1)
U1L1L2M Memorized voltage difference between phase L1 and L2 (L2 lagging L1)
IL1L2 Current difference between phase L1 and L2 (L2 lagging L1)
The default settings for ArgDir and ArgNegRes are 15 (= -15) and 115 degrees respectively (see
figure 122) and they should not be changed unless system studies show the necessity.
If one sets DirEvalType to Comparator (which is recommended when using the mho
characteristic) then the directional lines are computed by means of a comparator-type
calculation, meaning that the directional lines are based on mho-circles (of infinite radius). The
default setting value Impedance otherwise means that the directional lines are implemented
based on an impedance calculation equivalent to the one used for the quadrilateral impedance
characteristics.
When Directional impedance element for mho characteristic (ZDMRDIR) is used

together with Fullscheme distance protection, mho characteristic (ZMHPDIS)
the following settings for parameter DirEvalType is vital:
• alternative Comparator is strongly recommended

• alternative Imp/Comp should generally not be used
• alternative Impedanceshould not be used. This altenative is intended for
use together with Distance protection zone, quadrilateral characteristic
(ZMQPDIS)

Technical manual
X
Zset reach point
ArgNegRes
-ArgDir R
-Zs
en06000416.vsd
Figure 122: Setting angles for discrimination of forward fault

degrees.
The code built up for release of the measuring fault loops is as follows: STDIRCND = L1N*1 +
L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
Example: If only L1Nstart, the value is 1, if start in L1N and L3N are detected, the value is 1+4=5.
set base voltage UBase, thus the directional element can use it for all unsymmetrical faults
The memory voltage is used for 100ms or until the positive sequence voltage is restored. After
100ms, the following occurs:
• If the current is still above the set value of the minimum operating current the condition
seals in.
• If the fault has caused tripping, the trip continues.
• If the current decreases below the minimum operate value, no directional indications will
be given until the positive sequence voltage exceeds 10% of its rated value.
The Directional impedance element for mho characteristic (ZDMRDIR) function has the
following output signals:
The STDIRCND output provides an integer signal that depends on the evaluation and is derived
from a binary coded signal as follows:

Technical manual
bit 11 bit 10 bit 9 bit 8 bit 7 bit 6

(2048) (1024) (512) (256) (128) (64)
STRVL3L1=1 STRVL2L3=1 STRVL1L2=1 STRVL3N=1 STRVL2N=1 STRVL1N=1
bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
(32) (16) (8) (4) (2) (1)
STFWL3L1= STFWL2L3= STFWL1L2= STFWL3N=1 STFWL2N=1 STFWL1N=1
1 1 1
The STFW output is a logical signal with value 1 or 0. It is made up as an OR-function of all the
forward starting conditions, that is, STFWL1N, STFWL2N, STFWL3N, STFWL1L2, STFWL2L3 and
STFWL3L1. The STRV output is similar to the STFW output, the only difference being that it is
made up as an OR-function of all the reverse starting conditions, that is, STRVL1N, STRVL2N,
STRVL3N, STRVL1L2, STRVL2L3 and STRVL3L1.
8.6.7.2 Additional distance protection directional function for earth faults

ZDARDIR SEMOD154933-95 v5
A Mho element needs a polarizing voltage to operate. The positive-sequence memory-

polarized elements are generally preferred. The benefits include:
• The greatest amount of expansion for improved resistive coverage. These elements
always expand back to the source.
• Memory action for all fault types. This is very important for close-in three-phase faults.
• A common polarizing reference for all six distance-measuring loops. This is important for
single-pole tripping, during a pole-open period.
There are however some situations that can cause security problems like reverse phase to
phase faults and double phase-to-earth faults during high load periods. To solve these,
additional directional element is used.
For phase-to-earth faults, directional elements using sequence components are very reliable
for directional discrimination. The directional element can be based on one of following types
of polarization:
• Zero-sequence voltage
• Negative-sequence voltage
• Zero-sequence current
These additional directional criteria are evaluated in the Additional distance protection
directional function for earth faults (ZDARDIR).
Zero-sequence voltage polarization is utilizing the phase relation between the zero-sequence
voltage and the zero-sequence current at the location of the protection. The measurement
principle is illustrated in figure 123.

Technical manual
- 3U 0
AngleOp
AngleRCA
3I 0
en06000417.vsd
Figure 123: Principle for zero-sequence voltage polarized additional directional element
Negative-sequence voltage polarization is utilizing the phase relation between the negative-
sequence voltage and the negative-sequence current at the location of the protection.
Zero-sequence current polarization is utilizing the phase relation between the zero-sequence
current at the location of the protection and some reference zero-sequence current, for
example, the current in the neutral of a power transformer.
The principle of zero-sequence voltage polarization with zero-sequence current compensation

is described in figure 124. The same also applies for the negative-sequence function.
Z0 SA I0 I0
Z0 Line Z0 SB
Charac te ris tic
ang le
U0 U0
K*I0
U0 + K*I0
IF
en06000418.vsd
Figure 124: Principle for zero sequence compensation

Note that the sequence based additional directional element cannot give per phase
information about direction to fault. This is why it is an AND-function with the normal
directional element that works on a per phase base. The enable signals are per phase and to
enable the measuring element in a specific phase, both the additional directional element and
the normal directional element, for that phase must indicate correct direction.
These polarization quantities, voltage and current, are stabilized against minimum polarizing
voltage (UPOL>) and current (IPOL>). That means if polarizing voltage is greater than UPOL>
setting, and if polarizing current is greater than IPol>, then only they are used for direction
determination.

Technical manual
Normal
directional Release of distance
element measuring element
L1N, L2N, L3N L1N, L2N, L3N
AND
Additional
directional AND per
element phase
en06000419.vsd
Figure 125: Earth distance element directional supervision
8.7 Mho impedance supervision logic ZSMGAPC SEMOD153841-1 v3
GUID-030C086A-8301-481E-BA0A-6550A9C1482E v2

Mho Impedance supervision logic ZSMGAPC - -
The Mho impedance supervision logic (ZSMGAPC) includes features for fault inception
detection and high SIR detection. It also includes the functionality for loss of potential logic as
well as for the pilot channel blocking scheme.
ZSMGAPC can mainly be decomposed in two different parts:
1. A fault inception detection logic

2. High SIR detection logic
ZSMGAPC
I3P* BLKZMTD
U3P* BLKCHST
BLOCK CHSTOP
REVSTART HSIR
BLOCKCS
CBOPEN
Figure 126: ZSMGAPC function block

Technical manual
8.7.4 Signals
Table 153: ZSMGAPC Input signals

I3P GROUP - Three phase current samples and DFT magnitude
SIGNAL
U3P GROUP - Three phase phase-neutral voltage samples and DFT
SIGNAL magnitude
BLOCK BOOLEAN 0 Block of the function
REVSTART BOOLEAN 0 Indication of reverse start
BLOCKCS BOOLEAN 0 Blocks the blocking carrier signal to remote end
CBOPEN BOOLEAN 0 Indicates that the breaker is open
Table 154: ZSMGAPC Output signals

BLKZMTD BOOLEAN Block signal for blocking of time domained mho
BLKCHST BOOLEAN Blocking signal to remote end to block overreaching zone
CHSTOP BOOLEAN Stops the blocking signal to remote end
HSIR BOOLEAN Indication of source impedance ratio above set limit
8.7.5 Settings
Table 155: ZSMGAPC Group settings (basic)

PilotMode Off - - Off Pilot mode Off/On
On
Zreach 0.1 - 3000.0 Ohm 0.1 38.0 Line impedance
IMinOp 10 - 30 %IB 1 20 Minimum operating current for SIR
measurement
Table 156: ZSMGAPC Group settings (advanced)

DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for
fault inception detection
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of
IBase
DeltaU 0 - 100 %UB 1 5 Voltage change level in % of UBase for
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of
UBase
SIRLevel 5 - 15 - 1 10 Settable level for source impedance
ratio

Technical manual
Table 157: ZSMGAPC Non group settings (basic)

Value groups
8.7.6.1 Fault inception detection SEMOD153847-4 v5
The aim for the fault inception detector is to quickly detect that a fault has occurred in the
system. The fault detector detects a fault when there is a sufficient change in at least one
current and at the same time there is a sufficient change in at least one voltage. A change is
defined roughly by the difference between the present instantaneous value and the one from
one power system cycle before. The change is sufficient if it exceeds the related threshold
value. DeltaI and DeltaU for phase currents and voltages. Delta3I0 and Delta3U0 for residual
current and voltage.
If the setting PilotMode is set to On in blocking scheme and the fault inception function has
detected a system fault, a block signal BLKCHST is issued and send to remote end in order to
block the overreaching zones. Different criteria has to be fulfilled for sending the BLKCHST
signal:
1. The setting PilotMode has to be set to On

2. The breaker has to be closed, that is, the input signal CBOPEN should not be actived
3. A reverse fault should have been detected while the carrier send signal is not blocked, that
is, input signal REVSTART is activated and input signal BLOCKCS is not activated or a fault
inception is detected and input signal CSBLOCK is not activated.
If it is later detected that it was an internal fault that made the function issue the BLKCHST
signal, the function issues a CHSTOP signal to unblock the remote end. The criteria that have to
be fulfilled for this are:
1. The function has to be in pilot mode, that is, the setting PilotMode has to be set to On
2. The carrier send signal should be blocked, that is, input signal BLOCKCS is On and,
3. A reverse fault should not have been detected while the carrier send signal was not
blocked, that is, input REVSTART should not have been activated before BLOCKCS.
If loss of voltage is detected, but not a fault inception, the distance protection function is
blocked. This is also the case if a fuse failure is detected by the external fuse failure function
and activate the input FUSEFAIL. Those blocks are generated by activating the output BLKZ,
which are connected to the input BLKZ on the distance Mho function block.
During fault inception a lot of transients are developed which in turn might cause the distance
function to overreach. The Mho supervision logic (ZSMGAPC) increases the filtering during the
most transient period of the fault. This is done by activating the output BLKZMTD, which is
connected to the input BLKZMTD on mho distance function block.
High SIR detection SEMOD153847-22 v3

High SIR values increases the likelihood that CVT will introduce a prolonged and distorted
transient, increasing the risk for overreach of the distance function.
The SIR function calculates the SIR value as the source impedance divided by the setting
Zreach and activates the output signal HSIR if the calculated value for any of the six basic
shunt faults exceed the setting SIRLevel. The HSIR signal is intended to block the delta based
mho impedance function.

Technical manual
8.8 Faulty phase identification with load encroachment

FMPSPDIS SEMOD153819-1 v5
SEMOD155879-2 v3

Faulty phase identification with load FMPSPDIS 21
encroachment for mho
Z
S00346 V2 EN-US
The ability to accurately and reliably classify different types of fault so that single phase
tripping and autoreclosing can be used plays an important roll in today's power systems.
The phase selection function is design to accurately select the proper fault loop(s) in the
distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may in some cases
interfere with the distance protection zone reach and cause unwanted operation. Therefore
the function has a built in algorithm for load encroachment, which gives the possibility to
enlarge the resistive setting of the measuring zones without interfering with the load.
The output signals from the phase selection function produce important information about
faulty phase(s), which can be used for fault analysis as well.
FMPSPDIS
I3P* STL1
U3P* STL2
BLOCK STL3
ZSTART STPE
TR3PH STCNDPHS
1POLEAR STCNDPLE
STCNDLE
START
Figure 127: FMPSPDIS function block
8.8.4 Signals
Table 158: FMPSPDIS Input signals

I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL

Technical manual

ZSTART BOOLEAN 0 Start from underimpdeance function
TR3PH BOOLEAN 0 Three phase tripping initiated
1POLEAR BOOLEAN 0 Single pole autoreclosing in progress
Table 159: FMPSPDIS Output signals

STL1 BOOLEAN Fault detected in phase L1
STPE BOOLEAN Earth fault detected
STCNDPHS INTEGER Binary coded starts from phase selection
STCNDPLE INTEGER Binary coded starts from ph sel with load encroachment
STCNDLE INTEGER Binary coded starts from load encroachment only
START BOOLEAN Indicates that something has started
8.8.5 Settings
Table 160: FMPSPDIS Group settings (basic)

IMaxLoad 10 - 5000 %IB 1 200 Maximum load for identification of
three phase fault in % of IBase
RLd 1.00 - 3000.00 Ohm/p 0.01 80.00 Load encroachment resistive reach in
ohm/phase
ArgLd 5 - 70 Deg 1 20 Load encroachment inclination of load
angular sector
Table 161: FMPSPDIS Group settings (advanced)

DeltaIMinOp 5 - 100 %IB 1 10 Delta current level in % of IBase
DeltaUMinOp 5 - 100 %UB 1 20 Delta voltage level in % of UBase
U1Level 5 - 100 %UB 1 80 Pos seq voltage limit for identification
of 3-ph fault
I1LowLevel 5 - 200 %IB 1 10 Pos seq current level for identification
of 3-ph fault in % of IBase
U1MinOp 5 - 100 %UB 1 20 Minimum operate positive sequence
voltage for ph sel
U2MinOp 1 - 100 %UB 1 5 Minimum operate negative sequence
voltage for ph sel
INRelPE 10 - 100 %IB 1 20 3I0 limit for release ph-e measuring
loops in % of max phase current
INBlockPP 10 - 100 %IB 1 40 3I0 limit for blocking phase-to-phase
measuring loops in % of max phase
current

Technical manual
Table 162: FMPSPDIS Non group settings (basic)

Value groups
8.8.6.1 The phase selection function SEMOD153832-4 v3
Faulty phase identification with load encroachment for mho (FMPSPDIS) function can be
decomposed into six different parts:
1. A high speed delta based current phase selector

2. A high speed delta based voltage phase selector
3. A symmetrical components based phase selector
4. Fault evaluation and selection logic
5. A load encroachment logic
6. A blinder logic
The total function can be blocked by activating the input BLOCK.
Delta based current and voltages SEMOD153832-14 v5

The delta based fault detection function uses adaptive technique and is based on patent
US4409636.
The aim of the delta based phase selector is to provide very fast and reliable phase selection
for releasing of tripping from the high speed Mho measuring element and is essential to
Directional Comparison Blocking scheme (DCB), which uses Power Line Carrier (PLC)
communication system along the protected line.
The current and voltage samples for each phase passes through a notch filter that filters out
the fundamental components. Under steady state load conditions or when no fault is present,
the output of the filter is zero or close to zero. When a fault occurs, currents and voltages
change resulting in sudden changes in the currents and voltages resulting in non-fundamental
waveforms being introduced on the line. At this point the notch filter produces significant
non-zero output. The filter output is processed by the delta function. The algorithm uses an
adaptive relationship between phases to determine if a fault has occurred, and determines the
faulty phases.
The current and voltage delta based phase selector gives a real output signal if the following
criterion is fulfilled (only phase L1 shown):
Max(ΔUL1,ΔUL2,ΔUL3)>DeltaUMinOp
Max(ΔIL1,ΔIL2,ΔIL3)>DeltaIMinOp
where:
ΔUL1, ΔUL2 and ΔUL3 are the voltage change between sample t and sample t-1
DeltaUMinOp and are the minimum harmonic level settings for the voltage and
DeltaIMinOp current filters to decide that a fault has occurred. A slow evolving
fault may not produce sufficient harmonics to detect the fault;
however, in such a case speed is no longer the issue and the
sequence components phase selector will operate.

Technical manual
The delta voltages ΔULn and delta current ΔILn (n index for phase order) are the voltage and
current between sample t and sample t-1.
The delta phase selector employs adaptive techniques to determine the fault type. The logic
determines the fault type by summing up all phase values and dividing by the largest value.
Both voltages and currents are filtered out and evaluated. The condition for fault type
classification for the voltages and currents can be expressed as:
FaulType =
∑ ( ∆UL1, ∆UL2, ∆UL3)
MAX ( ∆UL1, ∆UL 2, ∆UL3)
FaulType =
∑ ( ∆IL1, ∆IL2, ∆IL3)
MAX ( ∆IL1, ∆IL 2, ∆IL3)
The value of FaultType for different shunt faults are as follows:
Under ideal conditions: (Patent pending)

Single phase-to-earth; FaultType=1
Phase-to-phase fault FaultType=2
Three-phase fault; FaultType=3
The output signal is 1 for single phase-to-earth fault, 2 for phase-to-phase fault and 3 for
three-phase fault. At this point the filter does not know if earth was involved or not.
Typically there are induced harmonics in the non-faulted lines that will affect the result. This
method allows for a significant tolerance in the evaluation of FaultType over its entire range.
When a single phase-to-earth fault has been detected, the logic determines the largest
quantity, and asserts that phase. If phase-to-phase fault is detected, the two largest phase
quantities will be detected and asserted as outputs.
The faults detected by the delta based phase selector are coordinated in a separate block.
Different phases of faults may be detected at slightly different times due to differences in the
angles of incidence of fault on the wave shape. Therefore the output is forced to wait a certain
time by means of a timer. If the timer expires, and a fault is detected in one phase only, the
fault is deemed as phase-to-earth. This way a premature single phase-to-earth fault detection
is not released for a phase-to-phase fault. If, however, earth current is detected before the
timer expires, the phase-to-earth fault is released sooner.
If another phase picks up during the time delay, the wait time is reduced by a certain amount.
Each detection of either phase-to-earth or additional phases further reduce the initial time
delay and allow the delta phase selector output to be faster. There is no time delay if all three
phases are faulty.
The delta function is released if the input DELTAREL is activated at the same time as input
DELTABLK is not activated. Activating the DELTABLK input blocks the delta function. The
release signal has an internal pulse timer of 100 ms. When the DELTAREL signal has
disappeared the delta logic is reset. In order not to get too abrupt change, the reset is decayed
in pre-defined steps.

Technical manual
Symmetrical component based phase selector SEMOD153832-58 v3

The symmetrical component phase selector uses preprocessed calculated sequence voltages
and currents as inputs. It also uses sampled values of the phase currents. All the symmetrical
quantities mentioned further in this section are with reference to phase L1.
The function is made up of four main parts:
A Detection of the presence of earth fault

B A phase-to-phase logic block based on U1/U2 angle relationship
C A phase-to-earth component based on patent US5390067 where the angle relationships

between U2/I0 and U2/U1 is evaluated to determine earth fault or phase- to-phase to earth
fault
D Logic for detection of three-phase fault
Presence of earth-fault detection SEMOD153832-70 v8

This detection of earth fault is performed in two levels, first by evaluation of the magnitude of
zero sequence current, and secondly by the evaluation of the zero and negative sequence
voltage. It is a complement to the earth-fault signal built-in in the Symmetrical component
based phase selector.
The complementary based zero-sequence current function evaluates the presence of earth
fault by calculating the 3I0 and comparing the result with the setting parameter INRelPE. The
output signal is used to release the earth-fault loop. It is a complement to the earth-fault
signal built-in in the sequence based phase selector. The condition for releasing the phase-to-
earth loop is as follows:
The output from this detection is used to release the earth-fault loop.
|3I0|>maxIph × INRelPE
where:
|3I0| is the magnitude of the zero sequence current 3I0
maxIph is the maximum magnitude of the phase currents

INRelPE is a setting parameter for the relation between the magnitude of 3I0 and the
maximum phase current
The earth-fault loop is also released if the evaluation of the zero sequence current by the main
sequence function meets the following conditions:
|3I0|>IBase × 0.5
|3I0|>maxIph ×INRelPE
where:
maxIph is the maximal current magnitude found in any of the three phases
INRelPE is the setting of 3I0 limit for release of phase-to-earth measuring loop in % of
IBase
IBase is the global setting of the base current (A)
In systems where the source impedance for zero sequence is high the change of zero sequence
current may not be significant and the above detection may fail. In those cases the detection

Technical manual
enters the second level, with evaluation of zero and negative sequence voltage. The release of
the earth-fault loops can then be achieved if all of the following conditions are fulfilled:
|3U0|>|U2| × 0.5
|3U0|>|U1| × 0.2
|U1|> UBase × 0.2/√(3)
and
3I0<0.1 × IBase
or
3I0<maxIph × INRelPE
where:
3U0 is the magnitude of the zero sequence voltage
U2 is the magnitude of the negative sequence voltage at the relay measuring point
k5 is design parameter
ILmax is the maximal phase current
IMinOp is the setting of minimum operate phase current in % of IBase
Phase-to-phase fault detection SEMOD153832-119 v2

The detection of phase-to-phase fault is performed by evaluation of the angle difference
between the sequence voltages U2 and U1.
Figure 128: Definition of fault sectors for phase-to-phase fault

The phase-to-phase loop for the faulty phases will be determined if the angle between the
sequence voltages U2 and U1 lies within the sector defined according to figure 128 and the
following conditions are fulfilled:
|U1|>U1MinOP
|U2|>U2MinOp
where:
U1MinOP and are the setting parameters for positive sequence and negative
U2MinOp sequence minimum operate voltages

Technical manual
The positive sequence voltage U1L1 in figure 128 above is reference.
If there is a three-phase fault, there will not be any release of the individual phase signals, even
if the general conditions for U2 and U1 are fulfilled.
Phase-to-earth and phase-to-phase-to-earth-fault detection SEMOD153832-135 v5

The detection of phase-to-earth and phase-to-phase-to-earth fault (US patent 5390067) is
based on two conditions:
1. Angle relationship between U2 and I0
2. Angle relationship between U2 and U1
The condition 1 determines faulty phase at single phase-to-earth fault by evaluating the
argument between U2 and I0.
80°
L2-E sector L3-E sector

U2L1
(Ref)
200°
L1-E sector
320°
Figure 129: Condition 1: Definition of faulty phase sector as angle between U2 and I0
The angle is calculated in a directional function block and gives the angle in radians as input to
the U2 and I0 function block. The input angle is released only if the fault is in forward direction.
This is done by the directional element. The fault is classified as forward direction if the angle
between U0 and I0 lies between 20 to 200 degrees, see figure 130.
Forward 20°
200° Reverse
en06000385.vsd
Figure 130: Directional element used to release the measured angle between Uo and I0

Technical manual
The input radians are summarized with an offset angle and the result evaluated. If the angle is
within the boundaries for a specific sector, the phase indication for that sector will be active
see figure 129. Only one sector signal is allowed to be activated at the same time.
The sector function for condition 1 has an internal release signal which is active if the main
sequence function has classified the angle between U0 and I0 as valid. The following conditions
must be fulfilled for activating the release signals:
|U2|>U2MinOp
|3I0|> 0.05 · IBase
|3I0|>maxIph · INRelPE
where:
U2 and IN are the magnitude of the negative sequence voltage and zero-
sequence current (3I0)
U2MinOp is the setting parameter for minimum operating negative

sequence voltage
maxIph is the maximum phase current
INRelPE is the setting parameter for 3I0 limit for releasing phase-to-earth
loop
The angle difference is phase shifted by 180 degrees if the fault is in reverse direction.
The condition 2 looks at the angle relationship between the negative sequence voltage U2 and
the positive sequence voltage U1. Since this is a phase-to-phase voltage relationship, there is
no need for shifting phases if the fault is in reverse direction. A phase shift is introduced so
that the fault sectors will have the same angle boarders as for condition 1. If the calculated
angle between U2 and U1 lies within one sector, the corresponding phase for that sector will be
activated. The condition 2 is released if both the following conditions are fulfilled:
|U2|>U2MinOp
|U1|>U1MinOP
where:
|U1| and |U2| are the magnitude of the positive and negative sequence voltages.
U1MinOP and U2MinOp are the setting parameters for positive sequence and negative sequence
minimum operating voltages.

Technical manual
140°
L3-E sector
20°
U1L1
(Ref)
L1-E sector
L2-E sector
260° IEC06000413_2_en.vsd
Figure 131: Condition 2: U2 and U1 angle relationship

If both conditions are true and there is sector match, the fault is deemed as single phase-to-
earth. If the sectors, however, do not match the fault is determined to be the complement of
the second condition, that is, a phase-to-phase-to- earth fault.
Condition 1 and Condition 2 ⇒ Fault type

L3-E L3-E L3-E
L2-E L1-E L2-L3-E
The sequence phase selector is blocked when earth is not involved or if a three-phase fault is
detected.
Three-phase fault detection SEMOD153832-174 v4

Unless it has been categorized as a single or two-phase fault, the function classifies it as a
three-phase fault if the following conditions are fulfilled:
|U1|<U1Level
and
|I1|>I1LowLevel
or
|I1|>IMaxLoad
where:
|U1| and |I1| are the positive sequence voltage and current magnitude
U1Level , are the setting of limits for positive sequence voltage and current
I1LowLevel
IMaxLoad is the setting of the maximum load current
The output signal for detection of three-phase fault is only released if not earth fault and
phase-to-phase fault in the main sequence function is detected.
The conditions for not detecting earth fault are the inverse of equation 5 to 10.

Technical manual
The condition for not detecting phase-to-phase faults is determined by three conditions. Each
of them gives condition for not detecting phase-to-phase fault. Those are:
1:
earth fault is detected
or
|3I0|> 0.05 · IBase
and
|3I0|>maxIph ·INRelPE
2:
phase-to-earth and phase-to-phase faults are not fulfilled
and
maxIph<0.1 · IBase
and
|I2|<0.1 · maxIph
3:
|3I0|>maxIph · INBlockPP
or
|I2|<maxIph · I2ILmax
where:
maxIph is the maximum of the phase currents IL1, IL2 and IL3
INRelPE is the setting parameter for 3I0 limit for release of phase-to-earth fault
loops
|I2| is the magnitude of the negative sequence current
I2ILmax is the setting parameter for the relation between negative sequence
current to the maximum phase current in percent of IBase
INBlockPP is the setting parameter for 3I0 limit for blocking phase to phase
measuring loops
Fault evaluation and selection logic SEMOD153832-307 v3

The phase selection logic has an evaluation procedure that can be simplified according to
figure 132. Only phase L1 is shown in the figure. If the internal signal 3 Phase fault is activated,
all four outputs START, STL1, STL2 and STL3 gets activated.

Technical manual
a a>b FaultPriority
DeltaIL1 then c=a c Adaptive release
b else c=b dependent on result
from Delta logic
DeltaUL1
Sequence based
function a<b
a
L1L2 fault
then c=b c
OR b else c=a OR
L1N fault
3 Phase fault
STL1
IL1Valid &
BLOCK
Figure 132: Simplified diagram for fault evaluation, phase L1
Load encroachment logic SEMOD153832-312 v3

Each of the six measuring loops has its own load (encroachment) characteristic based on the
corresponding loop impedance. The load encroachment functionality is always activated in
faulty phase identification with load encroachment for mho (FMPSPDIS) function but the
influence on the zone measurement can be switched On/Offin the respective impedance
measuring function.
The outline of the characteristic is presented in figure 133. As illustrated, the resistive reach in
forward and reverse direction and the angle of the sector is the same in all four quadrants. The
reach for the phase selector will be reduced by the load encroachment function, as shown in
figure 133.
Blinder
Blinder provides a mean to discriminate high load from a fault. The operating characteristic is
illustrated in figure 133. There are six individual measuring loops with the blinder functionality.
Three phase-to-earth loops which estimate the impedance according to
Zn = Uph / Iph
and three phase-to-phase loops according to
Zph-ph = Uph-ph / Iph-ph
The start operations from respective loop are binary coded into one word and provides an
output signal STCNDPLE.

Technical manual
X jX
Operation area Operation area
RLd
ArgLd ArgLd
R
ArgLd R
ArgLd
RLd
Operation area
No operation area No operation area
en06000414.vsd
Figure 133: Influence on the characteristic by load encroachment logic
Outputs SEMOD153832-327 v7
The output of the sequence components based phase selector and the delta logic phase
selector activates the output signals STL1, STL2 and STL3. If an earth fault is detected the
signal STPE gets activated.
The phase selector also gives binary coded signals that are connected to the zone measuring
element for opening the correct measuring loop(s). This is done by the signal STCNDPHS. If
only one phase is started (L1, L2 or L3), the corresponding phase-to-earth element is enabled.
STPE is expected to be made available for two-phase and three-phase faults for the correct
output to be selected. The fault loop is indicated by one of the decimal numbers below.
The output STCNDPHS provides release information from the phase selection part only.
STCNDLE provides release information from the load encroachment part only. STCNDPLE
provides release information from the phase selection part and the load encroachment part
combined, that is, both parts have to issue a release at the same time (this signal is normally
not used in the zone measuring element). In these signals, each fault type has an associated
value, which represents the corresponding zone measuring loop to be released. The values are
presented in table 162.
0= no faulted phases
1= L1E
2= L2E
3= L3E
4= -L1L2E
5= -L2L3E
6= -L3L1E
7= -L1L2L3E
8= -L1L2
9= -L2L3
10= -L3L1
11= L1L2L3

Technical manual
An additional logic is applied to handle the cases when phase-to-earth outputs are to be
asserted when the earth input G is not asserted.
The output signal STCNDPLE is activated when the load encroachment is operating.
STCNDPLE is connected to the input STCND for selected quadrilateral impedance measuring
zones to be blocked. The signal must be connected to the input LDCND for selected mho
impedance measuring zones .
The load encroachment at the measuring zone must be activated to release the
blocking from the load encroachment function.

SEMOD153649-2 v8
Table 163: FMPSPDIS technical data

Load encroachment criteria: (1.00–3000.00) W/phase ±2.0% static accuracy
Load resistance, forward and (5–70) degrees Conditions:
reverse Voltage range: (0.1–1.1) x Ur
Current range: (0.5–30) x Ir
Angle: at 0 degrees and 85
degrees
8.9 Distance protection zone, quadrilateral characteristic,

separate settings ZMRPDIS, ZMRAPDIS and ZDRDIR GUID-7308DB86-32CE-4615-95DC-92BEEF69E184 v1
GUID-420DD49A-C65B-4F04-B317-9558DCCE7A52 v1

Distance protection zone, ZMRPDIS 21
quadrilateral characteristic, separate
settings (zone 1) Z
S00346 V2 EN-US
Distance protection zone, ZMRAPDIS 21

quadrilateral characteristic, separate
settings (zone 2-5) Z
S00346 V2 EN-US
GUID-119120A5-8600-44C6-9C85-81136DBBE280 v1

Directional impedance quadrilateral ZDRDIR Z<-> 21D

Technical manual
8.9.2 Functionality GUID-014501E7-EE0D-440F-8DC8-C44B848E49D3 v3
The line distance protection is up to five zone full scheme protection with three fault loops for
phase-to-phase faults and three fault loops for phase-to-earth fault for each of the
independent zones. Individual settings for each zone in resistive and reactive reach gives
flexibility for use as back-up protection for transformer connected to overhead lines and
cables of different types and lengths.
Mho alternative quadrilateral characteristic is available.
Distance protection zone, quadrilateral characteristic (ZMRPDIS) together with Phase

selection, quadrilateral characteristic with settable angle (FRPSPDIS) has functionality for load
encroachment, which increases the possibility to detect high resistive faults on heavily loaded
lines, as shown in figure 134.
Forward
operation
Reverse
operation
en05000034.vsd
Figure 134: Typical quadrilateral distance protection zone with Phase selection,
quadrilateral characteristic with settable angle function FRPSPDIS activated
reliable built-in phase selection makes the function suitable in applications with single pole
tripping and autoreclosing.
Built-in adaptive load compensation algorithm prevents overreaching of zone 1 at load

exporting end at phase-to-earth faults on heavily loaded power lines.
configurations, such as parallel lines, multi-terminal lines and so on.

Technical manual

GUID-8DF1E00C-8404-4B1C-AE2F-5702269B699A v2
ZMRPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 135: ZMRPDIS function block
ZMRAPDIS
I3P* TRIP
U3P* TRL1
BLOCK TRL2
BLKZ TRL3
BLKTR START
STCND STL1
DIRCND STL2
STL3
STND
Figure 136: ZMRAPDIS function block

GUID-3BB8A08A-3199-42E3-B161-B11F4FF8C65F v2
ZDRDIR
I3P* STDIRCND
U3P*
8.9.4 Signals
Table 164: ZMRPDIS Input signals

SIGNAL
SIGNAL

Technical manual
Table 165: ZMRPDIS Output signals

Table 166: ZMRAPDIS Input signals

SIGNAL
SIGNAL
Table 167: ZMRAPDIS Output signals


Technical manual
Table 168: ZDRDIR Input signals

I3P GROUP - group connection for current abs 2
SIGNAL
U3P GROUP - group connection for voltage abs 2
SIGNAL
Table 169: ZDRDIR Output signals

8.9.5 Settings
Table 170: ZMRPDIS Group settings (basic)

On
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
Ph
X1PE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
E
Ph-Ph
Ph-E
On Phase loops
On timer, Ph-Ph
On Earth loops
On timer, Ph-E

Technical manual

Phase-Phase loops
Phase-Earth loops
Phase-Earth loops
Table 171: ZMRPDIS Non group settings (basic)

Value groups
Table 172: ZMRAPDIS Group settings (basic)

On
Reverse
X1PP 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
Ph
X1PE 0.10 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach Ph-
E
Ph-Ph
Ph-E
On Phase loops
On timer, Ph-Ph
On Earth loops
On timer, Ph-E
Phase-Phase loops
Phase-Earth loops

Technical manual
Table 173: ZMRAPDIS Non group settings (basic)

Value groups
Table 174: ZDRDIR Group settings (basic)

Phase-Earth loops
forward direction
Table 175: ZDRDIR Non group settings (basic)

Value groups
8.9.6.1 Full scheme measurement GUID-4519D9AD-4446-48FC-86CC-140E5299AFB7 v1
that each fault loop for phase-to-earth faults and phase-to-phase faults for forward and
Figure 137 presents an outline of the different measuring loops for up to five, impedance-
measuring zones. There are 3 to 5 zones depending on product type and variant.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1

Zone RV
fault.

Technical manual
8.9.6.2 Impedance characteristic GUID-0DC94F08-9B3A-424D-9615-BD5C577344ED v1
The distance measuring zone includes six impedance measuring loops; three intended for
phase-to-earth faults, and three intended for phase-to-phase as well as, three-phase faults.
impedance characteristics presented in figure 138 and figure 139. The phase-to-earth
characteristic is illustrated with the full loop reach while the phase-to-phase characteristic
presents the per phase reach.
X (Ohm/loop)
R1PE+Rn
RFPE RFPE
X0PE-X1PE
Xn =
3
X1PE+Xn R0PE-R1PE
Rn =
3
jN jN
R (Ohm/loop)
RFPE RFPE
X1PE+Xn
RFPE RFPE
en08000280-2-en.vsd
R1PE+Rn
Figure 138: Characteristic for phase-to-earth measuring , ohm/loop domain

Technical manual
X (Ohm/phase)
RFPP R1PP RFPP

2 2
X 0 PE - X 1RVPE
XNRV =XX00PEPG- -
X31XRVPE
1RVPG
XNRV =
XNRV =
3 3
XX
X00
PE
0 PE
-X
PG --1X 11FWPE
XFWPE
FWPG
XNFW =
XNFW==
XNFW
X1PP 3
3 3
j j
R (Ohm/phase)
RFPP RFPP
2 2
X1PP
RFPP R1PP RFPP

2 2
en07000062.vsd
Figure 139: Characteristic for phase-to-phase measuring

The fault loop reach with respect to each fault type may also be presented as in figure 140.
Note in particular the difference in definition regarding the (fault) resistive reach for phase-to-
phase faults and three-phase faults.

Technical manual
IL1 R1 + j X1
Phase-to-earth
UL1
element
Phase-to-earth
(Arc + tower
resistance)
0
IN (R0-R1)/3 +
j (X0-X1)/3 )
UL1 element L1-L2
Phase-to-phase
fault in phase RFPP
L1-L2 IL2
R1 + j X1

UL1 element L1-L3
Three-phase
fault
IL3
UL3
R1 + j X1 0.5·RFPP

The R1 and jX1 in figure 140 represents the positive sequence impedance from the measuring
point to the fault location. The settings RFPE and RFPP are the eventual fault resistances in the
faulty place.
Regarding the illustration of three-phase fault in figure 140, there is of course fault current
The zone can be set to operate in Non-directional, Forward or Reverse direction through the
setting OperationDir. The result from respective set value is illustrated in figure 141. The
impedance reach is symmetric, in the sense that it conforms for forward and reverse direction.
Therefore, all reach settings apply to both directions.

Technical manual
X X X
R R R
Figure 141: Directional operating modes of the distance measuring zones
8.9.6.3 Minimum operating current GUID-BFD07CBE-F322-4602-A3BC-B6E8D72DB92B v1
The operation of Distance measuring zones, quadrilateral characteristic (ZMRPDIS) is blocked

if the magnitude of input currents fall below certain threshold values.
earth loops can be blocked when IN < IMinOpIN, regardless of the phase currents.
three-phase currents, that is residual current 3I0.
The phase-to-phase loop LmLn is blocked if ILmLn< IMinOpPP.
direction, that is OperationDir=Reverse
8.9.6.4 Measuring principles M16923-4 v7
Apparent impedances are calculated and compared with the set limits. The apparent
impedances at phase-to-phase faults follow equation 50 (example for a phase L1 to phase L2
fault).
UL1 – UL2
Zapp = -------------------------
I L1 – IL2

Technical manual
Ln (n = 1, 2, 3)
The earth return compensation applies in a conventional manner to phase-to-earth faults

(example for a phase L1 to earth fault) according to equation 51.
U L1
Z app =
I L1 + I N × KN
Where:
are the phase voltage, phase current and residual current present to the IED
U L1
I L1
IN
KN
is defined as:
Z 0 - Z1
KN =
3 × Z1
Z 0 = R 0 + jX 0
Z 1 = R1 + jX 1
Where
X.
The formula given in equation 51 is only valid for radial feeder application without load. When
might overreach at exporting end and underreach at importing end. The IED has an adaptive
load compensation which increases the security in such applications.

Technical manual
X Di
U = R × i + ------ × -----
w 0 Dt
X D Re ( I )
Re ( U ) = R × Re ( I ) + ------ × ------------------
w0 Dt
X DIm ( I )
Im ( U ) = R × Im ( I ) + ------ × -----------------
w0 Dt
with
w0 = 2 × p × f 0
where:
voltage and substitutes it in the equation for the imaginary part. The equation for the Xm
Im ( U ) × DRe ( I ) – Re ( U ) × D Im ( I )
R m = ------------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – D Im ( I ) × Re ( I )
Re ( U ) × Im ( I ) – Im ( U ) × Re ( I )
Xm = w 0 × Dt × -------------------------------------------------------------------------------
DRe ( I ) × Im ( I ) – DIm ( I ) × Re ( I )

Technical manual
8.9.6.5 Directional impedance element for quadrilateral characteristics M16923-139 v6
The evaluation of the directionality takes place in Directional impedance quadrilateral function
ZDRDIR. Equation 58 and equation 59 are used to classify that the fault is in forward direction
for phase-to-earth fault and phase-to-phase fault.
0.8 × U 1L1 + 0.2 × U 1L1 M

I L1
For the L1-L2 element, the equation in forward direction is according to.
0.8 × U 1L1 L 2 + 0.2 × U 1L1 L 2 M

I L1 L 2
where:
ArgDir is the setting for the lower boundary of the forward directional characteristic, by default set to
15 (= -15 degrees) and
is positive sequence phase voltage in phase L1
U 1L1
is positive sequence memorized phase voltage in phase L1
U 1L1M
is phase current in phase L1
I L1
is voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2
is memorized voltage difference between phase L1 and L2 (L2 lagging L1)
U 1L1L 2 M
is current difference between phase L1 and L2 (L2 lagging L1)
I L1L 2
(as shown in figure 142). It should not be changed unless system studies have shown the
necessity.
ZDRDIR gives binary coded directional information per measuring loop on the output
STDIRCND.

Technical manual
ArgNegRes
ArgDir
R
en05000722.vsd
Figure 142: Setting angles for discrimination of forward and reverse fault in Directional
impedance quadrilateral function ZDRDIR
degrees.
The polarizing voltage is available as long as the positive sequence voltage exceeds 5% of the
After 100 ms the following occurs:
Distance protection zones GUID-CBBD5D22-7372-4C0A-B941-44A5D21EC328 v2

Phase-to-earth related signals are designated by L1N, L2N and L3N.. The phase-to-phase

Technical manual
selection with load encroachment, quadrilateral characteristic function FRPSPDIS within the
IED, which are converted within the zone measuring function into corresponding boolean
expressions for each condition separately. Input signal STCND is connected to
FRPSPDISfunction output STCNDZ.
The zone measurement function filter out the relevant signals depending on the setting of the
parameter OperationDir. It must be configured to the STDIRCND output on directional
function ZDRDIR function.
STZMPP
OR
STCND
AND STNDL1L2
L1L2
STNDL2L3
L2L3 AND
L3L1 AND STNDL3L1
AND STNDL1N
L1N
AND STNDL2N
L2N
STNDL3N
L3N AND
OR STPE
OR
VTSZ STND
OR AND
BLOCK
BLOCFUNC BLK
99000557-2.vsd
Figure 143: Conditioning by a group functional input signal STCND, external start
condition
Composition of the phase start signals for a case, when the zone operates in a non-directional
mode, is presented in figure 60.

Technical manual
STNDL1N
OR
STNDL2N 15 ms
AND t STL1
STNDL3N
STNDL1L2 OR 15 ms
AND t STL2
STNDL2L3
15 ms
STNDL3L1 AND t STL3
OR
15 ms
AND t START
OR
BLK

STNDL1N
AND
DIRL1N
STZMPE.
OR
STNDL2N
DIRL2N AND
STNDL3N 15 ms
OR STL1
AND AND t
DIRL3N
STNDL1L2
DIRL1L2 AND 15 ms
OR STL2
AND t
STNDL2L3
DIRL2L3 AND
15 ms
OR STL3
STNDL3L1 AND t
DIRL3L1 AND
STZMPP
OR
BLK
15 ms
OR START
AND t
Figure 145: Composition of start signals in directional operating mode

62.

Technical manual
Timer tPP=On
STZMPP AND tPP
AND
t
BLOCFUNC
OR OR
tPE
t
AND
Timer tPE=On AND
STZMPE 15ms
BLKTR AND t
TRIP
BLK OR
STL1 AND TRL1
STL2 AND TRL2
STL3 AND TRL3

GUID-7617A215-AE7C-47CC-B189-4914F530F717 v7
Table 176: ZMRPDIS, ZMRAPDIS technical data

Number of zones Max 5 with -
selectable direction
current, zone 1
Minimum operate current, (10-1000)% of IBase -
phase-to-phase and phase-to-
earth
Positive sequence reactance (0.10-3000.00) Ω/ ±2.0% static accuracy
phase ±2.0 degrees static angular accuracy
Conditions:
Positive sequence resistance (0.01-1000.00) Ω/ Voltage range: (0.1-1.1) x Ur
phase
Zero sequence reactance (0.10-9000.00) Ω/ Angle: at 0 degrees and 85 degrees
phase
Zero sequence resistance (0.01-3000.00) Ω/
phase
Fault resistance, phase-to- (0.10-9000.00) Ω/
earth loop
Fault resistance, phase-to- (0.10-3000.00) Ω/
phase loop

Technical manual

measured with
CVT’s and
0.5<SIR<30
Definite time delay phase- (0.000-60.000) s ±0.2% or ±40 ms whichever is greater
phase and phase-earth
operation
x Zreach Max. =50 ms
8.10 Phase selection, quadrilateral characteristic with

settable angle FRPSPDIS GUID-29E9C424-5AF7-40EE-89D9-F6BB4F0A0836 v2
GUID-07DB9506-656C-4E5F-A043-3DAA624313C7 v2

Phase selection, quadrilateral FRPSPDIS 21
characteristic with settable angle
Z<phs
SYMBOL-DD V1 EN-US
8.10.2 Functionality GUID-A15350C8-CFA9-4BD9-9DE1-5D5814290F61 v3
The ability to accurately and reliably classify the different types of fault, so that single pole
tripping and autoreclosing can be used plays an important role in today's power systems.
Phase selection, quadrilateral characteristic with settable angle FRPSPDIS is designed to
accurately select the proper fault loop in the distance function dependent on the fault type.
The heavy load transfer that is common in many transmission networks may make fault
resistance coverage difficult to achieve. Therefore, FRPSPDIS has a built-in algorithm for load
encroachment, which gives the possibility to enlarge the resistive setting of both the phase
selection and the measuring zones without interfering with the load.
The extensive output signals from the phase selection gives also important information about
faulty phase(s) which can be used for fault analysis.

measure three phase currents and the residual current and, compare them with the set values.

Technical manual
8.10.3 Function block GUID-4AE8EAC6-5231-4646-9215-33DBBA039B65 v2
FRPSPDIS
I3P* TRIP
U3P* START
BLOCK STFWL1
DIRCND STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STNDL1
STNDL2
STNDL3
STNDPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STCNDZ
STCNDLE
Figure 147: FRPSPDIS function block
8.10.4 Signals
Table 177: FRPSPDIS Input signals

SIGNAL
SIGNAL
Table 178: FRPSPDIS Output signals

START BOOLEAN Start in any phase or loop
STFWPE BOOLEAN Earth fault detected in forward direction
STRVPE BOOLEAN Earth fault detected in reverse direction

Technical manual

STNDPE BOOLEAN Non directional start, phase-earth
STFW1PH BOOLEAN Start in forward direction for single-phase fault
STFW2PH BOOLEAN Start in forward direction for two- phase fault
STFW3PH BOOLEAN Start in forward direction for thre-phase fault
STPE BOOLEAN Current conditions release of phase-earth measuring
elements
STPP BOOLEAN Current conditions release of phase-phase measuring
elements
STCNDZ INTEGER Start condition (Z< with LE and 3I0 E/F detection)
STCNDLE INTEGER Start condition (only LE and 3I0 E/F detection)
8.10.5 Settings
Table 179: FRPSPDIS Group settings (basic)

measuring loops
measuring loops
load impedance area
impedance area
impedance area
Phase-Phase loops
Phase-Earth loops

Technical manual
Table 180: FRPSPDIS Group settings (advanced)

TimerPP Off - - Off Operation mode Off / On of Zone
On timer, Ph-Ph
tPP 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-Ph
TimerPE Off - - Off Operation mode Off / On of Zone
On timer, Ph-E
tPE 0.000 - 60.000 s 0.001 3.000 Time delay to trip, Ph-E
Table 181: FRPSPDIS Non group settings (basic)

Value groups
8.10.6 Operation principle GUID-163B55DE-056F-4CB9-A401-78F9F4897903 v2
The basic impedance algorithm for the operation of the phase selection measuring elements is
the same as for the distance zone measuring function. Phase selection, quadrilateral
characteristic with settable angle (FRPSPDIS) includes six impedance measuring loops; three
intended for phase-to-earth faults, and three intended for phase-to-phase as well as for three-
phase faults.
The difference, compared to the distance zone measuring function, is in the combination of
the measuring quantities (currents and voltages) for different types of faults.
The characteristic is basically non-directional, but FRPSPDIS uses information from the
directional function ZDRDIR to discriminate whether the fault is in forward or reverse
direction.
The start condition STCNDZ is essentially based on the following criteria:
• Residual current criteria, that is, separation of faults with and without earth connection
• Regular quadrilateral impedance characteristic
• Load encroachment characteristics is always active but can be switched off by selecting a
high setting.
The current start condition STCNDLE is based on the following criteria:
• Residual current criteria

• No quadrilateral impedance characteristic. The impedance reach outside the load area is
theoretically infinite. The practical reach, however, will be determined by the minimum
operating current limits.
• Load encroachment characteristic is always active, but can be switched off by selecting a
high setting.
The STCNDLE output is non-directional. The directionality is determined by the distance zones
directional function ZDRDIR.
There are output from FRPSPDIS that indicate whether a start is in forward or reverse direction
or non-directional, for example STFWL1, STRVL1 and STNDL1.

Technical manual
These directional indications are based on the sector boundaries of the directional function
and the impedance setting of FRPSPDIS function. Their operating characteristics are
illustrated in figure 148.
X X X
R
R R
Non-directional (ND) Forward (FW) Reverse (RV)
en08000286.vsd
Figure 148: Characteristics for non-directional, forward and reverse operation of Phase
selection, quadrilateral characteristic with settable angle (FRPSPDIS)
The setting of the load encroachment function may influence the total operating
characteristic, for more information, refer to section "Load encroachment".
The input DIRCND contains binary coded information about the directional coming from the
directional function ZDRDIR. It shall be connected to the STDIR output on ZDRDIR. This
information is also transferred to the input DIRCND on the distance measuring zones, that is,
the ZMRPDIS block.
The code built up for the directionality is as follows:
If the binary information is 1 then it will be considered that we have start in forward direction
in phase L1. If the binary code is 3 then we have start in forward direction in phase L1 and L2
etc.
The STCNDZ or STCNDLE output contains, in a similar way as DIRCND, binary coded
information, in this case information about the condition for opening correct fault loop in the
distance measuring element. It shall be connected to the STCND input on the ZMRPDIS
distance measuring zones block.
The code built up for release of the measuring fault loops is as follows:
STCNDZ = L1N*1 + L2N*2 + L3N*4 + L1L2*8 + L2L3*16 + L3L1*32
8.10.6.1 Phase-to-earth fault GUID-37AF6C9C-852E-48D9-A307-A23F2BF6884A v1
For a phase-to-earth fault, the measured impedance by FRPSPDIS is according to equation 60.

Technical manual
Index PHS in images and equations reference settings for Phase selection,
quadrilateral characteristic with settable angle (FRPSPDIS).
ULn
ZPHSn =
ILn
where:
n corresponds to the particular phase (n=1, 2 or 3)
The characteristic for FRPSPDIS function at phase-to-earth fault is according to figure 149. The
characteristic has a settable angle for the resistive boundary in the first quadrant of 70°.
The resistance RN and reactance XN are the impedance in the earth-return path defined
according to equation 63 and equation 64.
R 0 PE - R1PE
RN =
3
EQUATION-2125 V1 EN-US (Equation 61)
R0 - R1
RN =
3
X 0 - X1
XN =
3

Technical manual
X (ohm/loop)
R1PE+RN
RFRvPE RFFwPE
X1+XN
RFFwPE
RFRvPE R (Ohm/loop)
X1+XN
RFRvPE RFFwPE
R1PE+RN
Figure 149: Characteristic of FRPSPDIS for phase to earth fault (directional lines are
drawn as "line-dot-dot-line")
Besides this, the 3I0 residual current must fulfil the conditions according to equation 63 and
equation 64.
3 × I0 ³ 0.5 × IMinOpPE
INReleasePE- Iphmax
3 × I0 ³ ----------------------------------- ×
100
where:
IMinOpPE is the minimum operation current for forward zones
INReleasePE is the setting for the minimum residual current needed to enable operation in the phase-to-
earth fault loops (in %).
Iphmax is the maximum phase current in any of three phases.
8.10.6.2 Phase-to-phase fault GUID-8C41B037-72E8-42EB-A5BA-9FA20BD830DB v1
For a phase-to-phase fault, the measured impedance by FRPSPDIS is according to equation 65.
ULm - ULn
ZPHS =
-2 × ILn

Technical manual
ULm is the leading phase voltage, ULn the lagging phase voltage and ILn the phase current in
the lagging phase n.
The operation characteristic is shown in figure 150.
X (ohm/phase)
0.5·FRvPP
R1PP 0.5·RFFwPP
X1
0.5·RFFwPP
R (ohm/phase)
0.5·RFRvPP
X1
R1PP
Figure 150: The operation characteristic for FRPSPDIS at phase-to-phase fault

(directional lines are drawn as "line-dot-dot-line")
In the same way as the condition for phase-to-earth fault, there are current conditions that
have to be fulfilled in order to release the phase-to-phase loop. Those are according to
equation 66 or equation 67.
3I 0 < IMinOpPE
INBlockPP
3I 0 < × Iph max
100
where:
IMinOpPE is the minimum operation current for forward earth measuring loops,
INBlockPP is 3I0 limit for blocking phase-to-phase measuring loop and
Iphmax is maximal magnitude of the phase currents.

Technical manual
8.10.6.3 Three-phase faults GUID-0CB276AE-1700-4ACB-8F90-E8E1FD670365 v1
The operation conditions for three-phase faults are the same as for phase-to-phase fault, that
is equation 65, equation 66 and equation 67 are used to release the operation of the function.
However, the reach is expanded by a factor 2/√3 (approximately 1.1547) in all directions. At the
same time the characteristic is rotated 30 degrees, counter-clockwise. The characteristic is
shown in figure 151.
X (ohm/phase)
4 × X1PP
3
0.5·RFFwPP·K3
X1·K3 30 deg 2
RFwPP ×
3
R (ohm/phase)
0.5·RFRvPP·K3
K3 = 2 / sqrt(3)
30 deg
Figure 151: The characteristic of FRPSPDIS for three-phase fault (set angle 70°)
8.10.6.4 Load encroachment GUID-ABD74C3B-FF0F-45B3-BF34-D7C5FEAD62D3 v1
Each of the six measuring loops has its own load encroachment characteristic based on the
corresponding loop impedance. The load encroachment functionality is always active, but can
be switched off by selecting a high setting.
The outline of the characteristic is presented in figure 153. As illustrated, the resistive blinders
are set individually in forward and reverse direction while the angle of the sector is the same in
all four quadrants.

Technical manual
RLdFw
ArgLd ArgLd
R
ArgLd ArgLd
RLdRv
Figure 152: Characteristic of load encroachment function

The influence of load encroachment function on the operation characteristic is dependent on
the chosen operation mode of FRPSPDIS function. When output signal STCNDZ is selected, the
characteristic for FRPSPDIS (and also zone measurement depending on settings) will be
reduced by the load encroachment characteristic, see figure 154.
When output signal STCNDI is selected, the operation characteristic will be as in figure 153.
The reach will in this case be limit by the minimum operation current and the distance
measuring zones.
X X
R R
STCNDZ STCNDLE
IEC10000099-1-
en.vsd
Figure 153: Difference in operating characteristic depending on operation mode when

load encroachment is activated

Technical manual
When FRPSPDIS is set to operate together with a distance measuring zone the resultant
operate characteristic could look like in figure 154. The figure shows a distance measuring
zone operating in forward direction. Thus, the operating area of the zone together with the
load encroachment is highlighted in black.
"Phase selection"
"quadrilateral" zone
Load encroachment
characteristic
Directional line
en05000673.vsd
Figure 154: Operating characteristic in forward direction when load encroachment is

activated
Figure 154 is valid for phase-to-earth. During a three-phase fault, or load, when the
quadrilateral phase-to-phase characteristic is subject to enlargement and rotation the operate
area is transformed according to figure 155. Notice in particular what happens with the
resistive blinders of the "phase selection" "quadrilateral" zone. Due to the 30-degree rotation,
the angle of the blinder in quadrant one is now 100 degrees instead of the original 70 degrees
(if the angle setting is 70 degrees). The blinder that is nominally located to quadrant four will
at the same time tilt outwards and increase the resistive reach around the R-axis.
Consequently, it will be more or less necessary to use the load encroachment characteristic in
order to secure a margin to the load impedance.

Technical manual
X (W / phase)
Phase selection
”Quadrilateral” zone
R (W / phase)
Figure 155: Operating characteristic for FRPSPDIS in forward direction for three-phase
fault, ohm/phase domain
The result from rotation of the load characteristic at a fault between two phases is presented
in fig 156. Since the load characteristic is based on the same measurement as the quadrilateral
characteristic, it will rotate with the quadrilateral characteristic clockwise by 30 degrees when
subject to a pure phase-to-phase fault. At the same time the characteristic will "shrink" by
2/√3, from the full RLdFw and RLdRv reach, which is valid at load or three-phase fault.

Technical manual
IEC08000437.vsd
Figure 156: Rotation of load characteristic for a fault between two phases
There is a gain in selectivity by using the same measurement as for the quadrilateral
characteristic since not all phase-to-phase loops will be fully affected by a fault between two
phases. It should also provide better fault resistive coverage in quadrant one. The relative loss
of fault resistive coverage in quadrant four should not be a problem even for applications on
series compensated lines.
8.10.6.5 Minimum operate currents GUID-7F780AC7-36AB-4704-843D-C1EA3F5B2D6A v1
The operation of Phase selection, quadrilateral characteristic with settable angle (FRPSPDIS) is
blocked if the magnitude of input currents falls below certain threshold values.
The phase-to-earth loop Ln is blocked if ILn<IMinOpPE, where ILn is the RMS value of the
current in phase Ln.
The phase-to-phase loop LmLn is blocked if (2·ILn<IMinOpPP).
8.10.6.6 Simplified logic diagrams GUID-95AD1A91-86F0-4854-A12B-99C504BFBC6C v1
Figure 157 presents schematically the creation of the phase-to-phase and phase-to-earth
operating conditions. Consider only the corresponding part of measuring and logic circuits,
when only a phase-to-earth or phase-to-phase measurement is available within the IED.

Technical manual
OperationZ<
AND
LDEblock
3I 0  0.5  IMinOpPE IRELPE
& 15 ms
AND t STPE
INReleasePE
3I 0   Iphmax
100 STCNDLE
Bool to AND
BLOCK integer
15 ms
3I 0  IMinOpPE 10 ms 20 ms & t STPP
OR AND t t
IRELPP
INBlockPP
3I 0   Iphmax
100
Figure 157: Phase-to-phase and phase-to-earth operating conditions (residual current

criteria)
A special attention is paid to correct phase selection at evolving faults. A STCNDLE output
signal is created as a combination of the load encroachment characteristic and current
criteria, refer to figure 157. This signal can be configured to STCND functional input signals of
the distance protection zone and this way influence the operation of the phase-to-phase and
phase-to-earth zone measuring elements and their phase related starting and tripping signals.
Figure 158 presents schematically the composition of non-directional phase selective signals
STNDLn. Internal signals ZMLnN and ZMLmLn (m and n change between one and three
according to the phase number) represent the fulfilled operating criteria for each separate
loop measuring element, that is within the characteristic.
INDL1N
INDL2N
INDL3N
15 ms
STNDPE
IRELPE OR t
LDEblockL1N
IL1 AND 15 ms
OR STNDL1
ZML1N OR t
LDEblockL2N
IL2 AND
OR
ZML2N 15 ms
LDEblockL3N STNDL2
OR t
IL3 AND
OR
ZML3N
LDEblockL1L2 15 ms
STNDL3
IL1 & IL2 AND OR t
OR
ZML1L2
LDEblockL2L3
IL2 & IL3 AND INDL1L2
OR
ZML2L3 INDL2L3
LDEblockL3L1
IL3 & IL1 AND
OR INDL3L1
ZML3L1
IRELPP 15 ms
STNDPP
OR t
Figure 158: Composition on non-directional phase selection signals

Technical manual
Composition of the directional (forward and reverse) phase selective signals is presented
schematically in figure 159 and figure 160. The directional criteria appears as a condition for
the correct phase selection in order to secure a high phase selectivity for simultaneous and
evolving faults on lines within the complex network configurations. Internal signals DFWLn and
DFWLnLm present the corresponding directional signals for measuring loops with phases Ln
and Lm. Designation FW (figure 160) represents the forward direction as well as the
designation RV (figure 159) represents the reverse direction. All directional signals are derived
within the corresponding digital signal processor.
Figure 159 presents additionally a composition of a STCNDZ output signal, which is created on
the basis of impedance measuring conditions. This signal can be configured to STCND
functional input signals of the distance protection zone and this way influence the operation
of the phase-to-phase and phase-to-earth zone measuring elements and their phase related
starting and tripping signals.
INDL1N
AND
DRVL1N
INDL1L2 15 ms STRVL1
AND OR t
DRVL1L2
INDL3L1
AND
DRVL3L1 15 ms
STRVPE
INDL2N OR t
AND
DRVL2N
INDL1L2 15 ms
STRVL2
AND OR t
INDL2L3 INDL1N
AND INDL2N
DRVL2L3
INDL3N Bool to STCNDZ
INDL3N INDL1L2 integer
AND INDL2L3
DRVL3N INDL3L1
INDL2L3 15 ms
STRVL3
AND OR t
INDL3L1
15 ms
AND STRVPP
OR t
Figure 159: Composition of phase selection signals for reverse direction

Technical manual
AND
INDL1N
AND 15 ms 15 ms
DFWL1N STFW1PH
AND OR t t
INDL1L2
15 ms STFWL1
AND OR t
DFWL1L2
INDL3L1
AND
AND
DFWL3L1 15 ms
STFWPE
INDL2N OR t
AND
DFWL2N
AND 15 ms
INDL1L2 STFWL2
t
AND OR
15 ms 15 ms
INDL2L3 STFW2PH
AND OR t t
AND
DFWL2L3
INDL3N
AND AND
DFWL3N 15 ms
STFWL3
t
INDL2L3
AND OR
15 ms
INDL3L1 STFW3PH
AND t
AND
15 ms
STFWPP
OR t
Figure 160: Composition of phase selection signals for forward direction

Figure161 presents the composition of output signals TRIP and START, where internal signals
STNDPP, STFWPP and STRVPP are the equivalent to internal signals STNDPE, STFWPE and
STRVPE, but for the phase-to-phase loops.

Technical manual
TimerPP=Off
tPP
AND AND
t
TRIP
OR OR
tPE
TimerPE=Off
t
AND AND
STNDPP
STFWPP OR
STRVPP
START
OR
STNDPE
STFWPE OR
STRVPE
IEC08000441-1 V2 EN-US
Figure 161: TRIP and START signal logic

GUID-9E13C38A-3B6D-402B-98A6-6CDA20632CE7 v5
Table 182: FRPSPDIS technical data

Minimum operate current (5-500)% of IBase ±1.0% of Ir at I ≤ Ir
Reactive reach, positive (0.50–3000.00) Ω/phase ±2.0% static accuracy

sequence ±2.0 degrees static angular accuracy
Conditions:
Resistive reach, positive (0.10–1000.00) Ω/phase Voltage range: (0.1-1.1) x Ur
sequence
Reactive reach, zero sequence (0.50–9000.00) Ω/phase Angle: at 0 degrees and 85 degrees
Resistive reach, zero sequence (0.50–3000.00) Ω/phase

Fault resistance, Ph-E faults, (1.00–9000.00) Ω/loop
forward and reverse
Fault resistance, Ph-Ph faults, (0.50–3000.00) Ω/loop
forward and reverse

Technical manual
8.11 High speed distance protection ZMFPDIS GUID-CC4F7338-2281-411D-B55A-67BF03F31681 v4
8.11.1 Identification GUID-8ACD3565-C607-4399-89D2-A05657840E6D v3

High speed distance protection zone ZMFPDIS 21
Z
S00346 V2 EN-US
8.11.2 Functionality GUID-2E34AB7F-886E-499F-8984-09041A89238D v8
The High speed distance protection (ZMFPDIS) is providing sub-cycle, down towards half-
cycle, operate time for basic faults within 60% of the line length and up to around SIR 5.
The ZMFPDIS function is a six zone full scheme protection with three fault loops for phase-to-
phase faults and three fault loops for phase-to-earth faults for each of the independent zones,
which makes the function suitable in applications with single-phase autoreclosing.
In each measurement zone, ZMFPDIS function is designed with the flexibility to operate in
either quadrilateral or mho characteristic mode for separate phase-to-ground or phase-to-
phase loops.
The zones can operate independently of each other. Zones 3 to 5 in directional (forward or
reverse) or non-directional mode. Zone1 and zone2 are designed to measure in forward
direction only, while one zone (ZRV) is designed to measure in the reverse direction. This
makes them suitable, together with a communication scheme, for protection of power lines
and cables in complex network configurations, such as parallel lines, multi-terminal lines, and
so on.
A built-in adaptive load compensation algorithm prevents overreaching of the distance zones
in the load exporting end during phase-to-earth faults on heavily loaded power lines. It also
reduces underreach in the importing end.
The ZMFPDIS function block itself incorporates a phase-selection element and a directional
element, contrary to previous designs in the 600-series, where these elements were
represented with separate function-blocks.
The operation of the phase-selection element is primarily based on current change criteria (i.e.
delta quantities), with significantly increased dependability. There is also a phase selection
criterion operating in parallel which bases its operation only on voltage and current phasors.
The directional element utilizes a set of well-established quantities to provide fast and correct
directional decision during various power system operating conditions, including close-in
three-phase faults, simultaneous faults and faults with only zero-sequence in-feed.

Technical manual
8.11.3 Function block GUID-322E158B-C2A1-4F0D-A749-01C7942875ED v1
ZMFPDIS
I3P* TRIP
U3P* TRZ1
BLOCK TRL1Z1
VTSZ TRL2Z1
BLKZ1 TRL3Z1
BLKZ2 TRZ2
BLKZ3 TRL1Z2
BLKZ4 TRL2Z2
BLKZ5 TRL3Z2
BLKZRV TRZ3
BLKTRZ1 TRZ4
BLKTRZ2 TRZ5
BLKTRZ3 TRZRV
BLKTRZ4 START
BLKTRZ5 STZ1
BLKTRZRV STNDZ1
EXTNST STZ2
RELCNDZ1 STL1Z2
RELCNDZ2 STL2Z2
RELCNDZ3 STL3Z2
RELCNDZ4 STNDZ2
RELCNDZ5 STZ3
RELCNDZRV STNDZ3
STZ4
STNDZ4
STZ5
STNDZ5
STZRV
STL1ZRV
STL2ZRV
STL3ZRV
STNDZRV
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVP E
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
Figure 162: ZMFPDIS function block
8.11.4 Signals
Table 183: ZMFPDIS Input signals

SIGNAL
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
VTSZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZ1 BOOLEAN 0 Blocks and resets zone 1 timers and outputs

Technical manual

BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKTRZ1 BOOLEAN 0 Blocks and resets zone 1 timers and trip outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
EXTNST BOOLEAN 0 External start of zone timers
RELCNDZ1 INTEGER 127 Release word for the measuring loops of zone 1
RELCNDZRV INTEGER 127 Release word for the measuring loops of zone RV
Table 184: ZMFPDIS Output signals

TRIP BOOLEAN Trip in any phase or phases from any zone or zones
TRZ1 BOOLEAN Trip in any phase or phases from zone 1 - forward direction
TRL1Z1 BOOLEAN Trip in phase L1 from zone 1 - forward direction
TRZ3 BOOLEAN Trip in any phase or phases from zone 3 - zone direction
TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse direction
START BOOLEAN Start in any phase or phases from any zone or zones
STZ1 BOOLEAN Start in any phase or phases from zone 1 - forward direction
STNDZ1 BOOLEAN Start in any phase or phases from zone 1 - any direction
STL1Z2 BOOLEAN Start in phase L1 from zone 2 - forward direction

Technical manual

STZ3 BOOLEAN Start in any phase or phases from zone 3 - zone direction
STZRV BOOLEAN Start in any phase or phases from zone RV - reverse direction
STL1ZRV BOOLEAN Start in phase L1 from zone RV - reverse direction
STNDZRV BOOLEAN Start in any phase or phases from zone RV - any direction
STND BOOLEAN Fault detected in any phase or phases - any direction
STNDL1 BOOLEAN Fault detected in phase L1 - any direction
STNDPE BOOLEAN Fault with earth connection detected in any phase or phases -
any direction
STFWPE BOOLEAN Fault with earth connection detected - forward direction
STRVPE BOOLEAN Fault with earth connection detected - reverse direction
STFW1PH BOOLEAN Single-phase fault detected - forward direction
STFW2PH BOOLEAN Two-phase fault detected - forward direction
STFW3PH BOOLEAN Three-phase fault detected - forward direction
STPE BOOLEAN Ph-E zone measurement enabled - any direction
STPP BOOLEAN Ph-Ph zone measurement enabled - any direction

Technical manual
8.11.5 Settings
Table 185: ZMFPDIS Non group settings (basic)

Value groups
ZDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
of range, Int Db: In 0,001%s
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
ZRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Dead band & 5s
Cyclic
Dead band & 30s
Cyclic
Dead band & 1min
Cyclic
ZAngDbRepInt 1 - 100000 Type 1 10 Cyclic report interval (s)
Table 186: ZMFPDIS Group settings (basic)

On
RLdFw 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
impedance area - forward
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the
w load impedance area - reverse
XLd 0.01 - 10000.00 Ohm/p 0.01 400.00 Reactance determining the load
impedance area
ArgLd 5 - 70 Deg 1 30 Angle determining the load
impedance area
CVTType Any - - Passive type CVT selection determining filtering of
Passive type the function
None (Magnetic)
OpModePPZ1 Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-Ph loops, zone 1
Mho
MhoOffset
OpModePEZ1 Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-E loops, zone 1
Mho
MhoOffset
X1PPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-Ph, zone 1
R1PPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 1
X1PEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-E, zone 1
R1PEZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
E, zone 1
X0Z1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, zone 1
R0Z1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone 1

Technical manual

RFPPZ1 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 1
RFPEZ1 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 1
tPPZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone
1
tPEZ1 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone 1
IMinOpPPZ1 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone 1
IMinOpPEZ1 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone 1
Mho
MhoOffset
Mho
MhoOffset
X1Z2 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone 2
R1Z2 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach,
zone 2
2
Mho
MhoOffset
Mho
MhoOffset
DirModeZ3 Non-directional - - Forward Direction of zone 3
Forward
Reverse
zone 3
zone 3

Technical manual

3
Mho
MhoOffset
Mho
MhoOffset
Forward
Reverse
zone 4
zone 4
X0Z4 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone
4
4
Mho
MhoOffset
Mho
MhoOffset
Forward
Reverse
zone 5
zone 5
X0Z5 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone
5

Technical manual

5
OpModePPZRV Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-Ph loops, zone RV
Mho
MhoOffset
OpModePEZRV Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-E loops, zone RV
Mho
MhoOffset
X1ZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
zone RV
R1ZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach,
zone RV
X0ZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, zone
RV
R0ZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, zone
RV
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
RFPEZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone RV
tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone
RV
tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone
RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone RV
IMinOpPEZRV 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone RV
Table 187: ZMFPDIS Non group settings (advanced)

ZZeroDb 0 - 100000 m% 100 0 Magnitude zero point clamping in
0,001% of range
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 800.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 150.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 50.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 35.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZLimHys 0.000 - 100.000 % 0.001 0.500 Hysteresis value in % of range and is
common for all limits

Technical manual
Table 188: ZMFPDIS Group settings (advanced)

RLdFwMax 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum used resistance
determining the load impedance area,
if RLdFw is greater than RLdFwMax
then RLdFw is set to RLdFwMax
RLdFwMin 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum used resistance determining
the load impedance area, if RLdFw is
less than RLdFwMin then RLdFw is set
to RLdFwMin
ArgLdMax 5 - 70 Deg 1 70 Maximum used angle determining the
load impedance area, if ArgLd is
greater than ArgLdMax then ArgLd is
set to ArgLdMax
ArgLdMin 5 - 70 Deg 1 5 Minimum used angle determining the
load impedance area, if ArgLd is less
than ArgLdMin then ArgLd is set to
ArgLdMin
ZoneLinkStart Phase Selection - - Phase Selection Selection of start source for all
1st starting zone ZoneLinked trip delay timers
INReleasePE 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Earth
h measuring loops
TimerModeZ1 Disable all - - Enable Ph-E PhPh On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E output, zone 1
Enable PhPh
Enable Ph-E PhPh
TimerLinksZ1 LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should
tPE) tPE) be linked for zone 1
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links

Technical manual

Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
TimerModeZRV Disable all - - Enable Ph-E PhPh On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E output, zone RV
Enable PhPh
Enable Ph-E PhPh
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should
tPE) tPE) be linked for zone RV
LoopLink &
ZoneLink
No Links

Table 189: ZMFPDIS Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
L1L2Dir INTEGER 1=Forward - Direction in loop L1L2
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
L12R REAL - Ohm Resistance in phase L1-L2
L12X REAL - Ohm Reactance in phase L1-L2

Technical manual

ZL1IMAG REAL - Ohm ZL1 Amplitude, magnitude of
instantaneous value
ZL1ANGIM REAL - deg ZL1 Angle, magnitude of
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
8.11.7 Operation principle GUID-2432C04F-62E4-4817-9900-C830306FB4B0 v3
Settings, input and output names are sometimes mentioned in the following
text without its zone suffix (i.e. BLKZx instead of BLKZ3) when the description
is equally valid for all zones.
8.11.7.1 Filtering GUID-16B5060B-101C-402A-BF25-06E70FDD7836 v2
Practically all voltage, current and impedance quantities used within the ZMFPDIS function are
derived from fundamental frequency phasors filtered by a half cycle filter.
The phasor filter is frequency adaptive in the sense that its coefficients are changed based on
the estimated power system frequency.
A half cycle filter will not be able to reject both even and odd harmonics. So, while odd
harmonics will be completely attenuated, accuracy will be affected by even harmonics. Even
harmonics will not cause the distance zones to overreach however; instead there will be a
slightly variable underreach, on average in the same order as the magnitude ratio between the
harmonic and fundamental component.

Technical manual
8.11.7.2 Distance measuring zones GUID-74B12BB1-FE0A-4DE4-BDBE-159A438D396B v4
The different fault loops within the IED are of full scheme type, which means that earth fault
loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are
executed in parallel.
Figure 163 presents an outline of the different measuring loops for the six distance zones.
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1

Zone RV
fault
Each distance protection zone performs like one independent distance protection function
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to
the other; in fact, more diverse than can be distinguished by the algorithm itself in the course
of a few milliseconds. So, a setting (CVTtype) is introduced in order to inform the algorithm
about the type of CVT applied and thus providing the advantage of knowing how performance
should be optimized, even during the first turbulent milliseconds of the fault period.
There are two types of CVTs from the function point of view, the passive and the active type,
which refers to the type of ferro-resonance suppression device that is employed. The active
type requires more rigorous filtering which will have a negative impact on operate times.
However, this will be evident primarily at higher source impedance ratios (SIRs), SIR 5 and
above, or close to the reach limit.
The IEC 60044-5 transient classification is of little or no use in relation to this. It is not
primarily the damping of transients that is important; it is the frequency content of the
transients that is decisive, i.e. how difficult it is to filter out the specific frequency. So, even if
two CVTs, one passive and the other active type, comply with the same transient class, the
active type requires more extensive filtering in order to avoid transient overreach.
To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic is implemented. A circular characteristic exists for every measuring loop and
quadrilateral/mho characteristic. There are no specific reach settings for this circular zone. It
uses the normal quadrilateral/mho zone settings to determine a reach that will be
appropriate. This implies that the circular characteristic will always have somewhat shorter
reach than the quadrilateral/mho zone.
8.11.7.3 Phase-selection element GUID-1E718907-C321-4041-B0ED-D55104B2C9B4 v6
The operation of the phase-selection element is primarily based on current change criteria (i.e.
delta quantities) with significantly increased dependability. To handle this, there is also a

Technical manual
phase selection criterion operating in parallel which bases its operation only on voltage and
current phasors.
This continuous criteria will, in the vast majority of cases, operate in parallel and carry on the
fault indication after the current change phase has ended. Only in some particularly difficult
faults on heavily loaded lines, the continuous criteria might not be sufficient, for example,
when the estimated fault impedance resides within the load area defined by the load
encroachment characteristic. In this case, the indication will be restricted to a pulse lasting for
one or two power system cycles.
The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-earth faults on heavily loaded lines. One exception, however,
are three-phase faults to which the load encroachment characteristic always has to be applied
in order to distinguish fault from load.
Phase-to-phase-earth faults (also called double earth faults) will practically always activate
phase-to-phase zone measurements. Measurement in two phase-to-earth loops at the same
time is associated with so-called simultaneous faults: two earth faults at the same time, one
each on the two circuits of a double line, or when the zero sequence current is relatively high
due to a source with low Z0/Z1 ratio. In these situations zone measurement will be released
both for the related phase-to-earth loops and the phase-to-phase loop simultaneously. On the
other hand, simultaneous faults closer to the remote bus will gradually take on the properties
of a phase-to-phase-earth fault and the function will eventually use phase-to-phase zone
measurements also here.
In cases where the fault current infeed is more or less completely of zero sequence nature (all
phase currents in phase), the measurement will be performed in the phase-to-earth loops only
for a phase-to-phase-earth fault.
AND
2-phase Fault
I3P detected by
Impedance/ current
2-phase fault
U3P PHSLy
based Phase AND
selection
PHSLxLy
AND
a
b
a>b
250%
OR
a
b a>b
50% AND OR
a
b
a<b
INMag
IL1Mag IN / Imax
IL2Mag
MAX
IL3Mag a ForcePE
b
a<b
INReleasePE
Figure 164: Phase-selection logic
Figure 164 explains the release of two-phase faults (including simultaneous

faults as well as cross-country faults for high impedance earthed networks.
This is not valid for single-phase faults.
However, should it be desirable to use phase-to-earth (and only phase-to-earth) zone

measurement for phase-to-phase-earth faults, there is a setting INReleasePE that can be
lowered from its excessive default value to the level above which phase-to-earth measurement
should be activated.

Technical manual
8.11.7.4 Directional criteria GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v5
Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra
security, especially in making a very fast decision, this method is complemented with an
equivalent comparison where, instead of the phase current, the change in phase current is
used. Moreover, a basic negative sequence directional evaluation is taken into account as a
reliable reference during high load condition. Finally, a zero sequence directional evaluation is
used whenever there is more or less exclusive zero sequence in-feed.
The directional sectors that represent forward direction, one per measuring loop, are defined
by the following equations.
U PolL1
−15° < arg < 120°
I L1
U PolL1L 2
−15° < arg < 120°
I L1L 2
Where:
UPolL1 is the polarizing voltage for phase L1.
IL1 is the phase current in phase L1.
UPolL1L2 is the polarizing voltage difference between phase L1 and L2 (L2 lagging L1).
IL1L2 is the current difference between phase L1 and L2 (L2 lagging L1).
The corresponding reverse directional sectors range from 165 to -60 degrees.
Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude
of the voltage is just as interesting as the phase. If there are symmetrical conditions and the
measured per phase positive sequence voltage magnitude is above 75% of the base voltage
before the fault, the pre-fault magnitude will be memorized and used as long as there is a
fault. The phase angle however will only be memorized (locked) for 75 ms at a time, not to lose
synchronism with the real system voltage.
Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and starts from Mho elements will be sealed-in and
kept static as long as there is a fault.
For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty
phases will be discarded in order not to affect the polarizing voltage with voltage reversal.
8.11.7.5 Fuse failure GUID-FA7B94D6-8BAF-4D05-8DC0-7FEBF0967D16 v3
The ZMFPDIS function has to be blocked by an additional function like the Fuse failure
supervision (FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is
used for this purpose.
A built-in supervision feature within high-speed distance protection itself, based on phase
current change, will ensure that the FUFSPVC blocking signal is received in time. Namely, an
intentional time delay will be introduced if no current magnitude change greater than 5% of
IBase has been detected for any of the three phase currents.

Technical manual
8.11.7.6 Power swings GUID-4DFED278-014F-46C2-B124-2E0809D12FC3 v2
There is need for external blocking of the ZMFPDIS function during power swings, either from
the Power Swing Blocking function (ZMRPSB) or an external device.
8.11.7.7 Measuring principles
Quadrilateral characteristic GUID-32E76D16-41ED-4CEF-B081-8413211AA783 v8

ZMFPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone
to work as quadrilateral distance protection.
All ZMFPDIS zones operate according to the non-directional impedance characteristics

presented in figure 166 and figure 165. The phase-to-earth characteristic is given in ohms-per-
loop domain while the phase-to-phase characteristic is given in ohms-per-phase domain.
The voltage and current phasors after the half-cycle filter are used in fault loop equations.
For phase-to-phase faults (Figure 167, lower part), the calculated impedances from the relay to
the fault Z calc  Rcalc  j  X calc follow Equation 70 (example is given for a phase L1 to phase L2
fault).
 
U L1  U L 2  I L1  I L 2  Z calc 
Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase
quadrilateral characteristics defined by the reactance reaches (X1PPZ1 or X1Zx, where x = 2 to 5
or RV), resistance reaches (R1PPZ1 or R1Zx, where x = 2 to 5 or RV) for the zones, as well as the
fault resistance reach setting for phase-to-phase loops (RFPPZx, where x = 1 to 5 or RV) as
shown in Figure 165. If is inside the non- directional phase-to-phase characteristic and the
phase selection algorithm enables this loop, the STNDZx output is set to TRUE.
For phase-to-earth faults (Figure 167, upper part), the earth return compensation applies
according to Equation 71 (example for a phase L1 to earth fault).
 
U L1  I L1  K N  3I 0  p  Z1  I F  RF
Where,
p is the fault location and RF is the calculated fault resistance. p and RF are unknown and
needs to be solved.
is the zero-sequence current.
is the ground compensation factor and it is defined as:
Z 0  Z1
KN 
3  Z1
Z 0  R 0 Zx  j  X 0 Zx
Z1  R1Zx  j  X 1Zx
Where,

Technical manual
is the set complex zero sequence impedance of the line in Ω/phase.
is the set complex positive sequence impedance of the line in Ω/phase.
is the positive sequence reactance reach of the line in Ω/phase for phase-to-earth fault
for zone x (x = 1 to 5, or RV).
is the positive sequence resistive reach of the line in Ω/phase for phase-to-earth fault for
zone x (x = 1 to 5, or RV).
is the zero sequence reactance reach of the line in Ω/phase for zone x (x = 1 to 5, or RV).
is the zero sequence resistive reach of the line in Ω/phase for zone x (x = 1 to 5, or RV).
Table 190: Settings of positive and zero sequence impedances for different zones
Zones Pos. Seq. X Pos. Seq. R Zero. Seq. X Zero. Seq. R
Zone 1 X1PEZ1 R1PEZ1 X0Z1 R0Z1
Zone 2 X1Z2 R1Z2 X0Z2 R0Z2
Zone RV X1ZRV R1ZRV X0ZRV R0ZRV
is the fault current. It is chosen among phase, zero or negative sequence currents
automatically by the built-in adaptive load compensation algorithm.
The calculated impedances from the relay to the fault Z calc  Rcalc  j  X calc can be represented
as:
X calc  p  X 1Zx
Rcalc  p  R1Zx  RF
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-earth
quadrilateral characteristics defined by the reactance reaches (X1PEZ1 or X1Zx, where x = 2 to 5
or RV), resistance reaches (R1PEZ1 or R1Zx, where x = 2 to 5 or RV) for the zones, as well as the
fault resistance reach setting for the phase-earth loops (RFPEZx, where x = 1 to 5 or RV) as
shown in Figure 166. If is inside the non-directional phase-to-earth characteristic and the
phase selection algorithm enables this loop, the STNDZx output is set to TRUE.
Zone 1 has individual positive sequence impedance settings for phase-to-phase and phase-to-
earth (X1PPZ1, R1PPZ1 and X1PEZ1, R1PEZ1). For the other zones, the positive sequence
impedance reach is common for phase-to-phase and phase-to-earth (X1Zx, R1Zx).

Technical manual
X (Ohm/phase)
RFPPZx R1Zx RFPPZx

2 2
X1Zx
R (Ohm/phase)
RFPPZx RFPPZx
2 2
X1Zx
RFPPZx R1Zx RFPPZx

2 2
Figure 165: ZMFPDIS Characteristic for phase-to-phase measuring, ohm/loop domain
X (Ohm/loop)
R1Zx+RNZx
RFPEZx RFPEZx
X0Zx-X1Zx
XNZx=
3
X1Zx+XNZx R0Zx-R1Zx
RNZx=
3
φN φN
R (Ohm/loop)
RFPEZx RFPEZx
X1Zx+XNZx
RFPEZx RFPEZx
R1Zx+RNZx IEC11000415-2-en.vsdx
Figure 166: ZMFPDIS Characteristic for phase-to-earth measuring, ohm/loop domain

Technical manual
The faulty loop in relation to the fault type can be presented as in figure 167. The main
intention with this illustration is to make clear how the fault resistive reach should be
interpreted and set. Note in particular that the setting RFPPZx always represents the total
fault resistance of the loop, regardless the fact that the fault resistance (arc) may be divided
into parts like for three-phase or phase-to-phase faults. The R1Zx + jX1Zx represent the
positive sequence impedance from the measuring point to the fault location.
IL1 R1Zx + j X1Zx

Phase-to-earth
UL1
element
Phase-to-earth
RFPEZx
fault in phase L1
(Arc + tower
resistance)
0
IN (R0Zx-R1Zx)/3 +
j (X0Zx-X1Zx)/3 )
IL1 R1Zx + j X1Zx Phase-to-phase

UL1 element L1-L2
Phase-to-phase
fault in phase RFPPZx
L1-L2 IL2
R1Zx + j X1Zx
IL1 R1Zx + j X1Zx 0.5·RFPPZx Phase-to-phase

UL1 element L1-L3
Three-phase
fault or Phase-to-
phase-earth fault IL3
UL3
R1Zx + j X1Zx 0.5·RFPPZx



Technical manual
X (ohm)
X1PP’
X1PP
15° R (ohm)
-X1PP RFPP/2
R· tan15°
-X1PP’
Mho characteristic GUID-9269239B-3A04-44CD-BE00-FD850D42836B v2

ZMFPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop
in a zone to work as mho (or Offset Mho) distance protection.
Zones 3 to 5 can be selected to be either forward or reverse with positive sequence polarized
mho characteristic; alternatively self polarized offset mho characteristics. The operating
characteristic is in accordance to figure 169 where zone 5 is selected offset mho.
X
X
Z4
Z3
ZS=0
Z2
Z1 R
Z5 R
ZS=Z1
ZRV
ZS=2Z1
Figure 169: Mho, offset mho characteristics and the source impedance influence on the
mho characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of
crossing the origin, as for the mho to the left of figure 169, which is only valid where the source
impedance (Zs) is zero, the crossing point is moved to the coordinates of the negative source
impedance given an expansion of the circle shown to the right of figure 169. Z1 denotes the
complex positive sequence impedance.
The magnitude of the polarizing voltage is determined completely by the positive sequence
voltage magnitude from before the fault. This will give a somewhat less dynamic expansion of

Technical manual
the mho circle during faults. However, if the source impedance is high, the dynamic expansion
of the mho circle might lower the security of the function too much with high loading and mild
power swing conditions.
Basic operation characteristics GUID-E6CC3CA7-72BE-40FC-A557-7BDB62F7BC1E v2

In ZMFPDIS, each zone measurement loop characteristic can be set to mho characteristic or
offset mho characteristic by setting OpModePEZx or OpModePPZx (where x is 1-5 depending
on selected zone).
ZMFPDIS fixes zone 1 and 2 in Forward mode and zone RV in Reverse mode. Zone 3-5 can be set
to Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x is 3-5
depending on selected zone).
If DirModeZx (where x is 3-5 depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the
function. When DirModeZx (where x is 3-5 depending on selected zone) is selected as Forward
or Reverse, directional lines are introduced. Information about the directional lines is given
from the directional element. Basic Mho and offset Mho characteristics with different mode
settings are indicated in figure 170.
X X X
(a) Rset (b) (c) Rset
Xset Xset
R R R
Xset
(a)-(f)
Rset For phase-to-phase fault
Rset  R1Zx
Forward Reverse Non-directional
Xset  X 1Zx
Mho Characteristics For phase-to-earth fault
Rset  R1Zx  RNZx
Xset  X 1Zx  XNZx
(d) X
(e) X (f) X X 0 Zx  X 1Zx
XNZx 
3
R 0 Zx  R1Zx
RNZx 
Rset 3
Rset Rset
Xset Xset Xset
R R R
Xset Xset Xset
Rset Rset Rset

Offset Mho Characteristics
(a) and (c) are for Zone 1, Zone 2 and Zone 3-5 when DirModeZ3-5 = Forward.
(b) and (d) are for ZoneRV and Zone 3-5 when DirModeZ3-5 = Reverse
(c) and (f) are for Zone 3-5 when DirModeZ3-5 = Non-Directional
Figure 170: Mho and offset Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which
is the same as for quadrilateral characteristic.
The ZMFPDIS function has only one set of reach setting so the reverse will be the same as for
the forward reach, meaning that the non-directional offset mho characteristic will always be
centered around the origin. In detail, for Zone 1, the resistive and reactance reaches for phase-

Technical manual
to-earth fault and phase-to-phase fault are set individually using the settings R1PPZ1, X1PPZ1,
R1PEZ1, X1PEZ1, X0Z1 and R0Z1. In Zone 2-5 and Zone RV, the same zone reach settings are
used for phase-to-earth fault and phase-to-phase (R1Zx, X1Zx, X0Zx and R0Zx, x=2-5 or RV).
Theory of operation SEMOD154224-46 v6

Phase-to-phase fault SEMOD154224-240 v2

Mho GUID-D162893C-918A-4DDA-AAC2-0D0A814D85C1 v1
The plain Mho circle has the characteristic as in figure 171. The condition for deriving the angle
(
β = arg U L1L 2 − I L1L 2 ⋅ Z 1set − arg U pol ) ( )
where

EQUATION1790 V2
EN-US

EQUATION1791
EN-US V2
is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set
For Zone 1,
Z 1set = R1PPZ 1 + j ⋅ X 1PPZ 1

where
R1PPZ1 is the positive sequence resistive reach for phase-to-phase fault for zone 1
X1PPZ1 is the positive sequence reactance reach for phase-to-phase fault for zone 1
For Zone 2-5 and RV
Z 1set = R1Zx + j ⋅ X 1Zx

where
R1Zx is the positive sequence resistive reach for zone x (x=2-5 and RV)
X1Zx is the positive sequence reactance reach for zone x (x=2-5 and RV)
is the polarizing voltage
Upol
Operation occurs if 90°≤β≤270°

Technical manual
IL1L2  jX
I L1L 2  Z1set
UcompUL1L2 IL1L2 Z1set
UL1L2
U pol
I L1L 2  R
Offset Mho GUID-3E13E6D5-0832-4386-9677-9A40BFF42F8F v2
The characteristic for offset mho is a circle with origin as the center and magnitude of Z 1set
as the radius, where Z 1set is settable through the resistance and reactance settings.
compensated voltages is greater than or equal to 90° (figure 172). The angle will be 90° for
fault location on the boundary of the circle.
The angle β for L1 to L2 fault can be defined according to equation below.
 U 
L1L 2  I L1L 2  Z 1set
  arg  
 
 U L1L 2   I L1L 2  Z1set  


Technical manual
I L1L 2  jX
U comp1  U L1L 2  I L1L 2  Z1set
I L1L 2  Z1set
U L1L 2
U comp 2  U L1L 2  ( I L1L 2  Z1set )
I L1L 2  R
I L1L 2  Z1set
Figure 172: Simplified offset mho characteristic and voltage vector for phase L1 to L2
fault
Operation occurs if 90°≤β≤270 °.
Phase-to-earth fault GUID-DB8CF641-0D3F-4F7A-A628-829F3DB0AC5B

SEMOD154224-283 v2
v1
The measuring of earth faults uses earth return compensation applied in a conventional way.
The compensation voltage is derived by considering the influence from the earth return path.
Compensation for earth return path for faults involving earth is done by setting the positive
and zero sequence impedance of the line. It is known that the ground compensation factor KN
is,
Z 0set − Z 1set
KN =
3 ⋅ Z 1set
Z 0set = R 0Zx + j ⋅ X 0 Zx
For Zone 1,
Z 1set = R1PEZ 1 + j ⋅ X 1PEZ 1
For Zone 2-5 and RV,

Z 1set = R1Zx + j ⋅ X 1Zx

Technical manual
where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
is the complex positive sequence impedance of the line in Ω/
Z 1set phase
R1PEZ1 is the positive sequence resistive reach of the line in Ω/phase
for phase-to-earth fault for zone 1
X1PEZ1 is the positive sequence reactance reach of the line in Ω/phase
for phase-to-earth fault for zone 1
R0Zx is the zero sequence resistive reach of the line in Ω/phase for
zone x (x=2-5, or RV)
X0Zx is the zero sequence reactance reach of the line in Ω/phase for
zone x (x=2-5, or RV)
For an earth fault in phase L1, the angle β between the compensation voltage and the
polarizing voltage Upol is,
β = arg [U L1 − ( I L1 + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(U pol )

where
is the phase voltage in faulty phase L1
UL1
is the phase current in faulty phase L1
IL1

Z 1set phase for phase-to-earth fault in zone direction
is the polarizing voltage for phase L1

Upol

Technical manual
IL1•jX
UcompUL1 (IL1 3I0 KN )  Z1set

3I0KN Z1set
U L1
I L1  Z1set
U pol
IL1•R
fault
Operation occurs if 90°≤β≤270°.
Offset mho GUID-B1EF3931-7B86-4C7B-BCEA-3034482BA240 v3

The condition for operation of offset mho at phase-to-earth fault is that the angle β between
the two compensated voltages is equal to or greater than 90°, see figure 174. The angle will be
90° for fault location on the boundary of the circle.
   
  arg U L1  ( I L1  3I 0  K N )  Z1set  arg U L1   ( I L1  3I 0  K N )  Z1set 

Technical manual
IL1• jX
U comp1  U L1  ( I L1  3I 0 K N ) Z1set

( I L1  3I 0 K N ) Z1set
U L1
U comp 2  U L1  (( I L1  3I 0 K N ) Z1set )
IL1• R
( I L1  3I 0 K N ) Z1set
Figure 174: Simplified offset mho characteristic and voltage vector for phase L1-to-earth
fault
Operation occurs if 90 °≤β≤270 °.
8.11.7.8 Load encroachment GUID-6785BF05-2775-4422-8077-A663D01C6C07 v6
In some cases the measured load impedance might enter the set zone characteristic without
any fault on the protected line. This phenomenon is called load encroachment and it might
occur when an external fault is cleared and high emergency load is transferred onto the
protected line. The effect of load encroachment is illustrated on the left in figure 175. A load
impedance within the characteristic would cause an unwanted trip. The traditional way of
avoiding this situation is to set the distance zone resistive reach with a security margin to the
minimum load impedance. The drawback with this approach is that the sensitivity of the
protection to detect resistive faults is reduced.
The IED has a built in feature which shapes the characteristic according to the characteristic
shown in figure 175. The load encroachment algorithm will increase the possibility to detect
high fault resistances, especially for phase-to-earth faults at the remote line end. For example,
for a given setting of the load angle ArgLd, the resistive blinder for the zone measurement can
be set according to figure 175 affording higher fault resistance coverage without risk for
unwanted operation due to load encroachment. Separate resistive blinder settings are
available in forward and reverse direction.

Technical manual
The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity
of the distance protection. The function can also preferably be used on heavy loaded, medium
long lines. For short lines, the major concern is to get sufficient fault resistance coverage. Load
encroachment is not a major problem. .
Z1
ArgLd
[1]
RLdRv RLdFw
Figure 175: Load encroachment phenomena and shaped load encroachment

characteristic
[1]
8.11.7.9 Simplified logic schemes GUID-B43F2F0B-C8A2-4CFD-A9DD-51E167A90B56 v5
PHSL1, PHSL2,...PHSL3L1 are internal binary logical signals from the Phase-selection element.
They correspond directly to the six loops of the distance zones and determine which loops
should be released to operate.
FWL1, FWL2,...FWL3L1 and RVL1, RVL2,...RVL3L1 are the internal binary signals from the
Directional element. An FW signal is activated if the criteria for a forward fault or load is
fulfilled for its particular loop. The equivalent applies to the reverse (RV) signals.
The internal input 'IN present' is activated if the residual current (3I0) exceeds 10% of the
maximum phase current magnitude and at the same time is above 5% of IBase. However, if
current transformer saturation is detected, this criterion is changed to residual voltage (3U0)
exceeding 5% of UBase/sqrt(3) instead.
[1] RLdRv=RLdRvFactor*RLdFw

Technical manual
FW(Ln & LmLn)
FW(Ln & LmLn)
RV(Ln & LmLn)
DirModeZ3-5
TRUE (1)
FW(Ln & LmLn) Forward
RV(Ln & LmLn) Reverse
Figure 176: Connection of directional signals to Zones
ZML1Zx PEZx
OR
PHSL1
AND
DIRL1Zx AND
ZML2Zx
PHSL2
AND
DIRL2Zx AND
ZML3Zx L1Zx
OR
PHSL3
AND
DIRL3Zx AND
ZML1L2Zx L2Zx
PHSL1L2 OR
AND
DIRL1L2Zx AND
ZML2L3Zx
PHSL2L3 L3Zx
AND OR
DIRL2L3Zx AND
ZML3L1Zx
PHSL3L1
AND
DIRL3L1Zx AND
L1N
PPZx
L2N OR
L3N
RELCNDZx Integer L1L2
to Bool
L2L3
NDZx
L1L3 OR
Figure 177: Intermediate logic

Technical manual
TimerModeZx =
Enable PhPh or
Ph-E PhPh
PPZx AND tPPZx
OR AND
AND t
PEZx
AND tPEZx OR
OR
AND t
AND
BLOCK
VTSZ
BLKZx OR
BLKTRZx
OR TimerLinksZx
LoopLink (tPP-tPE)
ZoneLinkStart LoopLink & ZoneLink
OR
Phase Selection No Links
1st starting zone
External start FALSE (0)
LNKZ2
LNKZx
AND
OR
TimerLinksZx =
LNKZ4 LoopLink & ZoneLink
LNKZ5
EXTNST
Figure 178: Logic for linking of timers
15 ms
TZx
t TRIPZx
AND
TRL1Zx
OR AND
BLOCK
VTSZ TRL2Zx
OR AND
BLKZx
TRL3Zx
AND
15 ms
L1Zx
t STL1Zx
AND
15 ms
L2Zx
t STL2Zx
AND
15 ms
t STL3Zx
AND
PPZx 15 ms
PEZx OR t STARTZx
AND
15 ms
NDZx
t STNDZx
AND
Figure 179: Start and trip outputs

Technical manual
15 ms
OR t STPE
AND
15 ms
OR t
AND
15 ms
OR t STNDL2
PHSL1L2 AND
15 ms
OR t STNDL3
AND
15 ms
OR t STPP
AND
BLOCK STARTND
OR
VTSZ OR
STPHS
STNDPE
AND
Figure 180: Additional start outputs 1
PHSL1
FWL1 AND
15 ms
FWL2 AND OR t
AND
FWL3 AND 15 ms
PHSL1L2 OR t STFWL2
AND
FWL1L2 AND
PHSL2L3 15 ms
FWL2L3 AND OR t STFWL3
AND
FWL3L1 AND
OR
STFWPE
IN present AND
STFW1PH
=1
BLOCK
VTSZ OR
STFW2PH
=2
STFW3PH
=3

Technical manual
PHSL1
RVL1 AND
15 ms
RVL2 AND OR t
AND
RVL3 AND 15 ms
PHSL1L2 OR t STRVL2
AND
RVL1L2 AND
PHSL2L3 15 ms
RVL2L3 AND OR t STRVL3
AND
RVL3L1 AND
OR
STRVPE
IN present AND
BLOCK
VTSZ OR
8.11.7.10 Measurement
Measurement supervision SEMOD54417-130 v4

The protection, control, and monitoring IEDs have functionality to measure and further
process information for currents and voltages obtained from the pre-processing blocks. The
number of processed alternate measuring quantities depends on the type of IED and built-in
options.
The information on measured quantities is available for the user at different locations:
• Locally by means of the local HMI

• Remotely using the monitoring tool within PCM600 or over the station bus
• Internally by connecting the analogue output signals to the Disturbance Report function
GUID-8568A19F-0100-4A1A-B3C3-444FD7D6F00B v1
X equals Z in the name of the below mentioned settings.
Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

Measured value below zero point clamping limit is forced to zero. This allows the noise in the
input signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals
Z).
Continuous monitoring of the measured quantity SEMOD54417-140 v5

Users can continuously monitor the measured quantity available in the function block by
means of four defined operating thresholds, see figure 183. The monitoring has two different
modes of operating:
• Overfunction, when the measured quantity exceeds the High limit (XHiLim) or High-high
limit (XHiHiLim) pre-set values
• Underfunction, when the measured quantity decreases under the Low limit (XLowLim) or
Low-low limit (XLowLowLim) pre-set values.

Technical manual
X_RANGE is illustrated in figure 183.
Y = Magnitude of the Measured Quantity
X_RANGE = 3
High-high limit
X_RANGE= 1 Hysteresis
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4
Figure 183: Presentation of operating limits

Each analogue output has one corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4 (0: Normal, 1: High limit exceeded, 3: High-high limit
exceeded, 2: below Low limit and 4: below Low-low limit).
The logical value of the functional output signals changes according to figure 183.
The user can set the hysteresis (XLimHyst), which determines the difference between the
operating and reset value at each operating point, in wide range for each measuring channel
separately. The hysteresis is common for all operating values within one channel.
Actual value of the measured quantity SEMOD54417-150 v4

The actual value of the measured quantity is available locally and remotely. The measurement
is continuous for each measured quantity separately, but the reporting of the value to the
higher levels depends on the selected reporting mode. The following basic reporting modes
are available:
• Cyclic reporting (Cyclic)

• Amplitude dead-band supervision (Dead band)
• Integral dead-band supervision (Int deadband)
• Amplitude Deadband and 5s cyclic
• Amplitude Deadband and 1min cyclic
Cyclic reporting SEMOD54417-158 v3

The cyclic reporting of measured value is performed according to chosen setting (XRepTyp).
The measuring channel reports the value independent of amplitude or integral dead-band
reporting.
In addition to the normal cyclic reporting the IED also report spontaneously when measured
value passes any of the defined threshold limits.

Technical manual
Y
Value Reported Value Reported
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5
(*)Set value for t: XDbRepInt IEC05000500-2-en.vsdx
Figure 184: Periodic reporting
Amplitude dead-band supervision SEMOD54417-163 v6

If a measuring value is changed, compared to the last reported value, and the change is larger
than the ±ΔY pre-defined limits that are set by user (XDbRepInt), then the measuring channel
reports the new value to a higher level. This limits the information flow to a minimum
necessary. Figure 185 shows an example with the amplitude dead-band supervision. The
picture is simplified: the process is not continuous but the values are evaluated with a time
interval of one execution cycle from each other.

Technical manual
Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1
Figure 185: Amplitude dead-band supervision reporting

After the new value is reported, the ±ΔY limits for dead-band are automatically set around it.
The new value is reported only if the measured quantity changes more than defined by the ±ΔY
set limits.
Integral dead-band reporting SEMOD54417-167 v4

The measured value is reported if the time integral of all changes exceeds the pre-set limit
(XDbRepInt), figure 186, where an example of reporting with integral dead-band supervision is
shown. The picture is simplified: the process is not continuous but the values are evaluated
with a time interval of one execution cycle from each other.
The last value reported, Y1 in figure 186 serves as a basic value for further measurement. A
difference is calculated between the last reported and the newly measured value and is
multiplied by the time increment (discrete integral). The absolute values of these integral
values are added until the pre-set value is exceeded. This occurs with the value Y2 that is
reported and set as a new base for the following measurements (as well as for the values Y3,
Y4 and Y5).
The integral dead-band supervision is particularly suitable for monitoring signals with small
variations that can last for relatively long periods.

Technical manual
Y A1 >=
A >= pre-set value
A2 >=
pre-set value pre-set value
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value Reported Y4 A3 A5 A7
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
Figure 186: Reporting with integral dead-band supervision
Measurement ZMMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v4

The magnitude and angle of the impedance for each phase-to-earth and phase-to-phase loop
are available on local HMI, monitoring tools within PCM600 or to the station level, for example,
via IEC61850.
Phase-to-earth impedance measurement is calculated based on UL1/ IL1 , UL2 / IL2 , UL3 / IL3
and phase-to-phase impedance is calculated based on U L1 

 UL 2 / IL1  IL 2 ,
U L2 
 UL 3 / IL 2  IL 3  , U
L3 
 UL1 / IL 3  IL1  , where U LX and ILX are phase-to-earth
voltage and phase current.
When the operating current is too low, the impedance measurement can be erroneous. To
avoid such error, minimum operating current will be checked. For phase-earth currents or
phase-phase currents lower than 2% of IBase, the resistance and reactance of the impedance
are forced to 99 999 ohm, corresponding to a magnitude at 141419 (99 999*√2) ohm and an
angle at 45 degree.

Technical manual

GUID-6C2EF52A-8166-4A23-9861-38931682AA7D v7
Table 191: ZMFPDIS, ZMFCPDIS technical data

Number of zones 3 selectable -
directions, 3 fixed
directions
Minimum operate current, Ph- (5-6000)% of IBase ±1.0% of Ir
Ph and Ph-E
Positive sequence reactance (0.01 - 3000.00) Pseudo continuous
reach, Ph-E and Ph-Ph loop ohm/p ramp:
±2.0% of set value
Positive sequence resistance (0.00 - 1000.00) Conditions:
reach, Ph-E and Ph-Ph loop ohm/p Voltage range: (0.1-1.1) x Ramp of shots:
Zero sequence reactance (0.01 - 9000.00) Ur ±2.0% of set value
reach ohm/p Current range: (0.5-30) x Conditions:
Ir IEC 60255-121 point B
Zero sequence resistive reach (0.00 - 3000.00) Angle: At 0 degrees and
ohm/p 85 degrees
Fault resistance reach, Ph-E (0.01 -9000.00) IEC 60255-121 points
and Ph-Ph ohm/l A,B,C,D,E
Dynamic overreach < 5% at 85 degrees -

measured with CVTs
and 0.5 < SIR < 30,
IEC 60255-121
Directional blinders Forward: -15 – 120 Pseudo continuous ramp:
degrees ±2.0 degrees, IEC 60255-121
Reverse: 165 – -60
degrees
Resistance determining the (0.01 - 5000.00) Pseudo continuous Ramp of shots:
load impedance area - forward ohm/p ramp: ±5.0% of set value
±2.0% of set value Conditions:
Conditions: Tested at ArgLd = 30
Tested at ArgLd = 30 degrees
degrees
Angle determining the load 5 - 70 degrees Pseudo continuous ramp:
impedance area ±2.0 degrees
Conditions:
Tested at RLdFw = 20 ohm/p
Definite time delay to trip, Ph- (0.000-60.000) s ±0.2% of set value or ±35 ms whichever is greater
E and Ph-Ph operation
Operate time 16 ms typically, IEC -
60255-121
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms

Technical manual
8.12 High speed distance protection for series

compensated lines ZMFCPDIS GUID-ED71CF5A-1453-4F2F-9C64-3A73C59EA948 v4
8.12.1 Identification GUID-0F03DA72-0687-4762-91CB-EC8E59B86E06 v2

High speed distance protection zone ZMFCPDIS 21
(zone 1-6)
Z
S00346 V2 EN-US
8.12.2 Functionality GUID-C5C1ADD8-50A5-4485-848C-77D2222B56DC v8
High speed distance protection (ZMFCPDIS) provides sub-cycle, down towards half-cycle,
operate time for basic faults within 60% of the line length and up to around SIR 5. At the same
time, it is specifically designed for extra care during difficult conditions in high voltage
transmission networks, like faults on long heavily loaded lines and faults generating heavily
distorted signals. These faults are handled with utmost security and dependability, although
sometimes with reduced operating speed.
High speed distance protection ZMFCPDIS is fundamentally the same function as ZMFPDIS but
provides more flexibility in zone settings to suit more complex applications, such as series
compensated lines. In operation for series compensated networks, the parameters of the
directional function are altered to handle voltage reversal.
The ZMFCPDIS function is a six-zone full scheme protection with three fault loops for phase-
to-phase faults and three fault loops for phase-to-earth faults for each of the independent
zones, which makes the function suitable in applications with single-phase autoreclosing.
In each measurement zone, ZMFCPDIS function is designed with the flexibility to operate in
either quadrilateral or mho characteristic mode for separate phase-to-ground or phase-to-
phase loops.
The zones can operate independently of each other. Zones 3 to 5 in directional (forward or
reverse) or non-directional mode. Zone1 and zone2 are designed to measure in forward
direction only, while one zone (ZRV) is designed to measure in the reverse direction. This
makes them suitable, together with a communication scheme, for protection of power lines
and cables in complex network configurations, such as parallel lines, multi-terminal lines, and
so on.
A new built-in adaptive load compensation algorithm prevents overreaching of the distance
zones in the load exporting end during phase-to-earth faults on heavily loaded power lines. It
also reduces underreach in the importing end.
The ZMFCPDIS function block incorporates a phase-selection element and a directional

element, contrary to previous designs in the IED series, where these elements were
represented with separate function blocks.
The operation of the phase-selection element is primarily based on current change criteria,
with significant increased dependability. There is also a part operating with continuous
criteria that operates in parallel.
The directional element utilizes a set of well-established quantities to provide fast and correct
directional evaluation during various conditions, including close-in three-phase faults,
simultaneous faults and faults with only zero-sequence in-feed.

Technical manual
The ZMFCPDIS function has another transient components based directional element with
phase segregated outputs STTDFwLx and STTDRVLx (where, x = 1-3), which are intended for
permissive overreaching transfer trip (POTT) scheme. It provides directionality with high
speed, dependability and security, which is also suitable for extra high voltage and series
compensated lines where the fundamental frequency signals are distorted.
8.12.3 Function block GUID-CBB51E18-15E5-4BC5-A002-6371A6DC725A v1
ZMFCPDIS
I3P* TRIP
U3P* TRZ1
BLOCK TRL1Z1
VTSZ TRL2Z1
BLKZ1 TRL3Z1
BLKZ2 TRZ2
BLKZ3 TRL1Z2
BLKZ4 TRL2Z2
BLKZ5 TRL3Z2
BLKZRV TRZ3
BLKTRZ1 TRZ4
BLKTRZ2 TRZ5
BLKTRZ3 TRZRV
BLKTRZ4 START
BLKTRZ5 STZ1
BLKTRZRV STNDZ1
BLKTD STZ2
EXTNST STL1Z2
RELCNDZ1 STL2Z2
RELCNDZ2 STL3Z2
RELCNDZ3 STNDZ2
RELCNDZ4 STZ3
RELCNDZ5 STNDZ3
RELCNDZRV STZ4
STNDZ4
STZ5
STNDZ5
STZRV
STL1ZRV
STL2ZRV
STL3ZRV
STNDZRV
STND
STNDL1
STNDL2
STNDL3
STNDPE
STFWL1
STFWL2
STFWL3
STFWPE
STRVL1
STRVL2
STRVL3
STRVPE
STFW1PH
STFW2PH
STFW3PH
STPE
STPP
STTDFWL1
STTDFWL2
STTDFWL3
STTDRVL1
STTDRVL2
STTDRVL3
Figure 187: ZMFCPDIS function block

Technical manual
8.12.4 Signals
Table 192: ZMFCPDIS Input signals

SIGNAL
SIGNAL
BLOCK BOOLEAN 0 Blocks and resets timers and outputs of entire function
VTSZ BOOLEAN 0 Blocks and resets timers and outputs of entire function
BLKZRV BOOLEAN 0 Blocks and resets reverse zone timers and outputs
BLKTRZRV BOOLEAN 0 Blocks and resets reverse zone timers and trip outputs
BLKTD BOOLEAN 0 Blocks transient direction outputs
EXTNST BOOLEAN 0 External start of zone timers
RELCNDZRV INTEGER 127 Release word for the measuring loops of zone RV
Table 193: ZMFCPDIS Output signals

TRIP BOOLEAN Trip in any phase or phases from any zone or zones

Technical manual

TRZRV BOOLEAN Trip in any phase or phases from zone RV - reverse direction
START BOOLEAN Start in any phase or phases from any zone or zones
STZRV BOOLEAN Start in any phase or phases from zone RV - reverse direction
STNDZRV BOOLEAN Start in any phase or phases from zone RV - any direction
STND BOOLEAN Fault detected in any phase or phases - any direction
STNDPE BOOLEAN Fault with earth connection detected in any phase or phases -
any direction
STFWPE BOOLEAN Fault with earth connection detected - forward direction
STRVPE BOOLEAN Fault with earth connection detected - reverse direction
STFW1PH BOOLEAN Single-phase fault detected - forward direction
STFW2PH BOOLEAN Two-phase fault detected - forward direction
STFW3PH BOOLEAN Three-phase fault detected - forward direction
STPE BOOLEAN Ph-E zone measurement enabled - any direction
STPP BOOLEAN Ph-Ph zone measurement enabled - any direction

Technical manual

STTDFWL1 BOOLEAN Fault detected in phase L1 by transient directional element -
forward direction
forward direction
forward direction
STTDRVL1 BOOLEAN Fault detected in phase L1 by transient directional element -
reverse direction
reverse direction
reverse direction
8.12.5 Settings
Table 194: ZMFCPDIS Non group settings (basic)

Value groups
ZDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
ZMax 0.0 - 5000.0 Ohm 0.1 1500.0 Maximum value in ohm
ZRepTyp Cyclic - - Cyclic Reporting type
Dead band
Int deadband
Dead band & 5s
Cyclic
Dead band & 30s
Cyclic
Dead band & 1min
Cyclic
ZAngDbRepInt 1 - 100000 Type 1 10 Cyclic report interval (s)
Table 195: ZMFCPDIS Group settings (basic)

On
OperationSC NoSeriesComp - - NoSeriesComp Selection of series compensation
SeriesComp operation Off / On
RLdFw 0.01 - 5000.00 Ohm/p 0.01 60.00 Resistance determining the load
impedance area - forward
RLdRvFactor 1 - 1000 %RLdF 1 100 Resistance factor determining the
w load impedance area - reverse
XLd 0.01 - 10000.00 Ohm/p 0.01 400.00 Reactance determining the load
impedance area
ArgLd 5 - 70 Deg 1 30 Angle determining the load
impedance area
CVTType Any - - Passive type CVT selection determining the
Passive type filtering of the function
None (Magnetic)

Technical manual

Mho
MhoOffset
Mho
MhoOffset
X1FwPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-Ph, zone 1, forward direction
R1FwPPZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone 1, forward direction
X1RvPPZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-Ph, zone 1, reverse direction
X1FwPEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-E, zone 1, forward direction
R1FwPEZ1 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
E, zone 1, forward direction
X0FwPEZ1 0.01 - 9000.00 Ohm/p 0.01 100.00 Zero sequence reactance reach, Ph-E,
zone 1, forward direction
R0FwPEZ1 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
X1RvPEZ1 0.01 - 3000.00 Ohm/p 0.01 30.00 Positive sequence reactance reach,
Ph-E, zone 1, reverse direction
1
Mho
MhoOffset
Mho
MhoOffset
Ph-Ph, zone 2, forward direction
Ph, zone 2, forward direction
Ph-Ph, zone 2, reverse direction
Ph-E, zone 2, forward direction
E, zone 2, forward direction

Technical manual

Ph-E, zone 2, reverse direction
2
Mho
MhoOffset
Mho
MhoOffset
Forward
Reverse
Ph-Ph, zone 3, zone direction
Ph, zone 3, zone direction
RFFwPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 3,
zone direction
Ph-Ph, zone 3, opposite to zone dir
RFRvPPZ3 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone 3,
opposite to zone direction
Ph-E, zone 3, zone direction
E, zone 3, zone direction
zone 3, zone direction
RFFwPEZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 3,
zone direction
Ph-E, zone 3, opposite to zone dir
RFRvPEZ3 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone 3,
3

Technical manual

Mho
MhoOffset
Mho
MhoOffset
Forward
Reverse
zone direction
zone direction
4
Mho
MhoOffset
Mho
MhoOffset

Technical manual

Forward
Reverse
zone direction
zone direction
5
OpModePPZRV Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-Ph loops, zone RV
Mho
MhoOffset
OpModePEZRV Off - - Quadrilateral On/Off and characteristic setting for
Quadrilateral Ph-E loops, zone RV
Mho
MhoOffset
X1FwPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
Ph-Ph, zone RV, reverse direction
R1FwPPZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
Ph, zone RV, reverse direction
RFPPZRV 0.01 - 9000.00 Ohm/l 0.01 30.00 Fault resistance reach, Ph-Ph, zone RV
X1RvPPZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
Ph-Ph, zone RV, forward direction
X1FwPEZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
Ph-E, zone RV, reverse direction
R1FwPEZRV 0.00 - 1000.00 Ohm/p 0.01 5.00 Positive sequence resistive reach, Ph-
E, zone RV, reverse direction

Technical manual

X0FwPEZRV 0.01 - 9000.00 Ohm/p 0.01 120.00 Zero sequence reactance reach, Ph-E,
zone RV, reverse direction
R0FwPEZRV 0.00 - 3000.00 Ohm/p 0.01 15.00 Zero sequence resistive reach, Ph-E,
zone RV, reverse direction
RFPEZRV 0.01 - 9000.00 Ohm/l 0.01 100.00 Fault resistance reach, Ph-E, zone RV
X1RvPEZRV 0.01 - 3000.00 Ohm/p 0.01 40.00 Positive sequence reactance reach,
Ph-E, zone RV, forward direction
tPPZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Phase, zone
RV
tPEZRV 0.000 - 60.000 s 0.001 0.000 Time delay to trip, Phase-Earth, zone
RV
IMinOpPPZRV 10 - 6000 %IB 1 10 Minimum operate Ph-Ph current for
Phase-Phase loops, zone RV
IMinOpPEZRV 5 - 6000 %IB 1 10 Minimum operate phase current for
Phase-Earth loops, zone RV
Table 196: ZMFCPDIS Non group settings (advanced)

ZZeroDb 0 - 100000 m% 100 0 Magnitude zero point clamping in
0,001% of range
ZHiHiLim 0.0 - 5000.0 Ohm 0.1 800.0 High High limit in ohm
ZHiLim 0.0 - 5000.0 Ohm 0.1 150.0 High limit in ohm
ZLowLim 0.0 - 5000.0 Ohm 0.1 50.0 Low limit in ohm
ZLowLowLim 0.0 - 5000.0 Ohm 0.1 35.0 Low Low limit in ohm
ZMin 0.000 - 5000.000 Ohm 0.001 0.005 Minimum value in ohm
ZLimHys 0.000 - 100.000 % 0.001 0.500 Hysteresis value in % of range and is
Table 197: ZMFCPDIS Group settings (advanced)

RLdFwMax 0.01 - 5000.00 Ohm/p 0.01 5000.00 Maximum used resistance
determining the load impedance area,
if RLdFw is greater than RLdFwMax
then RLdFw is set to RLdFwMax
RLdFwMin 0.01 - 5000.00 Ohm/p 0.01 0.01 Minimum used resistance determining
the load impedance area, if RLdFw is
less than RLdFwMin then RLdFw is set
to RLdFwMin
ArgLdMax 5 - 70 Deg 1 70 Maximum used angle determining the
load impedance area, if ArgLd is
greater than ArgLdMax then ArgLd is
set to ArgLdMax
ArgLdMin 5 - 70 Deg 1 5 Minimum used angle determining the
load impedance area, if ArgLd is less
than ArgLdMin then ArgLd is set to
ArgLdMin
ZoneLinkStart Phase Selection - - Phase Selection Selection of start source for all
1st starting zone ZoneLinked trip delay timers
INReleasePE 5 - 400 %MaxIP 1 400 3I0 limit for releasing Phase-to-Earth
h measuring loops

Technical manual

Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
Enable PhPh
Enable Ph-E PhPh
LoopLink &
ZoneLink
No Links
TimerModeZRV Disable all - - Enable Ph-E PhPh On/Off setting for Ph-Ph and Ph-E trip
Enable Ph-E output, zone RV
Enable PhPh
Enable Ph-E PhPh
TimerLinksZRV LoopLink (tPP & - - LoopLink (tPP & How start of trip delay timers should
tPE) tPE) be linked for zone RV
LoopLink &
ZoneLink
No Links

Technical manual

Table 198: ZMFCPDIS Monitored data

2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value
instantaneous value

Technical manual

instantaneous value
instantaneous value
instantaneous value
instantaneous value
8.12.7 Operation principle GUID-913A0692-F0A7-4B4B-83B4-AC2A96B3A989 v3
Settings, input and output names are sometimes mentioned in the following
text without its zone suffix (i.e. BLKZx instead of BLKZ3) when the description
is equally valid for all zones.
8.12.7.1 Filtering GUID-0EA39CA3-6CDA-41B0-A178-E5800868A0C5 v2
Practically all voltage, current and impedance quantities used within the ZMFCPDIS function
are derived from fundamental frequency phasors filtered by a half-cycle filter.
The phasor filter is frequency adaptive in the sense that its coefficients are changed based on
the estimated power system frequency.
A half-cycle filter will not be able to reject both even and odd harmonics. While odd harmonics
will be completely attenuated, accuracy will be affected by even harmonics. Even harmonics
will not cause the distance zones to overreach; instead there will be a slightly variable
underreach, on average in the same order as the magnitude ratio between the harmonic and
the fundamental component.
8.12.7.2 Distance measuring zones GUID-674FC410-9BA3-437E-8358-62E9B81D7B65 v3
The different fault loops within the IED are of full scheme type, which means that earth fault
loop for phase-to-earth faults and phase-to-phase faults for forward and reverse faults are
executed in parallel.
Figure 188 presents an outline of the different measuring loops for the six distance zones.

Technical manual
L1-N L2-N L3-N L1-L2 L2-L3 L3-L1

Zone RV
fault
Transients from CVTs may have a significant impact on the transient overreach of a distance
protection. At the same time these transients can be very diverse in nature from one type to
the other; in fact, more diverse than can be distinguished by the algorithm itself in the course
of a few milliseconds. So, a setting is introduced in order to inform the algorithm about the
type of CVT applied and thus providing the advantage of knowing how performance should be
optimized, even during the first turbulent milliseconds of the fault period.
There are two types of CVTs from the function point of view, the passive and the active type,
which refers to the type of ferro-resonance suppression device that is employed. The active
type requires more rigorous filtering which will have a negative impact on operate times.
However, this will be evident primarily at higher source impedance ratios (SIRs), SIR 5 and
above, or close to the reach limit.
The IEC 60044-5 transient classification is of little or no use in relation to this. It is not
primarily the damping of transients that is important; it is the frequency content of the
transients that is decisive, i.e. how difficult it is to filter out the specific frequency. So, even if
two CVTs, one passive and the other active type, comply with the same transient class, the
active type requires more extensive filtering in order to avoid transient overreach.
To avoid overreach and at the same time achieve fast operate times, a supplementary circular
characteristic that includes some alternative processing is implemented. One such circular
characteristic exists for every measuring loop and quadrilateral/mho characteristic. There are
no specific reach settings for this circular zone. It uses the normal quadrilateral/mho zone
settings to determine a reach that will be appropriate. This implies that the circular
characteristic will always have somewhat shorter reach than the quadrilateral/mho zone.
8.12.7.3 Phase-selection element GUID-2BCDB96F-39EE-4C14-9856-D23A4A1B6115 v5
The operation of the phase-selection element is primarily based on current change criteria.
The current change criteria itself can however only be relied on for a short period following the
fault inception (during what we will call the current change phase). Subsequent switching in
the network may render the change in current invalid. To handle this, the phase-selection
element also operates on continuous criteria.
The phase-selection element can, owing to the current change criteria, distinguish faults with
minimum influence from load and fault impedance. In other words, it is not restricted by a load
encroachment characteristic during the current change phase. This significantly improves
performance for remote phase-to-earth faults on heavily loaded lines. One exception, however,
is three-phase faults, for which the load encroachment characteristic always has to be applied,
in order to distinguish fault from load.

Technical manual
The continuous criteria will in the vast majority of cases operate in parallel and carry on the
fault indication after the current change phase has ended. Only in some particularly difficult
faults on heavily loaded lines the continuous criteria might not be sufficient, for example,
when the estimated fault impedance resides within the load area defined by the load
encroachment characteristic. In this case, the indication will be restricted to a pulse lasting for
one or two power system cycles.
Phase-to-phase-earth faults (also called double earth faults) will practically always activate
phase-to-phase zone measurements.Measurement in two phase-to-earth loops at the same
time is associated with so-called simultaneous faults: two earth faults at the same time, one
each on the two circuits of a double line, or when the zero sequence current is relatively high
due to a source with low Z0/Z1 ratio.In these situations zone measurement will be released
both for the related phase-to-earth loops and the phase-to-phase loop simultaneously. On the
other hand, simultaneous faults closer to the remote bus will gradually take on the properties
of a phase-to-phase-earth fault and the function will eventually use phase-to-phase zone
measurements also here.
In cases where the fault current infeed is more or less completely lack of zero sequence nature
(all phase currents in phase), the measurement will be performed in the phase-to-earth loops
only for a phase-to-phase-earth fault.
However, should it be desirable to use phase-to-earth (and only phase-to-earth) zone

measurement for phase-to-phase-earth faults, there is a setting INReleasePE that can be
lowered from its excessive default value to the level above which phase-to-earth measurement
should be activated.
8.12.7.4 Directional criteria GUID-24431EEC-5037-41CD-BC4A-7AC196F158F3 v5
Several criteria are employed when making the directional decision. The basis is provided by
comparing a positive sequence based polarizing voltage with phase currents. For extra
security, especially in making a very fast decision, this method is complemented with an
equivalent comparison where, instead of the phase current, the change in phase current is
used. Moreover, a basic negative sequence directional evaluation is taken into account as a
reliable reference during high load condition. Finally, a zero sequence directional evaluation is
used whenever there is more or less exclusive zero sequence in-feed.
The directional sectors that represent forward direction, one per measuring loop, are defined
by the following equations.
U PolL1
−15° < arg < 120°
I L1
U PolL1L 2
−15° < arg < 120°
I L1L 2
Where:
UPolL1 is the polarizing voltage for phase L1.
IL1 is the phase current in phase L1.
UPolL1L2 is the polarizing voltage difference between phase L1 and L2 (L2 lagging L1).
IL1L2 is the current difference between phase L1 and L2 (L2 lagging L1).
The corresponding reverse directional sectors range from 165 to -60 degrees.

Technical manual
Since the polarizing voltage is also used for the Mho distance characteristics, the magnitude
of the voltage is just as interesting as the phase. If there are symmetrical conditions and the
measured per phase positive sequence voltage magnitude is above 75% of the base voltage
before the fault, the pre-fault magnitude will be memorized and used as long as there is a
fault. The phase angle however will only be memorized (locked) for 75 ms at a time, not to lose
synchronism with the real system voltage.
Should the positive sequence voltage drop below 2% of the base voltage, it will be considered
invalid. In this situation, directional signals and starts from Mho elements will be sealed-in and
kept static as long as there is a fault.
For ZMFCPDIS, when option SeriesComp is chosen for OperationSC, the voltages of faulty
phases will be discarded in order not to affect the polarizing voltage with voltage reversal.
8.12.7.5 Transient directional element GUID-DE9C146F-CD20-4700-B6FF-B81B8DB47631 v1
The ZMFCPDIS function has another directional element with phase segregated outputs
STTDFwLx and STTDRVLx (where, x=1-3), which are intended for the permissive overreaching
transfer trip (POTT) scheme. It provides directionality with high speed, dependability and
security. It is also suitable for extra high voltage and series compensated lines where the
fundamental frequency signals are distorted. The transient directional element is based on the
changes in voltage and current signals due to a fault. The changes can be calculated by
subtracting the pre-fault voltage and current from the measured quantiles due to a fault as
shown below:
u  t   u  t   u p  t 
i  t   i  t   i p  t 
Where,
∆u(t) and ∆i(t) are the changes in voltage and current due to the fault.
u(t) and i(t) are the measured voltage and current during the fault.
up(t) and ip(t) are the pre-fault voltage and pre-fault current.
When the power network is under stable operation, ∆u(t) and ∆i(t) are negligible. When a fault
occurs, ∆u(t) and ∆i(t) become visible due to the changes in electrical state of the power
network. According to the superposition principle, after a forward fault, ∆u(t) and ∆i(t) are
opposite in sign. While after a reverse fault, ∆u(t) and ∆i(t) are of equal sign.
By inserting a proper replica impedance ZR into the measurement path, a replica delta voltage
ΔuR(t), which is approximately proportional to ∆i(t), is obtained by ΔuR(t) = Δi(t)*ZR. The replica
impedance is optimized in the design to make the relay characteristic angle at 60 degree.
Δu(t)*ΔuR(t) is negative for a forward fault, and positive for a reverse fault.
The operating quantity can be obtained using a simple waveform integration function:
N
2
F t     u  t   u  t    dt
0
R
Where, N is the number of samples per cycle.
Therefore, the directionality is determined according to the polarities of F(t) as below:
Forward, if F(t) is negative. i.e., F(t) < –Th–

Technical manual
Reverse, if F(t) is positive. i.e., F(t) > Th+
Where, Th– and Th+ are the thresholds for negative and positive polarities of F(t).
To enable good security, the reverse detector is more sensitive compared to the forward one
by a much lower magnitude of Th+ than Th–.
Due to the transient nature, directionality decisions are required to be made after a short
duration when the phase-selection element has detected a fault. Once the decision is made, it
issues directional indications with pulses of duration at about 3-4 cycles.
The transient element has a good sensitivity for the initial fault. In certain cases, for example, a
fault with extremely high fault resistance, where Δu(t) or Δi(t) are very low and the transient
directional element is not active, the fundamental frequency component based directional
elements (see Section Directional criteria) will be available after a certain delay.
8.12.7.6 Fuse failure GUID-AB0D0D20-EF27-4475-8EC5-A3BF69FC5802 v2
The ZMFCPDIS function has to be blocked by an additional function like the Fuse failure
supervision (FUFSPVC) or an equivalent external device. Typically, the binary input VTSZ is
used for this purpose.
However, to guarantee that also very fast operation is blocked in a fuse failure situation, there
is a built-in supervision based on change in current that will delay operation before the
FUFSPVC blocking signal is received. The delay will be introduced if no (vector) magnitude
change greater than 5% of IBase has been detected in any of the phase currents.
8.12.7.7 Power swings GUID-66627E0F-33AA-4570-9C27-4217EEECC2CE v1
There is need for external blocking of the ZMFCPDIS function during power swings, either from
the Power Swing Blocking function (ZMRPSB) or an external device.
8.12.7.8 Measurement principles
Quadrilateral characteristic GUID-E1366EA0-B04E-4180-BC4C-F042CC8FA8E2 v6

ZMFCPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx to Quadrilateral, to choose particular measuring loop in a zone
to work as quadrilateral distance protection.
All ZMFCPDIS zones operate according to the non-directional impedance characteristics

presented in figure 189 and figure 190. The phase-to-earth characteristic is illustrated with the
full loop reach while the phase-to-phase characteristic presents the per-phase reach.
The voltage and current phasors after the half-cycle filter are used in fault loop equations.
For phase-to-phase faults (Figure 191, lower part), the calculated impedances from the relay to
the fault Z calc  Rcalc  j  X calc follow Equation 83 (example is given for a phase L1 to phase L2
fault).
 
U L1  U L 2  I L1  I L 2  Z calc 
Where and represents the corresponding voltage and current phasors in the respective
phase Ln (n = 1, 2, 3).

Technical manual
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-phase
quadrilateral characteristics defined by the reactance reaches (X1FwPPZx and X1RvPPZx,
where x = 1 to 5 or RV), resistance reaches (R1FwPPZx, where x = 1 to 5 or RV) for the zones, as
well as the fault resistance reach setting for phase-to-phase loops ((RFPPZx, where x = 1, 2 or
RV), (RFFwPPZx and RFRvPPZx, where x = 3 to 5 or RV)), as shown in Figure 190. If is inside
the non-directional phase-to-phase characteristic, the STNDZx output is set to TRUE.
For phase-to-earth faults (Figure 191, upper part), the earth return compensation applies
according to Equation 84 (example for a phase L1 to earth fault).
 
U L1  I L1  K N  3I 0  p  Z1  I F  RF
Where,
p is the fault location and RF is the calculated fault resistance. p and RF are unknown and
needs to be solved.
is the zero-sequence current.
is the ground compensation factor and it is defined as:
Z 0  Z1
KN 
3  Z1
Z 0  R0 FwPEZx  j  X 0 FwPEZx
Z1  R1FwPEZx  j  X 1FwPEZx
Where,
is the set complex zero sequence impedance of the line in Ω/phase.
is the set complex positive sequence impedance of the line in Ω/phase.
R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase for phase-to-earth
fault in zone direction for zone x (x = 1 to 5 or RV).
X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase for phase-to-earth
fault in zone direction for zone x (x = 1 to 5 or RV).
R0FwPEZx is the zero sequence resistive reach of the line in Ω/phase for phase-to-earth fault
in zone direction for zone x (x = 1 to 5 or RV).
X0FwPEZx is the zero sequence reactance reach of the line in Ω/phase for phase-to-earth fault
in zone direction for zone x (x = 1 to 5 or RV).
is the fault current. It is chosen among phase, zero or negative sequence currents
automatically by the built-in adaptive load compensation algorithm.
The calculated impedances from the relay to the fault Z calc  Rcalc  j  X calc can be represented
as:
X calc  p  X 1FwPEZx
Rcalc  p  R1FwPEZx  RF
The calculated Rcalc and Xcalc are compared with the non-directional phase-to-earth
quadrilateral characteristics defined by the reactance reaches (X1FwPEZx or X1RvPEZx, where
x = 1 to 5 or RV), resistance reaches (R1RwPEZx, where x = 1 to 5 or RV) for the zones, as well as

Technical manual
the fault resistance reach setting for phase-to-earth loops ((RFPEZx, where x = 1, 2 or RV),
(RFFwPEZx and RFRvPEZx, where x = 3 to 5)), as shown in Figure 189. If is inside the non-
directional phase-to-earth characteristic, the STNDZx output is set to TRUE.
X (Ohm/loop)
X0FwPEZx , X1FwPEZx
XNFwZx <
R1FwPEZx+RNFwZx 3
X1RvPEZx
XNRvZx < XNFwZx √
RFRvPEZx RFFwPEZx X1FwPEZx
R0FwPEZx , R1FwPEZx
RNFwZx <
3
X1RvPEZx
RNRvZx < RNFwZx √
X1FwPEZx
X1RvPEZx
X1FwPEZx+XNFwZx R1RvPEZx < R1FwPEZx √
X1FwPEZx
ιN ιN
R (Ohm/loop)
1) 1)
RFRvPEZx RFFwPEZx
X1RvPEZx+XNRvZx
ιN
RFRvPEZx RFFwPEZx
R1RvPEZx + RNRvZx IEC11000417-3-en.vsd
Settings RFRvPEZx and RFFwPEZx exists for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPEZx is applicable for both forward and reverse direction.
Figure 189: ZMFCPDIS Characteristic for phase-to-earth measuring loops, ohm/loop

domain

Technical manual
R1FwPPZx
X (Ohm/phase)
RFRvPPZx RFFwPPZx
2 2
X1FwPPZx
ιN
R (Ohm/phase)
1) 1)
RFRvPPZx RFFwPPZx
2 2
X1RvPPZx
ιN
RFRvPPZx RFFwPPZx
2 2
X1RvPPZx IEC11000418-3-en.vsd
R1FwPPZx √
X1FwPPZx
Settings RFRvPPZx and RFFwPPZx exist for Zones 3 to 5.

1)
For Zone 1, 2 and RV, setting RFPPZx is applicable for both forward and reverse direction.
Figure 190: ZMFCPDIS Characteristic for the phase-to-phase measuring loops, ohm/
phase domain
Note that for ZMFCPDIS, the reverse zone ZRV, as well as any of zones 3-5, that
are set to DirMode=Reverse will get their operating impedances inverted
(rotated 180 degrees) internally in order to make use of the main settings,
which are the settings designated ‘Fw’. Therefore, a reverse zone will have its
Fw-settings (RFFwPPZRV, X1FwPEZ3, and so on) applied in the third quadrant,
that is, towards the busbar instead of the line.
The fault loop reach in relation to each fault type may also be presented as in figure 191. The
main intention with this illustration is to make clear how the fault resistive reach should be
interpreted. Note in particular that the setting RFPP [2] always represents the total fault
resistance of the loop, even while the fault resistance (arc) may be divided into parts like for
three-phase or phase-to-phase-to-earth faults. R1Zx and jX1Zx represent the positive sequence
impedance from the measuring point to the fault location.
[2] Represents all settings such as RFFwPPZRV, RFRvPPZ5 etc.

Technical manual
IL1 R1Zx + j X1Zx

Phase-to-earth
UL1
element
Phase-to-earth
RFPEZx
fault in phase L1
(Arc + tower
resistance)
0
IN (R0Zx-R1Zx)/3 +
j (X0Zx-X1Zx)/3 )
IL1 R1Zx + j X1Zx Phase-to-phase

UL1 element L1-L2
Phase-to-phase
fault in phase RFPPZx
L1-L2 IL2
R1Zx + j X1Zx
IL1 R1Zx + j X1Zx 0.5·RFPPZx Phase-to-phase

UL1 element L1-L3
Three-phase
fault or Phase-to-
phase-earth fault IL3
UL3
R1Zx + j X1Zx 0.5·RFPPZx



Technical manual
X (ohm)
X1PP’
X1PP
15° R (ohm)
-X1PP RFPP/2
R· tan15°
-X1PP’
Mho characteristic GUID-DA87F1BC-8037-4E14-96E0-03BCD98ED6F2 v1

ZMFCPDIS implements quadrilateral and mho characteristic in all the six zones separately. Set
OpModePEZx or OpModePPZx setting to Mho or Offset, to choose a particular measuring loop
in a zone to work as mho (or Offset Mho) distance protection.
Zones 3 to 5 can be selected to be either forward or reverse with positive sequence polarized
mho characteristic; alternatively self polarized offset mho characteristics. The operating
characteristic is in accordance to figure 193 where zone 5 is selected offset mho.
X
X
Z4
Z3
ZS=0
Z2
Z1 R
Z5 R
ZS=Z1
ZRV
ZS=2Z1
Figure 193: Mho, offset mho characteristics and the source impedance influence on the
mho characteristic
The mho characteristic has a dynamic expansion due to the source impedance. Instead of
crossing the origin, as for the mho to the left of figure 193, which is only valid where the source
impedance (Zs) is zero, the crossing point is moved to the coordinates of the negative source
impedance given an expansion of the circle shown to the right of figure 193. Z1 denotes the
complex positive sequence impedance.
The magnitude of the polarized voltage is determined completely by the positive sequence
voltage magnitude from before the fault. This will give a somewhat less dynamic expansion of

Technical manual
the mho circle during faults. However, if the source impedance is high, the dynamic expansion
of the mho circle might lower the security of the function too much with high loading and mild
power swing conditions.
Basic operation characteristics GUID-B9D7C3D8-811A-419B-8373-712EC122EB08 v2

In ZMFCPDIS, each zone measurement loop characteristic can be set to mho characteristic or
offset mho characteristic by setting OpModePEZx or OpModePPZx (where x is 1-5 depending
on selected zone).
ZMFCPDIS fixes zone 1 and 2 in Forward mode and zone RV in Reverse mode. Zone 3-5 can be
set to Non-directional, Forward or Reverse by setting the parameter DirModeZx (where x is 3-5
depending on selected zone).
If DirModeZx (where x is 3-5 depending on selected zone) is selected as Non-directional, the

directional element will not have any effect on the measurement loop and operation of the
function. When DirModeZx (where x is 3-5 depending on selected zone) is selected as Forward
or Reverse, directional lines are introduced. Information about the directional lines is given
from the directional element. Basic Mho and offset Mho characteristics with different mode
settings are indicated in figure 194.
X X
(a) Rset
X (c)
(b) Rset
(a), (b) and (c)

For Phase-to-Phase fault
Xset Rset=R1FwPPZx; Xset=X1FwPPZx
Xset For Phase-to-earth fault
Rset=R1FwPEZx+RNFwZx
Xset=X1FwPEZx+XNFwZx
R R R X 0 PEZx  X 1 FwPEZx
XNFwZx
3
R 0PEZx  R1 FwPEZx
RNFwZx
Xset 3
Rset
Mho Characteristics
(d), (e) and (f)

X (e) X (f) X For Phase-to-Phase fault
(d)
RsetFwZx=R1FwPPZx; XsetFwZx=X1FwPPZx
RsetFwZx RsetRvZx=R1RvPPZx; XsetFwZx=X1RvPPZx
RsetFwZx RsetFwZx
R1FwPPZx
R1RvPPZx  X 1 RvPPZx 
X 1FwPPZx
For Phase-to-Earth fault
XsetFwx XsetFwZx
XsetFwZx RsetFwZx  R1FwPEZx  RNFwZx
XsetFwZx  X 1FwPEZx  XNFwZx
R R R X 0FwPEZx  X 1FwPEZx
XNFwZx 
XsetRvZx 3
XsetRvZx XsetRvZx
R 0FwPEZx  R1FwPEZx
RNFwZx 
3
RsetRvZx RsetRvZx  R1RvPEZx  RNRvZx
RsetRvZx RsetRvZx
XsetRvZx  X 1RvPEZx  XNRvZx
R1 RvPEZx
RNRvZx  RNFwZx 
R1 FwPEZx
R1FwPEZx
Forward R1RvPEZx  X 1 RvPEZx 
Reverse Non-directional X 1FwPEZx
X 1RvPEZx
XNRvZx  XNFwZx 
X 1 FwPEZx
Offset Mho Characteristics
(a) and (c) are for Zone 1, Zone 2 and Zone 3-5 when DirModeZ3-5 = Forward
(b) and (d) are for ZoneRV and Zone 3-5 when DirModeZ3-5 = Reverse
(c) and (f) are for Zone 3-5 when DirModeZ3-5 = Non-Directional
IEC15000065‐2‐en.vsdx
Figure 194: Mho and offset Mho characteristics

For each zone, the impedance is set in cartesian coordinates (resistance and reactance) which
is the same as for quadrilateral characteristic.
ZMFCPDIS function uses separate sets of reach settings in forward and reverse directions for
phase-to-earth fault and phase-to-phase fault. These settings are R1FwPPZx, X1FwPPZx,
X1RvPPZx, R1FwPEZx, X1FwPEZx, X1RvPEZx, R0FWPEZx, X0FwPPZx (x=1-5 or RV). Thus, the
center of the Non-directional offset mho circle can be arbitrarily located in the circle (figure
194).

Technical manual
Note that the reverse ZoneRV, as well as any of zones 3-5, that are set to DirModeZx=Reverse
will get their operating impedances inverted (rotated 180 degrees) internally in order to make
use of the main settings, which are the settings designated ‘Fw’. Therefore, a reverse zone will
have its Fw-settings (R1FwPPZRV, X1FwPEZ3, and so on) applied in the third quadrant, that is,
towards the busbar instead of the line.
In Non-directional mode, for both Mho and Quad, the reach settings are equal to Forward
mode in this respect. The ‘Fw’ settings apply in the first quadrant and the ‘Rv’ settings apply in
the third quadrant.
Theory of operation SEMOD154224-46 v6

Phase-to-phase fault GUID-46762EB9-50CA-4045-9D39-80B604C66E0F

SEMOD154224-240 v2
The plain Mho circle has the characteristic as in figure 195. The condition for deriving the angle
( )
β = arg U L1L 2 − I L1L 2 ⋅ Z 1set − arg U pol ( )
where

EQUATION1790
EN-US V2

EQUATION1791
EN-US V2
is the positive sequence impedance setting for phase-to-phase fault in zone direction
Z 1set
is the polarizing voltage
Upol
Z 1set = R1FwPPZx + j ⋅ X 1FwPPZx

where:
R1FwPPZx is the positive sequence resistive reach for phase-to-phase fault in zone direction for zone x (x=1-5
and RV)
X1FwPPZx is the positive sequence reactance reach for phase-to-phase fault in zone direction for zone x
(x=1-5 and RV)
The polarized voltage consists of 100% memorized positive sequence voltage (UL1L2 for phase
L1 to L2 fault). The memorized voltage will prevent collapse of the mho circle for close in faults.
Operation occurs if 90°≤β≤270°.

Technical manual
IL1L2  jX
I L1L 2  Z1set
UcompUL1L2 IL1L2 Z1set
UL1L2
U pol
I L1L 2  R
Offset Mho GUID-2E84AD28-CA5F-4D19-B189-57354C8F7CF9 v2
The characteristic for offset mho is a circle where two points on the circle are given by the two
vectors Z 1set and Z 1RVset where Z 1set and Z 1RVset are settable through the resistance and
reactance settings in forward and reverse directions.
compensated voltages is greater than or equal to 90° (figure 196). The angle will be 90° for
fault location on the boundary of the circle.
The angle β for L1 to L2 fault can be defined according to equation 88.
 U 
L1L 2  I L1L 2  Z 1set
  arg  
 
 U L1L 2   I L1L 2  Z1set  

where
is the positive sequence impedance setting for phase-to-phase
Z 1RVset fault opposite to zone direction and is defined as
Z 1RVset = R1RvPPZx + j ⋅ X 1RvPPZx


Technical manual
where
X1RvPPZx is the positive sequence reactance reach for phase-to-phase
fault opposite to zone direction for zone x (x=1-5 and RV)
R1RvPPZx is the positive sequence resistive reach for phase-to-phase
fault opposite to zone direction for zone x (x=1-5 and RV) and is
internally calculated according to the equation below,
 R1FwPPZx 
R1RvPPZx = X 1RvPPZx ⋅  
 X 1FwPPZx 
IL1L 2  jX
Ucomp1  UL1L 2  IL1L 2  Z1set
IL1L 2  Z1set
UL1L 2

Ucomp 2  UL1L 2  IL1L 2  Z1RVset 
IL1L 2  R
IL1L 2  Z1RVset
Figure 196: Simplified offset mho characteristic and voltage vector for phase L1 to L2
fault
Operation occurs if 90°≤β≤270 °.
Phase-to-earth fault GUID-8A79E50E-9DC0-45DA-A3A7-DF3DBF59618C

SEMOD154224-283 v2
v1
The measuring of earth faults uses earth return compensation applied in a conventional way.
The compensation voltage is derived by considering the influence from the earth return path.
Compensation for earth return path for faults involving earth is done by setting the positive
and zero sequence impedance of the line. It is known that the ground compensation factor KN
is,
Z 0set − Z 1set
KN =
3 ⋅ Z 1set

Technical manual
Z 0set = R 0 FwPEZx + j ⋅ X 0 FwPEZx

Z 1set = R1FwPEZx + j ⋅ X 1FwPEZx

where
is the complex zero sequence impedance of the line in Ω/phase
Z 0set
Z 1set
phase
R0FwPEZx is the zero sequence resistive reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1-5, or RV)
X0FwPEZx is the zero sequence reactance reach of the line in Ω/phase for
phase-to-earth fault in zone direction for zone x (x=1-5, or RV)
R1FwPEZx is the positive sequence resistive reach of the line in Ω/phase
for phase-to-earth fault in zone direction for zone x (x=1-5, or
RV)
X1FwPEZx is the positive sequence reactance reach of the line in Ω/phase
for phase-to-earth fault in zone direction for zone x (x=1-5, or
RV)
For an earth fault in phase L1, the angle β between the compensation voltage and the
polarizing voltage Upol is,
β = arg [U L1 − ( I L1 + 3I 0 ⋅ K N ) ⋅ Z 1set ] − arg(U pol )

where
is the phase voltage in faulty phase L1
UL1
is the phase current in faulty phase L1
IL1

Z 1set phase for phase-to-earth fault in zone direction
is the polarizing voltage in phase L1

Upol

Technical manual
IL1•jX
UcompUL1 (IL1 3I0 KN )  Z1set

3I0KN Z1set
U L1
I L1  Z1set
U pol
IL1•R
fault
Operation occurs if 90 °≤β≤270 °.
Offset mho GUID-1CD62635-A76A-41F7-A814-8BB493F5B051 v3

The condition for operation of offset mho at phase-to-earth fault is that the angle β between
the two compensated voltages is equal to or greater than 90°, see figure "". The angle will be
90° for fault location on the boundary of the circle.
   
  arg U L1  ( I L1  3I 0  K N )  Z1set  arg U L1   ( I L1  3I 0  K N )  Z1set 
where
Z 1RVset phase for phase-to-earth fault opposite to zone direction and is
defined as,
Z 1RVset = R1RvPEZx + j ⋅ X 1RvPEZx

where
X1RvPEZx is the positive sequence reactance reach for phase-to-earth
fault opposite to zone direction for zone x (x=1-5 and RV)
R1RvPEZx is the positive sequence resistive reach for phase-to-earth fault
opposite to zone direction for zone x (x=1-5 and RV) and
expressed by,

Technical manual
 R1FwPEZx 
R1RvPEZx = X 1RvPEZx ⋅  
 X 1FwPEZx 
8.12.7.9 Load encroachment GUID-D846C3D9-4C79-40B5-9ED2-23934214AADB v7
In some cases the load impedance might enter the zone characteristic without any fault on the
protected line. The phenomenon is called load encroachment and it might occur when an
external fault is cleared and high emergency load is transferred on the protected line. The
effect of load encroachment is illustrated in the left part of figure 198. A load impedance
within the characteristic would cause an unwanted trip. The traditional way of avoiding this
situation is to set the distance zone resistive reach with a security margin to the minimum
load impedance. The drawback with this approach is that the sensitivity of the protection to
detect resistive faults is reduced.
The IED has a built-in function which shapes the characteristic according to the right part of
figure 198. The load encroachment algorithm will increase the possibility to detect high fault
resistances, especially for phase-to-earth faults at the remote line end. For example, for a
given setting of the load angle ArgLd the resistive blinder for the zone measurement can be
expanded according to the right part of the figure 198, given higher fault resistance coverage
without risk for unwanted operation due to load encroachment. This is valid in both directions.
The use of the load encroachment feature is essential for long heavily loaded lines, where there
might be a conflict between the necessary emergency load transfer and necessary sensitivity
of the distance protection. The function can also preferably be used on heavy loaded medium
long lines. For short lines, the major concern is to get sufficient fault resistance coverage. Load
encroachment is not a major problem. Nevertheless, always set RLdFw, RLdRv [3] and ArgLd
according to the expected maximum load since these settings are used internally in the
function as reference points to improve the performance of the phase selection.
Z1
ArgLd
[1]
RLdRv RLdFw
Figure 198: Load encroachment phenomena
8.12.7.10 Simplified logic schemes GUID-486BDAF6-6AE2-4671-91AF-4D2F8EBE71AC v6
PHSL1, PHSL2,...PHSL3L1 are internal binary logical signals from the phase-selection element.
They correspond directly to the six loops of the distance zones and determine which loops
should be released to possibly issue a start or a trip.
[3] RLdRv=RLdRvFactor*RLdFw.

Technical manual
FWL1, FWL2,...FWL3L1 and RVL1, RVL2,...RVL3L1 are the internal binary signals from the
directional element. An FW signal is set true if the criteria for a forward fault or load is fulfilled
for its particular loop. The same applies to the reverse (RV) signals.
The internal input 'IN present' is true if the residual current (3I0) exceeds 7% of IBase. However,
if current transformer saturation is detected, this criterion is changed to residual voltage
(3U0) exceeding 5% of UBase/sqrt(3) instead.
FW(Ln & LmLn)
FW(Ln & LmLn)
RV(Ln & LmLn)
DirModeZ3-5
TRUE (1)
FW(Ln & LmLn) Forward
RV(Ln & LmLn) Reverse
Figure 199: Connection of directional signals to zones

Technical manual
ZML1Zx PEZx
OR
PHSL1
AND
DIRL1Zx AND
ZML2Zx
PHSL2
AND
DIRL2Zx AND
ZML3Zx L1Zx
OR
PHSL3
AND
DIRL3Zx AND
ZML1L2Zx L2Zx
PHSL1L2 OR
AND
DIRL1L2Zx AND
ZML2L3Zx
PHSL2L3 L3Zx
AND OR
DIRL2L3Zx AND
ZML3L1Zx
PHSL3L1
AND
DIRL3L1Zx AND
L1N
PPZx
L2N OR
L3N
RELCNDZx Integer L1L2
to Bool
L2L3
NDZx
L1L3 OR
Figure 200: Intermediate logic

Technical manual
TimerModeZx =
Enable PhPh or
Ph-E PhPh
PPZx AND tPPZx
OR AND
AND t
PEZx
AND tPEZx OR
OR
AND t
AND
BLOCK
VTSZ
BLKZx OR
BLKTRZx
OR TimerLinksZx
LoopLink (tPP-tPE)
ZoneLinkStart LoopLink & ZoneLink
OR
Phase Selection No Links
1st starting zone
External start FALSE (0)
LNKZ2
LNKZx
AND
OR
TimerLinksZx =
LNKZ4 LoopLink & ZoneLink
LNKZ5
EXTNST
Figure 201: Logic for linking of timers
15 ms
TZx
t TRIPZx
AND
TRL1Zx
OR AND
BLOCK
VTSZ TRL2Zx
OR AND
BLKZx
TRL3Zx
AND
15 ms
L1Zx
t STL1Zx
AND
15 ms
L2Zx
t STL2Zx
AND
15 ms
t STL3Zx
AND
PPZx 15 ms
PEZx OR t STARTZx
AND
15 ms
NDZx
t STNDZx
AND
Figure 202: Start and trip outputs

Technical manual
15 ms
OR t STPE
AND
15 ms
OR t
AND
15 ms
OR t STNDL2
PHSL1L2 AND
15 ms
OR t STNDL3
AND
15 ms
OR t STPP
AND
BLOCK STARTND
OR
VTSZ OR
STPHS
STNDPE
AND
PHSL1
FWL1 AND
15 ms
FWL2 AND OR t
AND
FWL3 AND 15 ms
PHSL1L2 OR t STFWL2
AND
FWL1L2 AND
PHSL2L3 15 ms
FWL2L3 AND OR t STFWL3
AND
FWL3L1 AND
OR
STFWPE
IN present AND
STFW1PH
=1
BLOCK
VTSZ OR
STFW2PH
=2
STFW3PH
=3

Technical manual
PHSL1
RVL1 AND
15 ms
RVL2 AND OR t
AND
RVL3 AND 15 ms
PHSL1L2 OR t STRVL2
AND
RVL1L2 AND
PHSL2L3 15 ms
RVL2L3 AND OR t STRVL3
AND
RVL3L1 AND
OR
STRVPE
IN present AND
BLOCK
VTSZ OR

Technical manual
TDFWL1 AND
15 ms
TDFWL2 AND OR t
AND
PHSL3
TDFWL3 AND 15 ms
PHSL1L2 OR t STTDFWL2
AND
AND
AND 15 ms
PHSL2L3 OR t STTDFWL3
AND AND
AND
PHSL3L1
AND
AND
PHSL1
TDRVL1 AND
15 ms
TDRVL2 AND OR t
AND
AND 15 ms
OR t STTDRVL2
AND
AND
AND 15 ms
PHSL2L3 OR t STTDRVL3
AND AND
AND
PHSL3L1
AND
AND
VTSZ
OR
BLOCKTD
Figure 206: Transient directional element

In Figure 206, inputs TDFWLx and TDRVLx (where, x = 1-3) are the directionalities calculated
internally by the transient directional element.
8.12.7.11 Measurement
Measurement supervision SEMOD54417-130 v4

options.


Technical manual
Zero point clamping GUID-4894EF16-3376-48EB-863F-9CE14487ACAB v1

input signal to be ignored. The zero point clamping limit is a setting (XZeroDb where X equals
Z).

modes of operating:
X_RANGE = 3
High-high limit
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4


are available:


Technical manual


reporting.
Y
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5


Technical manual
Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

set limits.

Y4 and Y5).

Technical manual
Y A1 >=
A >= pre-set value
A2 >=
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
Measurement ZMMMXU GUID-2DB6F5A4-A3C2-4BBA-8327-393B7F89EDC6 v4

The magnitude and angle of the impedance for each phase-to-earth and phase-to-phase loop
are available on local HMI, monitoring tools within PCM600 or to the station level, for example,
via IEC61850.
Phase-to-earth impedance measurement is calculated based on UL1/ IL1 , UL2 / IL2 , UL3 / IL3
and phase-to-phase impedance is calculated based on U L1 

 UL 2 / IL1  IL 2 ,
U L2 
 UL 3 / IL 2  IL 3  , U
L3 
 UL1 / IL 3  IL1  , where U LX and ILX are phase-to-earth
voltage and phase current.
When the operating current is too low, the impedance measurement can be erroneous. To
avoid such error, minimum operating current will be checked. For phase-earth currents or
phase-phase currents lower than 2% of IBase, the resistance and reactance of the impedance
are forced to 99 999 ohm, corresponding to a magnitude at 141419 (99 999*√2) ohm and an
angle at 45 degree.

Technical manual

GUID-6C2EF52A-8166-4A23-9861-38931682AA7D v7
Table 199: ZMFPDIS, ZMFCPDIS technical data

Number of zones 3 selectable -
directions, 3 fixed
directions
Minimum operate current, Ph- (5-6000)% of IBase ±1.0% of Ir
Ph and Ph-E
Positive sequence reactance (0.01 - 3000.00) Pseudo continuous
reach, Ph-E and Ph-Ph loop ohm/p ramp:
±2.0% of set value
Positive sequence resistance (0.00 - 1000.00) Conditions:
reach, Ph-E and Ph-Ph loop ohm/p Voltage range: (0.1-1.1) x Ramp of shots:
Zero sequence reactance (0.01 - 9000.00) Ur ±2.0% of set value
reach ohm/p Current range: (0.5-30) x Conditions:
Ir IEC 60255-121 point B
Zero sequence resistive reach (0.00 - 3000.00) Angle: At 0 degrees and
ohm/p 85 degrees
Fault resistance reach, Ph-E (0.01 -9000.00) IEC 60255-121 points
and Ph-Ph ohm/l A,B,C,D,E
Dynamic overreach < 5% at 85 degrees -

measured with CVTs
and 0.5 < SIR < 30,
IEC 60255-121
Directional blinders Forward: -15 – 120 Pseudo continuous ramp:
degrees ±2.0 degrees, IEC 60255-121
Reverse: 165 – -60
degrees
Resistance determining the (0.01 - 5000.00) Pseudo continuous Ramp of shots:
load impedance area - forward ohm/p ramp: ±5.0% of set value
±2.0% of set value Conditions:
Conditions: Tested at ArgLd = 30
Tested at ArgLd = 30 degrees
degrees
Angle determining the load 5 - 70 degrees Pseudo continuous ramp:
impedance area ±2.0 degrees
Conditions:
Tested at RLdFw = 20 ohm/p
Definite time delay to trip, Ph- (0.000-60.000) s ±0.2% of set value or ±35 ms whichever is greater
E and Ph-Ph operation
Operate time 16 ms typically, IEC -
60255-121
Reset time at 0.1 to 2 x Zreach Min. = 20 ms -
Max. = 35 ms

Technical manual
8.13 Power swing detection ZMRPSB IP14499-1 v3
M14853-1 v3

Power swing detection ZMRPSB 68
Zpsb
SYMBOL-EE V1 EN-US
Power swings may occur after disconnection of heavy loads or trip of big generation plants.
Power swing detection function (ZMRPSB ) is used to detect power swings and initiate block
of all distance protection zones. Occurrence of earth-fault currents during a power swing
inhibits the ZMRPSB function, to allow fault clearance.
ZMRPSB
I3P* START
U3P* ZOUT
BLOCK ZIN
BLKI01
BLKI02
BLK1PH
REL1PH
BLK2PH
REL2PH
I0CHECK
TRSP
EXTERNAL
Figure 211: ZMRPSB function block
8.13.4 Signals
Table 200: ZMRPSB Input signals

SIGNAL
SIGNAL
BLKI01 BOOLEAN 0 Block inhibit of start output for slow swing condition
BLKI02 BOOLEAN 0 Block inhibit of start output for subsequent residual current
detection
BLK1PH BOOLEAN 0 Block one-out-of-three-phase operating mode
REL1PH BOOLEAN 0 Release one-out-of-three-phase operating mode

Technical manual

BLK2PH BOOLEAN 0 Block two-out-of-three-phase operating mode
REL2PH BOOLEAN 0 Release two-out-of-three-phase operating mode
I0CHECK BOOLEAN 0 Residual current (3I0) detection used to inhibit start output
TRSP BOOLEAN 0 Single-pole tripping command issued by tripping function
EXTERNAL BOOLEAN 0 Input for external detection of power swing
Table 201: ZMRPSB Output signals

START BOOLEAN Power swing detected
ZOUT BOOLEAN Measured impedance within outer impedance boundary
ZIN BOOLEAN Measured impedance within inner impedance boundary
8.13.5 Settings
Table 202: ZMRPSB Group settings (basic)

Operation Off - - Off Operation Mode On / Off
On
X1InFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, forward
R1LIn 0.01 - 1000.00 Ohm/p 0.01 30.00 Line resistance for inner characteristic
angle
R1FInFw 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance coverage to inner
resistive line, forward
X1InRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Inner reactive boundary, reverse
R1FInRv 0.01 - 1000.00 Ohm/l 0.01 30.00 Fault resistance line to inner resistive
boundary, reverse
OperationLdCh Off - - On Operation of load discrimination
On characteristic
RLdOutFw 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary,
forward
ArgLd 5 - 70 Deg 1 25 Load angle determining load
impedance area
RLdOutRv 0.01 - 3000.00 Ohm/p 0.01 30.00 Outer resistive load boundary, reverse
kLdRFw 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, forward
kLdRRv 0.50 - 0.90 Mult 0.01 0.75 Multiplication factor for inner resistive
load boundary, reverse
tEF 0.000 - 60.000 s 0.001 3.000 Timer for overcoming single-pole
reclosing dead time
IMinOpPE 5 - 30 %IB 1 10 Minimum operate current in % of
IBase

Technical manual
Table 203: ZMRPSB Group settings (advanced)

tP1 0.000 - 60.000 s 0.001 0.045 Timer for detection of initial power
swing
tP2 0.000 - 60.000 s 0.001 0.015 Timer for detection of subsequent
power swings
tW 0.000 - 60.000 s 0.001 0.250 Waiting timer for activation of tP2
timer
tH 0.000 - 60.000 s 0.001 0.500 Timer for holding power swing START
output
tR1 0.000 - 60.000 s 0.001 0.300 Timer giving delay to inhibit by the
residual current
tR2 0.000 - 60.000 s 0.001 2.000 Timer giving delay to inhibit at very
slow swing
Table 204: ZMRPSB Non group settings (basic)

Value groups

M13877-4 v5
The power swing detection (ZMRPSB ) function comprises an inner and an outer quadrilateral
measurement characteristic with load encroachment, as shown in figure 212.
Its principle of operation is based on the measurement of the time it takes for a power swing
transient impedance to pass through the impedance area between the outer and the inner
characteristics. The power swings are identified by transition times longer than a transition
time set on corresponding timers. The impedance measuring principle is the same as that
used for the distance protection zones. The impedance and the characteristic passing times
are measured in all three phases separately.
One-out-of-three or two-out-of-three operating modes can be selected according to the

specific system operating conditions.

Technical manual
X1OutFw jX ZL R1LIn
X1InFw DFw
j
DRv
R1FInRv R1FInFw
DFw
ArgLd j
ArgLd
DRv
DFw
DFw
R
DFw
DRv
RLdInRv RLdInFw
DFw
DRv
RLdOutRv RLdOutFw
j DRv X1InRv
X1OutRv
Figure 212: Operating characteristic for ZMRPSB function (setting parameters in italic)
The impedance measurement within ZMRPSB function is performed by solving equation 96
and equation 97 (n = 1, 2, 3 for each corresponding phase L1, L2 and L3).
æ ULn ö
Re çç ÷÷ £ Rset
è I Ln ø
æ ULn ö
Imçç ÷÷ £ Xset
è ILn ø
The Rset and Xset are R and X boundaries.
8.13.6.1 Resistive reach in forward direction M13877-6 v3
To avoid load encroachment, the resistive reach is limited in forward direction by setting the
parameter RLdOutFw which is the outer resistive load boundary value while the inner resistive
boundary is calculated according to equation 98.
RLdInFw = kLdRFw·RLdOutFw
where:
kLdRFw is a settable multiplication factor less than 1

Technical manual
The slope of the load encroachment inner and outer boundary is defined by setting the
parameter ArgLd.
The load encroachment in the fourth quadrant uses the same settings as in the first quadrant
(same ArgLd and RLdOutFw and calculated value RLdInFw).
The quadrilateral characteristic in the first quadrant is tilted to get a better adaptation to the
distance measuring zones. The angle is the same as the line angle and derived from the setting
of the reactive reach inner boundary X1InFw and the line resistance for the inner boundary
R1LIn. The fault resistance coverage for the inner boundary is set by the parameter R1FInFw.
From the setting parameter RLdOutFw and the calculated value RLdInFw a distance between
the inner and outer boundary, DFw, is calculated. This value is valid for R direction in first and
fourth quadrant and for X direction in first and second quadrant.
8.13.6.2 Resistive reach in reverse direction M13877-15 v3
To avoid load encroachment in reverse direction, the resistive reach is limited by setting the
parameter RLdOutRv for the outer boundary of the load encroachment zone. The distance to
the inner resistive load boundary RLdInRv is determined by using the setting parameter
kLdRRv in equation 99.
RLdInRv = kLdRRv·RLdOutRv
where:
kLdRRv is a settable multiplication factor less than 1
From the setting parameter RLdOutRv and the calculated value RLdInRv, a distance between
the inner and outer boundary, DRv, is calculated. This value is valid for R direction in second
and third quadrant and for X direction in third and fourth quadrant.
The inner resistive characteristic in the second quadrant outside the load encroachment part
corresponds to the setting parameter R1FInRv for the inner boundary. The outer boundary is
internally calculated as the sum of DRv+R1FInRv.
The inner resistive characteristic in the third quadrant outside the load encroachment zone
consist of the sum of the settings R1FInRv and the line resistance R1LIn. The argument of the
tilted lines outside the load encroachment is the same as the tilted lines in the first quadrant.
The distance between the inner and outer boundary is the same as for the load encroachment
in reverse direction, that is DRv.
8.13.6.3 Reactive reach in forward and reverse direction M13877-20 v3
The inner characteristic for the reactive reach in forward direction correspond to the setting
parameter X1InFw and the outer boundary is defined as X1InFw + DFw,
where:
DFw = RLdOutFw - KLdRFw · RLdOutFw
The inner characteristic for the reactive reach in reverse direction correspond to the setting
parameter X1InRv for the inner boundary and the outer boundary is defined as X1InRv + DRv.

Technical manual
where:
DRv = RLdOutRv - KLdRRv · RLdOutRv
8.13.6.4 Basic detection logic M13877-24 v8
The operation of the Power swing detection ZMRPSB is only released if the magnitude of the
current is above the setting of the minimum operating current, IMinOpPE.
ZMRPSB function can operate in two operating modes:
• The 1 out of 3 operating mode is based on detection of power swing in any of the three
phases. Figure 213 presents a composition of an internal detection signal DET-L1 in this
particular phase.
• The 2 out of 3 operating mode is based on detection of power swing in at least two out of
three phases. Figure 214 presents a composition of the detection signals DET1of3 and
DET2of3.
Signals ZOUTLn (outer boundary) and ZINLn (inner boundary) in figure 213 are related to the
operation of the impedance measuring elements in each phase separately (n represents the
corresponding L1, L2 and L3). They are internal signals, calculated by ZMRPSB function.
The tP1 timer in figure 213 serve as detection of initial power swings, which are usually not as
fast as the later swings are. The tP2 timer become activated for the detection of the
consecutive swings, if the measured impedance exit the operate area and returns within the
time delay, set on the tW waiting timer. The upper part of figure 213 (internal input signal
ZOUTL1, ZINL1, AND-gates and tP-timers) are duplicated for phase L2 and L3. All tP1 and tP2
timers in the figure have the same settings.
ZOUTL1 AND
0-tP1
ZINL1 0 OR
-loop
0-tP2
-loop
AND
0
OR DET-L1
AND AND
ZOUTL2 OR
ZOUTL3
detected 0
0-tW
Figure 213: Detection of power swing in phase L1

Technical manual
DET-L1
DET-L2 DET1of3 - int.
>1
DET-L3
&
DET2of3 - int.
& >1
&
Figure 214: Detection of power swing for 1-of-3 and 2-of-3 operating mode
ZOUTL1 ZOUT
OR
ZOUTL2 ZINL1
ZIN
ZOUTL3 AND ZINL2 OR
ZINL3
tEF
TRSP
t AND
I0CHECK
10 ms
AND t
BLKI02 OR
tR1
AND t INHIBIT
OR
-loop
tR2
BLKI01 AND t
BLOCK
-loop
DET1of3 - int.
REL1PH
AND
BLK1PH
tH
DET2of3 - int. OR t
REL2PH
AND
BLK2PH OR START
AND
EXTERNAL
en05000114.vsd
Figure 215: Simplified block diagram for ZMRPSB function
8.13.6.5 Operating and inhibit conditions M13877-38 v4
Figure 215 presents a simplified logic diagram for the Power swing detection function
ZMRPSB. The internal signals DET1of3 and DET2of3 relate to the detailed logic diagrams in
figure 213 and figure 214 respectively.

Technical manual
Selection of the operating mode is possible by the proper configuration of the functional input
signals REL1PH, BLK1PH, REL2PH, and BLK2PH.
The load encroachment characteristic can be switched off by setting the parameter
OperationLdCh = Off, but notice that the DFw and DRv will still be calculated from RLdOutFw
and RLdOutRv. The characteristic will in this case be only quadrilateral.
There are four different ways to form the internal INHIBIT signal:
• Logical 1 on functional input BLOCK inhibits the output START signal instantaneously.
• The INHIBIT internal signal is activated, if the power swing has been detected and the
measured impedance remains within its operate characteristic for the time, which is
longer than the time delay set on tR2 timer. It is possible to disable this condition by
connecting the logical 1 signal to the BLKI01 functional input.
• The INHIBIT internal signal is activated after the time delay, set on tR1 timer, if an earth-
fault appears during the power swing (input IOCHECK is high) and the power swing has
been detected before the earth-fault (activation of the signal I0CHECK). It is possible to
disable this condition by connecting the logical 1 signal to the BLKI02 functional input.
• The INHIBIT logical signals becomes logical 1, if the functional input I0CHECK appears
within the time delay, set on tEF timer and the impedance has been seen within the outer
characteristic of ZMRPSB operate characteristic in all three phases. This function prevents
the operation of ZMRPSB function in cases, when the circuit breaker closes onto
persistent single-phase fault after single-phase autoreclosing dead time, if the initial
single-phase fault and single-phase opening of the circuit breaker causes the power swing
in the remaining two phases.

M16036-1 v10
Table 205: ZMRPSB technical data

Reactive reach (0.10-3000.00) W/phase ±2.0% static accuracy
Conditions:
Angle: at 0 degrees and 85 degrees
Resistive reach (0.10–1000.00) W/loop
Power swing detection (0.000-60.000) s ±0.2% or ±10 ms whichever is greater
operate time
Second swing reclaim operate (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
time
Minimum operate current (5-30)% of IBase ±1.0% of Ir
8.14 Automatic switch onto fault logic ZCVPSOF SEMOD153633-1 v3
SEMOD155890-2 v4

Automatic switch onto fault logic ZCVPSOF - -

Technical manual
Automatic switch onto fault logic ZCVPSOF is a function that gives an instantaneous trip when
closing the breaker onto a fault. A dead-line detection check is provided to activate ZCVPSOF
when the line is de-energized.
Mho distance protections cannot operate for switch onto fault conditions when the phase
voltages are close to zero. An additional logic based on UI Level is used for this purpose.
ZCVPSOF is a complementary function to the distance protection function. It is enabled for

operation either by the closing command to the circuit breaker (normally closed auxiliary
contact of the circuit breaker) to the BC input or automatically by the dead-line detection.
Once enabled, it remains active for tSOTF duration after the enabling signal is reset. The
protection function can be enabled for tripping during the activated time by connecting the
functions included in the terminal to the ZACC input. Therefore, the start of the selected
protection functions connected to ZACC during the enabled condition results in an immediate
TRIP output from the function.
Figure 216: ZCVPSOF function block
Table 206: ZCVPSOF Input signals

I3P GROUP - Current DFT
SIGNAL
U3P GROUP - Voltage DFT
SIGNAL
START_DLYD BOOLEAN 0 Start from function to be accelerated with delay by SOTF
BC BOOLEAN 0 External enabling of SOTF
ZACC BOOLEAN 0 Distance zone to be accelerated by SOTF
Table 207: ZCVPSOF Output signals

8.14.5 Settings IP15016-1 v2

Technical manual
Table 208: ZCVPSOF Group settings (basic)

On
AutoInitMode DLD disabled - - DLD disabled Automatic switch onto fault
Voltage initialization
Current
Current & Voltage
Mode Impedance - - UILevel Mode of operation of SOTF Function
UILevel
UILvl&Imp
IPh< 1 - 100 %IB 1 20 Current level for detection of dead line
in % of IBase
UPh< 1 - 100 %UB 1 70 Voltage level for detection of dead line
in % of UBase
tDuration 0.000 - 60.000 s 0.001 0.020 Time delay for UI detection (s)
tSOTF 0.000 - 60.000 s 0.001 1.000 Drop off delay time of switch onto
fault function
tDLD 0.000 - 60.000 s 0.001 0.200 Delay time for activation of dead line
detection
tOperate 0.03 - 120.00 s 0.01 0.03 Time delay to operate of switch onto
fault function
Table 209: ZCVPSOF Non group settings (basic)

Value groups

Table 210: ZCVPSOF Monitored data

IL1 REAL - A Current in phase L1
UL1 REAL - kV Voltage in phase L1
The automatic switch onto fault logic ZCVPSOF can be activated externally (by the breaker-
closed input) or internally (automatically) with the dead-line detection using the UI level-based
logic. When the setting AutoInitMode is DLD disabled, ZCVPSOF is activated by an external
binary input BC. When the setting AutoInitMode is set to Voltage, Current or Current & Voltage
modes, ZCVPSOF is activated by the dead-line detection.

Technical manual
The activation from the dead-line detection function is released if the internal signal DeadLine
from the UILevel Detector function is activated at the same time as the inputs ZACC and
START_DLYD are not activated at least for the duration of tDLD. The internal signal DeadLine
from the UILevel Detector function is activated under any of the following conditions:
• If all three-phase currents are below the setting IPh< and the AutoInitMode setting is set
to Current
• If all three-phase voltages are below the setting UPh< and the AutoInitMode setting is set
to Voltage
• If all three-phase currents and voltages are below the settings IPh< and UPh< and the
AutoInitMode setting is set to Current & Voltage
Once the dead line drops off after energization or once BC drops off, the activated signal is
extended for the duration of tSOTF.
The internal signal SOTFUILevel is activated if the phase voltage is below the set UPh< and
the corresponding phase current is above the set IPh< for a time longer than the duration set
by tDuration.
To get the TRIP signal, one of the different operate modes must also be selected with the
Mode parameter:
• Mode = Impedance; TRIP is released if either the ZACC input (connected normally to a
nondirectional distance protection start zone) or the START_DLYD input is activated. If
START_DLD is activated, TRIP is released after a delay of tOperate.
• Mode = UILevel; TRIP is released if UILevel detector is activated
• Mode = UILvl&Imp; TRIP is released based either on the impedance-measured criteria or
UILevel detection
The ZCVPSOF function can be blocked by activating the input BLOCK.
The measured phase voltages and currents are provided as service values.
BLOCK
15ms
BC TRIP
& t
ZACC tSOTF
tDLD t
START_DLYD ≥1
& t
≥1
tOperate
t
I3P
U3P
DeadLine
IPh< UILevel tDuration
Detector t
UPh<
AutoInitMode
&
Mode = Impedance
SOTFUILevel
& ≥1
Mode = UILevel
≥1
&
Mode = UILvl&Imp
Figure 217: Simplified logic diagram for Automatic switch onto fault logic

Technical manual
M16043-1 v12
Table 211: ZCVPSOF technical data

Parameter Range or value Accuracy
Operate voltage, detection of dead line (1–100)% of ±0.5% of Ur
UBase
Operate current, detection of dead line (1–100)% of ±1.0% of Ir
IBase
Time delay to operate for the switch onto fault (0.03-120.00) s ±0.2% or ±20 ms whichever is greater
function
Time delay for UI detection (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
Delay time for activation of dead line detection (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
Drop-off delay time of switch onto fault function (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
8.15 Power swing logic PSLPSCH SEMOD153597-1 v3
SEMOD175682-2 v3

Power swing logic PSLPSCH - -
Power Swing Logic (PSLPSCH) is a complementary function to Power Swing Detection

(ZMRPSB) function. It provides possibility for selective tripping of faults on power lines during
system oscillations (power swings or pole slips), when the distance protection function should
normally be blocked. The complete logic consists of two different parts:
• Communication and tripping part: provides selective tripping on the basis of special
distance protection zones and a scheme communication logic, which are not blocked
during the system oscillations.
• Blocking part: blocks unwanted operation of instantaneous distance protection zone 1 for
oscillations, which are initiated by faults and their clearing on the adjacent power lines
and other primary elements.

Technical manual
PSLPSCH
BLOCK TRIP
STZMUR STZMURPS
STZMOR BLKZMUR
STPSD BLKZMOR
STDEF CS
STZMPSD
CACC
AR1P1
CSUR
CR
Figure 218: PSLPSCH function block
8.15.4 Signals
Table 212: PSLPSCH Input signals

STZMUR BOOLEAN 0 Start of the underreaching zone
STZMOR BOOLEAN 0 Start of the overreaching zone
STPSD BOOLEAN 0 Power swing detected
STDEF BOOLEAN 0 Start from Earth Fault Protection in forward or reverse
direction
STZMPSD BOOLEAN 0 Operation of Power Swing Detection external characteristic
CACC BOOLEAN 0 Overreaching ZM zone to be accelerated
AR1P1 BOOLEAN 0 Single pole auto-reclosing in progress
CSUR BOOLEAN 0 Carrier send by the underreaching power-swing zone
CR BOOLEAN 0 Carrier receive signal during power swing detection
operation
Table 213: PSLPSCH Output signals

TRIP BOOLEAN Trip through Power Swing Logic
STZMURPS BOOLEAN Start of Underreaching zone controlled by PSL to be used in
configuration
BLKZMUR BOOLEAN Block trip of underreaching impedance zone
BLKZMOR BOOLEAN Block trip of overreaching distance protection zones
CS BOOLEAN Carrier send signal controlled by the power swing

Technical manual
8.15.5 Settings
Table 214: PSLPSCH Group settings (basic)

On
tDZ 0.000 - 60.000 s 0.001 0.050 Permitted max oper time diff between
higher and lower zone
tDZMUR 0.000 - 60.000 s 0.001 0.200 Delay for oper of underreach zone
with detected diff in oper time
tCS 0.000 - 60.000 s 0.001 0.100 Conditional timer for sending the CS
at power swings
tTrip 0.000 - 60.000 s 0.001 0.100 Conditional timer for tripping at
power swings
tBlkTr 0.000 - 60.000 s 0.001 0.300 Timer for blocking the overreaching
zones trip
8.15.6.1 Communication and tripping logic SEMOD131352-4 v2
Communication and tripping logic as used by the power swing distance protection zones is
schematically presented in figure 219.
STDEF
AR1P1 &
STPSD tCS
CS
BLOCK & t &
CSUR
BLKZMPS
tBlkTr &
tTrip t
t
CACC TRIP
>1
CR &
en06000236.vsd
Figure 219: Simplified logic diagram – power swing communication and tripping logic
The complete logic remains blocked as long as there is a logical one on the BLOCK functional
input signal. Presence of the logical one on the STDEF functional input signal also blocks the
logic as long as this block is not released by the logical one on the AR1P1 functional input
signal. The functional output signal BLKZMPS remains logical one as long as the function is not
blocked externally (BLOCK is logical zero) and the earth-fault is detected on protected line
(STDEF is logical one), which is connected in three-phase mode (AR1P1 is logical zero). Timer
tBlkTr prolongs the duration of this blocking condition, if the measured impedance remains
within the operate area of the Power Swing Detection (ZMRPSB) function (STPSD input active).
The BLKZMPS can be used to block the operation of the power-swing zones.

Technical manual
Logical one on functional input CSUR, which is normally connected to the TRIP functional
output of a power swing carrier sending zone, activates functional output CS, if the function is
not blocked by one of the above conditions. It also activates the TRIP functional output.
Initiation of the CS functional output is possible only, if the STPSD input has been active longer
than the time delay set on the security timer tCS.
Simultaneous presence of the functional input signals PLTR_CRD and CR (local trip condition)
also activates the TRIP functional output, if the function is not blocked by one of the above
conditions and the STPSD signal has been present longer then the time delay set on the trip
timer tTrip.
8.15.6.2 Blocking logic SEMOD131352-14 v2
Figure 220 presents the logical circuits, which control the operation of the underreaching zone
(zone 1) at power swings, caused by the faults and their clearance on the remote power lines.
&
BLKZMH
&
STZML tZL
STZMLL
BLOCK & t >1
&
STMZH tDZ
STZMPSD & t
>1
STPSD
&
-loop
en06000237.vsd
Figure 220: Control of underreaching distance protection (Zone 1) at power swings

caused by the faults and their clearance on adjacent lines and other system
elements
The logic is disabled by a logical one on functional input BLOCK. It can start only if the
following conditions are simultaneously fulfilled:
• STPSD functional input signal must be a logical zero. This means, that Power swing
detection (ZMRPSB) function must not detect power swinging over the protected power
line.
• STZMPSD functional input must be a logical one. This means that the impedance must be
detected within the external boundary of ZMRPSB function.
• STZMOR functional input must be a logical one. This means that the fault must be
detected by the overreaching distance protection zone, for example zone 2.
The STZMURPS functional output, which can be used in complete terminal logic instead of a
normal distance protection zone 1, becomes active under the following conditions:
• If the STZMUR signal appears at the same time as the STZMOR or if it appears with a time
delay, which is shorter than the time delay set on timer tDZ.
• If the STZMUR signal appears after the STZMOR signal with a time delay longer than the
delay set on the tDZ timer, and remains active longer than the time delay set on the tZL
timer.

Technical manual
The BLKZMOR functional output signal can be used to block the operation of the higher
distance protection zone, if the fault has moved into the zone 1 operate area after tDZ time
delay.
SEMOD171935-5 v5
Table 215: PSLPSCH technical data

Permitted maximum (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
operating time difference
between higher and lower
zone
Delay for operation of (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
underreach zone with
detected difference in
operating time
Conditional timer for (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
sending the CS at power
swings
Conditional timer for (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
tripping at power swings
Timer for blocking the (0.000 — 60.0000) s ±0,2% or ±15 ms whichever is greater
overreaching zones trip
8.16 Pole slip protection PSPPPAM SEMOD156709-1 v2
SEMOD158949-2 v4

Pole slip protection PSPPPAM Ucos 78
8.16.2 Functionality
SEMOD143246-17 v7
Sudden events in an electric power system such as large changes in load, fault occurrence or
fault clearance, can cause power oscillations referred to as power swings. In a non-recoverable
situation, the power swings become so severe that the synchronism is lost, a condition
referred to as pole slipping. The main purpose of the pole slip protection (PSPPPAM) is to
detect, evaluate, and take the required action for pole slipping occurrences in the power
system.

Technical manual
PSPPPAM
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLKGEN START
BLKMOTOR ZONE1
EXTZONE1 ZONE2
GEN
MOTOR
SFREQ
SLIPZOHM
SLIPZPER
UCOS
UCOSPER
Figure 221: PSPPPAM function block
8.16.4 Signals
Table 216: PSPPPAM Input signals

I3P GROUP - Current group connection
SIGNAL
U3P GROUP - Voltage group connection
SIGNAL
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOTOR BOOLEAN 0 Block operation in motor direction
EXTZONE1 BOOLEAN 0 Extension of zone1 with zone2 region
Table 217: PSPPPAM Output signals

TRIP BOOLEAN Common trip signal
TRIP1 BOOLEAN Trip1 after the N1Limit slip in zone1
TRIP2 BOOLEAN Trip2 after the N2Limit slip in zone2
START BOOLEAN Common start signal
ZONE1 BOOLEAN First slip in zone1 region
ZONE2 BOOLEAN First slip in zone2 region
GEN BOOLEAN Generator is faster than the system
MOTOR BOOLEAN Generator is slower than the system
SFREQ REAL Slip frequency
SLIPZOHM REAL Slip impedance in ohms
SLIPZPER REAL Slip impedance in percent of ZBase
UCOS REAL UCosPhi voltage
UCOSPER REAL UCosPhi voltage in percent of UBase

Technical manual
8.16.5 Settings
Table 218: PSPPPAM Group settings (basic)

Operation Off - - Off Operation On / Off
On
OperationZ1 Off - - On Operation Zone1 On / Off
On
OperationZ2 Off - - On Operation Zone2 On / Off
On
ImpedanceZA 0.00 - 1000.00 % 0.01 10.00 Forward impedance in % of Zbase
ImpedanceZB 0.00 - 1000.00 % 0.01 10.00 Reverse impedance in % of Zbase
ImpedanceZC 0.00 - 1000.00 % 0.01 10.00 Impedance of zone1 limit in % of
Zbase
AnglePhi 72.00 - 90.00 Deg 0.01 85.00 Angle of the slip impedance line
StartAngle 0.0 - 180.0 Deg 0.1 110.0 Rotor angle for the start signal
TripAngle 0.0 - 180.0 Deg 0.1 90.0 Rotor angle for the trip1 and trip2
signals
N1Limit 1 - 20 - 1 1 Count limit for the trip1 signal
N2Limit 1 - 20 - 1 3 Count limit for the trip2 signal
Table 219: PSPPPAM Group settings (advanced)

ResetTime 0.000 - 60.000 s 0.001 5.000 Time without slip to reset all signals
Table 220: PSPPPAM Non group settings (basic)

MeasureMode PosSeq - - PosSeq Measuring mode (PosSeq, L1L2, L2L3,
L1L2 L3L1)
L2L3
L3L1
InvertCTcurr No - - No Invert current direction
Yes
Value groups

Table 221: PSPPPAM Monitored data

SFREQ REAL - Hz Slip frequency
SLIPZOHM REAL - Ohm Slip impedance in ohms
SLIPZPER REAL - % Slip impedance in percent of ZBase
UCOS REAL - kV UCosPhi voltage
UCOSPER REAL - % UCosPhi voltage in percent of UBase

Technical manual
If the generator is faster than the power system, the rotor movement in the impedance and
voltage diagram is from right to left and generating is signaled. If the generator is slower than
the power system, the rotor movement is from left to right and motoring is signaled (the
power system drives the generator as if it were a motor).
The movements in the impedance plane can be seen in Figure 222. The transient behavior is
described by the transient EMF's EA and EB, and by X'd, XT and the transient system impedance
ZS.
Zone 1 Zone 2
EB X’d XT XS EA
IED
B A
jX
XS
Pole slip
impedance XT
d Apparent generator
movement impedance R
X’d
Figure 222: Movements in the impedance plain
where:
X'd = transient reactance of the generator
XT = short-circuit reactance of the step-up transformer
ZS = impedance of the power system A
The detection of rotor angle is enabled when:

Technical manual
• the minimum current exceeds 0.10 IN (IN is IBase parameter set under general setting).
• the maximum voltage falls below 0.92 UBase
• the voltage Ucosφ (the voltage in phase with the generator current) has an angular
velocity of 0.2...8 Hz and
• the corresponding direction is not blocked.
en07000004.vsd
Figure 223: Different generator quantities as function of the angle between the
equivalent generators
An alarm is given when movement of the rotor is detected and the rotor angle exceeds the
angle set for 'WarnAngle'.
Slipping is detected when:
• a change of rotor angle of min. 50 ms is recognized

• the slip line is crossed between ZA and ZB.
When the impedance crosses the slip line between ZB and ZC it counts as being in zone 1 and
between ZC and ZA in zone 2. The entire distance ZA-ZB becomes zone 1 when signal
EXTZONE1 is high (external device detects the direction of the centre of slipping).
After the first slip, the signals ZONE1 or ZONE2 and – depending on the direction of slip -
either GEN or MOTOR are issued.
Every time pole slipping is detected, the impedance of the point where the slip line is crossed
and the instantaneous slip frequency are displayed as measurements.
Further slips are only detected, if they are in the same direction and if the rate of rotor
movement has reduced in relation to the preceding slip or the slip line is crossed in the
opposite direction outside ZA-ZB. A further slip in the opposite direction within ZA-ZB resets all
the signals and is then signalled itself as a first slip.

Technical manual
The TRIP1 tripping command and signal are generated after N1 slips in zone 1, providing the
rotor angle is less than TripAngle. The TRIP2 signal is generated after N2 slips in zone 2,
providing the rotor angle is less than TripAngle.
All signals are reset if:
• the direction of movement reverses

• the rotor angle detector resets without a slip being counted or
• no rotor relative movement was detected during the time ResetTime.
Imin > 0.10 IBase
Ucos< 0.92 UBase AND
START
AND
0.2  Slip.Freq.  8 Hz
  startAngle
ZONE1
AND
Z cross line ZC - ZB
ZONE2
AND
Z cross line ZA - ZC
Counter
a
ab
N1Limit b TRIP1
AND
  tripAngle OR
TRIP
Counter
a
ab
N2Limit b TRIP2
AND
IEC07000005.vsd
Figure 224: Simplified logic diagram for pole slip protection PSPPPAM
GUID-88E02516-1BFE-4075-BEEB-027484814697 v2
Table 222: PSPPPAM technical data

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Ur/Ir
Zone 1 and Zone 2 trip (1 - 20) -

counters

Technical manual
8.17 Out-of-step protection OOSPPAM GUID-667DAF85-B87B-47AA-9EAA-CD349E66F22F v3
GUID-BF2F1533-BA39-48F0-A55C-0B13A393F780 v2

Out-of-step protection OOSPPAM 78
<
8.17.2 Functionality GUID-BF2F7D4C-F579-4EBD-9AFC-7C03296BD5D4 v8
The out-of-step protection (OOSPPAM ) function in the IED can be used for both generator
protection and as well for line protection applications.
The main purpose of the OOSPPAM function is to detect, evaluate, and take the required
action during pole slipping occurrences in the power system.
The OOSPPAM function detects pole slip conditions and trips the generator as fast as
possible, after the first pole-slip if the center of oscillation is found to be in zone 1, which
normally includes the generator and its step-up power transformer. If the center of oscillation
is found to be further out in the power system, in zone 2, more than one pole-slip is usually
allowed before the generator-transformer unit is disconnected. A parameter setting is
available to take into account the circuit breaker opening time. If there are several out-of-step
relays in the power system, then the one which finds the center of oscillation in its zone 1
should operate first.
Two current channels I3P1 and I3P2 are available in OOSPPAM function to allow the direct
connection of two groups of three-phase currents; that may be needed for very powerful
generators, with stator windings split into two groups per phase, when each group is
equipped with current transformers. The protection function performs a simple summation of
the currents of the two channels I3P1 and I3P2.
8.17.3 Function block GUID-CB98C615-8A93-438D-9DF0-542F333198AC v4
OOSPPAM
I3P1* TRIP
I3P2* TRIPZ1
U3P* TRIPZ2
BLOCK START
BLKGEN GENMODE
BLKMOT MOTMODE
EXTZ1 R
X
SLIPFREQ
ROTORANG
UCOSPHI
Figure 225: OOSPPAM function block

Technical manual
8.17.4 Signals
Table 223: OOSPPAM Input signals

I3P1 GROUP - Group connection for three-phase current input 1
SIGNAL
I3P2 GROUP - Group connection for three-phase current input 2
SIGNAL
U3P GROUP - Group connection for three-phase voltage input
SIGNAL
BLKGEN BOOLEAN 0 Block operation in generating direction
BLKMOT BOOLEAN 0 Block operation in motor direction
EXTZ1 BOOLEAN 0 Extension of zone1 reach to zone2 settings
Table 224: OOSPPAM Output signals

TRIP BOOLEAN Common trip, issued when either zone 1 or zone 2 give trip
TRIPZ1 BOOLEAN Zone 1 trip
TRIPZ2 BOOLEAN Zone 2 trip
START BOOLEAN Set when measured impedance enters lens characteristic
GENMODE BOOLEAN Generator rotates faster than the system during pole slip
MOTMODE BOOLEAN Generator rotates slower than the system during pole slip
R REAL Real part of measured positive-sequence impedance % of
UBase/(sqrt(3)*IBase)
X REAL Imaginary part of measured positive-seq impedance % of
UBase/(sqrt(3)*IBase)
SLIPFREQ REAL Slip frequency in Hz
ROTORANG REAL Rotor angle as estimated by the out-of-step function
UCOSPHI REAL Estimated Ucos(Phi) voltage during pole slip, in V
8.17.5 Settings
Table 225: OOSPPAM Group settings (basic)

On
OperationZ1 Off - - On Operation Zone1 Off / On
On
ReachZ1 1.00 - 100.00 % ZFw 0.01 50.00 Percentage part of total forward
impedance; defines Z1 reach
OperationZ2 Off - - On Operation Zone2 Off / On
On
tBreaker 0.000 - 1.000 s 0.001 0.040 Breaker opening time; use default 0s
value if it is unknown

Technical manual
Table 226: OOSPPAM Group settings (advanced)

NoOfSlipsZ1 1 - 20 - 1 1 Number of pole-slips in zone 1
required to get zone 1 trip
NoOfSlipsZ2 1 - 60 - 1 3 Number of pole-slips in zone 2
required to get zone 2 trip
tReset 1.000 - 60.000 s 0.001 6.000 Time without any slip required to
completely reset function
Table 227: OOSPPAM Non group settings (basic)

Value groups
ForwardR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of total forward impedance
for Z2, in % of UBase/(sqrt(3)*IBase)
ForwardX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of total forward impedance
for Z2, in % of UBase/(sqrt(3)*IBase)
ReverseR 0.00 - 1000.00 %ZB 0.01 1.00 Real part of source impedance behind
relay, in % of UBase/(sqrt(3)*IBase)
ReverseX 0.00 - 1000.00 %ZB 0.01 10.00 Imag. part of source impedance
behind relay, in % of UBase/
(sqrt(3)*IBase)
InvertCTCurr No - - No Invert current direction
Yes
Table 228: OOSPPAM Non group settings (advanced)

StartAngle 90.0 - 130.0 Deg 0.1 110.0 Angle between two rotors to get the
start signal, in deg
TripAngle 15.0 - 90.0 Deg 0.1 60.0 Maximum rotor angle to allow trip
signals, in deg

Table 229: OOSPPAM Monitored data

CURRENT REAL - A Magnitude of the measured positive-
sequence current, in A
VOLTAGE REAL - kV Magnitude of the measured positive-
sequence voltage, in V
R REAL - % Real part of measured positive-
sequence impedance % of UBase/
(sqrt(3)*IBase)
X REAL - % Imaginary part of measured positive-
seq impedance % of UBase/
(sqrt(3)*IBase)

Technical manual

SLIPFREQ REAL - Hz Slip frequency in Hz
ROTORANG REAL - deg Rotor angle as estimated by the out-
of-step function
UCOSPHI REAL - kV Estimated Ucos(Phi) voltage during
pole slip, in V

GUID-787EEB01-B760-4D4B-AB4E-1DCD6ABFFF5E v6
General
Under balanced and stable conditions, a generator operates with a constant rotor angle
(power angle), delivering active electrical power to the power system, which is approximately
equal to the input mechanical power on the generator axis.The currents and voltages are
constant and stable. An out-of-step condition is characterized by periodic changes in the rotor
angle, that leads to a wild flow of the synchronizing power; so there are also periodic changes
of rotational speed, currents and voltages. When displayed in the complex impedance plane,
these changes are characterized by a cyclic change in the complex load impedance Z(R, X) as
measured at the terminals of the generator, or at the location of the instrument transformers
of a power line connecting two power subsystems. This is shown in Figure 226.
1.5 ← trajectory
of Z(R, X)
to the 3rd
The 2nd pole-slip
Imaginary part (X) of Z in Ohms
1 The 1st X in Ohms

pole slip
pole slip
occurred Pre-disturbance
occurred
RE normal load
- - - - -
- - - - ----------- - - - - Z(R, X)
0.5 - ---
3 ----
---- --
Zone 2 -- - 1 ---- - 0
- - 2 -- -
-
-
---- --
-
-
^ -^ ^ ^ ^ -^ ^ ^ ^ ^ ^ ^ --
- -- ^ ^-- ^ ^ ^ --^
Zone 1 - --- -- -
-
0 - -- relay --- -
- -- -- -
- -
- - - R in Ohms
limit of reach → - - -- -- -
- -- -
-- -- -- -
lens determined - - →----- ------ 0- - - pre-disturbance Z(R, X)
- -
------
- -- - - - --- - →
-0.5 by the setting - 1 → Z(R, X) under 3-phase fault
StartAngle = 120° SE 2 → Z(R, X) when fault cleared
3 → Z when pole-slip declared
-1
-1.5 -1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms
Figure 226: Loci of the complex impedance Z(R, X) for a typical case of generator losing
step after a short circuit that was not cleared fast enough
Under typical, normal load conditions, when the protected generator supplies the active and
the reactive power to the power system, the complex impedance Z(R, X) is in the 1st quadrant,
point 0 in Figure 226. One can see that under a three-phase fault conditions, the centre of
oscillation is at the point of fault, point 1, which is logical, as all three voltages are zero or near
zero at that point. Under the fault conditions the generator accelerated and when the fault
was finally cleared, the complex impedance Z(R, X) jumped to the point 2. By that time, the
generator has already lost its step, Z(R, X) continues its way from the right-hand side to the
left-hand side, and the 1st pole-slip cannot be avoided. If the generator is not immediately
disconnected, it will continue pole-slipping — see Figure 226, where two pole-slips (two pole-
slip cycles) are shown. Under out-of-step conditions, the centre of oscillation is where the

Technical manual
locus of the complex impedance Z(R, X) crosses the (impedance) line connecting the points SE
(Sending End), and RE (Receiving End). The point on the SE – RE line where the trajectory of
Z(R, X) crosses the impedance line can change with time and is mainly a function of the
internal induced voltages at both ends of the equivalent two-machine system, that is, at points
SE and RE.
Measurement of the magnitude, direction and rate-of-change of load impedance relative to a

generator’s terminals provides a convenient and generally reliable means of detecting whether
machines are out-of-step and pole-slipping is taking place. Measurement of the rotor (power)
angle δ is important as well.
Rotor (power) angle δ can be thought of as the angle between the two lines, connecting point
0 in Figure 226, that is, Z(R, X) under normal load, with the points SE and RE, respectively.
These two lines are not shown in Figure 226. Normal values of the power angle, that is, under
stable, steady-state, load conditions, are from 30 to 60 electrical degrees. It can be observed
in Figure 227 that the angle reaches 180 degrees when the complex impedance Z(R, X) crosses
the impedance line SE – RE. It then changes the sign, and continues from -180 degrees to 0
degrees, and so on. Figure 227 shows the rotor (power) angle and the magnitude of Z(R, X)
against time for the case from Figure 226.
4
|Z| in Ohms
rotor (power)
3 normal angle in rad
angle
Impe dance Z in Ohm and rotor a ngle in radian ®
load
Z(R, X) unde r fa ult lies |Z|
2
on the impe dance line
or nea r (for 3-ph faults )
1
0
0
fault 500 ms
-1 fa ult
occ urrs
Unde r 3-pha s e fa ult
condition rotor a ngle 3
-2
of a pp. ±180 de gre e s
is m e a s ure d ...
2
-3 Z(R,X) cros s e d
1 1 the im pe da nce line , Z-line ,
conne cting points S E - RE
-4
0 200 400 600 800 1000 1200 1400
Time in millis econds ®
Figure 227: Rotor (power) angle and magnitude of the complex impedance Z(R, X) against
the time
In order to be able to fully understand the principles of OOSPPAM, a stable case, that is, a case
where the disturbance does not make a generator to go out-of-step, must be shown.

Technical manual
1
SE RE
G X [Ohm]
0.8 Z(R,X) 20 ms
fault
relay after line out
- - - RE - - -
0.6 - - --
-- ----------- - pre-fault
Imaginary part (X) of Z in Ohms →
- --- - 4 -
zone 2 - --- -
--- Z(R,X)
0.4 -- - -
- -- - --- 2 -
- -
- --- -1 5
- --- fault→
- -- -
0.2 X-line → ^ -^ ^ ^ ^ ---^ ^ 3 -- -
- -
- ^ ^ ^ ^ ^ ^ --^- ^ ^ -
- -- Z-line→ -- ^ -^ 0
-- --
- -- -- - 6
0 - -- - - -
- -
- -
- -
limit of -- - R
- -- relay lens → --- -
-- -
-0.2 reach - -- 110° ---- -
zone 1- - --- -
-- -
-
--- -
- --- --- -
-0.4 -- --- ------ --
-- ------ -
- - - - -
-0.6 SE - - -
0 → pre-fault Z(R, X)
this circle forms 3 → Z(R, X) under fault
-0.8 the right-hand side 5 → Z 20 ms after line out
edge of the lens 6 → pow er line reclosed
-1
-1 -0.5 0 0.5 1 1.5
Real part (R) of Z in Ohms → IEC10000111-1-en.vsd
Figure 228: A stable case where the disturbance does not make the generator to go out-
of-step
It shall be observed that for a stable case, as shown in Figure 228, where the disturbance does
not cause the generator to lose step, the complex impedance Z(R, X) exits the lens
characteristic on the same side (point 4) it entered it (point 2), and never re-enters the lens. In
a stable case, where the protected generator remains in synchronism, the complex impedance
returns to quadrant 1, and, after the oscillations fade, it returns to the initial normal load
position (point 0), or near.
8.17.7.1 Lens characteristic GUID-F9BD3225-C87F-4FA6-A267-2248F0A4E707 v6
A precondition in order to be able to construct a suitable lens characteristic is that the power
system in which OOSPPAM is installed, is modeled as a two-machine equivalent system, or as a
single machine – infinite bus equivalent power system. Then the impedances from the position
of OOSPPAM in the direction of the normal load flow (that is from the measurement point to
the remote system) can be taken as forward. The lens characteristic, as shown in Figure226
and Figure228, is obtained so that two equal in size but differently offset Mho characteristics
are set to overlap. The resultant lens characteristic is the loci of complex impedance Z(R, X) for
which the rotor (power) angle is constant, for example 110 degrees or 120 degrees; if the rotor
(power) angle approaches this value, then there is a high risk to have an out of step condition.
The limit-of- reach circle is constructed automatically by the algorithm; it is about 10% wider
than the the circle that has the line SE-RE as diameter (that is the out-of-step characteristic
which corresponds to the rotor (power) angle of 90 degrees). Figure 229 illustrates
construction of the lens characteristic for a power system.

Technical manual
X
Position of the OOS
- - - RE- - -
0.6 - - --- - relay is the origin of
- - -- --- - the R - X plane
- -- - -- -
- --- Ze -- -
- Zone 2 -- -- -
0.4 X-line - - - -
Imaginary part (X) of Z in Ohms --- --
-
determined - -- Zline -- -
- - - - -
by the → ^ ^- ^ --- --
^ ^ ^- ^ -- -
0.2 setting - ^ ^ ^ ^ -
- ^ ^ ^ --- ^ -
---
ReachZ1 - -- ^ ^ ^-
--- Ztr
- -- -- - R
0 - Zone 1 -- --
- -
-- relay -
- -- 120° -- Z(R,X) -
- -- --- -
-- ← Z-line -
-0.2 - -- Zgen -- -
- -- --- -
limit-of-reach → - -- -- -
-- -- ← Lens is- the locus
circle depends on -
- -- ---- of constant
- rotor (power)
-0.4 --
the position of the - -- --- - e.g. 120°.
- - --- - -- angle,-
points SE and RE - - - - - - - - -Lens' width determined
SE
-0.6 by the setting StartAngle
-0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1

Real part (R) of Z in Ohms
Figure 229: Construction of the lens characteristic for a power system
ReverseZ
ReverseZ(ReverseR, ReverseX)) ForwardZ(ForwardR, ForwardX)
Zgen(Rgen , Xgen) Ztr(Rtr, Xtr) Zline(Rline, Xline) Zeq(Req, Xeq)
Generator Transformer Infinite power

13.8 kV 13.8 / 220 kV system
Power line System
13.8 kV 220 kV equivalent
G d Y
SE RE
Out-Of-Step ReverseR = Rg ForwardR = Rtr + Rline + Req

REG ReverseX = Xd’ ForwardX = Xtr + Xline + Xeq
protection
OOSPPAM
All impedances must be referred to the generator voltage 13.8 kV
Figure 230: Example of an actual power system

To be able to automatically construct the lens characteristic for a system shown in Figure 230,
the actual power system must be modeled as a two-machine equivalent system, or as a single
machine – infinite bus equivalent system, the following information is necessary: Zgen(Rgen,
Xgen), Ztr(Rtr, Xtr), Zline(Rline, Xline), Zeq(Req, Xeq), and the setting StartAngle , for example
120 degrees. All impedances must be referred to the voltage level where the out-of-step
protection relay is placed; in the case shown in Figure 230 the relay is connected to the
terminals of the generator and, therefore, the previous quantities shall be referred to the
generator nominal voltage and nominal current. The impedances from the position of the out-
of-step protection in the direction of the normal load flow can be taken as forward.
The out-of-step relay, as in Figure 230 looks into the system and the impedances in that
direction are forward impedances:

Technical manual
• ForwardX = Xtr + Xline + Xeq (All values referred to generator voltage)

• ForwardR = Rtr + Rline + Req (All values referred to generator voltage)
The impedances that can be measured in the reverse direction are:
• ReverseX = Xd' (Generator transient reactance suitable for this protection)

• ReverseR = Rg (Relatively very small, can often be neglected)
Resistances are much smaller than reactances, but in general can not be neglected. The ratio
(ForwardX + ReverseX) / (ForwardR + ReverseR) determines the inclination of the Z-line,
connecting the point SE (Sending End) and RE (Receiving End), and is typically approximately
85 degrees. While the length of the Z-line depends on the values of ForwardX, ReverseX,
ForwardR, and ReverseR, the width of the lens is a function of the setting StartAngle .The lens
is broader for smaller values of the StartAngle , and becomes a circle for StartAngle = 90
degrees.
When the complex impedance Z(R, X) enters the lens, pole slipping is imminent, and a start
signal is issued. The angle recommended to form the lens is 110 or 120 degrees, because it is
this rotor (power) angle where problems with dynamic stability usually begin. Rotor (power)
angle 120 degrees is sometimes called “the angle of no return” because if this angle is reached
under generator power swings, the generator is most likely to lose step.
8.17.7.2 Detecting an out-of-step condition GUID-5BBAE253-3D01-4C97-A7CF-A12084FD1810 v4
An out-of-step condition is characterized by periodic changes of the rotor angle, that leads to
a wild flow of the synchronizing power; so there are also periodic changes of rotational speed,
currents and voltages. When displayed in the complex impedance plane, these changes are
characterized by a cyclic change in the complex load impedance Z(R, X) as measured at the
terminals of the generator, or at the location of the instrument transformers of a power line
connecting two power sub-systems. This was shown in Figure 226. When a synchronous
machine is out-of-step, pole-slips occur. To recognize a pole-slip, the complex impedance
Z(R,X) must traverse the lens from right to left in case of a generator and in the opposite
direction in case of a motor. Another requirement is that the travel across the lens takes no
less than a specific minimum traverse time, typically 40...60 milliseconds. The above timing is
used to discriminate a fault from an out-of-step condition. In Figure 226, some important
points on the trajectory of Z(R, X) are designated. Point 0: the pre-fault, normal load Z(R, X).
Point 1: impedance Z under a three-phase fault with low fault resistance: Z lies practically on,
or very near, the Z-line. Transition of the measured Z from point 0 to point 1 takes app. 20 ms,
due to Fourier filters. Point 2: Z immediately after the fault has been cleared. Transition of the
measured Z from point 1 to point 2 takes approximately 20 ms, due to Fourier filters. The
complex impedance then travels in the direction from the right to the left, and exits the lens on
the opposite side. When the complex impedance exits the lens on the side opposite to its
entrance, the 1st pole-slip has already occurred and more pole-slips can be expected if the
generator is not disconnected. Figure 226 shows two pole-slips. Figures like Figure 226 and
Figure 228 are always possible to draw by means of the analog output data from the pole-slip
function, and are of great help with eventual investigations of the performance of the out-of-
step function.
8.17.7.3 Maximum slip frequency GUID-1311529F-21F8-40A0-8D01-0296BD9B4F00 v5
A pole-slip may be detected if it has a slip frequency lower than a maximum value fsMax. The
specific value of fsMax depends on the setting (parameter) StartAngle (which determines the
width of the lens characteristic). A parameter in this calculation routine is the value of the
minimum traverse time, traverseTimeMin. The minimum traverse time is the minimum time
that the travel of the complex impedance Z(R, X) through the lens, from one side to the other,
must last in order to recognize that a pole-slip has occurred. The value of the internal constant
traverseTimeMin is a function of the set StartAngle.For values of StartAngle <= 110°,

Technical manual
traverseTimeMin = 50 ms. For values StartAngle > 110°, traverseTimeMin = 40 ms. The
expression which relates the maximum slip frequency fsMax and the traverseTimeMin is as
follows:
1000  StartAngle [°] 

fsMax [ Hz ] ≅ ⋅  1.000 - 
traverseTimeMin [ ms ]  180 [°] 
The maximum slip frequency fsMax for traverseTimeMin = 50 ms is:
StartAngle = 90° → fsMax = 20 × 0.500 = 10.000 Hz

StartAngle = 110° → fsMax = 20 × 0.388 = 7.777 Hz (default 110°)
The maximum slip frequency fsMax for traverseTimeMin = 40 ms is:

The minimum value of fsMax is 6.994 Hz. When StartAngle = 110 degrees, fsMax = 7.777 Hz. This
implies, that the default StartAngle = 110 degrees covers 90% of cases as, the typical final slip
frequency is between 2 - 5Hz. In practice, however, before the slip frequency, for example 7.777
Hz, is reached, at least three pole-slips have occurred. In other words, if we consider a linear
increase of frequency from 50 Hz to 57.777 Hz, at least three pole-slips will occur (in fact:
(57.777 - 50) / 2 = 3.889). The exact instantaneous slip-frequency expressed in Hz
(corresponding to number of pole slips per second) is difficult to calculate. The easiest and
most exact method is to measure time between two successive pole slips. This means that,
the instantaneous slip-frequency is measured only after the second pole-slip, if the protected
machine is not already disconnected after the first pole-slip. The measured value of
slipsPerSecond (SLIPFREQ) is equal to the average slip-frequency of the machine between the
last two successive pole-slips.
8.17.7.4 Taking care of the circuit breaker GUID-35B49D7D-80AF-4DB0-A3C5-0CA0E54A9CA1 v4
Although out-of-step events are relatively rare, the out-of-step protection should take care of
the circuit breaker health. The electromechanical stress to which the breaker is exposed shall
be minimized. The maximum currents flowing under out-of-step conditions can be even
greater that those for a three-phase short circuit on generator terminals; see Figure 232. The
currents flowing are highest at rotor angle 180 degrees, and smallest at 0 degrees, where
relatively small currents flow. To open the circuit breaker at 180 degrees, when not only the
currents are highest, but the two internal (that is, induced) voltages at both ends are in
opposition, could be fatal for the circuit breaker. There are two methods available in order to
minimize the stress; the second method is more advanced than the first one.
The first method

The circuit breaker is only allowed to break the current when the rotor angle has become less
than the set value TripAngle, on its way to 0 electrical degrees. A recommended value for the
setting TripAngle is 90 degrees or less, for example 60 degrees. Figure 231 illustrates the case
with TripAngle = 90 degrees. The offset Mho circle represents loci of the complex impedance
Z(R, X) for which the rotor (power) angle is 90 degrees. If the circuit breaker must not open
before the rotor angle has reached 90 degrees on its way towards 0 degrees, then it is clear
that the circle delimits the R – X plane into a “no trip” and a “trip” region. For TripAngle = 90
degrees, the trip command will be issued at point 3 when the complex impedance Z(R, X) exits

Technical manual
the circle. By that time the relay logic had already ascertained the loss of step, and the general
decision to trip the generator has already been taken.
The second method

This method is more exact. If the break-time of the circuit breaker is known, (and specified as
the setting tBreaker) than it is possible to initiate a trip (break) command almost exactly
tBreaker milliseconds before the rotor (power) angle reaches 0 degrees, where the currents
are at their minimum possible values. The breaker contacts open at almost exactly 0 degrees,
as illustrated in Figure 232 for tBreaker = 0.060 s. The point in time when the breaker opening
process must be initiated is estimated by solving on-line the so called “synchronizer”
differential equation. Note that if tBreaker is left on the initial (default) value, which is zero (0),
then the alternative setting TripAngle decides when the trip command is given. If specified
tBreaker > 0, for example tBreaker = 0.040 second, then automatically, the TripAngle is ignored
and the second, more exact method applied.
X[Ohm]
0.6 trip RE - Receiving End (infinite bus)
region
loci of Z(R, X)
0.4 3
Imaginary part (X) of Z in Ohms →
no trip
region 1
here rotor here
0.2 2
angle rotor angle
is -90° no trip is +90°
rotor angle
region
= ±180°
0 no trip
relay
region R[Ohm]
inside ← Z - line connects
points SE & RE
-0.2 circle
← this circle
is loci of
outside the
the rotor
-0.4 circle is the trip
angle = 90°
region for
TripAngle <= 90° SE - Sending End (generator)
-0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8

Real part (R) of Z in Ohms →
Figure 231: The imaginary offset Mho circle represents loci of the impedance Z(R, X) for
which the rotor angle is 90 degrees

Technical manual
35
very high currents due
Current in kA, trip command to CB, rotor angle in rad →

pos. seq. current in kA
to out-of-step condition
30 trip command to CB
rotor angle in radian
← after 1st
fault cleared → pole slip
25
← 2nd
20 current increases under

fault conditions
current decreases
15
fault
occurs
10 ← min. current
trip command →
normal load current issued here
← → ← tBreaker = 60 ms
5
← rotor angle
0
angle towards 0°
-5
0 200 400 600 800 1000 1200
Time in milliseconds →
Figure 232: Trip initiation when the break-time of the circuit breaker is known
8.17.7.5 Design GUID-1615F014-3529-45D0-813B-153754DED1C7 v3
At every execution of the function the following is calculated: active power P, reactive power Q,
rotor angle ROTORANG, quantity UCOSPHI, the positive-sequence current CURRENT and voltage
VOLTAGE. All other quantities, that can as well be read as outputs, are only calculated if the Z(R,
X) enters the limit of reach zone, which is a circle in the complex (R – X) plane. When the
complex impedance Z(R, X) enters the limit-of-reach region, the algorithm:
• determines in which direction the impedance Z moves, that is, the direction the lens is
traversed
• measures the time taken to traverse the lens from one side to the other one
If the traverse time is more than the limit 40 or 50 ms, a pole-slip is declared. If the complex
impedance Z(R, X) exits the lens on the same side it entered, then it is a stable case and the
protected machine is still in synchronism. If a pole-slip has been detected, then it is
determined in which zone the centre of oscillation is located. If the number of actual pole-slips
exceeds the maximum number of allowed pole-slips in either of the zones, a trip command is
issued taking care of the circuit breaker safety.

Technical manual
R R
UPSRE Calculation of X X
UPSIM R and X parts
of the complex Z(R,X)
UPSMAG
positive-
IPSRE
sequence Z(R,X) NO
IPSIM
impedance within limit of Return
Z(R, X) reach?
YES UCOSPHI
Z(R,X) ROTORANG
within lens NO
Function alert
characteristic?
SLIPFREQ
YES GENMODE
Z(R,X) MOTMODE
LEFT Z(R,X) RIGHT NO
exited lens
entered lens
on the left- hand
from?
Motor losing Generator losing side?
step ? step ?
YES
Was
traverse time NO
more than
Calculation of 50 ms?
P
positive- sequence YES (pole- slip!)
active power P, Q TRIP
>= 1
reactive power Q, Number
ZONE 2 NO
rotor angle UCOSPHI
of pole- slips
ROTORANG exceeded in TRIPZ1
a zone? Open
and
ROTORANG circuit
UCOSPHI ZONE 1 TRIPZ2
breaker
safely
Figure 233: OOSPPAM Simplified function block

SEMOD175136-2 v8
Table 230: OOSPPAM technical data

Impedance reach (0.00 - 1000.00)% of Zbase ±2.0% of Ur/(√3 ⋅ Ir)
Rotor start angle (90.0 - 130.0) degrees ±5.0 degrees

Rotor trip angle (15.0 - 90.0) degrees ±5.0 degrees
Zone 1 and Zone 2 trip (1 - 20) -
counters
8.18 Phase preference logic PPLPHIZ SEMOD151920-1 v2
SEMOD151937-2 v2

Phase preference logic PPLPHIZ - -
The Phase preference logic function PPLPHIZ is intended to be used in isolated or high
impedance earthed networks where there is a requirement to operate on only one of the faulty

Technical manual
lines during a cross-country fault. It can be used without preference to restrain operation for
single earth faults with a delayed zero-sequence current release.
For cross-country faults, the logic selects either the leading or lagging phase-earth loop for
measurement. It initiates operation on the preferred fault based on the selected phase
preference. A number of different phase preference combinations are available for selection.
PPLPHIZ provides an additional phase selection criteria, namely under voltage criteria, suitable
for cross-country faults. In radial networks, where there is no fault current in the phase with
the external fault, current or impedance based phase selection methods become ineffective.
Hence, only voltage can be used for phase selection. The phase selection result will be the
same for all bays on a bus since the voltage is the same, which is an important condition for
operating with phase preference.
In meshed and stronger networks, it is difficult to find appropriate under-voltage or phase

selection settings. If PPLPHIZ is unable to detect both faulty phases, then it is not possible to
provide preference. The distance protection will still be released however, without preference.
The final result might be that both faulty feeders are operated. In other words, operation is
prioritized over strict adherence to preference.
PPLPHIZ
I3P* START
U3P* ZREL
BLOCK
RELL1N
RELL2N
RELL3N
STCND
Figure 234: PPLPHIZ function block
Table 231: PPLPHIZ Input signals

SIGNAL
SIGNAL
RELL1N BOOLEAN 0 Release condition for the L1 to earth loop
STCND INTEGER 0 Integer coded external release signals
Table 232: PPLPHIZ Output signals

START BOOLEAN Indicates start for earth fault(s), regardless of direction
ZREL INTEGER Integer coded output release signal

Technical manual
Table 233: PPLPHIZ Group settings (basic)

OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic)
NoPref
1231c
1321c
123a
132a
213a
231a
312a
321a
UPN< 0 - 100 %UB/sq 1 70 Operate value of phase undervoltage
3 in % of UBase/sqrt(3)
UPP< 0 - 100 %UB 1 50 Operate value of line to line
undervoltage (% of UBase)
3U0> 5 - 300 %UB/sq 1 20 Operate value of residual voltage in %
3 of UBase/sqrt(3)
IN> 10 - 200 %IB 1 20 Operate value of residual current (%
of IBase)
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.150 Pickup-delay for residual current
Table 234: PPLPHIZ Non group settings (basic)

Value groups
PPLPHIZ is connected between the Distance protection zones ZMQPDIS and ZMQAPDIS and
Phase selection FDPSPDIS, see Figure 235. Depending on the setting, the original phase
selection will be supplemented with an additional voltage based phase selection inside
PPLPHIZ and then filtered through the phase preference logic in order to release only the
preferred phases of the distance zones.

Technical manual
ZMQAPDIS
FDPSPDIS
W2_CT_B_I3P I3P* TRIP
I3P* TRIP
W2_VT_B_U3P U3P* TRL1
U3P* START FALSE BLOCK TRL2
BLOCK STFWL1 PHS_L1 W2_FSD1-BLKZ VTSZ TRL3
DIRCND STFWL2 PHS_L2 FALSE BLKTR START
STFWL3 PHS_L3 STCND STL1
STFWPE
DIRCND STL2
STRVL1
STL3
STRVL2
STND
STRVL3
STRVPE
STNDL1 ZMQPDIS
STNDL2 I3P* TRIP
W2_CT_B_I3P
STNDL3 U3P* TRL1
W2_VT_B_U3P
STNDPE FALSE BLOCK TRL2
STFW1PH VTSZ TRL3
W2_FSD1-BLKZ
STFW2PH BLKTR START
FALSE
STFW3PH
STCND STL1
STPE DIRCND STL2
STPP STL3
STCNDZ STND
STCNDLE
PPLPHIZ
W2_CT_B_I3P I3P* START
W2_VT_B_U3P U3P* ZREL
FALSE BLOCK
FALSE RELL1N
FALSE RELL2N
FALSE RELL3N
STCND
Figure 235: Phase preference logic overview
PPLPHIZ can be divided into three main parts:

• Phase selection
• Preference logic
8.18.6.1 Residual current criteria GUID-982F5BF4-CB45-4404-94F5-9A24B891056B v1
The fundamental start criterion for a cross-country fault is a continuous residual current (3I0)
above setting level IN>.
Transient residual currents associated with single phase fault inception are not allowed to
release the distance protection. This is taken care of by a time-on-delay tIN, which should be
set longer than the expected duration of the transient.
If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since
the next fault event is expected to be a two-phase fault. The criterion for this bypass is that
the residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The
time-off-delay tOffUN is used to make sure that the bypass is steady during the cross-country
fault.
The time delay for residual current start is also bypassed as soon as two low voltages are
detected during the cross-country fault (startUPP). See Figure 236.

Technical manual
startUPP
OR
tUN tOffUN
3U0 > 3U0> t t
(Non delayed IN start)
AND
tIN startIN
OR
3I0>IN> t
Figure 236: Residual current criteria
8.18.6.2 Phase selection GUID-975FB3BE-A7FE-4CD8-8954-6542870DF482 v1
During a cross-country fault, the phase with an external fault typically does not carry any fault
current, which will make it difficult for a conventional phase selection function to detect the
fault. Therefore, PPLPHIZ function provides an additional phase selection based on voltage.
PPLPHIZ is designed to detect two-phase faults based on under-voltage in two phases or

between two phases.
ULx < UPN<

L1
L2 OR startU
AND
L3
3U0 > 3U0>
AND startUL1L2
OR
AND startUL2L3
OR
startUL1
OR
AND startUL3L1
ULxLy < UPP< OR
startUL2
L1L2 OR
L2L3
startUL3
L3L1 OR
Figure 237: Phase selection

The voltage phase selection can be complemented with external phase selection through
inputs RELL1-3N.
Voltage phase selection is disabled in No Filter and NoPref operating modes.

Technical manual
startUL1
AND
startUL2
startUPP
AND OR
startUL3
AND
OperMode = No Filter
OR
AND
OperMode = NoPref
OR
RELL1N startL1
OR
OR
RELL2N startL2
OR
OR
RELL3N startL3
OR
OR
L1N
L2N
L3N
STCND Integer L1L2 zrelL1L2
to Bool
L2L3 zrelL2L3
L3L1 zrelL3L1
Figure 238: Start
8.18.6.3 Preference logic GUID-A7FCCE03-C841-4BAD-98F8-EB9497D53687 v1
The different operating modes (selected with OperMode setting) determine how the internal
status is used to release the phases of the connected distance protection.
No Filter mode GUID-2D585104-E319-4B6D-82C7-3373CA7E87F7 v1

In No Filter mode, all phase starts of the phase selection will be passed through without any
preference or requirement on residual current or voltage.
No Filter mode is equivalent to connecting the phase selection directly to the distance
protection.
startL1 zrelL1
startL2 zrelL2
startL3 zrelL3
Figure 239: No Filter mode
No Preference mode GUID-DA373F35-2082-4347-9A35-B34E23C03B01 v1

The ‘NoPref’ mode uses only the residual current criteria (startIN). There is no preference
provided in this mode. All three phase-to-earth loops of the distance protection may be
released when a residual current start has occurred.

Technical manual
startL1
zrelL1
AND
startL2
zrelL2
AND
startL3
zrelL3
AND
startIN
Figure 240: No Preference mode
Preference modes GUID-BE61A451-E389-4136-8C0B-2C04888EEACE v1

In the preference modes (for example, ‘1231c’), the internal under-voltage phase selection
status is filtered with the selected preference scheme to achieve the desired phase preference.
Only the preferred phase-to-earth loop of the distance protection is released to operate. In
addition to the voltage phase selection, a residual current start is required.
A logic is also included to handle the special case where only one start (startL1-3) is present.
The internal under-voltage phase selection always issues a release in at least two phases, but
the inputs RELL1-3N can be activated with some time apart. If no measures are taken, the
phase activated first will pass through the preference scheme and release the distance
protection. Since it could a be non-preferred phase, a time delay of 40 ms is provided to
release if only one phase is detected, in order to wait for the second phase to be activated. If
no second phase is detected within 40 ms, the single phase is released without preference.
Additionaly, there are some cases where no release would be issued:
• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop
In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all phases if there is no output from the preference
scheme after 40 ms from the activation of the residual current start.
Hence, if there is a residual current start, it is guaranteed that the distance protection is
released in at least one phase. This is valid for all phase preference schemes.
Preference
OperMode Scheme
Sheme
startL1 prefL1
INL1 OUTL1
startL2 prefL2
INL2 OUTL2
startL3 INL3 OUTL3
prefL3
More
than
one stIN
AND
true
startIN
40 ms
stIN40ms
t
Figure 241: Phase preference 1

Technical manual
prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
OR
AND
stIN40ms
stIN OR

Table 235 shows the preferred phase for each detected cross-country fault type and operating
mode (OperMode).
Table 235: Preferred phase for each cross-country fault type and operating mode
Operating mode start in L1 & L2 start in L2 & L3 start in L3 & L1
1231c L1 L2 L3
1321c L2 L3 L1
123a L1 L2 L1
132a L1 L3 L1
213a L2 L2 L1
231a L2 L2 L3
312a L1 L3 L3
321a L2 L3 L3
8.18.6.4 Output GUID-3D64237F-8D45-4CAE-8F2E-31F6741842C2 v1
All loop releasing signals are gathered in the binary coded integer output ZREL. The value of
ZREL can be calculated according to Equation 101.
ZREL L1N *1 L2N *2  L3N *4  L1L2*8  L2L3*16  L3L1*32

For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then
the value is 1+4=5.
The BLOCK input will only block the enabling signals for phase-to-earth loops,
phase-to-phase loops are still released. The PPLPHIZ is designed not to have
any influence on the phase-to-phase loops of the distance protection.

Technical manual
startU
AND
zrelL1
AND
zrelL2
AND L1N
zrelL3 L2N
AND L3N
Bool to ZREL
zrelL1L2 L1L2 Integer
zrelL2L3 L2L3
BLOCK zrelL3L1 L3L1
Figure 243: Output

GUID-BACA37F7-E945-40BC-BF9D-A65BFC96CA91 v8
Table 236: PPLPHIZ technical data

Operate value, phase-to-phase (1 - 100)% of UBase ±0.5% of Ur
and phase-to-neutral
undervoltage
Reset ratio, undervoltage < 105% -
Operate value, residual (5 - 300)% of UBase ±0.5% of Ur at U ≤ Ur
voltage ±0.5% of U at U > Ur
Reset ratio, residual voltage > 95% -

Operate value, residual current (10 - 200)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio, residual current > 95% -

Independent time delay for (0.000 - 60.000) s ±0.2% or ±25 ms whichever is
residual current at 0 to 2 x Iset greater

residual voltage at 0.8 x Uset to greater
1.2 x Uset
Independent dropoff-delay for (0.000 - 60.000) s ±0.2% or ±25 ms whichever is

residual voltage at 1.2 x Uset to greater
0.8 x Uset
Operating mode No Filter, NoPref

Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a, 312a, 321a
8.19 Phase preference logic PPL2PHIZ GUID-80133640-FB3E-400C-B7FF-C2BB0AD1A045 v1
GUID-850E4134-E912-45EC-981E-E1A2C12A91A8 v1

Phase preference logic PPL2PHIZ - -

Technical manual
8.19.2 Functionality GUID-39785DEB-E5D7-447C-977B-9E940CA8E774 v1
The Phase preference logic function (PPL2PHIZ) is used with the high speed distance
protection, quad and mho characteristic (ZMFPDIS). It is intended to be used in isolated or
high impedance earthed networks where there is a requirement to operate on only one of the
faulty lines during a cross-country fault. It can be used without preference to restrain
operation for single earth faults with a delayed zero-sequence current release.
For cross-country faults, the logic selects either the leading or lagging phase-earth loop for
measurement. It initiates operation on the preferred fault based on the selected phase
preference. A number of different phase preference combinations are available for selection.
PPL2PHIZ provides an additional phase selection criteria, namely under voltage criteria,
suitable for cross-country faults. In radial networks, where there is no fault current in the
phase with the external fault, current or impedance based phase selection methods become
ineffective. Hence, only voltage can be used for phase selection. The phase selection result will
be the same for all bays on a bus since the voltage is the same, which is an important
condition for operating with phase preference.
In meshed and stronger networks, it is difficult to find appropriate under-voltage or phase

selection settings. If PPL2PHIZ is unable to detect both faulty phases, then it is not possible to
provide preference. The distance protection will still be released however, without preference.
The final result might be that both faulty feeders are operated. In other words, operation is
prioritized over strict adherence to preference.
8.19.3 Function block GUID-8C40D1F5-FE37-422D-B9E6-BE14E6A8FED8 v1
PPL2PHIZ
I3P* START
U3P* ZREL
BLOCK
RELL1N
RELL2N
RELL3N
Figure 244: PPL2PHIZ function block
8.19.4 Signals
Table 237: PPL2PHIZ Input signals

SIGNAL
SIGNAL

Technical manual
Table 238: PPL2PHIZ Output signals

START BOOLEAN Indicates start for earth fault(s), regardless of direction
ZREL INTEGER Integer coded output release signal
8.19.5 Settings
Table 239: PPL2PHIZ Group settings (basic)

OperMode No Filter - - No Filter Operating mode (c=cyclic,a=acyclic)
NoPref
1231c
1321c
123a
132a
213a
231a
312a
321a
UPN< 0 - 100 %UB/sq 1 70 Operate value of phase undervoltage
3 in % of UBase/sqrt(3)
UPP< 0 - 100 %UB 1 50 Operate value of line to line
undervoltage (% of UBase)
3U0> 5 - 300 %UB/sq 1 20 Operate value of residual voltage in %
3 of UBase/sqrt(3)
IN> 10 - 200 %IB 1 20 Operate value of residual current (%
of IBase)
tUN 0.000 - 60.000 s 0.001 0.100 Pickup-delay for residual voltage
tOffUN 0.000 - 60.000 s 0.001 0.100 Dropoff-delay for residual voltage
tIN 0.000 - 60.000 s 0.001 0.150 Pickup-delay for residual current
Table 240: PPL2PHIZ Non group settings (basic)

Value groups
8.19.6 Operation principle GUID-B304D0D3-1E4E-482D-975F-229467905608 v1
The PPL2PHIZ function releases the phase selection inside the distance protection, see Figure
245.
The phase selection inside the distance protection has to detect the fault
before an operation from the distance zones can be achieved, even when the
distance protection is released by PPL2PHIZ.

Technical manual
PPL2PHIZ ZMFPDIS
Phase
Phase selection
preference
Zone1
L1N relcndphs TRZ1
L1N bitwise enable
L2N AND
L2N
L3N Zone2
L3N Bool to ZREL bitwise
TRUE L1L2 Integer AND
enable
RELCNDZ1
TRUE L2L3
Zone3
TRUE L3L1 RELCNDZ2 bitwise
enable
AND
RELCNDZ3
Zone4
RELCNDZ4 bitwise
enable
TRZ4
AND
RELCNDZ5 Zone5
bitwise
enable
TRZ5
RELCNDZRV AND
ZoneRV
bitwise
enable
TRZRV
AND
Figure 245: Phase preference logic overview

PPL2PHIZ can be divided into three main parts:

• Phase selection
• Preference logic
8.19.6.1 Residual current criteria GUID-982F5BF4-CB45-4404-94F5-9A24B891056B v1
The fundamental start criterion for a cross-country fault is a continuous residual current (3I0)
above setting level IN>.
Transient residual currents associated with single phase fault inception are not allowed to
release the distance protection. This is taken care of by a time-on-delay tIN, which should be
set longer than the expected duration of the transient.
If a single phase fault remains for some time, it is possible to bypass the tIN time delay, since
the next fault event is expected to be a two-phase fault. The criterion for this bypass is that
the residual voltage is greater than setting level 3U0> for a time longer than setting tUN. The
time-off-delay tOffUN is used to make sure that the bypass is steady during the cross-country
fault.
The time delay for residual current start is also bypassed as soon as two low voltages are
detected during the cross-country fault (startUPP). See Figure 246.
startUPP
OR
tUN tOffUN
3U0 > 3U0> t t
(Non delayed IN start)
AND
tIN startIN
OR
3I0>IN> t
Figure 246: Residual current criteria

Technical manual
8.19.6.2 Phase selection GUID-A3B9F4A9-30D1-40E5-B0A8-6BB66093C27A v1
During a cross-country fault, the phase with an external fault typically does not carry any fault
current, which will make it difficult for a conventional phase selection function to detect the
fault. Therefore, PPL2PHIZ function provides an additional phase selection based on voltage.
PPL2PHIZ is designed to detect two-phase faults based on under-voltage in two phases or

between two phases.
ULx < UPN<

L1
L2 OR startU
AND
L3
3U0 > 3U0>
AND startUL1L2
OR
AND startUL2L3
OR
startUL1
OR
AND startUL3L1
ULxLy < UPP< OR
startUL2
L1L2 OR
L2L3
startUL3
L3L1 OR
Figure 247: Phase selection

The voltage phase selection can be complemented with external phase selection through
inputs RELL1-3N.
Voltage phase selection is disabled in No Filter and NoPref operating modes.
startUL1
AND
startUL2
startUPP
AND OR
startUL3
AND
OperMode = No Filter
OR
OperMode = NoPref
startL1
RELL1N OR
startL2
RELL2N OR
startL3
RELL3N OR
Figure 248: Start

Technical manual
8.19.6.3 Preference logic GUID-A7FCCE03-C841-4BAD-98F8-EB9497D53687 v1
The different operating modes (selected with OperMode setting) determine how the internal
status is used to release the phases of the connected distance protection.
No Filter mode GUID-BB45C4A8-890F-4716-940C-53BBB47710F3 v1

In No Filter mode, all distance protection phases are released constantly, leaving it to the
phase selection inside the distance protection to decide which distance zone loops should be
allowed to operate.
TRUE zrelL1
TRUE zrelL2
TRUE zrelL3
Figure 249: No Filter mode

No Filter mode is equivalent to disconnecting the PPL2PHIZ from the distance protection.
No Preference mode GUID-3D947DCA-7938-4C44-8BA6-4DA2789EDC98 v1

The ‘NoPref’ mode uses only the residual current criteria (startIN). There is no preference
provided in this mode. All three phase-to-earth loops of the distance protection releases when
a residual current start has occurred.
TRUE
zrelL1
AND
TRUE
zrelL2
AND
TRUE
zrelL3
AND
startIN
Figure 250: No Preference mode
Preference modes GUID-BE61A451-E389-4136-8C0B-2C04888EEACE v1

In the preference modes (for example, ‘1231c’), the internal under-voltage phase selection
status is filtered with the selected preference scheme to achieve the desired phase preference.
Only the preferred phase-to-earth loop of the distance protection is released to operate. In
addition to the voltage phase selection, a residual current start is required.
A logic is also included to handle the special case where only one start (startL1-3) is present.
The internal under-voltage phase selection always issues a release in at least two phases, but
the inputs RELL1-3N can be activated with some time apart. If no measures are taken, the
phase activated first will pass through the preference scheme and release the distance
protection. Since it could a be non-preferred phase, a time delay of 40 ms is provided to
release if only one phase is detected, in order to wait for the second phase to be activated. If
no second phase is detected within 40 ms, the single phase is released without preference.
Additionaly, there are some cases where no release would be issued:

Technical manual
• All three phases are involved in the fault and a cyclic scheme is selected
• No faulty phase can be detected due to an insufficient voltage drop
In both cases, no release signals come from the phase preference scheme. For these cases, an
additional logic is provided that releases all phases if there is no output from the preference
scheme after 40 ms from the activation of the residual current start.
Hence, if there is a residual current start, it is guaranteed that the distance protection is
released in at least one phase. This is valid for all phase preference schemes.
Preference
OperMode Scheme
Sheme
startL1 prefL1
INL1 OUTL1
startL2 prefL2
INL2 OUTL2
startL3 INL3 OUTL3
prefL3
More
than
one stIN
AND
true
startIN
40 ms
stIN40ms
t
prefL1
OR zrelL1
AND
prefL2
OR zrelL2
AND
prefL3
OR zrelL3
AND
OR
AND
stIN40ms
stIN OR

Table 241 shows the preferred phase for each detected cross-country fault type and operating
mode (OperMode).
Table 241: Preferred phase for each cross-country fault type and operating mode
1231c L1 L2 L3
1321c L2 L3 L1
123a L1 L2 L1
132a L1 L3 L1
213a L2 L2 L1

Technical manual

231a L2 L2 L3
312a L1 L3 L3
321a L2 L3 L3
8.19.6.4 Output GUID-FCDCF1A9-A34D-4FD7-B488-3F31A93BE231 v1
All loop releasing signals are gathered in the binary coded integer output ZREL. The value of
ZREL can be calculated according to Equation 102.
ZREL L1N *1 L2N *2  L3N *4  L1L2*8  L2L3*16  L3L1*32

For example, if only L1N is active, then the value is 1. If both start L1N and L3N are active, then
the value is 1+4=5.
The phase-to-phase loops are always released, that is, the value of ZREL will
always be at least 8+16+32=56. For example:
If only L1N is active, then the value is 1+56=57
If start L1N and L3N are active, then the value is 1+4+56=61
The BLOCK input will only block the enabling signals for phase-to-earth loops,
phase-to-phase loops are still released. The PPL2PHIZ is designed not to have
any influence on the phase-to-phase loops of the distance protection.
startU
AND
zrelL1
AND
zrelL2
AND L1N
zrelL3 L2N
AND L3N
Bool to ZREL
TRUE L1L2 Integer
TRUE L2L3
BLOCK TRUE L3L1
Figure 253: Output

Technical manual

GUID-42119BFF-1756-431C-A5A1-0AB637213E96 v1
Table 242: PPL2PHIZ technical data

Operate value, phase-to-phase (1 - 100)% of UBase ±0.5% of Ur
and phase-to-neutral
undervoltage
Operate value, residual (5 - 300)% of UBase ±0.5% of Ur at U ≤ Ur
voltage ±0.5% of U at U > Ur
Reset ratio, residual voltage > 95% -

Operate value, residual current (10 - 200)% of IBase ±1.0% of Ir at I ≤ Ir

residual current at 0 to 2 x Iset greater

residual voltage at 0.8 to 1.2 x greater
Uset
Independent dropoff-delay for (0.000 - 60.000) s ±0.2% or ±25 ms whichever is

residual voltage at 1.2 to 0.8 x greater
Uset
Operating mode No Filter, NoPref

Cyclic: 1231c, 1321c
Acyclic: 123a, 132a, 213a, 231a, 312a, 321a

Technical manual
Current protection
Section 9 Current protection

9.1 Instantaneous phase overcurrent protection PHPIOC IP14506-1 v6
M14880-1 v5

Instantaneous phase overcurrent PHPIOC 50
protection
3I>>
SYMBOL-Z V1 EN-US
The instantaneous three phase overcurrent (PHPIOC) function has a low transient overreach
and short tripping time to allow use as a high set short-circuit protection function.
PHPIOC
I3P* TRIP
BLOCK TRL1
ENMULT TRL2
TRL3
Figure 254: PHPIOC function block
9.1.4 Signals IP11433-1 v2
Table 243: PHPIOC Input signals

I3P GROUP - Three phase current
SIGNAL
ENMULT BOOLEAN 0 Enable current start value multiplier

Technical manual
Current protection
Table 244: PHPIOC Output signals

TRIP BOOLEAN Trip signal from any phase
Table 245: PHPIOC Group settings (basic)

On
OpMode 2 out of 3 - - 1 out of 3 Select operation mode 2-out of 3 / 1-
1 out of 3 out of 3
IP>> 5 - 2500 %IB 1 200 Operate phase current level in % of
IBase
Table 246: PHPIOC Group settings (advanced)

IP>>Min 5 - 2500 %IB 1 5 Minimum used operate phase current
level in % of IBase, if IP>> is less than
IP>>Min then IP>> is set to IP>>Min
IP>>Max 5 - 2500 %IB 1 2500 Maximum used operate phase current
level in % of IBase, if IP>> is greater
than IP>>Max then IP>> is set to
IP>>Max
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Table 247: PHPIOC Non group settings (basic)

Value groups

Table 248: PHPIOC Monitored data


Technical manual
Current protection
9.1.7 Operation principle M12913-3 v8
The sampled analogue phase currents are pre-processed in a discrete Fourier filter (DFT)
block. The RMS value of each phase current is derived from the fundamental frequency
components, as well as sampled values of each phase current. These phase current values are
fed to the instantaneous phase overcurrent protection 3-phase output function PHPIOC. In a
comparator the RMS values are compared to the set operation current value of the function
(IP>>).
If a phase current is larger than the set operation current a signal from the comparator for this
phase is set to true. This signal will, without delay, activate the output signal TRLn (n=1,2,3) for
this phase and the TRIP signal that is common for all three phases.
There is an operation mode (OpMode) setting: 1 out of 3 or 2 out of 3. If the parameter is set to
1 out of 3, any phase trip signal will be activated. If the parameter is set to 2 out of 3, at least
two phase signals must be activated for trip.
There is also a possibility to activate a preset change of the set operation current (StValMult)
via a binary input (ENMULT). In some applications the operation value needs to be changed,
for example, due to transformer inrush currents.
The operation current value IP>>, is limited to be between IP>>Max and IP>>Min. The default
values of the limits are the same as the setting limits for IP>>, and the limits can only be used
for reducing the allowed range of IP>>. This feature is used when remote setting of the
operation current value is allowed, making it possible to ensure that the operation value used
is reasonable. If IP>> is set outside IP>>Max and IP>>Min, the closest of the limits to IP>> is
used by the function. If IP>>Max is smaller then IP>>Min, the limits are swapped. The principle
of the limitation is shown in Figure 255.
IP>>Max
MAX hi
u y
IP>>_used
IP>>
MIN lo
IP>>Min
Figure 255: Logic for limitation of used operation current value
PHPIOC can be blocked using the binary input BLOCK.
M12336-1 v13
Table 249: PHPIOC technical data

Operate current (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (50–2500)% of IBase -

Operate time at 0 to 2 x Iset Min. = 15 ms -
Max. = 25 ms
Reset time at 2 x Iset to 0 Min. = 15 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Iset -

Technical manual
Current protection

Max. = 15 ms
Max. = 40 ms
Dynamic overreach < 5% at t = 100 ms -
9.2 Directional phase overcurrent protection, four steps

OC4PTOC SEMOD129998-1 v8
M14885-1 v6

Directional phase overcurrent OC4PTOC 51_67
TOC-REVA V2 EN-US
Directional phase overcurrent protection, four steps (OC4PTOC) has an inverse or definite
time delay for each step.
All IEC and ANSI inverse time characteristics are available together with an optional user
defined time characteristic.
The directional function needs voltage as it is voltage polarized with memory. The function can
be set to be directional or non-directional independently for each of the steps.
A second harmonic blocking level can be set for the function and can be used to block each
step individually.

Technical manual
Current protection
OC4PTOC
I3P* TRIP
U3P* TR1
BLOCK TR2
BLKTR TR3
BLKST1 TR4
BLKST2 TRL1
BLKST3 TRL2
BLKST4 TRL3
ENMULT1 TR1L1
ENMULT2 TR1L2
ENMULT3 TR1L3
ENMULT4 TR2L1
TR2L2
TR2L3
TR3L1
TR3L2
TR3L3
TR4L1
TR4L2
TR4L3
START
ST1
ST2
ST3
ST4
STL1
STL2
STL3
ST1L1
ST1L2
ST1L3
ST2L1
ST2L2
ST2L3
ST3L1
ST3L2
ST3L3
ST4L1
ST4L2
ST4L3
ST2NDHRM
DIRL1
DIRL2
DIRL3
STDI RCND
Figure 256: OC4PTOC function block
9.2.4 Signals
Table 250: OC4PTOC Input signals

SIGNAL
SIGNAL
BLKST1 BOOLEAN 0 Block of Step1

Technical manual
Current protection

ENMULT1 BOOLEAN 0 When activated, the current multiplier is in use for step1
Table 251: OC4PTOC Output signals

TRIP BOOLEAN Trip
TR1 BOOLEAN Common trip signal from step1
TR1L1 BOOLEAN Trip signal from step1 phase L1
START BOOLEAN General start signal
ST1 BOOLEAN Common start signal from step1
ST1L1 BOOLEAN Start signal from step1 phase L1

Technical manual
Current protection

ST2NDHRM BOOLEAN Second harmonic detected
DIRL1 INTEGER Direction for phase1
STDIRCND INTEGER Binary coded start and directional information
9.2.5 Settings
Table 252: OC4PTOC Group settings (basic)

On
AngleRCA 40 - 65 Deg 1 55 Relay characteristic angle (RCA)
AngleROA 40 - 89 Deg 1 80 Relay operation angle (ROA)
StartPhSel 1 out of 3 - - 1 out of 3 Number of phases required for op (1
2 out of 3 of 3, 2 of 3, 3 of 3)
3 out of 3
DirMode1 Off - - Non-directional Directional mode of step 1 (off, nodir,
Non-directional forward, reverse)
Forward
Reverse
Characterist1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. step 1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I1> 5 - 2500 %IB 1 1000 Operating phase current level for step
1 in % of IBase
t1 0.000 - 60.000 s 0.001 0.000 Def time delay or add time delay for
inverse char of step 1
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the inverse time
delay for step 1

Technical manual
Current protection

IMin1 1 - 10000 %IB 1 100 Minimum operate current for step1 in
% of IBase
t1Min 0.000 - 60.000 s 0.001 0.000 Minimum operate time for inverse
curves for step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for current operate level for
step 1
Forward
Reverse
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
2 in % of IBase
delay for step 2
% of IBase
curves for step 2
step 2
Forward
Reverse

Technical manual
Current protection

ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
3 in % of IBase
delay for step 3
% of IBase
curves for step 3
step 3
Forward
Reverse
ANSI Norm. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
4 in % of IBase
delay for step 4

Technical manual
Current protection

% of IBase
curves for step 4
step 4
Table 253: OC4PTOC Group settings (advanced)

IMinOpPhSel 1 - 100 %IB 1 7 Minimum current for phase selection
in % of IBase
2ndHarmStab 5 - 100 % 1 20 Operate level of 2nd harmonic curr in
% of fundamental curr
I1>Min 5 - 2500 %IB 1 5 Minimum used operating phase
current level for step 1 in % of IBase, if
I1> is less than I1>Min then I1> is set to
I1>Min
I1>Max 5 - 2500 %IB 1 2500 Maximum used operating phase
I1> is greater than I1>Max then I1> is
set to I1>Max
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of reset curve type for step 1
IEC Reset
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Constant reset time for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Parameter P for customer
programmable curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Parameter A for customer
tBCrv1 0.00 - 20.00 - 0.01 0.00 Parameter B for customer
tCCrv1 0.1 - 10.0 - 0.1 1.0 Parameter C for customer
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Parameter TR for customer
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
HarmBlock1 Off - - Off Enable block of step 1 from harmonic
On restrain
I2> is less than I2>Min then I2> is set
to I2>Min
set to I2>Max
IEC Reset
ANSI reset

Technical manual
Current protection

On restrain
to I3>Min
set to I3>Max
IEC Reset
ANSI reset
On restrain
to I4>Min
set to I4>Max
ResetTypeCrv4 Instantaneous - - Instantaneous Selection of reset curve type for step
IEC Reset 4
ANSI reset

Technical manual
Current protection

On restrain
Table 254: OC4PTOC Non group settings (basic)

MeasType DFT - - DFT Selection between DFT and RMS
RMS measurement
Value groups

Table 255: OC4PTOC Monitored data

DIRL1 INTEGER 1=Forward - Direction for phase1
2=Reverse
0=No direction
2=Reverse
0=No direction
2=Reverse
0=No direction
Directional phase overcurrent protection, four steps OC4PTOC is divided into four different
sub-functions. For each step x , where x is step 1, 2, 3 and 4, an operation mode is set by
DirModex: Off/Non-directional/Forward/Reverse.

Technical manual
Current protection
The protection design can be divided into four parts:
• The direction element

• The harmonic restraint blocking function
• The four step overcurrent function
• The mode selection
If VT inputs are not available or not connected, setting parameter DirModex

shall be left to default value, Non-directional.
4 step overcurrent
Direction dirPh1Flt element faultState
faultState
Element One element for each
dirPh2Flt step
I3P dirPh3Flt START
U3P
TRIP
Harmonic harmRestrBlock
Restraint
Element
enableDir
Mode Selection
enableStep1-4
DirectionalMode1-4
Figure 257: Functional overview of OC4PTOC

M12883-16 v11
A common setting for all steps, StartPhSel, is used to specify the number of phase currents to
be high to enable operation. These settings can be chosen: 1 out of 3, 2 out of 3 or 3 out of 3.
Using a parameter setting MeasType within the general settings for the function OC4PTOC, it
is possible to select the type of the measurement used for all overcurrent stages. Either
discrete Fourier filter (DFT) or true RMS filter (RMS) can be selected.
If the DFT option is selected, only the RMS value of the fundamental frequency component of
each phase current is derived. The influence of the DC current component and higher harmonic
current components are almost completely suppressed. If the RMS option is selected, then the
true RMS value is used. The true RMS value includes the contribution from the current DC
component as well as from the higher current harmonic in addition to the fundamental
frequency component.
In a comparator, the DFT or RMS values are compared to the set operation current value of the
function (I1>, I2>, I3> or I4>) for each phase current. If a phase current is larger than the set
operation current, outputs START, STx, STL1, STL2 and STL3 are activated without delay.
Output signals STL1, STL2 and STL3 are common for all steps. This means that the lowest set
step will initiate the activation. The START signal is common for all three phases and all steps.
It shall be noted that the selection of measured value (DFT or RMS) do not influence the
operation of directional part of OC4PTOC.

Technical manual
Current protection
Service values for individually measured phase currents are available on the local HMI for
OC4PTOC function, which simplifies testing, commissioning and in service operational
checking of the function.
A harmonic restrain of the function can be chosen. A set 2nd harmonic current in relation to
the fundamental current is used.
The function can be directional.The direction of a fault is given as the current angle in relation
to the voltage angle. The fault current and fault voltage for the directional function are
dependent on the fault type. The selection of the measured value (DFT or RMS) does not
influence the operation of the directional part of OC4PTOC. To enable directional
measurement at close-in faults, causing a low measured voltage, the polarization voltage is a
combination of the apparent voltage (85%) and a memory voltage (15%). The following
combinations are used.
Phase-phase short circuit:
U refL1L 2 = U L1 - U L 2 I dirL1L 2 = I L1 - I L 2
U refL 2 L 3 = U L 2 - U L 3 I dirL 2 L 3 = I L 2 - I L 3
U refL 3 L1 = U L 3 - U L1 I dirL 3 L1 = I L 3 - I L1
Phase-earth short circuit:
U refL1 = U L1 I dirL1 = I L1
U refL 2 = U L 2 I dirL 2 = I L 2
U refL 3 = U L 3 I dirL 3 = I L 3
set base voltage UBase. So the directional element can be used for all unsymmetrical faults
After 100 ms, the following occurs:
• If the current is still above the set value of the minimum operating current (7% of the set
terminal rated current IBase), the condition seals in.

Technical manual
Current protection

The directional setting is given as a characteristic angle AngleRCA for the function and an
angle window ROADir.
Reverse
Uref
RCA
ROA
ROA Forward
Idir
en05000745.vsd
Figure 258: Directional characteristic of the phase overcurrent protection

The default value of AngleRCA is –55°. The parameter AngleROA gives the angular distance
from AngleRCA to define the directional borders.
A minimum current for the directional phase start current signal can be set. IMinOpPhSel is the
start level for the directional evaluation of IL1, IL2 and IL3. The directional signals release the
overcurrent measurement in the respective phases if their current amplitudes are higher than
the start level (IMinOpPhSel) and the direction of the current is according to the set direction
of the step.
If no blocking signals are active, the start signal will start the timer of the steps. The time
characteristic for each step can be chosen as definite time delay or an inverse time delay
characteristic. A wide range of standardized inverse time delay characteristics is available. It is
also possible to create a tailor made time characteristic.
The possibilities for inverse time characteristics are described in section "Inverse
characteristics".

Technical manual
Current protection
Characteristx=DefTime
|IOP| AND
tx TRx
a OR
a>b
Ix> b
AND
STx
txmin
BLKSTx AND
BLOCK
Inverse
Characteristx=Inverse
DirModex=Off OR STAGEx_DIR_Int
DirModex=Non-directional
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
IEC12000008.vsd
IEC12000008.vsd
Figure 259: Simplified logic diagram for OC4PTOC
I3P
DFWDLx
U3P DFWDLxx
DREVLx
Directional
Element
AngleRCA DREVLxx FORWARD_int
Directional
AngleROA Release REVERSE_int
Block
STLx
Greater
IMinOpPhSel Comparator
x‐ means three phases 1,2 and 3
xx – means phase to phase 12,23,31
Figure 260: OC4 directional release block diagram

Different types of reset time can be selected as described in section "Inverse characteristics".
There is a possibility to activate a preset change (IxMult x= 1, 2, 3 or 4) of the set operation

current via a binary input ENMULTx (enable multiplier). In some applications the operation
value needs to be changed, for example due to changed network switching state.

Technical manual
Current protection
The operation current value Ix>, is limited to be between Ix>Max and Ix>Min. The default values
of the limits are the same as the setting limits for Ix>, and the limits can only be used for
reducing the allowed range of Ix>. This feature is used when remote setting of the operation
current value is allowed, making it possible to ensure that the operation value used is
reasonable. If Ix> is set outside Ix>Max and Ix>Min, the closest of the limits to Ix> is used by
the function. If Ix>Max is smaller then Ix>Min, the limits are swapped. The principle of the
limitation is shown in Figure 261.
Ix>Max
MAX hi
u y
Ix>_used
Ix>
MIN lo
Ix>Min
The STDIRCND output provides an integer signal that depends on the start and directional
evaluation and is derived from a binary coded signal as described in Table 256.
Table 256: Code description for STDIRCND output signal

STDIRCND Description
bit 0 (1) General start
bit 1 (2) Direction detected in forward
bit 2 (4) Direction detected in reverse
bit 3 (8) Start in phase L1
bit 4 (16) Forward direction detected in phase L1
bit 5 (32) Reverse direction detected in phase L1
All four steps in OC4PTOC can be blocked from the binary input BLOCK. The binary input
BLKSTx (x=1, 2, 3 or 4) blocks the operation of the respective step.
The start signals from the function can be blocked by the binary input BLKST.The trip signals
from the function can be blocked by the binary input BLKTR.
GUID-E3980B2D-EEDA-4BF1-A07D-E7B721130554 v6
A harmonic restrain of the directional phase overcurrent protection function OC4PTOC can be
chosen. If the ratio of the 2nd harmonic component in relation to the fundamental frequency
component in a phase current exceeds the preset level defined by the parameter 2ndHarmStab
setting, any of the four overcurrent stages can be selectively blocked by the parameter
HarmBlockx setting. When the 2nd harmonic restraint feature is active, the OC4PTOC function
output signal ST2NDHRM will be set to the logical value one.

Technical manual
Current protection
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b
2ndH_BLOCK_Int
Extract
fundamental
current component
X
2ndHarmStab
Figure 262: Second harmonic blocking
When DirModex is set to Forward/Reverse and Ix> is set at its minimum value,
that is, 5.0% of IBase, the operation from the respective overcurrent step takes
place at 20.0% of IBase. This is done to avoid unintentional maloperations
during unbalanced loading conditions that might appear in power systems and
the unbalanced loading condition might lead to a neutral current in the range
of 10.0% to 15.0% of IBase.

M12342-1 v21
Table 257: OC4PTOC technical data

Operate current, step 1-4 (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (50–2500)% of -

lBase
Minimum operate current, step 1-4 (1-10000)% of lBase ±1.0% of Ir at I ≤ Ir
Relay characteristic angle (RCA) (40.0–65.0) degrees ±2.0 degrees

Relay operating angle (ROA) (40.0–89.0) degrees ±2.0 degrees
Second harmonic blocking (5–100)% of fundamental ±2.0% of Ir
Independent time delay at 0 to 2 x Iset, step (0.000-60.000) s ±0.2% or ±35 ms whichever is

1-4 greater
Minimum operate time for inverse curves , (0.000-60.000) s ±0.2% or ±35 ms whichever is
step 1-4 greater
Inverse time characteristics, see 16 curve types See table 1150, table 1151 and
table 1150, table 1151 and table 1152 table 1152
Operate time, start non-directional at 0 to Min. = 15 ms -
2 x Iset
Max. = 30 ms
Reset time, start non-directional at 2 x Iset Min. = 15 ms -
to 0
Max. = 30 ms
Operate time, start non-directional at 0 to Min. = 5 ms -
10 x Iset Max. = 20 ms

Technical manual
Current protection

Reset time, start non-directional at 10 x Iset Min. = 20 ms -
to 0 Max. = 35 ms
Impulse margin time 15 ms typically -

Operate frequency, directional overcurrent 38-83 Hz -
Operate frequency, non-directional 10-90 Hz -
overcurrent
9.3 Instantaneous residual overcurrent protection EFPIOC IP14508-1 v3
M14887-1 v4

Instantaneous residual overcurrent EFPIOC 50N
protection
IN>>
IEF V1 EN-US
The Instantaneous residual overcurrent protection (EFPIOC) has a low transient overreach and
short tripping times to allow the use for instantaneous earth-fault protection, with the reach
limited to less than the typical eighty percent of the line at minimum source impedance.
EFPIOC is configured to measure the residual current from the three-phase current inputs and
can be configured to measure the current from a separate current input.
EFPIOC
I3P* TRIP
BLOCK
BLKAR
ENMULT
Figure 263: EFPIOC function block
9.3.4 Signals IP11448-1 v2

Technical manual
Current protection
Table 258: EFPIOC Input signals

I3P GROUP - Three phase currents
SIGNAL
BLKAR BOOLEAN 0 Block input for auto reclose
ENMULT BOOLEAN 0 Enable current multiplier
Table 259: EFPIOC Output signals

Table 260: EFPIOC Group settings (basic)

On
IN>> 5 - 2500 %IB 1 200 Operate residual current level in % of
IBase
Table 261: EFPIOC Group settings (advanced)

IN>>Min 5 - 2500 %IB 1 5 Minimum used operate residual
current level in % of IBase, if IN>> is
less than IN>>Min then IN>> is set to
IN>>Min
IN>>Max 5 - 2500 %IB 1 2500 Maximum used operate residual
current level in % of IBase, if IN>> is
greater than IN>>Max then IN>> is set
to IN>>Max
StValMult 0.5 - 5.0 - 0.1 1.0 Multiplier for operate current level
Table 262: EFPIOC Non group settings (basic)

Value groups

Table 263: EFPIOC Monitored data

IN REAL - A Residual current

Technical manual
Current protection
The sampled analog residual currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of the residual current, as well as from the
sample values the equivalent RMS value is derived. This current value is fed to the
Instantaneous residual overcurrent protection (EFPIOC). In a comparator the RMS value is
compared to the set operation current value of the function (IN>>).
If the residual current is larger than the set operation current a signal from the comparator is
set to true. This signal will, without delay, activate the output signal TRIP.
There is also a possibility to activate a preset change of the set operation current via a binary
input (enable multiplier ENMULT). In some applications the operation value needs to be
changed, for example, due to transformer inrush currents.
The operation current value IN>>, is limited to be between IN>>Max and IN>>Min. The default
values of the limits are the same as the setting limits for IN>>, and the limits can only be used
for reducing the allowed range of IN>>. This feature is used when remote setting of the
operation current value is allowed, making it possible to ensure that the operation value used
is reasonable. If IN>> is set outside IN>>Max and IN>>Min, the closest of the limits to IN>> is
used by the function. If IN>>Max is smaller then IN>>Min, the limits are swapped. The principle
of the limitation is shown in Figure 264.
IN>>Max
MAX hi
u y
IN>>_used
IN>>
MIN lo
IN>>Min
EFPIOC function can be blocked from the binary input BLOCK. The trip signals from the
function can be blocked from the binary input BLKAR, that can be activated during single pole
trip and autoreclosing sequences.
M12340-2 v9
Table 264: EFPIOC technical data

Operate current (5-2500)% of lBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (50–2500)% of lBase -

Max. = 25 ms
Max. = 25 ms
Operate time at 0 to 10 x Min. = 5 ms -

Iset Max. = 15 ms

Technical manual
Current protection

Max. = 35 ms
Dynamic overreach < 5% at t = 100 ms -
9.4 Directional residual overcurrent protection, four steps

EF4PTOC IP14509-1 v8
M14881-1 v6

Directional residual overcurrent EF4PTOC 51N_67N
4(IN>)
4
alt
4
TEF-REVA V2 EN-US
Directional residual overcurrent protection, four steps (EF4PTOC) can be used as main
protection for phase-to-earth faults. It can also be used to provide a system back-up, for
example, in the case of the primary protection being out of service due to communication or
voltage transformer circuit failure.
EF4PTOC has an inverse or definite time delay independent for each step.
All IEC and ANSI time-delayed characteristics are available together with an optional user-
defined characteristic.
EF4PTOC can be set to be directional or non-directional independently for each step.
IDir, UPol and IPol can be independently selected to be either zero sequence or negative
sequence.
A second harmonic blocking can be set individually for each step.
Directional operation can be combined together with the corresponding communication logic
in permissive or blocking teleprotection scheme. The current reversal and weak-end infeed
functionality are available as well.
The residual current can be calculated by summing the three-phase currents or taking the
input from the neutral CT.

Technical manual
Current protection
EF4PTOC
I3P* TRIP
U3P* TRIN1
I3PPOL* TRIN2
I3PDIR* TRIN3
BLOCK TRIN4
BLKTR TRSOTF
BLKST1 START
BLKST2 STIN1
BLKST3 STIN2
BLKST4 STIN3
ENMULT1 STIN4
ENMULT2 STSOTF
ENMULT3 STFW
ENMULT4 STRV
CBPOS 2NDHARMD
CLOSECB
OPENCB
Figure 265: EF4PTOC function block
9.4.4 Signals IP11453-1 v2
Table 265: EF4PTOC Input signals

I3P GROUP - Group connection for operate current
SIGNAL
U3P GROUP - Group connection for polarizing voltage
SIGNAL
I3PPOL GROUP - Group connection for polarizing current
SIGNAL
I3PDIR GROUP - Group connection for directional current
SIGNAL
BLOCK BOOLEAN 0 General block
BLKST1 BOOLEAN 0 Block of step 1 (Start and trip)
CBPOS BOOLEAN 0 Breaker position
CLOSECB BOOLEAN 0 Breaker close command
OPENCB BOOLEAN 0 Breaker open command

Technical manual
Current protection
Table 266: EF4PTOC Output signals

TRIP BOOLEAN General trip signal
TRIN1 BOOLEAN Trip signal from step 1
TRSOTF BOOLEAN Trip signal from earth fault switch onto fault function
STIN1 BOOLEAN Start signal step 1
STSOTF BOOLEAN Start signal from earth fault switch onto fault function
STFW BOOLEAN Start signal forward direction
STRV BOOLEAN Start signal reverse direction
2NDHARMD BOOLEAN 2nd harmonic block signal
Table 267: EF4PTOC Group settings (basic)

On
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay Characteristic Angle (RCA)
polMethod Voltage - - Voltage Type of polarization
Current
Dual
UPolMin 1 - 100 %UB 1 1 Minimum voltage level for polarization
in % of UBase
IPolMin 2 - 100 %IB 1 5 Minimum current level for polarization
in % of IBase
RNPol 0.50 - 1000.00 Ohm 0.01 5.00 Real part of source impedance used
for current polarisation
XNPol 0.50 - 3000.00 Ohm 0.01 40.00 Imaginary part of source imp. used for
current polarisation
IN>Dir 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
2ndHarmStab 5 - 100 % 1 20 Operate level of 2nd harmonic curr in
% of fundamental curr
BlkParTransf Off - - Off Enable blocking at energizing of
On parallel transformers

Technical manual
Current protection

UseStartValue IN1> - - IN4> Current level blk at parallel transf
IN2> (step1, 2, 3 or 4)
IN3>
IN4>
SOTF Off - - Off SOTF operation mode (Off/SOTF/
SOTF Undertime/SOTF&Undertime)
UnderTime
SOTF&UnderTime
ActivationSOTF Open - - Open Select signal to activate SOTF: CB-
Closed Open/ -Closed/ -Close cmd
CloseCommand
StepForSOTF Step 2 - - Step 2 Select start from step 2 or 3 to start
Step 3 SOTF
HarmBlkSOTF Off - - Off Enable harmonic restrain function in
On SOTF
tSOTF 0.000 - 60.000 s 0.001 0.200 Time delay for SOTF
t4U 0.000 - 60.000 s 0.001 1.000 Switch-onto-fault active time
ActUnderTime CB position - - CB position Select signal to activate under time
CB command (CB Pos / CB Command)
tUnderTime 0.000 - 60.000 s 0.001 0.300 Time delay for under time
DirMode1 Off - - Non-directional Directional mode of step 1 (Off, Non-
Non-directional dir, Forward, Reverse)
Forward
Reverse
Characterist1 ANSI Ext. inv. - - ANSI Def. Time Time delay characteristic for step 1
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
IN1> 1 - 2500 %IB 1 100 Residual current operate level for step
1 in % of IBase
k1 0.05 - 999.00 - 0.01 0.05 Time multiplier for the step 1 selected
time characteristic
IMin1 1.00 - 10000.00 %IB 1.00 100.00 Minimum operate residual current for
step 1 in % of IBase
time characteristic step 1
IN1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for the residual current
setting value for step 1
HarmBlock1 Off - - On Enable block of step 1 from harmonic
On restrain

Technical manual
Current protection

Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
2 in % of IBase
time characteristic
IMin2 1.00 - 10000.00 %IB 1.00 50 Minimum operate residual current for
On restrain
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
3 in % of IBase

Technical manual
Current protection

time characteristic
On restrain
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
4 in % of IBase
time characteristic
On restrain

Technical manual
Current protection
Table 268: EF4PTOC Group settings (advanced)

IN1>Min 1 - 2500 %IB 1 1 Minimum used operate residual
IN1> is less than IN1>Min then IN1> is
set to IN1>Min
IN1>Max 1 - 2500 %IB 1 2500 Maximum used operate residual
IN1> is greater than IN1>Max then IN1>
is set to IN1>Max
ResetTypeCrv1 Instantaneous - - Instantaneous Reset curve type for step1
IEC Reset (Instantaneous / IEC / ANSI)
ANSI reset
tReset1 0.000 - 60.000 s 0.001 0.020 Reset time delay for step 1
tPCrv1 0.005 - 3.000 - 0.001 1.000 Param P for customized inverse trip
time curve for step 1
tACrv1 0.005 - 200.000 - 0.001 13.500 Param A for customized inverse trip
tBCrv1 0.00 - 20.00 - 0.01 0.00 Param B for customized inverse trip
tCCrv1 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse trip
tPRCrv1 0.005 - 3.000 - 0.001 0.500 Param PR for customized inverse reset
tTRCrv1 0.005 - 100.000 - 0.001 13.500 Param TR for customized inverse reset
tCRCrv1 0.1 - 10.0 - 0.1 1.0 Param CR for customized inverse
reset time curve for step 1
set to IN2>Min
IN2> is greater than IN2>Max then
IN2> is set to IN2>Max
ANSI reset

Technical manual
Current protection

set to IN3>Min
ANSI reset
set to IN4>Min
ANSI reset

Technical manual
Current protection
Table 269: EF4PTOC Non group settings (basic)

Value groups
SeqTypeIDir Zero seq - - Zero seq Choice of measurand for directional
Neg seq current
SeqTypeIPol Zero seq - - Zero seq Choice of measurand for polarizing
Neg seq current
SeqTypeUPol Zero seq - - Zero seq Choice of measurand for polarizing
Neg seq voltage

Table 270: EF4PTOC Monitored data

IOp REAL - A Operating current level
UPol REAL - kV Polarizing voltage level
IPol REAL - A Polarizing current level
UPOLIANG REAL - deg Polarizing angle between voltage and
current
IPOLIANG REAL - deg Polarizing current angle
M13941-51 v7
This function has the following four analog inputs on its function block in the configuration
tool:
1. I3P, input used for the operating quantity. Supplies the zero-sequence magnitude
measuring functionality.
2. U3P, input used for the voltage polarizing quantity. Supplies either the zero or the
negative sequence voltage to the directional functionality
3. I3PPOL, input used for the current polarizing quantity. Provides polarizing current to the
directional functionality. This current is normally taken from the grounding of a power
transformer.
4. I3PDIR, input used for directional detection. Supplies either the zero or the negative
sequence current to the directional functionality.
These inputs are connected from the corresponding pre-processing function blocks in the
configuration tool in PCM600.
9.4.7.1 Operating quantity within the function M13941-58 v9
The function always uses residual current (3I0) for its operating quantity. The residual current
can be:
1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the
fourth analog input of the pre-processing block connected to EF4PTOC function input
I3P). This dedicated IED CT input can be, for example, connected to:

Technical manual
Current protection
• parallel connection of current instrument transformers in all three phases (Holm-

Green connection).
• one single core balance current instrument transformer (cable CT).
• one single current instrument transformer located between power system star point
and earth (current transformer located in the star point of a star connected
transformer winding).
• one single current instrument transformer located between two parts of a protected
object (current transformer located between two star points of double star shunt
capacitor bank).
2. calculated from three-phase current input within the IED (when the fourth analog input of
the pre-processing block, connected to EF4PTOC function Analog Input I3P, is not
connected to a dedicated CT input of the IED in PCM600). In such a case, the pre-
processing block will calculate 3I0 from the first three inputs into the pre-processing block
by using the following formula (will take 3I0 from SMAI AI3P and will be connected to
I3PDIR and I3P inputs.
If the zero sequence current is selected,
Iop = 3I0 = IL1 + IL2 + IL3

where:
IL1, IL2 and IL3 are fundamental frequency phasors of three individual phase currents.
The residual current is pre-processed by a discrete Fourier filter. Thus the phasor of the
fundamental frequency component of the residual current is derived. The phasor magnitude is
used within the EF4PTOC protection to compare it with the set operation current value of the
four steps (IN1>, IN2>, IN3> or IN4>).
If the residual current is larger than the set operation current and the step is used in non-
directional mode a signal from the comparator for this step is set to true. This signal will,
without delay, activate the output signal STINx (x=step 1-4) for this step and a common START
signal.
9.4.7.2 Internal polarizing M13941-82 v11
A polarizing quantity is used within the protection in order to determine the direction to the
earth fault (forward/reverse).
The function can be set to use voltage polarizing, current polarizing or dual polarizing.
Voltage polarizing
When voltage polarizing is selected, the protection will use the residual voltage -3U0 as the
polarizing quantity U3P.
This voltage can be:
1. directly measured (when a dedicated VT input of the IED is connected in PCM600 to the
fourth analog input of the pre-processing block connected to EF4PTOC function input
U3P). This dedicated IED VT input shall be then connected to the open delta winding of a
three-phase main VT.
2. calculated from three-phase voltage input within the IED (when the fourth analog input of
the pre-processing block, connected to EF4PTOC analog function input U3P, is NOT
connected to a dedicated VT input of the IED in PCM600). In such a case, the pre-

Technical manual
Current protection
processing block will calculate -3U0 from the first three inputs into the pre-processing
block by using the following formula:
UPol = -3U 0 = -(UL1 + UL2 + UL3)

where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
In order to use this, all three phase-to-earth voltages must be connected to three
IED VT inputs.
The residual voltage is pre-processed by a discrete fourier filter. Thus, the phasor of the
fundamental frequency component of the residual voltage is derived.
This phasor is used together with the phasor of the operating directional current, in order to
determine the direction to the earth fault (Forward/Reverse). In order to enable voltage
polarizing the magnitude of polarizing voltage shall be bigger than a minimum level defined by
setting parameter UPolMin.
It shall be noted that residual voltage (-3U0) or negative sequence voltage (-3U2) is used to
determine the location of the earth fault. This ensures the required inversion of the polarizing
voltage within the earth-fault function.
Current polarizing
When current polarizing is selected, the function will use an external residual current (3I0) as
the polarizing quantity IPol. This current can be:
1. directly measured (when a dedicated CT input of the IED is connected in PCM600 to the
fourth analog input of the pre-processing block, connected to EF4PTOC function input
I3PPOL). This dedicated IED CT input is then typically connected to one single current
transformer located between power system star point and earth (current transformer
located in the star point of a star connected transformer winding).
• For some special line protection applications, this dedicated IED CT input can be
connected to a parallel connection of current transformers in all three phases (Holm-
Green connection).
2. calculated from three phase current input within the IED (when the fourth analog input
into the pre-processing block, connected to EF4PTOC function analog input I3PPOL, is
NOT connected to a dedicated CT input of the IED in PCM600). In such case, the pre-
processing block will calculate 3I0 from the first three inputs into the pre-processing block
by using the following formula:
IPol = 3I0 = IL1 + IL2 + IL3

where:
The residual current is pre-processed by a discrete fourier filter. Thus the phasor of the
fundamental frequency component of the polarizing current is derived. This phasor is then

Technical manual
Current protection
multiplied with the pre-set equivalent zero-sequence source impedance in order to calculate
the equivalent polarizing voltage UIPol in accordance with the following formula:
UIPol = Z 0s × IPol = (RNPol + j × XNPol) × IPol

which will be then used, together with the phasor of the operating current, in order to
determine the direction to the earth fault (forward/reverse).
In order to enable current polarizing, the magnitude of the polarizing current shall be bigger
than a minimum level defined by setting parameter IPolMin.
Dual polarizing
When dual polarizing is selected, the function will use the vectorial sum of the voltage based
and current based polarizing in accordance with the following formula:
UTotPol=UPol  UIPol=UPol  Z 0s  IPol  UPol   RNPol  jXNPol   Ipol

UPol and IPol can be either zero sequence component or negative sequence component
depending upon the user selection.
Then the phasor of the total polarizing voltage UTotPol will be used, together with the phasor
of the operating current, to determine the direction of the earth fault (forward/reverse).
9.4.7.3 External polarizing for earth-fault function M13941-144 v6
The individual steps within the protection can be set as non-directional. When this setting is
selected, it is possible via the function binary input BLKSTx to provide external directional
control (that is, torque control) by, for example, using one of the following functions if
available in the IED:
1. Distance protection directional function.

2. Negative sequence polarized general current and voltage multi purpose protection
function.
9.4.7.4 Directional detection for earth fault function GUID-FC382DD3-E2C8-455E-8CD5-1DE1793DD178 v6
Zero sequence components will be used for detecting directionality for the earth fault
function. In some cases, zero sequence quantities might detect directionality incorrectly. In
such a scenario, negative sequence quantities will be used. The user can select either zero
sequence components or negative sequence components for detecting directionality with the
parameter SeqTypeIPol. I3PDIR input is always connected to the same source as I3P input.
9.4.7.5 Base quantities within the protection M13941-152 v6
The base quantities are entered as global settings for all functions in the IED. Base current
(IBase) shall be entered as rated phase current of the protected object in primary amperes.
Base voltage (UBase) shall be entered as rated phase-to-phase voltage of the protected object
in primary kV.
9.4.7.6 Internal earth-fault protection structure M13941-157 v5
The protection is internally divided into the following parts:

Technical manual
Current protection
1. Four residual overcurrent steps.

2. Directional supervision element for residual overcurrent steps with integrated directional
comparison step for communication based earth-fault protection schemes (permissive or
blocking).
3. Second harmonic blocking element with additional feature for sealed-in blocking during
switching of parallel transformers.
4. Switch on to fault feature with integrated Under-Time logic for detection of breaker
problems during breaker opening or closing sequence.
9.4.7.7 Four residual overcurrent steps M13941-166 v8
Each overcurrent step uses operating quantity Iop (residual current) as the measuring
quantity. Each of the four residual overcurrent steps has the following built-in facilities:
• Directional mode can be set to Off/Non-directional/Forward/Reverse. By this parameter

setting the directional mode of the step is selected.
• Residual current start value.
• Type of operating characteristic (inverse or definite time). By this parameter setting it is
possible to select inverse or definite time delay for the earth-fault protection. Most of the
standard IEC and ANSI inverse characteristics are available. For the complete list of
available inverse curves, please refer to section "Inverse characteristics".
• Type of reset characteristic (Instantaneous / IEC Reset / ANSI Reset). By this parameter
setting it is possible to select the reset characteristic of the step. For the complete list of
available reset curves, please refer to section "Inverse characteristics".
• Time delay related settings. By these parameter settings the properties like definite time
delay, minimum operating time for inverse curves, reset time delay and parameters to
define user programmable inverse curve are defined.
• Supervision by second harmonic blocking feature (On/Off). By this parameter setting it is
possible to prevent operation of the step if the second harmonic content in the residual
current exceeds the preset level.
• Multiplier for scaling of the set residual current pickup value by external binary signal. By
this parameter setting it is possible to increase residual current pickup value when
function binary input ENMULTx has logical value 1.
• The operation current value INx>, is limited to be between INx>Max and INx>Min. The
default values of the limits are the same as the setting limits for INx>, and the limits can
only be used for reducing the allowed range of INx>. This feature is used when remote
setting of the operation current value is allowed, making it possible to ensure that the
operation value used is reasonable. If INx> is set outside INx>Max and INx>Min, the closest
of the limits to INx> is used by the function. If INx>Max is smaller then INx>Min, the limits
are swapped. The principle of the limitation is shown in Figure 266.
INx>Max
MAX hi
u y
INx>_used
INx>
MIN lo
INx>Min
Simplified logic diagram for one residual overcurrent step is shown in Figure 267.

Technical manual
Current protection
BLKTR
EMULTX
IMinx Characteristx=DefTime
X T b
a>b
F a
tx TRINx
AND AND
|IOP|
a OR t
a>b
b
STINx
INxMult AND
X T
INx> F
AND Inverse
BLKSTx
AND
BLOCK Characteristx=Inverse
txmin
2ndHarm_BLOCK_Int
OR t
HarmRestrainx=Off
DirModex=Off OR STEPx_DIR_Int
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
IEC10000008.vsd
Figure 267: Simplified logic diagram for residual overcurrent step x, where x = step 1, 2, 3 or 4
The protection can be completely blocked from the binary input BLOCK. Output signals for
respective step, and STINx and TRINx, can be blocked from the binary input BLKSTx. The trip
signals from the function can be blocked from the binary input BLKTR.

function M13941-179 v11
At least one of the four residual overcurrent steps shall be set as directional in
order to enable execution of the directional supervision element and the
integrated directional comparison function.
The protection has an integrated directional feature. As the operating quantity current Iop is
always used, the polarizing method is determined by the parameter setting polMethod. The
polarizing quantity will be selected by the function in one of the following three ways:
1. When polMethod = Voltage, UPol will be used as polarizing quantity.

2. When polMethod = Current, IPol will be used as polarizing quantity.
3. When polMethod = Dual, UPol + IPol · ZNPol will be used as polarizing quantity.
The operating and polarizing quantity are then used inside the directional element, as shown
in Figure 268, in order to determine the direction of the earth fault.

Technical manual
Current protection
Operating area
STRV
0.6 * IN>DIR
Characteristic for reverse
release of measuring steps
-RCA -85 deg
Characteristic
for STRV 40% of
IN>DIR RCA +85 deg
RCA
65° Upol = -3U 0
-RCA +85 deg
RCA -85 deg

Characteristic for forward
release of measuring steps
IN>DIR
STFW
I op = 3I0
Operating area
Characteristic
for STFW IEC11000243-1-en.ai
Figure 268: Operating characteristic for earth-fault directional element using the zero
sequence components
The relevant setting parameters for the directional supervision element are:
• The directional element will be internally enabled to operate as soon as Iop is bigger than
40% of IN>Dir and the directional condition is fulfilled in the set direction.
• The relay characteristic angle AngleRCA, which defines the position of forward and reverse
areas in the operating characteristic.
The directional comparison will set the output binary signals:
1. STFW=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than
setting parameter IN>Dir and directional supervision element detects fault in forward
direction.
2. STRV=1 when operating quantity magnitude Iop x cos(φ - AngleRCA) is bigger than 60% of
setting parameter IN>Dir and directional supervision element detects fault in reverse
direction.
These signals shall be used for communication based earth-fault teleprotection

communication schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in Figure 269:

Technical manual
Current protection
| IopDir |
a
a>b STRV
b AND
REVERSE_Int
0.6
X
a
a>b STFW
IN>Dir b AND
FORWARD_Int
X
0.4
FWD
AND FORWARD_Int
AngleRCA
polMethod=Voltage
OR
Characteristic
UPolMin
Directional
polMethod=Dual UPol IPolMin
T
I3PDIR
polMethod=Current 0.0 F
OR
UTotPol
IPol AND REVERSE_Int
T RVS
0.0 F
UIPol STAGE1_DIR_Int
RNPol Complex X T STAGE2_DIR_Int
XNPol Number 0.0 F STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
Figure 269: Simplified logic diagram for directional supervision element with integrated directional
comparison step
9.4.7.9 Second harmonic blocking element M13941-200 v8
A harmonic restrain can be chosen for each step by a parameter setting HarmBlockx. If the
ratio of the 2nd harmonic component in relation to the fundamental frequency component in
the residual current exceeds the preset level (defined by parameter 2ndHarmStab), output
signal 2NDHARMD is set to logical value one and the harmonic restraining feature to the
function block will be applicable.
Blocking from the 2nd harmonic element activates if all of three criteria are satisfied:
1. The fundamental frequency component of the current > 1% of IBase

2. The second harmonic component > 1% of IBase
3. The ratio of the 2nd harmonic component in relation to the fundamental frequency
component in the residual current exceeds the preset level defined by the parameter
2ndHarmStab setting
In addition to the basic functionality explained above, the 2nd harmonic blocking can be set in
such way to seal-in until residual current disappears. This feature might be required to
stabilize EF4PTOC during switching of parallel transformers in the station. In case of parallel
transformers there is a risk of sympathetic inrush current. If one of the transformers is in
operation, and the parallel transformer is switched in, the asymmetric inrush current of the
switched-in transformer will cause partial saturation of the transformer already in service. This
is called transferred saturation. The 2nd harmonic of the inrush currents of the two

Technical manual
Current protection
transformers is in phase opposition. The summation of the two currents thus gives a small 2nd
harmonic current. The residual fundamental current is however significant. The inrush current
of the transformer in service before the parallel transformer energizing, is a little delayed
compared to the first transformer. Therefore, we have high 2nd harmonic current component
initially. After a short period this current is however small and the normal 2nd harmonic
blocking resets. If the BlkParTransf function is activated, the 2nd harmonic restrain signal is
latched as long as the residual current measured by the relay is larger than a selected step
current level by using setting UseStartValue.
This feature has been called Block for Parallel Transformers. This 2nd harmonic seal-in feature
is activated when all of the following three conditions are simultaneously fulfilled:
1. Feature is enabled by entering setting parameter BlkParTransf = On.

2. Basic 2nd harmonic restraint feature has been active for at least 70ms.
3. Residual current magnitude is higher than the set start value for one of the four residual
overcurrent stages. By a parameter setting UseStartValue it is possible to select which
one of the four start values that will be used (IN1> or IN2> or IN3> or IN4>).
Once Block for Parallel Transformers is activated, the basic 2nd harmonic blocking signal is
sealed-in until the residual current magnitude falls below a value defined by parameter setting
UseStartValue (see condition 3 above).
Simplified logic diagram for 2nd harmonic blocking feature is shown in Figure 270.

Technical manual
Current protection
BLOCK
a
a>b
0.07*IBase b
a
a>b
b
Extract second AND
IOP
harmonic current a
a>b
component b
Extract
fundamental
current component
X
2ndHarmStab
q-1
t=70ms OR
t AND OR 2ndH_BLOCK_Int
BlkParTransf=On
a
a>b
b
UseStartValue
IN1>
IN2>
IN3>
IN4>
q-1 = unit delay

Figure 270: Simplified logic diagram for 2nd harmonic blocking feature and Block for Parallel
Transformers feature
9.4.7.10 Switch on to fault feature M13941-211 v5
Integrated in the four step residual overcurrent protection are the switch on to fault logic
(SOTF) and the under-time logic. The setting parameter SOTF is set to activate SOTF, the
under-time logic or both. When the circuit breaker is closing there is a risk to close it onto a
permanent fault, for example during an autoreclosing sequence. The SOTF logic will enable
fast fault clearance during such situations. The time during which SOTF and under-time logics
will be active after activation is defined by the setting parameter t4U.
The SOTF logic uses the start signal from step 2 or step 3 for its operation, selected by setting
parameter StepForSOTF. The setting parameter ActivationSOTF can be set for activation of CB
position open change, CB position closed change or CB close command. In case of a residual
current start from step 2 or 3 (dependent on setting) the function will give a trip after a set
delay tSOTF. This delay is normally set to a short time (default 200 ms).
The under-time logic acts as a circuit breaker pole-discordance protection, but it is only active
immediately after breaker switching. The under-time logic can only be used in solidly or low
impedance grounded systems.
The under-time logic always uses the start signal from the step 4. The under-time logic will
normally be set to operate for a lower current level than the SOTF function. The under-time

Technical manual
Current protection
logic can also be blocked by the 2nd harmonic restraint feature. This enables high sensitivity
even if power transformer inrush currents can occur at breaker closing. This logic is typically
used to detect asymmetry of CB poles immediately after switching of the circuit breaker. The
under-time logic is activated either from change in circuit breaker position or from circuit
breaker close and open command pulses. This selection is done by setting parameter
ActUnderTime. In case of a start from step 4 this logic will give a trip after a set delay
tUnderTime. This delay is normally set to a relatively short time (default 300 ms).
SOTF
200 ms
Open
t
t4U
200 ms
Closed
t ActivationSOTF
tSOTF
Close command AND
AND t
STIN2
StepForSOTF
STIN3
SOTF
BLOCK
OFF
SOTF
UNDERTIME TRIP
UnderTime
tUnderTime
SOTF or
2nd Harmonic AND
HarmResSOFT t UnderTime
OR
Open
Close OR
t4U
Close command ActUnderTime

AND
STIN4
Figure 271: Simplified logic diagram for SOTF and under-time features
M13941-3 v6
Simplified logic diagram for the complete EF4PTOC function is shown in Figure 272:

Technical manual
Current protection
signal to communication scheme

Directional Check
Element
4 step over current

INPol Direction
operatingCurrent element
Element
3U0 One element for each
earthFaultDirection step
3I0
angleValid
I3PDIR
DirMode
enableDir
harmRestrBlock
3I0 Harmonic
Restraint 1
Element TRIP

start step 2, 3 and 4
Blocking at parallel
transformers
SwitchOnToFault
TRSOTF
CB
DirMode pos
or cmd
enableDir
Mode
Selection enableStep1-4
DirectionalMode1-4
Figure 272: Functional overview of EF4PTOC
M15223-1 v18
Table 271: EF4PTOC technical data

Operate current, step 1-4 (1-2500)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (10-2500)% of -

IBase
Relay characteristic angle (-180 to 180) degrees ±2.0 degrees
(RCA)
Operate current for directional release (1–100)% of IBase For RCA ±60 degrees:
±2.5% of Ir at I ≤ Ir
Independent time delay at 0 to 2 x Iset, (0.000-60.000) s ±0.2% or ±35 ms whichever is

step 1-4 greater
Minimum operate time for inverse curves, (0.000 - 60.000) s ±0.2% or ±35 ms whichever is
step 1-4 greater
Inverse time characteristics, see Table 16 curve types See Table 1150, Table 1151 and
1150, Table 1151 and Table 1152 Table 1152
Second harmonic blocking (5–100)% of fundamental ±2.0% of Ir
Minimum polarizing voltage (1–100)% of UBase ±0.5% of Ur
Minimum polarizing current (2-100)% of IBase ±1.0% of Ir
Real part of source Z used for current (0.50-1000.00) W/phase -

polarization

Technical manual
Current protection

Imaginary part of source Z used for (0.50–3000.00) W/phase -
current polarization
*Operate time, start non-directional at 0 Min. = 15 ms -
to 2 x Iset Max. = 30 ms
*Reset time, start non-directional at 2 x Min. = 15 ms -

Iset to 0 Max. = 30 ms
*Operate time, start non-directional at 0 Min. = 5 ms -

to 10 x Iset Max. = 20 ms
*Reset time, start non-directional at 10 x Min. = 20 ms -


*Note: Operate time and reset time are only valid if harmonic blocking is turned off for a step.
9.5 Four step directional negative phase sequence

overcurrent protection NS4PTOC GUID-E8CF8AA2-AF54-4FD1-A379-3E55DCA2FA3A v1
GUID-E1720ADA-7F80-4F2C-82A1-EF2C9EF6A4B4 v1

Four step negative sequence NS4PTOC 46I2
overcurrent protection I2
4
alt
4
9.5.2 Functionality GUID-485E9D36-0032-4559-9204-101539A32F47 v6
Four step directional negative phase sequence overcurrent protection (NS4PTOC) has an
inverse or definite time delay independent for each step separately.
All IEC and ANSI time delayed characteristics are available together with an optional user
defined characteristic.
The directional function is voltage polarized.
NS4PTOC can be set directional or non-directional independently for each of the steps.
NS4PTOC can be used as main protection for unsymmetrical fault; phase-phase short circuits,
phase-phase-earth short circuits and single phase earth faults.
NS4PTOC can also be used to provide a system backup for example, in the case of the primary
protection being out of service due to communication or voltage transformer circuit failure.
Directional operation can be combined together with corresponding communication logic in

permissive or blocking teleprotection scheme. The same logic as for directional zero sequence
current can be used. Current reversal and weak-end infeed functionality are available.

Technical manual
Current protection
9.5.3 Function block GUID-8EDB8B12-0D86-4F6B-A1FB-F5D0C72AA545 v2
NS4PTOC
I3P* TRIP
I3PDIR* TR1
U3P* TR2
BLOCK TR3
BLKTR TR4
BLKST1 START
BLKST2 ST1
BLKST3 ST2
BLKST4 ST3
ENMULT1 ST4
ENMULT2 STFW
ENMULT3 STRV
ENMULT4
Figure 273: NS4PTOC function block
9.5.4 Signals
Table 272: NS4PTOC Input signals

I3P GROUP - Group connection for operate current
SIGNAL
I3PDIR GROUP - Group connection for directional current
SIGNAL
U3P GROUP - Group connection for polarizing voltage
SIGNAL
Table 273: NS4PTOC Output signals

TR1 BOOLEAN Trip signal from step 1
ST1 BOOLEAN Start signal step 1

Technical manual
Current protection

STFW BOOLEAN Forward directional start signal
STRV BOOLEAN Reverse directional start signal
9.5.5 Settings
Table 274: NS4PTOC Group settings (basic)

On
EnDir Disable - - Enable Enabling the Directional calculation
Enable
AngleRCA -180 - 180 Deg 1 65 Relay characteristic angle (RCA)
UPolMin 1 - 100 %UB 1 5 Minimum voltage level for polarization
in % of UBase
I2>Dir 1 - 100 %IB 1 10 Residual current level in % of IBase for
Direction release
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
I2-1> 1 - 2500 %IB 1 100 Negative sequence current op level for
t1 0.000 - 60.000 s 0.001 0.000 Time delay of step 1 when definite
time char. is selected
time characteristic
IMin1 1.00 - 10000.00 %IB 1.00 100.00 Minimum current for step 1
I1Mult 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current

Technical manual
Current protection

Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
time characteristic
IMin2 1.00 - 10000.00 %IB 1.00 50 Minimum current for step 2
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type

Technical manual
Current protection

time characteristic
Forward
Reverse
ANSI Very inv.
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
time characteristic
Table 275: NS4PTOC Group settings (advanced)

ANSI reset

Technical manual
Current protection

time curve for step
ANSI reset
tCRCrv2 0.1 - 10.0 - 0.1 1.0 Param C for customized inverse reset
ANSI reset
ANSI reset

Technical manual
Current protection

Table 276: NS4PTOC Non group settings (basic)

Value groups

Table 277: NS4PTOC Monitored data

IOp REAL - A Operating current level
UPol REAL - kV Polarizing voltage level
UPOLIANG REAL - deg Polarizing angle between voltage and
current
9.5.7 Operation principle GUID-8923EC0B-A5BA-431B-9699-EB67E2637560 v3
Four step negative sequence overcurrent protection NS4PTOC function has the following
three “Analog Inputs” on its function block in the configuration tool:
1. I3P, input used for “Operating Quantity”.

2. U3P, input used for “Polarizing Quantity”.
3. I3PDIR, input used for "Directional finding"
These inputs are connected from the corresponding pre-processing function blocks in the
Configuration Tool within PCM600.
9.5.7.1 Operating quantity within the function GUID-8F0A5BDE-AC98-4188-9085-42A8DF00C476 v3
Four step negative sequence overcurrent protection NS4PTOC function always uses negative
sequence current (I2) for its operating quantity. The negative sequence current is calculated
from three-phase current input within the IED. The pre-processing block calculates I2 from the
first three inputs into the pre-processing block by using the following formula:
1
I2 =
3
(
× IL1 + a × IL 2 + a × IL 3
2
)

Technical manual
Current protection
where:
a is so called operator which gives a phase shift of 120 deg, that is, a = 1∠120
deg
a2 similarly gives a phase shift of 240 deg, that is, a2 = 1∠240 deg
The phasor magnitude is used within the NS4PTOC protection to compare it with the set
operation current value of the four steps (I1>, I2>, I3> or I4>). If the negative sequence current
is larger than the set operation current and the step is used in non-directional mode a signal
from the comparator for this step is set to true. This signal, without delay, activates the
output signal STx (x=1 - 4) for this step and a common START signal.
9.5.7.2 Internal polarizing facility of the function GUID-B00FE98B-F269-4F1B-AC03-68250798851B v3
A polarizing quantity is used within the protection to determine the direction to the fault
(Forward/Reverse).
Four step negative sequence overcurrent protection NS4PTOC function uses the voltage
polarizing method.
NS4PTOC uses the negative sequence voltage -U2 as polarizing quantity U3P. This voltage is
calculated from three phase voltage input within the IED. The pre-processing block calculates -
U2 from the first three inputs into the pre-processing block by using the following formula:
1
UPol = -U 2 = - × (UL1 + a 2 × UL 2 + a × UL3 )
3
where:
UL1, UL2 and UL3 are fundamental frequency phasors of three individual phase voltages.
To use this all three phase-to-earth voltages must be connected to three IED VT
inputs.
This phasor is used together with the phasor of the operating current, in order to determine
the direction to the fault (Forward/Reverse).To enable voltage polarizing the magnitude of
polarizing voltage must be bigger than a minimum level defined by setting UpolMin.
Note that –U2 is used to determine the location of the fault. This ensures the required
inversion of the polarizing voltage within the function.
9.5.7.3 External polarizing for negative sequence function GUID-21930E81-1B40-4BA4-B1D8-3B365327AEF6 v1
The individual steps within the protection can be set as non-directional. When this setting is
selected it is then possible via function binary input BLKSTx (where x indicates the relevant
step within the protection) to provide external directional control (that is, torque control) by
for example using one of the following functions if available in the IED:

Technical manual
Current protection
• Distance protection directional function

• Negative sequence polarized general current and voltage multi purpose protection
function
9.5.7.4 Internal negative sequence protection structure GUID-A6B9B3F1-A1FE-4653-A8AF-61FCCF19CE95 v1
The protection is internally divided into the following parts:
• Four negative sequence overcurrent steps

• Directional supervision element for negative sequence overcurrent steps with integrated
directional comparison step for communication based negative sequence protection
schemes (permissive or blocking)
Each part is described separately in the following sections.
9.5.7.5 Four negative sequence overcurrent stages GUID-D8ACB136-2BA6-4ADA-A096-5C38BD12DB72 v2
Each overcurrent stage uses Operating Quantity I2 (negative sequence current) as measuring
quantity. Every of the four overcurrent stage has the following built-in facilities:
• Operating mode (Off/ Non-directional /Forward / Reverse). By this parameter setting the
operating mode of the stage is selected. Note that the directional decision (Forward/
Reverse) is not made within the overcurrent stage itself. The direction of the fault is
determined in common “Directional Supervision Element” described in the next
paragraph.
• Negative sequence current pickup value.
• Type of operating characteristic (Inverse or Definite Time). By this parameter setting it is
possible to select Inverse or definite time delay for negative sequence overcurrent
function. Most of the standard IEC and ANSI inverse characteristics are available. For the
complete list of available inverse curves, refer to Chapter "Inverse characteristics"
• Type of reset characteristic (Instantaneous / IEC Reset /ANSI reset).By this parameter
setting it is possible to select the reset characteristic of the stage. For the complete list of
available reset curves, refer to Chapter "Inverse characteristics"
• Time delay related settings. By these parameter settings the properties like definite time
delay, minimum operating time for inverse curves, reset time delay and parameters to
define user programmable inverse curve are defined.
• Multiplier for scaling of the set negative sequence current pickup value by external binary
signal. By this parameter setting it is possible to increase negative sequence current
pickup value when function binary input ENMULTx has logical value 1.
Simplified logic diagram for one negative sequence overcurrent stage is shown in the
following figure:

Technical manual
Current protection
BLKTR
Characteristx=DefTime AND
TRx
|IOP| AND
tx
a OR
a>b
ENMULTx b
STx
IxMult AND
X T
Ix> F
txmin
BLKSTx AND
BLOCK
Inverse
Characteristx=Inverse
DirModex=Off OR STAGEx_DIR_Int
DirModex=Forward
AND OR
FORWARD_Int
DirModex=Reverse
AND
REVERSE_Int
IEC09000683.vsd
Figure 274: Simplified logic diagram for negative sequence overcurrent stage x , where x=1, 2, 3 or 4
NS4PTOC can be completely blocked from the binary input BLOCK. The start signals from
NS4PTOC for each stage can be blocked from the binary input BLKSTx. The trip signals from
NS4PTOC can be blocked from the binary input BLKTR.

function GUID-F54E21F7-7C99-41D6-BEC6-2D6EC6D2B2A3 v3
At least one of the four negative sequence overcurrent steps must be set as
directional in order to enable execution of the directional supervision element
and the integrated directional comparison function.
The operating and polarizing quantity are then used inside the directional element, as shown
in figure 275, to determine the direction of the fault.

Technical manual
Current protection
Reverse
Area
AngleRCA Upol=-U2
Forward
Area
Iop = I2
Figure 275: Operating characteristic for fault directional element
Two relevant setting parameters for directional supervision element are:
• Directional element is internally enable to operate as soon as Iop is bigger than 40% of
I>Dir and the directional condition is fulfilled in set direction.
• Relay characteristic angle AngleRCA which defines the position of forward and reverse
areas in the operating characteristic.
Directional comparison step, built-in within directional supervision element, set NS4PTOC
output binary signals:
1. STFW=1 when tip of I2 phasor (operating quantity magnitude) is in forward area, see fig
275 (Operating quantity magnitude is bigger than setting I>Dir)
2. STRV=1 when tip of I2 phasor (operating quantity magnitude) is in the reverse area, see fig
275. (Operating quantity magnitude is bigger than 60% of setting I>Dir)
These signals must be used for communication based fault teleprotection communication
schemes (permissive or blocking).
Simplified logic diagram for directional supervision element with integrated directional
comparison step is shown in figure 276:

Technical manual
Current protection
|Iop|
a a>
STRV
b b REVERSE_Int
AND
0.6
X
a a>
STFW
I>Dir b b FORWARD_Int
AND
X
0.4
FWD
AND FORWARD_Int
AngleRCA
C h a r a c e ri s ti c
D i r e c ti o n a l
UPolMin
IPolMin
t
Iop
UPol
AND REVERSE_Int
RVS
STAGE1_DIR_Int
STAGE2_DIR_Int
STAGE3_DIR_Int OR
STAGE4_DIR_Int
BLOCK AND
IEC07000067-4.vsd
IEC07000067-4 V2 EN-US
Figure 276: Simplified logic diagram for directional supervision element with integrated directional
comparison step
9.5.8 Technical data GUID-10E9194D-3AE9-4D0F-867E-473E6F4BF443 v1
GUID-E83AD807-8FE0-4244-A50E-86B9AF92469E v6
Table 278: NS4PTOC technical data

Operate current, step 1 - 4 (1-2500)% of lBase ±1.0% of Ir at I £ Ir
Reset ratio > 95% at (10-2500)% of -

IBase
Independent time delay at 0 to 2 x Iset, (0.000-60.000) s ±0.2% or ±35 ms whichever is
step 1 - 4 greater
Minimum operate time for inverse (0.000 - 60.000) s ±0.2% or ±35 ms whichever is
curves, step 1 - 4 greater
Inverse time characteristics, see table 16 curve types See table 1150, table 1151 and table
1150, table 1151 and table 1152 1152
Minimum operate current, step 1 - 4 (1.00 - 10000.00)% of IBase ±1.0% of Ir at I ≤ Ir
Relay characteristic angle (RCA) (-180 to 180) degrees ±2.0 degrees


Technical manual
Current protection

Operate current for directional release (1–100)% of IBase For RCA ±60 degrees:
±2.5% of Ir at I ≤ Ir
Minimum polarizing voltage (1–100)% of UBase ±0.5% of Ur
Real part of negative sequence source (0.50-1000.00) W/phase -

impedance used for current
polarization
Imaginary part of negative sequence (0.50–3000.00) W/phase -
source impedance used for current
polarization
Operate time, start non-directional at Min. = 15 ms -
0 to 2 x Iset Max. = 30 ms
Reset time, start non-directional at 2 x Min. = 15 ms -

Operate time, start non-directional at Min. = 5 ms -

0 to 10 x Iset Max. = 20 ms
Reset time, start non-directional at 10 Min. = 20 ms -

x Iset to 0 Max. = 35 ms

Transient overreach <10% at τ = 100 ms -
9.6 Sensitive directional residual overcurrent and power

protection SDEPSDE SEMOD171436-1 v4
SEMOD172025-2 v4

Sensitive directional residual over SDEPSDE - 67N
current and power protection
In networks with high impedance earthing, the phase-to-earth fault current is significantly
smaller than the short circuit currents. Another difficulty for earth fault protection is that the
magnitude of the phase-to-earth fault current is almost independent of the fault location in
the network.
Directional residual current can be used to detect and give selective trip of phase-to-earth
faults in high impedance earthed networks. The protection uses the residual current
component 3I0 · cos φ, where φ is the angle between the residual current and the residual
voltage (-3U0), compensated with a characteristic angle. Alternatively, the function can be set
to strict 3I0 level with a check of angle φ.
Directional residual power can also be used to detect and give selective trip of phase-to-earth
faults in high impedance earthed networks. The protection uses the residual power

Technical manual
Current protection
component 3I0 · 3U0 · cos φ, where φ is the angle between the residual current and the
reference residual voltage, compensated with a characteristic angle.
A normal non-directional residual current function can also be used with definite or inverse
time delay.
A backup neutral point voltage function is also available for non-directional residual
overvoltage protection.
In an isolated network, that is, the network is only coupled to earth via the capacitances
between the phase conductors and earth, the residual current always has -90º phase shift
compared to the residual voltage (3U0). The characteristic angle is chosen to -90º in such a
network.
In resistance earthed networks or in Petersen coil earthed, with a parallel resistor, the active
residual current component (in phase with the residual voltage) should be used for the earth
fault detection. In such networks, the characteristic angle is chosen to 0º.
As the amplitude of the residual current is independent of the fault location, the selectivity of
the earth fault protection is achieved by time selectivity.
When should the sensitive directional residual overcurrent protection be used and when
should the sensitive directional residual power protection be used? Consider the following:
• Sensitive directional residual overcurrent protection gives possibility for better sensitivity.
The setting possibilities of this function are down to 0.25 % of IBase, 1 A or 5 A. This
sensitivity is in most cases sufficient in high impedance network applications, if the
measuring CT ratio is not too high.
• Sensitive directional residual power protection gives possibility to use inverse time
characteristics. This is applicable in large high impedance earthed networks, with large
capacitive earth fault currents. In such networks, the active fault current would be small
and by using sensitive directional residual power protection, the operating quantity is
elevated. Therefore, better possibility to detect earth faults. In addition, in low impedance
earthed networks, the inverse time characteristic gives better time-selectivity in case of
high zero-resistive fault currents.
Phase
currents
IN
Phase-
ground
voltages
UN
Figure 277: Connection of SDEPSDE to analog preprocessing function block
Overcurrent functionality uses true 3I0, i.e. sum of GRPxL1, GRPxL2 and GRPxL3. For 3I0 to be
calculated, connection is needed to all three phase inputs.

Technical manual
Current protection
Directional and power functionality uses IN and UN. If a connection is made to GRPxN this
signal is used, else if connection is made to all inputs GRPxL1, GRPxL2 and GRPxL3 the
internally calculated sum of these inputs (3I0 and 3U0) will be used.
SDEPSDE
I3P* TRIP
U3P* TRDIRIN
BLOCK TRNDIN
BLKTR TRUN
BLKTRDIR START
BLKNDN STDIRIN
BLKUN STNDIN
STUN
STFW
STRV
STDIR
UNREL
Figure 278: SDEPSDE function block
9.6.4 Signals
Table 279: SDEPSDE Input signals

I3P GROUP - Group signal for current
SIGNAL
U3P GROUP - Group signal for voltage
SIGNAL
BLOCK BOOLEAN 0 Blocks all the outputs of the function
BLKTR BOOLEAN 0 Blocks the trip outputs of the function
BLKTRDIR BOOLEAN 0 Blocks the directional operate outputs of the function
BLKNDN BOOLEAN 0 Blocks the Non directional current residual outputs
BLKUN BOOLEAN 0 Blocks the Non directional voltage residual outputs
Table 280: SDEPSDE Output signals

TRIP BOOLEAN General trip of the function
TRDIRIN BOOLEAN Trip of the directional residual over current function
TRNDIN BOOLEAN Trip of non directional residual over current
TRUN BOOLEAN Trip of non directional residual over voltage
START BOOLEAN General start of the function
STDIRIN BOOLEAN Start of the directional residual over current function
STNDIN BOOLEAN Start of non directional residual over current
STUN BOOLEAN Start of non directional residual over voltage
STFW BOOLEAN Start of directional function for a fault in forward direction

Technical manual
Current protection

STRV BOOLEAN Start of directional function for a fault in reverse direction
STDIR INTEGER Direction of fault. A general signal common to all three mode
of residual over current protection
UNREL BOOLEAN Residual voltage release of operation of all directional modes
9.6.5 Settings
Table 281: SDEPSDE Group settings (basic)

On
OpMode 3I0Cosfi - - 3I0Cosfi Selection of operation mode for
3I03U0Cosfi protection
3I0 and fi
DirMode Forward - - Forward Direction of operation forward or
Reverse reverse
RCADir -179 - 180 Deg 1 -90 Relay characteristic angle RCA, in deg
RCAComp -10.0 - 10.0 Deg 0.1 0.0 Relay characteristic angle
compensation
ROADir 0 - 90 Deg 1 90 Relay open angle ROA used as release
in phase mode, in deg
INCosPhi> 0.25 - 200.00 %IB 0.01 1.00 Set level for 3I0cosFi, directional res
over current in % of IBase
SN> 0.25 - 200.00 %SB 0.01 10.00 Set level for 3I03U0cosFi, starting inv
time count in % of SBase
INDir> 0.25 - 200.00 %IB 0.01 5.00 Set level for directional residual over
current prot in % of IBase
tDef 0.000 - 60.000 s 0.001 0.100 Definite time delay directional
residual overcurrent, in sec
SRef 0.03 - 200.00 %SB 0.01 10.00 Reference value of res power for
inverse time count in % of SBase
kSN 0.00 - 2.00 - 0.01 0.10 Time multiplier setting for directional
residual power mode
OpINNonDir> Off - - Off Operation of non-directional residual
On overcurrent protection
INNonDir> 1.00 - 400.00 %IB 0.01 10.00 Set level for non directional residual
over current in % of IBase
tINNonDir 0.000 - 60.000 s 0.001 1.000 Time delay for non-directional residual
over current, in sec

Technical manual
Current protection

TimeChar ANSI Ext. inv. - - IEC Norm. inv. Operation curve selection for IDMT
ANSI Very inv. operation
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Reserved
Programmable
RI type
RD type
tMin 0.000 - 60.000 s 0.001 0.040 Minimum operate time for IEC IDMT
curves, in sec
kIN 0.05 - 2.00 - 0.01 1.00 IDMT time mult for non-dir res over
current protection
OpUN> Off - - Off Operation of non-directional residual
On overvoltage protection
UN> 1.00 - 200.00 %UB 0.01 20.00 Set level for non-directional residual
over voltage in % of UBase
tUN 0.000 - 60.000 s 0.001 0.100 Time delay for non-directional residual
over voltage, in sec
INRel> 0.25 - 200.00 %IB 0.01 1.00 Residual release current for all
directional modes in % of IBase
UNRel> 1.00 - 300.00 %UB 0.01 3.00 Residual release voltage for all
direction modes in % of UBase
Table 282: SDEPSDE Group settings (advanced)

tReset 0.000 - 60.000 s 0.001 0.040 Time delay used for reset of definite
timers, in sec
tPCrv 0.005 - 3.000 - 0.001 1.000 Setting P for customer programmable
curve
tACrv 0.005 - 200.000 - 0.001 13.500 Setting A for customer programmable
curve
tBCrv 0.00 - 20.00 - 0.01 0.00 Setting B for customer programmable
curve
tCCrv 0.1 - 10.0 - 0.1 1.0 Setting C for customer programmable
curve
ResetTypeCrv Immediate - - IEC Reset Reset mode when current drops off.
IEC Reset
ANSI reset
tPRCrv 0.005 - 3.000 - 0.001 0.500 Setting PR for customer
programmable curve
tTRCrv 0.005 - 100.000 - 0.001 13.500 Setting TR for customer
programmable curve
tCRCrv 0.1 - 10.0 - 0.1 1.0 Setting CR for customer
programmable curve

Technical manual
Current protection
Table 283: SDEPSDE Non group settings (basic)

GlobalBaseSel 1 - 12 - 1 1 Global base selection for function
groups
Table 284: SDEPSDE Non group settings (advanced)

RotResU 0 deg - - 180 deg Setting for rotating polarizing
180 deg quantity if necessary

Table 285: SDEPSDE Monitored data

INCOSPHI REAL - A Magnitude of residual current along
the polarizing quantity 3I0cos(Fi-RCA)
IN REAL - A Measured magnitude of the residual
current 3I0
UN REAL - kV Measured magnitude of the residual
voltage 3U0
SN REAL - MVA Measured magnitude of residual
power 3I03U0cos(Fi-RCA)
ANG FI-RCA REAL - deg Angle between 3U0 and 3I0 minus RCA
(Fi-RCA)
9.6.7.1 Function inputs SEMOD171963-4 v5
The function is using phasors of the residual current and voltage. Group signals I3P and U3P
containing phasors of residual current and voltage which are taken from pre-processor blocks.
The sensitive directional earth fault protection has the following sub-functions included:
Directional residual current protection measuring 3I0·cos φ

SEMOD171963-8 v7
φ is defined as the angle between the residual current 3I0 and the reference voltage (|
φ=ang(3I0)-ang(Uref)|). The reference voltage (Uref) is the polarizing quantity which is used for
directionality and is defined as Uref = -3U0 e—jRCADir, that is -3U0 inversely rotated by the set
characteristic angle RCADir. RCADir is normally set equal to 0 in a high impedance earthed
network with a neutral point resistor as the active current component is appearing out on the
faulted feeder only. RCADir is set equal to -90° in an isolated network as all currents are mainly
capacitive. The function operates when 3I0·cos φ gets larger than the set value.

Technical manual
Current protection
RCADir = 0o,ROADir = 90o
3I0
j = ang(3I0 ) - ang(3Uref )
-3U0 = Uref
3I0 × cosj
Figure 279: RCADir set to 0°
Uref
RCADir = −90 , ROADir = 90
3I0
3I0 ⋅ cos ϕ
ϕ = ang (3I0 ) − ang (Uref )
−3U0
Figure 280: RCADir set to -90°

For trip, the operating quantity 3I0 cos φ, the residual current 3I0, and the residual voltage 3U0
must be larger than the set levels : INCosPhi>, INRel> and UNRel>. Refer to the simplified
logical diagram in Figure 284.
Trip from this function can be blocked from the binary input BLKTRDIR.
When the function picks up, binary output signals START and STDIRIN are activated. If the
output signals START and STDIRIN remain active for the set delay tDef the binary output
signals TRIP and TRDIRIN get activated. The trip from this sub-function has definite time delay.
ROADir is Relay Operating Angle. ROADir is identifying a window around the reference
direction in order to detect directionality. Figure 281 shows the restrictions made by the
ROADir.

Technical manual
Current protection
RCADir = 0o
3I0
Operate area
j
-3U0 = Uref
3I0 × cos j
ROADir
Figure 281: Characteristic with ROADir restriction

The function indicates forward/reverse direction to the fault. Reverse direction is defined as
3I0·cos (φ + 180°) ≥ the set value.
It is also possible to tilt the characteristic to compensate for current transformer angle error
with a setting RCAComp as shown in the Figure 282:

Technical manual
Current protection
RCADir = 0º
Operate area
-3U0 =Uref
Instrument
transformer
angle error 
RCAcomp
Characteristic after
angle compensation
3I0 (prim) 3I0 (to prot)
Figure 282: Explanation of RCAComp
Directional residual power protection measuring 3I0 · 3U0 · cos φ

SEMOD171963-32 v6
φ is defined as the angle between the residual current 3I0 and the reference voltage (Uref = -3U0
e-jRCA) compensated with the set characteristic angle RCADir (|φ=ang(3I0)—ang(Uref)|). The
function operates when 3I0 · 3U0 · cos φ gets larger than the set value SN>. Refer to the
simplified logical diagram in Figure 284.
For trip, the residual power 3I0 · 3U0 · cos φ, the residual current 3I0 and the release voltage
3U0, shall be larger than the set levels (SN>, INRel> and UNRel>).
output signals START and STDIRIN remain active for the set delay tDef or after the inverse time
delay (setting kSN) the binary output signals TRIP and TRDIRIN get activated.
The function shall indicate forward/reverse direction to the fault. Reverse direction is defined
as 3I0 · 3U0·cos (φ + 180°) ³ the set value.
This variant has the possibility of choice between definite time delay and inverse time delay.
The inverse time delay is defined as:
kSN × (3I0 × 3U 0 × cos j(reference))

t inv =
3I0 × 3U 0 × cos j(measured)

Technical manual
Current protection
Directional residual current protection measuring 3I0 and φ

SEMOD171963-48 v4
The function will operate if the residual current is larger than the set value and the angle |φ =
ang(3I0)-ang(Uref)| is within the sector RCADir ± ROADir
RCADir = 0º
ROADir = 80º
Operate area
3I0
-3U0
Figure 283: Example of characteristic

For trip, Residual current 3I0 shall be larger than both INRel> and INDir>, and residual voltage
3U0 shall be larger than the UNRel>. In addition, the angle φ shall be in the set area defined by
ROADir and RCADir. Refer to the simplified logical diagram in Figure 284.
output signals START and STDIRIN remain active for the set delay tDef the binary output
signals TRIP and TRDIRIN get activated.
The function indicates forward/reverse direction to the fault. Reverse direction is defined as φ
is within the angle sector: RCADir + 180° ± ROADir
This variant has definite time delay.
Directional functions SEMOD171963-60 v4

For all the directional functions there are directional start signals STFW: fault in the forward
direction, and STRV: fault in the reverse direction. Even if the directional function is set to
operate for faults in the forward direction, a fault in the reverse direction will give the start
signal STRV. Also if the directional function is set to operate for faults in the reverse direction,
a fault in the forward direction will give the start signal STFW.
Non-directional earth fault current protection SEMOD171963-63 v6

This function will measure the residual current without checking the phase angle. The function
will be used to detect cross-country faults. This function can serve as alternative or backup to
distance protection with phase preference logic. To assure selectivity the distance protection
can block the non-directional earth fault current function via the input BLKNDN.
The non-directional function is using the calculated residual current, derived as sum of the
phase currents. This will give a better ability to detect cross-country faults with high residual

Technical manual
Current protection
current, also when dedicated core balance CT for the sensitive earth fault protection will
saturate.
This variant has the possibility of choice between definite time delay and inverse time delay
(TimeChar parameter). The inverse time delay shall be according to IEC 60255-3.
For trip, the residual current 3I0 shall be larger than the set level (INNonDir>).
Trip from this function can be blocked from the binary input BLKNDN.
When the function picks up, binary output signal STNDIN is activated. If the output signal
STNDIN remains active for the set delay tINNonDir or after the inverse time delay the binary
output signals TRIP and TRNDIN get activated.
Residual overvoltage release and protection SEMOD171963-72 v8

All the directional functions shall be released when the residual voltage gets higher than a set
level UNRel>.
In addition, there is also a separate non-directional residual over voltage protection, with its
own definite time delay tUN and set level UN>.
For trip, the residual voltage 3U0 shall be larger than the set level (UN>).
Trip from this function can be blocked from the binary input BLKUN.
When the function picks up, binary output signal STUN is activated. If the output signal STUN
is active for the set delay tUNNonDir, the binary output signals TRIP and TRUN get activated. A
simplified logical diagram of the total function is shown in Figure 284.

Technical manual
Current protection
OpINNonDir> = On
STNDIN
&
INNonDir>
t
TRNDIN
TimeChar IN
OpUN> = On
STUN
&
UN>
tUN TRUN
t
OpMode = 3I0Cosfi
INRel>
UNRel> & &

tDef
INCosPhi> t
OpMode = 3I0 and fi

& ³ STDIRIN
INDir> &
1
tDef ³ TRDIRIN
t 1
OpMode = 3I03U0Cosfi
& &
SN>
t
³ S
1 N
STFW
RCADir Direction &
Detection
RCAComp Logic STRV
&
ROADir
DirMode = Forward
DirMode = Reverse
IEC06000653.vsd
Figure 284: Simplified logical diagram of the sensitive earth fault current protection
SEMOD173350-2 v16
Table 286: SDEPSDE technical data

Operate level for 3I0·cosj directional (0.25-200.00)% of IBase ±1.0% of Ir at I £ Ir
residual overcurrent ±1.0% of I at I > Ir
Operate level for ·3I0·3U0 cosj directional (0.25-200.00)% of SBase ±1.0% of Sr at S £ Sr

residual power ±1.0% of S at S > Sr
Operate level for 3I0 and j residual (0.25-200.00)% of IBase ±1.0% of Ir at £ Ir

overcurrent ±1.0% of I at I > Ir
Operate level for non-directional (1.00-400.00)% of IBase ±1.0% of Ir at I £ Ir

Operate level for non-directional residual (1.00-200.00)% of UBase ±0.5% of Ur at U £ Ur

overvoltage ±0.5% of U at U > Ur

Technical manual
Current protection

Residual release current for all directional (0.25-200.00)% of IBase ±1.0% of Ir at I £ Ir
modes ±1.0% of I at I > Ir
Residual release voltage for all directional (1.00-300.00)% of UBase ±0.5% of Ur at U £ Ur

modes ±0.5% of U at U > Ur
Operate time for non-directional residual Min. = 40 ms

overcurrent at 0 to 2 x Iset
Max. = 65 ms
Reset time for non-directional residual Min. = 40 ms
overcurrent at 2 x Iset to 0
Max. = 65 ms
Operate time for directional residual Min. = 110 ms
overcurrent at 0 to 2 x Iset
Max. = 160 ms
Reset time for directional residual Min. = 20 ms
overcurrent at 2 x Iset to 0
Max. = 60 ms
Independent time delay for non- (0.000 – 60.000) s ±0.2% or ± 75 ms whichever is
directional residual overvoltage at 0.8 x greater
Uset to 1.2 x Uset
Independent time delay for non- (0.000 – 60.000) s ±0.2% or ± 75 ms whichever is

directional residual overcurrent at 0 to 2 x greater
Iset
Independent time delay for directional (0.000 – 60.000) s ±0.2% or ± 170 ms whichever is
residual overcurrent at 0 to 2 x Iset greater
Inverse characteristics, see table 1153, 16 curve types See Table 1153, Table 1154 and Table
Table 1154 and Table 1155 1155
Relay characteristic angle (RCADir) (-179 to 180) degrees ±2.0 degrees
Relay operate angle (ROADir) (0 to 90) degrees ±2.0 degrees
9.7 Thermal overload protection, one time constant,

Celsius/Fahrenheit LCPTTR/LFPTTR IP14512-1 v7
M17106-1 v7

Thermal overload protection, one LCPTTR 26
time constant, Celsius
Thermal overload protection, one LFPTTR 26

time constant, Fahrenheit
The increasing utilization of the power system closer to the thermal limits has generated a
need of a thermal overload protection for power lines.

Technical manual
Current protection
A thermal overload will often not be detected by other protection functions and the
introduction of the thermal overload protection can allow the protected circuit to operate
closer to the thermal limits.
The three-phase current measuring protection has an I2t characteristic with settable time
constant and a thermal memory. The temperature is displayed in either Celsius or Fahrenheit,
depending on whether the function used is Thermal overload protection (LCPTTR) (Celsius) or
(LFPTTR) (Fahrenheit).
An alarm level gives early warning to allow operators to take action well before the line is
tripped.
Estimated time to trip before operation, and estimated time to reclose after operation are
presented.
LCPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
LFPTTR
I3P* TRIP
BLOCK START
BLKTR ALARM
ENMULT LOCKOUT
AMBTEMP
SENSFLT
RESET
Figure 285: LCPTTR/LFPTTR function bloc
9.7.4 Signals
Table 287: LCPTTR Input signals

SIGNAL
ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter

Technical manual
Current protection
Table 288: LFPTTR Input signals

SIGNAL
ENMULT BOOLEAN 0 Current multiplyer used when THOL is for two or more lines
AMBTEMP REAL 0 Ambient temperature from external temperature sensor
SENSFLT BOOLEAN 0 Validity status of ambient temperature sensor
RESET BOOLEAN 0 Reset of internal thermal load counter
Table 289: LCPTTR Output signals

TRIP BOOLEAN Trip
START BOOLEAN Start Signal
LOCKOUT BOOLEAN Lockout signal
Table 290: LFPTTR Output signals

TRIP BOOLEAN Trip
START BOOLEAN Start Signal
LOCKOUT BOOLEAN Lockout signal
9.7.5 Settings
Table 291: LCPTTR Group settings (basic)

On
TRef 0 - 300 Deg C 1 90 End temperature rise above ambient
of the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase)
leading to TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is
used for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 200 Deg C 1 80 Temperature level for start (alarm)
TripTemp 0 - 300 Deg C 1 90 Temperature level for trip

Technical manual
Current protection

ReclTemp 0 - 300 Deg C 1 75 Temperature for reset of lockout after
trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Off - - Off External temperature sensor available
On
DefaultAmbTemp -50 - 100 Deg C 1 20 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 300 Deg C 1 50 Temperature raise above ambient
temperature at startup
Table 292: LCPTTR Non group settings (basic)

Value groups
Table 293: LFPTTR Group settings (basic)

On
TRef 0 - 600 Deg F 1 160 End temperature rise above ambient
of the line when loaded with IRef
IRef 0 - 400 %IB 1 100 The load current (in % of IBase)
leading to TRef temperature
IMult 1-5 - 1 1 Current multiplier when function is
used for two or more lines
Tau 1 - 1000 Min 1 45 Time constant of the line in minutes.
AlarmTemp 0 - 400 Deg F 1 175 Temperature level for start (alarm)
TripTemp 0 - 600 Deg F 1 195 Temperature level for trip
ReclTemp 0 - 600 Deg F 1 170 Temperature for reset of lockout after
trip
tPulse 0.05 - 0.30 s 0.01 0.10 Operate pulse length. Minimum one
execution cycle
AmbiSens Off - - Off External temperature sensor available
On
DefaultAmbTemp -50 - 250 Deg F 1 60 Ambient temperature used when
AmbiSens is set to Off.
DefaultTemp -50 - 600 Deg F 1 100 Temperature raise above ambient
temperature at startup
Table 294: LFPTTR Non group settings (basic)

Value groups

Technical manual
Current protection

Table 295: LCPTTR Monitored data

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in
min)
TEMP REAL - deg Calculated temperature of the device
TEMPAMB REAL - deg Ambient temperature used in the
calculations
TERMLOAD REAL - - Temperature relative to operate
temperature
Table 296: LFPTTR Monitored data

TTRIP INTEGER - - Estimated time to trip (in min)
TENRECL REAL - - Estimated time to reset of lockout (in
min)
TEMP REAL - Temperatur Calculated temperature of the device
e
Fahrenheit
TEMPAMB REAL - Temperatur Ambient temperature used in the
e calculations
Fahrenheit
TERMLOAD REAL - - Temperature relative to operate
temperature
The sampled analog phase currents are pre-processed and for each phase current the RMS
value is derived. These phase current values are fed to the thermal overload protection, one
time constant LCPTTR/LFPTTR function. The temperature is displayed either in Celsius or
Fahrenheit, depending on whether LCPTTR/LFPTTR function is selected.
From the largest of the three-phase currents a final temperature is calculated according to the
expression:
2
æ I ö
Q final =ç ÷÷ × Tref
ç I ref
è ø
where:
I is the largest phase current,
Iref is a given reference current and
Tref is steady state temperature rise corresponding to Iref

Technical manual
Current protection
The ambient temperature is added to the calculated final temperature. If this temperature is
larger than the set operate temperature level, TripTemp, a START output signal is activated.
The actual temperature at the actual execution cycle is calculated as:
æ Dt
ö
Qn = Qn -1 + ( Q final - Q n-1 ) × ç1 - e t ÷
-
è ø
where:
Qn is the calculated present temperature,
Qn-1 is the calculated temperature at the previous time step,
Qfinal is the calculated final temperature with the actual current,
Dt is the time step between calculation of the actual temperature and

t is the set thermal time constant for the protected device (line or cable)
The actual temperature of the protected component (line or cable) is calculated by adding the
ambient temperature to the calculated temperature, as shown above. The ambient
temperature can be taken from a separate sensor or can be given a constant value. The
calculated component temperature is available as a real figure signal, TEMP.
When the component temperature reaches the set alarm level AlarmTemp the output signal
ALARM is set. When the component temperature reaches the set trip level TripTemp the
output signal TRIP is set.
There is also a calculation of the present time to operate with the present current. This
calculation is only performed if the final temperature is calculated to be above the operation
temperature:
æQ - Qoperate ö
toperate = -t × ln ç final
ç Q final - Q n ÷÷
è ø
The calculated time to trip is available as a real figure signal, TTRIP.
After a trip, caused by the thermal overload protection, there can be a lockout to reconnect the
tripped circuit. The output lockout signal LOCKOUT is activated when the device temperature
is above the set lockout release temperature setting ReclTemp.
The time to lockout release is calculated by the following cooling time calculation. The thermal
content of the function can be reset with input RESET.
æQ - Qlockout _ release ö
tlockout _ release = -t × ln ç final ÷÷
ç Q final - Q n
è ø
In the above equation, the final temperature is equal to the set or measured ambient
temperature. The calculated time to reset of lockout is available as a real figure signal,
TENRECL. This signal is enabled when the LOCKOUT output is activated.

Technical manual
Current protection
In some applications the measured current can involve a number of parallel lines. This is often
used where one bay connects several parallel cables. By setting the parameter IMult to the
number of parallel lines (cables) the actual current on one line is used in the protection
algorithm by dividing the measured current by the total number of cables. To activate this
option the input ENMULT must be activated.
The protection has a reset input: RESET. By activating this input the calculated temperature is
reset to its default initial value. This is useful during testing when secondary injected current
has given a calculated “false” temperature level.
START
Final Temp > Trip Temp
TEMP
Calculation of actual
temperature
AMBTEMP ALARM
Actual Temp > Alarm Temp
I3P
Calculation of final
temperature
ENMULT
TRIP
Actual Temp > Trip Temp

SENSFLT
LOCKOUT
Lockout logic
Actual Temp < Recl Temp

BLOCK
TTRIP
Calculation of time to trip
BLKTR
TENRECL
Calculation of time to reset
of lockout
Figure 286: Functional overview of LCPTTR/LFPTTR

Technical manual
Current protection

M12352-1 v15
Table 297: LCPTTR/LFPTTR technical data

Reference current (2-400)% of IBase ±1.0% of Ir
Reference temperature (0-300)°C, (0 - 600)°F ±1.0°C, ±2.0°F

Operate time: Time constant t = (1–1000) IEC 60255-149, ±5.0% or ±200
minutes ms whichever is greater
 
 I , Ip
2 2 
t < σ ln  
 2 TTrip , TAmb 2 
I , T √ I ref

 ref 
TTrip= set operate temperature

TAmb = ambient temperature
Tref = temperature rise above ambient at Iref
Iref = reference load current
I = actual measured current
Ip = load current before overload occurs
Alarm temperature (0-200)°C, (0-400)°F ±2.0°C, ±4.0°F

Operate temperature (0-300)°C, (0-600)°F ±2.0°C, ±4.0°F
Reset level temperature (0-300)°C, (0-600)°F ±2.0°C, ±4.0°F
9.8 Breaker failure protection CCRBRF IP14514-1 v6
M14878-1 v5

Breaker failure protection, 3-phase CCRBRF 50BF
activation and output
3I>BF
SYMBOL-U V1 EN-US
Breaker failure protection (CCRBRF) ensures a fast backup tripping of the surrounding
breakers in case the own breaker fails to open. CCRBRF measurement criterion can be current
based, CB position based or an adaptive combination of these two conditions.
A current based check with extremely short reset time is used as check criterion to achieve
high security against inadvertent operation.
CB position check criteria can be used where the fault current through the breaker is small.
CCRBRF provides three different options to select how t1 and t2 timers are run:

Technical manual
Current protection
1. By external start signals which is internally latched

2. Follow external start signal only
3. Follow external start signal and the selected FunctionMode
CCRBRF can be single- or three- phase initiated to allow its use with single phase tripping
applications. For the three-phase application of the CCRBRF the current criteria can be set to
operate only if “2 elements operates out of three phases and neutral” for example; two phases
or one phase plus the residual current start. This gives a higher security to the backup trip
command.
The CCRBRF function can be programmed to give a single- or three- phase retrip to its own
breaker to avoid unnecessary tripping of surrounding breakers at an incorrect initiation due to
mistakes during testing.
CCRBRF
I3P* TRBU
BLOCK TRBU2
START TRRET
STL1 TRRETL1
STL2 TRRETL2
STL3 TRRETL3
CBCLDL1 CBALARM
CBCLDL2 STALARM
CBCLDL3
CBFLT
Figure 287: CCRBRF function block
9.8.4 Signals
Table 298: CCRBRF Input signals

I3P GROUP - Three phase group signal for current inputs
SIGNAL
START BOOLEAN 0 Three phase start for breaker failure protection function
STL1 BOOLEAN 0 Start signal for phase L1
CBCLDL1 BOOLEAN 0 Circuit breaker closed in phase L1
CBFLT BOOLEAN 0 CB faulty, unable to trip. Backup trip instantaneously

Technical manual
Current protection
Table 299: CCRBRF Output signals

TRBU BOOLEAN Backup trip by breaker failure protection function
TRBU2 BOOLEAN Second backup trip by breaker failure protection function
TRRET BOOLEAN Retrip by breaker failure protection function
TRRETL1 BOOLEAN Retrip by breaker failure protection function phase L1
CBALARM BOOLEAN Alarm for faulty circuit breaker
STALARM BOOLEAN External start signal timed out, when by setting StartMode
the external start signal is followed (i.e. when is NOT Latched)
9.8.5 Settings
Table 300: CCRBRF Non group settings (basic)

Value groups
Table 301: CCRBRF Group settings (basic)

On
FunctionMode Current - - Current Selection of measurement principle:
CB Pos Current / CB Position / Current or CB
Current or CB Pos Position
StartMode LatchedStart - - LatchedStart Select how t1 and t2 timers are run: By
FollowStart external start signals which is
FollowStart&Mod internally latched / Follow the external
e start signal only / Follow external
start signal and selected
FunctionMode
tStartTimeout 0.5 - 600.0 s 0.1 1.0 Time delay after which the external
start signal will be ignored, when by
setting StartMode the external start
signal is followed (i.e. when is NOT
Latched)
BuTripMode 2 out of 4 - - 1 out of 3 Select backup trip mode when t2
1 out of 3 timer expires and current
1 out of 4 measurement is used: 2 elements
operate out of three phases and
neutral / 1 element operates out of
three phases / 1 element operates out
of three phases and neutral
RetripMode Off - - Off Select retrip mode when t1 timer
UseFunctionMode expires: Off / use FunctionMode to
Always check / always without any check
IPh> 5 - 200 %IB 1 10 Operate phase current level in % of
IBase

Technical manual
Current protection

IN> 2 - 200 %IB 1 10 Operate residual current level in % of
IBase
t1 0.000 - 60.000 s 0.001 0.000 Time delay of retrip
t2 0.000 - 60.000 s 0.001 0.150 Time delay of backup trip
t2MPh 0.000 - 60.000 s 0.001 0.150 Time delay of backup trip at multi-
phase start. It can be used to speed
up backup trip command for multi-
phase faults on OHLs
tPulse 0.010 - 60.000 s 0.001 0.200 Minimum trip pulse duration
Table 302: CCRBRF Group settings (advanced)

I>BlkCBPos 5 - 200 %IB 1 20 I> in % of IBase to block operation
based on CB Position when
FunctionMode=Current or CB Pos
t3 0.000 - 60.000 s 0.001 0.030 Additional time delay which is added
to t2. It can be used as a second
backup trip
tCBAlarm 0.000 - 60.000 s 0.001 5.000 Time delay for alarm when faulty
circuit breaker indicated

Table 303: CCRBRF Monitored data

IL1 REAL - A Measured current in phase L1
IN REAL - A Measured residual current
Breaker failure protection CCRBRF is initiated from the protection trip command, either from
protection functions within the IED or from external protection devices.
To this function the three-phase current input and/or change to: the breaker normally open
auxiliary contact (i.e. "52a" or "closed") shall be connected. On OHL feeders where single pole
auto-reclosing is used, auxiliary contact from each CB pole shall be connected separately
The input START signal (i.e. initiate signal) can be phase selective or common (for all three
phases). Phase selective start signals enable single pole retrip functionality. This means that a
second attempt to open the same breaker can be done phase-selective. The retrip attempt is
made after a set time delay t1. For transmission lines, single pole trip and auto-reclosing is
often used. The retrip function can be phase selective if it is initiated from the phase selective
line protection.
The retrip function can be done with or without FunctionMode check. With this check, the
retrip is only performed if the circuit breaker is still seen as closed when t1 timer has elapsed.

Technical manual
Current protection
The START signal will also start the backup trip timer. The function detects the successful
breaker opening, either by detection of low current through RMS evaluation and a special
adapted current algorithm or by monitoring the circuit breaker status using normally open
auxiliary contact from the breaker. The special algorithm enables a very fast detection of
successful breaker opening, which is, fast resetting of the current measurement. If the
function has not detected breaker opening before the backup timer has run-out its time a
backup trip is initiated.
Further the following possibilities are available:
• Three phase (i.e. common) start/initiation via input START or individual start/initiation
per phase by using phase segregated inputs STLx.
• The minimum length of the retrip pulse, the backup trip pulse and the second backup trip
pulse are settable. This pulse duration is defined by a parameter setting tPulse. The retrip
pulse, the backup trip pulse and the second backup trip pulse will however sustain as long
as there is an indication of closed breaker.
• If the current detection is used it is possible to use three different options: 1 out of 3
where it is sufficient to detect failure to open (high current) in one pole, 1 out of 4 where it
is sufficient to detect failure to open (high current) in one pole or high residual current
and 2 out of 4 where at least two currents (phase current and/or residual current) shall be
high for breaker failure detection.
• The current detection level for the residual current can be set different from the setting of
phase current detection.
• It is possible to have different backup time delays for single-phase faults and for multi-
phase faults.
• It is possible to have instantaneous backup trip function if the circuit breaker is incapable
to clear faults, for example, at low gas pressure. This will happen when input signal CBFLT
has logical value one and timer tCBAlarm has expired. This situation will be indicated via
output signal CBALARM.
The selection of measurement criterion is done with setting parameter FunctionMode, to

determine if the breaker has opened or not:
• Option1 - Current: Compares the measured phase current magnitude to setting

IPh>(operate phase current level in % of IBase), and the measured residual current
magnitude to setting IN> (Operate residual current level in % of IBase). Criterion is active
(i.e. breaker did not open yet) if the measured current magnitudes are higher than the set
values.
• Option 2 - CB Pos: This criterion is active (i.e. breaker did not open yet in phase Lx) if the
binary input CBCLDLx has logical value one. Thus function simply follows the status of CB
pole normally open auxiliary contact (i.e. "52a" or "closed") which shall be connected to
this input.
• Option 3 - Current or CB Pos: It uses a combination of Current or CB Pos criteria. Note that
Current criterion will be then always used, while the CB Pos criterion will be only enabled
and used if current is smaller than set value I>BlkCBPos at the moment when external
START signal has been received. It is recommended to set value for I>BlkCBPos higher
than the set value for IPh>.
By the setting StartMode it is possible to select how t1 and t2 timers are run and consequently
how output commands are given from the function:
• Option 1 - LatchedStart: “By external start signals which is internally latched”.

When function is once started by external START signal, the timers t1 and t2 will always
elapse and then measurement criterion defined by parameter FunctionMode will be
always checked in order to verify if the appropriate command shall be given out from the
function. Timers cannot be stopped by removing the external START signal. Function can
be started again only when all of the following three timers t1, t2 and fixed timer of 150 ms

Technical manual
Current protection
in function internal design has expired and the measurement criterion defined by
parameter FunctionMode has been deactivated, see Figure 288.
• Option 2 - FollowStart: “Follow the external start signal only”.

The timers t1 and t2 will run while external START signal is present. If they elapse then
measurement criterion defined by parameter FunctionMode will be checked in order to
verify if the appropriate command shall be given out from the function. Timers can be
always stopped by resetting the external START signal, see Figure 289.
• Option 3- FollowStart&Mode: “Follow external start signal and selected FunctionMode”.

The timers t1 and t2 will run while external START signal is present and in the same time
the measurement criterion defined by parameter FunctionMode is active. If they elapse
then the appropriate command will be given out from the function. Timers can be stopped
by resetting the external START signal or if the measurement criterion de-activates, see
Figure 290.
When one of the two “follow modes” is used, there is a settable timer tStartTimeout which will
block the external START input signal when it times-out. This will automatically also reset the
t1 and t2 timers and consequently prevent any backup trip command. At the same time the
STALARM output from the function will have logical value one. To reset this signal external
START signal shall be removed. This is done in order to prevent unwanted operation of the
breaker failure function for cases where a permanent START signal is given by mistake (e.g.
due to a fault in the station battery system). Note that any backup trip command will inhibit
running of tStartTimeout timer.
The BLOCK signal overrides any StartMode condition and resets START signal, running of t1
and t2 timers and all function outputs.
30ms t1 30ms
START OR TRRET
S Q t AND
t2 30ms
OR TRBU
t AND
Current Check
CB Position Check OR
150ms
AND
t
NOT
Figure 288: Simplified overall logic for LatchedStart

Technical manual
Current protection
t1
START OR TRRET
t AND
Current Check
t2
TRBU
t AND
OR
Figure 289: Simplified overall logic for FollowStart
START t1 TRRET
AND t
Current Check
CB Position Check OR t2 TRBU
t
Figure 290: Simplified overall logic for FollowStart&Mode

The BuTripMode setting defines how many measurement elements must operate, when
current criterion is used, to determine if the CB is opened or not:
• 2 elements operate out of three phases and neutral

• 1 element operates out of three phases
• 1 element operates out of three phases and neutral
Note that it is possible to set several timers for the backup trip as described below:
1. Timer t2 is used when function is started in one phase only (i.e. for single-phase to ground
fault on an OHL (Over Head Lines) when single-pole auto-reclosing is used).
2. Timer t2MPh is used when function is started in at least two phases. This will allow to have
shorter backup trip times for a multi-phase fault on an OHL Note that for a protected
object which are always tripped three-phase (e.g. transformers, generators, reactors,
cables, etc.) this timer shall always be set to the same value as t2 timer.
3. Timer t3 can be used to give a second backup trip command. It can be used in stations
having small DC battery which is not capable to trip all surrounding breakers at once. Note
that t3 timer will only start when t2 timer expires.
The RetripMode defines how retrip feature will behave:
• Off: The retrip command to the own circuit breaker is permanently disabled.
• UseFunctionMode: Retrip command to the own circuit breaker is given only if
measurement criterion defined by setting parameter FunctionMode is still active when set
timer t1 expires (e.g. if FunctionMode=Current and current magnitude is higher than set
value IPh> when t1 expires, the retrip command will be issued).
• Always: Retrip command to the own circuit breaker is given always when set timer t1
expires without any further checks.

Technical manual
Current protection
The simplified logic for the function is given in the following figures.
StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR
START 30ms
int startL1
STL1 OR AND S Q
BLOCK
NOT
int reset
OR R
NOT
TRBU
NOT int startAlarmL1
tStartTimeout
AND t NOT
AND AND int startAlarmL2 STALARM
From other OR
phases int startAlarmL3
Figure 291: Start logic for all three Function Modes of operation
IL1
a
a>b NOT
IPh> b
FunctionMode
Current
CB Pos OR AND int reset
OR
1
Current or CB Pos 150 ms
int startL1
t
OR AND
t1
t
t2
t OR
t2MPh
t
AND
CBCLDL1
NOT
Figure 292: Reset logic in latched mode
StartMode
LatchedStart
FollowStart
1 FollowStart&Mode OR AND
int retrip
currPh1Check
CB Position Check OR 30ms
AND t1 OR AND
int startL1 t OR
t1
t
RetripMode
Off tPulse
TRRETL1
UseFunctionMode AND OR
1
Always
TRRETL2 TRRET
TRRETL3
OR
tPulse From other

AND phases
Figure 293: Simplified retrip logic

Technical manual
Current protection
StartMode
LatchedStart
1 FollowStart
FollowStart&Mode OR AND
currCheck
backupTripL1
t2
AND t 30ms
OR AND
OR OR
int startL1
t2MPh tPulse TRBU

int startL2 From backupTripL2 OR
2 of 3 OR
int startL3 t other backupTripL3
phases
t3
t TRBU2
OR
AND
tPulse
CBFLT tCBAlarm CBALARM

t
Figure 294: Simplified backup trip logic
M12353-1 v15
Table 304: CCRBRF technical data

Operate phase current (5-200)% of lBase ±1.0% of Ir at I £ Ir
Reset ratio, phase current > 95% -

Operate residual current (2-200)% of lBase ±1.0% of Ir at I £ Ir

Phase current level for blocking of contact (5-200)% of lBase ±1.0% of Ir at I £ Ir
function ±1.0% of I at I > Ir
Reset ratio > 95% -

Operate time for current detection 10 ms typically -
Reset time for current detection 10 ms maximum * -
Time delay for retrip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Time delay for backup trip at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Time delay for backup trip at multi-phase start (0.000-60.000) s ±0.2% or ±20 ms whichever is
at 0 to 2 x Iset greater
Additional time delay for a second backup trip (0.000-60.000) s ±0.2% or ±20 ms whichever is
at 0 to 2 x Iset greater
Time delay for alarm for faulty circuit breaker (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Minimum trip pulse duration (0.010-60.000) s ±0.2% or ±5 ms whichever is
greater
* Valid for product version 2.2.3 or later

Technical manual
Current protection
9.9 Stub protection STBPTOC IP14515-1 v3
M17108-1 v2

Stub protection STBPTOC 50STB
3I>STUB
SYMBOL-T V1 EN-US
When a power line is taken out of service for maintenance and the line disconnector is opened
in multi-breaker arrangements the voltage transformers will mostly be outside on the
disconnected part. The primary line distance protection will thus not be able to operate and
must be blocked.
The stub protection (STBPTOC) covers the zone between the current transformers and the
open disconnector. The three-phase instantaneous overcurrent function is released from a
normally open, NO (b) auxiliary contact on the line disconnector.
STBPTOC
I3P* TRIP
BLOCK START
BLKTR
RELEASE
Figure 295: STBPTOC function block
9.9.4 Signals
Table 305: STBPTOC Input signals

SIGNAL
RELEASE BOOLEAN 0 Release of stub protection
Table 306: STBPTOC Output signals

TRIP BOOLEAN General trip
START BOOLEAN General start

Technical manual
Current protection
9.9.5 Settings
Table 307: STBPTOC Group settings (basic)

On
ReleaseMode Release - - Release Release of stub protection
Continuous
I> 5 - 2500 %IB 1 200 Operate current level in % of IBase
Table 308: STBPTOC Group settings (advanced)

tDelay 0.000 - 60.000 s 0.001 0.000 Time delay
Table 309: STBPTOC Non group settings (basic)

Value groups

Table 310: STBPTOC Monitored data

The sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block.
From the fundamental frequency components of each phase current the RMS value of each
phase current is derived. These phase current values are fed to a comparator in the stub
protection function STBPTOC. In a comparator the RMS values are compared to the set
operating current value of the function I>.
If a phase current is larger than the set operating current the signal from the comparator for
this phase is activated. This signal will, in combination with the release signal from line
disconnection (RELEASE input), activate the timer for the TRIP signal. If the fault current
remains during the timer delay t, the TRIP output signal is activated. The function can be
blocked by activation of the BLOCK input.

Technical manual
Current protection
STUB PROTECTION FUNCTION
BLOCK
TRIP
STIL1 AND
STIL2 OR
STIL3
RELEASE
en05000731.vsd
Figure 296: Simplified logic diagram for Stub protection

M12350-1 v12
Table 311: STBPTOC technical data

Operating current (5-2500)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (50-2500)% of IBase -

Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±30 ms whichever is
greater
Operate time, start at 0 to 2 x Iset Min. = 10 ms -
Max. = 20 ms
Reset time, start at 2 x Iset to 0 Min. = 10 ms -
Max. = 20 ms
9.10 Pole discordance protection CCPDSC IP14516-1 v5
M14888-1 v4

Pole discordance protection CCPDSC 52PD
PD
SYMBOL-S V1 EN-US

Technical manual
Current protection
An open phase can cause negative and zero sequence currents which cause thermal stress on
rotating machines and can cause unwanted operation of zero sequence or negative sequence
current functions.
Normally the own breaker is tripped to correct such a situation. If the situation persists the
surrounding breakers should be tripped to clear the unsymmetrical load situation.
The Pole discordance protection function (CCPDSC) operates based on information from
auxiliary contacts of the circuit breaker for the three phases with additional criteria from
unsymmetrical phase currents when required.
CCPDSC
I3P* TRIP
BLOCK START
BLKDBYAR
CLOSECMD
OPENCMD
EXTPDIND
POLE1OPN
POLE1CL
POLE2OPN
POLE2CL
POLE3OPN
POLE3CL
Figure 297: CCPDSC function block
9.10.4 Signals
Table 312: CCPDSC Input signals

SIGNAL
BLKDBYAR BOOLEAN 0 Block of function at CB single phase auto re-closing cycle
CLOSECMD BOOLEAN 0 Close order to CB
OPENCMD BOOLEAN 0 Open order to CB
EXTPDIND BOOLEAN 0 Pole discordance signal from CB logic
POLE1OPN BOOLEAN 1 Pole one opened indication from CB
POLE1CL BOOLEAN 0 Pole one closed indication from CB
POLE2OPN BOOLEAN 1 Pole two opened indication from CB
POLE2CL BOOLEAN 0 Pole two closed indication from CB
POLE3OPN BOOLEAN 1 Pole three opened indication from CB
POLE3CL BOOLEAN 0 Pole three closed indication from CB

Technical manual
Current protection
Table 313: CCPDSC Output signals

TRIP BOOLEAN Trip signal to CB
START BOOLEAN Trip condition TRUE, waiting for time delay
9.10.5 Settings
Table 314: CCPDSC Group settings (basic)

On
tTrip 0.000 - 60.000 s 0.001 0.300 Time delay between trip condition and
trip signal
ContSel Off - - Off Contact function selection
PD signal from CB
Pole pos aux cont.
CurrSel Off - - Off Current function selection
CB oper monitor
Continuous
monitor
CurrUnsymLevel 0 - 100 % 1 80 Unsym magn of lowest phase current
compared to the highest.
CurrRelLevel 0 - 100 %IB 1 10 Current magnitude for release of the
function in % of IBase
Table 315: CCPDSC Non group settings (basic)

Value groups

Table 316: CCPDSC Monitored data

IMin REAL - A Lowest phase current
IMax REAL - A Highest phase current

M13273-3 v6
The detection of pole discordance can be made in two different ways. If the contact based
function is used an external logic can be made by connecting the auxiliary contacts of the
circuit breaker so that a pole discordance is indicated, see figure 298.

Technical manual
Current protection
circuit breaker
Pole discordance signal from circuit breaker
en05000287.vsd
Figure 298: Pole discordance external detection logic

This binary signal is connected to a binary input of the IED. The appearance of this signal will
start a timer that will give a trip signal after the set time delay.
There is also a possibility to connect all phase selective auxiliary contacts (phase contact open
and phase contact closed) to binary inputs of the IED, see figure 299.
C.B.
poleOneClosed from C.B.
poleTwoClosed from C.B.
poleThreeClosed from C.B.
+
poleOneOpened from C.B.
poleTwoOpened from C.B.
poleThreeOpened from C.B.
en05000288.vsd
Figure 299: Pole discordance signals for internal logic

In this case the logic is realized within the function. If the inputs are indicating pole
discordance the trip timer is started. This timer will give a trip signal after the set delay.
Pole discordance can also be detected by means of phase selective current measurement. The
sampled analog phase currents are pre-processed in a discrete Fourier filter (DFT) block. From
the fundamental frequency components of each phase current the RMS value of each phase
current is derived. The smallest and the largest phase current are derived. If the smallest phase
current is lower than the setting CurrUnsymLevel times the largest phase current the settable
trip timer (tTrip) is started. The tTrip timer gives a trip signal after the set delay. The TRIP
signal is a pulse 150 ms long. The current based pole discordance function can be set to be
active either continuously or only directly in connection to breaker open or close command.
The function also has a binary input that can be configured from the autoreclosing function, so
that the pole discordance function can be blocked during sequences with a single pole open if
single pole autoreclosing is used.
M13946-3 v7
The simplified block diagram of the current and contact based Pole discordance protection
function CCPDSC is shown in figure 300.

Technical manual
Current protection
BLOCK
OR
BLKDBYAR
PolPosAuxCont
AND
POLE1OPN
POLE1CL
POLE2OPN
Discordance
POLE2CL
detection
POLE3OPN
POLE3CL t 150 ms
t TRIP
AND
OR
PD Signal from CB
AND
EXTPDIND
CLOSECMD t+200 ms
OR
OPENCMD
AND
Unsymmetry current
detection
en05000747.vsd
Figure 300: Simplified block diagram of pole discordance function CCPDSC - contact and
current based
CCPDSC is blocked if:
• The IED is in TEST mode and CCPDSC has been blocked from the local HMI
• The input signal BLOCK is high
• The input signal BLKDBYAR is high
The BLOCK signal is a general purpose blocking signal of the pole discordance protection. It
can be connected to a binary input in the IED in order to receive a block command from
external devices or can be software connected to other internal functions in the IED itself in
order to receive a block command from internal functions. Through OR gate it can be
connected to both binary inputs and internal function outputs.
The BLKDBYAR signal blocks the pole discordance operation when a single phase
autoreclosing cycle is in progress. It can be connected to the output signal 1PT1 on
SMBRRECfunction block. If the autoreclosing function is an external device, then BLKDBYAR
has to be connected to a binary input in the IED and this binary input is connected to a
signalization “1phase autoreclosing in progress” from the external autoreclosing device.
If the pole discordance protection is enabled, then two different criteria can generate a trip
signal TRIP:
• Pole discordance signaling from the circuit breaker.

• Unsymmetrical current detection.
9.10.7.1 Pole discordance signaling from circuit breaker M13946-18 v4
If one or two poles of the circuit breaker have failed to open or to close the pole discordance
status, then the function input EXTPDIND is activated from the pole discordance signal
derived from the circuit breaker auxiliary contacts (one NO contact for each phase connected
in parallel, and in series with one NC contact for each phase connected in parallel) and, after a
settable time interval tTrip (0-60 s), a 150 ms trip pulse command TRIP is generated by the
Polediscordance function.

Technical manual
Current protection
9.10.7.2 Unsymmetrical current detection M13946-21 v4
Unsymmetrical current indicated if:
• any phase current is lower than CurrUnsymLevel of the highest current in the three
phases.
• the highest phase current is greater than CurrRelLevel of IBase.
If these conditions are true, an unsymmetrical condition is detected and the internal signal
INPS is turned high. This detection is enabled to generate a trip after a set time delay tTrip if
the detection occurs in the next 200 ms after the circuit breaker has received a command to
open trip or close and if the unbalance persists. The 200 ms limitation is for avoiding
unwanted operation during unsymmetrical load conditions.
The pole discordance protection is informed that a trip or close command has been given to
the circuit breaker through the inputs CLOSECMD (for closing command information) and
OPENCMD (for opening command information). These inputs can be connected to terminal
binary inputs if the information are generated from the field (that is from auxiliary contacts of
the close and open push buttons) or may be software connected to the outputs of other
integrated functions (that is close command from a control function or a general trip from
integrated protections).

M13279-1 v10
Table 317: CCPDSC technical data

Operate current (0–100)% of IBase ±1.0% of Ir
Independent time delay (0.000-60.000) s ±0.2% or ± 30 ms whichever is greater

between trip condition and
trip signal
9.11 Directional underpower protection GUPPDUP SEMOD156693-1 v4
SEMOD158941-2 v4

Directional underpower protection GUPPDUP 37
P<
2
SYMBOL-LL V2 EN-US
The task of a generator in a power plant is to convert mechanical energy available as a torque
on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a

Technical manual
Current protection
synchronous motor and starts to take electric power from the rest of the power system. This
operating state, where individual synchronous machines operate as motors, implies no risk for
the machine itself. If the generator under consideration is very large and if it consumes lots of
electric power, it may be desirable to disconnect it to ease the task for the rest of the power
system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the low forward power protection is to protect the turbine and not to protect the generator
itself.
Figure 301 illustrates the low forward power and reverse power protection with underpower
and overpower functions respectively. The underpower IED gives a higher margin and should
provide better dependability. On the other hand, the risk for unwanted operation immediately
after synchronization may be higher. One should set the underpower IED to trip if the active
power from the generator is less than about 2%. One should set the overpower IED to trip if
the power flow from the network to the generator is higher than 1% depending on the type of
turbine.
When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).
Underpower IED Overpower IED
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
Figure 301: Protection with underpower IED and overpower IED
GUPPDUP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
Figure 302: GUPPDUP function block

Technical manual
Current protection
9.11.4 Signals
Table 318: GUPPDUP Input signals

SIGNAL
SIGNAL
BLOCK1 BOOLEAN 0 Block of stage 1
Table 319: GUPPDUP Output signals

TRIP1 BOOLEAN Trip of stage 1
START BOOLEAN Common start
START1 BOOLEAN Start of stage 1
P REAL Active Power in MW
PPERCENT REAL Active power in % of SBase
Q REAL Reactive power in MVAr
QPERCENT REAL Reactive power in % of SBase
9.11.5 Settings
Table 320: GUPPDUP Group settings (basic)

On
OpMode1 Off - - UnderPower Operation mode for stage 1 Off / On
UnderPower
Power1 0.0 - 500.0 %SB 0.1 1.0 Stage 1 underpower setting in Angle1
direction in % of SBase
Angle1 -180.0 - 180.0 Deg 0.1 0.0 Characteristic angle for max power
senistivity stage 1
TripDelay1 0.01 - 6000.00 s 0.01 1.00 Trip delay for stage 1
DropDelay1 0.01 - 6000.00 s 0.01 0.06 Drop-off delay for stage 1
OpMode2 Off - - UnderPower Operation mode for stage 2 Off / On
UnderPower
Power2 0.0 - 500.0 %SB 0.1 1.0 Power setting for stage 2 in % of
SBase

Technical manual
Current protection

senistivity stage 2
Table 321: GUPPDUP Group settings (advanced)

k 0.000 - 0.999 - 0.001 0.000 Low pass filter coefficient for power
measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in %
SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in %
SBase
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
current error at 5% of Ir
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude correction compensates
voltage error at 5% of Ur
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Corr of error betw current and voltage
angles at 5% of Ir
angles at 30% of Ir
angles at 100% of Ir
Table 322: GUPPDUP Non group settings (basic)

Value groups
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3

Technical manual
Current protection

Table 323: GUPPDUP Monitored data

P REAL - MW Active Power in MW
PPERCENT REAL - % Active power in % of SBase
Q REAL - MVAr Reactive power in MVAr
QPERCENT REAL - % Reactive power in % of SBase

SEMOD172136-4 v4
A simplified scheme showing the principle of the power protection function is shown in
figure 303. The function has two stages with individual settings.
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) < t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1
S(angle) < t TRIP2

Power2
START2
P = POWRE
Q = POWIM
Figure 303: Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 324.
Table 324: Complex power calculation

Set value: Mode Formula used for complex power calculation
L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
PosSeq
S = 3 × U PosSeq × I PosSeq*

Technical manual
Current protection

L1L2
S = U L1L 2 × ( I L1* - I L 2* )
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
L1
S = 3 × U L1 × I L1*
L2
S = 3 × U L 2 × I L 2*
L3
S = 3 × U L 3 × I L 3*
The active and reactive power is available from the function and can be used for monitoring
and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). For
directional underpower protection, a start signal START1(2) is activated if the calculated power
component is smaller than the pick up value. For directional overpower protection, a start
signal START1(2) is activated if the calculated power component is larger than the pick up
value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is
still active. At activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute
hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) + drop-power1(2)). For generator
low forward power protection the power setting is very low, normally down to 0.02 p.u. of
rated generator power. The hysteresis should therefore be set to a smaller value. The drop-
power value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) =
Power1(2) + Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the
minimal value.
If the measured power drops under the drop-power1(2) value, the function will reset after a set
time DropDelay1(2). The reset means that the start signal will drop out and that the timer of
the stage will reset.
9.11.7.1 Low pass filtering SEMOD172136-39 v3
In order to minimize the influence of the noise signal on the measurement it is possible to
introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make
slower measurement response to the step changes in the measured quantity. Filtering is
performed in accordance with the following recursive formula:

Technical manual
Current protection
S = k × SOld + (1 - k ) × SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
k is settable parameter by the end user which influence the filter properties
TD
Default value for parameter k is 0.00. With this value the new calculated value is immediately
given out without any filtering (that is without any additional delay). When k is set to value
bigger than 0, the filtering is enabled. A typical value for k=0.92 in case of slow operating
functions.
9.11.7.2 Calibration of analog inputs SEMOD172136-57 v3
Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100%
of rated current and voltage. The compensation below 5% and above 100% is constant and
linear in between, see example in figure 304.
Figure 304: Calibration curves

The first current and voltage phase in the group signals will be used as reference and the
amplitude and angle compensation will be used for related input signals.

Technical manual
Current protection
Analog outputs (Monitored data) from the function can be used for service values or in the
disturbance report. The active power is provided as MW value: P, or in percent of base power:
PPERCENT. The reactive power is provided as Mvar value: Q, or in percent of base power:
QPERCENT.
SEMOD175152-2 v11
Table 325: GUPPDUP technical data

Power level (0.0–500.0)% of SBase ±1.0% of Sr at S ≤ Sr
for Step 1 and Step 2 ±1.0% of S at S > Sr
where
S r = 1.732 × U r × I r
Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Independent time delay to operate for (0.01-6000.00) s ±0.2% or ±40 ms whichever is
Step 1 and Step 2 at 2 x Sr to 0.5 x Sr and greater
k=0.000
9.12 Directional overpower protection GOPPDOP SEMOD172360-1 v4
SEMOD176574-2 v4

Directional overpower protection GOPPDOP 32
P>
2
DOCUMENT172362-IMG158942
V2 EN-US
The task of a generator in a power plant is to convert mechanical energy available as a torque
on a rotating shaft to electric energy.
Sometimes, the mechanical power from a prime mover may decrease so much that it does not
cover bearing losses and ventilation losses. Then, the synchronous generator becomes a
synchronous motor and starts to take electric power from the rest of the power system. This
operating state, where individual synchronous machines operate as motors, implies no risk for
the machine itself. If the generator under consideration is very large and if it consumes lots of
electric power, it may be desirable to disconnect it to ease the task for the rest of the power
system.
Often, the motoring condition may imply that the turbine is in a very dangerous state. The task
of the reverse power protection is to protect the turbine and not to protect the generator
itself.
Figure 305 illustrates the low forward power and reverse power protection with underpower
and overpower functions respectively. The underpower IED gives a higher margin and should

Technical manual
Current protection
provide better dependability. On the other hand, the risk for unwanted operation immediately
after synchronization may be higher. One should set the underpower IED to trip if the active
power from the generator is less than about 2%. One should set the overpower IED to trip if
the power flow from the network to the generator is higher than 1%.
When IED with a metering class input CTs is used pickup can be set to more sensitive value
(e.g.0,5% or even to 0,2%).
Underpower IED Overpower IED
Operate
Q Q
Operate
Line Line
Margin Margin
P P
Operating point Operating point

without without
turbine torque turbine torque
Figure 305: Reverse power protection with underpower IED and overpower IED
GOPPDOP
I3P* TRIP
U3P* TRIP1
BLOCK TRIP2
BLOCK1 START
BLOCK2 START1
START2
P
PPERCENT
Q
QPERCENT
Figure 306: GOPPDOP function block
9.12.4 Signals
Table 326: GOPPDOP Input signals

SIGNAL
SIGNAL

Technical manual
Current protection
Table 327: GOPPDOP Output signals

START BOOLEAN Common start
P REAL Active power P in MW
PPERCENT REAL Active power P in % of SBase
Q REAL Reactive power Q in MVAr
QPERCENT REAL Reactive power Q in % of SBase
9.12.5 Settings
Table 328: GOPPDOP Group settings (basic)

On
OpMode1 Off - - OverPower Operation mode for stage 1 Off / On
OverPower
Power1 0.0 - 500.0 %SB 0.1 120.0 Stage 1 overpower setting in Angle1
senistivity stage 1
OpMode2 Off - - OverPower Operation mode for stage 2 Off / On
OverPower
Power2 0.0 - 500.0 %SB 0.1 120.0 Stage 2 overpower setting in Angle2
senistivity stage 2
Table 329: GOPPDOP Group settings (advanced)

measurement, P and Q
Hysteresis1 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 1 in % of
SBase
Hysteresis2 0.2 - 5.0 %SB 0.1 0.5 Absolute hysteresis of stage 2 in % of
SBase

Technical manual
Current protection

angles at 5% of Ir
angles at 30% of Ir
angles at 100% of Ir
Table 330: GOPPDOP Non group settings (basic)

Value groups
Mode L1, L2, L3 - - Pos Seq Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3

Table 331: GOPPDOP Monitored data

P REAL - MW Active power P in MW
PPERCENT REAL - % Active power P in % of SBase
Q REAL - MVAr Reactive power Q in MVAr
QPERCENT REAL - % Reactive power Q in % of SBase

SEMOD172154-4 v3
A simplified scheme showing the principle of the power protection function is shown in
figure 307. The function has two stages with individual settings.

Technical manual
Current protection
Chosen current
phasors P
Complex Derivation of S(angle)

S(angle) > t TRIP1
power S(composant)
Chosen voltage Power1
calculation in Char angle
phasors Q
START1
S(angle) > t TRIP2

Power2
START2
P = POWRE
Q = POWIM
Figure 307: Simplified logic diagram of the power protection function

The function will use voltage and current phasors calculated in the pre-processing blocks. The
apparent complex power is calculated according to chosen formula as shown in table 332.
Table 332: Complex power calculation

L1, L2, L3
S = U L1 × I L1* + U L 2 × I L 2* + U L 3 × I L 3*
Arone
S = U L1L 2 × I L1* - U L 2 L 3 × I L 3*
PosSeq
S = 3 × U PosSeq × I PosSeq*
L1L2
S = U L1L 2 × ( I L1* - I L 2* )
L2L3
S = U L 2 L 3 × ( I L 2* - I L 3* )
L3L1
S = U L 3 L1 × ( I L 3* - I L1* )
L1
S = 3 × U L1 × I L1*
L2
S = 3 × U L 2 × I L 2*
L3
S = 3 × U L 3 × I L 3*

Technical manual
Current protection
The active and reactive power is available from the function and can be used for monitoring
and fault recording.
The component of the complex power S = P + jQ in the direction Angle1(2) is calculated. If this
angle is 0° the active power component P is calculated. If this angle is 90° the reactive power
component Q is calculated.
The calculated power component is compared to the power pick up setting Power1(2). A start
signal START1(2) is activated if the calculated power component is larger than the pick up
value. After a set time delay TripDelay1(2) a trip TRIP1(2) signal is activated if the start signal is
still active. At activation of any of the two stages a common signal START will be activated. At
trip from any of the two stages also a common signal TRIP will be activated.
To avoid instability there is a settable hysteresis in the power function. The absolute
hysteresis of the stage1(2) is Hysteresis1(2) = abs (Power1(2) – drop-power1(2)). For generator
reverse power protection the power setting is very low, normally down to 0.02 p.u. of rated
generator power. The hysteresis should therefore be set to a smaller value. The drop-power
value of stage1 can be calculated with the Power1(2), Hysteresis1(2): drop-power1(2) =
Power1(2) – Hysteresis1(2)
For small power1 values the hysteresis1 may not be too big, because the drop-power1(2) would
be too small. In such cases, the hysteresis1 greater than (0.5 · Power1(2)) is corrected to the
minimal value.
If the measured power drops under the drop-power1(2) value the function will reset after a set
time DropDelay1(2). The reset means that the start signal will drop out ant that the timer of
the stage will reset.
9.12.7.1 Low pass filtering SEMOD172154-37 v4
introduce the recursive, low pass filtering of the measured values for S (P, Q). This will make
slower measurement response to the step changes in the measured quantity. Filtering is
performed in accordance with the following recursive formula:
S = k × SOld + (1 - k ) × SCalculated
Where
S is a new measured value to be used for the protection function
Sold is the measured value given from the function in previous execution cycle
SCalculated is the new calculated value in the present execution cycle
given out without any filtering (that is, without any additional delay). When k is set to value
bigger than 0, the filtering is enabled. A typical value for k = 0.92 in case of slow operating
functions.
9.12.7.2 Calibration of analog inputs SEMOD172154-55 v2
Measured currents and voltages used in the Power function can be calibrated to get class 0.5
measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and 100%

Technical manual
Current protection
of rated current and voltage. The compensation below 5% and above 100% is constant and
linear in between, see example in figure 308.

The first current and voltage phase in the group signals will be used as reference and the
amplitude and angle compensation will be used for related input signals.
Analog outputs from the function can be used for service values or in the disturbance report.
The active power is provided as MW value: P, or in percent of base power: PPERCENT. The
reactive power is provided as Mvar value: Q, or in percent of base power: QPERCENT.
SEMOD175159-2 v9
Table 333: GOPPDOP technical data

Power level (0.0–500.0)% of SBase ±1.0% of Sr at S ≤ Sr
for Step 1 and Step 2 ±1.0% of S at S > Sr
Characteristic angle (-180.0–180.0) degrees ±2.0 degrees

for Step 1 and Step 2
Operate time, start at 0.5 x Sr to 2 x Sr and Min. =10 ms
k=0.000
Max. = 25 ms
Reset time, start at 2 x Sr to 0.5 x Sr and Min. = 35 ms
k=0.000
Max. = 55 ms
Step 1 and Step 2 at 0.5 x Sr to 2 x Sr and greater
k=0.000

Technical manual
Current protection
9.13 Broken conductor check BRCPTOC SEMOD171761-1 v3
SEMOD172362-2 v2

Broken conductor check BRCPTOC - 46
Conventional protection functions cannot detect the broken conductor condition. Broken
conductor check BRCPTOC function, consisting of continuous phase selective current
unsymmetrical check on the line where the IED is connected, gives an alarm or trip at detecting
broken conductors.
BRCPTOC
I3P* TRIP
BLOCK START
BLKTR
Figure 309: BRCPTOC function block
9.13.4 Signals
Table 334: BRCPTOC Input signals

SIGNAL
Table 335: BRCPTOC Output signals

TRIP BOOLEAN Operate signal of the protection logic
START BOOLEAN Start signal of the protection logic

Technical manual
Current protection
9.13.5 Settings
Table 336: BRCPTOC Group settings (basic)

On
Iub> 50 - 90 %IM 1 50 Highest and lowest phase currents
difference in % of highest phase
current
IP> 5 - 100 %IB 1 20 Minimum phase current for operation
of Iub> in % of IBase
tOper 0.000 - 60.000 s 0.001 5.000 Operate time delay
Table 337: BRCPTOC Group settings (advanced)

tReset 0.010 - 60.000 s 0.001 0.100 Time delay in reset
Table 338: BRCPTOC Non group settings (basic)

Value groups

Table 339: BRCPTOC Monitored data

IUNBAL REAL - - Measured unbalance of phase
currents
Broken conductor check (BRCPTOC) detects a broken conductor condition by detecting the
asymmetry between currents in the three phases. The current-measuring elements
continuously measure the three-phase currents.
The current asymmetry signal output START is set on if:
• The difference in currents between the phase with the lowest current and the phase with
the highest current is greater than set percentage Iub> of the highest phase current
• The highest phase current is greater than the minimum setting value IP>.
• The lowest phase current is below 50% of the minimum setting value IP>
The third condition is included to avoid problems in systems involving parallel lines. If a
conductor breaks in one phase on one line, the parallel line will experience an increase in
current in the same phase. This might result in the first two conditions being satisfied. If the
unsymmetrical detection lasts for a period longer than the set time tOper the TRIP output is
activated.

Technical manual
Current protection
The simplified logic diagram of the broken conductor check function is shown in figure 310
BRCPTOC is disabled (blocked) if:
• The IED is in TEST status and the function has been blocked from the local HMI test menu
(BlockBRC=Yes).
• The input signal BLOCK is high.
The BLOCK input can be connected to a binary input of the IED in order to receive a block
command from external devices, or can be software connected to other internal functions of
the IED itself to receive a block command from internal functions.
The output trip signal TRIP is a three-phase trip. It can be used to command a trip to the circuit
breaker or for alarm purpose only.
TEST
TEST-ACTIVE
and
Block BRCPTOC=Yes
START
Function Enable
BLOCK or
tOper
TRIP
and t
Unsymmetrical
Current Detection
STI
IL1<50%IP>
IL2<50%IP> or
IL3<50%IP>
Figure 310: Simplified logic diagram for Broken conductor check BRCPTOC
SEMOD175200-2 v7
Table 340: BRCPTOC technical data

Minimum phase current for operation (5–100)% of IBase ±1.0% of Ir
Unbalance current operation (50–90)% of maximum current ±1.0% of Ir
Independent operate time delay (0.000-60.000) s ±0.2% or ±45 ms whichever is

greater
Independent reset time delay (0.010-60.000) s ±0.2% or ±30 ms whichever is
greater
Start time at current change from Ir to Min. = 25 ms -
0 Max. = 35 ms
Reset time at current change from 0 to Min. = 5 ms -

Ir Max. = 20 ms

Technical manual
Current protection
9.14 Voltage-restrained time overcurrent protection

VRPVOC GUID-613620B1-4092-4FB6-901D-6810CDD5C615 v4
9.14.1 Identification GUID-7835D582-3FF4-4587-81CE-3B40D543E287 v4

Voltage-restrained time overcurrent VRPVOC I>/U< 51V
protection
9.14.2 Functionality GUID-935E1CE8-601F-40E2-8D22-2FF68420FADF v6
Voltage-restrained time overcurrent protection (VRPVOC) function can be used as generator

backup protection against short-circuits.
The overcurrent protection feature has a settable current level that can be used either with
definite time or inverse time characteristic. Additionally, it can be voltage controlled/
restrained.
One undervoltage step with definite time characteristic is also available within the function in
order to provide functionality for overcurrent protection with undervoltage seal-in.
9.14.3 Function block GUID-6B4EB1A4-2226-4397-A6FD-14F9DD02B12E v4
VRPVOC
I3P* TRIP
U3P* TROC
BLOCK TRUV
BLKOC START
BLKUV STOC
STUV
Figure 311: VRPVOC function block
9.14.4 Signals
Table 341: VRPVOC Input signals

SIGNAL
U3P GROUP - Three phase group signal for voltage inputs
SIGNAL
BLOCK BOOLEAN 0 Block of function both stages
BLKOC BOOLEAN 0 Block of voltage restraint overcurrent stage (ANSI 51V)
BLKUV BOOLEAN 0 Block of under voltage function

Technical manual
Current protection
Table 342: VRPVOC Output signals

TROC BOOLEAN Trip signal from voltage restrained overcurrent stage
TRUV BOOLEAN Trip signal from undervoltage function
STOC BOOLEAN Start signal from voltage restrained overcurrent stage
STUV BOOLEAN Start signal from undervoltage function
9.14.5 Settings
Table 343: VRPVOC Group settings (basic)

On
StartCurr 2.0 - 5000.0 %IB 1.0 120.0 Start current level in % of IBase
Characterist ANSI Ext. inv. - - IEC Norm. inv. Time delay curve type for 51V Voltage
ANSI Very inv. restrained overcurrent
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
tDef_OC 0.00 - 6000.00 s 0.01 0.50 Definite time delay for Over Current
k 0.05 - 999.00 - 0.01 1.00 Time multiplier for Inverse Definite
Minimum Time curves
tMin 0.00 - 60.00 s 0.01 0.05 Minimum operate time for Inverse
Definite Minimum Time curve
Operation_UV Off - - Off Operation of under-voltage stage
On (ANSI 27) Off / On
StartVolt 2.0 - 100.0 %UB 0.1 50.0 Voltage for start of under-voltage
stage in % of UBase
tDef_UV 0.00 - 6000.00 s 0.01 1.00 Definite time time delay when used
for Under-Voltage
EnBlkLowV Off - - Off Enable internal low voltage level
On blocking for Under-Voltage
BlkLowVolt 0.0 - 5.0 %UB 0.1 3.0 Internal low voltage level for blocking
of UV in % of UBase

Technical manual
Current protection
Table 344: VRPVOC Group settings (advanced)

VDepMode Step - - Slope Voltage dependent mode OC (step,
Slope slope)
VDepFact 5.0 - 100.0 % 0.1 25.0 Start current level in % of pickup when
U< 25% of UBase
UHighLimit 30.0 - 100.0 %UB 0.1 100.0 Voltage high limit setting in % of
UBase
Table 345: VRPVOC Non group settings (basic)

Value groups

Table 346: VRPVOC Monitored data

IMAX REAL - A Maximum phase current magnitude
UUMIN REAL - kV Minimum ph-to-ph voltage magnitude
9.14.7.1 Measured quantities GUID-0D511C03-3750-4F61-9555-69DAD96CDC21 v5
The voltage-restrained time overcurrent protection VRPVOC function is always connected to

three-phase current and three-phase voltage input in the configuration tool (ACT), but it will
always measure the maximum of the three-phase currents and the minimum of the three
phase-to-phase voltages. If frequency tracking mode for preprocessing blocks is used, then
the function operates properly in wide frequency range (e.g. 10-90 Hz).
9.14.7.2 Base quantities GUID-08944177-73CF-4FB4-818E-3B7AC4F625EE v4
GlobalBaseSel defines the particular Global Base Values Group where the base quantities of
the function are set. In that Global Base Values Group:
IBase shall be entered as rated phase current of the protected object in primary amperes.
UBase shall be entered as rated phase-to-phase voltage of the protected object in primary kV.
9.14.7.3 Overcurrent protection GUID-7BB29872-EBC1-4628-AFB5-7A15E2EC41A8 v2
The overcurrent step simply compares the magnitude of the measured current quantity with
the set start level. The overcurrent step starts if the magnitude of the measured current
quantity is higher than the set level.
Voltage restraint/control feature GUID-E7C59BAD-47A1-46C2-8929-7E589548045C v3

The overcurrent protection operation is made dependent of a measured voltage quantity. This
means that the start level of the overcurrent step is not constant but decreases with the

Technical manual
Current protection
decrease in magnitude of the measured voltage quantity. This feature affects the start current
value of both definite time and inverse time IDMT overcurrent protection; in particular the
overcurrent with IDMT curve operates faster during low voltage conditions. Two different
types of dependencies are available:
• Voltage restrained overcurrent (when setting parameter VDepMode = Slope); the start
level of the overcurrent stage changes according to the Figure 312. The voltage restrained
characteristic is defined by the two points: (0.25*UBase ; VDepFact *StartCurr/100*IBase)
and (UHighLimit/100*UBase; StartCurr/100*IBase). In the first point the factor 0.25 that
multiply UBase cannot be changed.
Start level of the current
StartCurr
VDepFact * StartCurr
0,25 UHighLimit
UBase
Figure 312: Example for start level of the current variation as function of measured
voltage magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter VDepMode = Step); the start level
of the overcurrent stage changes according to the Figure 313.
Start level of the current
StartCurr
VDepFact * StartCurr
UHighLimit UBase
Figure 313: Example for start level of the current variation as function of measured
voltage magnitude in Step mode of operation

Technical manual
Current protection
9.14.7.4 Logic diagram GUID-0A1565A4-74E1-4171-968B-50529AABF192 v2
DEF time
selected
TROC
OR
MaxPhCurr
a STOC
a>b
b
StartCurr
X Inverse
Inverse
Voltage time
control or selected
restraint
feature
MinPh-PhVoltage
Figure 314: Simplified internal logic diagram for overcurrent function
DEF time
selected TRUV
MinPh-phVoltage a
b>a
b STUV
AND
StartVolt
Operation_UV=On
BLKUV
Figure 315: Simplified internal logic diagram for undervoltage function
9.14.7.5 Undervoltage protection GUID-96171DC7-9F8E-47B4-BE0D-E1B9EE214612 v5
The undervoltage step simply compares the magnitude of the lowest measured phase-phase
voltage quantity with the set start level. The undervoltage step starts if the magnitude of the
measured voltage quantity is lower than the set level.
The start signal starts a definite time delay. If the value of the start signal is logical TRUE for
longer than the set time delay, the undervoltage step sets its trip signal to logical TRUE.
This undervoltage functionality together with additional ACT logic can be used to provide
functionality for overcurrent protection with undervoltage seal-in.

Technical manual
Current protection

GUID-7EA9731A-8D56-4689-9072-D72D9CDFD795 v8
Table 347: VRPVOC technical data

Start overcurrent (2.0 - 5000.0)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio, overcurrent > 95% -

Operate time, start overcurrent at 0 to 2 x Min. = 15 ms -
Iset
Max. = 30 ms
Reset time, start overcurrent at 2 x Iset to Min. = 15 ms -
0
Max. = 30 ms
Operate time, start overcurrent at 0 to 10 Min. = 5 ms -
x Iset Max. = 20 ms
Reset time, start overcurrent at 10 x Iset to Min. = 20 ms -

0 Max. = 35 ms
Independent time delay to operate at 0 to (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

2 x Iset greater
Inverse time characteristics, 13 curve types See tables 1150 and 1151
see tables 1150 and 1151
Minimum operate time for inverse time (0.00 - 60.00) s ±0.2% or ±35 ms whichever is
characteristics greater
High voltage limit, voltage dependent (30.0 - 100.0)% of UBase ±1.0% of Ur
operation
Start undervoltage (2.0 - 100.0)% of UBase ±0.5% of Ur

Operate time start undervoltage at 2 x Min. = 15 ms -
Uset to 0
Max. = 30 ms
Reset time start undervoltage at 0 to 2 x Min. = 15 ms -
Uset
Max. = 30 ms
Independent time delay to operate, (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
undervoltage at 2 x Uset to 0 greater
Internal low voltage blocking (0.0 - 5.0)% of UBase ±0.25% of Ur
Overcurrent: -
Critical impulse time 10 ms typically at 0 to 2 x Iset
Impulse margin time 15 ms typically
Undervoltage: -
Critical impulse time 10ms typically at 2 x Uset to 0
Impulse margin time 15 ms typically

Technical manual
544
Voltage protection
Section 10 Voltage protection

10.1 Two step undervoltage protection UV2PTUV IP14544-1 v3
M16876-1 v7

Two step undervoltage protection UV2PTUV 27
3U<
V2 EN-US
SYMBOL-R-2U-GREATER-THAN
Undervoltages can occur in the power system during faults or abnormal conditions. The two-
step undervoltage protection function (UV2PTUV) can be used to open circuit breakers to
prepare for system restoration at power outages or as a long-time delayed back-up to the
primary protection.
UV2PTUV has two voltage steps, each with inverse or definite time delay.
It has a high reset ratio to allow settings close to the system service voltage.
UV2PTUV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
Figure 316: UV2PTUV function block

Technical manual
Voltage protection
10.1.4 Signals
Table 348: UV2PTUV Input signals

U3P GROUP - Three phase voltages
SIGNAL
BLKTR1 BOOLEAN 0 Block of operate signal, step 1
BLKST1 BOOLEAN 0 Block of step 1
Table 349: UV2PTUV Output signals

TRIP BOOLEAN Trip

Technical manual
Voltage protection
10.1.5 Settings
Table 350: UV2PTUV Group settings (basic)

On
OperationStep1 Off - - On Enable execution of step 1
On
Characterist1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A step 1
Inverse curve B
Prog. inv. curve
OpMode1 1 out of 3 - - 1 out of 3 Number of phases required for op (1
2 out of 3 of 3, 2 of 3, 3 of 3) from step 1
3 out of 3
U1< 1.0 - 100.0 %UB 0.1 70.0 Voltage setting/start val (DT & IDMT)
in % of UBase, step 1
t1 0.00 - 6000.00 s 0.01 5.00 Definitive time delay of step 1
curves for step 1
delay for step 1
IntBlkSel1 Off - - Off Internal (low level) blocking mode,
Block of trip step 1
Block all
IntBlkStVal1 1 - 50 %UB 1 20 Voltage setting for internal blocking in
% of UBase, step 1
tBlkUV1 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 1
HystAbs1 0.0 - 50.0 %UB 0.1 0.5 Absolute hysteresis in % of UBase,
step 1
On
Inverse curve B
Prog. inv. curve
3 out of 3
U2< 1.0 - 100.0 %UB 0.1 50.0 Voltage setting/start val (DT & IDMT)
curves for step 2
delay for step 2
IntBlkSel2 Off - - Off Internal (low level) blocking mode,
Block of trip step 2
Block all

Technical manual
Voltage protection

IntBlkStVal2 1 - 50 %UB 1 20 Voltage setting for internal blocking in
% of UBase, step 2
tBlkUV2 0.000 - 60.000 s 0.001 0.000 Time delay of internal (low level)
blocking for step 2
step 2
Table 351: UV2PTUV Group settings (advanced)

tReset1 0.000 - 60.000 s 0.001 0.025 Reset time delay used in IEC Definite
Time curve step 1
ResetTypeCrv1 Instantaneous - - Instantaneous Selection of used IDMT reset curve
Frozen timer type for step 1
Linearly
decreased
tIReset1 0.000 - 60.000 s 0.001 0.025 Time delay in IDMT reset (s), step 1
ACrv1 0.005 - 200.000 - 0.001 1.000 Parameter A for customer
BCrv1 0.50 - 100.00 - 0.01 1.00 Parameter B for customer
CCrv1 0.0 - 1.0 - 0.1 0.0 Parameter C for customer
DCrv1 0.000 - 60.000 - 0.001 0.000 Parameter D for customer
PCrv1 0.000 - 3.000 - 0.001 1.000 Parameter P for customer
CrvSat1 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 1
Time curve step 2
Linearly
decreased
CrvSat2 0 - 100 % 1 0 Tuning param for prog. under voltage
IDMT curve, step 2

Technical manual
Voltage protection
Table 352: UV2PTUV Non group settings (basic)

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh RMS
PhN RMS
PhPh DFT
Value groups

Table 353: UV2PTUV Monitored data

Two-step undervoltage protection (UV2PTUV) is used to detect low power system voltage. If
one, two or three phase voltages decrease below the set value, a corresponding START signal
is generated. The parameters OpMode1 and OpMode2 influence the requirements to activate
the START outputs: the measured voltages 1 out of 3, 2 out of 3, or 3 out of 3 have to be lower
than the corresponding set point to issue the corresponding START signal.
UV2PTUV has two voltage-measuring steps with separate time delays. If the voltage remains
below the set value for the chosen time delay, the corresponding trip signal is issued. To avoid
an unwanted trip due to the disconnection of the related high-voltage equipment, a voltage-
controlled blocking of the function is available: if the voltage is lower than the set blocking
level, the function is blocked and no START or TRIP signal is generated. The time delay
characteristic is individually chosen for each step and can be either definite time delay or
inverse time delay.
To avoid oscillations of the output START signal, a hysteresis has been included.
10.1.7.1 Measurement principle M15326-6 v7
Depending on the value of the ConnType parameter, UV2PTUV can be set to measure phase-
to-earth fundamental value, phase-to-phase fundamental value, phase-to-earth true RMS value
or phase-to-phase true RMS value, and compares it against the set values, U1< and U2<. The
voltage-related settings are made in percentage of the base voltage which is set in kV phase-
to-phase voltage. This means operation for phase-to-earth voltage under:
UBase(kV )
U (%) ·
3
and operation for phase-to-phase voltage under:

Technical manual
Voltage protection
U < (%) × UBase(kV)

When the phase-to-earth voltage measurement is selected, the function

automatically introduces division of the base value by the square root of three.
10.1.7.2 Time delay M15326-10 v12
The time delay for the two steps can be either definite time delay (DT) or inverse time delay
(IDMT). For the inverse time delay three different modes are available:
• inverse curve A
• inverse curve B
• customer programmable inverse curve
The type A curve is described as:
k
t=
æ Un < -U ö
ç ÷
è Un < ø
where:
Un< Set value for step 1 and step 2
U Measured voltage
The type B curve is described as:
k × 480
t= 2.0
+ 0.055
æ Un < - U ö
ç 32 × - 0.5 ÷
è Un < ø
The customer programmable curve can be created as:
é ù
ê ú
ê k×A ú
t=ê pú
+D
ê æ Un < - U ö ú
êçB × -C÷ ú
ëè Un < ø û
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Un< down to Un< · (1.0 – CrvSatn/100) the used

Technical manual
Voltage protection
voltage will be: Un< · (1.0 – CrvSatn/100). If the programmable curve is used this parameter
must be calculated so that:
CrvSatn
B× -C > 0
100
The lowest voltage is always used for the inverse time delay integration. The details of the
different inverse time characteristics are shown in section "Inverse characteristics".
Voltage
UL1
UL2
UL3
IDMT Voltage
Time
Figure 317: Voltage used for the inverse time characteristic integration
Trip signal issuing requires that the undervoltage condition continues for at least the user set
time delay. This time delay is set by the parameter t1 and t2 for definite time mode (DT) and by
some special voltage level dependent time curves for the inverse time mode (IDMT). If the start
condition, with respect to the measured voltage, ceases during the delay time, and is not
fulfilled again within a user-defined reset time (tReset1 and tReset2 for the definite time and
tIReset1 and tIReset2 pickup for the inverse time) the corresponding start output is reset.
After leaving the hysteresis area, the start condition must be fulfilled again and it is not
sufficient for the signal to only return back to the hysteresis area. For the undervoltage
function the IDMT reset time is constant and does not depend on the voltage fluctuations
during the drop-off period. However, there are three ways to reset the timer: the timer is reset
instantaneously, the timer value is frozen during the reset time, or the timer value is linearly
decreased during the reset time. See figure 318 and figure 319.

Technical manual
Voltage protection
tIReset1
Voltage Measured
START Voltage
HystAbs1
TRIP
U1<
Time
START
TRIP
Time
Integrator Frozen Timer
Time
Linearly
Instantaneous
decreased IEC05000010-5-en.vsdx
Figure 318: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at
different reset types

Technical manual
Voltage protection
tIReset1
Voltage
START
START
HystAbs1 Measured Voltage
TRIP
U1<
Time
START t
TRIP
Time
Time
Instantaneous Linearly decreased
IEC05000011-en-4.vsdx
Figure 319: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at
Definite timer delay
When definite time delay is selected the function will operate as shown in figure 320. Detailed
information about individual stage reset/operation behavior is shown in figure 321 and figure
322 respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time
delayed stage is ensured.

Technical manual
Voltage protection
ST1
U t1
a tReset1
TR1
t
a<b t
U1< R
b
AND
Figure 320: Logic diagram for step 1, DT operation
U1<
ST1
TR1
tReset1
t1
Figure 321: Example for Definite Time Delay stage1 reset
U1<
ST1
TR1
tReset1
t1
Figure 322: Example for Definite Time Delay stage1 operation

Technical manual
Voltage protection
10.1.7.3 Blocking M15326-20 v8
It is possible to block Two step undervoltage protection UV2PTUV partially or completely, by

binary input signals or by parameter settings, where:
BLOCK: blocks all outputs

BLKTR1: blocks all trip outputs of step 1
BLKST1: blocks all start and trip outputs related to step 1
If the measured voltage level decreases below the setting of IntBlkStVal1, either the trip output
of step 1, or both the trip and the START outputs of step 1, are blocked. The characteristic of
the blocking is set by the IntBlkSel1 parameter. This internal blocking can also be set to Off
resulting in no voltage based blocking. Corresponding settings and functionality are valid also
for step 2.
In case of disconnection of the high voltage component the measured voltage will get very
low. The event will START both the under voltage function and the blocking function, as seen in
figure 323. The delay of the blocking function must be set less than the time delay of under
voltage function.
U Disconnection
Normal voltage
U1<
U2<
tBlkUV1 <
t1,t1Min
IntBlkStVal1
tBlkUV2 <
t2,t2Min
IntBlkStVal2
Time
Block step 1
Block step 2
en05000466.vsd
Figure 323: Blocking function

Technical manual
Voltage protection
10.1.7.4 Design M15326-35 v9
The voltage measuring elements continuously measure the three phase-to-neutral voltages or
the three phase-to-phase voltages. Recursive fourier filters or true RMS filters of input voltage
signals are used. The voltages are individually compared to the set value, and the lowest
voltage is used for the inverse time characteristic integration. A special logic is included to
achieve the 1 out of 3, 2 out of 3 and 3 out of 3 criteria to fulfill the START condition. The design
of Two step undervoltage protection UV2PTUV is schematically shown in Figure 324.
UL1 Comparator ST1L1

UL1 < U1< Voltage Phase Phase 1
Selector
OpMode1 ST1L2
UL2 Comparator Phase 2
1 out of 3
UL2 < U1< 2 out of 3 ST1L3
3 out of 3 Phase 3 Start t1
UL3 Comparator t1Reset
UL3 < U1< IntBlkStVal1 &
OR ST1
Trip
Output
START Logic TR1L1
Step 1 TR1L2
Time integrator TRIP
MinVoltSelector tIReset1
ResetTypeCrv1 TR1L3
TR1
OR
Comparator ST2L1
UL1 < U2< Voltage Phase Phase 1
Selector
OpMode2 ST2L2
Comparator Phase 2
UL2 < U2< 1 out of 3
2 out of 3 Start t2 ST2L3
3 out of 3 Phase 3 t2Reset
Comparator IntBlkStVal2 &
UL3 < U2< Trip ST2
Output OR
Logic
START TR2L1
Step 2
TR2L2
Time integrator TRIP
MinVoltSelector tIReset2
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
Figure 324: Schematic design of Two step undervoltage protection UV2PTUV

Technical manual
Voltage protection
M13290-1 v15
Table 354: UV2PTUV technical data

Operate voltage, low and high step (1.0–100.0)% of UBase ±0.5% of Ur
Absolute hysteresis (0.0–50.0)% of UBase ±0.5% of Ur
Internal blocking level, step 1 and step (1–50)% of UBase ±0.5% of Ur

2
Inverse time characteristics for step 1 - See table 1159
and step 2, see table 1159
Definite time delay, step 1 at 1.2 x Uset (0.00-6000.00) s ±0.2% or ±40ms whichever is
to 0 greater
Definite time delay, step 2 at 1.2 x Uset (0.000-60.000) s ±0.2% or ±40ms whichever is
to 0 greater
Minimum operate time, inverse (0.000–60.000) s ±0.5% or ±40ms whichever is

Operate time, start at 2 x Uset to 0 Min. = 15 ms -
Max. = 30 ms
Reset time, start at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Operate time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Reset time, start at 0 to 1.2 x Uset Min. = 15 ms -
Max. = 35 ms
Critical impulse time 5 ms typically at 1.2 x Uset to -
0
10.2 Two step overvoltage protection OV2PTOV IP14545-1 v3
M17002-1 v8

Two step overvoltage protection OV2PTOV 59
3U>
SYMBOL-C-2U-SMALLER-THAN V2 EN-US
10.2.2 Functionality OV2PTOV M13798-3 v16
Overvoltages may occur in the power system during abnormal conditions such as sudden
power loss, tap changer regulating failures, and open line ends on long lines.
Two step overvoltage protection (OV2PTOV) function can be used to detect open line ends,
normally then combined with a directional reactive over-power function to supervise the

Technical manual
Voltage protection
system voltage. When triggered, the function will cause an alarm, switch in reactors, or switch
out capacitor banks.
OV2PTOV has two voltage steps, each of them with inverse or definite time delayed.
OV2PTOV has a high reset ratio to allow settings close to system service voltage.
OV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR1L1
BLKST1 TR1L2
BLKTR2 TR1L3
BLKST2 TR2
TR2L1
TR2L2
TR2L3
START
ST1
ST1L1
ST1L2
ST1L3
ST2
ST2L1
ST2L2
ST2L3
Figure 325: OV2PTOV function block
10.2.4 Signals
Table 355: OV2PTOV Input signals

U3P GROUP - Group signal for three phase voltage input
SIGNAL
Table 356: OV2PTOV Output signals

TRIP BOOLEAN Trip

Technical manual
Voltage protection

10.2.5 Settings
Table 357: OV2PTOV Group settings (basic)

On
On
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
U1> 1.0 - 200.0 %UB 0.1 120.0 Voltage setting/start val (DT & IDMT)
curves for step 1
delay for step 1
step 1
On
Inverse curve B
Inverse curve C
Prog. inv. curve
3 out of 3
U2> 1.0 - 200.0 %UB 0.1 150.0 Voltage setting/start val (DT & IDMT)

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Voltage protection

curves for step 2
delay for step 2
step 2
Table 358: OV2PTOV Group settings (advanced)

Time curve step 1
Linearly
decreased
CrvSat1 0 - 100 % 1 0 Tuning param for prog. over voltage
IDMT curve, step 1
Time curve step 2
Linearly
decreased
IDMT curve, step 2

Technical manual
Voltage protection
Table 359: OV2PTOV Non group settings (basic)

ConnType PhN DFT - - PhN DFT Group selector for connection type
PhPh DFT
PhN RMS
PhPh RMS
Value groups

Table 360: OV2PTOV Monitored data

Two step overvoltage protection OV2PTOV is used to detect high power system voltage.
OV2PTOV has two steps with separate time delays. If one-, two- or three-phase voltages
increase above the set value, a corresponding START signal is issued. OV2PTOV can be set to
START/TRIP, based on 1 out of 3, 2 out of 3 or 3 out of 3 of the measured voltages, being above
the set point. If the voltage remains above the set value for a time period corresponding to the
chosen time delay, the corresponding trip signal is issued.
The time delay characteristic is individually chosen for the two steps, and can be either
definite time or inverse time delayed.
The voltage related settings are made in percent of the global set base voltage UBase, which is
set in kV, phase-to-phase.
OV2PTOV can be set to measure phase-to-earth fundamental value, phase-to-phase

fundamental value, phase-to-earth RMS value or phase-to-phase RMS value. The choice of
measuring is done by the parameter ConnType.
The setting of the analog inputs are given as primary phase-to-earth or phase-to-phase
voltage. OV2PTOV will operate if the voltage gets higher than the set percentage of the set
base voltage UBase. This means operation for phase-to-earth voltage over:
U > (%) × UBase( kV )

3
and operation for phase-to-phase voltage over:
U > (%) × UBase(kV)


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Voltage protection
When phase-to-earth voltage measurement is selected the function

automatically introduces division of the base value by the square root of three.
All the three voltages are measured continuously, and compared with the set values, U1> for
Step 1 and U2> for Step 2. The parameters OpMode1 and OpMode2 influence the requirements
to activate the START outputs. Either 1 out of 3, 2 out of 3 or 3 out of 3 measured voltages have
to be higher than the corresponding set point to issue the corresponding START signal.
To avoid oscillations of the output START signal, a hysteresis is included.
10.2.7.2 Time delay M15330-10 v11
(IDMT). For the inverse time delay four different modes are available:
• inverse curve A
• inverse curve B
• inverse curve C
k
t=
æ U - Un > ö
ç ÷
è Un > ø
where:
Un> Set value for step 1 and step 2
U Measured voltage
k  480
t 2.0
 0.035
 U  Un  
 32   0.5 
 Un  
The type C curve is described as:
k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U n > ø

Technical manual
Voltage protection
The customer programmable curve is defined by the below equation, where A, B, C, D, k and p
are settings:
k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
When the denominator in the expression is equal to zero the time delay will be infinity. There
will be an undesired discontinuity. Therefore, a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used
voltage will be: Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter
CrvSatn
B× -C > 0
100
The highest phase (or phase-to-phase) voltage is always used for the inverse time delay
integration, see figure 326. The details of the different inverse time characteristics are shown
in section "Inverse characteristics".
Voltage
IDMT Voltage
UL1
UL2
UL3
Time
Figure 326: Voltage used for the inverse time characteristic integration
Operation of the trip signal requires that the overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode
(DT) and by selected voltage level dependent time curves for the inverse time mode (IDMT). If
the START condition, with respect to the measured voltage ceases during the delay time, and
is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time
and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after
that the defined reset time has elapsed. Here it should be noted that after leaving the
hysteresis area, the START condition must be fulfilled again and it is not sufficient for the
signal to only return back to the hysteresis area. The hysteresis value for each step is settable
HystAbsn (where n means either 1 or 2 respectively) to allow a high and accurate reset of the
function. For OV2PTOV the IDMT reset time is constant and does not depend on the voltage
fluctuations during the drop-off period. However, there are three ways to reset the timer:

Technical manual
Voltage protection
either the timer is reset instantaneously, or the timer value is frozen during the reset time, or
the timer value is linearly decreased during the reset time.
tIReset1
Voltage
START
TRIP
U1>
HystAbs1 Measured
Voltage
Time
START t
TRIP
Time
Integrator Linearly decreased
Frozen Timer
t
Instantaneous Time
Figure 327: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay at

Technical manual
Voltage protection
tIReset1
Voltage
START TRIP
START HystAbs1
U1>
Measured
Voltage
Time
START t
TRIP
Time
Time
Linearly
Instantaneous decreased
Figure 328: Voltage profile causing a reset of the START signal for step 1, and inverse time delay at
Definite time delay
When definite time delay is selected, the function will operate as shown in figure 329. Detailed
331 respectively. Note that by setting tResetn = 0.0s (where n means either 1 or 2 respectively),
instantaneous reset of the definite time delayed stage is ensured.

Technical manual
Voltage protection
ST1
U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay
Figure 329: Logic diagram for step 1, definite time delay, DT operation
U1>
START
TRIP
tReset1
t1
Figure 330: Example for step 1, Definite Time Delay stage 1 reset
U1>
START
TRIP
tReset1
t1
Figure 331: Example for Definite Time Delay stage 1 operation

Technical manual
Voltage protection
10.2.7.3 Blocking M15330-20 v8
It is possible to block Two step overvoltage protection OV2PTOV partially or completely, by

binary input signals where:

10.2.7.4 Design M15330-34 v8
The voltage measuring elements continuously measure the three phase-to-earth voltages or
the three phase-to-phase voltages. Recursive Fourier filters or true RMS filters of input voltage
signals are used. The phase voltages are individually compared to the set value, and the
highest voltage is used for the inverse time characteristic integration. A special logic is
included to achieve the 1 out of 3, 2 out of 3 or 3 out of 3 criteria to fulfill the START condition.
The design of Two step overvoltage protection (OV2PTOV) is schematically described in
figure 332.

Technical manual
Voltage protection
UL1 Comparator ST1L1

UL1 > U1> Phase 1
Voltage Phase
Selector ST1L2
UL2 Comparator OpMode1 Phase 2
UL2 > U1> 1 out of 3
Start ST1L3
2 out of 3
3 out of 3 Phase 3 t1
UL3 Comparator t1Reset
UL3 > U1> & ST1
OR
Trip
START Output TR1L1
Logic
Time integrator Step 1 TR1L2

TRIP
MaxVoltSelect tIreset1
ResetTypeCrv1 TR1L3
OR TR1
Comparator ST2L1
UL1 > U2> Phase 1
Voltage Phase
Selector ST2L2
Comparator OpMode2 Phase 2
UL2 > U2> 1 out of 3
Start ST2L3
2 out of 3
Phase 3 t2
3 out of 3
Comparator t2Reset
UL3 > U2> & ST2
OR
Trip
START Output TR2L1
Logic
Time integrator Step 2 TR2L2

MaxVoltSelect tIreset2 TRIP
ResetTypeCrv2 TR2L3
TR2
OR
START
OR
TRIP
OR
IEC05000013-WMF V2 EN-US
Figure 332: Schematic design of Two step overvoltage protection OV2PTOV
M13304-1 v14
Table 361: OV2PTOV technical data

Operate voltage, step 1 and 2 (1.0-200.0)% of UBase ±0.5% of Ur at U ≤ Ur
±0.5% of U at U > Ur
Absolute hysteresis (0.0–50.0)% of UBase ±0.5% of Ur at U ≤ Ur

Inverse time characteristics for steps 1 - See table 1158

and 2, see table 1158
Definite time delay, low step (step 1) at (0.00 - 6000.00) s ±0.2% or ±45 ms whichever is
0 to 1.2 x Uset greater
Definite time delay, high step (step 2) at (0.000-60.000) s ±0.2% or ±45 ms whichever is

Technical manual
Voltage protection

Minimum operate time, Inverse (0.000-60.000) s ±0.2% or ±45 ms whichever is
Operate time, start at 0 to 2 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time, start at 2 x Uset to 0 Min. = 15 ms -
Max. = 30 ms
Operate time, start at 0 to 1.2 x Uset Min. = 20 ms -
Max. = 35 ms
Reset time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x -
Uset
10.3 Two step residual overvoltage protection ROV2PTOV IP14546-1 v4
SEMOD54295-2 v6

Two step residual overvoltage ROV2PTOV 59N
protection
2(U0>)
Residual voltages may occur in the power system during earth faults.
Two step residual overvoltage protection (ROV2PTOV) function calculates the residual voltage
from the three-phase voltage input transformers or measures it from a single voltage input
transformer fed from an open delta or neutral point voltage transformer.
ROV2PTOV has two voltage steps, each with inverse or definite time delay.
A reset delay ensures operation for intermittent earth faults.
ROV2PTOV
U3P* TRIP
BLOCK TR1
BLKTR1 TR2
BLKST1 START
BLKTR2 ST1
BLKST2 ST2
Figure 333: ROV2PTOV function block

Technical manual
Voltage protection
10.3.4 Signals
Table 362: ROV2PTOV Input signals

U3P GROUP - Three phase voltages
SIGNAL
Table 363: ROV2PTOV Output signals

TRIP BOOLEAN Trip
10.3.5 Settings
Table 364: ROV2PTOV Group settings (basic)

On
On
Inverse curve B
Inverse curve C
Prog. inv. curve
U1> 1.0 - 200.0 %UB 0.1 30.0 Voltage setting/start val (DT & IDMT),
step 1 in % of UBase
curves for step 1
delay for step 1
step 1
On

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Voltage protection

Inverse curve B
Inverse curve C
Prog. inv. curve
U2> 1.0 - 100.0 %UB 0.1 45.0 Voltage setting/start val (DT & IDMT),
step 2 in % of UBase
curves for step 2
delay for step 2
step 2
Table 365: ROV2PTOV Group settings (advanced)

Time curve step 1
Linearly
decreased
IDMT curve, step 1
tReset2 0.000 - 60.000 s 0.001 0.025 Time delay in DT reset (s), step 2
Linearly
decreased

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Voltage protection

IDMT curve, step 2
Table 366: ROV2PTOV Non group settings (basic)

Value groups

Table 367: ROV2PTOV Monitored data

ULevel REAL - kV Magnitude of measured voltage
Two step residual overvoltage protection ROV2PTOV is used to detect a high residual voltage.
The residual voltage can be measured directly from a voltage transformer in the neutral of a
power transformer or from a three-phase voltage transformer, where the secondary windings
are connected in an open delta. Another possibility is to measure the three phase-to-earth
voltages, and calculate the corresponding residual voltage internally in the IED. ROV2PTOV has
two steps with separate time delays. If the residual voltage remains above the set value for a
time period corresponding to the chosen time delay, the corresponding TRIP signal is issued.
The time delay characteristic is individually chosen for the two steps and can be either definite
time delay or inverse time delay.
The voltage-related settings are made in percent of the base voltage, which is set in kV, phase-
phase. The set UBase value is divided by sqrt(3) before the set value is calculated.
The residual voltage is measured continuously, and compared with the set values, U1> and
U2>.
To avoid oscillations of the output START signal, a settable hysteresis has been included.
10.3.7.2 Time delay M15331-10 v11
(IDMT). For the inverse time delay four different modes are available:

Technical manual
Voltage protection
• inverse curve A
• inverse curve B
• inverse curve C
k
t=
æ U - Un > ö
ç ÷
è Un > ø
where:
Un> Set value for step 1 and step 2
U Measured voltage
k  480
t 2.0
 0.035
 U  Un  
 32   0.5 
 U n  
The type C curve is described as:
k × 480
t= 3.0
+ 0.035
æ U - Un > ö
ç 32 × - 0.5 ÷
è U> ø
The customer programmable curve can be created as:
k×A
t= p
+D
æ U -Un > ö
çB× -C÷
è Un > ø
When the denominator in the expression is equal to zero, the time delay will be infinite. There
will be an undesired discontinuity. Therefore a tuning parameter CrvSatn is set to compensate
for this phenomenon. In the voltage interval Un> up to Un> · (1.0 + CrvSatn/100) the used
voltage will be: Un> · (1.0 + CrvSatn/100). If the programmable curve is used this parameter
CrvSatn
B× -C > 0
100

Technical manual
Voltage protection
The details of the different inverse time characteristics are shown in section "Inverse
characteristics".
TRIP signal issuing requires that the residual overvoltage condition continues for at least the
user set time delay. This time delay is set by the parameter t1 and t2 for definite time mode
(DT) and by some special voltage level dependent time curves for the inverse time mode
(IDMT).
If the START condition, with respect to the measured voltage ceases during the delay time, and
is not fulfilled again within a user defined reset time (tReset1 and tReset2 for the definite time
and tIReset1 and tIReset2 for the inverse time) the corresponding START output is reset, after
the defined reset time has elapsed.
Here it should be noted that after leaving the hysteresis area, the START condition must be
fulfilled again and it is not sufficient for the signal to only return back to the hysteresis area.
Also, notice that for the overvoltage function, IDMT reset time is constant and does not
depend on the voltage fluctuations during the drop-off period.
There are three ways to reset the timer: the timer is reset instantaneously, the timer value is
frozen during the reset time, or the timer value is linearly decreased during the reset time. See
figure 334 and figure 335.

Technical manual
Voltage protection
tIReset1
Voltage
START
TRIP
U1>
HystAbs1 Measured
Voltage
Time
START t
TRIP
Time
Integrator Linearly decreased
Frozen Timer
t
Instantaneous Time
Figure 334: Voltage profile not causing a reset of the START signal for step 1, and inverse time delay

Technical manual
Voltage protection
tIReset1
Voltage
START TRIP
START HystAbs1
U1>
Measured
Voltage
Time
START t
TRIP
Time
Time
Linearly
Instantaneous decreased
Figure 335: Voltage profile causing a reset of the START signal for step 1, and inverse time delay
Definite time delay
When definite time delay is selected, the function will operate as shown in figure 336. Detailed
338 respectively. Note that by setting tResetn = 0.0s, instantaneous reset of the definite time
delayed stage is ensured.

Technical manual
Voltage protection
ST1
U tReset1 t1
a
a>b t t
TR1
U1>
b AND
OFF ON
Delay Delay
Figure 336: Logic diagram for step 1, Definite time delay, DT operation
U1<
ST1
TR1
tReset1
t1
Figure 337: Example for Definite Time Delay stage 1 reset
U1<
ST1
TR1
tReset1
t1
Figure 338: Example for Definite Time Delay stage 1 operation

Technical manual
Voltage protection
10.3.7.3 Blocking M15331-18 v7
It is possible to block two step residual overvoltage protection ROV2PTOV partially or

completely by binary input signals where:

BLKST2: blocks all start and trip inputs related to step 2
10.3.7.4 Design M15331-32 v7
The voltage measuring elements continuously measure the residual voltage. Recursive Fourier
filters filter the input voltage signal for the rated frequency. The residual voltage is compared
to the set value, and is also used for the inverse time characteristic integration. The design of
the function is schematically described in figure 339.
UN Comparator Phase 1 ST1

UN > U1>
Start TR1
START t1
tReset1
&
Trip
Time integrator Output
tIReset1 TRIP
Logic
ResetTypeCrv1
Step 1
ST2
Comparator Phase 1
UN > U2> TR2
Start
t2
START tReset2
& START
Trip OR
Time integrator Output
TRIP Logic
tIReset2
ResetTypeCrv2 TRIP
Step 2 OR
Figure 339: Schematic design of Two step residual overvoltage protection ROV2PTOV

Technical manual
Voltage protection

M13317-2 v14
Table 368: ROV2PTOV technical data

Operate voltage, step 1 - step 2 (1.0-200.0)% of UBase ± 0.5% of Ur at U ≤ Ur
± 0.5% of U at U > Ur
Absolute hysteresis (0.0–50.0)% of UBase ± 0.5% of Ur at U ≤ Ur

± 0.5% of U at U > Ur
Inverse time characteristics for low - See table 1160

and high step, see table 1160
Definite time delay low step (step 1) at (0.00–6000.00) s ± 0.2% or ± 45 ms whichever is
Definite time delay high step (step 2) (0.000–60.000) s ± 0.2% or ± 45 ms whichever is

at 0 to 1.2 x Uset greater
Minimum operate time (0.000-60.000) s ± 0.2% or ± 45 ms whichever is

greater
Max. = 30 ms
Max. = 30 ms
Operate time, start at 0 to 1.2 x Uset Min. = 20 ms -
Max. = 35 ms
Reset time, start at 1.2 x Uset to 0 Min. = 5 ms -
Max. = 25 ms
Critical impulse time 10 ms typically at 0 to 2 x Uset -
10.4 Overexcitation protection OEXPVPH IP14547-1 v3
M14867-1 v3

Overexcitation protection OEXPVPH 24
U/f >
SYMBOL-Q V1 EN-US
When the laminated core of a power transformer or generator is subjected to a magnetic flux
density beyond its design limits, stray flux will flow into non-laminated components that are
not designed to carry flux. This will cause eddy currents to flow. These eddy currents can cause
excessive heating and severe damage to insulation and adjacent parts in a relatively short
time. The function has settable inverse operating curves and independent alarm stages.

Technical manual
Voltage protection
OEXPVPH
I3P* TRIP
U3P* START
BLOCK ALARM
RESET
Figure 340: OEXPVPH function block
10.4.4 Signals
Table 369: OEXPVPH Input signals

I3P GROUP - Current connection
SIGNAL
U3P GROUP - Voltage connection
SIGNAL
RESET BOOLEAN 0 Reset operation
Table 370: OEXPVPH Output signals

TRIP BOOLEAN Trip from overexcitation function
START BOOLEAN Overexcitation above set operate level (instantaneous)
ALARM BOOLEAN Overexcitation above set alarm level (delayed)
10.4.5 Settings
Table 371: OEXPVPH Group settings (basic)

On
V/Hz> 100.0 - 180.0 %UB/f 0.1 110.0 Operate level of V/Hz at no load and
rated freq in % of (UBase/frated)
V/Hz>> 100.0 - 200.0 %UB/f 0.1 140.0 High level of V/Hz above which tMin is
used, in % of (UBase/frated)
XLeak 0.000 - 200.000 Ohm 0.001 0.000 Winding leakage reactance in primary
ohms
TrPulse 0.000 - 60.000 s 0.001 0.100 Length of the pulse for trip signal (in
sec)
tMin 0.000 - 60.000 s 0.001 7.000 Minimum trip delay for V/Hz inverse
curve, in sec
tMax 0.00 - 9000.00 s 0.01 1800.00 Maximum trip delay for V/Hz inverse
curve, in sec

Technical manual
Voltage protection

tCooling 0.10 - 9000.00 s 0.01 1200.00 Transformer magnetic core cooling
time constant, in sec
CurveType IEEE - - IEEE Inverse time curve selection, IEEE/
Tailor made Tailor made
kForIEEE 1 - 60 - 1 1 Time multiplier for IEEE inverse type
curve
AlarmLevel 50.0 - 120.0 % 0.1 100.0 Alarm operate level as % of operate
level
tAlarm 0.00 - 9000.00 s 0.01 5.00 Alarm time delay, in sec
Table 372: OEXPVPH Group settings (advanced)

t1Tailor 0.00 - 9000.00 s 0.01 7200.00 Time delay t1 (longest) for tailor made
curve, in sec
t2Tailor 0.00 - 9000.00 s 0.01 3600.00 Time delay t2 for tailor made curve, in
sec
sec
sec
sec
t6Tailor 0.00 - 9000.00 s 0.01 225.00 Time delay t6 (shortest) for tailor
made curve, in sec
Table 373: OEXPVPH Non group settings (basic)

MeasuredU PosSeq - - L1L2 Selection of measured voltage
L1L2
L2L3
L3L1
MeasuredI L1L2 - - L1L2 Selection of measured current
L2L3
L3L1
PosSeq
Value groups

Table 374: OEXPVPH Monitored data

TMTOTRIP REAL - s Calculated time to trip for
overexcitation, in sec
VPERHZ REAL - V/Hz Voltage to frequency ratio in per-unit
THERMSTA REAL - % Overexcitation thermal status in % of
trip level

Technical manual
Voltage protection

M5854-3 v8
The importance of Overexcitation protection (OEXPVPH) function is growing as the power
transformers as well as other power system elements today operate near their designated
limits most of the time.
Modern design transformers are more sensitive to overexcitation than earlier types. This is a
result of the more efficient designs and designs which rely on the improvement in the
uniformity of the excitation level of modern systems. If an emergency that causes
overexcitation does occur, transformers may be damaged unless corrective action is taken.
Transformer manufacturers recommend an overexcitation protection as a part of the
transformer protection system.
Overexcitation results from excessive applied voltage, possibly in combination with below-
normal frequency. Such conditions may occur when a transformer unit is loaded, but are more
likely to arise when the transformer is unloaded, or when loss of load occurs. Transformers
directly connected to generators are in particular danger to experience overexcitation
conditions. It follows from the fundamental transformer equation, see equation 161, that the
peak flux density Bmax is directly proportional to induced voltage E, and inversely proportional
to frequency f and turns n.
E = 4.44 × f × n × Bmax× A
The relative excitation M is therefore according to equation 162.
E f
M ( p.u.) =
( Ur ) ( fr )
Disproportional variations in quantities E and f may give rise to core overfluxing. If the core
flux density Bmax increases to a point above saturation level (typically 1.9 Tesla), the flux will
no longer be contained within the core, but will extend into other (non-laminated) parts of the
power transformer and give rise to eddy current circulations.
Overexcitation will result in:
• overheating of the non-laminated metal parts

• a large increase in magnetizing currents
• an increase in core and winding temperature
• an increase in transformer vibration and noise
Protection against overexcitation is based on calculation of the relative volt per hertz (V/Hz)
ratio. Protection initiates a reduction of excitation, and if this fails, or if this is not possible,
the TRIP signal will disconnect the transformer from the source after a delay ranging from
seconds to minutes, typically 5-10 seconds.
Overexcitation protection may be of particular concern on directly connected generator unit

transformers. Directly connected generator-transformers are subjected to a wide range of
frequencies during the acceleration and deceleration of the turbine. In such cases, OEXPVPH
(24) may trip the field breaker during a start-up of a machine, by means of the overexcitation
ALARM signal. If this is not possible, the power transformer can be disconnected from the
source, after a delay, by the TRIP signal.
The IEC 60076 - 1 standard requires that transformers operate continuously at not more than
10% above rated voltage at no load, and rated frequency. At no load, the ratio of the actual

Technical manual
Voltage protection
generator terminal voltage to the actual frequency should not exceed 1.1 times the ratio of
transformer rated voltage to the rated frequency on a sustained basis, see equation 163.
E
---- £ 1.1 × Ur
------
f fr
or equivalently, with 1.1 · Ur = V/Hz> according to equation 164.
E V Hz >
£
f fr
where:
V/Hz> is the maximum continuously allowed voltage at no load, and rated frequency.
V/Hz> is a setting parameter. The setting range is 100% to 180%. If the user does not know
exactly what to set, then the default value for V/Hz> = 110 % given by the IEC 60076-1 standard
shall be used.
In OEXPVPH, the relative excitation M is expressed according to equation 165.
E f
M ( p.u.) =
Ur fr
It is clear from the above formula that, for an unloaded power transformer, M = 1 for any E and
f, where the ratio E/f is equal to Ur/fr. A power transformer is not overexcited as long as the
relative excitation is M ≤ V/Hz>, V/Hz> expressed in % of Ur/fr.
The overexcitation protection algorithm is fed with an input voltage U which is in general not
the induced voltage E from the fundamental transformer equation. For no load condition,
these two voltages are the same, but for a loaded power transformer the internally induced
voltage E may be lower or higher than the voltage U which is measured and fed to OEXPVPH ,
depending on the direction of the power flow through the power transformer, the power
transformer side where OEXPVPH is applied, and the power transformer leakage reactance of
the winding. It is important to specify in the application configuration on which side of the
power transformer OEXPVPH is placed.
As an example, at a transformer with a 15% short circuit impedance Xsc, the full load, 0.8
power factor, 105% voltage on the load side, the actual flux level in the transformer core, will
not be significantly different from that at the 110% voltage, no load, rated frequency, provided
that the short circuit impedance X can be equally divided between the primary and the
secondary winding: Xleak = Xleak1 = Xleak2 = Xsc / 2 = 0.075 pu.
OEXPVPH calculates the internal induced voltage E if Xleak (meaning the leakage reactance of
the winding where OEXPVPH is connected) is known to the user. The assumption taken for
two-winding power transformers that Xleak = Xsc / 2 is unfortunately most often not true. For
a two-winding power transformer the leakage reactances of the two windings depend on how
the windings are located on the core with respect to each other. In the case of three-winding
power transformers the situation is still more complex. If a user has the knowledge on the
leakage reactance, then it should applied. If a user has no idea about it, Xleak can be set to

Technical manual
Voltage protection
Xc/2. OEXPVPH protection will then take the given measured voltage U, as the induced voltage
E.
It is assumed that overexcitation is a symmetrical phenomenon, caused by events such as loss-

of-load, etc. A high phase-to-earth voltage does not mean overexcitation. For example, in an
unearthed power system, a single phase-to-earth fault means high voltages of the “healthy”
two phases-to-earth, but no overexcitation on any winding. The phase-to-phase voltages will
remain essentially unchanged. The important voltage is the voltage between the two ends of
each winding.
10.4.7.1 Measured voltage M5854-39 v8
If one phase-to-phase voltage is available from the side where overexcitation protection is
applied, then Overexcitation protection OEXPVPH shall be set to measure this voltage,
MeasuredU. The particular voltage which is used determines the two currents that must be
used. This must be chosen with the setting MeasuredI.
It is extremely important that MeasuredU and MeasuredI are set to same value.
If, for example, voltage UL1L2 is fed to OEXPVPH, then currents IL1, and IL2 must be applied.
From these two input currents, current IL1L2 = IL1 - IL2 is calculated internally by the OEXPVPH
algorithm. The phase-to-phase voltage must be higher than 70% of the rated value, otherwise
the protection algorithm exits without calculating the excitation. ERROR output is set to 1, and
the displayed value of relative excitation V/Hz shows 0.000.
If three phase-to-earth voltages are available from the side where overexcitation is connected,
then OEXPVPH shall be set to measure positive sequence voltage and current. In this case the
positive sequence voltage and the positive sequence current are used by OEXPVPH. A check is
made if the positive sequence voltage is higher than 70% of rated phase-to-earth voltage,
when below this value, OEXPVPH exits immediately, and no excitation is calculated. ERROR
output is set to 1, and the displayed value of relative excitation V/Hz shows 0.000.
• OEXPVPH can be connected to any power transformer side, independent from the power
flow.
• The side with a possible load tap changer must not be used.
10.4.7.2 Operate time of the overexcitation protection M5854-52 v8
The operate time of OEXPVPH is a function of the relative overexcitation.
Basically there are two different delay laws available to choose between:
• the so called IEEE law, and

• a tailor-made law.
The so called IEEE law approximates a square law and has been chosen based on analysis of
the various transformers’ overexcitation capability characteristics. They can match the
transformer core capability well.
The square law is according to equation 166.

Technical manual
Voltage protection
0.18 × k 0.18 × k
top = 2
= 2
æ M ö overexcitation
ç V Hz> - 1 ÷
è ø
where:
M the relative excitation
V/Hz> is maximum continuously allowed voltage at no load, and rated frequency, in pu and
k is time multiplier for inverse time functions, see figure 342.
Parameter k (“time multiplier setting”) selects one delay curve from the family of curves.
The relative excitation M is calculated using equation167
æ Umeasured ö
ç ÷ Umeasured frated
=è
fmeasured ø
M = ×
æ UBase ö UBase fmeasured
ç ÷
è frated ø
An analog overexcitation relay would have to evaluate the following integral expression, which
means to look for the instant of time t = top according to equation 168.
top
ò (M (t) - V Hz > ) dt ³ 0.18 × k

2
A digital, numerical relay will instead look for the lowest j (that is, j = n) where it becomes true
that:
n
2
Dt × å ( M(j) – V/Hz> ) ³ 0.18 × k
j=k
where:
Dt is the time interval between two successive executions of OEXPVPH and
M(j) - V/Hz> is the relative excitation at (time j) in excess of the normal (rated) excitation which is given as
Ur/fr.
As long as M > V/Hz> (that is, overexcitation condition), the above sum can only be larger with
time, and if the overexcitation persists, the protected transformer will be tripped at j = n.
Inverse delays as per figure 342, can be modified (limited) by two special definite delay
settings, namely tMax and tMin, see figure 341.

Technical manual
Voltage protection
delay in s
tMax
under - inverse delay law

excitation
overexcitation
tMin
0 Mmax - V/Hz> Overexcitation M-V/Hz>
M=V/Hz> Mmax Excitation M
V/Hz> Emax E (only if f = fr = const)
99001067.vsd
Figure 341: Restrictions imposed on inverse delays by tMax and tMin

A definite maximum time, tMax, can be used to limit the operate time at low degrees of
overexcitation. Inverse delays longer than tMax will not be allowed. In case the inverse delay is
longer than tMax, OEXPVPH trips after tMax seconds.
A definite minimum time, tMin, can be used to limit the operate time at high degrees of
overexcitation. In case the inverse delay is shorter than tMin, OEXPVPH function trips after
tMin seconds. The inverse delay law is not valid for values exceeding Mmax. The delay will be
tMin, irrespective of the overexcitation level, when values exceed Mmax (that is, M>V/Hz>).

Technical manual
Voltage protection
Time (s) IEEE OVEREXCITATION CURVES
1000
100
k = 60
k = 20
k = 10
10 k=9
k=8
k=7
k=6
k=5
k=4
k=3
k=2
k=1
1
1 2 3 4 5 10 20 30 40
OVEREXCITATION IN % (M-Emaxcont)*100)
en01000373.vsd
Figure 342: Delays inversely proportional to the square of the overexcitation

The critical value of excitation M is determined indirectly via OEXPVPH setting V/Hz>>. V/Hz>>
can be thought of as a no-load voltage at rated frequency, where the inverse law should be
replaced by a short definite delay, tMin. If, for example, V/Hz>> = 140 %, then M is according to
equation 170.
(V Hz>> ) / f
M= = 1.40
Ur/fr
The Tailor-Made law allows a user to design an arbitrary delay characteristic. In this case the
interval between M = V/Hz>, and M = Mmax is automatically divided into five equal
subintervals, with six delays. (settings t1, t2, t3, t4, t5 and t6) as shown in figure 343. These
times should be set so that t1 => t2 => t3 => t4 => t5 => t6.
The lower V/Hz limit is always the set value V/Hz> in %.
The upper V/Hz limit for the Tailor-Made characteristic is always the greater value among the
following two values in %:
• 1.10 x V/Hz>
• V/Hz>>

Technical manual
Voltage protection
The reason is to prevent the loss of accuracy of the Tailor-Made characteristic when small set
value for V/Hz>> is used.
delay in s
tMax
under- tMin
excitation Overexcitation M-Emaxcont
0 Mmax - Emaxcont Excitation M
Emaxcont Mmax
99001068.vsd
Figure 343: An example of a Tailor-Made delay characteristic

Delays between two consecutive points, for example t3 and t4, are obtained by linear
interpolation.
Should it happen that tMax be lower than, for example, delays t1, and t2, the actual delay would
be tMax. Above Mmax, the delay can only be tMin.
10.4.7.3 Cooling M5854-92 v6
Overexcitation protection OEXPVPH is basically a thermal protection; therefore a cooling

process has been introduced. Exponential cooling process is applied. Parameter Setting tool is
an OEXPVPH setting, with a default time constant tCooling of 20 minutes. This means that if
the voltage and frequency return to their previous normal values (no more overexcitation), the
normal temperature is assumed to be reached not before approximately 5 times tCooling
minutes. If an overexcitation condition would return before that, the time to trip will be
shorter than it would be otherwise.
10.4.7.4 Overexcitation protection function measurands M5854-95 v8
A monitored data value, TMTOTRIP, is available on the local HMI and in PCM600. This value is
an estimation of the remaining time to trip (in seconds), if the overexcitation remained on the
level it had when the estimation was done. This information can be useful during small or
moderate overexcitation situations.
If the overexcitation is so low that the valid delay is tMax, then the estimation of the remaining
time to trip is done against tMax.
The relative excitation M, shown on the local HMI and in PCM600 has a monitored data value
VPERHZ and is calculated from the expression:
E f
M ( p.u.) =
Ur fr
If VPERHZ value is less than setting V/Hz> (in %), the power transformer is underexcited. If
VPERHZ is equal to V/Hz> (in %), the excitation is exactly equal to the power transformer
continuous capability. If VPERHZ is higher than V/Hz>, the protected power transformer is
overexcited. For example, if VPERHZ = 1.100, while V/Hz> = 110 %, then the power transformer
is exactly on its maximum continuous excitation limit.

Technical manual
Voltage protection
The monitored data value THERMSTA shows the thermal status of the protected power
transformer iron core. THERMSTA gives the thermal status in % of the trip value which
corresponds to 100%. THERMSTA should reach 100% at the same time, as TMTOTRIP reaches
0 seconds. If the protected power transformer is then for some reason not switched off,
THERMSTA shall go over 100%.
If the delay as per IEEE law, or Tailor-made Law, is limited by tMax, and/or tMin, then the
Thermal status will generally not reach 100% at the same time, when tTRIP reaches 0 seconds.
For example, if, at low degrees of overexcitation, the very long delay is limited by tMax, then
the OEXPVPH TRIP output signal will be set to 1 before the Thermal status reaches 100%.
10.4.7.5 Overexcitation alarm M5854-123 v6
A separate step, AlarmLevel, is provided for alarming purpose. It is normally set 2% lower than
(V/Hz>) and has a definite time delay, tAlarm. This will give the operator an early warning.
BLOCK
AlarmLevel
tAlarm ALARM
&
t
M>V/Hz>
TRIP
&
V/Hz>
U3P Calculation
Ei k
M
of internal M=
I3P induced (Ei / f) IEEE law &
voltage Ei (Ur / fr) tMax ³1
M t
Tailor-made law
M>V/Hz>>
tMin
Xleak
t
V/Hz>>
M = relative V/Hz as service value

Figure 344: A simplified logic diagram of the Overexcitation protection OEXPVPH

Simplification of the diagram is in the way the IEEE and Tailor-made delays are calculated. The
cooling process is not shown. It is not shown that voltage and frequency are separately
checked against their respective limit values.

M13338-2 v11
Table 375: OEXPVPH technical data

Operate value, start (100–180)% of (UBase/frated) ±0.5% of U
Operate value, alarm (50–120)% of start level ±0.5% of Ur at U ≤ Ur

Operate value, high level (100–200)% of (UBase/frated) ±0.5% of U

Technical manual
Voltage protection

Curve type IEEE or customer defined ±5.0 % or ±45 ms, whichever is
greater
(0.18 × k )
IEEE : t =
( M - 1) 2
where M = (E/f)/(Ur/fr)
Minimum time delay for inverse (0.000–60.000) s ±1.0% or ±45 ms, whichever is
function greater
Maximum time delay for inverse (0.00–9000.00) s ±1.0% or ±45 ms, whichever is
function greater
Alarm time delay (0.00–9000.00) ±1.0% or ±45 ms, whichever is
greater
10.5 Voltage differential protection VDCPTOV SEMOD153860-1 v2
SEMOD167723-2 v2

Voltage differential protection VDCPTOV - 60
A voltage differential monitoring function is available. It compares the voltages from two three
phase sets of voltage transformers and has one sensitive alarm step and one trip step.
VDCPTOV
U3P1* TRIP
U3P2* START
BLOCK ALARM
U1LOW
U2LOW
UL1DIFF
UL2DIFF
UL3DIFF
Figure 345: VDCPTOV function block
10.5.4 Signals
Table 376: VDCPTOV Input signals

U3P1 GROUP - Bus voltage
SIGNAL
U3P2 GROUP - Capacitor voltage
SIGNAL

Technical manual
Voltage protection
Table 377: VDCPTOV Output signals

TRIP BOOLEAN Voltage differential protection operated
START BOOLEAN Start of voltage differential protection
ALARM BOOLEAN Voltage differential protection alarm
U1LOW BOOLEAN Loss of U1 voltage
U2LOW BOOLEAN Loss of U2 voltage
UL1DIFF REAL Differential Voltage phase L1
10.5.5 Settings
Table 378: VDCPTOV Group settings (basic)

On
BlkDiffAtULow No - - Yes Block operation at low voltage
Yes
UDTrip 2.0 - 100.0 %UB 0.1 5.0 Operate level, in % of UBase
tTrip 0.000 - 60.000 s 0.001 1.000 Time delay for voltage differential
operate, in seconds
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for voltage differential
reset, in seconds
UDAlarm 2.0 - 100.0 %UB 0.1 2.0 Alarm level, in % of UBase
tAlarm 0.000 - 60.000 s 0.001 2.000 Time delay for voltage differential
alarm, in seconds
U1Low 1.0 - 100.0 %UB 0.1 70.0 Input 1 undervoltage level, in % of
UBase
U2Low 1.0 - 100.0 %UB 0.1 70.0 Input 2 undervoltage level, in % of
UBase
tBlock 0.000 - 60.000 s 0.001 0.000 Reset time for undervoltage block
Table 379: VDCPTOV Group settings (advanced)

RFL1 0.000 - 3.000 - 0.001 1.000 Ratio compensation factor phase L1
U2L1*RFL1=U1L1
U2L2*RFL2=U1L2
U2L3*RFL3=U1L3
Table 380: VDCPTOV Non group settings (basic)

Value groups

Technical manual
Voltage protection

Table 381: VDCPTOV Monitored data

UL1DIFF REAL - kV Differential Voltage phase L1
The Voltage differential protection function VDCPTOV (60) is based on comparison of the
amplitudes of the two voltages connected in each phase. Possible differences between the
ratios of the two Voltage/Capacitive voltage transformers can be compensated for with a
ratio correction factors RFLx. The voltage difference is evaluated and if it exceeds the alarm
level UDAlarm or trip level UDATrip signals for alarm (ALARM output) or trip (TRIP output) is
given after definite time delay tAlarm respectively tTrip. The two three phase voltage supplies
are also supervised with undervoltage settings U1Low and U2Low. The outputs for loss of
voltage U1LOW resp U2LOW will be activated. The U1 voltage is supervised for loss of
individual phases whereas the U2 voltage is supervised for loss of all three phases.
Loss of all U1 or all U2 voltages will block the differential measurement. This blocking can be
switched off with setting BlkDiffAtULow = No.
VDCPTOV function can be blocked from an external condition with the binary BLOCK input. It
can, for example, be activated from Fuse failure supervision function FUFSPVC.
To allow easy commissioning the measured differential voltage is available as service value.
This allows simple setting of the ratio correction factor to achieve full balance in normal
service.
The principle logic diagram is shown in figure 346.

Technical manual
Voltage protection
UDTripL1>
AND
UDTripL2> O tReset tTrip

AND
R t t
AND TRIP
UDTripL3>
AND
AND START
UDAlarmL1>
AND
UDAlarmL2> O tAlarm
AND
R t AND ALARM
UDAlarmL3>
AND
U1<L1
tAlarm
U1<L2 AND t U1LOW
AND
U1<L3 AND
OR
BlkDiffAtULow
U2<L1
t1
U2<L2 AND t U2LOW
AND
U2<L3
BLOCK
en06000382-2.vsd
Figure 346: Principle logic for Voltage differential function VDCPTOV

SEMOD166919-2 v7
Table 382: VDCPTOV technical data

Voltage difference for alarm and trip (2.0–100.0) % of UBase ±0.5% of Ur
Under voltage level (1.0–100.0) % of UBase ±0.5% of Ur
Independent time delay for voltage (0.000–60.000)s ±0.2% or ±40 ms whichever is

differential alarm at 0.8 x UDAlarm to 1.2 x greater
UDAlarm
differential trip at 0.8 x UDTrip to 1.2 x greater
UDTrip
differential reset at 1.2 x UDTrip to 0.8 x greater
UDTrip

Technical manual
Voltage protection
10.6 Loss of voltage check LOVPTUV SEMOD171453-1 v3
SEMOD171954-2 v2

Loss of voltage check LOVPTUV - 27
Loss of voltage check (LOVPTUV ) is suitable for use in networks with an automatic system
restoration function. LOVPTUV issues a three-pole trip command to the circuit breaker, if all
three phase voltages fall below the set value for a time longer than the set time and the circuit
breaker remains closed.
The operation of LOVPTUV is supervised by the fuse failure supervision FUFSPVC.
LOVPTUV
U3P* TRIP
BLOCK START
CBOPEN
VTSU
Figure 347: LOVPTUV function block
10.6.4 Signals
Table 383: LOVPTUV Input signals

SIGNAL
BLOCK BOOLEAN 0 Block the all outputs
CBOPEN BOOLEAN 0 Circuit breaker open
VTSU BOOLEAN 0 Block from voltage circuit supervision
Table 384: LOVPTUV Output signals

START BOOLEAN Start signal

Technical manual
Voltage protection
10.6.5 Settings
Table 385: LOVPTUV Group settings (basic)

On
UPE 1 - 100 %UB 1 70 Operate voltage in % of base voltage
UBase
tTrip 0.000 - 60.000 s 0.001 7.000 Operate time delay
Table 386: LOVPTUV Group settings (advanced)

tPulse 0.050 - 60.000 s 0.001 0.150 Duration of TRIP pulse
tBlock 0.000 - 60.000 s 0.001 5.000 Time delay to block when all 3ph
voltages are not low
tRestore 0.000 - 60.000 s 0.001 3.000 Time delay for enable the function
after restoration
Table 387: LOVPTUV Non group settings (basic)

Value groups
The operation of Loss of voltage check LOVPTUV is based on line voltage measurement.
LOVPTUV is provided with a logic, which automatically recognizes if the line was restored for
at least tRestore before starting the tTrip timer. All three phases are required to be low before
the output TRIP is activated. The START output signal indicates start.
Additionally, LOVPTUV is automatically blocked if only one or two phase voltages have been
detected low for more than tBlock.
LOVPTUV operates again only if the line has been restored to full voltage for at least tRestore.
Operation of the function is also inhibited by fuse failure and open circuit breaker information
signals, by their connection to dedicated inputs of the function block.
Due to undervoltage conditions being continuous the trip pulse is limited to a length set by
setting tPulse.
The operation of LOVPTUV is supervised by the fuse-failure function (BLKU input) and the
information about the open position (CBOPEN) of the associated circuit breaker.
The BLOCK input can be connected to a binary input of the IED in order to receive a block
command from external devices or can be software connected to other internal functions of
the IED itself in order to receive a block command from internal functions. LOVPTUV is also
blocked when the IED is in TEST status and the function has been blocked from the HMI test
menu. (Blocked=Yes).

Technical manual
Voltage protection
TEST
TEST-ACTIVE
&
Blocked = Yes
START
BLOCK >1
Function Enable tTrip tPulse TRIP
STUL1N & t
STUL2N &
only 1 or 2 phases are low for
Latched at least 10 s (not three)
STUL3N Enable
&
tBlock
>1 t
CBOPEN Reset Enable

>1
&
VTSU
tRestore
>1 Set Enable
t
>1
Line restored for
at least 3 s
Figure 348: Simplified diagram of Loss of voltage check LOVPTUV

SEMOD175210-2 v6
Table 388: LOVPTUV technical data

Operate voltage (1–100)% of UBase ±0.5% of Ur
Pulse timer when (0.050–60.000) s ±0.2% or ±15 ms whichever is greater

disconnecting all three phases
Time delay for enabling the (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
functions after restoration
Operate time delay when (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
disconnecting all three phases
Time delay to block when all (0.000–60.000) s ±0.2% or ±35 ms whichever is greater
three phase voltages are not
low

Technical manual
Voltage protection
10.7 Radial feeder protection PAPGAPC GUID-831891A3-B5AB-4532-8901-311C541F0ABB v1
10.7.1 Identification GUID-1B7B3DC5-DD7B-4017-928D-0C41768E94D9 v1
Function description IEC 61850 identification IEC 60617 identification ANSI/IEEE C37.2 device
number
Radial feeder protection PAPGAPC U< 27
10.7.2 Functionality GUID-82856D0B-5C5E-499A-9A62-CC511E4F047A v3
The radial feeder protection (PAPGAPC) function is used to provide protection of radial
feeders having passive loads or weak end in-feed sources. It is possible to achieve fast
tripping using communication system with remote end or delayed tripping not requiring
communication or upon communication system failure. For fast tripping, scheme
communication is required. Delayed tripping does not require scheme communication.
The PAPGAPC function performs phase selection using measured voltages. Each phase voltage
is compared to the opposite phase-phase voltage. A phase is deemed to have a fault if its
phase voltage drops below a settable percentage of the opposite phase-phase voltage. The
phase - phase voltages include memory. This memory function has a settable time constant.
The voltage-based phase selection is used for both fast and delayed tripping. To achieve fast
tripping, scheme communication is required. Delayed tripping does not require scheme
communication. It is possible to permit delayed tripping only upon failure of the
communications channel by blocking the delayed tripping logic with a communications
channel healthy input signal.
On receipt of the communications signal, phase selective outputs for fast tripping are set
based on the phase(s) in which the phase selection function has operated.
For delayed tripping, single pole and three pole delays are separately and independently
settable. Furthermore, it is possible to enable or disable single pole and three pole delayed
tripping. For single phase faults, it is possible to include a residual current check in the
tripping logic. Three pole tripping is always selected for phase selection on more than one
phase. Three pole tripping will also occur if the residual current exceeds the set level during
fuse failure for a time longer than the three pole trip delay time.
10.7.3 Function block GUID-017455D7-C7F7-42F1-9CAA-53D785A1F4E7 v1
PAPGAPC
I3P* TRIP
U3P* TRIN
BLOCK TRL1
BLKTR TRL2
BLKST TRL3
BLKDLFLT ARST
FUSEFAIL ARST3PH
COMOK ARSTL1
CR ARSTL2
CBCLD ARSTL3
POLEDISC
Figure 349: PAPGAPC function block

Technical manual
Voltage protection
10.7.4 Signals GUID-AE032A57-2479-443A-89B8-4F107AE012FA v1
Table 389: PAPGAPC Input signals

I3P GROUP - Group parameter for current signals
SIGNAL
U3P GROUP - Group parameter for voltage signals
SIGNAL
BLKTR BOOLEAN 0 Block trip
BLKST BOOLEAN 0 Block Start
BLKDLFLT BOOLEAN 0 Blocks the delayed fault clear functionality
FUSEFAIL BOOLEAN 0 Block from fuse failure function
COMOK BOOLEAN 0 Telecommunication link healthy
CR BOOLEAN 0 Received communication signal
CBCLD BOOLEAN 0 Circuit breaker is closed
POLEDISC BOOLEAN 0 The position of CB poles differs (pole discordance)
Table 390: PAPGAPC Output signals

TRIP BOOLEAN General trip
TRIN BOOLEAN Trip caused by residual current detection
ARST BOOLEAN Start signal to the autorecloser function
ARST3PH BOOLEAN Three phase reclosing to be performed
ARSTL1 BOOLEAN Autoreclosing start phase L1
10.7.5 Settings GUID-841D8428-5335-484B-9ED8-89ED86A33E03 v1
Table 391: PAPGAPC Group settings (basic)

On
UPhSel< 30 - 100 % 1 60 Faulted phase voltage in % of
quadrilateral phase-phase voltage
divided by sqrt (3)
Tau 1 - 60 sec 1 5 Time constant for reference voltage
FastOperation Off - - Off Enable fast fault clearing function
On

Technical manual
Voltage protection

t3Ph 0.000 - 60.000 s 0.001 1.000 Time delay for three phase operation
IN> 10 - 150 %IB 1 50 Residual current detection level in %
of IBase
ResCurrCheck Off - - Off Enable residual current check for
On delayed operation at single-phase
faults
Del1PhOp 3Ph - - 3Ph Enable delayed operation for single
1Ph phase faults
t1Ph 0.000 - 60.000 s 0.001 1.000 Time delay for single phase operation
Del3PhOp Off - - Off Enable delayed 3-phase operation
On
ResCurrOper Off - - Off Enabling signal for residual current
On operation
tResCurr 0.000 - 60.000 s 0.001 0.200 Time delay for residual current
indication
Table 392: PAPGAPC Non group settings (basic)

Value groups

Table 393: PAPGAPC Monitored data

UL1 REAL - kV Voltage DFT amplitude in Phase1
IN REAL - A Residual current DFT amplitude
10.7.7 Principle of operation GUID-C8CBC104-7CCD-46CD-A01C-5FEDDC0F55AF v1
10.7.7.1 Faulted phase selection GUID-5FE347E6-8A02-4B87-B515-3CEB25232AFA v1
The faulted phase selection is based on voltage measurement. Each phase voltage magnitude
(rms) is compared with the quadrature phase – phase voltage, which is obtained by passing
full wave rectified signal through an exponential filter.
The filter updates the output if the output magnitude is lower than input voltage. However,
when the input voltage is lower than output magnitude, the output decreases with a settable
time constant of Tau. The desired filter response is depicted in Figure350.

Technical manual
Voltage protection
Time constant=Tau Output from

filter
Rectified
input signal
en01000140.vsd
Figure 350: Desired filter response

Phase Lx is deemed to have faulted if the phase Lx voltage is lower than filtered quadrature
phase – phase voltage times UPhSel< set value. The phase selection for remaining phases can
be performed in the similar way. The logic diagram for faulted phase selection is shown in
Figure 351.
Z-1
U3P* ABS
MAX
-t ×
EXP
×
Tau ÷
× a PHSLx
a<b
3 ÷ × b
UPhSel<
Figure 351: Simplified logic diagram for faulted phase selection
10.7.7.2 Residual current detection GUID-98B7BF77-6658-4603-BD3F-19A419551BC7 v1
PAPGAPC (27) detects the presence of residual current if the residual current exceeds the set
IN> value and lasts for a period of 600 ms.
The output TRIN is high after a set time of tResCurr if the setting ResCurrOper is enabled.
The output TRIN is blocked by enabling either of BLOCK or BLKTR inputs.
I3P* 600 ms
a STIN
a>b t
b
IN> tResCurr
t
TRIN
ResCurrOper &
BLOCK
BLKTR _1
>
Figure 352: Simplified logic diagram for residual current detection

Technical manual
Voltage protection
10.7.7.3 Fast fault clearance GUID-B1E84A31-7733-4CB8-AB8C-51B723B8335D v2
Operation at the remote end of the line with passive loads or weak sources is obtained as
follows. The fault clearing at remote end is initiated by CR signal received from the other end
of the feeder. Fast fault clearing can be enabled by the FastOperation setting. The function is
enabled for 650 ms upon receiving the carrier signal from the other end. It generates the start
signal STLx depending on the status of the faulty phase(s). The presence of FUSEFAIL inhibits
the operation of fault clearance on faulty phase(s) and the corresponding logic diagram is
depicted in Figure 353. The fast fault clearance operation is blocked upon failure of the
communication channel input COMOK.
650 ms
CR
&
FUSEFAIL
COMOK
& & STL 1
FastOperation
PHSL1
& STL2
PHSL2
& STL 3
PHSL3
Figure 353: Simplified logic diagram for fast fault clearance
10.7.7.4 Delayed fault clearance GUID-40D30808-EA85-431D-AA7F-E9F5529DDD3B v2
Delayed fault clearance does not require scheme communication. It is possible to permit
delayed tripping upon the failure of the communication channel input COMOK.
It is possible to select delayed single- and three pole tripping by choosing the appropriate
settings Del1PhOp and Del3PhOp. Furthermore, time delays for single- and three pole tripping
can independently be set by t1Ph and t3Ph.
For single phase faults, ResCurrCheck is included in the tripping logic. It is also possible to
select either single- or three pole tripping for single phase faults occurring in the system.
Three pole tripping is always selected for phase selection of more than one phase.
In case of a fuse failure condition, that is FUSEFAIL is high, single- and three pole tripping are
inhibited, however, three pole tripping occurs if the residual current exceeds the set level
during fuse failure for a time longer than the three pole trip delay time of t3Ph.
The inputs BLKDLFLT and COMOK inhibit the delayed operation for faulty phase(s).
Start signal STLx is enabled as soon as the fault is detected in any phase(s).

Technical manual
Voltage protection
COMOK
&
FastOperation
BLKDLFLT &
FUSEFAIL
STIN
≥1 &
ResCurrCheck
Del1PhOp
t1Ph
STL1
PHSL1 & t &
≥1
t1Ph
STL2
PHSL2 & t &
≥1
t1Ph STL3
PHSL3 & t &
≥1
≥1 &
&
Del3PhOp
t3Ph
≥2 & ≥1 t
&
Figure 354: Simplified logic diagram for delayed fault clearance
10.7.7.5 Trip and autoreclose logic GUID-FBEFA5C3-6313-4D3F-8C85-E67C1689D110 v1
The start signals for each phase are generated from both the fast fault clearance and delayed
fault clearance. Upon receiving the start signal STLx in phase(s), the corresponding phase trip
signal TRLx is issued. A general trip signal, TRIP is also generated.
The single or three phase operation of autorecloser depends on the status of CBCLD and the
existence of pole discrepancy, indicated by the input POLEDISC. If conditions for reclosing are
fulfilled, a start signal ARSTLx is issued for the faulty phase(s).
A general start signal, ARST is also generated. If more than one phase seems to be detected
faulty, three phase autoreclosing signal ARST3PH is issued.
The binary input BLOCK can be used to block the function. The activation of the BLOCK input
deactivates all outputs.
Start output signals ARSTLx, ARST and ARST3PH are blocked by enabling BLKST input and the
activation of the BLKTR input deactivates all trip outputs.

Technical manual
Voltage protection
STL1
TRL1
&
STL2
TRL2
&
STL3
TRL3
&
≥1 TRIP
&
BLOCK
BLKTR ≥1
BLKST ≥1
& ARSTL1
&
& ARSTL2
&
& ARSTL3
&
POLEDISC
100 ms
CBCLD &
t ≥1
≥1 ARST
&
≥1 ARST3PH
&
Figure 355: Simplified logic diagram for trip and autoreclose logic
10.7.8 Technical data GUID-C172D5EB-51E8-4FC9-B2E7-EF976872FD7E v6
Table 394: PAPGAPC technical data

Residual current detection (10 - 150)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio >95% at (50 - 150)% of IBase -
Operate time, residual current Min. = 15 ms -
detection at 0 to 2 x Iset
Max. = 30 ms
Independent time delay to (0.000 - 60.000) s ±0.2% or ±40 ms whichever is
operate, residual current greater
detection at 0 to 2 x Iset
Voltage based phase selection (30 - 100)% of UBase ±1.0% of Ur
Reset ratio <115% -

Operate time, voltage-based Min. = 15 ms -
phase selection at 1.2 x Uset to 0.8
Max. = 30 ms
x Uset
Independent time delay to (0.000 – 60.000) s ±0.2% or ±40 ms whichever is

operate, voltage-based phase greater
selection at 1.2 x Uset to 0.8 x Uset

Technical manual
604
Section 11 Frequency protection

11.1 Underfrequency protection SAPTUF IP15746-1 v3
M14865-1 v5

Underfrequency protection SAPTUF 81
f<
SYMBOL-P V1 EN-US
Underfrequency occurs as a result of a lack of generation in the network.
Underfrequency protection (SAPTUF) measures frequency with high accuracy, and is used for
load shedding systems, remedial action schemes, gas turbine startup and so on. Separate
definite time delays are provided for operate and restore.
SAPTUF is provided with undervoltage blocking.
The operation is based on positive sequence voltage measurement and requires two phase-
phase or three phase-neutral voltages to be connected. For information about how to connect
analog inputs, refer to Application manual/IED application/Analog inputs/Setting
guidelines.
SAPTUF
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
FREQ
Figure 356: SAPTUF function block

Technical manual
11.1.4 Signals
Table 395: SAPTUF Input signals

SIGNAL
BLKTRIP BOOLEAN 0 Blocking operate output
BLKREST BOOLEAN 0 Blocking restore output
Table 396: SAPTUF Output signals

RESTORE BOOLEAN Restore signal for load restoring purposes
BLKDMAGN BOOLEAN Blocking indication due to low amplitude
FREQ REAL Measured frequency
11.1.5 Settings
Table 397: SAPTUF Group settings (basic)

On
StartFrequency 35.00 - 75.00 Hz 0.01 48.80 Frequency set value
IntBlockLevel 0.0 - 100.0 %UB 1.0 50.0 Internal blocking level in % of UBase
tDelay 0.000 - 60.000 s 0.001 0.200 Operate time delay
tReset 0.000 - 60.000 s 0.001 0.000 Time delay for reset
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency value
TimerMode Definite timer - - Definite timer Setting for choosing timer mode
Volt based timer
UNom 50.0 - 150.0 %UB 1.0 100.0 Nominal voltage for voltage based
timer in % of UBase
UMin 50.0 - 150.0 %UB 1.0 90.0 Lower operation limit for voltage
based timer in % of UBase
Exponent 0.0 - 5.0 - 0.1 1.0 For calculation of the curve form for
voltage based timer
tMax 0.010 - 60.000 s 0.001 1.000 Maximum time operation limit for
voltage based timer
tMin 0.010 - 60.000 s 0.001 1.000 Minimum time operation limit for
voltage based timer

Technical manual
Table 398: SAPTUF Non group settings (basic)

Value groups
Underfrequency protection SAPTUF is used to detect low power system frequency. SAPTUF
can either have a definite time delay or a voltage magnitude dependent time delay. If the
voltage magnitude dependent time delay is applied, the time delay will be longer if the voltage
is higher, and the delay will be shorter if the voltage is lower. If the frequency remains below
the set value for a time period corresponding to the chosen time delay, the corresponding trip
signal is issued. To avoid an unwanted trip due to uncertain frequency measurement at low
voltage magnitude, a voltage controlled blocking of the function is available, that is, if the
voltage is lower than the set blocking voltage IntBlockLevel, the function is blocked and no
START or TRIP signal is issued.
The fundamental frequency of the measured input voltage is measured continuously, and
compared with the set value, StartFrequency. The frequency function is dependent on the
voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel,
SAPTUF gets blocked, and the output BLKDMAGN is issued. All voltage settings are made in
percent of the setting UBase, which should be set as a phase-phase voltage in kV.
11.1.6.2 Time delay M13354-10 v9
The time delay for underfrequency protection SAPTUF can be either a settable definite time
delay or a voltage magnitude dependent time delay, where the time delay depends on the
voltage level; a high voltage level gives a longer time delay and a low voltage level causes a
short time delay. For the definite time delay, the setting tDelay sets the time delay.
For the voltage dependent time delay the measured voltage level and the settings UNom,
UMin, Exponent, tMax and tMin set the time delay according to figure 357 and equation . The
setting TimerMode is used to decide what type of time delay to apply.
Trip signal issuing requires that the underfrequency condition continues for at least the user
set time delay tDelay. If the START condition, with respect to the measured frequency ceases
during this user set delay time, and is not fulfilled again within a user defined reset time,
tReset, the START output is reset, after that the defined reset time has elapsed. Here it should
be noted that after leaving the hysteresis area, the START condition must be fulfilled again and
it is not sufficient for the signal to only return back to the hysteresis area.
The total time delay consists of the set value for time delay plus the minimum
operate time of the start function (80-90 ms).
On the RESTORE output of SAPTUF a 100ms pulse is issued, after a time delay corresponding
to the setting of tRestore, when the measured frequency returns to the level corresponding to
the setting RestoreFreq, after an issue of the TRIP output signal. If tRestore is se to 0.000 s
the restore functionality is disabled, and no output will be given.

Technical manual
11.1.6.3 Voltage dependent time delay M13354-19 v5
Since the fundamental frequency in a power system is the same all over the system, except
some deviations during power oscillations, another criterion is needed to decide, where to
take actions, based on low frequency. In many applications the voltage level is very suitable,
and in most cases is load shedding preferable in areas with low voltage. Therefore, a voltage
dependent time delay has been introduced, to make sure that load shedding, or other actions,
take place at the right location. At constant voltage, U, the voltage dependent time delay is
calculated according to equation 173. At non-constant voltage, the actual time delay is
integrated in a similar way as for the inverse time characteristic for the undervoltage and
overvoltage functions.
Exponent
é U - UMin ù
t=ê × ( tMax - tMin ) + tMin
ë UNom - UMin úû
where:
t is the voltage dependent time delay (at constant voltage),
U is the measured voltage
Exponent is a setting,
UMin, UNom are voltage settings corresponding to
tMax, tMin are time settings.
The inverse time characteristics are shown in figure 357, for:
UMin = 90%
UNom = 100%
tMax = 1.0 s
tMin = 0.0 s
Exponent = 0, 1, 2, 3 and 4
1
0
1
Exponenent
TimeDlyOperate [s]
2
3
0.5 4
0
90 95 100
U [% of UBase]
en05000075.vsd
Figure 357: Voltage dependent inverse time characteristics for underfrequency

protection SAPTUF. The time delay to operate is plotted as a function of the
measured voltage, for the Exponent = 0, 1, 2, 3, 4 respectively.

Technical manual
11.1.6.4 Blocking M13354-50 v7
It is possible to block underfrequency protection SAPTUF partially or completely, by binary

input signals or by parameter settings, where:
BLOCK: blocks the START, TRIP and

RESTORE outputs
BLKTRIP: blocks the TRIP output
BLKREST: blocks the RESTORE output
If the measured voltage level decreases below the setting of IntBlockLevel, both the START and
the TRIP outputs are blocked.
11.1.6.5 Design M13354-63 v10
The frequency measuring element continuously measures the frequency of the positive
sequence voltage and compares it to the setting StartFrequency. The frequency signal is
filtered to avoid transients due to switchings and faults. The time integrator can operate
either due to a definite delay time or to the special voltage dependent delay time. When the
frequency has returned back to the setting of RestoreFreq, the RESTORE output is issued after
the time delay tRestore. The design of underfrequency protection SAPTUF is schematically
described in figure 358.
BLKDMAGN
BLOCK
block START
OR
U < IntBlockLevel
Start
&
start Trip
Voltage
output
Definite timer
logic TRIP
or
Voltage based timer
Frequency
f < StartFrequency
tReset trip
tDelay RESTORE
AND
BLKTRIP
f > RestoreFreq tRestore

restore
AND
BLKREST
Figure 358: Simplified logic diagram for SAPTUF

Technical manual

M13360-1 v15
Table 399: SAPTUF technical data

Operate value, start function, at symmetrical (35.00-75.00) Hz ±2.0 mHz
three phase voltage
Operate time, start at fset + 0.02 Hz to fset - 0.02 Min. = 80 ms
Hz fn = 50 Hz
Max. = 95 ms
-
Min. = 65 ms
fn = 60 Hz
Max. = 80 ms
Reset time, start at fset - 0.02 Hz to fset + 0.02 Hz Min. = 15 ms
-
Max. = 30 ms
Operate time, definite time function at fset + (0.000-60.000)s ±0.2% or ±100 ms
0.02 Hz to fset - 0.02 Hz whichever is greater
Reset time, definite time function at fset - 0.02 (0.000-60.000)s ±0.2% or ±120 ms
Hz to fset + 0.02 Hz whichever is greater
Voltage dependent time delay Settings: ±1.0% or ±100 ms

UNom=(50-150)% of Ubase whichever is greater
UMin=(50-150)% of Ubase
Exponent=0.0-5.0
tMax=(0.010–60.000)s
tMin=(0.010–60.000)s
Exponent
é U - UMin ù
t=ê × ( tMax - tMin ) + tMin
ë UNom - UMin úû
U=Umeasured
11.2 Overfrequency protection SAPTOF IP15747-1 v3
M14866-1 v4

Overfrequency protection SAPTOF 81
f>
SYMBOL-O V1 EN-US
Overfrequency protection function (SAPTOF) is applicable in all situations, where reliable

detection of high fundamental power system frequency is needed.
Overfrequency occurs because of sudden load drops or shunt faults in the power network.
Close to the generating plant, generator governor problems can also cause over frequency.

Technical manual
SAPTOF measures frequency with high accuracy, and is used mainly for generation shedding
and remedial action schemes. It is also used as a frequency stage initiating load restoring. A
definite time delay is provided for operate.
SAPTOF is provided with an undervoltage blocking.
The operation is based on positive sequence voltage measurement and requires two phase-
phase or three phase-neutral voltages to be connected. For information about how to connect
analog inputs, refer to Application manual/IED application/Analog inputs/Setting
guidelines.
SAPTOF
U3P* TRIP
BLOCK START
BLKTRIP BLKDMAGN
FREQ
Figure 359: SAPTOF function block
11.2.4 Signals
Table 400: SAPTOF Input signals

SIGNAL
Table 401: SAPTOF Output signals

FREQ REAL Measured frequency
11.2.5 Settings
Table 402: SAPTOF Group settings (basic)

On
StartFrequency 35.00 - 90.00 Hz 0.01 51.20 Frequency set value

Technical manual
Table 403: SAPTOF Non group settings (basic)

Value groups
Overfrequency protection SAPTOF is used to detect high power system frequency. SAPTOF
has a settable definite time delay. If the frequency remains above the set value for a time
period corresponding to the chosen time delay, the corresponding TRIP signal is issued. To
avoid an unwanted TRIP due to uncertain frequency measurement at low voltage magnitude, a
voltage controlled blocking of the function is available, that is, if the voltage is lower than the
set blocking voltage IntBlockLevel, the function is blocked and no START or TRIP signal is
issued.
The fundamental frequency of the positive sequence voltage is measured continuously, and
compared with the set value, StartFrequency. Overfrequency protection SAPTOF is dependent
on the voltage magnitude. If the voltage magnitude decreases below the setting IntBlockLevel,
SAPTOF is blocked and the output BLKDMAGN is issued. All voltage settings are made in
percent of the UBase, which should be set as a phase-phase voltage in kV. To avoid oscillations
of the output START signal, a hysteresis has been included.
11.2.6.2 Time delay M14958-9 v8
The time delay for Overfrequency protection SAPTOF is a settable definite time delay,
specified by the setting tDelay.
TRIP signal issuing requires that the overfrequency condition continues for at least the user
set time delay, tDelay. If the START condition, with respect to the measured frequency ceases
during this user set delay time, and is not fulfilled again within a user defined reset time,
tReset, the START output is reset, after that the defined reset time has elapsed. It is to be
noted that after leaving the hysteresis area, the START condition must be fulfilled again and it
is not sufficient for the signal to only return back to the hysteresis area.
The total time delay consists of the set value for time delay plus minimum
operate time of the start function (80 - 90 ms).
11.2.6.3 Blocking M14958-13 v7
It is possible to block overfrequency protection SAPTOF partially or completely, by binary input

signals or by parameter settings, where:
BLOCK: blocks the START and TRIP

outputs

Technical manual
11.2.6.4 Design M14958-24 v9
The frequency measuring element continuously measures the frequency of the positive
sequence voltage and compares it to the setting StartFrequency. The frequency signal is
filtered to avoid transients due to switchings and faults in the power system. The time
integrator operates due to a definite delay time. The design of overfrequency protection
SAPTOF is schematically described in figure 360.
BLKDMAGN
BLOCK
block START
OR
U < IntBlockLevel
Start
&
start Trip
Voltage
output
logic TRIP
Definite timer
Frequency
f > StartFrequency tReset
trip
tDelay
AND
BLKTRIP
Figure 360: Simplified logic diagram for SAPTOF

M14964-1 v12
Table 404: SAPTOF technical data

Operate value, start function at (35.00-90.00) Hz ±2.0 mHz
symmetrical three-phase voltage
Operate time, start at fset -0.02 Hz to fset Min. = 80 ms -
fn = 50Hz
+0.02 Hz Max. = 95 ms
Min. = 65 ms
fn = 60 Hz
Max. = 80 ms
Reset time, start at fset +0.02 Hz to fset Min. = 15 ms -
-0.02 Hz Max. = 30 ms
Operate time, definite time function at (0.000-60.000)s ±0.2% ±100 ms

fset -0.02 Hz to fset +0.02 Hz whichever is
greater
Reset time, definite time function at fset (0.000-60.000)s ±0.2% ±120 ms,
+0.02 Hz to fset -0.02 Hz whichever is
greater

Technical manual
11.3 Rate-of-change of frequency protection SAPFRC IP15748-1 v4
M14868-1 v4

Rate-of-change of frequency SAPFRC 81
protection
df/dt >
<
SYMBOL-N V1 EN-US
The rate-of-change of frequency protection function (SAPFRC) gives an early indication of a

main disturbance in the system. SAPFRC measures frequency with high accuracy, and can be
used for generation shedding, load shedding and remedial action schemes. SAPFRC can
discriminate between a positive or negative change of frequency. A definite time delay is
provided for operate.
SAPFRC is provided with an undervoltage blocking. The operation is based on positive

sequence voltage measurement and requires two phase-phase or three phase-neutral voltages
to be connected. For information about how to connect analog inputs, refer to Application
manual/IED application/Analog inputs/Setting guidelines.
SAPFRC
U3P* TRIP
BLOCK START
BLKTRIP RESTORE
BLKREST BLKDMAGN
Figure 361: SAPFRC function block
11.3.4 Signals
Table 405: SAPFRC Input signals

SIGNAL
BLKREST BOOLEAN 0 Blocking restore output

Technical manual
Table 406: SAPFRC Output signals

START BOOLEAN Start signal
RESTORE BOOLEAN Restore signal for load restoring purposes
11.3.5 Settings
Table 407: SAPFRC Group settings (basic)

On
StartFreqGrad -10.00 - 10.00 Hz/s 0.01 0.50 Frequency gradient start value, the
sign defines direction
RestoreFreq 45.00 - 65.00 Hz 0.01 49.90 Restore frequency value
tRestore 0.000 - 60.000 s 0.001 0.000 Restore time delay
Table 408: SAPFRC Non group settings (basic)

Value groups
Rate-of-change frequency protection SAPFRC is used to detect fast power system frequency
changes at an early stage. SAPFRC has a settable definite time delay. If the rate-of-change of
frequency remains below the set value, for negative rate-of-change, for a time period equal to
the chosen time delay, the TRIP signal is issued. If the rate-of-change of frequency remains
above the set value, for positive rate-of-change, for a time period equal to the chosen time
delay, the TRIP signal is issued. To avoid an unwanted trip due to uncertain frequency
measurement at low voltage magnitude a voltage controlled blocking of the function is
available, that is, if the voltage is lower than the set blocking voltage IntBlockLevel the function
is blocked and no START or TRIP signal is issued. If the frequency recovers, after a frequency
decrease, a restore signal is issued.
The rate-of-change of the fundamental frequency of the selected voltage is measured

continuously, and compared with the set value, StartFreqGrad. Rate-of-change frequency
protection SAPFRC is also dependent on the voltage magnitude. If the voltage magnitude
decreases below the setting IntBlockLevel, SAPFRC is blocked, and the output BLKDMAGN is
issued. The sign of the setting StartFreqGrad, controls if SAPFRC reacts on a positive or on a
negative change in frequency. If SAPFRC is used for decreasing frequency that is, the setting

Technical manual
StartFreqGrad has been given a negative value, and a trip signal has been issued, then a 100
ms pulse is issued on the RESTORE output, when the frequency recovers to a value higher than
the setting RestoreFreq. A positive setting of StartFreqGrad, sets SAPFRC to START and TRIP
for frequency increases.
11.3.6.2 Time delay M14970-10 v7
Rate-of-change frequency protection SAPFRC has a settable definite time delay, tDelay.
Trip signal issuing requires that the rate-of-change of frequency condition continues for at
least the user set time delay, tDelay. If the START condition, with respect to the measured
frequency ceases during the delay time, and is not fulfilled again within a user defined reset
time, tReset, the START output is reset, after that the defined reset time has elapsed. Here it
should be noted that after leaving the hysteresis area, the START condition must be fulfilled
again and it is not sufficient for the signal to only return back into the hysteresis area.
The RESTORE output of SAPFRC is set, after a time delay equal to the setting of tDelay, when
the measured frequency has returned to the level corresponding to RestoreFreq, after an issue
of the TRIP output signal. If tRestore is set to 0.000 s the restore functionality is disabled, and
no output will be given. The restore functionality is only active for lowering frequency
conditions and the restore sequence is disabled if a new negative frequency gradient is
detected during the restore period, defined by the settings RestoreFreq and tRestore.
11.3.6.3 Blocking M14970-23 v6
Rate-of-change frequency protection (SAPFRC) can be partially or totally blocked, by binary

input signals or by parameter settings, where:
BLOCK: blocks the START and TRIP outputs

BLKREST: blocks the RESTORE output
11.3.6.4 Design M14970-34 v7
Rate-of-change frequency protection (SAPFRC) measuring element continuously measures the

frequency of the selected voltage and compares it to the setting StartFreqGrad. The frequency
signal is filtered to avoid transients due to power system switchings and faults. The time
integrator operates with a definite delay time. When the frequency has returned back to the
setting of RestoreFreq, the RESTORE output is issued after the time delay tRestore, if the TRIP
signal has earlier been issued. The sign of the setting StartFreqGrad is essential, and controls
if the function is used for raising or lowering frequency conditions. The design of SAPFRC is
schematically described in figure 362.

Technical manual
BLKDMAGN
BLOCK
block
OR
Voltage
U < IntBlockLevel
START
Start
Rate-of-change
&
of Frequency start
If Trip
[StartFreqGrad<0 output
AND logic
Definite timer
df/dt < StartFreqGrad]
start TRIP
OR
tReset
[StartFreqGrad>0
AND
tDelay
df/dt > StartFreqGrad]
Then
START trip
AND
BLKTRIP
RESTORE
Frequency restore
f > RestoreFreq
> tRestore
AND
BLKREST
Figure 362: Simplified logic diagram for SAPFRC

M14976-1 v10
Table 409: SAPFRC Technical data

Operate value, start function (-10.00-10.00) Hz/s ±10.0 mHz/s
Operate value, restore enable frequency (45.00-65.00) Hz ±2.0 mHz
Definite restore time delay (0.000-60.000) s ±0.2% or ±100 ms whichever is
greater
Definite time delay for frequency gradient (0.000-60.000) s ±0.2% or ±120 ms whichever is
trip greater
Definite reset time delay (0.000-60.000) s ±0.2% or ±250 ms whichever is
greater

Technical manual
618
Section 12 Multipurpose protection

12.1 General current and voltage protection CVGAPC IP14552-1 v2
M14886-2 v3

General current and voltage CVGAPC 2(I>/U<) -
protection
M13083-11 v9
The General current and voltage protection (CVGAPC) can be utilized as a negative sequence
current protection detecting unsymmetrical conditions such as open phase or unsymmetrical
faults.
CVGAPC can also be used to improve phase selection for high resistive earth faults, outside
the distance protection reach, for the transmission line. Three functions are used, which
measures the neutral current and each of the three phase voltages. This will give an
independence from load currents and this phase selection will be used in conjunction with the
detection of the earth fault from the directional earth fault protection function.
CVGAPC
I3P* TRIP
U3P* TROC1
BLOCK TROC2
BLKOC1 TRUC1
BLKOC1TR TRUC2
ENMLTOC1 TROV1
BLKOC2 TROV2
BLKOC2TR TRUV1
ENMLTOC2 TRUV2
BLKUC1 START
BLKUC1TR STOC1
BLKUC2 STOC2
BLKUC2TR STUC1
BLKOV1 STUC2
BLKOV1TR STOV1
BLKOV2 STOV2
BLKOV2TR STUV1
BLKUV1 STUV2
BLKUV1TR BLK2ND
BLKUV2 DIROC1
BLKUV2TR DIROC2
UDIRLOW
CURRENT
ICOSFI
VOLTAGE
UIANGLE
Figure 363: CVGAPC function block

Technical manual
12.1.4 Signals
Table 410: CVGAPC Input signals

SIGNAL
SIGNAL
BLKOC1 BOOLEAN 0 Block of over current function OC1
BLKOC1TR BOOLEAN 0 Block of trip for over current function OC1
ENMLTOC1 BOOLEAN 0 When activated, the current multiplier is in use for OC1
BLKOC2 BOOLEAN 0 Block of over current function OC2
BLKOC2TR BOOLEAN 0 Block of trip for over current function OC2
ENMLTOC2 BOOLEAN 0 When activated, the current multiplier is in use for OC2
BLKUC1 BOOLEAN 0 Block of under current function UC1
BLKUC1TR BOOLEAN 0 Block of trip for under current function UC1
BLKUC2 BOOLEAN 0 Block of under current function UC2
BLKUC2TR BOOLEAN 0 Block of trip for under current function UC2
BLKOV1 BOOLEAN 0 Block of over voltage function OV1
BLKOV1TR BOOLEAN 0 Block of trip for over voltage function OV1
BLKOV2 BOOLEAN 0 Block of over voltage function OV2
BLKOV2TR BOOLEAN 0 Block of trip for over voltage function OV2
BLKUV1 BOOLEAN 0 Block of under voltage function UV1
BLKUV1TR BOOLEAN 0 Block of trip for under voltage function UV1
BLKUV2 BOOLEAN 0 Block of under voltage function UV2
BLKUV2TR BOOLEAN 0 Block of trip for under voltage function UV2
Table 411: CVGAPC Output signals

TROC1 BOOLEAN Trip signal from overcurrent function OC1
TROC2 BOOLEAN Trip signal from overcurrent function OC2
TRUC1 BOOLEAN Trip signal from undercurrent function UC1
TRUC2 BOOLEAN Trip signal from undercurrent function UC2
TROV1 BOOLEAN Trip signal from overvoltage function OV1
TROV2 BOOLEAN Trip signal from overvoltage function OV2
TRUV1 BOOLEAN Trip signal from undervoltage function UV1
TRUV2 BOOLEAN Trip signal from undervoltage function UV2
STOC1 BOOLEAN Start signal from overcurrent function OC1
STOC2 BOOLEAN Start signal from overcurrent function OC2

Technical manual

STUC1 BOOLEAN Start signal from undercurrent function UC1
STUC2 BOOLEAN Start signal from undercurrent function UC2
STOV1 BOOLEAN Start signal from overvoltage function OV1
STOV2 BOOLEAN Start signal from overvoltage function OV2
STUV1 BOOLEAN Start signal from undervoltage function UV1
STUV2 BOOLEAN Start signal from undervoltage function UV2
BLK2ND BOOLEAN Block from second harmonic detection
DIROC1 INTEGER Directional mode of OC1 (nondir, forward,reverse)
DIROC2 INTEGER Directional mode of OC2 (nondir, forward,reverse)
UDIRLOW BOOLEAN Low voltage for directional polarization
CURRENT REAL Measured current value
ICOSFI REAL Measured current multiplied with cos (Phi)
VOLTAGE REAL Measured voltage value
UIANGLE REAL Angle between voltage and current
12.1.5 Settings
Table 412: CVGAPC Group settings (basic)

On
CurrentInput phase1 - - MaxPh Select current signal which will be
phase2 measured inside function
phase3
PosSeq
NegSeq
3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
VoltageInput phase1 - - MaxPh Select voltage signal which will be
phase2 measured inside function
phase3
PosSeq
-NegSeq
-3*ZeroSeq
MaxPh
MinPh
UnbalancePh
phase1-phase2
phase2-phase3
phase3-phase1
MaxPh-Ph
MinPh-Ph
UnbalancePh-Ph
OperHarmRestr Off - - Off Operation of 2nd harmonic restrain
On Off / On

Technical manual

l_2nd/l_fund 10.0 - 50.0 % 1.0 20.0 Ratio of second to fundamental
current harmonic in %
BlkLevel2nd 10 - 5000 %IB 1 5000 Harm analyse disabled above this
current level in % of fundamental
current
EnRestrainCurr Off - - Off Enable current restrain function On /
On Off
RestrCurrInput PosSeq - - PosSeq Select current signal which will be
NegSeq used for curr restrain
3*ZeroSeq
Max
RestrCurrCoeff 0.00 - 5.00 - 0.01 0.00 Restraining current coefficient
RCADir -180 - 180 Deg 1 -75 Relay Characteristic Angle
ROADir 1 - 90 Deg 1 75 Relay Operate Angle
LowVolt_VM 0.0 - 5.0 %UB 0.1 0.5 Below this level in % of UBase setting
ActLowVolt takes over
Operation_OC1 Off - - Off Operation OC1 Off / On
On
StartCurr_OC1 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC1 in % of
IBase
CurveType_OC1 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. OC1
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC1 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of
OC1
k_OC1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for OC1
% of IBase
tMin_OC1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC1
VCntrlMode_OC1 Voltage control - - Off Control mode for voltage controlled
Off OC1 function
VDepMode_OC1 Step - - Step Voltage dependent mode OC1 (step,
Slope slope)
VDepFact_OC1 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when
OC1 is U dependent
ULowLimit_OC1 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC1 in % of
UBase
UHighLimit_OC1 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC1 in % of
UBase

Technical manual

HarmRestr_OC1 Off - - Off Enable block of OC1 by 2nd harmonic
On restrain
DirMode_OC1 Non-directional - - Non-directional Directional mode of OC1 (nondir,
Forward forward, reverse)
Reverse
DirPrinc_OC1 I&U - - I&U Measuring on IandU or IcosPhiandU
IcosPhi&U for OC1
ActLowVolt1_VM Non-directional - - Non-directional Low voltage level action for Dir_OC1
Block (Nodir, Blk, Mem)
Memory
Operation_OC2 Off - - Off Operation OC2 Off / On
On
StartCurr_OC2 2.0 - 5000.0 %IB 1.0 120.0 Operate current level for OC2 in % of
IBase
CurveType_OC2 ANSI Ext. inv. - - ANSI Def. Time Selection of time delay curve type for
ANSI Very inv. OC2
ANSI Norm. inv.
ANSI Mod. inv.
ANSI Def. Time
L.T.E. inv.
L.T.V. inv.
L.T. inv.
IEC Norm. inv.
IEC Very inv.
IEC inv.
IEC Ext. inv.
IEC S.T. inv.
IEC L.T. inv.
IEC Def. Time
Programmable
RI type
RD type
tDef_OC2 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of
OC2
k_OC2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for OC2
% of IBase
tMin_OC2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IEC IDMT
curves for OC2
VCntrlMode_OC2 Voltage control - - Off Control mode for voltage controlled
Off OC2 function
VDepMode_OC2 Step - - Step Voltage dependent mode OC2 (step,
Slope slope)
VDepFact_OC2 0.02 - 5.00 - 0.01 1.00 Multiplying factor for I pickup when
OC2 is U dependent
ULowLimit_OC2 1.0 - 200.0 %UB 0.1 50.0 Voltage low limit setting OC2 in % of
UBase
UHighLimit_OC2 1.0 - 200.0 %UB 0.1 100.0 Voltage high limit setting OC2 in % of
UBase
HarmRestr_OC2 Off - - Off Enable block of OC2 by 2nd harmonic
On restrain
DirMode_OC2 Non-directional - - Non-directional Directional mode of OC2 (nondir,
Forward forward, reverse)
Reverse
DirPrinc_OC2 I&U - - I&U Measuring on IandU or IcosPhiandU
IcosPhi&U for OC2

Technical manual

ActLowVolt2_VM Non-directional - - Non-directional Low voltage level action for Dir_OC2
Block (Nodir, Blk, Mem)
Memory
Operation_UC1 Off - - Off Operation UC1 Off / On
On
EnBlkLowI_UC1 Off - - Off Enable internal low current level
On blocking for UC1
BlkLowCurr_UC1 0 - 150 %IB 1 20 Internal low current blocking level for
UC1 in % of IBase
StartCurr_UC1 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC1 in
% of IBase
tDef_UC1 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of
UC1
tResetDef_UC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC1
HarmRestr_UC1 Off - - Off Enable block of UC1 by 2nd harmonic
On restrain
Operation_UC2 Off - - Off Operation UC2 Off / On
On
EnBlkLowI_UC2 Off - - Off Enable internal low current level
On blocking for UC2
BlkLowCurr_UC2 0 - 150 %IB 1 20 Internal low current blocking level for
UC2 in % of IBase
StartCurr_UC2 2.0 - 150.0 %IB 1.0 70.0 Operate undercurrent level for UC2 in
% of IBase
tDef_UC2 0.00 - 6000.00 s 0.01 0.50 Independent (definite) time delay of
UC2
HarmRestr_UC2 Off - - Off Enable block of UC2 by 2nd harmonic
On restrain
Operation_OV1 Off - - Off Operation OV1 Off / On
On
StartVolt_OV1 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV1 in % of
UBase
CurveType_OV1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A OV1
Inverse curve B
Inverse curve C
Prog. inv. curve
tDef_OV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV1
tMin_OV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT
curves for OV1
k_OV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for OV1
Operation_OV2 Off - - Off Operation OV2 Off / On
On
StartVolt_OV2 2.0 - 200.0 %UB 0.1 150.0 Operate voltage level for OV2 in % of
UBase
CurveType_OV2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A OV2
Inverse curve B
Inverse curve C
Prog. inv. curve

Technical manual

tDef_OV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of OV2
tMin_OV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT
curves for OV2
k_OV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for OV2
Operation_UV1 Off - - Off Operation UV1 Off / On
On
StartVolt_UV1 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV1 in
% of UBase
CurveType_UV1 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A UV1
Inverse curve B
Prog. inv. curve
tDef_UV1 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV1
tMin_UV1 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT
curves for UV1
k_UV1 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for UV1
EnBlkLowV_UV1 Off - - On Enable internal low voltage level
On blocking for UV1
BlkLowVolt_UV1 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV1 in % of UBase
Operation_UV2 Off - - Off Operation UV2 Off / On
On
StartVolt_UV2 2.0 - 150.0 %UB 0.1 50.0 Operate undervoltage level for UV2 in
% of UBase
CurveType_UV2 Definite time - - Definite time Selection of time delay curve type for
Inverse curve A UV2
Inverse curve B
Prog. inv. curve
tDef_UV2 0.00 - 6000.00 s 0.01 1.00 Operate time delay in sec for definite
time use of UV2
tMin_UV2 0.00 - 6000.00 s 0.01 0.05 Minimum operate time for IDMT
curves for UV2
k_UV2 0.05 - 999.00 - 0.01 0.30 Time multiplier for the dependent
time delay for UV2
EnBlkLowV_UV2 Off - - On Enable internal low voltage level
On blocking for UV2
BlkLowVolt_UV2 0.0 - 5.0 %UB 0.1 0.5 Internal low voltage blocking level for
UV2 in % of UBase
Table 413: CVGAPC Group settings (advanced)

CurrMult_OC1 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current
setting value for OC1
ResCrvType_OC1 Instantaneous - - Instantaneous Selection of reset curve type for OC1
IEC Reset
ANSI reset
tResetDef_OC1 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC1

Technical manual

P_OC1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
programmable curve for OC1
A_OC1 0.000 - 999.000 - 0.001 0.140 Parameter A for customer
B_OC1 0.000 - 99.000 - 0.001 0.000 Parameter B for customer
C_OC1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
PR_OC1 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC1 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC1 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
CurrMult_OC2 1.0 - 10.0 - 0.1 2.0 Multiplier for scaling the current
setting value for OC2
ResCrvType_OC2 Instantaneous - - Instantaneous Selection of reset curve type for OC2
IEC Reset
ANSI reset
tResetDef_OC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve OC2
P_OC2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
A_OC2 0.000 - 999.000 - 0.001 0.140 Parameter A for customer
B_OC2 0.000 - 99.000 - 0.001 0.000 Parameter B for customer
C_OC2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
PR_OC2 0.005 - 3.000 - 0.001 0.500 Parameter PR for customer
TR_OC2 0.005 - 600.000 - 0.001 13.500 Parameter TR for customer
CR_OC2 0.1 - 10.0 - 0.1 1.0 Parameter CR for customer
tResetDef_UC2 0.00 - 6000.00 s 0.01 0.00 Reset time delay used in IEC Definite
Time curve UC2
ResCrvType_OV1 Instantaneous - - Instantaneous Selection of reset curve type for OV1
Frozen timer
Linearly
decreased
tResetDef_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite
time use of OV1
tResetIDMT_OV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT
curves for OV1
A_OV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer
programmable curve for OV1
B_OV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer
C_OV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_OV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer

Technical manual

P_OV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
ResCrvType_OV2 Instantaneous - - Instantaneous Selection of reset curve type for OV2
Frozen timer
Linearly
decreased
tResetDef_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite
time use of OV2
tResetIDMT_OV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT
curves for OV2
A_OV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer
B_OV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer
C_OV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_OV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_OV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
ResCrvType_UV1 Instantaneous - - Instantaneous Selection of reset curve type for UV1
Frozen timer
Linearly
decreased
tResetDef_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite
time use of UV1
tResetIDMT_UV1 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT
curves for UV1
A_UV1 0.005 - 999.000 - 0.001 0.140 Parameter A for customer
programmable curve for UV1
B_UV1 0.500 - 99.000 - 0.001 1.000 Parameter B for customer
C_UV1 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_UV1 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV1 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
ResCrvType_UV2 Instantaneous - - Instantaneous Selection of reset curve type for UV2
Frozen timer
Linearly
decreased
tResetDef_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for definite
time use of UV2
tResetIDMT_UV2 0.00 - 6000.00 s 0.01 0.00 Reset time delay in sec for IDMT
curves for UV2
A_UV2 0.005 - 999.000 - 0.001 0.140 Parameter A for customer
B_UV2 0.500 - 99.000 - 0.001 1.000 Parameter B for customer

Technical manual

C_UV2 0.000 - 1.000 - 0.001 1.000 Parameter C for customer
D_UV2 0.000 - 10.000 - 0.001 0.000 Parameter D for customer
P_UV2 0.001 - 10.000 - 0.001 0.020 Parameter P for customer
Table 414: CVGAPC Non group settings (basic)

Value groups

Table 415: CVGAPC Monitored data

DIROC1 INTEGER 1=Forward - Directional mode of OC1 (nondir,
0=Non- forward,reverse)
directional
2=Reverse
DIROC2 INTEGER 1=Forward - Directional mode of OC2 (nondir,
0=Non- forward,reverse)
directional
2=Reverse
CURRENT REAL - A Measured current value
ICOSFI REAL - A Measured current multiplied with cos
(Phi)
VOLTAGE REAL - kV Measured voltage value
UIANGLE REAL - deg Angle between voltage and current
12.1.7.1 Measured quantities within CVGAPC M13751-3 v4
General current and voltage protection (CVGAPC) function is always connected to three-phase
current and three-phase voltage input in the configuration tool, but it will always measure only
one current and one voltage quantity selected by the end user in the setting tool.
The user can select a current input, by a setting parameter CurrentInput, to measure one of
the current quantities shown in table 416.

Technical manual
Table 416: Current selection for CVGAPC function

Set value for the
parameter Comment
CurrentInput
1 Phase1 CVGAPC function will measure the phase L1 current phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence current
phasor
5 NegSeq CVGAPC function will measure internally calculated negative sequence current
phasor
6 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
7 MaxPh CVGAPC function will measure current phasor of the phase with maximum
magnitude
8 MinPh CVGAPC function will measure current phasor of the phase with minimum
magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance current, which is
internally calculated as the algebraic magnitude difference between the current
phasor of the phase with maximum magnitude and current phasor of the phase
with minimum magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the current phasor internally calculated as the
vector difference between the phase L1 current phasor and phase L2 current
phasor (IL1-IL2)
phasor (IL2-IL3)
phasor ( IL3-IL1)
13 MaxPh-Ph CVGAPC function will measure ph-ph current phasor with the maximum
magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph current phasor with the minimum
magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance current, which is
internally calculated as the algebraic magnitude difference between the ph-ph
current phasor with maximum magnitude and ph-ph current phasor with
minimum magnitude. Phase angle will be set to 0° all the time
The user can select a voltage input, by a setting parameter VoltageInput, to measure one of
the voltage quantities shown in table 417:
Table 417: Voltage selection for CVGAPC function

Set value for the
parameter Comment
VoltageInput
1 Phase1 CVGAPC function will measure the phase L1 voltage phasor
4 PosSeq CVGAPC function will measure internally calculated positive sequence voltage
phasor

Technical manual
Set value for the

parameter Comment
VoltageInput
5 -NegSeq CVGAPC function will measure internally calculated negative sequence voltage
phasor. This voltage phasor will be intentionally rotated for 180° in order to
enable easier settings for the directional feature when used.
6 -3ZeroSeq CVGAPC function will measure internally calculated zero sequence voltage phasor
multiplied by factor 3. This voltage phasor will be intentionally rotated for 180° in
order to enable easier settings for the directional feature when used.
7 MaxPh CVGAPC function will measure voltage phasor of the phase with maximum
magnitude
8 MinPh CVGAPC function will measure voltage phasor of the phase with minimum
magnitude
9 UnbalancePh CVGAPC function will measure magnitude of unbalance voltage, which is
internally calculated as the algebraic magnitude difference between the voltage
phasor of the phase with maximum magnitude and voltage phasor of the phase
with minimum magnitude. Phase angle will be set to 0° all the time
10 Phase1-Phase2 CVGAPC function will measure the voltage phasor internally calculated as the
vector difference between the phase L1 voltage phasor and phase L2 voltage
phasor (UL1-UL2)
phasor (UL2-UL3)
phasor ( UL3-UL1)
13 MaxPh-Ph CVGAPC function will measure ph-ph voltage phasor with the maximum
magnitude
14 MinPh-Ph CVGAPC function will measure ph-ph voltage phasor with the minimum
magnitude
15 UnbalancePh-Ph CVGAPC function will measure magnitude of unbalance voltage, which is
internally calculated as the algebraic magnitude difference between the ph-ph
voltage phasor with maximum magnitude and ph-ph voltage phasor with
minimum magnitude. Phase angle will be set to 0° all the time
Note that the voltage selection from table 417 is always applicable regardless the actual
external VT connections. The three-phase VT inputs can be connected to IED as either three
phase-to-earth voltages, UL1, UL2 and UL3, , and or three phase-to-phase voltages UL1L2, UL2L3
and UL3L1, , and . This information about actual VT connection is entered as a setting
parameter for the pre-processing block, which will then be taken care automatically.
The user can select one of the current quantities shown in table 418 for built-in current
restraint feature:
Table 418: Restraint current selection for CVGAPC function

Set value for the
parameter RestrCurr Comment
1 PosSeq CVGAPC function will measure internally calculated positive sequence current
phasor
2 NegSeq CVGAPC function will measure internally calculated negative sequence current
phasor
3 3ZeroSeq CVGAPC function will measure internally calculated zero sequence current phasor
multiplied by factor 3
4 MaxPh CVGAPC function will measure current phasor of the phase with maximum
magnitude

Technical manual
12.1.7.2 Base quantities for CVGAPC function SEMOD53443-112 v4
The parameter settings for the base quantities, which represent the base (100%) for pickup
levels of all measuring stages shall be entered as setting parameters for every CVGAPC
function.
Base current shall be entered as:
1. rated phase current of the protected object in primary amperes, when the measured
Current Quantity is selected from 1 to 9, as shown in table "".
2. rated phase current of the protected object in primary amperes multiplied by √3 (1.732 x
Iphase), when the measured Current Quantity is selected from 10 to 15, as shown in table
"".
Base voltage shall be entered as:
1. rated phase-to-earth voltage of the protected object in primary kV, when the measured
Voltage Quantity is selected from 1 to 9, as shown in table "".
2. rated phase-to-phase voltage of the protected object in primary kV, when the measured
Voltage Quantity is selected from 10 to 15, as shown in table "".
12.1.7.3 Built-in overcurrent protection steps M13751-136 v3
Two overcurrent protection steps are available. They are absolutely identical and therefore
only one will be explained here.
Overcurrent step simply compares the magnitude of the measured current quantity (see
table 416) with the set pickup level. Non-directional overcurrent step will pickup if the
magnitude of the measured current quantity is bigger than this set level. However depending
on other enabled built-in features this overcurrent pickup might not cause the overcurrent
step start signal. Start signal will only come if all of the enabled built-in features in the
overcurrent step are fulfilled at the same time.
Second harmonic feature M13751-254 v3

The overcurrent protection step can be restrained by a second harmonic component in the
measured current quantity (see table 416). However it shall be noted that this feature is not
applicable when one of the following measured currents is selected:
• PosSeq (positive sequence current)

• NegSeq (negative sequence current)
• UnbalancePh (unbalance phase current)
• UnbalancePh-Ph (unbalance phase-phase current)
This feature will prevent overcurrent step start if the second-to-first harmonic ratio in the
measured current exceeds the set level.
Directional feature M13751-263 v5

The overcurrent protection step operation can be made dependent on the relevant phase
angle between measured current phasor (see table 416) and measured voltage phasor (see
table 417). In protection terminology it means that the General currrent and voltage protection
(CVGAPC) function can be made directional by enabling this built-in feature. In that case
overcurrent protection step will only operate if the current flow is in accordance with the set
direction (Forward, which means towards the protected object, or Reverse, which means from
the protected object). For this feature it is of the outmost importance to understand that the
measured voltage phasor (see table 417) and measured current phasor (see table 416) will be
used for directional decision. Therefore it is the sole responsibility of the end user to select the
appropriate current and voltage signals in order to get a proper directional decision. CVGAPC

Technical manual
function will NOT do this automatically. It will simply use the current and voltage phasors
selected by the end user to check for the directional criteria.
Table 419 gives an overview of the typical choices (but not the only possible ones) for these
two quantities from traditional directional relays.
Table 419: Typical current and voltage choices for directional feature
Set value for the Set value for the
parameter parameter Comment
CurrentInput VoltageInput
PosSeq PosSeq Directional positive sequence overcurrent function is obtained.
Typical setting for RCADir is from 45° to 90° depending on the
power system voltage level (X/R ratio)
NegSeq -NegSeq Directional negative sequence overcurrent function is obtained.
power system voltage level (X/R ratio)
3ZeroSeq -3ZeroSeq Directional zero sequence overcurrent function is obtained.
power system earthing (that is, solidly earthed, earthed via
resistor)
Phase1 Phase2-Phase3 Directional overcurrent function for the first phase is obtained.
Typical setting for RCADir is +30° or +45°
Phase2 Phase3-Phase1 Directional overcurrent function for the second phase is
obtained. Typical setting for RCADir is +30° or +45°
Phase3 Phase1-Phase2 Directional overcurrent function for the third phase is obtained.
Typical setting for RCADir is +30° or +45°
Unbalance current or voltage measurement shall not be used when the directional feature is
enabled.
Two types of directional measurement principles are available, I & U and IcosPhi&U. The first
principle, referred to as "I & U" in the parameter setting tool, checks that:
• the magnitude of the measured current is bigger than the set pick-up level
• the phasor of the measured current is within the operating region (defined by the relay
operate angle, ROADir parameter setting; see figure 364).

Technical manual
U=-3U0
RCADir
Ipickup ROADir I=3Io
Operate region
MTA line
Figure 364: I & U directional operating principle for CVGAPC function
where:
RCADir is 75°
ROADir is 50°
The second principle, referred to as "IcosPhi&U" in the parameter setting tool, checks that:
• that the product I·cos(Φ) is bigger than the set pick-up level, where Φ is angle between the
current phasor and the mta line
• that the phasor of the measured current is within the operating region (defined by the
I·cos(Φ) straight line and the relay operate angle, ROADir parameter setting; see
figure 364).
U=-3U0
Ipickup ROADir  I=3Io
Operate region
MTA line
Figure 365: CVGAPC, IcosPhi&U directional operating principle
where:
RCADir is 75°
ROADir is 50°

Technical manual
Note that it is possible to decide by a parameter setting how the directional feature shall
behave when the magnitude of the measured voltage phasor falls below the pre-set value.
User can select one of the following three options:
• Non-directional (operation allowed for low magnitude of the reference voltage)

• Block (operation prevented for low magnitude of the reference voltage)
• Memory (memory voltage shall be used to determine direction of the current)
It shall also be noted that the memory duration is limited in the algorithm to 100 ms. After that
time the current direction will be locked to the one determined during memory time and it will
re-set only if the current fails below set pickup level or voltage goes above set voltage memory
limit.
Voltage restraint/control feature M13751-326 v4

The overcurrent protection step operation can be made dependent of a measured voltage
quantity (see table 417). Practically then the pickup level of the overcurrent step is not
constant but instead decreases with the decrease in the magnitude of the measured voltage
quantity. Two different types of dependencies are available:
• Voltage restraint overcurrent (when setting parameter VDepMode_OC1=Slope)
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
ULowLimit_OC1 UHighLimit_OC1
Selected Voltage
Magnitude
en05000324.vsd
Figure 366: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Slope mode of operation
• Voltage controlled overcurrent (when setting parameter VDepMode_OC1=Step)

Technical manual
OC1 Stage Pickup Level
StartCurr_OC1
VDepFact_OC1 * StartCurr_OC1
UHighLimit_OC1 Selected Voltage Magnitude
en05000323.vsd
Figure 367: Example for OC1 step current pickup level variation as function of measured
voltage magnitude in Step mode of operation
This feature will simply change the set overcurrent pickup level in accordance with magnitude
variations of the measured voltage. It shall be noted that this feature will as well affect the
pickup current value for calculation of operate times for IDMT curves (overcurrent with IDMT
curve will operate faster during low voltage conditions).
Current restraint feature M13751-338 v3

The overcurrent protection step operation can be made dependent of a restraining current
quantity (see table 418). Practically then the pickup level of the overcurrent step is not
constant but instead increases with the increase in the magnitude of the restraining current.
IMeasured
ea ain
ar str
e Ire
at ff*
per e
O Co
estr
I>R
IsetHigh
IsetLow
atan(RestrCoeff)
Restraint
en05000255.vsd
Figure 368: Current pickup variation with restraint current magnitude

This feature will simply prevent overcurrent step to start if the magnitude of the measured
current quantity is smaller than the set percentage of the restrain current magnitude. However
this feature will not affect the pickup current value for calculation of operate times for IDMT
curves. This means that the IDMT curve operate time will not be influenced by the restrain
current magnitude.

Technical manual
When set, the start signal will start definite time delay or inverse (IDMT) time delay in
accordance with the end user setting. If the start signal has value one for longer time than the
set time delay, the overcurrent step will set its trip signal to one. Reset of the start and trip
signal can be instantaneous or time delay in accordance with the end user setting.
12.1.7.4 Built-in undercurrent protection steps M13751-231 v2
Two undercurrent protection steps are available. They are absolutely identical and therefore
only one will be explained here. Undercurrent step simply compares the magnitude of the
measured current quantity (see table 416) with the set pickup level. The undercurrent step will
pickup and set its start signal to one if the magnitude of the measured current quantity is
smaller than this set level. The start signal will start definite time delay with set time delay. If
the start signal has value one for longer time than the set time delay the undercurrent step will
set its trip signal to one. Reset of the start and trip signal can be instantaneous or time delay
in accordance with the setting.
12.1.7.5 Built-in overvoltage protection steps M13751-234 v3
Two overvoltage protection steps are available. They are absolutely identical and therefore
Overvoltage step simply compares the magnitude of the measured voltage quantity (see
table 417) with the set pickup level. The overvoltage step will pickup if the magnitude of the
measured voltage quantity is bigger than this set level.
The start signal will start definite time delay or inverse (IDMT) time delay in accordance with
the end user setting. If the start signal has value one for longer time than the set time delay,
the overvoltage step will set its trip signal to one. Reset of the start and trip signal can be
instantaneous or time delay in accordance with the end user setting.
12.1.7.6 Built-in undervoltage protection steps M13751-239 v3
Two undervoltage protection steps are available. They are absolutely identical and therefore
Undervoltage step simply compares the magnitude of the measured voltage quantity (see
table 417) with the set pickup level. The undervoltage step will pickup if the magnitude of the
measured voltage quantity is smaller than this set level.
The start signal will start definite time delay or inverse (IDMT) time delay in accordance with
the end user setting. If the start signal has value one for longer time than the set time delay,
the undervoltage step will set its trip signal to one. Reset of the start and trip signal can be
instantaneous or time delay in accordance with the end user setting.
The simplified internal logics, for CVGAPC function are shown in the following figures.
The following currents and voltages are inputs to the multipurpose protection function. They
must all be expressed in true power system (primary) Amperes and kilovolts.
1. Instantaneous values (samples) of currents & voltages from one three-phase current and
one three-phase voltage input.
2. Fundamental frequency phasors from one three-phase current and one three-phase
voltage input calculated by the pre-processing modules.
3. Sequence currents & voltages from one three-phase current and one three-phase voltage
input calculated by the pre-processing modules.

Technical manual
The multipurpose protection function:
1. Selects one current from the three-phase input system (see table 416) for internally
measured current.
2. Selects one voltage from the three-phase input system (see table 417) for internally
measured voltage.
3. Selects one current from the three-phase input system (see table 418) for internally
measured restraint current.

Technical manual
CURRENT
UC1
TRUC1
2nd Harmonic
Selected current restraint
STUC2
UC2
nd
TRUC2
2 Harmonic
restraint
STOC1
OC1 TROC1
2nd Harmonic BLK2ND

restraint ³1
Selected restraint current
Current restraint
DIROC1
Directionality
Voltage control /
restraint
STOC2
OC2 TROC2
2nd Harmonic
restraint
Current restraint ³1
UDIRLOW
Directionality DIROC2
Voltage control /
restraint
STOV1
OV1 TROV1
STOV2
OV2 TROV2
STUV1
Selected voltage
UV1 TRUV1
STUV2
UV2 TRUV2
VOLTAGE
en05000170.vsd
Figure 369: CVGAPC function main logic diagram for built-in protection elements
Logic in figure 369 can be summarized as follows:

Technical manual
1. The selected currents and voltage are given to built-in protection elements. Each
protection element and step makes independent decision about status of its START and
TRIP output signals.
2. More detailed internal logic for every protection element is given in the following four
figures.
3. Common START and TRIP signals from all built-in protection elements & steps (internal OR
logic) are available from multipurpose function as well.
a
a>b AND
BlkLevel2nd b
Enable
second Second harmonic
harmonic check DEF time BLKTRO C1 TROC1
selected DEF AND
OR
a
a>b
b
OC1=On STOC1
AND
StartCurr_OC1 BLKOC1
X
Inverse
Voltage Directionali ty DIR_OK Inverse

control or time
check selected
restrai nt
feature
Selected v oltage
Curren t
Restrai nt
Feature
Selected restrain current Imea sure d > k Irestra int
Figure 370: Simplified internal logic diagram for built-in first overcurrent step that is, OC1 (step OC2 has
the same internal logic)
Bin input: BLKUC1TR
Selected current a TRUC1

b>a
DEF AND
b
StartCurr_UC1
AND
Operation_UC1=On
STUC1
Bin input: BLKUC1
en05000750.vsd
Figure 371: Simplified internal logic diagram for built-in first undercurrent step that is, UC1 (step UC2
has the same internal logic)

Technical manual
DEF time BLKTROV1

selected DEF TROV1
AND
OR
Selected voltage a
a>b
b STOV1
StartVolt_OV1
AND
Inverse
Operation_OV1=On
Inverse time
BLKOV1 selected
en05000751.vsd
Figure 372: Simplified internal logic diagram for built-in first overvoltage step OV1 (step OV2 has the
same internal logic)
DEF time BLKTRUV

selected DEF 1 TRUV1
AND
OR
Selected voltage a
b>a
b STUV1
AND
StartVolt_UV1
Inverse
Operation_UV1=On
Inverse time
BLKUV1 selected
en05000752.vsd
Figure 373: Simplified internal logic diagram for built-in first undervoltage step UV1 (step UV2 has the
same internal logic)

Technical manual

M13095-2 v11
Table 420: CVGAPC technical data

Measuring current input phase1, phase2, phase3, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh,
MinPh, UnbalancePh, phase1-
phase2, phase2-phase3, phase3-
phase1, MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Measuring voltage input phase1, phase2, phase3, PosSeq, - -
NegSeq, -3*ZeroSeq, MaxPh,
MinPh, UnbalancePh, phase1-
phase2, phase2-phase3, phase3-
phase1, MaxPh-Ph, MinPh-Ph,
UnbalancePh-Ph
Start overcurrent, step 1 - 2 (2 - 5000)% of IBase ±1.0% of Ir at I ≤ Ir
Start undercurrent, step 1 - 2 (2 - 150)% of IBase ±1.0% of Ir at I ≤ Ir

Independent time delay, overcurrent (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

at 0 to 2 x Iset, step 1 - 2 greater
Independent time delay, undercurrent (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

at 2 x Iset to 0, step 1 - 2 greater
Overcurrent (non-directional):
Start time at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Max. = 30 ms
Max. = 20 ms
Max. = 35 ms
Undercurrent:
Start time at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Reset time at 0 to 2 x Iset Min. = 15 ms -
Max. = 30 ms
Overcurrent:
Inverse time characteristics, see table 16 curve types See table 1150, 1151 and table
1150, 1151 and table 1152 1152
Overcurrent:
Minimum operate time for inverse (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
curves, step 1 - 2 greater
Voltage level where voltage memory (0.0 - 5.0)% of UBase ±0.5% of Ur
takes over
Start overvoltage, step 1 - 2 (2.0 - 200.0)% of UBase ±0.5% of Ur at U ≤ Ur
Start undervoltage, step 1 - 2 (2.0 - 150.0)% of UBase ±0.5% of Ur at U ≤ Ur

Independent time delay, overvoltage (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is

at 0.8 x Uset to 1.2 x Uset, step 1 - 2 greater

Technical manual

Independent time delay, undervoltage (0.00 - 6000.00) s ±0.2% or ±35 ms whichever is
at 1.2 x Uset to 0.8 x Uset, step 1 - 2 greater
Overvoltage:
Start time at 0.8 x Uset to 1.2 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Undervoltage:
Start time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Reset time at 1.2 x Uset to 0.8 x Uset Min. = 15 ms -
Max. = 30 ms
Overvoltage:
Inverse time characteristics, see table 4 curve types See table 1158
1158
Undervoltage:
Inverse time characteristics, see table 3 curve types See table 1159
1159
High and low voltage limit, voltage (1.0 - 200.0)% of UBase ±1.0% of Ur at U ≤ Ur
dependent operation, step 1 - 2 ±1.0% of U at U > Ur
Directional function Settable: NonDir, forward and -

reverse
Relay characteristic angle (-180 to +180) degrees ±2.0 degrees
Relay operate angle (1 to 90) degrees ±2.0 degrees
Reset ratio, overcurrent > 95% -
Reset ratio, undercurrent < 105% -
Reset ratio, overvoltage > 95% -
Operate frequency 10-90 Hz -
Overcurrent:

Undercurrent:
Critical impulse time 10 ms typically at 2 x Iset to 0 -

Overvoltage:
Critical impulse time 10 ms typically at 0.8 x Uset to 1.2 x -
Uset

Undervoltage:
Critical impulse time 10 ms typically at 1.2 x Uset to 0.8 x -
Uset

Technical manual
System protection and control
Section 13 System protection and control

13.1 Multipurpose filter SMAIHPAC GUID-6B541154-D56B-452F-B143-4C2A1B2D3A1F v1
13.1.1 Identification GUID-8224B870-3DAA-44BF-B790-6600F2AD7C5D v1

Multipurpose filter SMAIHPAC - -
13.1.2 Functionality GUID-EB0B11C3-FF79-4B8D-A335-649623E832F9 v3
The multi-purpose filter function block (SMAIHPAC) is arranged as a three-phase filter. It has
very much the same user interface (e.g. inputs and outputs) as the standard pre-processing
function block SMAI. However the main difference is that it can be used to extract any
frequency component from the input signal. Thus it can, for example, be used to build sub-
synchronous resonance protection for synchronous generator.
13.1.3 Function block GUID-FA590757-0DB1-4605-9DE2-20FA8304795F v1
SMAIHPAC
BLOCK AI3P
G3P* AI1
AI2
AI3
AI4
13.1.4 Signals GUID-DF7C833A-9AB9-40CA-867B-950AC1F662B5 v1
Table 421: SMAIHPAC Input signals

G3P GROUP - Analog input group from SMAI
SIGNAL
Table 422: SMAIHPAC Output signals

AI3P GROUP SIGNAL Analog input 3-phase group
AI1 GROUP SIGNAL Analog input 1

Technical manual
13.1.5 Settings GUID-5EA398AD-66E2-4240-8918-4332995CED11 v1
Table 423: SMAIHPAC Non group settings (basic)

ConnectionType Ph - Ph - - Ph - N Analogue input connection type
Ph - N
SetFrequency 2.0 - 500.0 Hz 0.1 50.0 Desired frequency to be extracted by
the filter
FreqBandWidth 0.0 - 60.0 Hz 0.1 0.0 Extra added frequency band around
the set frequency
FilterLength 0.1 s - - 1.0 s Approximate length of the filtering
0.2 s window in seconds
0.5 s
1.0 s
2.0 s
4.0 s
OverLap 0 - 95 % 5 20 Filtering window overlap between two
calculations in percent
13.1.6 Operation principle GUID-262C1783-3A0A-46B6-99FC-1202AE8E7519 v2
For all four analogue input signals into this filter (i.e. three phases and the residual quantity)
the input samples from the TRM module which are coming at rate of 20 samples per
fundamental system cycle are first stored. When enough samples are available in the internal
memory, the phasor values at set frequency defined by the setting parameter SetFrequency
are calculated. The following values are internally available for each of the calculated phasors:
• Magnitude
• Phase angle
• Exact frequency of the extracted signal
Note that the special filtering algorithm is used to extract these phasors. This algorithm is
different from the standard one-cycle Digital Fourier Filter typically used by the numerical
IEDs. This filter provides extremely good accuracy of measurement and excellent noise
rejection, but at the same time it has much slower response time. It is capable to extract
phasor (i.e. magnitude, phase angle and actual frequency) of any signal (e.g. 37,2Hz) present in
the waveforms of the connected CTs and/or VTs. The magnitude and the phase angle of this
phasor are calculated with very high precision. For example the magnitude and phase angle of
the phasor can be estimated even if it has magnitude of one per mille (i.e. 1‰ ) in comparison
to the dominating signal (e.g. the fundamental frequency component). Several instances of
this function block are provided. These instances are fully synchronized between each-other in
respect of phase angle calculation. Thus if two multi-purpose filters are used for some
application, one for current and the second one for the voltage signals, the power values (i.e. P
& Q) at the set frequency can be calculated from them by the over-/under-power function or
CVMMXN measurement function block.
In addition to these phasors the following quantities are internally calculated as well:
• Phasors for the individual phases as well as phase-to-phase phasors

• True RMS value of the input signal over all samples available in the memory
• Positive sequence phasor
• Negative sequence phasor
• Zero sequence phasor
• etc.

Technical manual
In order to properly calculate phase-to-phase phasors from the individual phase phasors or
vice versa, the setting parameters ConnectionType is provided. It defines what quantities (i.e.
individual phases or phase-to-phase quantities) are physically connected to the IED analogue
inputs by wiring. Then the IED knows which one of them are the measured quantities and the
other one is then internally calculated. This setting is only important for the VT inputs, because
the CTs are typically star connected all the time.
Thus when this filter is used in conjunction with multi-purpose protection function or
overcurrent function or over-voltage function or over-power function many different
protection applications can be arranged. For example the following protection, monitoring or
measurement features can be realized:
• Sub-synchronous resonance protection for turbo generators

• Sub-synchronous protection for wind turbines/wind farms
• Detection of sub-synchronous oscillation between HVDC links and synchronous
generators
• Super-synchronous protection
• Detection of presence of the geo-magnetic induced currents
• Overcurrent or overvoltage protection at specific frequency harmonic, sub-harmonic,
inter-harmonic etc.
• Presence of special railway frequencies (e.g. 16.7Hz or 25Hz) in the three-phase power
system
• Sensitive reverse power protection
• Stator or rotor earth fault protection for special injection frequencies (e.g. 25Hz)
• etc.
The filter output can also be connected to the measurement function blocks such as CVMMXN
(Measurements), CMMXU (Phase current measurement), VMMXU (Phase-phase voltage
measurement), etc.
The filter has as well additional capability to report the exact frequency of the extracted signal.
Thus the user can check the actual frequency of some phenomenon in the power system (e.g.
frequency of the sub-synchronous currents) and compare it with expected value obtained
previously by either calculation or simulation. For the whole three-phase filter group the
frequency of the signal connected to the first input (i.e. phase L1) is reported. This value can be
then used either by over-/under-frequency protections or reported to the built-in HMI or any
other external client via the measurement blocks such is the CVMMXN.
How many samples in the memory are used for the phasor calculation depends on the setting
parameter FilterLength. Table 424 gives overview of the used number of samples for phasor
calculation by the filter. Note that the used number of samples is always a power of number
two.
Table 424: Length of the filtering window

Value for parameter Used No of samples for Corresponding length of Corresponding length of
FilterLength calculation (fixed, the input waveform in the input waveform in
independent from rated miliseconds for 50Hz miliseconds for 60Hz
frequency) power system power system
0.1 s 128 = 27 128 ms 107 ms
0.2 s 256 = 28 256 ms 213 ms
0.5 s 512 = 29 512 ms 427 ms
1.0 s 1024 = 210 1024 ms 853 ms
2.0 s 2048 = 211 2048 ms 1707 ms
4.0 s 4096 = 212 4096 ms 3413 ms

Technical manual
Note that the selected value for the parameter FilterLength automatically defines certain filter
properties as described below:
First in order to secure proper filter operation the selected length of the filter shall always be
longer than three complete periods of the signal which shall be extracted. Actually the best
results are obtained if at least five complete periods are available within the filtering window.
Thus, this filter feature will limit which filter lengths can be used to extract low frequency
signals. For example if 16,7 Hz signal shall be extracted the minimum filter length in
milliseconds shall be:
1000
3× = 180ms
16.7
Thus based on the data from Table 424 the minimum acceptable value for this parameter
would be “FilterLength = 0.2 s” but more accurate results will be obtained by using
“FilterLength = 0.5 s”
Second feature which is determined by the selected value for parameter FilterLength is the
capability of the filter to separate the desired signal from the other disturbing signals which
may have similar frequency value. Note that the filter output will be the phasor with the
highest magnitude within certain “pass frequency band” around the SetFrequency. Table 425
defines the natural size of this pass frequency band for the filter, depending on the selected
value for parameter FilterLength.
Table 425: Pass frequency band due to FilterLength

Value for parameter FilterLength For 50Hz power system For 60Hz power system
0.1 s ±22.5 Hz ±27.0 Hz
0.2 s ±11.5 Hz ±14.0 Hz
0.5 s ±6.0 Hz ±7.2 Hz
1.0 s ±3.0 Hz ±3.6 Hz
2.0 s ±1.5 Hz ±1.8 Hz
4.0 s ±0.8 Hz ±1.0 Hz
Thus the longer length of the filter the better capability it has to reject the disturbing signals
close to the required frequency component and any other noise present in the input signal
waveform. For example if 46 Hz signal wants to be extracted in 50Hz power system, then from
Table 425 it can be concluded that “FilterLength=1,0 s” shall be selected as a minimum value.
However if frequency deviation of the fundamental frequency signal in the power system are
taken into account it may be advisable to select “FilterLength=2,0 s” for such application.
Note that in case when no clear magnitude peak exist in the set pass frequency band the filter
will return zero values for the phasor magnitude and angle while the signal frequency will have
value minus one. Finally the set value for parameter FilterLength also defines the response
time of the filter after a step change of the measured signal. The filter will correctly estimate
the new signal magnitude once 75% of the filter length has been filed with the new signal value
(i.e. after the change).
If for any reason this natural frequency band shall be extended (e.g. to get accurate but wider
filter) it is possible to increase the pass band by entering the value different from zero for
parameter FreqBandWidth. In such case the total filter pass band can be defined as:
± (value given in Table 425 + one-half of the set FreqBandWidth value)
Example if in 60Hz system the selected values are “FilterLength =1.0 s” and “FreqBandWidth =
5.0” the total filter pass band will be ±(3.6+5.0/2)= ± 6.1 Hz.

Technical manual
It shall be noted that the phasor calculation is relatively computation demanding (required
certain amount of the CPU processing time). In order to control the CPU usage for this filter,
the setting parameter OverLap is used. This setting parameter defines how often the new
phasor value is calculated during time period defined by the set value for the parameter
FilterLength (see Table 424). The following list gives some examples how this parameter
influence the calculation rate for the extracted phasor:
• when OverLap=0% the new phasor value is calculated only once per FilterLength
• when OverLap=50% the new phasor value is calculated two times per FilterLength
• when OverLap=75% the new phasor value is calculated four times per FilterLength
• when OverLap=90% the new phasor value is calculated ten times per FilterLength
13.1.7 Filter calculation example GUID-F5828B0A-CED3-483E-B5B1-F389C3C2AEFB v3
In the following Figure an example from an installation of this filter on a large, 50 Hz turbo
generator with a rating in excess of 1000 MVA is presented. In this installation filter is used to
measure the stator sub-synchronous resonance currents. For this particular installation the
following settings were used for the filter:
• SetFrequency= 31.0 Hz
• FilterLength= 1.0 s
• OverLap = 75%
• FreqBandWidth= 0.0 Hz
Figure 374: Example of filter calculation

The data shown in the Figure comes from the comtrade file captured by the IED. The following
traces are presented in this Figure.
a) Waveforms of the stator three-phase currents given in primary kA.
b) RMS value of the sub-synchronous resonance current extracted by the filter in primary
amperes.

Technical manual
c) Frequency of the extracted sub-synchronous resonance current provided by the filter in Hz.
Note the very narrow scale on the y-axle for b) and c). Such small scale as well indicates with
which precision and consistency the filter calculates the phasor magnitude and frequency of
the extracted stator sub-synchronous current component.
The following can be observed in the Figure:
• The stator total RMS current value is around 33 kA primary.

• The measured magnitude of the sub-synchronous current is around 173 A primary (that is,
0.5% of the fundamental 50 Hz component).
• The frequency of this sub-synchronous current component is 31.24 Hz.
With above given settings the sub-synchronous current magnitude and frequency are
calculated approximately four times per second (that is, correct value is four times per 1024
ms).

Technical manual
Secondary system supervision
Section 14 Secondary system supervision

14.1 Current circuit supervision CCSSPVC IP14555-1 v5
M14870-1 v5

Current circuit supervision CCSSPVC - 87
Open or short circuited current transformer cores can cause unwanted operation of many
protection functions such as differential, earth-fault current and negative-sequence current
functions.
Current circuit supervision (CCSSPVC) compares the residual current from a three phase set of
current transformer cores with the neutral point current on a separate input taken from
another set of cores on the current transformer.
A detection of a difference indicates a fault in the circuit and is used as alarm or to block
protection functions expected to give inadvertent tripping.
CCSSPVC
I3P* FAIL
IREF* ALARM
BLOCK
Figure 375: CCSSPVC function block
Signal ISIREF must be connected in the configuration.
14.1.4 Signals
Table 426: CCSSPVC Input signals

I3P GROUP - Group signal for three phase current input
SIGNAL
IREF GROUP - Residual reference current input
SIGNAL

Technical manual
Table 427: CCSSPVC Output signals

FAIL BOOLEAN Detection of current circuit failure
ALARM BOOLEAN Alarm for current circuit failure
14.1.5 Settings
Table 428: CCSSPVC Group settings (basic)

On
IMinOp 10 - 200 %IB 1 20 Minimum operate current differential
level in % of IBase
Table 429: CCSSPVC Group settings (advanced)

Ip>Block 20 - 500 %IB 1 150 Block of the function at high phase
current, in % of IBase
Table 430: CCSSPVC Non group settings (basic)

Value groups
Current circuit supervision CCSSPVC compares the absolute value of the vectorial sum of the
three phase currents |ΣIphase| and the absolute value of the residual current |Iref| from
another current transformer set, see figure 376.
The FAIL output will be set to high when the following criteria are fulfilled:
• The numerical value of the difference |ΣIphase| – |Iref| is higher than 80% of the numerical
value of the sum |ΣIphase| + |Iref|.
• The numerical value of the current |ΣIphase| – |Iref| is equal to or higher than the set
operate value IMinOp.
• No phase current has exceeded Ip>Block during the last 10 ms.
• CCSSPVC is enabled by setting Operation = On.
The FAIL output remains activated 100 ms after the AND-gate resets when being activated for
more than 20 ms. If the FAIL lasts for more than 150 ms an ALARM will be issued. In this case
the FAIL and ALARM will remain activated 1 s after the AND-gate resets. This prevents
unwanted resetting of the blocking function when phase current supervision element(s)
operate, for example, during a fault.

Technical manual
IL1 IL1 I>1.054 * IMinOp

IL2 IL2 +
IL3 IL3  -
+ +
I ref Iref + x -
0,8
I>IP>Block
10 ms AND
OR FAIL
OR t
40 ms 100 ms
170 ms 3000 ms ALARM

OPERATION
BLOCK
Figure 376: Simplified logic diagram for Current circuit supervision CCSSPVC
The operate characteristic is percentage restrained, which is shown in Figure 377.
| åI phase | - | I ref |
Slope = 1
Operation
Slope = 0.8
area
I MinOp
| åI phase | + | I ref |
99000068.vsd
Figure 377: Operate characteristics
Due to the formulas for the axis compared, |SIphase | - |I ref | and |S I phase | + |
I ref | respectively, the slope can not be above 1.

M12358-1 v10
Table 431: CCSSPVCtechnical data

Operate current (10-200)% of IBase ±10.0% of Ir at I ≤ Ir
±10.0% of I at I > Ir
Reset ratio, Operate current >90%

Block current (20-500)% of IBase ±5.0% of Ir at I ≤ Ir
Reset ratio, Block current >90% at (50-500)% of IBase

Technical manual
14.2 Fuse failure supervision FUFSPVC IP14556-1 v3
M14869-1 v4

Fuse failure supervision FUFSPVC - -
The aim of the fuse failure supervision function (FUFSPVC) is to block voltage measuring
functions at failures in the secondary circuits between the voltage transformer and the IED in
order to avoid inadvertent operations that otherwise might occur.
The fuse failure supervision function basically has three different detection methods, negative
sequence and zero sequence based detection and an additional delta voltage and delta current
detection.
The negative sequence detection algorithm is recommended for IEDs used in isolated or high-
impedance earthed networks. It is based on the negative-sequence quantities.
The zero sequence detection is recommended for IEDs used in directly or low impedance
earthed networks. It is based on the zero sequence measuring quantities.
The selection of different operation modes is possible by a setting parameter in order to take
into account the particular earthing of the network.
A criterion based on delta current and delta voltage measurements can be added to the fuse
failure supervision function in order to detect a three phase fuse failure, which in practice is
more associated with voltage transformer switching during station operations.
FUFSPVC
I3P* BLKZ
U3P* BLKU
BLOCK 3PH
CBCLOSED DLD1PH
MCBOP DLD3PH
DISCPOS STDI
BLKTRIP STDIL1
STDIL2
STDIL3
STDU
STDUL1
STDUL2
STDUL3
Figure 378: FUFSPVC function block

Technical manual
14.2.4 Signals
Table 432: FUFSPVC Input signals

I3P GROUP - Current connection
SIGNAL
SIGNAL
CBCLOSED BOOLEAN 0 Active when circuit breaker is closed
MCBOP BOOLEAN 0 Active when external MCB opens protected voltage circuit
DISCPOS BOOLEAN 0 Active when line disconnector is open
BLKTRIP BOOLEAN 0 Blocks operation of function when active
Table 433: FUFSPVC Output signals

BLKZ BOOLEAN Start of current and voltage controlled function
BLKU BOOLEAN General start of function
3PH BOOLEAN Three-phase start of function
DLD1PH BOOLEAN Dead line condition in at least one phase
DLD3PH BOOLEAN Dead line condition in all three phases
STDI BOOLEAN Common start signal of sudden change in current
STDIL1 BOOLEAN Start signal of sudden change in current, phase L1
STDU BOOLEAN Common start signal of sudden change in voltage
STDUL1 BOOLEAN Start signal of sudden change in voltage, phase L1

Technical manual
14.2.5 Settings
Table 434: FUFSPVC Group settings (basic)

On
OpMode Off - - UZsIZs Operating mode selection
UNsINs
UZsIZs
UZsIZs OR
UNsINs
UZsIZs AND
UNsINs
OptimZsNs
3U0> 1 - 100 %UB 1 30 Operate level of residual overvoltage
element in % of UBase
3I0< 1 - 100 %IB 1 10 Operate level of residual undercurrent
element in % of IBase
3U2> 1 - 100 %UB 1 30 Operate level of neg seq overvoltage
element in % of UBase
3I2< 1 - 100 %IB 1 10 Operate level of neg seq undercurrent
element in % of IBase
OpDUDI Off - - Off Operation of change based function
On Off/On
DU> 1 - 100 %UB 1 60 Operate level of change in phase
voltage in % of UBase
DI< 1 - 100 %IB 1 15 Operate level of change in phase
current in % of IBase
UPh> 1 - 100 %UB 1 70 Operate level of phase voltage in % of
UBase
IPh> 1 - 100 %IB 1 10 Operate level of phase current in % of
IBase
SealIn Off - - On Seal in functionality Off/On
On
USealln< 1 - 100 %UB 1 70 Operate level of seal-in phase voltage
in % of UBase
IDLD< 1 - 100 %IB 1 5 Operate level for open phase current
detection in % of IBase
UDLD< 1 - 100 %UB 1 60 Operate level for open phase voltage
detection in % of UBase
Table 435: FUFSPVC Non group settings (basic)

Value groups

Technical manual

Table 436: FUFSPVC Monitored data

3I0 REAL - A Magnitude of zero sequence current
3I2 REAL - A Magnitude of negative sequence
current
3U0 REAL - kV Magnitude of zero sequence voltage
3U2 REAL - kV Magnitude of negative sequence
voltage
14.2.7.1 Zero and negative sequence detection M13677-3 v5
The zero and negative sequence function continuously measures the currents and voltages in
all three phases and calculates, see figure 379:
• the zero-sequence voltage 3U0

• the zero-sequence current 3I0
• the negative sequence current 3I2
• the negative sequence voltage 3U2
The measured signals are compared with their respective set values 3U0> and 3I0<, 3U2> and
3I2<.
The function enable the internal signal FuseFailDetZeroSeq if the measured zero-sequence
voltage is higher than the set value 3U0> and the measured zero-sequence current is below the
set value 3I0<.
The function enable the internal signal FuseFailDetNegSeq if the measured negative sequence
voltage is higher than the set value 3U2> and the measured negative sequence current is below
the set value 3I2<.
A drop out delay of 100 ms for the measured zero-sequence and negative sequence current will
prevent a false fuse failure detection at un-equal breaker opening at the two line ends.

Technical manual
Sequence Detection
3I0< CurrZeroSeq
IL1
Zero 3I0
sequence
filter 100 ms CurrNegSeq
a
IL2 a>b t
b
Negative 3I2
sequence
IL3 filter FuseFailDetZeroSeq
AND
100 ms
a
a>b t
3I2
VoltZeroSeq
UL1
Zero
sequence a 3U0
a>b
b
filter
UL2 VoltNegSeq
Negative
sequence a 3U2
a>b
UL3 filter b
3U2>
Figure 379: Simplified logic diagram for sequence detection part

The calculated values 3U0, 3I0, 3I2 and 3U2 are available as service values on local HMI and
monitoring tool in PCM600.
Input and output signals M13677-19 v6

The output signals 3PH, BLKU and BLKZ as well as the signals DLD1PH and DLD3PH from dead
line detections are blocked if any of the following conditions occur:
• The input BLOCK is activated

• The input BLKTRIP is activated and the internal signal FuseFailStarted is not present
• The operation mode selector OpMode is set to Off
• The IED is in TEST status (TEST-ACTIVE is high) and the function has been blocked from
the HMI (BlockFUSE=Yes)
The input BLOCK signal is a general purpose blocking signal of the fuse failure supervision
function. It can be connected to a binary input of the IED in order to receive a block command
from external devices or can be software connected to other internal functions of the IED itself
in order to receive a block command from internal functions. Through OR gate it can be
connected to both binary inputs and internal function outputs.
The input BLKTRIP is intended to be connected to the trip output from any of the protection
functions included in the IED. When activated for more than 20 ms, the operation of the fuse
failure is blocked; a fixed drop-out timer prolongs the block for 100 ms. The aim is to increase
the security against unwanted operations during the opening of the breaker, which might
cause unbalance conditions for which the fuse failure might operate.
The output signal BLKZ will also be blocked if the internal dead line detection is activated. The
dead line detection signal has a 200 ms drop-out time delay.
The input signal MCBOP is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The
MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related
functions when the MCB is open independent of the setting of OpMode selector. The
additional drop-out timer of 150 ms prolongs the presence of MCBOP signal to prevent the
unwanted operation of voltage dependent function due to non simultaneous closing of the
main contacts of the miniature circuit breaker.

Technical manual
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in
order to block the voltage related functions when the line disconnector is open. The
impedance protection function is not affected by the position of the line disconnector since
there will be no line currents that can cause malfunction of the distance protection. If
DISCPOS=0 it signifies that the line is connected to the system and when the DISCPOS=1 it
signifies that the line is disconnected from the system and the block signal BLKU is generated.
The output BLKU can be used for blocking the voltage related measuring functions
(undervoltage protection, energizing check and so on) except for the impedance protection.
The function output BLKZ shall be used for blocking the impedance protection function.
14.2.7.2 Delta current and delta voltage detection M13685-3 v7
A simplified diagram for the functionality is found in figure 380. The calculation of the changes
of currents and voltages is based on a sample analysis algorithm. The calculated delta
quantities are compared with their respective set values DI< and DU>. The algorithm detects a
fuse failure if a sufficient change in voltage without a sufficient change in current is detected
in each phase separately. The following quantities are calculated in all three phases:
• The change in voltage DU

• The change in current DI
The internal FuseFailDetDUDI signal is activated if the following conditions are fulfilled:
• The magnitude of the phase-ground voltage has been above UPh> for more than 1.5 cycles
(i.e. 30 ms in a 50 Hz system)
• The magnitudes of DU in three phases are higher than the corresponding setting DU>
• The magnitudes of DI in three phases are below the setting DI<
In addition to the above conditions, at least one of the following conditions shall be fulfilled in
order to activate the internal FuseFailDetDUDI signal:
• The magnitude of the phase currents in three phases are higher than the setting IPh>
• The circuit breaker is closed (CBCLOSED = True)
The first criterion means that detection of failure in three phases together with high current
for the three phases will set the output. The measured phase current is used to reduce the risk
of false fuse failure detection. If the current on the protected line is low, a voltage drop in the
system (not caused by fuse failure) may be followed by current change lower than the setting
DI<, and therefore a false fuse failure might occur.
The second criterion requires that the delta condition shall be fulfilled at the same time as
circuit breaker is closed. If CBCLOSED input is connected to FALSE , then only the first criterion
can enable the delta function.If the DUDI detections of three phases set the internal signal
FuseFailDetDUDI at the level high, then the signal FuseFailDetDUDI will remain high as long as
the voltages of three phases are lower then the setting Uph>.
In addition to fuse failure detection, two internal signals DeltaU and DeltaI are also generated
by the delta current and delta voltage DUDI detection algorithm. The internal signals DelatU
and DeltaI are activated when a sudden change of voltage, or respectively current, is detected.
The detection of the sudden change is based on a sample analysis algorithm. In particular
DelatU is activated if at least three consecutive voltage samples are higher then the setting
DU>. In a similar way DelatI is activated if at least three consecutive current samples are higher
then the setting DI<. When DeltaU or DeltaI are active, the output signals STDUL1, STDUL2,
STDUL3 and respectively STDIL1, STDIL2, STDIL3, based on a sudden change of voltage or
current detection, are activated with a 20 ms time off delay. The common start output signals

Technical manual
STDU or STDI are activated with a 60 ms time off delay, if any sudden change of voltage or
current is detected.
The delta function (except the sudden change of voltage and current detection)
is deactivated by setting the parameter OpDUDI to Off.
DUDI Detection
DUDI detection Phase 1
DeltaIL1
IL1
IL2
IL3 DI detection based on sample analysis OR
DI<
UL1
DU detection based on sample analysis

AND
DU>
1.5 cycle 20 ms DeltaUL1
a
a>b t t
UPh> b
IL1 DeltaIL2
IL2 DUDI detection Phase 2
DeltaUL2
IL3
UL2 Same logic as for phase 1
IL1 DeltaIL3
DUDI detection Phase 3
IL2
DeltaUL3
IL3
UL3 Same logic as for phase 1
UL1
a
ab
IPh> b AND
OR AND
CBCLOSED AND OR
UL2
a
ab
b AND
OR AND
AND OR
UL3
a
ab
b AND
OR AND
AND OR FuseFailDetDUDI
AND
Figure 380: Simplified logic diagram for the DU/DI detection part

Technical manual
intBlock
STDI
AND
20 ms
DeltaIL1 STDIL1
t AND
OR
20 ms
DeltaIL2
t STDIL2
AND
20 ms
DeltaIL3
t
STDIL3
AND
STDU
AND
20 ms
DeltaUL1 STDUL1
t AND
OR
20 ms
DeltaUL2
t STDUL2
AND
20 ms
DeltaUL3
t
STDUL3
AND
Figure 381: Internal signals DeltaU or DeltaI and the corresponding output signals
14.2.7.3 Dead line detection M13679-44 v4
A simplified diagram for the functionality is found in figure 382. A dead phase condition is
indicated if both the voltage and the current in one phase is below their respective setting
values UDLD< and IDLD<. If at least one phase is considered to be dead the output DLD1PH
and the internal signal DeadLineDet1Ph is activated. If all three phases are considered to be
dead the output DLD3PH is activated

Technical manual
Dead Line Detection

IL1
a
a<b AllCurrLow
b
AND
IL2
a
a<b
b
IL3
a
a<b
b
IDLD<
DeadLineDet1Ph
UL1
a AND
a<b
b OR DLD1PH
AND
UL2
a AND
a<b
b
AND DLD3PH
UL3 AND
a AND
a<b
b
UDLD<
intBlock
Figure 382: Simplified logic diagram for Dead Line detection part
14.2.7.4 Main logic GUID-D474A49E-D3A8-438C-B7E4-E527FEC2F335 v6
A simplified diagram for the functionality is found in figure 383. The fuse failure supervision
function (FUFSPVC) can be switched on or off by the setting parameter Operation to On or
Off.
For increased flexibility and adaptation to system requirements an operation mode selector,
OpMode, has been introduced to make it possible to select different operating modes for the
negative and zero sequence based algorithms. The different operation modes are:
• Off. The negative and zero sequence function is switched off.

• UNsINs. Negative sequence is selected.
• UZsIZs. Zero sequence is selected.
• UZsIZs OR UNsINs. Both negative and zero sequence are activated and work in parallel
(OR-condition for operation).
• UZsIZs AND UNsINs. Both negative and zero sequence are activated and work in series
(AND-condition for operation).
• OptimZsNs. Optimum of negative and zero sequence current (the function that has the
highest magnitude of measured negative and zero sequence current will be activated).
The delta function can be activated by setting the parameter OpDUDI to On. When selected it
operates in parallel with the sequence based algorithms.
As soon as any fuse failure situation is detected, signals FuseFailDetZeroSeq,

FuseFailDetNegSeq or FuseFailDetDUDI, and the specific functionality is released, the function
will activate the output signal BLKU. The output signal BLKZ will be activated as well if the
internal dead phase detection, DeadLineDet1Ph, is not activated at the same time. The output
BLKU can be used for blocking voltage related measuring functions (under voltage protection,
energizing check, and so on). The output BLKZ shall be used to block the impedance
protection functions.
If the fuse failure situation is present for more than 5 seconds and the setting parameter
SealIn is set to On it will be sealed in as long as at least one phase voltages is below the set

Technical manual
value USealIn<. This will keep the BLKU and BLKZ signals activated as long as any phase
voltage is below the set value USealIn<. If all three phase voltages drop below the set value
USealIn< and the setting parameter SealIn is set to On the output signal 3PH will also be
activated. The signals 3PH, BLKU and BLKZ will now be active as long as any phase voltage is
below the set value USealIn<.
If SealIn is set to On the fuse failure condition lasting more then 5 seconds is stored in the non-
volatile memory in the IED. At start-up of the IED (due to auxiliary power interruption or re-
start due to configuration change) it uses the stored value in its non-volatile memory and re-
establishes the conditions that were present before the shut down. All phase voltages must be
restored above USealIn< before fuse failure is de-activated and resets the signals BLKU, BLKZ
and 3PH.
The output signal BLKU will also be active if all phase voltages have been above the setting
USealIn< for more than 60 seconds, the zero or negative sequence voltage has been above the
set value 3U0> and 3U2> for more than 5 seconds, all phase currents are below the setting
IDLD< (criteria for open phase detection) and the circuit breaker is closed (input CBCLOSED is
activated).
If a MCB is used then the input signal MCBOP is to be connected via a binary input to the N.C.
auxiliary contact of the miniature circuit breaker protecting the VT secondary circuit. The
MCBOP signal sets the output signals BLKU and BLKZ in order to block all the voltage related
functions when the MCB is open independent of the setting of OpMode or OpDUDI. An
additional drop-out timer of 150 ms prolongs the presence of MCBOP signal to prevent the
unwanted operation of voltage dependent function due to non simultaneous closing of the
main contacts of the miniature circuit breaker.
The input signal DISCPOS is supposed to be connected via a terminal binary input to the N.C.
auxiliary contact of the line disconnector. The DISCPOS signal sets the output signal BLKU in
order to block the voltage related functions when the line disconnector is open. The
impedance protection function does not have to be affected since there will be no line currents
that can cause malfunction of the distance protection.

Technical manual
Fuse failure detection

Main logic
TEST
TEST ACTIVE
AND
BlocFuse = Yes
BLOCK intBlock
OR
BLKTRIP 20 ms 100 ms
AND t t
FusefailStarted
All UL < USealIn<

OR
AND
3PH
AND
SealIn = On AND
AND
Any UL < UsealIn<
FuseFailDetDUDI
AND 5s
OpDUDI = On
OR t
FuseFailDetZeroSeq
AND
AND
FuseFailDetNegSeq
AND
UNsINs OR
UZsIZs OR
UZsIZs OR UNsINs
OpMode
UZsIZs AND UNsINs
OptimZsNs
OR
CurrZeroSeq
a AND
CurrNegSeq a>b
b
AND
DeadLineDet1Ph 200 ms
AND BLKZ
t OR AND
150 ms
MCBOP t
AND BLKU
60 s
t OR OR
All UL > UsealIn<
AND
VoltZeroSeq 5s
VoltNegSeq OR t
AllCurrLow
CBCLOSED
DISCPOS IEC10000033-2-en.vsd
Figure 383: Simplified logic diagram for fuse failure supervision function, Main logic

Technical manual

M16069-1 v12
Table 437: FUFSPVCtechnical data

Operate voltage, zero sequence (1-100)% of UBase ±0.5% of Ur
Operate current, zero sequence (1–100)% of IBase ±0.5% of Ir
Operate voltage, negative sequence (1-100)% of UBase ±0.5% of Ur
Operate current, negative sequence (1–100)% of IBase ±0.5% of Ir
Operate voltage change level (1-100)% of UBase ±10.0% of Ur
Operate current change level (1–100)% of IBase ±10.0% of Ir
Operate phase voltage (1-100)% of UBase ±0.5% of Ur
Operate phase current (1–100)% of IBase ±0.5% of Ir
Operate phase dead line voltage (1-100)% of UBase ±0.5% of Ur
Operate phase dead line current (1–100)% of IBase ±0.5% of Ir
Operate time, start, 1 ph, at 1 x Ur to 0 Min. = 10 ms -

Max. = 25 ms
Reset time, start, 1 ph, at 0 to 1 x Ur Min. = 15 ms -
Max. = 30 ms
14.3 Fuse failure supervision VDSPVC GUID-9C5BA1A7-DF2F-49D4-A13A-C6B483DDFCDC v2
14.3.1 Identification GUID-109434B0-23E5-4053-9E6E-418530A07F9C v2

Fuse failure supervision VDSPVC VTS 60
14.3.2 Functionality GUID-6AF2219A-264F-4971-8D03-3B8A9D0CB284 v5
Different protection functions within the protection IED operates on the basis of measured
voltage at the relay point. Some example of protection functions are:
• Distance protection function.

• Undervoltage function.
• Energisation function and voltage check for the weak infeed logic.
These functions can operate unintentionally, if a fault occurs in the secondary circuits between
voltage instrument transformers and the IED. These unintentional operations can be
prevented by fuse failure supervision (VDSPVC).
VDSPVC is designed to detect fuse failures or faults in voltage measurement circuit, based on
phase wise comparison of voltages of main and pilot fused circuits. VDSPVC blocking output
can be configured to block functions that need to be blocked in case of faults in the voltage
circuit.

Technical manual
14.3.3 Function block GUID-0C4A6C94-E0D7-4E36-AB49-D74A5E330D36 v2
VDSPVC
U3P1* MAINFUF
U3P2* PILOTFUF
BLOCK U1L1FAIL
U1L2FAIL
U1L3FAIL
U2L1FAIL
U2L2FAIL
U2L3FAIL
Figure 384: VDSPVC function block
14.3.4 Signals
Table 438: VDSPVC Input signals

U3P1 GROUP - Main fuse voltage
SIGNAL
U3P2 GROUP - Pilot fuse voltage
SIGNAL
Table 439: VDSPVC Output signals

MAINFUF BOOLEAN Block of main fuse failure
PILOTFUF BOOLEAN Alarm of pilot fuse failure
U1L1FAIL BOOLEAN Fuse failure of Main fuse group phase L1
U2L1FAIL BOOLEAN Fuse failure of Pilot fuse group phase L1

Technical manual
14.3.5 Settings
Table 440: VDSPVC Group settings (basic)

Operation Off - - Off Operation Mode Off / On
On
Ud>MainBlock 10.0 - 80.0 %UB 0.1 20.0 Blocking picked up voltage level in %
of UBase when main fuse fails
Ud>PilotAlarm 10.0 - 80.0 %UB 0.1 30.0 Alarm picked up voltage level in % of
UBase when pilot fuse fails
SealIn Off - - On Seal in functionality Off/On
On
USealIn 0.0 - 100.0 %UB 0.1 70.0 Operate level of seal-in voltage in % of
UBase
Table 441: VDSPVC Non group settings (basic)

Value groups
Table 442: VDSPVC Non group settings (advanced)

ConTypeMain Ph-N - - Ph-N Selection of connection type for main
Ph-Ph fuse group
ConTypePilot Ph-N - - Ph-N Selection of connection type for pilot
Ph-Ph fuse group

Table 443: VDSPVC Monitored data

UL1DIF_A REAL - kV Differential voltage phase L1 for alarm
functionality
functionality
functionality
UL1DIF_B REAL - kV Differential voltage phase L1 for block
functionality
functionality
functionality

Technical manual
14.3.7 Operation principle GUID-06BC0CC0-8A4F-4D84-A0B1-506E433F72F3 v4
VDSPVC requires six voltage inputs, which are the three phase voltages on main and pilot fuse
groups. The initial voltage difference between the two groups is theoretical zero in the healthy
condition. Any subsequent voltage difference will be due to a fuse failure.
If the main fuse voltage becomes smaller than the pilot fuse voltage (vMainL1 < vPilotL1 or
vMainL2 < vPilotL2 or vMainL3 < vPilotL3) and the voltage difference exceeds the operation
level (Ud>MainBlock), a blocking signal will be initiated to indicate the main fuse failure and
block the voltage-dependent functions. In addition, the function also indicates the phase in
which the voltage reduction has occurred.
If the pilot fuse voltage becomes smaller than the main fuse voltage (vPilotL1 < vMainL1 or
vPilotL2 < vMainL2 or vPilotL3 < vMainL3) and the voltage difference exceeds the operation
level (Ud>PilotAlarm), an alarm signal will be initiated to indicate the pilot fuse failure and also
the faulty phase where the voltage reduction occurred.
When SealIn is set to On and the fuse failure has last for more than 5 seconds, the blocked
protection functions will remain blocked until normal voltage conditions are restored above
the USealIn setting. Fuse failure outputs are deactivated when normal voltage conditions are
restored.
5s
a
ab AND
Ud>MainBlock b MAINFAIL
OR
0
MIN ABS a
a>b AND U2L1FAIL
Ud> PilotAlarm b
BLOCK
OR PILOTFAIL
vPilotL2 U1L2FAIL
vMainL2 Phase L2, same as Phase L1 U2L2FAIL
vPilotL3 U1L3FAIL
vMainL3 Phase L3, same as Phase L1 U2L3FAIL
Figure 385: Simplified logic diagram VDSPVC

Technical manual

GUID-E2EA8017-BB4B-48B0-BEDA-E71FEE353774 v5
Table 444: VDSPVC technical data

Operate value, block of main fuse failure (10.0-80.0)% of UBase ±0.5% of Ur
Reset ratio <110%
Operate time, block of main fuse failure at 1 x Ur Min. = 5 ms –
to 0
Max. = 15 ms
Reset time, block of main fuse failure at 0 to 1 x Min. = 15 ms –
Ur
Max. = 30 ms
Operate value, alarm for pilot fuse failure (10.0-80.0)% of UBase ±0.5% of Ur
Reset ratio <110% –
Operate time, alarm for pilot fuse failure at 1 x Ur Min. = 5 ms –
to 0
Max. = 15 ms
Reset time, alarm for pilot fuse failure at 0 to 1 x Min. = 15 ms –
Ur
Max. = 30 ms
14.4 Voltage based delta supervision DELVSPVC GUID-579ED249-B8C9-4755-9E80-28E2BA8E5377 v2
GUID-C7108931-DECA-4397-BCAF-8BFF3B57B4EF v2

Voltage based delta supervision DELVSPVC – 7V_78V
14.4.2 Functionality GUID-6188C4C1-E1D5-421A-B496-96676287EBB2 v2
Delta supervision function is used to quickly detect (sudden) changes in the network. This can,
for example, be used to detect faults in the power system networks and islanding in grid
networks. Voltage based delta supervision (DELVSPVC) is needed at the grid interconnection
point.

Technical manual
14.4.3 Function block GUID-06FEC7EF-B37E-4D42-99DA-868453E6FDBF v2
DELVSPVC
U3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
DELMAGL1
DELMAGL2
DELMAGL3
Figure 386: DELVSPVC function block
14.4.4 Signals
Table 445: DELVSPVC Input signals

SIGNAL
Table 446: DELVSPVC Output signals

START BOOLEAN General start of function
STARTL1 BOOLEAN Start of L1
STRISE BOOLEAN Common rise signal when input has increased
STRISEL1 BOOLEAN L1/L12 delta value increased
STLOW BOOLEAN Common low signal when input has decreased
STLOWL1 BOOLEAN L1/L12 delta value decreased
DELMAGL1 REAL Delta magnitude of L1 / L12

Technical manual
14.4.5 Settings
Table 447: DELVSPVC Non group settings (basic)

Value groups
OpMode Instantaneous 1 - - DFT mag Operation mode
cycle
Instantaneous 2
cycle
RMS
DFT mag
DFT Angle (Vector
shift)
MeasMode Phase to phase - - Phase to ground Measurement type: Phase to ground /
Phase to ground Phase to phase
Table 448: DELVSPVC Group settings (basic)

On
UMin 1.0 - 50.0 %UB 0.1 5.0 Minimum start value of voltage for
release of delta function
DeltaT 1 - 10 cycle 1 2 Number of old power cycles for delta
calculation
DelU> 2.0 - 500.0 %UB 0.1 40.0 Magnitude start level for magnitude,
RMS and sample based delta
comparison
DelUAng> 2.0 - 40.0 Deg 1.0 8.0 Start level for angle based delta
detection
tHold 0.10 - 60.00 s 0.01 0.10 Hold time for start signal

Table 449: DELVSPVC Monitored data

UL1 REAL - kV RMS magnitude of L1 /L12
14.4.7 Operation principle GUID-7F65AD13-1F0E-402A-8B9C-3B1D6ED0D2BB v2
The delta supervision function is a phase segregated function. Following are the features of
DELVSPVC:
• Check of the minimum signal level

• Five different modes of operation
• Frequency stabilization for angle shift

Technical manual
The general design of DELVSPVC is shown in Figure 387:
opMode = Instantaneous 1 cycle/2 cycle

Sample delta STARTSAMPLE
U3P calculation
opMode = DFTAngle
Frequency
estimation and Frequency stabilization STARTANGLE
angle shift based on 2 cycle old
calculation frequency
1 START
AND
Signal pre‐processing

  fundamental DFT
opMode= RMS/DFTMag
  harmonic extraction

Magnitude based STARTMAG
delta calculation DELMAGLx
MinValueCheck AND
BLOCK
Figure 387: Simplified logic diagram for voltage based delta supervision DELVSPVC
14.4.7.1 Minimum signal level check GUID-FE5377C8-E4CF-43D3-B1EC-C886E76377A6 v2
The setting Umin is used to check and release the signals for the delta supervision. The delta
detection is blocked for 2 cycles by Umin comparator for angle shift mode.
14.4.7.2 Mode of operation GUID-B4EDA716-DB28-422A-88E3-F41D5D7BB6A4 v2
DELVSPVC can be selected for phase-to-ground or phase-to-phase measurements using the

MeasMode setting. If the setting is selected as phase-to-phase, then outputs with L1 will
represent L12 phase-to-phase quantities. Following are the modes of operations for the
OpMode setting:
• Instantaneous 1 cycle
• True RMS
• DFT mag
• Vector Shift
These modes of operation are explained in following sections.
14.4.7.3 Instantaneous 1 cycle / 2 cycle GUID-BAF266E2-A0A0-4848-9DFB-776C197B4A7F v1
This method uses the instantaneous sample for delta detection. The logic of this scheme is
given in Figure 388. The instantaneous difference between the present sample and the one
cycle (or two cycle) old sample is used for the delta detection. The change (delta) is verified for
three continuous samples in order to release the start signal. Once the start signal is set, any
subsequent change in sample values within 60 ms will not be detected. The DELU> setting will
be set in % of UB. The sample based delta is selectable for one cycle/two cycle operation,
based on the OpMode setting.

Technical manual
Old value buffer
Voltage sample input
  1 cycle /
  2 cycle
‐ Abs
60ms
>
StartSampleDelta
AND t
DelU>
q‐1
q‐1
Figure 388: Simplified logic diagram for sample based delta detection
14.4.7.4 RMS/DFT based supervision GUID-B299BE6C-AD89-4DFE-AFFC-E3DD252A260A v2
This mode uses the RMS or DFT magnitude value of the voltage signal for the delta detection.
The logic of this scheme is given in Figure 389. Difference between the present value and the
old value is used for the delta detection. The old value is chosen based on the setting DeltaT,
which is defined as the number of old power cycles.
The function has an execution cycle time of 3 ms. For a DeltaT setting of 3, the
old value is 60 ms. Therefore, accuracy of the old cycle data depends upon the
execution cycle.
The output of the comarator is ascertained for half a cycle before releasing a STARTMAG
signal. In DELVSPVC, the DelU> setting is set in % of UB. RMS based delta will have poor
accuracy if the signal contains harmonics and other frequency components. DFT Mag based
delta will operate better in these conditions.
Additional information for the STARTRISE and STARTLOW outputs of the delta are also
available in this mode. The STARTRISE and STARTLOW outputs will be sealed by the start
signal. These outputs explains the reason for the STARTMAG signal.
Seal‐in STARTLOW
logic
0.1
>
RMS input / Seal‐in STARTRISE

> logic
DFT mag Delay defined by ‐0.1
DeltaT
0. 3 cycle
‐ Abs
> t
DelU>
IEC17000200-2-en.vdsx
Figure 389: Simplified logic diagram for RMS/DFT based delta detection
14.4.7.5 Angle based supervision or vector shift supervision GUID-26960EA3-233A-4B76-8C11-245334012C76 v2
The Vector shift selection in the OpMode setting is used to set the DELVSPVC function to
operate. A change in magnitude will not have any impact on this supervision. Angle shift is
measured based on the half cycle time (HCTime) as shown in Figure 390. The figure shows a
waveform shift of 40 degree in the voltage waveform. There are two half cycle time which is
affected by this angle shift namely, HCTime(k-1) and HCTime(k). A cumulative difference of
two HCTime difference is calculated to get an accurate estimate of the angle shift. This angle
shift is compared with DelUang> setting to release the STARTANGLE signal.

Technical manual
The logic for this mode is given in Figure 391. The DelUAng> setting will be set in absolute
degrees.
Voltage
Angle shift= [{Hctime(k) ‐ Hctime(k‐2)} + {Hctime(k‐1) ‐ Hctime(k‐3)}]
Angle shift
HC time (k‐3) HC time (k‐2) HC time (k‐1) HC time (k)

Time
Figure 390: Angle shift

Angle measurement is affected by system parameters such as frequency, load or generation.
Hence, a stabilization of the angle is also present in this mode of operation. The measured
frequency is compared with the 2 cycles old value. If the change is greater than 0.2 Hz, the
STARTANGLE signal is blocked. The output will release Angle shift mode when the measured
frequency difference is continuously less than 0.2 Hz for 2 cycles. The general logic is
presented in Figure 391. In this mode STLOW, STRISE, STLOWLx and STRISELx outputs will not
be used and set as FALSE.
ULx Angle shift
calculation
0.5 cycle
Abs Delta Angle
> t
DelUang> STARTANGLE
Frequency difference of last 2 cycles AND
> AND
0.2 Hz
Figure 391: Simplified logic diagram for angle based delta detection

Technical manual

GUID-DAECF9F5-1D0B-43FC-AD29-8F96E05DD0DA v3
Table 450: DELVSPVC technical data

Minimum Voltage (5.0 - 50.0)% of UBase ±0.5% of Ur at U ≤ Ur
DelU> (2.0 - 500.0)% of UBase Instantaneous 1 cycle & Instantaneous
2 cycle mode:±20% of Ur at U ≤ Ur
±20% of U at U > UrRMS & DFT Mag
mode:±10% of Ur at U ≤ Ur±10% of U
at U > Ur
DelUAng> (2.0 - 40.0) degrees ±2.0 degrees
Operate time for Instantaneous 1 cycle & Instantaneous
changeat Ur to (Ur + 2 x 2 cycle mode - <20msRMS & DFT Mag
DelU>)at Ur to (Ur + 5 x mode - <30ms
DelU>)
Operate time for jump Vector shift mode - <60ms
from Zero degrees to
'AngStVal' + 2 degrees
14.5 Current based delta supervision DELISPVC GUID-4F012876-FA0A-4A97-9E23-387974304CED v2
GUID-0B735A27-6A7D-40E1-B981-91B689608495 v1

Current based delta supervision DELISPVC – 7I < >
14.5.2 Functionality GUID-30A00AE0-8D3A-4CE8-9379-8D1A0A6078E3 v2
Delta supervision function is used to quickly detect (sudden) changes in the network. This can,
for example, be used to detect disturbances in the power system network. Current based delta
supervision (DELISPVC) provides selectivity between load change and the fault.
Present power system has many power electronic devices or FACTS devices, which injects a
large number of harmonics into the system. The function has additional features of 2nd
harmonic blocking and 3rd harmonic start level adaption. The 2nd harmonic blocking secures
the operation during the transformer charging, when high inrush currents are supplied into
the system.

Technical manual
14.5.3 Function block GUID-D1467592-DD2D-488F-94CA-66BD0FA57A8D v2
DELISPVC
I3P* START
BLOCK STARTL1
STARTL2
STARTL3
STRISE
STRISEL1
STRISEL2
STRISEL3
STLOW
STLOWL1
STLOWL2
STLOWL3
ADAPTVAL
HARM2BLK
DELMAGL1
DELMAGL2
DELMAGL3
Figure 392: DELISPVC function block
14.5.4 Signals
Table 451: DELISPVC Input signals

SIGNAL
Table 452: DELISPVC Output signals

START BOOLEAN General start of function
STRISE BOOLEAN Common rise signal when input has increased
STLOW BOOLEAN Common low signal when input has decreased
ADAPTVAL BOOLEAN Delta start level changed by 3rd harmonic
HARM2BLK BOOLEAN 2nd harmonic blocking active

Technical manual
14.5.5 Settings
Table 453: DELISPVC Non group settings (basic)

Value groups
OpMode Instantaneous 1 - - DFT mag Operation mode
cycle
Instantaneous 2
cycle
RMS
DFT mag
MeasMode Phase to phase - - Phase to ground Measurement type: Phase to ground /
Phase to ground Phase to phase
Table 454: DELISPVC Group settings (basic)

On
IMin 1.0 - 50.0 %IB 0.1 10.0 Minimum current start value for
release of delta function
DeltaT 1 - 10 cycle 1 2 Number of old power cycles for delta
calculation
DelI> 2.0 - 500.0 %IB 0.1 40.0 Magnitude start level for magnitude,
RMS and sample based delta
comparison
EnaHarm2Blk Off - - Off Enable 2nd harmonic blocking
On
HarmBlkLevel 5.0 - 100.0 % 0.1 15.0 Harmonic blocking level for 2nd
harmonic in % of fundamental
EnStValAdap Off - - Off Enable set level setting adaption
On based on 3rd harmonic
Harm3Level 5.0 - 100.0 % 0.1 15.0 3rd Harmonic level in % of
fundamental for enabling adaptive
start value
StValGrad -90.00 - 500.00 % 0.10 -10.00 Gradient for adapting magnitude set
level during 3rd harmonic in % of DelI>

Table 455: DELISPVC Monitored data

IL1 REAL - A RMS magnitude of L1 /L12

Technical manual
14.5.7 Operation principle GUID-27E7C6C8-83B1-4CA6-9B4E-38FDED3FD360 v2
The delta supervision function is a phase segregated function. Following are the features of
DELISPVC:

• Four different modes of operation
• 2nd harmonic blocking of delta function
• 3rd harmonic based adaption of starting value
The general design of DELISPVC is shown in Figure 393:
opMode = Instantaneous 1 cycle/2 cycle

I3P Sample delta STARTSAMPLE
calculation
1 AND START
Signal pre‐processing

  fundamental DFT
opMode= RMS/DFTMag
  harmonic extraction

Magnitude based STARTMAG
delta calculation DELMAGLx
DFTMagToComp
rd
3 harmonic based
ADAPTVAL
adaption nd HARM2BLK
2 harmonic
blocking
AND
MinValueCheck
BLOCK
Figure 393: Simplified logic diagram for current based delta supervision DELISPVC
14.5.7.1 Minimum signal level check GUID-5E5503ED-1A61-4927-86F0-6ABDC7E2AA2B v2
The setting Imin is used to check and release the signals for the delta supervision. This setting
can be used to obtain selectivity between load current and fault current.
14.5.7.2 Mode of operation GUID-2B87BAB6-A0D4-4A3D-8116-88F1598C1AC6 v2
DELISPVC can be selected for phase-to-ground or phase-to-phase measurements using the

MeasMode setting. If the setting is selected as phase-to-phase, then outputs with L1 will
represent L12 phase-to-phase quantities and so on. Following are the modes of operations for
the OpMode setting:
• True RMS
• DFT mag
These modes of operation are explained in following sections.
14.5.7.3 Instantaneous 1 cycle / 2 cycle GUID-4FD743D6-DB93-4C76-819D-E81C562B762A v2
This method uses the buffer of instantaneous sample for delta detection. The logic of this
scheme is given in Figure 394. The instantaneous difference between the present sample and
the one cycle (or two cycle) old sample is used for the delta detection. The change (vectorial
delta) is verified for three continuous samples in order to release the start signal. This delta
calculation is affected by angle or magnitude or both changes in the signal in the last one
cycle/two cycle. It is also known as vectorial delta scheme. Once the start signal is set, any
subsequent change in sample values within 60 ms will not be detected. The DelI> setting will

Technical manual
be set in % of IB. The sample based delta is selectable for one cycle/two cycle operation, based
on the OpMode setting.
Old value buffer
Current Samples   1 cycle /
  2 cycle
‐
60ms
Abs
> AND
StartSampleDelta
t
DelI>
q‐1
q‐1
Figure 394: Simplified logic diagram for sample based delta detection
14.5.7.4 RMS/DFT based supervision GUID-427A82EF-1BB6-45C5-BAEB-2DF50A9D99BD v2
This mode uses the RMS or DFT magnitude value of the current signal for the delta detection.
The logic of this scheme is given in Figure 395. Difference between the present value and the
old value is used for the delta detection. The old value is chosen based on the setting DeltaT,
which is defined as the number of old power cycles.
The function has an execution cycle of 3 ms. For a DeltaT setting of 3, the old
value is 60 ms. Therefore, accuracy of the old cycle data depends upon the
execution cycle.
The output of the comparator is ascertained for half a cycle before releasing a STARTMAG
signal. In DELISPVC, the DelI> setting is set in % of IB.
Additional information for the STARTRISE and STARTLOW outputs of the delta are also
available in this mode. The STARTRISE and STARTLOW outputs will be sealed by the start
signal. These outputs explains the reason for the STARTMAG signal.
Seal‐in STARTLOW
logic
0.1
>
Seal‐in STARTRISE
> logic
RMS Input Delay defined by ‐0.1
DeltaT
0. 5 cycle
‐ Abs STARTMAG
> t
DelI>
Figure 395: Simplified logic diagram for RMS based delta detection
14.5.7.5 2nd Harmonic blocking GUID-BE749AFA-992C-44A6-8C12-12BA4D1AA674 v2
Presence of the harmonics is another reason for maloperation of the delta based protection.
The 2nd harmonic blocking is an additional security feature in this function. It can be enabled
by the EnaHarm2Blk setting. If the ratio of 2nd harmonic frequency signal magnitude to the
fundamental frequency magnitude is greater than the set level harmBlkLev, then this feature
will block the start signal of the delta protection. The logic for this functionality is shown in
Figure 396. The tON of 1.25 cycle is added to ensure a reliable harmonic blocking. The tOFF of 2
cycles is added to block the operation during any sudden increase in the current load.

Technical manual
EnaHarm2Blk
2 cycles
t HARM2BLK
DFTInput‐2ndHarm AND
< 1.25 cycle
t
DFTInput ‐ fundamental
X
HarmBlkLev
Figure 396: Simplified logic diagram for 2nd harmonic blocking logic
14.5.7.6 3rd Harmonic based adaption GUID-02A00917-EAB6-47F9-8375-643F76AA0D2B v2
Present days power system network has high amount of the 3rd harmonics presence due to
heavy power electronic devices. In such case, many networks modify the settings based on the
3rd harmonic present in the system. Delta supervision can be adapted based on the 3rd
harmonic present in the signal. When OpMode is set to DFTMag and EnStValAdap is set to is
Enable, then the setting DelI> will change based on the StValGrad setting if the third harmonic
is greater than the set level defined by the Harm3Level setting. The logic for this functionality
is shown in Figure 397.
 DelI  New  DelI 1  StValGrad 
DeltaMode = DFTMag
EnStValAdap = Enable/Disable
2 cycle
t ADAPTSTLEV
rd
DFTInput ‐ 3 Harmonics AND
< 1.25 cycle
DFTInput ‐ fundamental t
X
Harm3Lev
StValGrad X T DeltaMagToComp
F
DelI>
Figure 397: Simplified logic diagram for 3rd harmonic restrain of MagStVal setting
Since this mode is adaptably changing the setting, the tOFF time is mandatory to ensure the
reliable operation during any sudden change.

Technical manual

GUID-ED3FE722-1F29-4340-94E9-6C907C4474F2 v3
Table 456: DELISPVC technical data

Minimum current (5.0 - 50.0)% of IBase ±1.0% of Ir at I ≤ Ir±1.0% of I at I > Ir
DelI> (10.0 - 500.0)% of IBase Instantaneous 1 cycle &
Instantaneous 2 cycle mode:±20% of
Ir at I ≤ Ir±20% of I at I > IrRMS & DFT
Mag mode:±10% of Ir at I ≤ Ir±10%
of I at I > Ir
Second harmonic blocking (5.0 - 100.0)% of fundamental ±2.0% of Ir
Third harmonic (5.0 - 100.0)% of fundamental ±2.0% of Ir
restraining
Operate time for Instantaneous 1 cycle &
changeat Ir to (Ir + 2 x Instantaneous 2 cycle mode - <20ms
DelI>)at Ir to (Ir + 5 x RMS & DFT Mag mode - <30ms
DelI>)
14.6 Delta supervision of real input DELSPVC GUID-470F7470-F3D1-46BC-B0EA-CD180FBA0AB2 v1
GUID-66CFBA71-B3A4-489F-B7F4-F1909B75E1DD v1

Delta supervision of real input DELSPVC – –
14.6.2 Functionality GUID-8FAD2CCF-091F-4CDB-8ABF-1BDC874A8403 v2
Delta supervision functions are used to quickly detect (sudden) changes in the power system.
Real input delta supervision (DELSPVC) function is a general delta function. It is used to detect
the change measured qualities over a settable time period, such as:
• Power
• Reactive power
• Temperature
• Frequency
• Power factor
14.6.3 Function block GUID-1472A816-E653-4828-8F03-4B26B93E7EF9 v1
DELSPVC
BLOCK START
INPUT STRISE
STLOW
DELREAL
Figure 398: DELSPVC function block

Technical manual
14.6.4 Signals
Table 457: DELSPVC Input signals

INPUT REAL 0 Real Input
Table 458: DELSPVC Output signals

START BOOLEAN Start of function
STRISE BOOLEAN Rise signal when input has increased
STLOW BOOLEAN Low signal when input has decreased
DELREAL REAL Delta value of real input
14.6.5 Settings
Table 459: DELSPVC Group settings (basic)

On
MinStVal 0.1 - 99999.9 - 0.1 1.0 Minimum start value for release of
delta function
DeltaT 6 - 100 cycle 1 10 Number of old execution cycle for
delta calculation
DelSt> 0.1 - 9999999.9 - 0.1 10.0 Delta start level for real input
14.6.6 Operation principle GUID-CA9B38EB-26E4-4286-8517-C5ECDA730236 v1
Delta supervision of real input DELSPVC is a general delta function with the following features:

• Detect an increase or decrease of the measured value
The general design of DELSPVC is shown in Figure 399.

Technical manual
Seal‐in STARTLOW
Logic
>
0.1
Seal‐in STARTRISE
Logic
REALIN Delay defined by >
‐0.1
DeltaT
0. 5 cycle
‐ Abs
> t
DelStLevel
tHold
& t
>
MinStVal
Figure 399: Simplified logic diagram for DELSPVC

The setting MinStVal is used to check and release the signals for the delta supervision. In its
initial condition, during the first time a real value signal is detected (ascertained by the
MinStVal comparator), the delta detection is blocked for operation for the next 11 cycles. These
11 cycles are used to block any unwanted operation during the initialization of the function.
The outputs STARTRISE and STARTLOW are released based on the difference (respectively
above and below) from the old value at the instant when the START signal is released.

Technical manual
682
Control
Section 15 Control
15.1 Synchrocheck, energizing check, and synchronizing
SESRSYN IP14558-1 v4
M14889-1 v4

Synchrocheck, energizing check, and SESRSYN 25
synchronizing
sc/vc
SYMBOL-M V1 EN-US
The Synchronizing function allows closing of asynchronous networks at the correct moment
including the breaker closing time, which improves the network stability.
Synchrocheck, energizing check, and synchronizing (SESRSYN) function checks that the
voltages on both sides of the circuit breaker are in synchronism, or with at least one side dead
to ensure that closing can be done safely.
SESRSYN function includes a built-in voltage selection scheme for double bus and 1½ breaker
or ring busbar arrangements.
Manual closing as well as automatic reclosing can be checked by the function and can have
different settings.
For systems, which can run asynchronously, a synchronizing feature is also provided. The main
purpose of the synchronizing feature is to provide controlled closing of circuit breakers when
two asynchronous systems are in phase and can be connected. The synchronizing feature
evaluates voltage difference, phase angle difference, slip frequency and frequency rate of
change before issuing a controlled closing of the circuit breaker. Breaker closing time is a
setting.

Technical manual
Control
SESRSYN
U3PBB1* SYNOK
U3PBB2* AUTOSYOK
U3PLN1* AUTOENOK
U3PLN2* MANSYOK
BLOCK MANENOK
BLKSYNCH TSTSYNOK
BLKSC TSTAUTSY
BLKENERG TSTMANSY
B1QOPEN TSTENOK
B1QCLD USELFAIL
B2QOPEN B1SEL
B2QCLD B2SEL
LN1QOPEN LN1SEL
LN1QCLD LN2SEL
LN2QOPEN SYNPROGR
LN2QCLD SYNFAIL
UB1OK UOKSYN
UB1FF UDIFFSYN
UB2OK FRDIFSYN
UB2FF FRDIFFOK
ULN1OK FRDERIVA
ULN1FF UOKSC
ULN2OK UDIFFSC
ULN2FF FRDIFFA
STARTSYN PHDIFFA
TSTSYNCH FRDIFFM
TSTSC PHDIFFM
TSTENERG INADVCLS
AENMODE UDIFFME
MENMODE FRDIFFME
PHDIFFME
UBUS
ULINE
MODEAEN
MODEMEN
Figure 400: SESRSYN function block
15.1.4 Signals
Table 460: SESRSYN Input signals

U3PBB1 GROUP - Group signal for phase to earth voltage input L1, busbar 1
SIGNAL
U3PBB2 GROUP - Group signal for phase to earth voltage input L1, busbar 2
SIGNAL
U3PLN1 GROUP - Group signal for phase to earth voltage input L1, line 1
SIGNAL
U3PLN2 GROUP - Group signal for phase to earth voltage input L1, line 2
SIGNAL
BLKSYNCH BOOLEAN 0 Block synchronizing
BLKSC BOOLEAN 0 Block synchro check
BLKENERG BOOLEAN 0 Block energizing check
B1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to bus1
B1QCLD BOOLEAN 0 Close status for CB or disconnector connected to bus1
B2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to bus2
B2QCLD BOOLEAN 0 Close status for CB or disconnector connected to bus2

Technical manual
Control

LN1QOPEN BOOLEAN 0 Open status for CB or disconnector connected to line1
LN1QCLD BOOLEAN 0 Close status for CB or disconnector connected to line1
LN2QOPEN BOOLEAN 0 Open status for CB or disconnector connected to line2
LN2QCLD BOOLEAN 0 Close status for CB or disconnector connected to line2
UB1OK BOOLEAN 0 Bus1 voltage transformer OK
UB1FF BOOLEAN 0 Bus1 voltage transformer fuse failure
UB2OK BOOLEAN 0 Bus2 voltage transformer OK
UB2FF BOOLEAN 0 Bus2 voltage transformer fuse failure
ULN1OK BOOLEAN 0 Line1 voltage transformer OK
ULN1FF BOOLEAN 0 Line1 voltage transformer fuse failure
ULN2OK BOOLEAN 0 Line2 voltage transformer OK
ULN2FF BOOLEAN 0 Line2 voltage transformer fuse failure
STARTSYN BOOLEAN 0 Start synchronizing
TSTSYNCH BOOLEAN 0 Set synchronizing in test mode
TSTSC BOOLEAN 0 Set synchro check in test mode
TSTENERG BOOLEAN 0 Set energizing check in test mode
AENMODE INTEGER 0 Input for setting of automatic energizing mode
MENMODE INTEGER 0 Input for setting of manual energizing mode
Table 461: SESRSYN Output signals

SYNOK BOOLEAN Synchronizing OK output
AUTOSYOK BOOLEAN Auto synchro check OK
AUTOENOK BOOLEAN Automatic energizing check OK
MANSYOK BOOLEAN Manual synchro check OK
MANENOK BOOLEAN Manual energizing check OK
TSTSYNOK BOOLEAN Synchronizing OK test output
TSTAUTSY BOOLEAN Auto synchro check OK test output
TSTMANSY BOOLEAN Manual synchro check OK test output
TSTENOK BOOLEAN Energizing check OK test output
USELFAIL BOOLEAN Selected voltage transformer fuse failed
B1SEL BOOLEAN Bus1 selected
B2SEL BOOLEAN Bus2 selected
LN1SEL BOOLEAN Line1 selected
LN2SEL BOOLEAN Line2 selected
SYNPROGR BOOLEAN Synchronizing in progress
SYNFAIL BOOLEAN Synchronizing failed
UOKSYN BOOLEAN Voltage amplitudes for synchronizing above set limits
UDIFFSYN BOOLEAN Voltage difference out of limit for synchronizing
FRDIFSYN BOOLEAN Frequency difference out of limit for synchronizing
FRDIFFOK BOOLEAN Frequency difference in band for synchronizing

Technical manual
Control

FRDERIVA BOOLEAN Frequency derivative out of limit for synchronizing
UOKSC BOOLEAN Voltage amplitudes above set limits
UDIFFSC BOOLEAN Voltage difference out of limit
FRDIFFA BOOLEAN Frequency difference out of limit for Auto operation
PHDIFFA BOOLEAN Phase angle difference out of limit for Auto operation
FRDIFFM BOOLEAN Frequency difference out of limit for Manual operation
PHDIFFM BOOLEAN Phase angle difference out of limit for Manual Operation
INADVCLS BOOLEAN Inadvertent circuit breaker closing
UDIFFME REAL Calculated difference of voltage in p.u of set voltage base
value
FRDIFFME REAL Calculated difference of frequency
PHDIFFME REAL Calculated difference of phase angle
UBUS REAL Bus voltage
ULINE REAL Line voltage
MODEAEN INTEGER Selected mode for automatic energizing
MODEMEN INTEGER Selected mode for manual energizing
15.1.5 Settings
Table 462: SESRSYN Group settings (basic)

On
OperationSynch Off - - Off Operation for synchronizing function
On Off/On
UHighBusSynch 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for
synchronizing in % of UBaseBus
UHighLineSynch 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for
synchronizing in % of UBaseLine
UDiffSynch 0.02 - 0.50 pu 0.01 0.10 Voltage difference limit for
synchronizing in p.u of set voltage
base value
FreqDiffMin 0.003 - 0.250 Hz 0.001 0.010 Minimum frequency difference limit
for synchronizing
FreqDiffMax 0.050 - 1.000 Hz 0.001 0.200 Maximum frequency difference limit
for synchronizing
CloseAngleMax 15.0 - 30.0 Deg 1.0 15.0 Maximum closing angle between bus
and line for synchronizing
FreqRateChange 0.000 - 0.500 Hz/s 0.001 0.300 Maximum allowed frequency rate of
change
tBreaker 0.000 - 1.000 s 0.001 0.080 Closing time of the breaker
tClosePulse 0.050 - 60.000 s 0.001 0.200 Breaker closing pulse duration
tMaxSynch 0.00 - 6000.00 s 0.01 600.00 Resets synch if no close has been
made before set time
tMinSynch 0.000 - 60.000 s 0.001 2.000 Minimum time to accept
synchronizing conditions

Technical manual
Control

OperationSC Off - - On Operation for synchronism check
On function Off/On
UHighBusSC 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for
synchrocheck in % of UBaseBus
UHighLineSC 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for
synchrocheck in % of UBaseLine
UDiffSC 0.02 - 0.50 pu 0.01 0.15 Voltage difference limit for
synchrocheck in p.u of set voltage
base value
FreqDiffA 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between
bus and line Auto
FreqDiffM 0.003 - 1.000 Hz 0.001 0.010 Frequency difference limit between
bus and line Manual
PhaseDiffA 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Auto
PhaseDiffM 5.0 - 90.0 Deg 1.0 25.0 Phase angle difference limit between
bus and line Manual
tSCA 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck
Auto
tSCM 0.000 - 60.000 s 0.001 0.100 Time delay output for synchrocheck
Manual
AutoEnerg Off - - DLLB Automatic energizing check mode
DLLB
DBLL
Both
ManEnerg Off - - Both Manual energizing check mode
DLLB
DBLL
Both
ManEnergDBDL Off - - Off Manual dead bus, dead line energizing
On
UHighBusEnerg 50.0 - 120.0 %UBB 1.0 80.0 Voltage high limit bus for energizing
check in % of UBaseBus
UHighLineEnerg 50.0 - 120.0 %UBL 1.0 80.0 Voltage high limit line for energizing
check in % of UBaseLine
ULowBusEnerg 10.0 - 80.0 %UBB 1.0 40.0 Voltage low limit bus for energizing
check in % of UBaseBus
ULowLineEnerg 10.0 - 80.0 %UBL 1.0 40.0 Voltage low limit line for energizing
check in % of UBaseLine
UMaxEnerg 50.0 - 180.0 %UB 1.0 115.0 Maximum voltage for energizing in %
of UBase, Line and/or Bus
tAutoEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for automatic energizing
check
tManEnerg 0.000 - 60.000 s 0.001 0.100 Time delay for manual energizing
check

Technical manual
Control
Table 463: SESRSYN Non group settings (basic)

SelPhaseBus1 Phase L1 - - Phase L1 Select phase for busbar1
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
GblBaseSelBus 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, Bus
GblBaseSelLine 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, Line
SelPhaseBus2 Phase L1 - - Phase L1 Select phase for busbar2
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
SelPhaseLine1 Phase L1 - - Phase L1 Select phase for line1
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
SelPhaseLine2 Phase L1 - - Phase L1 Select phase for line2
Phase L2
Phase L3
Phase L1L2
Phase L2L3
Phase L3L1
Positive sequence
CBConfig No voltage sel. - - No voltage sel. Select CB configuration
Double bus
1 1/2 bus CB
1 1/2 bus alt. CB
Tie CB
Table 464: SESRSYN Non group settings (advanced)

PhaseShift -180 - 180 Deg 1 0 Additional phase angle for selected
line voltage

Table 465: SESRSYN Monitored data

UDIFFME REAL - - Calculated difference of voltage in p.u
of set voltage base value
FRDIFFME REAL - Hz Calculated difference of frequency
PHDIFFME REAL - deg Calculated difference of phase angle
UBUS REAL - kV Bus voltage
ULINE REAL - kV Line voltage

Technical manual
Control
15.1.7.1 Basic functionality M14832-3 v8
The synchrocheck feature measures the conditions across the circuit breaker and compares
them to set limits. The output for closing operation is given when all measured quantities are
simultaneously within their set limits.
The energizing check feature measures the bus and line voltages and compares them to both
high and low threshold detectors. The output is given only when the actual measured
quantities match the set conditions.
The synchronizing feature measures the conditions across the circuit breaker, and also
determines the angle change occurring during the closing delay of the circuit breaker, from the
measured slip frequency. The output is given only when all measured conditions are
simultaneously within their set limits. The closing of the output is timed to give closure at the
optimal time including the time needed for the circuit breaker and the closing circuit
operation.
The voltage difference, frequency difference and phase angle difference values are measured
in the IED centrally and are available for the SESRSYN function for evaluation. By setting the
phases used for SESRSYN, with the settings SelPhaseBus1, SelPhaseBus2, SelPhaseLine1 and
SelPhaseLine2, a compensation is made automatically for the voltage amplitude difference
and the phase angle difference caused if different setting values are selected for both sides of
the breaker. If needed, an additional phase angle adjustment can be done for selected line
voltage with the PhaseShift setting.
For double bus single circuit breaker and 1½ circuit breaker arrangements, the SESRSYN
function blocks have the capability to make the necessary voltage selection. For double bus
single circuit breaker arrangements, selection of the correct voltage is made using auxiliary
contacts of the bus disconnectors. For 1½ circuit breaker arrangements, correct voltage
selection is made using auxiliary contacts of the bus disconnectors as well as the circuit
breakers.
The internal logic for each function block as well as, the input and outputs, and the setting
parameters with default setting and setting ranges is described in this document. For
application related information, please refer to the application manual.
15.1.7.2 Logic diagrams IP14739-1 v1
M14833-3 v5
The logic diagrams that follow illustrate the main principles of the SESRSYN function
components such as Synchrocheck, Synchronizing, Energizing check and Voltage selection,
and are intended to simplify the understanding of the function.
Synchrocheck M14834-3 v15

When the function is set to OperationSC = On, the measuring will start.
The function will compare the bus and line voltage values with the set values for UHighBusSC
and UHighLineSC.
If both sides are higher than the set values, the measured values are compared with the set
values for acceptable frequency, phase angle and voltage difference: FreqDiffA, FreqDiffM,
PhaseDiffA, PhaseDiffM and UDiffSC. If additional phase angle adjustment is done with the
PhaseShift setting, the adjustment factor is deducted from the line voltage before the
comparison of the phase angle values.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than ±5Hz. The frequency difference between the bus
frequency and the line frequency is measured and may not exceed the set value FreqDiff.

Technical manual
Control
Two sets of settings for frequency difference and phase angle difference are available and
used for the manual closing and autoreclose functions respectively, as required.
The inputs BLOCK and BLKSC are available for total block of the complete SESRSYN function
and selective block of the Synchrocheck function respectively. Input TSTSC will allow testing of
the function where the fulfilled conditions are connected to a separate test output.
The outputs MANSYOK and AUTOSYOK are activated when the actual measured conditions
match the set conditions for the respective output. The output signal can be delayed
independently for MANSYOK and AUTOSYOK conditions.
A number of outputs are available as information about fulfilled checking conditions. UOKSC
shows that the voltages are high, UDIFFSC, FRDIFFA, FRDIFFM, PHDIFFA, PHDIFFM shows
when the voltage difference, frequency difference and phase angle difference are out of limits.
Output INADVCLS, inadvertent circuit breaker closing, indicates that the circuit breaker has
been closed at wrong phase angle by mistake. The output is activated, if the voltage
conditions are fulfilled at the same time the phase angle difference between bus and line is
suddenly changed from being larger than 60 degrees to smaller than 5 degrees.
Note! Similar logic for Manual Synchrocheck.
OperationSC = On
AND TSTAUTSY
AND
invalidSelection AND
OR AUTOSYOK
AND
0-60 s
AND t
tSCA
UDiffSC 50 ms
AND t
UHighBusSC
UOKSC
AND
UHighLineSC
UDIFFSC
1
1
FRDIFFA
FreqDiffA
1
PHDIFFA
PhaseDiffA
UDIFFME
voltageDifferenceValue
FRDIFFME
frequencyDifferenceValue
PHDIFFME
phaseAngleDifferenceValue
32 ms 100 ms
AND t INADVCLS
PhDiff > 60° AND
PhDiff < 5°
Figure 401: Simplified logic diagram for the auto synchrocheck function
Synchronizing SEMOD171603-4 v12

When the function is set to OperationSynch = On the measuring will be performed.

Technical manual
Control
The function will compare the values for the bus and line voltage with the set values for
UHighBusSynch and UHighLineSynch, which is a supervision that the voltages are both live.
Also the voltage difference is checked to be smaller than the set value for UDiffSynch, which is
a p.u value of set voltage base values. If both sides are higher than the set values and the
voltage difference between bus and line is acceptable, the measured values are compared with
the set values for acceptable frequency FreqDiffMax and FreqDiffMin, rate of change of
frequency FreqRateChange and phase angle CloseAngleMax.
The measured frequencies between the settings for the maximum and minimum frequency will
initiate the measuring and the evaluation of the angle change to allow operation to be sent at
the right moment including the set tBreaker time. The calculation of the operation pulse sent
in advance is using the measured SlipFrequency and the set tBreaker time. To prevent
incorrect closing pulses, a maximum closing angle between bus and line is set with
CloseAngleMax. Table 466 below shows the maximum settable value for tBreaker when
CloseAngleMax is set to 15 or 30 degrees, at different allowed slip frequencies for
synchronizing. To minimize the moment stress when synchronizing near a power station, a
narrower limit for CloseAngleMax needs to be used.
Table 466: Dependencies between tBreaker and SlipFrequency with different CloseAngleMax values
tBreaker [s] (max settable value) tBreaker [s] (max settable value) SlipFrequency [Hz]
with CloseAngleMax = 15 degrees with CloseAngleMax = 30 degrees (BusFrequency - LineFrequency)
[default value] [max value]
0.040 0.080 1.000
0.050 0.100 0.800
0.080 0.160 0.500
0.200 0.400 0.200
0.400 0.810 0.100
1.000 0.080
0.800 0.050
1.000 0.040
At operation the SYNOK output will be activated with a pulse tClosePulse and the function
resets. The function will also reset if the synchronizing conditions are not fulfilled within the
set tMaxSynch time. This prevents that the function is, by mistake, maintained in operation for
a long time, waiting for conditions to be fulfilled.
The inputs BLOCK and BLKSYNCH are available for total block of the complete SESRSYN
function and block of the Synchronizing function respectively. TSTSYNCH will allow testing of
the function where the fulfilled conditions are connected to a separate output.

Technical manual
Control
OperationSynch=On
TSTSYNCH
STARTSYN
invalidSelection
SYNPROGR
AND
BLOCK AND
S
BLKSYNCH OR
R
UDiffSynch
50 ms SYNOK
AND
UHighBusSynch AND t
UHighLineSynch OR
FreqDiffMax TSTSYNOK
AND
FreqDiffMin
tClosePulse
FreqRateChange
AND
fBus&fLine ± 5Hz
tMaxSynch
CloseAngleMax AND
SYNFAIL
PhaseDiff=Close pulse in advance
FreqDiff
Close pulse
in advance
tBreaker
=IEC06000636=5=en=Original.vsd
Figure 402: Simplified logic diagram for the synchronizing function
Energizing check M14835-3 v12

Voltage values are measured in the IED and are available for evaluation by the Energizing check
function.
The function measures voltages on the busbar and the line to verify whether they are live or
dead. This is done by comparing with the set values UHighBusEnerg and ULowBusEnerg for
bus energizing and UHighLineEnerg and ULowLineEnerg for line energizing.
The frequency on both sides of the circuit breaker is also measured. The frequencies must not
deviate from the rated frequency more than +/-5Hz.
The Energizing direction can be selected individually for the Manual and the Automatic
functions respectively. When the conditions are met the outputs AUTOENOK and MANENOK
respectively will be activated if the fuse supervision conditions are fulfilled. The output signal
can be delayed independently for MANENOK and AUTOENOK conditions. The Energizing
direction can also be selected by an integer input AENMODE respective MENMODE, which for
example, can be connected to a Binary to Integer function block (B16I). Integers supplied shall
be 1=Off, 2=DLLB, 3=DBLL and 4= Both. Not connected input will mean that the setting is done
from Parameter Setting tool. The active position can be read on outputs MODEAEN resp
MODEMEN. The modes are 0=OFF, 1=DLLB, 2=DBLL and 3=Both.
The inputs BLOCK and BLKENERG are available for total block of the complete SESRSYN
function respective block of the Energizing check function. TSTENERG will allow testing of the
function where the fulfilled conditions are connected to a separate test output.

Technical manual
Control
manEnergOpenBays
MANENOK
OR
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
UHighBusEnerg
DLLB tManEnerg
AND
OR t
AND
OR
ULowLineEnerg AND
ManEnerg BOTH
ULowBusEnerg
DBLL
AND
UHighLineEnerg
TSTENOK
ManEnergDBDL AND AND
UMaxEnerg
fBus and fLine ±5 Hz
Figure 403: Manual energizing
TSTENERG
BLKENERG
OR
BLOCK
selectedFuseOK
UHighBusEnerg
DLLB 50ms tAutoEnerg
AND
OR t t
AND OR
AUTOENOK
ULowLineEnerg AND
BOTH
AutoEnerg
ULowBusEnerg
DBLL
AND
UHighLineEnerg
TSTENOK
UMaxEnerg AND
fBus and fLine ±5 Hz
Figure 404: Automatic energizing

Technical manual
Control
BLKENERG
BLOCK OR manEnergOpenBays
AND
ManEnerg
1½ bus CB
CBConfig AND
B1QOPEN
LN1QOPEN AND
OR
B1QCLD
B2QOPEN
AND
LN2QOPEN
1½ bus alt. CB AND OR

AND
OR
B2QCLD
AND
Tie CB
AND
AND
OR
AND
Figure 405: Open bays
Fuse failure supervision M14837-3 v11

External fuse failure signals or signals from a tripped fuse switch/MCB are connected to binary
inputs that are configured to the inputs of SESRSYN function in the IED. Alternatively, the
internal signals from fuse failure supervision can be used when available. There are two
alternative connection possibilities. Inputs labelled OK must be connected if the available
contact indicates that the voltage circuit is healthy. Inputs labelled FF must be connected if
the available contact indicates that the voltage circuit is faulty.
The UB1OK/UB2OK and UB1FF/UB2FF inputs are related to the busbar voltage and the
ULN1OK/ULN2OK and ULN1FF/ULN2FF inputs are related to the line voltage. Configure them
to the binary input or function outputs that indicate the status of the external fuse failure of
the busbar and line voltages. In the event of a fuse failure, the energizing check function is
blocked. The synchronizing and the synchrocheck function requires full voltage on both sides,
thus no blocking at fuse failure is needed.
Voltage selection M14836-3 v9

The voltage selection module including supervision of included voltage transformers for the
different arrangements is a basic part of the SESRSYN function and determines the voltages
fed to the Synchronizing, Synchrocheck and Energizing check functions. This includes the
selection of the appropriate Line and Bus voltages and MCB supervision.
The voltage selection type to be used is set with the parameter CBConfig.
If No voltage sel. is set the voltages used will be U-Line1 and U-Bus1. This setting is also used in
the case when external voltage selection is provided. Fuse failure supervision for the used
inputs must also be connected.
The voltage selection function, selected voltages, and fuse conditions are used for the
Synchronizing, Synchrocheck and Energizing check inputs.

Technical manual
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For the disconnector positions it is advisable to use (NO) a and (NC) b type contacts to supply
Disconnector Open and Closed positions but, it is also possible to use an inverter for one of
the positions.
If breaker or disconnector positions not are available for deciding if energizing is allowed, it is
considered to be allowed to manually energize. This is only allowed for manual energizing in
1½ breaker and Tie breaker arrangements. Manual energization of a completely open diameter
in 1 1/2 CB switchgear is allowed by internal logic.
Voltage selection for a single circuit breaker with double busbars M14838-3 v9
The setting CBConfig selected for Double Bus activates the voltage selection for single CB and
double busbars. This function uses the binary input from the disconnectors auxiliary contacts
B1QOPEN-B1QCLD for Bus 1, and B2QOPEN-B2QCLD for Bus 2 to select between bus 1 and bus
2 voltages. If the disconnector connected to bus 1 is closed and the disconnector connected to
bus 2 is opened the bus 1 voltage is used. All other combinations use the bus 2 voltage. The
outputs B1SEL and B2SEL respectively indicate the selected Bus voltage.
The function checks the fuse-failure signals for bus 1, bus 2 and line voltage transformers.
Inputs UB1OK-UB1FF supervise the MCB for Bus 1 and UB2OK-UB2FF supervises the MCB for
Bus 2. ULN1OK and ULN1FF supervises the MCB for the Line voltage transformer. The inputs
fail (FF) or healthy (OK) can alternatively be used dependent on the available signal. If a VT
failure is detected in the selected voltage source an output signal USELFAIL is set. This output
signal is true if the selected bus or line voltages have a VT failure. This output as well as the
function can be blocked with the input signal BLOCK. The function logic diagram is shown in
figure 406.
B1QOPEN
B1SEL
B1QCLD AND
B2QOPEN B2SEL
AND
1
B2QCLD
invalidSelection
AND
bus1Voltage busVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR selectedFuseOK
AND
UB2OK AND
UB2FF OR USELFAIL
AND
ULN1OK
ULN1FF OR
BLOCK
en05000779-2.vsd
Figure 406: Logic diagram for the voltage selection function of a single circuit breaker with double
busbars

Technical manual
Control
Voltage selection for a 1 1/2 circuit breaker arrangement M14839-3 v8

Note that with 1½ breaker schemes three Synchrocheck functions must be used for the
complete diameter. Below, the scheme for one Bus breaker and the Tie breaker is described.
With the setting parameter CBConfig the selection of actual CB location in the 1 1/2 circuit
breaker switchgear is done. The settings are: 1 1/2 Bus CB, 1 1/2 alt. Bus CB or Tie CB.
This voltage selection function uses the binary inputs from the disconnectors and circuit
breakers auxiliary contacts to select the right voltage for the SESRSYN function. For the bus
circuit breaker one side of the circuit breaker is connected to the busbar and the other side is
connected either to line 1, line 2 or the other busbar depending on the best selection of voltage
circuit.
Inputs LN1QOPEN-LN1QCLD, B1QOPEN-B1QCLD, B2QOPEN-B2QCLD, LN2QOPEN-LN2QCLD are

inputs for the position of the Line disconnectors respectively the Bus and Tie breakers. The
outputs LN1SEL, LN2SEL and B2SEL will give indication of the selected Line voltage as a
reference to the fixed Bus 1 voltage, which indicates B1SEL.
The fuse supervision is connected to ULN1OK-ULN1FF, ULN2OK-ULN2FF and with alternative

Healthy or Failing fuse signals depending on what is available from each fuse (MCB).
The tie circuit breaker is connected either to bus 1 or line 1 voltage on one side and the other
side is connected either to bus 2 or line 2 voltage. Four different output combinations are
possible, bus to bus, bus to line, line to bus and line to line.
• The line 1 voltage is selected if the line 1 disconnector is closed.

• The bus 1 voltage is selected if the line 1 disconnector is open and the bus 1 circuit breaker
is closed.
• The line 2 voltage is selected if the line 2 disconnector is closed.
• The bus 2 voltage is selected if the line 2 disconnector is open and the bus 2 circuit breaker
is closed.
The function also checks the fuse-failure signals for bus 1, bus 2, line 1 and line 2. If a VT failure
is detected in the selected voltage an output signal USELFAIL is set. This output signal is true
if the selected bus or line voltages have a MCB trip. This output as well as the function can be
blocked with the input signal BLOCK. The function block diagram for the voltage selection of a
bus circuit breaker is shown in figure 407 and for the tie circuit breaker in figure 408.

Technical manual
Control
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1QOPEN
LN2SEL
B1QCLD AND AND
B2SEL
OR
LN2QOPEN
AND invalidSelection
LN2QCLD AND
AND
B2QOPEN
B2QCLD AND
line1Voltage lineVoltage
line2Voltage
bus2Voltage
UB1OK
UB1FF OR
OR selectedFuseOK
UB2OK AND
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000780-2.vsd
Figure 407: Simplified logic diagram for the voltage selection function for a bus circuit breaker in a 1 1/2
breaker arrangement

Technical manual
Control
LN1QOPEN
AND
LN1SEL
LN1QCLD
B1SEL
1
B1QOPEN AND
AND
B1QCLD AND
line1Voltage busVoltage
bus1Voltage
LN2QOPEN
LN2SEL
LN2QCLD AND
B2SEL
1
invalidSelection
OR
B2QOPEN AND
AND
B2QCLD AND
line2Voltage lineVoltage
bus2Voltage
UB1OK AND
UB1FF OR
OR selectedFuseOK
UB2OK AND
AND
UB2FF OR
USELFAIL
ULN1OK AND
AND
ULN1FF OR
ULN2OK
AND
ULN2FF OR
BLOCK
en05000781-2.vsd
Figure 408: Simplified logic diagram for the voltage selection function for the tie circuit breaker in 1 1/2
breaker arrangement.

M12359-1 v15
Table 467: SESRSYN technical data

Phase shift, jline - jbus (-180 to 180) degrees -
Voltage high limit for synchronizing and (50.0-120.0)% of UBase ±0.5% of Ur at U ≤ Ur

synchrocheck ±0.5% of U at U > Ur
Reset ratio, synchrocheck > 95% -

Frequency difference limit between bus (0.003-1.000) Hz ±2.5 mHz
and line for synchrocheck

Technical manual
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Phase angle difference limit between bus (5.0-90.0) degrees ±2.0 degrees
and line for synchrocheck
Voltage difference limit between bus and (0.02-0.5) p.u ±0.5% of Ur
line for synchronizing and synchrocheck
Time delay output for synchrocheck when (0.000-60.000) s ±0.2% or ±35 ms whichever is
angle difference between bus and line greater
jumps from “PhaseDiff” + 2 degrees to
“PhaseDiff” - 2 degrees
Frequency difference minimum limit for (0.003-0.250) Hz ±2.5 mHz
synchronizing
Frequency difference maximum limit for (0.050-1.000) Hz ±2.5 mHz
synchronizing
Maximum allowed frequency rate of (0.000-0.500) Hz/s ±10.0 mHz/s
change
Maximum closing angle between bus and (15-30) degrees ±2.0 degrees
line for synchronizing
Breaker closing pulse duration (0.050-1.000) s ±0.2% or ±15 ms whichever is
greater
tMaxSynch, which resets synchronizing (0.000-6000.00) s ±0.2% or ±35 ms whichever is
function if no close has been made before greater
set time
Minimum time to accept synchronizing (0.000-60.000) s ±0.2% or ±35 ms whichever is
conditions greater
Voltage high limit for energizing check (50.0-120.0)% of UBase ±0.5% of Ur at U ≤ Ur
Reset ratio, voltage high limit > 95% -

Voltage low limit for energizing check (10.0-80.0)% of UBase ±0.5% of Ur
Reset ratio, voltage low limit < 105% -

Maximum voltage for energizing (50.0-180.0)% of UBase ±0.5% of Ur at U ≤ Ur
Time delay for energizing check when (0.000-60.000) s ±0.2% or ±100 ms whichever is
voltage jumps from 0 to 90% of Urated greater
Operate time for synchrocheck function Min. = 15 ms –
when angle difference between bus and Max. = 30 ms
line jumps from “PhaseDiff” + 2 degrees to
“PhaseDiff” - 2 degrees
Operate time for energizing function Min. = 70 ms –
when voltage jumps from 0 to 90% of Max. = 90 ms
Urated
15.2 Autorecloser for 1 phase, 2 phase and/or 3 phase

operation SMBRREC IP14559-1 v6

Technical manual
Control
M14890-1 v7
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

Autorecloser for 1 phase, 2 phase and/or 3 SMBRREC 79
phase
5(0 -->1)
The auto recloser (SMBRREC) function provides:
• high-speed and/or delayed auto reclosing

• single and/or three phase auto reclosing
• support for single or multi-breaker applications.
The auto recloser can be used for delayed busbar restoration.
Up to five reclosing shots can be performed. The first shot can be single-, two-, and /or three-
phase depending on the type of the fault and the selected auto reclosing mode.
Several auto reclosing functions can be provided for multi-breaker arrangements. A priority
circuit allows one circuit breaker to reclose first and the second will only close if the fault
proved to be transient.
Each auto reclosing function can be configured to co-operate with the synchrocheck function.
SMBRREC
ON BLOCKED
OFF SETON
BLKON READY
BLKOFF ACTIVE
RESET SUCCL
INHIBIT UNSUCCL
START INPROGR
STARTHS 1PT1
TRSOTF 2PT1
SKIPHS 3PT1
ZONESTEP 3PT2
TR2P 3PT3
TR3P 3PT4
THOLHOLD 3PT5
CBREADY PERMIT1P
CBCLOSED PREP3P
PLCLOST CLOSECB
SYNC WFMASTER
WAIT COUNT1P
RSTCOUNT COUNT2P
MODEINT COUNT3P1
COUNT3P2
COUNT3P3
COUNT3P4
COUNT3P5
COUNTAR
MODE
ABORTED
SYNCFAIL
INHIBOUT
Figure 409: SMBRREC function block

Technical manual
Control
15.2.4 Signals
Table 468: SMBRREC Input signals

ON BOOLEAN 0 Switch AR On (at ExternalCtrl = On)
OFF BOOLEAN 0 Switch AR Off (at ExternalCtrl = On)
BLKON BOOLEAN 0 Set AR in blocked state
BLKOFF BOOLEAN 0 Release AR from blocked state
RESET BOOLEAN 0 Reset AR to initial conditions
INHIBIT BOOLEAN 0 Interrupt and inhibit reclosing sequence
START BOOLEAN 0 Start reclosing sequence
STARTHS BOOLEAN 0 Start high-speed reclosing without synchrocheck
TRSOTF BOOLEAN 0 Continue to shots 2-5 at a trip from switch-on-to-fault
SKIPHS BOOLEAN 0 Skip high speed shot and continue with delayed shots
ZONESTEP BOOLEAN 0 Coordinate local AR with down stream devices
TR2P BOOLEAN 0 Two phase trip occurred
TR3P BOOLEAN 0 Three phase trip occurred
THOLHOLD BOOLEAN 0 Hold AR in wait state
CBREADY BOOLEAN 0 Circuit breaker is ready
CBCLOSED BOOLEAN 0 Circuit breaker status
PLCLOST BOOLEAN 0 Power line carrier or other form of permissive signal is lost
SYNC BOOLEAN 0 Synchrocheck conditions are fulfilled
WAIT BOOLEAN 0 Wait for master
RSTCOUNT BOOLEAN 0 Reset counters
MODEINT INTEGER 0 Integer input used to set reclosing mode (alternative to
setting)
Table 469: SMBRREC Output signals

BLOCKED BOOLEAN AR is blocked
SETON BOOLEAN AR is operative
READY BOOLEAN AR is ready for a new sequence
ACTIVE BOOLEAN Reclosing sequence in progress
SUCCL BOOLEAN Reclosing is successful
UNSUCCL BOOLEAN Reclosing is unsuccessful
INPROGR BOOLEAN Reclosing in progress, inactive during reclaim time
1PT1 BOOLEAN Single-phase reclosing is in progress for shot 1
2PT1 BOOLEAN Two-phase reclosing is in progress for shot 1
3PT1 BOOLEAN Three-phase reclosing is in progress for shot 1

Technical manual
Control

PERMIT1P BOOLEAN Single-phase trip is permitted
PREP3P BOOLEAN Three-phase trip is prepared
CLOSECB BOOLEAN Close command for circuit breaker
WFMASTER BOOLEAN Wait signal to slave issued by master for sequential reclosing
COUNT1P INTEGER Number of single-phase reclosing shots
COUNT2P INTEGER Number of two-phase reclosing shots
COUNT3P1 INTEGER Number of three-phase shot 1 reclosings
COUNTAR INTEGER Number of total reclosing shots
MODE INTEGER Integer output for reclosing mode
ABORTED BOOLEAN General abort
SYNCFAIL BOOLEAN AR sequence is aborted by synchrocheck conditions not
fulfilled
INHIBOUT BOOLEAN AR sequence is aborted via INHIBIT input
15.2.5 Settings
Table 470: SMBRREC Group settings (basic)

On
ExternalCtrl Off - - Off To be set On if AR is to be used with
On external control
ARMode 3 phase - - 1/2/3ph AR mode selection
1/2/3ph
1/2ph
1ph+1*2ph
1/2ph+1*3ph
1ph+1*2/3ph
t1 1Ph 0.000 - 120.000 s 0.001 1.000 Dead time for shot 1, single-phase
reclosing
t1 3Ph 0.000 - 120.000 s 0.001 6.000 Dead time for shot 1, delayed three-
phase reclosing with synchrocheck
conditions
t1 3PhHS 0.000 - 120.000 s 0.001 0.400 Dead time for shot 1, high speed
three-phase reclosing
tReclaim 0.00 - 6000.00 s 0.01 60.00 Reclaim time
tSync 0.00 - 6000.00 s 0.01 30.00 Maximum wait time for fulfilled
synchrocheck conditions
tLongStartInh 0.000 - 60.000 s 0.001 0.200 Maximum allowed start pulse duration
tPulse 0.000 - 60.000 s 0.001 0.200 Circuit breaker closing pulse duration

Technical manual
Control

tCBClosedMin 0.00 - 6000.00 s 0.01 5.00 Minimum time that circuit breaker
must be closed before new sequence
is allowed
tUnsucCl 0.00 - 6000.00 s 0.01 30.00 Maximun wait time for circuit breaker
closing before indicating unsuccessful
Priority None - - None Priority selection between adjacent
Low terminals
High
tWaitForMaster 0.00 - 6000.00 s 0.01 60.00 Maximum wait time for release from
master
LongStartInhib Off - - On To be set ON if AR is to be used with
On maximum allowed start pulse
duration check
Table 471: SMBRREC Group settings (advanced)

NoOfShots 1 - - 1 Max number of reclosing shots
2
3
4
5
StartByCBOpen Off - - Off To be set ON if AR is to be started by
On circuit breaker open position
CBReadyType CO - - CO Circuit breaker ready signal type
OCO
t1 2Ph 0.000 - 120.000 s 0.001 1.000 Dead time for shot 1, two-phase
reclosing
t2 3Ph 0.00 - 6000.00 s 0.01 30.00 Dead time for shot 2, three-phase
reclosing
reclosing
reclosing
reclosing
Extended t1 Off - - Off Extend dead time at loss of
On permissive channel
tExtended t1 0.000 - 60.000 s 0.001 0.500 Extend three-phase dead time
duration
tInhibit 0.000 - 60.000 s 0.001 5.000 Reset time for reclosing inhibit
CutPulse Off - - Off Shorten circuit breaker closing pulse
On at a new start
Follow CB Off - - Off Advance to next shot if circuit breaker
On has been closed during dead time
AutoContinue Off - - Off Continue with next reclosing shot if
On circuit breaker did not close
tAutoContWait 0.000 - 60.000 s 0.001 2.000 Wait time after close command before
proceeding to next shot
UnsucClByCBChk NoCBCheck - - NoCBCheck Unsuccessful closing signal obtained
CB check by checking circuit breaker position
BlockByUnsucCl Off - - Off Block AR at unsuccessful reclosing
On

Technical manual
Control

ZoneSeqCoord Off - - Off Coordination of down stream devices
On to local protection unit’s AR
tSuccessful 0.000 - 60.000 s 0.001 1.000 Delay time before indicating
successful reclosing
tSlaveDeadTime 0.100 - 60.000 s 0.001 0.400 Wait time for the slave to close when
WAIT input has reset
15.2.6.1 Terminology explanation GUID-EA0760DF-8F0B-4146-8A42-3F20E75E1053 v1
Before describing the auto reclosing function it is first necessary to define the following
terminology:
• a shot is an attempt from the function to close a circuit breaker

• multi-shot is where more than one shot is attempted
• dead time is the time between a start of the function and the attempt to close the circuit
breaker
• reclaim time is the time from the circuit breaker closing command till the reset of the
function, should the auto reclosing attempt be successful and no new start is received
• high-speed shot is generally used for an application where the dead time is less than 1
second and synchrocheck is not required
• delayed auto reclosing is generally regarded as an application where the dead time is
greater than 1 second and where typically synchrocheck is required
• sequence is the auto reclosing cycle beginning with start and ending with successful,
unsuccessful or aborted reclosing as a result
• status is the state which the auto reclosing function have reached in the sequence
15.2.6.2 Status descriptions GUID-AFC069D6-ADA5-4D97-9699-8C9F058458EB v1
The auto reclosing function can be in one of the following five statuses:
“Inactive” GUID-BF80C969-FCBE-4CAB-BF71-9590A2DB433C v1
The auto recloser is in “inactive” status when the following conditions are fulfilled:
• the auto recloser is set to On and

• either the circuit breaker is not closed
• or the circuit breaker is not ready
The function will not react on any start from protection trips while in “inactive” status and
no automatic reclosing is possible.
“Ready” GUID-04F154EC-E236-40A4-A3E0-7624A2F6B132 v1
The function is in “ready” status when the following conditions are fulfilled:
• the circuit breaker is ready

• the circuit breaker must have been closed for more that the set time in setting:
tCBClosedMin
• the function is not in “blocked” status
• the function is not in “in progress” status
Only in “ready” status a start of the auto reclosing sequence is possible.

Technical manual
Control
“In progress” GUID-24F8890F-A8FA-4A6F-B9E8-08BDB17B9A0D v1

The function is in “in progress” status when the following condition is fulfilled:
• the auto reclosing sequence is started
Start can be initiated by either protection trip command or circuit breaker position change.
The second starting alternative is only possible when enabled by a setting.
In “in progress” status the dead time starts and the status ceases when the dead time expires.
Then circuit breaker close command is given and the function changes its state into the
"reclaim time" status.
“Reclaim time” GUID-D838C380-C74B-498C-82D6-3364E2F6BA22 v1

The auto recloser is in “reclaim time” status while the following conditions are fulfilled:
• the reclaim time has not yet expired

• the status is not interrupted by either a new start signal or a block signal
A new start signal during “reclaim time” status forces the function to proceed to next shot and
change state into “in progress” status, as long as the last shot is not reached.
“Blocked” GUID-9C38B1BE-3772-49AE-B4B3-391CE15D5CD2 v1
The function is in “blocked” status when an external blocking signal exists. No auto reclosing is
possible in “blocked” status. Only an external signal for cancellation of the blocking can cancel
this status.
15.2.6.3 Description of the status transition GUID-C12DF571-AC0D-4A04-9B9E-D53E15A24331 v1
From Table 472 below it is possible to see which status transitions are possible. When the auto
recloser is for instance in “inactive” status only two transition are possible:
• transition to “ready” status when the circuit breaker is ready and closed
• transition to “blocked” status by external blocking
The empty cells in the table indicate that no such transition is possible.

Technical manual
Control
Table 472: Status transition matrix

To → inactive ready in progress reclaim time blocked
From ↓ (dead time)
inactive activate activate BLKON
CBCLOSED and
CBREADY
ready deactivate activate START activate BLKON
CBCLOSED or or activate
CBREADY or STARTHS
activate INHIBIT
or RESET
in progress activate INHIBIT when activate BLKON
(dead time) or RESET CBCLOSED
issued
reclaim time activate RESET activate START activate BLKON
or INHIBIT and the last
shot has not
been reached
yet
blocked deactivate activate
CBCLOSED or BLKOFF and
CBREADY and CBCLOSED and
activate CBREADY
BLKOFF
15.2.6.4 Functional sequence description GUID-C73A160D-330B-4627-B8F0-A31C9B3F7417 v1
To comprehend this chapter better it is essential to first read chapters “Status

descriptions“ and “Description of the status transition” carefully.
The logic for most of the explained inputs, outputs, settings and internal signals, described in
this chapter, is shown in Figure 415. Other figures mentioned are in some way connected or
cooperate with Figure 415.
Before going into details in the following chapters, the short functional/feature summary is
given below.
The auto reclosing function is multi-shot capable and suitable for both high-speed and
delayed auto reclosing. The function can be set to perform a single-shot, two-shot, three-shot,
four-shot or five-shot reclosing sequence. Dead times for all shots can be set independently.
An auto recloser sequence can be initiated by:
• protection operation
• circuit breaker operation (when enabled by setting StartByCBOpen=On)
At the end of the dead time, provided that other conditions are fulfilled, a circuit breaker close
command signal is given. The other conditions to be fulfilled are:
• input signal SYNC is true, which typically indicates that power systems on the two sides of
the circuit breaker are in synchronism
• and that input signal CBREADY is true, typically indicating that circuit breaker springs are
charged.
If a circuit breaker close command is given successfully at the end of the dead time, a reclaim
time starts. If the circuit breaker does not trip again within reclaim time, the auto recloser
indicates a successful reclosing and resets into "ready" status. If the protection trips again
during the reclaim time, the sequence advances to the next shot. If all reclosing attempts have

Technical manual
Control
been made and the circuit breaker does not remain closed, the auto recloser indicates an
unsuccessful reclosing. Each time a breaker close command is given, a shot counter is
incremented by one.
Operation Off and On GUID-D868C9CF-CDB1-48AA-8B31-60C447FBD1D3 v1

The auto recloser can be switched Off or On with a setting or by external control inputs. With
the setting Operation = On, the auto recloser is activated and with the setting Operation = Off
it is deactivated. With the settings Operation = On and ExternalCtrl = On, the activation and
deactivation is made by signal pulses to the ON and OFF inputs, for example, from a control
system or by a control switch.
If the input conditions CBCLOSED and CBREADY, from the circuit breaker, are not fulfilled
while switching the auto recloser on, the auto recloser changes into “inactive” status and the
output SETON is activated (high). The auto recloser is not ready for auto reclosing. If, however,
the circuit breaker is closed and ready when switching the auto recloser on, the output READY
is activated and the function is prepared to start the auto reclosing cycle. The circuit breaker
must have been closed for at least the set value for setting tCBClosedMin before a start is
accepted. The logic for Off or On operation is shown in Figure 410.
Operation
AND OR S SETON
ExternalCtrl
R
ON AND
OR
OFF AND
StartByCBOpen
START AND
STARTHS AND
100ms OR
AND OR initiate
100ms
AND
TRSOTF
startThermal AND
CBReady
120ms
CBREADY OR S
t AND start
AND
AND
tCBClosedMin R
CBCLOSED
t
cbClosed AND
count0 AND READY
inhibit
OR
INHIBIT
Figure 410: Simplified logic for Operation Off/On and starting
Mode selection GUID-25A24DC8-80C8-4C42-A084-D25712049F06 v1

The auto reclosing mode is selected with the setting ARMode. As an alternative to the setting,
the mode can be selected by connecting an integer, for example from function block B16I, to
the MODEINT input. The six possible modes are described in Table 473 below with their
corresponding MODEINT integer value.

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When a valid integer is connected to the input MODEINT the selected setting ARMode will be
invalid and the MODEINT input value will be used instead. The selected mode is reported as an
integer on the MODE output.
Please note that tripping mode of the IED is defined in Trip Logic function block SMPPTRC. For
example for two-phase faults either 2ph or 3ph tripping and consequent auto reclosing can be
selected
Table 473: Type of reclosing shots at different settings of “ARMode” or integer inputs to "MODEINT"
MODEINT (Integer) ARMode Type of fault 1st shot 2nd - 5th shot
1ph 3ph 3ph
1 3ph 2ph 3ph 3ph
3ph 3ph 3ph
1ph 1ph 3ph
2 1/2/3ph 2ph 2ph 3ph
3ph 3ph 3ph
1ph 1ph 3ph
3 1/2ph 2ph 2ph 3ph
3ph - -
1ph 1ph 3ph
4 1ph+1x2ph 2ph 2ph -
3ph - -
1ph 1ph 3ph
5 1/2ph+1x3ph 2ph 2ph 3ph
3ph 3ph –
1ph 1ph 3ph
6 1ph+1x2/3ph 2ph 2ph -
3ph 3ph -
Auto reclosing shots GUID-817797BE-FAFC-4BC7-B288-F19416459DCE v1

A maximum of five auto reclosing shots can be selected with the setting NoOfShots. Every
shot has its own dead time setting.
The first shot differs from the other shots by the possibility to extend its dead time and to
utilize up to four different time settings for it.
For the first shot, there are separate settings for single-, two- and three-phase dead times, t1
1Ph, t1 2Ph and t1 3Ph. If only the START input signal is applied, and an auto-reclosing program
with single-phase reclosing is selected, the auto reclosing dead time t1 1Ph will be used. If one
of the TR2P or TR3P inputs is activated in in parallel with the START input, the auto reclosing
dead time for either two-phase or three-phase auto reclosing is used.
There is also a separate time setting facility for three-phase high-speed auto reclosing, t1
3PhHS. This high-speed auto reclosing is activated by the STARTHS input and is used when
auto reclosing is done without the requirement of synchrocheck conditions to be fulfilled. The
high-speed dead time shall be set shorter than normal first shot three-phase dead time. Note
that if high-speed three-phase shot is not successful the auto reclosing sequence will continue
with shot two.
A time extension delay, tExtended t1, can be added to the dead time delay for the first shot. It
is intended to come into use if the communication channel for permissive line protection is
lost. In a case like this there can be a significant time difference in fault clearance at the two

Technical manual
Control
line ends, where a longer auto reclosing dead time can be useful. This time extension is
controlled by the setting Extended t1 and the PLCLOST input. The logic for control of extended
dead time is shown in Figure411 and Figure 415. Time extension delay is not possible to add to
the three-phase high-speed auto reclosing dead time, t1 3PhHS.
Extended t1
AND extendTime
PLCLOST
OR
initiate AND
AND
start
Figure 411: Control of extended dead time

Shots 2 to 5 are all three-phase shots and have only one corresponding time setting each, t2
3Ph, t3 3Ph, t4 3Ph and t5 3Ph.
Starting auto reclosing GUID-7794EA6E-7D73-46BD-A623-65DED8E45D05 v1

When a start is applied to the auto function, it status will change from “ready” status to “in
progress” status. When the dead time has expired, the close command is issued and the
reclaim time is started and the “in progress” status will change to “reclaim time” status.
The usual way to start a reclosing sequence, is to start it when a selective line protection
tripping has occurred, by applying a signal to the START input. If the auto reclosing mode with
only three-phase reclosing is selected, activation of the START input will start the three-phase
dead timer. When alternatively the START input signal is applied, and an auto reclosing mode
with single-phase reclosing is selected, the auto reclosing dead time for single-phase is used.
However if one of the TR2P or TR3P inputs is activated in connection with the START input, the
auto reclosing dead time for two-phase or three-phase auto reclosing is used. The STARTHS
input (start high-speed reclosing) can also be used to start a separate, high-speed three-phase
dead time in which case the synchrocheck condition will be bypassed.
To start a new auto reclosing cycle, a number of conditions of input signals need to be fulfilled.
The inputs are:
• CBREADY: circuit breaker is ready for a reclosing cycle, for example, charged operating
gear.
• CBCLOSED: to ensure that the circuit breaker was closed when the line fault occurred and
start was applied. The CBCLOSED condition must be present for more that the settable
time tCBClosedMin.
• no BLKON or INHIBIT signal is present.
When the start has been accepted, the internal signals “start” and “initiate” are set. The
internal signal “start” is latched and the internal signal “initiate” follows the length of the
signal on the START input. The latched signal “start” can be interrupted by a signal to the
INHIBIT input.
The simplified logic is shown in Figure 410.
The auto recloser is normally started by selective tripping. It is either a zone 1 or

communication aided trip, or a general trip. If the general trip is used the auto recloser must
be blocked, via the INHIBIT input, from all back-up tripping. The breaker failure function must
always be connected to inhibit the auto recloser. START makes a first shot with synchrocheck
conditions to be fulfilled, STARTHS makes its first shot without any fulfilled synchrocheck
conditions. The TRSOTF “trip by switch onto fault” input starts shots 2 to 5. It may be
connected to the “switch onto fault” output of line protection if multi-shot auto reclosing is
used.

Technical manual
Control
In normal circumstances, the auto recloser is started with a protection trip command which
resets quickly due to fault clearing. In case the start signal lasts for a too long time, the user
can set a maximum start pulse duration tLongStartInh. This start pulse duration time is
controlled by setting LongStartInhib. When the start pulse duration signal is longer than the
set maximum start pulse duration, the auto reclosing sequence will be interrupted in the same
way as if the INHIBIT input was set to true. The logic for the control of long start pulse
duration is shown in Figure 412.
LongStartInhib
start
AND
tLongStartInh
initiate
t
longStartInhibit
OR
Extended t1 AND
t13PhExtTimeout
Figure 412: Control of long start pulse duration

If the user wants to start the auto recloser from circuit breaker open position instead of the
protection trip signals, this starting mode is selected by enabling a setting StartByCBOpen.
Typically, a circuit breaker auxiliary contact of type normally open (NO) shall be connected to
the CBCLOSED and START inputs. Then the circuit breaker status change from closed to open
will generate an auto reclosing start pulse of limited length (100ms) subject to the usual auto
recloser checks. The auto reclosing sequence continues then as usual. Signals from manual
tripping and other functions, which shall prevent auto reclosing, need to be connected to the
INHIBIT input. The logic for start from circuit breaker open position is shown in Figure 410.
The function can also be set to proceed to the next reclosing shot (if selected) even if the
external start signal is not received but the breaker is still not closed. The user can set a
required time delay for the auto recloser to proceed without a new start with setting
tAutoContWait. Also the synchrocheck conditions not fulfilled will also make the auto recloser
to proceed to next shot. This automatic proceeding of shots is controlled by setting
AutoContinue and is shown in figure 413.
tAutoContWait
t
AND
commandCloseCB
AND S
R
OR
AND
OR
cbClosed AND autoInitiate
synchroCheckOK
AutoContinue
Figure 413: Automatic proceeding of shots
Blocking, resetting and inhibiting auto reclosing GUID-82719FE0-02E4-48FB-9685-2146480F3653 v1

The BLKON input is used to block the auto recloser for example, when certain special service
conditions arise. The auto recloser can also be blocked by an unsuccessful reclosing attempt.

Technical manual
Control
This is controlled by the setting BlockByUnsucCl. When the auto recloser is blocked it
immediately resets to its initial conditions and the ACTIVE output is unactivated. The
BLOCKED output indicates that the auto recloser is blocked. To unblock the auto recloser the
BLKOFF input must be activated.
The RESET input is used to reset the auto recloser to its initial conditions. When initial starting
conditions are fulfilled again, after a reset, the auto recloser is ready for a new reclosing
sequence.
If the INHIBIT input is activated it is reported on the INHIBOUT output. To ensure reliable
interruption and temporary blocking of the auto recloser a reset time delay tInhibit is used.
The auto recloser will be blocked the time set in tInhibit after the deactivation of the INHIBIT
input. The following internal inhibit signals are also affected by the setting tInhibit:
• inhibitWaitForMaster: after expiration of the tWaitForMaster time for the WAIT input to
reset, the reclosing cycle of the slave is inhibited.
• longStartInhibit: if start pulse duration is longer than the tLongStartInh time, the
reclosing cycle is inhibited.
The ABORTED output indicates that the auto recloser is inhibited while it was in one of
following internal states:
• inProgress: auto recloser is started and dead time is in progress.

• reclaimTimeStarted: the circuit breaker closing command has started the reclaim timer.
• wait: an auto recloser, acting as slave, is waiting for a release from the master to proceed
with its own reclosing sequence.
The SYNCFAIL output indicates that the auto recloser is inhibited because the synchrocheck or
energizing check condition has not been fulfilled within the set time interval, tSync. The
ABORTED output will also be activated.
The behavior of the functionality described above is described in Table 474 and Table 475
below.
Table 474: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "ready" status
Output → READY ACTIVE BLOCKED INHIBOUT ABORTED SYNCFAIL

Input ↓
None of below True False False False False False
inputs
activated
BLKON pulse False False True False False False
BLKOFF pulse True False False False False False
RESET pulse False False False False False False
INHIBIT pulse False False False True False False
SYNC True False False False False False
Table 475: BLKON, BLKOFF, RESET, INHIBIT and SYNC behavior when the function is in "in progress" status
Output → READY ACTIVE BLOCKED INHIBOUT ABORTED SYNCFAIL

Input ↓
None of below False True False False False False
inputs
activated
BLKON pulse False False True False False False

Technical manual
Control
BLKOFF pulse True False False False False False

RESET pulse False False False False False False
INHIBIT pulse False False False True True False
No SYNC False False False False True True
Auto reclosing sequence GUID-78AAE7CD-702E-407B-94D2-6A70BAFC8E70 v1

When the function has started and the dead time has elapsed during the auto reclosing
sequence, certain conditions must be fulfilled before the circuit breaker closing command is
issued. In three-phase reclosing, a synchrocheck and/or energizing check can be used. It is
possible to use a synchrocheck function in the same physical device or an external one. The
synchrocheck release signal shall be connected to the auto reclosing SYNC input. If reclosing
without synchrocheck is preferred the SYNC input can be set to TRUE (set high) permanently.
The synchrocheck release signal is not checked for single-phase or two-phase auto reclosing.
When a three-phase high-speed reclosing started by STARTHS input, synchronization is not
checked either, and the state of the SYNC input is disregarded. The SYNC input shall be true
within a set time interval, tSync. If it is not, the auto reclosing is interrupted and the SYNCFAIL
and ABORTED outputs are activated.
By choosing CBReadyType = CO (circuit breaker ready for a Close-Open sequence) the

readiness of the circuit breaker is also checked before issuing the circuit breaker closing
command. If the circuit breaker has a readiness contact of type CBReadyType = OCO (circuit
breaker ready for an Open-Close-Open sequence) this condition may not be fulfilled during the
dead time and at the moment of auto reclosure. The Open-Close-Open condition was however
checked at the start of the auto reclosing cycle and it is then likely that the circuit breaker is
prepared for a Close-Open sequence.
The reclaim timer, tReclaim, is started each time a circuit breaker closing command is given. If
no start occurs within this time, the auto recloser will reset. A new start received in “reclaim
time” status will move the auto recloser to “in progress” status and next shot as long as the
final shot is not reached. The auto recloser will reset and enter “inactive” status if a new start
is given during the final reclaim time. This will also happen if the circuit breaker has not been
closed within set time interval tUnsucCl after each circuit breaker close command. The latter
case is controlled by setting UnsucClByCBChk. The auto reclosing sequence is considered
unsuccessful for both above cases and the UNSUCCL output is activated.
If the circuit breaker closing command is given and the circuit breaker is closed within the set
time interval tUnsucCl, the SUCCL output is activated after the set time interval tSuccessful.
The logic for successful and unsuccessful reclosing indication is shown in Figure 414.

Technical manual
Control
initiate
reclaimTimeStarted AND
OR
AND UNSUCCL
OR tUnsucCl S
AND t unsuccessful
cbClosed
AND
UnsucClByCBChk
count0
OR R
tUnsucCl tSuccessful
AND SUCCL
commandCloseCB t AND S t
R
OR
Figure 414: Successful/Unsuccessful

Figure 415 shows the logic for most parts of an auto reclosing sequence. Figure 415 should be
read together with the other logic diagrams to get the whole picture.

Technical manual
ZoneSeqCoord
714
ZONESTEP AND
Control
MODEINT MODE
Section 15
start ARMode
initiate inProgress
TR2P and INPROGR
TR3P NoOfShots 1PT1
startThermal OR 2PT1
selection 3PT1
Dead time
reclaimTimeStarted 3PT2
tExtended t1 tExtended t1 is 3PT3
extendTime added to t1 1Ph inhibitThermalStart 3PT4
t
or t1 2ph or t1 3Ph 3PT5
SKIPHS Skips high-speed shot (t1 3PhHS) and PREP3P
continues with delayed shot (t1 3Ph) AND tReclaim PERMIT1P
AND t 1
t1 1Ph OR
t1 2Ph OR
Dead t1 3PhHS AND
t13PhExtTimeout
time inhibit
t1 3PH OR OR
settings t2 3PH synchroCheckOK
t3 3PH OR BlockByUnsucCl
t4 3PH AND
t5 3PH unsuccessful AND ACTIVE
1
t OR OR
AND S
Figure 415: Auto reclosing sequence

tSlaveDeadTime AND
slaveDeadTime sets every dead timer R
t BLOCKED
sequence. The outputs are:

to tSlaveDeadTime
tSync
SYNC AND t SYNCFAIL
inProgress AND
reclaimTimeStarted OR
CBReadyType wait AND ABORTED
CB OR
AND
readiness
AND inhibitWaitForMaster tInhibit
CBReady check t
OR
longStartInhibit count0
OR Counter COUNT1P
inhibitThermalStart COUNT2P
CutPulse inProgress COUNT3P1
AND Set COUNT3P2
OR COUNT3P3
OR COUNT3P4
AND
AND COUNT3P5
Reset COUNTAR

tPulse
Follow CB CLOSECB
OR
AND AND
cbClosed
50ms commandCloseCB
RSTCOUNT
RESET
BLKON
BLKOFF
INHIBIT INHIBOUT
A number of outputs from the function keeps track of the actual state in the auto reclosing
Technical manual
1MRK 506 370-UEN J
Control
• INPROGR: any dead time is in progress

• 1PT1, 2PT1, 3PT1, 3PT2, 3PT3, 3PT4 and 3PT5: dead time is in progress for respective shot
and fault type
• ACTIVE: during dead time + reclaim time
• COUNTAR: total number of auto reclosing shots
• COUNT1P, COUNT2P, COUNT3P1, COUNT3P2, COUNT3P3, COUNT3P4 and COUNT3P5:
number of circuit breaker close commands made for respective shot
• STATUS: reports, only through the IEC 61850 protocol, the actual status of the function.
The possible statuses are described in Table 476 below. Their mapping to output signals and
their corresponding IEC 61850 integer value is also given in the table. Mapping from
IEC 61850 Ed2 standard is also shown for the AutoRecSt data object.
Table 476: Auto reclosing status reported by IEC 61850 in priority order
Data object AutoRecSt Description for mapped Mapped output signals / Description in IEC61850
value signals Comments Ed2
1 Ready READY Ready
2 In Progress INPROGR In Progress
3 Successful SUCCL Successful
4 Waiting for trip
5 Trip issued by protection
6 Fault disappeared
7 Wait to complete CLOSECB Wait to complete
8 Circuit breaker closed
9 Cycle unsuccessful UNSUCCL
10
-1 Aborted by synchrocheck SYNCFAIL
fail
11 Aborted ABORTED Aborted
-2 Set On, Not Ready SETON = 1, READY = 0,
ACTIVE = 0, SUCCL = 0,
UNSUCC = 0, INPROG = 0
-3 Set Off, Not Ready SETON = 0
-99 Others Means that auto recloser
is in transitional state,
that should not be visible
in steady state situation
There are several counters within the function. One for each shot and type of fault and one
overall counter for total number of circuit breaker closing commands. All counters can be reset
to zero using either the HMI command or the RSTCOUNT input or by an IEC 61850 command.
The circuit breaker closing command, CLOSECB output is a pulse with settable duration by
setting tPulse. For circuit breakers without anti-pumping function, close pulse cutting can be
used. This is controlled by the setting CutPulse. In case of a new auto recloser start pulse, the
breaker closing command pulse is cut (interrupted). The minimum duration of the closing
pulse is always 50ms.
The prepare three-phase trip, PREP3P output is usually connected to the trip function
SMPPTRC to force the coming trip to be three-phase. If the auto recloser cannot make a single-
phase or two-phase reclosing, the start from the trip function should be three-phase.

Technical manual
Control
The permit single-phase trip, PERMIT1P output is the inverse of the PREP3P output. It can be
connected to a binary output relay for connection to external protection or trip relays. In case
of a total loss of auxiliary power, the output relay drops and does not allow single-phase trip.
The setting Follow CB can be used to prevent close command to be issued when dead time has
expired and circuit breaker is already closed (e.g. by manual close command). If a new start is
received after the dead time expiration the auto recloser will advance to next shot.
If input SKIPHS is activated, and simultaneously STARTHS input is initiated then actually
normal three-phase shot one with dead time "t1 3Ph" will be started.
The ZONESTEP input is used when coordination between local auto reclosers and down
stream auto reclosers is needed. If function is in "ready" status and this input is activated the
auto recloser increases its actual shot number by one and enters directly the “reclaim time”
status for shot one. If a start is received during the reclaim time, the function will proceed with
the next shot (e.g. starting dead time for shot two). Every new pulse on the ZONESTEP input
will further increase the shot number. Note that ZONESTEP input will have such effect only if
local start signal was not activated, as shown in Figure 415. The setting NoOfShots limits of
course the maximum number of available shots. This functionality is controlled by the setting
ZoneSeqCoord.
By activating the THOLHOLD input the auto recloser is set on hold. It can be connected to a
thermal overload protection trip signal which resets only when the thermal content has fallen
to an acceptable level, for example, 70%. As long as the signal is high, indicating that the line is
hot, the auto reclosing is halted. When the signal resets, a reclosing cycle will continue. This
may cause a considerable delay between start of the auto recloser and the breaker closing
command. An external logic limiting this time and activating the INHIBIT input can be used.
The THOLHOLD input can also be used to set the auto recloser on hold, for longer or shorter
time periods, for other purposes if for some reason the auto recloser needs to be halted. The
logic for thermal protection hold is shown in Figure 416.
start inhibitThermalStart
THOLHOLD AND AND S
q-1 20ms
startThermal
AND
inhibit OR
Figure 416: Thermal protection hold

The auto recloser is set as master or slave in multi-breaker arrangements with sequential
reclosing with the setting Priority. The auto recloser for the first circuit breaker, e.g. near the
busbar, is set as master (when Priority=High) and the auto recloser for the second circuit
breaker is set as slave (when Priority=Low). While the master is in progress, it issues the
WFMASTER output. After an unsuccessful reclosing the WFMASTER output is also maintained
by the UNSUCCL output.
When activating the WAIT input, in the auto recloser set as slave, every dead timer is changed
to the value of setting tSlaveDeadTime and holds back the auto reclosing operation. When the
WAIT input is reset at the time of a successful reclosing of the first circuit breaker, the slave is
released to continue the reclosing sequence after the set tSlaveDeadTime. The reason for
shortening the time, for the normal dead timers with the value of tSlaveDeadTime, is to give
the slave permission to react almost immediately when the WAIT input resets. The mimimum
settable time for tSlaveDeadTime is 0.1sec because both master and slave should not send the
breaker closing command at the same time. The slave should take the duration of the breaker
closing time of the master into consideration before sending the breaker closing command. A
setting tWaitForMaster sets a maximum wait time for the WAIT input to reset. If the wait time

Technical manual
Control
expires, the reclosing cycle of the slave is inhibited. The maximum wait time, tWaitForMaster
for the second circuit breaker is set longer than the auto reclosing dead time plus a margin for
synchrocheck conditions to be fulfilled for the first circuit breaker. Typical setting is 2sec. In
single circuit breaker applications, the setting Priority is set to None. The logic for master-
slave is shown in Figure 417.
Master:
High (Master)
Priority
WFMASTER
inProgress AND
unsuccessful OR
Slave:
Low (Slave)
Priority
inhibitWaitForMaster
AND
start tWaitForMaster
AND t
WAIT
wait
AND slaveDeadTime
AND S
inhibit
commandCloseCB R
OR
reclaimTimeStarted
Figure 417: Master-Slave

If reclosing of the first circuit breaker is unsuccessful, the UNSUCCL output connected to the
INHIBIT input of the slave unit interrupts the reclosing sequence of the latter. The signals can
be cross-connected to allow simple changing of the priority by just setting the High and the
Low priorities without changing the configuration. The CBCLOSED inputs from each circuit
breaker are important in multi-breaker arrangements to ensure that the circuit breaker was
closed at the beginning of the sequence. If the High priority breaker was not closed its auto
reclosing sequence will not start and the low priority breaker will just continue its auto
reclosing sequence in accordance with its normal settings.
15.2.6.5 Time sequence diagrams M12458-10 v5
Some examples of the timing of internal and external signals at typical transient and
permanent faults are shown below in Figure 418 to 421.

Technical manual
Control
Fault
CBCLOSED
Closed Open Closed
CBREADY
START
SYNC
tReclaim
READY
INPROGR
1PT1
ACTIVE
CLOSECB t1 1Ph tPulse
PREP3P
SUCCL
Time
Figure 418: Transient single-phase fault, single-phase reclosing
Fault
CBCLOSED Open
Closed Open C C
CBREADY
START
TR3P
SYNC
READY
INPROGR
3PT1 t1 3Ph
3PT2 t2 3Ph
ACTIVE tReclaim
CLOSECB tPulse tPulse
PREP3P
UNSUCCL
Time
Figure 419: Permanent fault, three-phase trip, two-shot reclosing

Technical manual
Control
Fault
CBCLOSED
CBREADY
START
TR3P
SYNC
READY
INPROGR
1PT1
3PT1
3PT2
CLOSECB t1 1Ph
PREP3P
UNSUCCL tReclaim
Figure 420: Permanent single-phase fault, single-phase trip, single-shot reclosing,

ARMode=1/2/3ph
Fault
CBCLOSED
CBREADY
START
TR3P
SYNC
READY
INPROGR
1PT1
3PT1
3PT2
t2 3Ph
CLOSECB t1 1Ph
PREP3P
UNSUCCL tReclaim
Figure 421: Permanent single-phase fault, single-phase trip, two-shot reclosing,

ARMode=1ph + 1*2ph

Technical manual
Control

M12379-1 v13
Table 477: SMBRREC technical data

Dead time:
shot 1 “t1 1Ph” (0.000-120.000) s ±0.2% or ±35 ms
shot 1 “t1 2Ph” whichever is greater
shot 1 “t1 3Ph “
shot 1 “t1 3PhHS”
Dead time: (0.00-6000.00) s ±0.2% or ±35 ms
shot 2 “t2 3Ph” whichever is greater
shot 3 “t3 3Ph”
shot 4 “t4 3Ph”
shot 5 “t5 3Ph”
Extend three-phase dead time duration “tExtended t1” (0.000-60.000) s ±0.2% or ±35 ms
whichever is greater
Minimum time that circuit breaker must be closed before (0.00-6000.00) s ±0.2% or ±35 ms
new sequence is allowed “tCBClosedMin” whichever is greater
Wait time for the slave to close when WAIT input has (0.100-60.000) s ±0.2% or ±35 ms
reset “tSlaveDeadTime” whichever is greater
Maximum allowed start pulse duration “tLongStartInh” (0.000-60.000) s ±0.2% or ±15 ms
Circuit breaker closing pulse duration “tPulse” (0.000-60.000) s ±0.2% or ±15 ms
Reclaim time ”tReclaim” (0.00-6000.00) s ±0.2% or ±15 ms
Maximum wait time for release from master (0.00-6000.00) s ±0.2% or ±15 ms
“tWaitForMaster” whichever is greater
Reset time for reclosing inhibit “tInhibit” (0.000-60.000) s ±0.2% or ±45 ms
Wait time after close command before proceeding to (0.000-60.000) s ±0.2% or ±45 ms
next shot “tAutoContWait” whichever is greater
Maximum wait time for fulfilled synchrocheck conditions (0.00-6000.00) s ±0.2% or ±45 ms
“tSync” whichever is greater
Delay time before indicating successful reclosing (0.000-60.000) s ±0.2% or ±50 ms
“tSuccessful” whichever is greater
Maximum wait time for circuit breaker closing before (0.00-6000.00) s ±0.2% or ±45 ms
indicating unsuccessful “tUnsucCl” whichever is greater
15.3 Interlocking IP15572-1 v2
The interlocking functionality blocks the possibility to operate high-voltage switching devices,
for instance when a disconnector is under load, in order to prevent material damage and/or
accidental human injury.
Each control IED has interlocking functions for different switchyard arrangements, each
handling the interlocking of one bay. The interlocking functionality in each IED is not
dependent on any central function. For the station-wide interlocking, the IEDs communicate
via the station bus or by using hard wired binary inputs/outputs.

Technical manual
Control
The interlocking conditions depend on the circuit configuration and status of the system at
any given time.
The interlocking function consists of software modules located in each control IED. The
function is distributed and not dependent on any central function. Communication between
modules in different bays is performed via the station bus.
The reservation function (see section "Functionality") is used to ensure that HV apparatuses
that might affect the interlock are blocked during the time gap, which arises between position
updates. This can be done by means of the communication system, reserving all HV
apparatuses that might influence the interlocking condition of the intended operation. The
reservation is maintained until the operation is performed.
After the selection and reservation of an apparatus, the function has complete data on the
status of all apparatuses in the switchyard that are affected by the selection. Other operators
cannot interfere with the reserved apparatus or the status of switching devices that may
affect it.
The open or closed positions of the HV apparatuses are inputs to software modules
distributed in the control IEDs. Each module contains the interlocking logic for a bay. The
interlocking logic in a module is different, depending on the bay function and the switchyard
arrangements, that is, double-breaker or 1 1/2 breaker bays have different modules. Specific
interlocking conditions and connections between standard interlocking modules are
performed with an engineering tool. Bay-level interlocking signals can include the following
kind of information:
• Positions of HV apparatuses (sometimes per phase)

• Valid positions (if evaluated in the control module)
• External release (to add special conditions for release)
• Line voltage (to block operation of line earthing switch)
• Output signals to release the HV apparatus
The interlocking module is connected to the surrounding functions within a bay as shown in
figure 422.
Apparatus control
Interlocking
modules
modules in
SCILO SCSWI
other bays SXSWI
Apparatus control
modules
Interlocking SCILO SCSWI SXCBR
module
Apparatus control
modules
en04000526.vsd SCILO SCSWI SXSWI
Figure 422: Interlocking module on bay level

Bays communicate via the station bus and can convey information regarding the following:

Technical manual
Control
• Unearthed busbars
• Busbars connected together
• Other bays connected to a busbar
• Received data from other bays is valid
Figure 423 illustrates the data exchange principle.
Station bus
Bay 1 Bay n Bus coupler
Disc QB1 and QB2 closed Disc QB1 and QB2 closed WA1 unearthed
WA1 unearthed
WA1 and WA2 interconn
...
WA1 not earthed WA1 not earthed
WA2 not earthed WA2 not earthed WA1 and WA2 interconn
WA1 and WA2 interconn WA1 and WA2 interconn in other bay
..
WA1
WA2
QB1 QB2 QB1 QB2 QB1 QB2 QC1 QC2
QA1 QA1 QA1
QB9 QB9
en05000494.vsd
Figure 423: Data exchange between interlocking modules

When invalid data such as intermediate position, loss of a control IED, or input board error are
used as conditions for the interlocking condition in a bay, a release for execution of the
function will not be given.
On the local HMI an override function exists, which can be used to bypass the interlocking
function in cases where not all the data required for the condition is valid.
For all interlocking modules these general rules apply:
• The interlocking conditions for opening or closing of disconnectors and earthing switches
are always identical.
• Earthing switches on the line feeder end, for example, rapid earthing switches, are
normally interlocked only with reference to the conditions in the bay where they are
located, not with reference to switches on the other side of the line. So a line voltage
indication may be included into line interlocking modules. If there is no line voltage
supervision within the bay, then the appropriate inputs must be set to no voltage, and the
operator must consider this when operating.
• Earthing switches can only be operated on isolated sections for example, without load/
voltage. Circuit breaker contacts cannot be used to isolate a section, that is, the status of
the circuit breaker is irrelevant as far as the earthing switch operation is concerned.
• Disconnectors cannot break power current or connect different voltage systems.
Disconnectors in series with a circuit breaker can only be operated if the circuit breaker is
open, or if the disconnectors operate in parallel with other closed connections. Other
disconnectors can be operated if one side is completely isolated, or if the disconnectors
operate in parallel to other closed connections, or if they are earthed on both sides.
• Circuit breaker closing is only interlocked against running disconnectors in its bay or
additionally in a transformer bay against the disconnectors and earthing switch on the
other side of the transformer, if there is no disconnector between CB and transformer.
• Circuit breaker opening is only interlocked in a bus-coupler bay, if a bus bar transfer is in
progress.

Technical manual
Control
To make the implementation of the interlocking function easier, a number of standardized and
tested software interlocking modules containing logic for the interlocking conditions are
available:
• Line for double and transfer busbars, ABC_LINE

• Bus for double and transfer busbars, ABC_BC
• Transformer bay for double busbars, AB_TRAFO
• Bus-section breaker for double busbars, A1A2_BS
• Bus-section disconnector for double busbars, A1A2_DC
• Busbar earthing switch, BB_ES
• Double CB Bay, DB_BUS_A, DB_LINE, DB_BUS_B
• 1 1/2-CB diameter, BH_LINE_A, BH_CONN, BH_LINE_B
The interlocking conditions can be altered, to meet the customer specific requirements, by
adding configurable logic by means of the graphical configuration tool PCM600. The inputs
Qx_EXy on the interlocking modules are used to add these specific conditions.
The input signals EXDU_xx shall be set to true if there is no transmission error at the transfer
of information from other bays. Required signals with designations ending in TR are intended
for transfer to other bays.
15.3.3 Logical node for interlocking SCILO IP14138-1 v2
15.3.3.1 Identification
GUID-3EC5D7F1-FDA0-4F0E-9391-08D357689E0C v3

Logical node for interlocking SCILO - 3
15.3.3.2 Functionality M15048-3 v6
The Logical node for interlocking SCILO function is used to enable a switching operation if the
interlocking conditions permit. SCILO function itself does not provide any interlocking
functionality. The interlocking conditions are generated in separate function blocks containing
the interlocking logic.
15.3.3.3 Function block M15049-3 v6
SCILO
POSOPEN EN_OPEN
POSCLOSE EN_CLOSE
OPEN_EN
CLOSE_EN
Figure 424: SCILO function block

Technical manual
Control
15.3.3.4 Signals
Table 478: SCILO Input signals

POSOPEN BOOLEAN 0 Open position of switch device
POSCLOSE BOOLEAN 0 Closed position of switch device
OPEN_EN BOOLEAN 0 Open operation from interlocking logic is enabled
CLOSE_EN BOOLEAN 0 Close operation from interlocking logic is enabled
Table 479: SCILO Output signals

EN_OPEN BOOLEAN Open operation at closed or interm. or bad pos. is enabled
EN_CLOSE BOOLEAN Close operation at open or interm. or bad pos. is enabled
The function contains logic to enable the open and close commands respectively if the
interlocking conditions are fulfilled. That means also, if the switch has a defined end position
for example, open, then the appropriate enable signal (in this case EN_OPEN) is false. The
enable signals EN_OPEN and EN_CLOSE can be true at the same time only in the intermediate
and bad position state and if they are enabled by the interlocking function. The position inputs
come from the logical nodes Circuit breaker/Circuit switch (SXCBR/SXSWI) and the enable
signals come from the interlocking logic. The outputs are connected to the logical node Switch
controller (SCSWI). One instance per switching device is needed.
POSOPEN SCILO
POSCLOSE =1 1
EN_OPEN
&
>1
&
OPEN_EN
CLOSE_EN & EN_CLOSE
>1
&
en04000525.vsd
Figure 425: SCILO function logic diagram
15.3.4 Interlocking for busbar earthing switch BB_ES IP14164-1 v4
GUID-F3CBAFDC-3723-429F-9183-45229A6F0A12 v3

Interlocking for busbar earthing BB_ES - 3
switch

Technical manual
Control
The interlocking for busbar earthing switch (BB_ES) function is used for one busbar earthing
switch on any busbar parts according to figure 426.
QC
en04000504.vsd
Figure 426: Switchyard layout BB_ES
BB_ES
QC_OP QCREL
QC_CL QCITL
BB_DC_OP BBESOPTR
VP_BB_DC BBESCLTR
EXDU_BB
Figure 427: BB_ES function block
BB_ES
VP_BB_DC QCREL
BB_DC_OP QCITL
EXDU_BB & 1
QC_OP BBESOPTR
QC_CL BBESCLTR
en04000546.vsd
15.3.4.5 Signals
Table 480: BB_ES Input signals

QC_OP BOOLEAN 0 Busbar earthing switch QC is in open position
QC_CL BOOLEAN 0 Busbar earthing switch QC is in closed position
BB_DC_OP BOOLEAN 0 All disconnectors on this busbar part are open
VP_BB_DC BOOLEAN 0 Status for all disconnectors on this busbar part are valid
EXDU_BB BOOLEAN 0 No transm error from bays with disc on this busbar part

Technical manual
Control
Table 481: BB_ES Output signals

QCREL BOOLEAN Switching of QC is allowed
QCITL BOOLEAN Switching of QC is forbidden
BBESOPTR BOOLEAN QC on this busbar part is in open position
BBESCLTR BOOLEAN QC on this busbar part is in closed position
15.3.5 Interlocking for bus-section breaker A1A2_BS IP14154-1 v2
GUID-29EF1F25-E10A-4C82-A6B7-FA246D9C6CD2 v3

Interlocking for bus-section breaker A1A2_BS - 3
The interlocking for bus-section breaker (A1A2_BS) function is used for one bus-section circuit
breaker between section 1 and 2 according to figure 428. The function can be used for
different busbars, which includes a bus-section circuit breaker.
WA1 (A1) WA2 (A2)
QC1 QB1 QB2 QC2
QA1
QC3 QC4
en04000516.vsd
A1A2_BS
Figure 428: Switchyard layout A1A2_BS

Technical manual
Control
A1A2_BS
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QC3_OP QB2REL
QC3_CL QB2ITL
QC4_OP QC3REL
QC4_CL QC3ITL
S1QC1_OP QC4REL
S1QC1_CL QC4ITL
S2QC2_OP S1S2OPTR
S2QC2_CL S1S2CLTR
BBTR_OP QB1OPTR
VP_BBTR QB1CLTR
EXDU_12 QB2OPTR
EXDU_ES QB2CLTR
QA1O_EX1 VPS1S2TR
QA1O_EX2 VPQB1TR
QA1O_EX3 VPQB2TR
QB1_EX1
QB1_EX2
QB2_EX1
QB2_EX2
Figure 429: A1A2_BS function block
A1A2_BS
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC3_OP
QC3_CL =1 VPQC3
QC4_OP
QC4_CL =1 VPQC4
S1QC1_OP
S1QC1_CL =1 VPS1QC1
S2QC2_OP
S2QC2_CL =1 VPS2QC2
VPQB1
QB1_OP QA1OPREL
& >1
QA1O_EX1 QA1OPITL
1
VPQB2
QB2_OP
&
QA1O_EX2
VP_BBTR
BBTR_OP
&
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 & QA1CLITL
1
VPQA1
VPQC3 QB1REL
& >1
VPQC4 QB1ITL
1
VPS1QC1
QA1_OP
QC3_OP
QC4_OP
S1QC1_OP
EXDU_ES
QB1_EX1
VPQC3
VPS1QC1
&
QC3_CL
S1QC1_CL
EXDU_ES
QB1_EX2
en04000542.vsd

Technical manual
Control
VPQA1
VPQC3 QB2REL
VPQC4 & >1
QB2ITL
VPS2QC2 1
QA1_OP
QC3_OP
QC4_OP
S2QC2_OP
EXDU_ES
QB2_EX1
VPQC4
VPS2QC2
&
QC4_CL
S2QC2_CL
EXDU_ES
QB2_EX2
VPQB1 QC3REL
VPQB2 QC3ITL
QB1_OP & 1
QC4REL
QB2_OP
QC4ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP S1S2OPTR
QB2_OP >1 S1S2CLTR
QA1_OP 1
VPQB1
VPS1S2TR
VPQB2 &
VPQA1
en04000543.vsd
15.3.5.5 Signals
Table 482: A1A2_BS Input signals

QA1_OP BOOLEAN 0 QA1 is in open position
QA1_CL BOOLEAN 0 QA1 is in closed position
QB1_OP BOOLEAN 0 QB1 is in open position
QB1_CL BOOLEAN 0 QB1 is in closed position
QC3_OP BOOLEAN 0 QC3 is in open position
QC3_CL BOOLEAN 0 QC3 is in closed position
S1QC1_OP BOOLEAN 0 QC1 on bus section 1 is in open position
S1QC1_CL BOOLEAN 0 QC1 on bus section 1 is in closed position
BBTR_OP BOOLEAN 0 No busbar transfer is in progress
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar transfer
EXDU_12 BOOLEAN 0 No transm error from any bay connected to busbar 1 and 2
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw. QC1 or QC2
QA1O_EX1 BOOLEAN 0 External open condition for apparatus QA1

Technical manual
Control

QB1_EX1 BOOLEAN 0 External condition for apparatus QB1
Table 483: A1A2_BS Output signals

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden
QA1CLREL BOOLEAN Closing of QA1 is allowed
QA1CLITL BOOLEAN Closing of QA1 is forbidden
QB1REL BOOLEAN Switching of QB1 is allowed
QB1ITL BOOLEAN Switching of QB1 is forbidden
QC3REL BOOLEAN Switching of QC3 is allowed
QC3ITL BOOLEAN Switching of QC3 is forbidden
S1S2OPTR BOOLEAN No bus section connection between bus section 1 and 2
S1S2CLTR BOOLEAN Bus coupler connection between bus section 1 and 2 exists
QB1OPTR BOOLEAN QB1 is in open position
QB1CLTR BOOLEAN QB1 is in closed position
VPS1S2TR BOOLEAN Status of the app. between bus section 1 and 2 are valid
VPQB1TR BOOLEAN Switch status of QB1 is valid (open or closed)
15.3.6 Interlocking for bus-section disconnector A1A2_DC IP14159-1 v2
GUID-0A0229EB-5ECD-405C-B706-6A54CBBDB49D v3

Interlocking for bus-section A1A2_DC - 3
disconnector

Technical manual
Control
The interlocking for bus-section disconnector (A1A2_DC) function is used for one bus-section
disconnector between section 1 and 2 according to figure 430. A1A2_DC function can be used
for different busbars, which includes a bus-section disconnector.
QB
WA1 (A1) WA2 (A2)
QC1 QC2
A1A2_DC en04000492.vsd
Figure 430: Switchyard layout A1A2_DC
A1A2_DC
QB_OP QBOPREL
QB_CL QBOPITL
S1QC1_OP QBCLREL
S1QC1_CL QBCLITL
S2QC2_OP DCOPTR
S2QC2_CL DCCLTR
S1DC_OP VPDCTR
S2DC_OP
VPS1_DC
VPS2_DC
EXDU_ES
EXDU_BB
QBCL_EX1
QBCL_EX2
QBOP_EX1
QBOP_EX2
QBOP_EX3
Figure 431: A1A2_DC function block

Technical manual
Control
A1A2_DC
QB_OP
VPQB VPDCTR
QB_CL =1
DCOPTR
DCCLTR
S1QC1_OP
VPS1QC1
S1QC1_CL =1
S2QC2_OP
VPS2QC2
S2QC2_CL =1
VPS1QC1
VPS2QC2
VPS1_DC & >1 QBOPREL
S1QC1_OP QBOPITL
1
S2QC2_OP
S1DC_OP
EXDU_ES
EXDU_BB
QBOP_EX1
VPS1QC1
VPS2QC2
VPS2_DC &
S1QC1_OP
S2QC2_OP
S2DC_OP
EXDU_ES
EXDU_BB
QBOP_EX2
VPS1QC1
VPS2QC2
S1QC1_CL &
S2QC2_CL
EXDU_ES
QBOP_EX3
en04000544.vsd
15.3.6.5 Signals
Table 484: A1A2_DC Input signals

QB_OP BOOLEAN 0 QB is in open position
QB_CL BOOLEAN 0 QB is in closed position
S1DC_OP BOOLEAN 0 All disconnectors on bus section 1 are in open position

Technical manual
Control

S2DC_OP BOOLEAN 0 All disconnectors on bus section 2 are in open position
VPS1_DC BOOLEAN 0 Switch status of disconnectors on bus section 1 are valid
VPS2_DC BOOLEAN 0 Switch status of disconnectors on bus section 2 are valid
EXDU_ES BOOLEAN 0 No transm error from bays containing earth. sw. QC1 or QC2
EXDU_BB BOOLEAN 0 No transm error from bays with disc conn to section 1 and 2
QBCL_EX1 BOOLEAN 0 External close condition for section disconnector QB
QBCL_EX2 BOOLEAN 0 External close condition for section disconnector QB
QBOP_EX1 BOOLEAN 0 External open condition for section disconnector QB
Table 485: A1A2_DC Output signals

QBOPREL BOOLEAN Opening of QB is allowed
QBOPITL BOOLEAN Opening of QB is forbidden
QBCLREL BOOLEAN Closing of QB is allowed
QBCLITL BOOLEAN Closing of QB is forbidden
DCOPTR BOOLEAN The bus section disconnector is in open position
DCCLTR BOOLEAN The bus section disconnector is in closed position
VPDCTR BOOLEAN Switch status of QB is valid (open or closed)
15.3.7 Interlocking for bus-coupler bay ABC_BC IP14144-1 v2
GUID-8149EE0A-E2A4-431C-9D07-D1A0BD296743 v3

Interlocking for bus-coupler bay ABC_BC - 3
The interlocking for bus-coupler bay (ABC_BC) function is used for a bus-coupler bay
connected to a double busbar arrangement according to figure 432. The function can also be
used for a single busbar arrangement with transfer busbar or double busbar arrangement
without transfer busbar.

Technical manual
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB20 QB7
QC1
QA1
QC2
en04000514.vsd
Figure 432: Switchyard layout ABC_BC
ABC_BC
QA1_OP QA1OPREL
QA1_CL QA1OPITL
QB1_OP QA1CLREL
QB1_CL QA1CLITL
QB2_OP QB1REL
QB2_CL QB1ITL
QB7_OP QB2REL
QB7_CL QB2ITL
QB20_OP QB7REL
QB20_CL QB7ITL
QC1_OP QB20REL
QC1_CL QB20ITL
QC2_OP QC1REL
QC2_CL QC1ITL
QC11_OP QC2REL
QC11_CL QC2ITL
QC21_OP QB1OPTR
QC21_CL QB1CLTR
QC71_OP QB220OTR
QC71_CL QB220CTR
BBTR_OP QB7OPTR
BC_12_CL QB7CLTR
VP_BBTR QB12OPTR
VP_BC_12 QB12CLTR
EXDU_ES BC12OPTR
EXDU_12 BC12CLTR
EXDU_BC BC17OPTR
QA1O_EX1 BC17CLTR
QA1O_EX2 BC27OPTR
QA1O_EX3 BC27CLTR
QB1_EX1 VPQB1TR
QB1_EX2 VQB220TR
QB1_EX3 VPQB7TR
QB2_EX1 VPQB12TR
QB2_EX2 VPBC12TR
QB2_EX3 VPBC17TR
QB20_EX1 VPBC27TR
QB20_EX2
QB7_EX1
QB7_EX2
Figure 433: ABC_BC function block

Technical manual
Control
ABC_BC
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB20_OP
QB20_CL =1 VPQB20
QB7_OP
QB7_CL =1 VPQB7
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VPQB1
QB1_OP QA1OPREL
& >1 QA1OPITL
QA1O_EX1 1
VPQB20
QB20_OP &
QA1O_EX2
VP_BBTR
BBTR_OP &
EXDU_12
QA1O_EX3
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQB7 & 1
VPQB20
en04000533.vsd
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VP_BC_12
&
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000534.vsd

Technical manual
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VP_BC_12
&
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000535.vsd
VPQA1
VPQB20 QB7REL
& >1
VPQC1 QB7ITL
VPQC2 1
VPQC71
QA1_OP
QB20_OP
QC1_OP
QC2_OP
QC71_OP
EXDU_ES
QB7_EX1
VPQC2
VPQC71
&
QC2_CL
QC71_CL
EXDU_ES
QB7_EX2
VPQA1
VPQB7 QB20REL
& >1
VPQC1 QB20ITL
VPQC2 1
VPQC21
QA1_OP
QB7_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB20_EX1
VPQC2
VPQC21
&
QC2_CL
QC21_CL
EXDU_ES
QB20_EX2
en04000536.vsd

Technical manual
Control
VPQB1 QC1REL
VPQB20 QC1ITL
& 1
VPQB7
QC2REL
VPQB2
QB1_OP QC2ITL
1
QB20_OP
QB7_OP
QB2_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB20_OP QB220OTR
QB2_OP & QB220CTR
VPQB20 1
VQB220TR
VPQB2 &
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
QA1_OP BC12OPTR
QB1_OP >1 BC12CLTR
QB20_OP 1
VPQA1
VPBC12TR
VPQB1 &
VPQB20
QA1_OP BC17OPTR
QB1_OP >1 BC17CLTR
QB7_OP 1
VPQA1
VPBC17TR
VPQB1 &
VPQB7
QA1_OP BC27OPTR
QB2_OP >1 BC27CLTR
QB7_OP 1
VPQA1
VPBC27TR
VPQB2 &
VPQB7
en04000537.vsd
15.3.7.5 Signals
Table 486: ABC_BC Input signals

QC11_OP BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 Earthing switch QC11 on busbar WA1 is in closed position

Technical manual
Control

BBTR_OP BOOLEAN 0 No busbar transfer is in progress
BC_12_CL BOOLEAN 0 A bus coupler connection exists between busbar WA1 and
WA2
VP_BBTR BOOLEAN 0 Status are valid for app. involved in the busbar transfer
VP_BC_12 BOOLEAN 0 Status of the bus coupler app. between WA1 and WA2 are
valid
EXDU_ES BOOLEAN 0 No transm error from any bay containing earthing switches
EXDU_12 BOOLEAN 0 No transm error from any bay connected to WA1/WA2
busbars
EXDU_BC BOOLEAN 0 No transmission error from any other bus coupler bay
Table 487: ABC_BC Output signals

QA1OPREL BOOLEAN Opening of QA1 is allowed
QA1OPITL BOOLEAN Opening of QA1 is forbidden

Technical manual
Control

QB220OTR BOOLEAN QB2 and QB20 are in open position
QB220CTR BOOLEAN QB2 or QB20 or both are not in open position
QB12OPTR BOOLEAN QB1 or QB2 or both are in open position
QB12CLTR BOOLEAN QB1 and QB2 are not in open position
BC12OPTR BOOLEAN No connection via the own bus coupler between WA1 and WA2
BC12CLTR BOOLEAN Conn. exists via the own bus coupler between WA1 and WA2
BC17OPTR BOOLEAN No connection via the own bus coupler between WA1 and WA7
BC27OPTR BOOLEAN No connection via the own bus coupler between WA2 and
WA7
VQB220TR BOOLEAN Switch status of QB2 and QB20 are valid (open or closed)
VPQB12TR BOOLEAN Switch status of QB1 and QB2 are valid (open or closed)
VPBC12TR BOOLEAN Status of the bus coupler app. between WA1 and WA2 are
valid
valid
valid
15.3.8 Interlocking for 1 1/2 CB BH IP14173-1 v3
GUID-03F1A3BB-4A1E-49E8-88C6-10B3876F64DA v4

Interlocking for 1 1/2 breaker BH_CONN - 3
diameter
Interlocking for 1 1/2 breaker BH_LINE_A - 3
diameter
Interlocking for 1 1/2 breaker BH_LINE_B - 3
diameter
The interlocking for 1 1/2 breaker diameter (BH_CONN, BH_LINE_A, BH_LINE_B) functions are
used for lines connected to a 1 1/2 breaker diameter according to figure 434.

Technical manual
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC1
QA1 QA1
QC2 QC2
QB6 QB6
QC3 QC3
BH_LINE_A BH_LINE_B
QB61 QA1 QB62
QB9 QB9
QC1 QC2
QC9 QC9
BH_CONN
en04000513.vsd
Figure 434: Switchyard layout 1 1/2 breaker

M13570-7 v4
Three types of interlocking modules per diameter are defined. BH_LINE_A and BH_LINE_B are
the connections from a line to a busbar. BH_CONN is the connection between the two lines of
the diameter in the 1 1/2 breaker switchyard layout.

Technical manual
Control
15.3.8.3 Function blocks IP14412-1 v1
M13574-3 v6
BH_LINE_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB1OPTR
CQA1_CL QB1CLTR
CQB61_OP VPQB1TR
CQB61_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC11_OP
QC11_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB1_EX1
QB1_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
Figure 435: BH_LINE_A function block

Technical manual
Control
M13578-3 v6
BH_LINE_B
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB6_OP QB6REL
QB6_CL QB6ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QC3REL
QC3_CL QC3ITL
QB9_OP QB9REL
QB9_CL QB9ITL
QC9_OP QC9REL
QC9_CL QC9ITL
CQA1_OP QB2OPTR
CQA1_CL QB2CLTR
CQB62_OP VPQB2TR
CQB62_CL
CQC1_OP
CQC1_CL
CQC2_OP
CQC2_CL
QC21_OP
QC21_CL
VOLT_OFF
VOLT_ON
EXDU_ES
QB6_EX1
QB6_EX2
QB2_EX1
QB2_EX2
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
QB9_EX6
QB9_EX7
Figure 436: BH_LINE_B function block

M13582-3 v6
BH_CONN
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB61_OP QB61REL
QB61_CL QB61ITL
QB62_OP QB62REL
QB62_CL QB62ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
1QC3_OP
1QC3_CL
2QC3_OP
2QC3_CL
QB61_EX1
QB61_EX2
QB62_EX1
QB62_EX2
Figure 437: BH_CONN function block

Technical manual
Control
M13577-1 v5
BH_CONN
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB62_OP
QB62_CL =1 VPQB62
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
1QC3_OP
1QC3_CL =1 VP1QC3
2QC3_OP
2QC3_CL =1 VP2QC3
VPQB61 QA1CLREL
VPQB62 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VP1QC3
QA1_OP
QC1_OP
QC2_OP
1QC3_OP
QB61_EX1
VPQC1
VP1QC3
&
QC1_CL
1QC3_CL
QB61_EX2
VPQA1
VPQC1 QB62REL
& >1
VPQC2 QB62ITL
1
VP2QC3
QA1_OP
QC1_OP
QC2_OP
2QC3_OP
QB62_EX1
VPQC2
VP2QC3
&
QC2_CL
2QC3_CL
QB62_EX2
VPQB61 QC1REL
VPQB62 QC1ITL
& 1
QB61_OP QC2REL
QB62_OP QC2ITL
1
en04000560.vsd

Technical manual
Control
BH_LINE_A
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB61_OP
CQB61_CL =1 VPCQB61
QC11_OP
QC11_CL =1 VPQC11
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB1 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000554.vsd
VPQA1
VPQC1 QB1REL
VPQC2 & >1
QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
VPQB1 QC1REL
VPQB6 QC1ITL
QB1_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB61 &
QC3ITL
1
QB6_OP
QB9_OP
CQB61_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB61
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000555.vsd

Technical manual
Control
CQB61_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000556.vsd
BH_LINE_B
QA1_OP
QA1_CL =1 VPQA1
QB2_OP
QB2_CL =1 VPQB2
QB6_OP
QB6_CL =1 VPQB6
QC9_OP
QC9_CL =1 VPQC9
QB9_OP
QB9_CL =1 VPQB9
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
CQA1_OP
CQA1_CL =1 VPCQA1
CQC1_OP
CQC1_CL =1 VPCQC1
CQC2_OP
CQC2_CL =1 VPCQC2
CQB62_OP
CQB62_CL =1 VPCQB62
QC21_OP
QC21_CL =1 VPQC21
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQB2 QA1CLREL
VPQB6 QA1CLITL
& 1
VPQB9
VPQA1
VPQC1 QB6REL
VPQC2 & >1
QB6ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB6_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB6_EX2
en04000557.vsd

Technical manual
Control
VPQA1
VPQC1 QB2REL
VPQC2 & >1
QB2ITL
1
VPQC21
QA1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC1
VPQC21
&
QC1_CL
QC21_CL
EXDU_ES
QB2_EX2
VPQB2 QC1REL
VPQB6 QC1ITL
QB2_OP & 1
QC2REL
QB6_OP QC2ITL
VPQB6 1
VPQB9 QC3REL
VPCQB62 &
QC3ITL
1
QB6_OP
QB9_OP
CQB62_OP
VPQA1 QB9REL
VPQB6 QB9ITL
VPQC9 & >1 1
VPQC1
VPQC2
VPQC3
VPCQA1
VPCQB62
VPCQC1
VPCQC2
QB9_EX1
QB6_OP
QB9_EX2
>1
QA1_OP
QC1_OP
QC2_OP &
QB9_EX3
en04000558.vsd
CQB62_OP
QB9_EX4
>1 & >1
CQA1_OP
CQC1_OP
CQC2_OP &
QB9_EX5
QC9_OP
QC3_OP
QB9_EX6
VPQC9
VPQC3
&
QC9_CL
QC3_CL
QB9_EX7
VPQB9 QC9REL
VPVOLT QC9ITL
QB9_OP & 1
VOLT_OFF
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000559.vsd
15.3.8.5 Signals
Table 488: BH_LINE_A Input signals

QB6_CL BOOLEAN 0 QB6 is in close position

Technical manual
Control

CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB61_OP BOOLEAN 0 QB61 in module BH_CONN is in open position
CQB61_CL BOOLEAN 0 QB61 in module BH_CONN is in closed position
CQC1_OP BOOLEAN 0 QC1 in module BH_CONN is in open position
CQC1_CL BOOLEAN 0 QC1 in module BH_CONN is in closed position
VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
VOLT_ON BOOLEAN 0 There is voltage on the line or there is a VT (fuse) failure
EXDU_ES BOOLEAN 0 No transm error from bay containing earthing switch QC11
Table 489: BH_LINE_A Output signals


Technical manual
Control

Table 490: BH_LINE_B Input signals

QB6_CL BOOLEAN 0 QB6 is in close position
CQA1_OP BOOLEAN 0 QA1 in module BH_CONN is in open position
CQA1_CL BOOLEAN 0 QA1 in module BH_CONN is in closed position
CQB62_OP BOOLEAN 0 QB62 in module BH_CONN is in open position
CQB62_CL BOOLEAN 0 QB62 in module BH_CONN is in closed position

Technical manual
Control

VOLT_OFF BOOLEAN 0 There is no voltage on line and not VT (fuse) failure
Table 491: BH_LINE_B Output signals


Technical manual
Control
Table 492: BH_CONN Input signals

1QC3_OP BOOLEAN 0 QC3 on line 1 is in open position
1QC3_CL BOOLEAN 0 QC3 on line 1 is in closed position
2QC3_OP BOOLEAN 0 QC3 on line 2 is in open position
2QC3_CL BOOLEAN 0 QC3 on line 2 is in closed position
Table 493: BH_CONN Output signals

15.3.9 Interlocking for double CB bay DB IP14167-1 v2

Technical manual
Control
GUID-D6D10255-2818-44E4-A44E-DF623161C486 v3

Interlocking for double CB bay DB_BUS_A - 3
Interlocking for double CB bay DB_BUS_B - 3
Interlocking for double CB bay DB_LINE - 3
The interlocking for a double busbar double circuit breaker bay including DB_BUS_A,
DB_BUS_B and DB_LINE functions are used for a line connected to a double busbar
arrangement according to figure 438.
WA1 (A)
WA2 (B)
QB1 QB2
QC1 QC4
QA1 QA2
DB_BUS_A DB_BUS_B
QC2 QC5
QB61 QB62
QC3
QB9
DB_LINE
QC9
en04000518.vsd
Figure 438: Switchyard layout double circuit breaker

Technical manual
Control
M15105-1 v4
DB_BUS_A
QA1_OP
QA1_CL =1 VPQA1
QB61_OP
QB61_CL =1 VPQB61
QB1_OP
QB1_CL =1 VPQB1
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
VPQB61 QA1CLREL
VPQB1 & QA1CLITL
1
VPQA1
VPQC1 QB61REL
& >1
VPQC2 QB61ITL
1
VPQC3
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QB61_EX1
VPQC2
VPQC3
&
QC2_CL
QC3_CL
QB61_EX2
VPQA1
VPQC1 QB1REL
& >1
VPQC2 QB1ITL
1
VPQC11
QA1_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQC1
VPQC11
&
QC1_CL
QC11_CL
EXDU_ES
QB1_EX2
en04000547.vsd
VPQB61 QC1REL
VPQB1 QC1ITL
& 1
QB61_OP QC2REL
QB1_OP QC2ITL
1
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
en04000548.vsd

Technical manual
Control
DB_BUS_B
QA2_OP
QA2_CL =1 VPQA2
QB62_OP
QB62_CL =1 VPQB62
QB2_OP
QB2_CL =1 VPQB2
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QC3_OP
QC3_CL =1 VPQC3
QC21_OP
QC21_CL =1 VPQC21
VPQB62 QA2CLREL
VPQB2 & QA2CLITL
1
VPQA2
VPQC4 QB62REL
& >1
VPQC5 QB62ITL
1
VPQC3
QA2_OP
QC4_OP
QC5_OP
QC3_OP
QB62_EX1
VPQC5
VPQC3
&
QC5_CL
QC3_CL
QB62_EX2
VPQA2
VPQC4 QB2REL
& >1
VPQC5 QB2ITL
1
VPQC21
QA2_OP
QC4_OP
QC5_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQC4
VPQC21
&
QC4_CL
QC21_CL
EXDU_ES
QB2_EX2
en04000552.vsd
VPQB62 QC4REL
VPQB2 QC4ITL
& 1
QB62_OP QC5REL
QB2_OP QC5ITL
1
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
en04000553.vsd

Technical manual
Control
DB_LINE
QA1_OP
QA1_CL =1 VPQA1
QA2_OP
QA2_CL =1 VPQA2
QB61_OP
QB61_CL =1 VPQB61
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB62_OP
QB62_CL =1 VPQB62
QC4_OP
QC4_CL =1 VPQC4
QC5_OP
QC5_CL =1 VPQC5
QB9_OP
QB9_CL =1 VPQB9
QC3_OP
QC3_CL =1 VPQC3
QC9_OP
QC9_CL =1 VPQC9
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQA2 QB9REL
VPQC1 & >1
QB9ITL
1
VPQC2
VPQC3
VPQC4
VPQC5
VPQC9
QA1_OP
QA2_OP
QC1_OP
QC2_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX1
& en04000549.vsd
VPQA1
VPQC1
VPQC2 & >1
VPQC3
VPQC9
VPQB62
QA1_OP
QC1_OP
QC2_OP
QC3_OP
QC9_OP
QB62_OP
QB9_EX2
VPQA2
VPQB61
&
VPQC3
VPQC4
VPQC5
VPQC9
QA2_OP
QB61_OP
QC3_OP
QC4_OP
QC5_OP
QC9_OP
QB9_EX3
VPQC3
VPQC9
&
VPQB61
VPQB62
QC3_OP
QC9_OP
QB61_OP
QB62_OP
QB9_EX4
VPQC3
VPQC9
&
QC3_CL
QC9_CL
QB9_EX5
en04000550.vsd

Technical manual
Control
VPQB61
VPQB62 QC3REL
VPQB9 &
QC3ITL
1
QB61_OP
QB62_OP
QB9_OP
VPQB9
VPVOLT QC9REL
QB9_OP &
QC9ITL
1
VOLT_OFF
en04000551.vsd
15.3.9.4 Function block IP14391-1 v1
M13591-3 v6
DB_BUS_A
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB61REL
QB1_CL QB61ITL
QB61_OP QB1REL
QB61_CL QB1ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC3_OP QB1OPTR
QC3_CL QB1CLTR
QC11_OP VPQB1TR
QC11_CL
EXDU_ES
QB61_EX1
QB61_EX2
QB1_EX1
QB1_EX2
Figure 439: DB_BUS_A function block

M15107-3 v6
DB_LINE
QA1_OP QB9REL
QA1_CL QB9ITL
QA2_OP QC3REL
QA2_CL QC3ITL
QB61_OP QC9REL
QB61_CL QC9ITL
QC1_OP
QC1_CL
QC2_OP
QC2_CL
QB62_OP
QB62_CL
QC4_OP
QC4_CL
QC5_OP
QC5_CL
QB9_OP
QB9_CL
QC3_OP
QC3_CL
QC9_OP
QC9_CL
VOLT_OFF
VOLT_ON
QB9_EX1
QB9_EX2
QB9_EX3
QB9_EX4
QB9_EX5
Figure 440: DB_LINE function block

Technical manual
Control
M13596-3 v6
DB_BUS_B
QA2_OP QA2CLREL
QA2_CL QA2CLITL
QB2_OP QB62REL
QB2_CL QB62ITL
QB62_OP QB2REL
QB62_CL QB2ITL
QC4_OP QC4REL
QC4_CL QC4ITL
QC5_OP QC5REL
QC5_CL QC5ITL
QC3_OP QB2OPTR
QC3_CL QB2CLTR
QC21_OP VPQB2TR
QC21_CL
EXDU_ES
QB62_EX1
QB62_EX2
QB2_EX1
QB2_EX2
Figure 441: DB_BUS_B function block
15.3.9.5 Signals
Table 494: DB_BUS_A Input signals


Technical manual
Control
Table 495: DB_BUS_A Output signals

Table 496: DB_BUS_B Input signals


Technical manual
Control
Table 497: DB_BUS_B Output signals

Table 498: DB_LINE Input signals

VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure

Technical manual
Control

Table 499: DB_LINE Output signals

15.3.10 Interlocking for line bay ABC_LINE IP14139-1 v2
GUID-BEA26EA4-F402-4385-9238-1361E862D987 v3

Interlocking for line bay ABC_LINE - 3
The interlocking for line bay (ABC_LINE) function is used for a line connected to a double
busbar arrangement with a transfer busbar according to figure 442. The function can also be
used for a double busbar arrangement without transfer busbar or a single busbar
arrangement with/without transfer busbar.

Technical manual
Control
WA1 (A)
WA2 (B)
WA7 (C)
QB1 QB2 QB7
QC1
QA1
QC2
QB9
QC9
en04000478.vsd
Figure 442: Switchyard layout ABC_LINE

Technical manual
Control
ABC_LINE
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB9_OP QB9REL
QB9_CL QB9ITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QB7_OP QB7REL
QB7_CL QB7ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QC9_OP QC9REL
QC9_CL QC9ITL
QC11_OP QB1OPTR
QC11_CL QB1CLTR
QC21_OP QB2OPTR
QC21_CL QB2CLTR
QC71_OP QB7OPTR
QC71_CL QB7CLTR
BB7_D_OP QB12OPTR
BC_12_CL QB12CLTR
BC_17_OP VPQB1TR
BC_17_CL VPQB2TR
BC_27_OP VPQB7TR
BC_27_CL VPQB12TR
VOLT_OFF
VOLT_ON
VP_BB7_D
VP_BC_12
VP_BC_17
VP_BC_27
EXDU_ES
EXDU_BPB
EXDU_BC
QB9_EX1
QB9_EX2
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
QB7_EX1
QB7_EX2
QB7_EX3
QB7_EX4
Figure 443: ABC_LINE function block

Technical manual
Control
ABC_LINE
QA1_OP
QA1_CL =1 VPQA1
QB9_OP
QB9_CL =1 VPQB9
QA1CLREL
QB1_OP
QB1_CL =1 VPQB1 QA1CLITL
& 1
QB2_OP
QB2_CL =1 VPQB2
QB7_OP
QB7_CL =1 VPQB7
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QC9_OP
QC9_CL =1 VPQC9
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
QC71_OP
QC71_CL =1 VPQC71
VOLT_OFF
VOLT_ON =1 VPVOLT
VPQA1
VPQC1 QB9REL
VPQC2 & >1
QB9ITL
1
VPQC9
QA1_OP
QC1_OP
QC2_OP
QC9_OP
QB9_EX1
VPQC2
VPQC9
&
QC2_CL
QC9_CL
QB9_EX2
en04000527.vsd

Technical manual
Control
VPQA1 QB1REL
& ³1
VPQB2
VPQC1 1 QB1ITL
VPQC2
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2 &
VP_BC_12
QB2_CL
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1 &
VPQC11
QC1_CL
QC11_CL
EXDU_ES
QB1EX3
en04000528.vsd

Technical manual
Control
VPQA1 QB2REL
& ³1
VPQB1
VPQC1 1 QB2ITL
VPQC2
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1 &
VP_BC_12
QB1_CL
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1 &
VPQC21
QC1_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000529.vsd

Technical manual
Control
VPQC9 QB7REL
& >1
VPQC71
VP_BB7_D 1 QB7ITL
VP_BC_17
VP_BC_27
QC9_OP
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_OP
BC_27_OP
EXDU_BC
QB7_EX1
VPQA1
VPQB1
VPQC9
&
VPQB9
VPQC71
VP_BB7_D
VP_BC_17
QA1_CL
QB1_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_17_CL
EXDU_BC
QB7_EX2

Technical manual
Control
VPQA1
VPQB2
& >1
VPQC9
VPQB9
VPQC71
VP_BB7_D
VP_BC_27
QA1_CL
QB2_CL
QC9_OP
QB9_CL
QC71_OP
EXDU_ES
BB7_D_OP
EXDU_BPB
BC_27_CL
EXDU_BC
QB7_EX3
VPQC9
VPQC71
&
QC9_CL
QC71_CL
EXDU_ES
QB7_EX4
VPQB1 QC1REL
VPQB2 QC1ITL
VPQB9 & 1
QC2REL
QB1_OP
QB2_OP QC2ITL
1
QB9_OP
VPQB7
VPQB9 QC9REL
VPVOLT &
QC9ITL
QB7_OP 1
QB9_OP
VOLT_OFF
en04000531.vsd

Technical manual
Control
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB7_OP QB7OPTR
QB7_CL QB7CLTR
VPQB7 VPQB7TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000532.vsd
15.3.10.5 Signals
Table 500: ABC_LINE Input signals

BB7_D_OP BOOLEAN 0 Disconnectors on busbar WA7 except in the own bay are open
WA2

Technical manual
Control

BC_17_OP BOOLEAN 0 No bus coupler connection exists between busbar WA1 and
WA7
WA7
BC_27_OP BOOLEAN 0 No bus coupler connection exists between busbar WA2 and
WA7
WA7
VOLT_OFF BOOLEAN 0 There is no voltage on the line and not VT (fuse) failure
VP_BB7_D BOOLEAN 0 Switch status of the disconnectors on busbar WA7 are valid
valid
valid
valid
EXDU_BPB BOOLEAN 0 No transm error from any bay with disconnectors on WA7
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
Table 501: ABC_LINE Output signals


Technical manual
Control

15.3.11 Interlocking for transformer bay AB_TRAFO IP14149-1 v2
GUID-AD839CAA-531B-43BC-B508-39AED3D0A97D v3

Interlocking for transformer bay AB_TRAFO - 3
The interlocking for transformer bay (AB_TRAFO) function is used for a transformer bay
connected to a double busbar arrangement according to figure 444. The function is used when
there is no disconnector between circuit breaker and transformer. Otherwise, the interlocking
for line bay (ABC_LINE) function can be used. This function can also be used in single busbar
arrangements.

Technical manual
Control
WA1 (A)
WA2 (B)
QB1 QB2
QC1
QA1
AB_TRAFO
QC2
QC3
QA2
QA2 and QC4 are not
QC4 used in this interlocking
QB3 QB4
en04000515.vsd
Figure 444: Switchyard layout AB_TRAFO
AB_TRAFO
QA1_OP QA1CLREL
QA1_CL QA1CLITL
QB1_OP QB1REL
QB1_CL QB1ITL
QB2_OP QB2REL
QB2_CL QB2ITL
QC1_OP QC1REL
QC1_CL QC1ITL
QC2_OP QC2REL
QC2_CL QC2ITL
QB3_OP QB1OPTR
QB3_CL QB1CLTR
QB4_OP QB2OPTR
QB4_CL QB2CLTR
QC3_OP QB12OPTR
QC3_CL QB12CLTR
QC11_OP VPQB1TR
QC11_CL VPQB2TR
QC21_OP VPQB12TR
QC21_CL
BC_12_CL
VP_BC_12
EXDU_ES
EXDU_BC
QA1_EX1
QA1_EX2
QA1_EX3
QB1_EX1
QB1_EX2
QB1_EX3
QB2_EX1
QB2_EX2
QB2_EX3
Figure 445: AB_TRAFO function block

Technical manual
Control
AB_TRAFO
QA1_OP
QA1_CL =1 VPQA1
QB1_OP
QB1_CL =1 VPQB1
QB2_OP
QB2_CL =1 VPQB2
QC1_OP
QC1_CL =1 VPQC1
QC2_OP
QC2_CL =1 VPQC2
QB3_OP
QB3_CL =1 VPQB3
QB4_OP
QB4_CL =1 VPQB4
QC3_OP
QC3_CL =1 VPQC3
QC11_OP
QC11_CL =1 VPQC11
QC21_OP
QC21_CL =1 VPQC21
VPQB1 QA1CLREL
VPQB2 QA1CLITL
VPQC1 & 1
VPQC2
VPQB3
VPQB4
VPQC3
QA1_EX2
QC3_OP
QA1_EX3
QC1_CL >1
QC2_CL
QC3_CL &
QA1_EX1
en04000538.vsd
VPQA1
VPQB2 QB1REL
& >1
VPQC1 QB1ITL
VPQC2 1
VPQC3
VPQC11
QA1_OP
QB2_OP
QC1_OP
QC2_OP
QC3_OP
QC11_OP
EXDU_ES
QB1_EX1
VPQB2
VPQC3
&
VP_BC_12
QB2_CL
QC3_OP
BC_12_CL
EXDU_BC
QB1_EX2
VPQC1
VPQC2
&
VPQC3
VPQC11
QC1_CL
QC2_CL
QC3_CL
QC11_CL
EXDU_ES
QB1_EX3
en04000539.vsd

Technical manual
Control
VPQA1
VPQB1 QB2REL
& >1
VPQC1 QB2ITL
VPQC2 1
VPQC3
VPQC21
QA1_OP
QB1_OP
QC1_OP
QC2_OP
QC3_OP
QC21_OP
EXDU_ES
QB2_EX1
VPQB1
VPQC3
&
VP_BC_12
QB1_CL
QC3_OP
BC_12_CL
EXDU_BC
QB2_EX2
VPQC1
VPQC2
&
VPQC3
VPQC21
QC1_CL
QC2_CL
QC3_CL
QC21_CL
EXDU_ES
QB2_EX3
en04000540.vsd
VPQB1 QC1REL
VPQB2 QC1ITL
& 1
VPQB3
QC2REL
VPQB4
QB1_OP QC2ITL
1
QB2_OP
QB3_OP
QB4_OP
QB1_OP QB1OPTR
QB1_CL QB1CLTR
VPQB1 VPQB1TR
QB2_OP QB2OPTR
QB2_CL QB2CLTR
VPQB2 VPQB2TR
QB1_OP QB12OPTR
QB2_OP >1 QB12CLTR
VPQB1 1
VPQB12TR
VPQB2 &
en04000541.vsd
15.3.11.5 Signals
Table 502: AB_TRAFO Input signals


Technical manual
Control

QC11_OP BOOLEAN 0 QC11 on busbar WA1 is in open position
QC11_CL BOOLEAN 0 QC11 on busbar WA1 is in closed position
QC21_OP BOOLEAN 0 QC21 on busbar WA2 is in open position
QC21_CL BOOLEAN 0 QC21 on busbar WA2 is in closed position
WA2
valid
EXDU_BC BOOLEAN 0 No transmission error from any bus coupler bay
QA1_EX1 BOOLEAN 0 External condition for apparatus QA1
Table 503: AB_TRAFO Output signals


Technical manual
Control

15.3.12 Position evaluation POS_EVAL GUID-F20A8939-E91E-44F6-920C-083E5D3FCDFD v2
GUID-3C4B9379-C861-406C-9295-0309014D548E v2

Position evaluation POS_EVAL - -
15.3.12.2 Functionality GUID-C3D07B40-FF01-45C5-A083-EED5643A5FCC v4
Position evaluation (POS_EVAL) function converts the input position data signal POSITION,
consisting of value, time and signal status, to binary signals OPENPOS or CLOSEPOS.
The output signals are used by other functions in the interlocking scheme.
15.3.12.3 Function block GUID-B5EF4A28-9C9F-4558-8CD6-453FB480314B v2
POS_EVAL
POSITION OPENPOS
CLOSEPOS
Figure 446: POS_EVAL function block
15.3.12.4 Logic diagram GUID-F0EF8D38-031B-4A8E-BD7D-60314F5DCD59 v2
POS_EVAL
Position including quality POSITION OPENPOS
Open/close position of
CLOSEPOS switch device
IEC08000469-1-EN V1 EN-US
Only the value, open/close, and status is used in this function. Time information is not used.
Input position (Value) Signal quality Output OPENPOS Output CLOSEPOS

0 (Breaker intermediate) Good 0 0
1 (Breaker open) Good 1 0
2 (Breaker closed) Good 0 1
3 (Breaker faulty) Good 0 0
Any Invalid 0 0
Any Oscillatory 0 0

Technical manual
Control
15.3.12.5 Signals
Table 504: POS_EVAL Input signals

POSITION INTEGER 0 Position status including quality
Table 505: POS_EVAL Output signals

OPENPOS BOOLEAN Open position
CLOSEPOS BOOLEAN Close position
15.4 Apparatus control IP14560-1 v3
The apparatus control functions are used for control and supervision of circuit breakers,
disconnectors and earthing switches within a bay. Permission to operate is given after
evaluation of conditions from other functions such as interlocking, synchrocheck, operator
place selection and external or internal blockings.
The complete apparatus control function is not included in this product, and
the information below is included for understanding of the principle for the use
of QCBAY, LOCREM, and LOCREMCTRL.
Apparatus control features:
• Select-Execute principle to give high reliability

• Selection function to prevent simultaneous operation
• Selection and supervision of operator place
• Command supervision
• Block/deblock of operation
• Block/deblock of updating of position indications
• Substitution of position and quality indications
• Overriding of interlocking functions
• Overriding of synchrocheck
• Operation counter
• Suppression of mid position
Two types of command models can be used:
• Direct with normal security

• SBO (Select-Before-Operate) with enhanced security
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command is evaluated with an additional
supervision of the status value of the control object. The command sequence with enhanced
security is always terminated by a CommandTermination service primitive and an AddCause
telling if the command was successful or if something went wrong.
Control operation can be performed from the local HMI with authority control if so defined.

Technical manual
Control
A bay can handle, for example a power line, a transformer, a reactor, or a capacitor bank. The
different primary apparatuses within the bay can be controlled via the apparatus control
functions directly by the operator or indirectly by automatic sequences.
Because a primary apparatus can be allocated to many functions within a Substation

Automation system, the object-oriented approach with a function block that handles the
interaction and status of each process object ensures consistency in the process information
used by higher-level control functions.
Primary apparatuses such as breakers and disconnectors are controlled and supervised by one
function block (SCSWI) each. Because the number and type of signals used for the control of a
breaker or a disconnector are almost the same, the same function block type is used to handle
these two types of apparatuses.
The SCSWI function block is connected either to an SXCBR function block (for circuit breakers)
or to an SXSWI function block (for disconnectors and earthing switches). The physical process
in the switchyard is connected to these two function blocks via binary inputs and outputs.
Four types of function blocks are available to cover most of the control and supervision within
the bay. These function blocks are interconnected to form a control function reflecting the
switchyard configuration. The total number used depends on the switchyard configuration.
These types are:
• Bay control QCBAY

• Switch controller SCSWI
• Circuit breaker SXCBR
• Circuit switch SXSWI
The functions Local Remote (LOCREM) and Local Remote Control (LOCREMCTRL), to handle
the local/remote switch. The functions Bay reserve (QCRSV) and Reservation input (RESIN), for
the reservation function, also belong to the apparatus control function.
The principles of operation, function blocks, input and output signals and setting parameters
for all these functions are described below.
15.4.3 Error handling GUID-6C31D291-74E8-46A3-8FC2-D3959C2458A5 v7
Depending on the error that occurs during the command sequence the error signal will be set
with a value. Table 506 describes the cause values given on local HMI. The translation to
AddCause values specified in IEC 61850-8-1 is shown in Table 507. For IEC 61850-8-1 edition 2
only addcauses defined in the standard are used, for edition 1 also a number of vendor specific
causes are used. The values are available in the command response to commands from IE
C61850-8-1 clients. An output L_CAUSE on the function block for Switch controller (SCSWI),
Circuit breaker (SXCBR) and Circuit switch (SXSWI) indicates the value of the cause during the
latest command if the function specific command evaluation has been started. The causes
that are not always reflected on the output L_CAUSE, with description of the typical reason are
listed in table 508.
Table 506: Values for "cause" signal

Cause Name Description Supported
number
0 None Control action successfully executed X
1 Not-supported Given for Cancel request with Direct Control in Ready state X
2 Blocked-by-switching- Not successful since one of the downstream Loc switches X
hierarchy like in CSWI has the value TRUE

Technical manual
Control

number
3 Select-failed Cancelled due to an unsuccessful selection (select service) X
4 Invalid-position Control action is aborted due to invalid switch position (Pos X
in XCBR or XSWI)
5 Position-reached Switch is already in the intended position (Pos in XCBR or X
XSWI)
6 Parameter-change-in- Control action is blocked due to running parameter change X
execution
7 Step-limit Control action is blocked, because tap changer has reached X
the limit (EndPosR or EndPosL in YLTC)
8 Blocked-by-Mode Control action is blocked, because the LN (CSWI or XCBR/ X
XSWI) is in a mode (Mod) which doesn’t allow any switching
9 Blocked-by-process Control action is blocked due to some external event at X
process level that prevents a successful operation, for
example blocking indication (EEHealth in XCBR or XSWI)
10 Blocked-by- Control action is blocked due to interlocking of switching X
interlocking devices (in CILO attribute EnaOpn.stVal=”FALSE” or
EnaCls.stVal=”FALSE”
11 Blocked-by- Control action with synchrocheck is aborted due to exceed X
synchrocheck of time limit and missing synchronism condition
12 Command-already-in- Control, select or cancel service is rejected, because control X
execution action is already running
13 Blocked-by-health Control action is blocked due to some internal event that X
prevents a successful operation (Health)
14 1-of-n-control Control action is blocked because another control action in X
a domain (for example, substation) is already running (in
any XCBR or XSWI of that domain, the DPC.stSeld=”TRUE”)
15 Abortion-by-cancel Control action is aborted due to cancel service X
16 Time-limit-over Control action is terminated due to exceed of some time X
limit
17 Abortion-by-trip Control action is aborted due to a trip (PTRC with X
ACT.general=”TRUE”)
18 Object-not-selected Control action is rejected, because control object was not X
selected
19 Object-already- Select action is not executed because the addressed object X
selected is already selected
20 No-access-authority Control action is blocked due to lack of access authority X
21 Ended-with- Control action executed but the end position has overshoot
overshoot
22 Abortion-due-to- Control action is aborted due to deviation between the
deviation command value and the measured value
23 Abortion-by- Control action is aborted due to the loss of connection with
communication-loss the client that issued the control
24 Blocked-by-command Control action is blocked due to the data attribute X
CmdBlk.stVal is TRUE
26 Inconsistent- The parameters between successive control services are X
parameters not consistent, for example the ctlNum of Select and
Operate service are different
27 Locked-by-other- Another client has already reserved the object X
client
-22 Wrong-Ctl-model Command from client uses wrong control model X
-23 Blocked-by-command Blocked by command X

Technical manual
Control

number
-24 Blocked-for-open- Blocked for Open command X
cmd
-25 Blocked-for-close- Blocked for Close Command X
cmd
-30 Long-operation-time Operation time too long X
-31 Switch-not-start- Switch did not start moving X
moving
-32 Persistent- Switch stopped in intermediate state X
intermediate-state
-33 Switch-returned-to- Switch returned to the initial position X
init-pos
-34 Switch-in-bad-state Switch is in a bad position state X
-35 Not-expected-final- Switch did not reach the expected final position X
position
Table 507: Translation of cause values for IEC 61850 edition 2 and edition 1
Internal Cause AddCause in IEC 61850-8-1 Name
Number
Ed 2 Ed 1
0 25 0 None
1 1 1 Not-supported
2 2 2 Blocked-by-switching-hierarchy
3 3 3 Select-failed
4 4 4 Invalid-position
5 5 5 Position-reached
6 6 6 Parameter-change-in-execution
7 7 7 Step-limit
8 8 8 Blocked-by-Mode
9 9 9 Blocked-by-process
10 10 10 Blocked-by-interlocking
11 11 11 Blocked-by-synchrocheck
12 12 12 Command-already-in-execution
13 13 13 Blocked-by-health
14 14 14 1-of-n-control
15 15 1 Abortion-by-cancel
16 16 16 Time-limit-over
17 17 17 Abortion-by-trip
18 18 18 Object-not-selected
19 19 3 Object-already-selected
20 20 3 No-access-authority
24 24 -23 Blocked-by-command
26 26 6 Inconsistent-parameters
27 27 12 Locked-by-other-client
-22 0 -22 Wrong-Ctl-model

Technical manual
Control
Internal Cause AddCause in IEC 61850-8-1 Name

Number
Ed 2 Ed 1
-23 24 -23 Blocked-by-command
-24 9 -24 Blocked-for-open-cmd
-25 9 -25 Blocked-for-close-cmd
-30 16 -30 Long-operation-time
-31 16 -31 Switch-not-start-moving
-32 4 -32 Persistent-intermediate-state
-33 22 -33 Switch-returned-to-init-pos
-34 4 -34 Switch-in-bad-state
-35 22 -35 Not-expected-final-position
Table 508: Cause values not reflected on the output L_CAUSE

Cause number Cause description Conditions
3 Select-failed Canceled due to an unsuccessful selection
(select service)
8 Blocked-by-Mode Control action is blocked because the LN
(CSWI) is in a mode (Mod) which doesn’t allow
any switching or does not match the mode of
the command.
12 Command-already-in-execution Control, select or cancel service is rejected
because control action is already running.
13 Blocked-by-health Control action is blocked due to some internal
event that prevents a successful operation
(Health).
16 Time-limit-over Control action is terminated due to exceed of
some time limit.
18 Object-not-selected Control action is rejected because control
object was not selected.
19 Object-already-selected Select action is not executed because the
addressed object is already selected.
20 No-access-authority Control action is blocked due to lack of access
authority.
26 Inconsistent-parameters The parameters between successive control
services are not consistent, for example the
ctlNum of Select and Operate service are
different.
27 Locked-by-other-client Another client has already reserved the object.
15.4.4 Bay control QCBAY IP15597-1 v2
The Bay control (QCBAY) function is used together with Local remote and local remote control
functions to handle the selection of the operator place per bay. QCBAY also provides blocking
functions that can be distributed to different apparatuses within the bay.

Technical manual
Control
QCBAY
LR_OFF PSTO
LR_LOC UPD_BLKD
LR_REM CMD_BLKD
LR_VALID LOC
BL_UPD STA
BL_CMD REM
Figure 447: QCBAY function block
15.4.4.3 Signals
Table 509: QCBAY Input signals

LR_OFF BOOLEAN 0 External Local/Remote switch is in Off position
LR_LOC BOOLEAN 0 External Local/Remote switch is in Local position
LR_REM BOOLEAN 0 External Local/Remote switch is in Remote position
LR_VALID BOOLEAN 0 Data representing the L/R switch position is valid
BL_UPD BOOLEAN 0 Steady signal to block the position updates
BL_CMD BOOLEAN 0 Steady signal to block the command
Table 510: QCBAY Output signals

PSTO INTEGER Value for the operator place allocation
UPD_BLKD BOOLEAN Update of position is blocked
CMD_BLKD BOOLEAN Function is blocked for commands
LOC BOOLEAN Local operation allowed
STA BOOLEAN Station operation allowed
REM BOOLEAN Remote operation allowed
15.4.4.4 Settings
Table 511: QCBAY Non group settings (basic)

AllPSTOValid Priority - - Priority Override Priority of originators,
No priority commands from both local, station
and remote are allowed
RemoteIncStation No - - No Both Station and Remote control are
Yes allowed but not Local when local
remote switch is in remote

Technical manual
Control
15.4.4.5 Operation principle

M13446-4 v8
The function sends information about the Permitted Source To Operate (PSTO) and blocking
conditions to other functions within the bay for example, switch control functions and voltage
control functions. The functionality of the Bay control (QCBAY) function is mainly described by
the LLN0 node in the IEC 61850-8-1 edition 2 standard, applied to one bay. In IEC 61850 edition
1 the functionality is not described by the LLN0 node or any other node, therefore the Bay
control function is represented as a vendor specific node in edition 1.
Local panel switch M13446-7 v8

The local panel switch is a switch that defines the operator place selection. The switch
connected to this function can have three positions (remote/local/off). The positions are here
defined so that remote means that operation is allowed from station and/or remote level and
local means that operation is allowed from the IED level. The local/remote switch is also on the
control/protection IED itself, which means that the position of the switch and its validity
information are connected internally, not via I/O boards. When the switch is mounted
separately from the IED the signals are connected to the function via I/O boards.
When the local panel switch (or LHMI selection, depending on the set source to select this) is in
Off position, all commands from remote and local level will be ignored. If the position for the
local/remote switch is not valid the PSTO output will always be set to faulty state (3), which
means no possibility to operate.
To adapt the signals from the local HMI or from an external local/remote switch, the function
blocks LOCREM and LOCREMCTRL are needed and connected to QCBAY.
Permitted Source To Operate (PSTO) M13446-16 v10

The actual state of the operator place is presented by the value of the Permitted Source To
Operate, PSTO signal. The PSTO value is evaluated from the local/remote switch position
according to Table 512. In addition, there are two settings and one command that affect the
value of the PSTO signal.
If the setting AllPSTOValid is set to No Priority and the LR-switch position is in Local or Remote
state, the PSTO output is set to 5 (all), that is, it is permitted to operate from local, station and
remote level without any priority. When the external panel switch is in Off position, the PSTO
output shows the actual state of the switch that is, 0. In this case, it is not possible to control
anything. The LocSta command value is forced to FALSE if AllPSTOValid is set to No priority.
If the setting RemoteIncStation is set to Yes and the LR-switch position is in Remote state, the
PSTO output is set to 2 (Station or Remote), that is, it is permitted to operate from both
station and remote level without any priority.
If the LR-switch position is in Remote state, and AllPSTOValid is set to Priority and
RemoteIncStation is set to No, the switching between station and remote level control is done
through the command LocSta. The command is accessible only through the IEC 61850 Edition
2 protocol.

Technical manual
Control
Table 512: PSTO values for different Local panel switch positions
Local panel AllPSTOValid RemoteInc LocSta.CtlV PSTO LED Possible
switch (setting) Station al value indications on locations that
positions (setting) (command) LHMI shall be able
to operate
0 = Off - - - 0 Remote and Not possible
Local Off to operate
1 = Local Priority - - 1 Remote Off, Local Panel
Local On
1 = Local No priority - - 5 Remote and Local,
Local On Station or
Remote level
without any
priority
2 = Remote Priority No TRUE 6 Remote On, Station level
Local Off
2 = Remote Priority No FALSE 7 Remote On, Remote level
Local Off
2 = Remote Priority Yes - 2 Remote On, Station or
Local Off Remote level
2 = Remote No priority - - 5 Remote and Local,
Local On Station or
Remote level
without any
priority
3 = Faulty - - - 3 Remote and Not possible
Local to operate
Flashing
Blockings M13446-50 v6
The blocking states for position indications and commands are intended to provide the
possibility for the user to make common blockings for the functions configured within a
complete bay.
The blocking facilities provided by the bay control function are the following:
• Blocking of position indications, BL_UPD. This input will block all inputs related to
apparatus positions for all configured functions within the bay.
• Blocking of commands, BL_CMD. This input will block all commands for all configured
functions within the bay.
The switching of the Local/Remote switch requires at least system operator level. The
password will be requested at an attempt to operate if authority levels have been defined in
the IED, otherwise the default authority level can handle the control without LogOn. The users
and passwords are defined with the IED Users tool in PCM600.
15.4.5 Local/Remote switch LOCREM IP16319-1 v3
M17086-3 v11
The signals from the local HMI or from an external local/remote switch are connected via the
function blocks local remote (LOCREM) and local remote control (LOCREMCTRL) to the Bay
control (QCBAY) function block. The parameter ControlMode in function block LOCREM is set
to choose if the switch signals are coming from the local HMI or from an external hardware
switch connected via binary inputs.

Technical manual
Control
LOCREM
CTRLOFF OFF
LOCCTRL LOCAL
REMCTRL REMOTE
LHMICTRL VALID
Figure 448: LOCREM function block
LOCREMCTRL
^PSTO1 HMICTR1
^PSTO2 HMICTR2
^PSTO3 HMICTR3
^PSTO4 HMICTR4
^PSTO5 HMICTR5
^PSTO6 HMICTR6
^PSTO7 HMICTR7
^PSTO8 HMICTR8
^PSTO9 HMICTR9
^PSTO10 HMICTR10
^PSTO11 HMICTR11
^PSTO12 HMICTR12
Figure 449: LOCREMCTRL function block
15.4.5.2 Signals
Table 513: LOCREM Input signals

CTRLOFF BOOLEAN 0 Disable control
LOCCTRL BOOLEAN 0 Local in control
REMCTRL BOOLEAN 0 Remote in control
LHMICTRL INTEGER 0 LHMI control
Table 514: LOCREM Output signals

OFF BOOLEAN Control is disabled
LOCAL BOOLEAN Local control is activated
REMOTE BOOLEAN Remote control is activated
VALID BOOLEAN Outputs are valid
Table 515: LOCREMCTRL Input signals

PSTO1 INTEGER 0 PSTO input channel 1

Technical manual
Control

Table 516: LOCREMCTRL Output signals

HMICTR1 INTEGER Bitmask output 1 to local remote LHMI input
15.4.5.3 Settings
Table 517: LOCREM Non group settings (basic)

ControlMode Internal LR-switch - - Internal LR- Control mode for internal/external LR-
External LR- switch switch
switch
15.4.5.4 Operation principle M17087-3 v9
The function block Local remote (LOCREM) handles the signals coming from the local/remote
switch. The connections are seen in Figure 450, where the inputs on function block LOCREM
are connected to binary inputs if an external switch is used. When the local HMI is used, the
inputs are not used. The switching between external and local HMI source is done through the
parameter ControlMode. The outputs from the LOCREM function block control the output
PSTO (Permitted Source To Operate) on Bay control (QCBAY).

Technical manual
Control
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREM QCBAY
CTRLOFF OFF LR_ OFF PSTO
LOCCTRL LOCAL LR_ LOC UPD_ BLKD
REMCTRL REMOTE LR_ REM CMD_ BLKD
LHMICTRL VALID LR_ VALID LOC
BL_ UPD STA
BL_ CMD REM
LOCREMCTRL
PSTO1 HMICTR1
PSTO2 HMICTR2
PSTO3 HMICTR3
PSTO4 HMICTR4
PSTO5 HMICTR5
PSTO6 HMICTR6
PSTO7 HMICTR7
PSTO8 HMICTR8
PSTO9 HMICTR9
PSTO 10 HMICTR 10
PSTO 11 HMICTR 11
PSTO 12 HMICTR 12
Figure 450: Configuration for the local/remote handling for a local HMI with two bays and
two screen pages
If the IED contains control functions for several bays, the local/remote position can be
different for the included bays. When the local HMI is used the position of the local/remote
switch can be different depending on which single line diagram screen page that is presented
on the local HMI. The function block Local remote control (LOCREMCTRL) controls the
presentation of the LEDs for the local/remote position to applicable bay and screen page.
The switching of the local/remote switch requires at least system operator level. The
password will be requested at an attempt to operate if authority levels have been defined in
the IED. Otherwise the default authority level, SuperUser, can handle the control without
LogOn. The users and passwords are defined with the IED Users tool in PCM600.
15.4.6 Switch controller SCSWI IP15603-1 v2
The Switch controller (SCSWI) initializes and supervises all functions to properly select and
operate switching primary apparatuses. The Switch controller may handle and operate on one
multi-phase device or up to three one-phase devices.

Technical manual
Control
SCSWI
BLOCK EXE_OP
PSTO EXE_CL
L_SEL SEL_OP
L_OPEN SEL_CL
L_CLOSE SELECTED
AU_OPEN RES_RQ
AU_CLOSE START_SY
BL_CMD CANC_SY
RES_GRT POSITION
RES_EXT OPENP OS
SY_INPRO CLOSEPOS
SYNC_OK POLEDISC
EN_OPEN CMD_BLK
EN_CLOSE L_CAUSE
XPOSL1* POS_INTR
XPOSL2* XEXINF
XPOSL3*
Figure 451: SCSWI function block
15.4.6.3 Signals
Table 518: SCSWI Input signals

PSTO INTEGER 2 Operator place selection
L_SEL BOOLEAN 0 Select signal from local panel
L_OPEN BOOLEAN 0 Open signal from local panel
L_CLOSE BOOLEAN 0 Close signal from local panel
AU_OPEN BOOLEAN 0 Open signal from local automation function
AU_CLOSE BOOLEAN 0 Close signal from local automation function
BL_CMD BOOLEAN 0 Steady signal for block of the command
RES_GRT BOOLEAN 0 Positive acknowledge that all reservations are made
RES_EXT BOOLEAN 0 Reservation is made externally
SY_INPRO BOOLEAN 0 Synchronizing function in progress
SYNC_OK BOOLEAN 0 Closing is permitted at set to true by the synchrocheck
EN_OPEN BOOLEAN 0 Enables open operation
EN_CLOSE BOOLEAN 0 Enables close operation
XPOSL1 GROUP - Group signal from XCBR/XSWI per phase
SIGNAL
SIGNAL
SIGNAL

Technical manual
Control
Table 519: SCSWI Output signals

EXE_OP BOOLEAN Execute command for open direction
EXE_CL BOOLEAN Execute command for close direction
SEL_OP BOOLEAN Selected for open command
SEL_CL BOOLEAN Selected for close command
SELECTED BOOLEAN Select conditions are fulfilled
RES_RQ BOOLEAN Request signal to the reservation function
START_SY BOOLEAN Starts the external synchronizing function
CANC_SY BOOLEAN Cancels the external synchronizing function, started through
START_SY
POSITION INTEGER Position indication
OPENPOS BOOLEAN Open position indication
CLOSEPOS BOOLEAN Closed position indication
POLEDISC BOOLEAN The positions for poles L1-L3 are not equal after a set time
CMD_BLK BOOLEAN Commands are blocked
L_CAUSE INTEGER Latest value of the error indication during command
POS_INTR BOOLEAN Stopped in intermediate position
XEXINF GROUP SIGNAL Execution information to XCBR, XSWI & XLNPROXY
GUID-7DABB496-EABE-48A4-8078-7ED5D6D4FE14 v2
AU_OPEN and AU_CLOSE are used to issue automated commands as e.g. for
load shedding for opening respectively closing to the SCSWI function. They
work without regard to how the operator place selector, PSTO, is set. In order
to have effect on the outputs EXE_OP and EXE_CL, the corresponding enable
input, EN_OPEN respectively EN_CLOSE must be set, and that no interlocking is
active.
L_SEL, L_OPEN and L_CLOSE are used for local command sequence connected
to binary inputs. In order to have effect, the operator place selector, PSTO,
must be set to local or to remote with no priority. If the control model used is
Select before operate, Also the corresponding enable input must be set, and no
interlocking is active. The L_SEL input must be set before L_OPEN or L_CLOSE
is operated, if the control model is Select before operate.
If one multi-phase XCBR/XSWI or two single-phase XCBR/XSWI are used for a

two- or three-phase system, two or more of the inputs XPOSL1, XPOSL2 and
XPOSL3 are connected to the same source.

Technical manual
Control
15.4.6.4 Settings
Table 520: SCSWI Non group settings (basic)

CtlModel Dir Norm - - SBO Enh Specifies control model type
SBO Enh
PosDependent Always permitted - - Always Permission to operate depending on
Not perm at permitted the position
00/11
tSelect 0.00 - 600.00 s 0.01 30.00 Maximum time between select and
execute signals
tResResponse 0.000 - 60.000 s 0.001 5.000 Allowed time from reservation request
to reservation granted
tSynchrocheck 0.00 - 600.00 s 0.01 10.00 Allowed time for synchrocheck to fulfil
close conditions
tSynchronizing 0.00 - 600.00 s 0.01 0.00 Supervision time to get the signal
synchronizing in progress
tExecutionFB 0.00 - 600.00 s 0.01 30.00 Maximum time from command
execution to termination
tPoleDiscord 0.000 - 60.000 s 0.001 2.000 Allowed time to have discrepancy
between the poles
SuppressMidPos Off - - On Mid-position is suppressed during
On time tIntermediate; tIntermediate is
set on each connected XCBR/XSWI
function individually
InterlockChk Sel & Op phase - - Sel & Op phase Selection if interlock check should be
Op phase done in select phase

M13484-4 v4
The Switch controller (SCSWI) is provided with verification checks for the select - execute
sequence, that is, checks the conditions prior each step of the operation are fulfilled. The
involved functions for these condition verifications are interlocking, reservation, blockings and
synchrocheck.
Control handling M13484-6 v7

.
Two types of control models can be used. The two control models are "direct with normal
security" and "SBO (Select-Before-Operate) with enhanced security". The parameter CtlModel
defines which one of the two control models is used. The control model "direct with normal
security" does not require a select whereas, the "SBO with enhanced security" command model
requires a select before execution. The command sequence for a command with control mode
SBO with enhanced security is shown in figure 452, with control mode direct with normal
security is shown in figure 453.

Technical manual
Control
Reservation SXCBR /
Client SCSWI
logic SXSWI
select
SEL_CL = TRUE
RES_RQ = TRUE
tReservation
Response
tSelect
RES_GRT = TRUE
SELECTED = TRUE
selectAck/AddCause = 0
requestedPosition = 10
opRcvd = TRUE
EXE_CL
opOK = TRUE, tOpOk

operateAck/AddCause = 0
operateAck/AddCause = 0
tExecutionFB
POSITION = 00, timeStamp

cmdTermination/AddCause = 0

cmdTermination/AddCause = 0
SELECTED = FALSE
SEL_CL = FALSE
RES_RQ = FALSE
RES_GRT = FALSE
IEC15000416-2-EN.vsdx
Figure 452: Example of command sequence for a successful close command when the
control model SBO with enhanced security is used
Reservation SwitchCtrl Switch

client
core core core
requestedPosition = 10
opRcvd = TRUE
RES_RQ
tReservation
Response
RES_GRT = TRUE
EXE_CL
opOK = TRUE, tOpOk
operateAck/AddCause = 0 operateAck/AddCause = 0
POSITION = 00, timeStamp POSITION = 00, timeStamp

cmdTermination/
POSITION = 10, timeStamp AddCause = 0
RES_RQ = FALSE
RES_GRT = FALSE
Figure 453: Example of command sequence for a successful close command when the
control model direct with normal security is used
Normal security means that only the command is evaluated and the resulting position is not
supervised. Enhanced security means that the command sequence is supervised in three
steps, the selection, command evaluation and the supervision of position. Each step ends up
with a pulsed signal to indicate that the respective step in the command sequence is finished.
If an error occurs in one of the steps in the command sequence, the sequence is terminated.
The last error (L_CAUSE) can be read from the function block and used for example at
commissioning.

Technical manual
Control
There is no relation between the command direction and the actual position.
For example, if the switch is in closed position it is possible to execute a close
command.
Before an execution command, an evaluation of the position is done. If the parameter

PosDependent is true and the position is in intermediate state or in bad state no execution
command is sent. If the parameter is false the execution command is sent independent of the
position value.
Evaluation of position M13484-14 v5

The position output from the switches (SXCBR or SXSWI) is connected to the switch controller
SCSWI. The XPOSL1, XPOSL2 and XPOSL3 input signals receive the position, time stamps and
quality attributes of the position which is used for further evaluation.
In the case when there are two or more one-phase switches connected to the switch control
function, the switch control will "merge" the position of the switches to the resulting multi-
phase position. In the case when the position differ between the one-phase switches,
following principles will be applied:
All switches in open position: switch control position = open

All switches in closed position: switch control position = closed
At least one switch in open position and the switch control position = intermediate
other(s) in closed position:
Any switch in intermediate position: switch control position = intermediate
Any switch in bad state: switch control position = bad state
The time stamp of the output multi-phase position from switch control will have the time
stamp of the last changed phase when it reaches the end position. When it goes to
intermediate position or bad state, it will get the time stamp of the first changed phase.
In addition, there is also the possibility that one of the one-phase switches will change
position at any time due to a trip. Such situation is here called pole discordance and is
supervised by this function. In case of a pole discordance situation, that is, the positions of the
one-phase switches are not equal for a time longer than the setting tPoleDiscord, an error
signal POLEDISC will be set.
In the supervision phase, the switch controller function evaluates the "cause" values from the
switch modules circuit breaker (SXCBR)/circuit switch (SXSWI). At error the "cause" value with
highest priority is shown.
Blocking principles M13484-37 v5

The blocking signals are normally coming from the bay control function (QCBAY) and via the
IEC 61850 communication from the operator place.
The different blocking possibilities are:
• Block/deblock of command. It is used to block command for operation of position.

• Blocking of function, BLOCK. If the BLOCK signal is set, it means that the function is
active, but no outputs are generated, no reporting, control commands are rejected and
functional and configuration data is visible.
The different block conditions will only affect the operation of this function,
that is, no blocking signals will be "forwarded" to other functions. The above
blocking outputs are stored in a non-volatile memory.

Technical manual
Control
Dependence on operator place GUID-AB327F15-AF44-4ACC-8FA5-2A52AE4AE090 v4

For the commands from a communication protocol, such as IEC 61850-8-1, and through the
inputs L_SEL, L_OPEN and L_CLOSE, the operator place is evaluated, and only the commands
from enabled operator places are accepted, see Table 512. Commands through the inputs
L_SEL, L_OPEN and L_CLOSE are always from the local operator place. For commands through
the inputs AU_OPEN and AU_CLOSE, the operator place is not evaluated. If the operator place is
set to Off, the commands through the inputs AU_OPEN and AU_CLOSE are not accepted.
Interaction with synchrocheck and synchronizing functions M13484-47 v5

The Switch controller (SCSWI) works in conjunction with the synchrocheck and the
synchronizing function (SESRSYN). It is assumed that the synchrocheck function is
continuously in operation and gives the result to SCSWI. The result from the synchrocheck
function is evaluated during the close execution. If the operator performs an override of the
synchrocheck, the evaluation of the synchrocheck state is omitted. When there is a positive
confirmation from the synchrocheck function, SCSWI will send the close signal EXE_CL to the
switch function Circuit breaker (SXCBR).
When there is no positive confirmation from the synchrocheck function, SCSWI will send a
start signal START_SY to the synchronizing function, which will send the closing command to
SXCBR when the synchronizing conditions are fulfilled, see Figure 454. If no synchronizing
function is included, the timer for supervision of the "synchronizing in progress signal" is set
to 0, which means no start of the synchronizing function. SCSWI will then set the attribute
"blocked-by-synchrocheck" in the "cause" signal. See also the time diagram in Figure 458.
SCSWI SXCBR
EXE_CL
OR CLOSE
SYNC_OK
START_SY
CANC_SY
SY_INPRO
SESRSYN
CLOSECB
Synchro Synchronizing
check function
Figure 454: Example of interaction between SCSWI, SESRSYN (synchrocheck and

synchronizing function) and SXCBR function
Time diagrams M13484-51 v7

The Switch controller (SCSWI) function has timers for evaluating different time supervision
conditions. These timers are explained here.
The timer tSelect is used for supervising the time between the select and the execute
command signal, that is, the time the operator has to perform the command execution after
the selection of the object to operate.

Technical manual
Control
select
execute command
tSelect
timer t1 t1>tSelect, then long-
operation-time in 'cause'
is set
en05000092.vsd
Figure 455: tSelect
The Long-operation-time cause is only given on the output L_CAUSE. It is not

sent on protocols since the selection has already received a positive response,
and no operation has been issued. If an operation is issued after the time out,
the negative response is Object-not-selected.
The parameter tResResponse is used to set the maximum allowed time to make the
reservation, that is, the time between reservation request and the feedback reservation
granted from all bays involved in the reservation function.
select
reservation request RES_RQ
reservation granted RES_GRT

t1>tResResponse, then 1-
tResResponse
of-n-control in 'cause' is
timer t1
set
Figure 456: tResResponse

The timer tExecutionFB supervises the time between the execute command and the command
termination, see Figure 457.

Technical manual
Control
execute command
position L1 open
close
position L2 open
close
position L3 open
close
cmd termination L1
cmd termination L2
cmd termination L3
cmd termination *
position open
close
t1>tExecutionFB, then
tExecutionFB timer long-operation-time in
t1 'cause' is set
* The cmd termination will be delayed one execution sample . APCtExecutionFB=IEC0

5000094=2=en=Original
.vsd
Figure 457: tExecutionFB

The parameter tSynchrocheck is used to define the maximum allowed time between the
execute command and the input SYNC_OK to become true. If SYNC_OK=true at the time the
execute command signal is received, the timer "tSynchrocheck" will not start. The start signal
for the synchronizing is obtained if the synchrocheck conditions are not fulfilled.
The parameter tSynchronizing is used to define the maximum allowed time between the start
signal for synchronizing and the confirmation that synchronizing is in progress.
execute command
SYNC_OK
tSynchrocheck
t1
START_SY
SY_INPRO
tSynchronizing t2>tSynchronizing, then

t2 blocked-by-synchrocheck in
'cause' is set
en05000095.vsd
Figure 458: tSynchroCheck and tSynchronizing
15.4.7 Circuit breaker SXCBR IP15614-1 v3

Technical manual
Control
The purpose of Circuit breaker (SXCBR) is to provide the actual status of positions and to
perform the control operations, that is, pass all the commands to primary apparatuses in the
form of circuit breakers via binary output boards and to supervise the switching operation and
position.
SXCBR
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
CBOPCAP CLOSEPOS
TR_OPEN TR_POS
TR_CLOSE CNT_VAL
RS_CNT L_CAUSE
EEH_WARN EEHEALTH
EEH_ALM CBOPCAP
XIN
Figure 459: SXCBR function block
15.4.7.3 Signals
Table 521: SXCBR Input signals

LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
POSOPEN BOOLEAN 0 Signal for open position of apparatus from I/O
POSCLOSE BOOLEAN 0 Signal for close position of apparatus from I/O
CBOPCAP INTEGER 3 Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO,
5 = COCO, 6+ = More
TR_OPEN BOOLEAN 0 Signal for open position of truck from I/O
TR_CLOSE BOOLEAN 0 Signal for close position of truck from I/O
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
XIN GROUP - Execution information from CSWI
SIGNAL

Technical manual
Control
Table 522: SXCBR Output signals

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
OP_BLKD BOOLEAN Indication that the function is blocked for open commands
CL_BLKD BOOLEAN Indication that the function is blocked for close commands
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
OPENPOS BOOLEAN Apparatus open position
CLOSEPOS BOOLEAN Apparatus closed position
TR_POS INTEGER Truck position indication
CNT_VAL INTEGER Operation counter value
EEHEALTH INTEGER External equipment health. 1=No warning or alarm,
2=Warning, 3=Alarm
CBOPCAP INTEGER Breaker operating capability 1 = None, 2 = O, 3 = CO, 4 = OCO,
5 = COCO, 6+ = More
15.4.7.4 Settings
Table 523: SXCBR Non group settings (basic)

tStartMove 0.000 - 60.000 s 0.001 0.100 Supervision time for the apparatus to
move after a command
tIntermediate 0.000 - 60.000 s 0.001 0.150 Allowed time for intermediate
position
AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open
command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close
command
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial
count value)

M13487-4 v8
The circuit breaker function (SXCBR) is used by other functions such as, for example, switch
controller, protection functions, autorecloser function or an IEC 61850 client residing in
another IED or the operator place. This switch function executes commands, evaluates block
conditions and evaluates different time supervision conditions. Only if all conditions indicate a
switch operation to be allowed, the function performs the execution command. In case of
erroneous conditions, the function indicates an appropriate "cause" value, see Table 506.

Technical manual
Control
SXCBR has an operation counter for closing and opening commands. The counter value can be
read remotely from the operator place. The value is reset from local HMI, a binary input or
remotely from the operator place by configuring a signal from the Single Point Generic Control
8 signals (SPC8GAPC) for example. The health of the external equipment, the switch, can be
monitored according to IEC 61850-8-1. The operation counter functionality and the external
equipment health supervision are independent sub-functions of the circuit breaker function.
Local/Remote switch M13487-7 v4

One binary input signal LR_SWI is included in SXCBR to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all
commands (for change of position) are rejected, even trip commands from protection
functions are rejected. The functionality of the local/remote switch is described in Figure 460.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 460: Local/Remote switch

SXCBR includes several blocking principles. The basic principle for all blocking signals is that
they will affect commands from all other clients for example, switch controller, protection
functions and autoreclosure.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for the open command.
• Block/deblock for close command. It is used to block operation for the close command.
• Update block/deblock of positions. It is used to block the updating of position values.
Other signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and
The above blocking outputs are stored in a non-volatile memory.
Substitution M13487-22 v5
The substitution part in SXCBR is used for manual set of the position and quality of the switch.
The typical use of substitution is that an operator enters a manual value because that the real
process value is erroneous for some reason. SXCBR will then use the manually entered value
instead of the value for positions determined by the process.
It is always possible to make a substitution, independently of the position

indication and the status information of the I/O board. When substitution is
enabled, the other signals related to the position follow the substituted
position. The substituted values are stored in a non-volatile memory. If the
function is blocked or blocked for update when the substitution is released, the
position value is kept the same as the last substitution value, but the quality is
changed to "questionable, old data", indicating that the value is old and not
reliable.

Technical manual
Control
When the position of the SXCBR is substituted, its IEC 61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position
quality of the connected SCSWI is not dependent on the substitution indication
in the quality, so it does not show that it is derived from a substituted value.

There are two timers for supervising of the execute phase, tStartMove and tIntermediate.
tStartMove supervises that the primary device starts moving after the execute output pulse is
sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 461
explains these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
t1 attribute in 'cause' is set
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 461: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent
to the primary equipment. Note that the output pulses for open and close command can have
different pulse lengths. The pulses can also be set to be adaptive with the configuration
parameter AdaptivePulse. Figure 462 shows the principle of the execute output pulse. The
AdaptivePulse parameter will have effect on both execute output pulses.
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 462: Execute output pulse

Technical manual
Control
If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter AdaptivePulse
is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
If the breaker reaches the final position before the execution pulse time has
elapsed, and AdaptivePulse is not true, the function waits for the end of the
execution pulse before telling the activating function that the command is
completed.
There is one exception to the first item above: if the primary device is in open position and an
open command is executed or if the primary device is in closed position and a close command
is executed. In these cases, with the additional condition that the configuration parameter
AdaptivePulse is true, the execute output pulse is always activated and resets when
tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false, the
execution output remains active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when
a command is executed, the execute output pulse resets only when timer
tOpenPulse or tClosePulse has elapsed.
An example of when a primary device is open and an open command is executed is shown in
Figure 463 .
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 463: Open command with open position indication
15.4.8 Circuit switch SXSWI IP15620-1 v2

Technical manual
Control
The purpose of Circuit switch (SXSWI) function is to provide the actual status of positions and
to perform the control operations, that is, pass all the commands to primary apparatuses in
the form of disconnectors or earthing switches via binary output boards and to supervise the
switching operation and position.
SXSWI
BLOCK XPOS
LR_SWI EXE_OP
OPEN EXE_CL
CLOSE SUBSTED
BL_OPEN OP_BLKD
BL_CLOSE CL_BLKD
BL_UPD UPD_BLKD
POSOP EN POSITION
POSCLOSE OPENP OS
SWOPCAP CLOSEPOS
RS_CNT CNT_VAL
EEH_WARN L_CAUSE
EEH_ALM EEHEALTH
XIN SWOPCAP
Figure 464: SXSWI function block
15.4.8.3 Signals
Table 524: SXSWI Input signals

LR_SWI BOOLEAN 0 Local/Remote switch indication from switchyard
OPEN BOOLEAN 0 Pulsed signal used to immediately open the switch
CLOSE BOOLEAN 0 Pulsed signal used to immediately close the switch
BL_OPEN BOOLEAN 0 Signal to block the open command
BL_CLOSE BOOLEAN 0 Signal to block the close command
BL_UPD BOOLEAN 0 Steady signal for block of the position updating
SWOPCAP INTEGER 4 Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C
RS_CNT BOOLEAN 0 Resets the operation counter
EEH_WARN BOOLEAN 0 Warning from external equipment
EEH_ALM BOOLEAN 0 Alarm from external equipment
SIGNAL

Technical manual
Control
Table 525: SXSWI Output signals

XPOS GROUP SIGNAL Group connection to CSWI for XCBR and XSWI
EXE_OP BOOLEAN Executes the command for open direction
EXE_CL BOOLEAN Executes the command for close direction
SUBSTED BOOLEAN Indication that the position is substituted
UPD_BLKD BOOLEAN Update of position indication is blocked
POSITION INTEGER Apparatus position indication
2=Warning, 3=Alarm
SWOPCAP INTEGER Switch operating capability 1 = None, 2 = O, 3 = C, 4 = O and C
15.4.8.4 Settings
Table 526: SXSWI Non group settings (basic)

position
AdaptivePulse Not adaptive - - Not adaptive Output resets when a new correct end
Adaptive position is reached
tOpenPulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for open
command
tClosePulse 0.000 - 60.000 s 0.001 0.200 Output pulse length for close
command
SwitchType Load Break - - Disconnector 1=LoadBreak,2=Disconnector,3=Earth
Disconnector Sw,4=HighSpeedEarthSw
Earthing Switch
HS Earthing
Switch
InitialCount 0 - 20000 - 1 0 Initial number of operations (Initial
count value)

M16494-3 v8
The users of the Circuit switch (SXSWI) are other functions such as for example, switch
controller, protection functions, autorecloser function, or a 61850 client residing in another IED
or the operator place. SXSWI executes commands, evaluates block conditions and evaluates
different time supervision conditions. Only if all conditions indicate a switch operation to be

Technical manual
Control
allowed, SXSWI performs the execution command. In case of erroneous conditions, the
function indicates an appropriate "cause" value, see Table 506.
SXSWI has an operation counter for closing and opening commands. The counter value can be
read remotely from the operator place. The value is reset from a binary input or remotely from
the operator place by configuring a signal from the Single Point Generic Control 8 signals
(SPC8GAPC), for example.
Also, the health of the external equipment, the switch, can be monitored according to IEC
61850-8-1.
Local/Remote switch M16494-6 v4

One binary input signal LR_SWI is included in SXSWI to indicate the local/remote switch
position from switchyard provided via the I/O board. If this signal is set to TRUE it means that
change of position is allowed only from switchyard level. If the signal is set to FALSE it means
that command from IED or higher level is permitted. When the signal is set to TRUE all
commands (for change of position) from internal IED clients are rejected, even trip commands
from protection functions are rejected. The functionality of the local/remote switch is
described in Figure 465.
Local= Operation at
UE switch yard level
TR
From I/O switchLR

FAL
SE
Remote= Operation at
IED or higher level
en05000096.vsd
Figure 465: Local/Remote switch

SXSWI includes several blocking principles. The basic principle for all blocking signals is that
they will affect commands from all other clients for example, switch controller, protection
functions and autorecloser.
The blocking possibilities are:
• Block/deblock for open command. It is used to block operation for open command.
• Block/deblock for close command. It is used to block operation for close command.
• Update block/deblock of positions. It is used to block the updating of position values.
Other signals related to the position will be reset.
• Blocking of function, BLOCK. If BLOCK signal is set, it means that the function is active,
but no outputs are generated, no reporting, control commands are rejected and
The above blocking outputs are stored in a non-volatile memory.
Substitution M16494-21 v7
The substitution part in SXSWI is used for manual set of the position and quality of the switch.
The typical use of substitution is that an operator enters a manual value because the real
process value is erroneous of some reason. SXSWI will then use the manually entered value
instead of the value for positions determined by the process.

Technical manual
Control
It is always possible to make a substitution, independently of the position

indication and the status information of the I/O board. When substitution is
enabled, the other signals related to the position follow the substituted
position. The substituted values are stored in a non-volatile memory. If the
function is blocked or blocked for update when the substitution is released, the
position value is kept the same as the last substitution value, but the quality is
changed to "questionable, old data", indicating that the value is old and not
reliable.
When the position of the SXSWI is substituted, its IEC 61850-8-1 data object is
marked as “substituted", in addition to the substituted quality, but the position
quality of the connected SCSWI is not dependent on the substitution indication
in the quality, so it does not show that it is derived from a substituted value.

There are two timers for supervising of the execute phase, tStartMove and tIntermediate.
tStartMove supervises that the primary device starts moving after the execute output pulse is
sent. tIntermediate defines the maximum allowed time for intermediate position. Figure 466
explains these two timers during the execute phase.
EXE_CL AdaptivePulse = TRUE

Close pulse duration
OPENPOS
CLOSEPOS
if t1 > tStartMove then

tStartMove timer "switch-not-start-moving"
tStartMove
if t2 > tIntermediate then

tIntermediate timer "persisting-intermediate-state"
tIntermediate
en05000097.vsd
Figure 466: The timers tStartMove and tIntermediate

The timers tOpenPulse and tClosePulse are the length of the execute output pulses to be sent
to the primary equipment. Note that the output pulses for open and close command can have
different pulse lengths. The pulses can also be set to be adaptive with the configuration
parameter AdaptivePulse. Figure 467 shows the principle of the execute output pulse. The
AdaptivePulse parameter will have effect on both execute output pulses.

Technical manual
Control
OPENPOS
CLOSEPOS
AdaptivePulse=FALSE
EXE_CL
tClosePulse
AdaptivePulse=TRUE
EXE_CL
tClosePulse
en05000098.vsd
Figure 467: Execute output pulse

If the pulse is set to be adaptive, it is not possible for the pulse to exceed tOpenPulse or
tClosePulse.
The execute output pulses are reset when:
• the new expected final position is reached and the configuration parameter AdaptivePulse
is set to true
• the timer tOpenPulse or tClosePulse has elapsed
• an error occurs due to the switch does not start moving, that is, tStartMove has elapsed.
If the controlled primary device reaches the final position before the execution
pulse time has elapsed, and AdaptivePulse is not true, the function waits for
the end of the execution pulse before telling the activating function that the
command is completed.
There is one exception from the first item above. If the primary device is in open position and
an open command is executed or if the primary device is in close position and a close
command is executed. In these cases, with the additional condition that the configuration
parameter AdaptivePulse is true, the execute output pulse is always activated and resets when
tStartMove has elapsed. If the configuration parameter AdaptivePulse is set to false the
execution output remains active until the pulse duration timer has elapsed.
If the start position indicates bad state (OPENPOS=1 and CLOSEPOS =1) when
a command is executed the execute output pulse resets only when timer
tOpenPulse or tClosePulse has elapsed.
An example when a primary device is open and an open command is executed is shown in
Figure 468.

Technical manual
Control
OPENPOS
CLOSEPOS
EXE_OP AdaptivePulse=FALSE
tOpenPulse
EXE_OP AdaptivePulse=TRUE
tOpenPulse
tStartMove timer
en05000099.vsd
Figure 468: Open command with open position indication
15.4.9 Proxy for signals from switching device via GOOSE XLNPROXY
15.4.9.1 Functionality GUID-11F9CA1C-8E20-489B-822B-34DACC59553A v1
The proxy for signals from switching device via GOOSE (XLNPROXY) gives an internal
representation of the position status and control response for a switch modelled in a breaker
IED. This representation is identical to that of an SXCBR or SXSWI function.
15.4.9.2 Function block GUID-408513CD-A87E-45E8-8E44-24E153947F02 v1
XLNPROXY
BEH* XPOS
BEH_VALID* SELECTED
LOC* OP_BLKD
LOC_VALID* CL_BLKD
BLKOPN* OPENPOS
BLKOPN_V* CLOSEPOS
BLKCLS* CNT_VAL
BLKCLS_V* L_CAUSE
POSVAL* EEHEALTH
POSVAL_V* OPCAP
OPCNT*
OP_CNT_V*
BLK
BLK_VAL
STSELD
STSELD_V
OPRCVD
OPRCVD_V
OPOK
OPOK_VAL
EEHEALTH
EEH_VAL
OPCAP
OPCAP_V
COMMVALID
XIN
Figure 469: XLNPROXY function block

Technical manual
Control
15.4.9.3 Signals
Table 527: XLNPROXY Input signals

BEH INTEGER -1 Behaviour
BEH_VLD BOOLEAN 0 Valid data on BEH input
LOC BOOLEAN 0 Local control behaviour
LOC_VLD BOOLEAN 0 Valid data on LOC input
BLKOPN BOOLEAN 0 Block opening
BLKOPN_VLD BOOLEAN 0 Valid data on BLKOPN input
BLKCLS BOOLEAN 0 Block closing
BLKCLS_VLD BOOLEAN 0 Valid data on BLKCLS input
POSVAL INTEGER 0 Switch position, Pos.stVal
POSVAL_VLD BOOLEAN 0 Valid data on POSVAL input
OPCNT INTEGER -1 Operation counter
OPCNT_VLD BOOLEAN 0 Valid data on OPCNT input
BLK BOOLEAN 0 Dynamic blocking of function described by the LN
BLK_VLD BOOLEAN 0 Valid data on BLK input
STSELD BOOLEAN 0 The controllable data is in the status "selected”
STSELD_VLD BOOLEAN 0 Valid data on STSELD input
OPRCVD BOOLEAN 0 Operate command for a controllable data object received
OPRCVD_VLD BOOLEAN 0 Valid data on OPRCVD input
OPOK BOOLEAN 0 Operate command for a controllable data object accepted
OPOK_VLD BOOLEAN 0 Valid data on OPOK input
EEHEALTH INTEGER -1 External equipment health
EEHEALTH_VLD BOOLEAN 0 Valid data on EEHEALTH input
OPCAP INTEGER -1 Operating capability
OPCAP_VLD BOOLEAN 0 Valid data on OPCAP input
COMMVALID BOOLEAN 0 Communication valid
SIGNAL
Table 528: XLNPROXY Output signals

XPOS GROUP SIGNAL Group connection to CSWI
SELECTED BOOLEAN Select conditions are fulfilled

Technical manual
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2=Warning, 3=Alarm
OPCAP INTEGER Switch / breaker operating capability
15.4.9.4 Settings
Table 529: XLNPROXY Non group settings (basic)

SwitchType Circuit Breaker - - Circuit Breaker 0 = CB, 1 = Load Break, 2 =
Load Break Disconnector, 3 = Earthing Switch, 4 =
Disconnector High Speed Earthing Switch
Earthing Switch
HS Earth Switch
position
GUID-A4CCC681-D4D8-4534-905D-1D8AD40E923B v1
The default values of the inputs BEH, OPCNT, EEHEALTH and OPCAP are set to
-1 to denote that they are not connected.
15.4.9.5 Operation principle GUID-D2679E0E-ABB5-46F0-AD9C-F6E8E8099534 v1
The proxy for signals from switching device via GOOSE (XLNPROXY) is intended to be used
when the switch (XCBR/XSWI) is modelled and controlled in a breaker IED or similar unit on the
process bus. XLNPROXY packages the signals from the GOOSE receive function, normally
GOOSEXLNRCV, into the same format as used from SXCBR and SXSWI to SCSWI. It makes a
similar evaluation of the command response as SXCBR and SXSWI when a command is issued
from the connected SCSWI.
15.4.9.6 Position supervision GUID-95C72346-A577-4F0A-8584-8E1593B9B947 v1
XLNPROXY has two outputs for position indication: OPENPOS and CLOSEPOS. Position is a
double point indication and the OPENPOS and CLOSEPOS are binary outputs intended to be
used for condition logics to protection and control functions
Normally, the position outputs, OPENPOS and CLOSEPOS, follow the value of the input
POSVAL. However, if the POSVAL_V input is FALSE, the communication is lost (COMMVALID =
FALSE), or the quality of the position received is bad, the OPENPOS and CLOSEPOS are both
set to FALSE.
15.4.9.7 Command response evaluation GUID-A2CDC1AE-A6F5-478B-B6E5-3442C54212D8 v1
The command evaluation is triggered through the group input XIN that is connected to the
SCSWI function controlling the switch.

Technical manual
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If an operation is initiated by the SCSWI, the XLNPROXY function checks if the switch is
blocked for the operation direction and that the position moves to the desired position within
the two time limits tStartMove and tIntermediate. The default values for tStartMove and
tIntermediate are for a breaker. The typical values for a disconnector are:
• tStartMove = 3s
• tIntermediate = 15s
In most cases, tStartMove and tIntermediate can be set to the same values as
in the source XCBR or XSWI function. However, if the time limits are set very
close to the actual movement times of the apparatus, compensation may be
needed for the communication delays and differences in cycle time of the
XLNPROXY function and the source function. The compensation should be in
the range of 0 - 5ms.
When the switch has started moving, it issues a response to the SCSWI function that the
operation has started. If it does not start moving within tStartMove, the command is deemed
as failed, and a cause is raised on the L_CAUSE output and sent to the SCSWI. The different
causes it can identify are listed in order of priority in table 1. The detection of the different
ways of blocking is done while waiting for movement of the switch, but the cause is not given
until the tStartMove has elapsed.
Table 530: Possible cause values from XLNPROXY

Cause No Cause Description Conditions
8 Blocked-by-Mode The BEH input is 5.
2 Blocked-by-switching- The LOC input indicates that only local commands
hierarchy are allowed for the breaker IED function.
-24 Blocked-for-open-cmd The BLKOPN is active indicating that the switch is
blocked for open commands.
-25 Blocked-for-close-cmd The BLKCLS is active indicating that the switch is
blocked for close commands.
9 Blocked-by-process If the Blk input is connected and active indicating
that the switch is dynamically blocked. Or if the
OPCAP input is connected, it indicates that the
operation capability of the switch is not enough to
perform the command.
5 Position-reached Switch is already in the intended position.
-31 Switch-not-start-moving Switch did not start moving within tStartMove.
-32 Persistent-intermediate-state The switch stopped in intermediate state for longer
than tIntermediate.
-33 Switch-returned-to-init-pos Switch returned to the initial position.
-34 Switch-in-bad-state Switch is in a bad position.
-35 Not-expected-final-position Switch did not reach the expected final position.
The L_CAUSE output keeps its output value until a new command sequence has been started.
If the quality of the position or the communication becomes bad, the command evaluation
replaces the uncertain position value with intermediate position. Thus, as long as the quality is
bad, all commands will result in the cause Persistant-intermediate-state, -32.
If the switch in the merging unit has the behaviour set to Test or Test blocked, when the
IED has the behaviour On or Blocked, all data from the switch is regarded as invalid. Thus, any
command will fail with the cause PersistantiIntermediate-state, -32, and if selection is used for

Technical manual
Control
the switch, all attempts to select the connected SCSWI will fail with the cause Select-failed, 3,
from the SCSWI.
It is possible to speed up the command response for when the command has been started by
the switch in the breaker IED by connecting the inputs OPOK and OPOK_VAL. Then the
blocking check is only done until OPOK is activated and confirmation of that the command has
been started is given to the SCSWI function.
If the inputs STSELD and STSELD_V are connected, the switch in the breaker IED is assumed to
use selection. Then the SCSWI will wait for a selected indication, STSELD input of XLNPROXY,
before accepting selection, this information is transferred to the SCSWI function from the
XLNPROXY through the group connection XPOS. If STSELD is not activated within tSelect of
the SCSWI function, the selection is deemed failed and it gives a negative selection
acknowledgement to the command issuer with the cause Select-failed. Further, if the
communication is lost, or the data received is deemed invalid, the selection will also fail with
cause Select-failed from the SCSWI.
15.4.10 Bay reserve QCRSV IP15629-1 v2
The purpose of the reservation (QCRSV) function is primarily to transfer interlocking

information between IEDs in a safe way and to prevent double operation in a bay, switchyard
part, or complete substation.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
Figure 470: QCRSV function block
15.4.10.3 Signals
Table 531: QCRSV Input signals

EXCH_IN INTEGER 0 Used for exchange signals between different BayRes blocks
RES_RQ1 BOOLEAN 0 Signal for app. 1 that requests to do a reservation

Technical manual
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BLOCK BOOLEAN 0 Reservation is not possible and the output signals are reset
OVERRIDE BOOLEAN 0 Signal to override the reservation
RES_DATA INTEGER 0 Reservation data coming from function block ResIn
Table 532: QCRSV Output signals

RES_GRT1 BOOLEAN Reservation is made and the app. 1 is allowed to operate
RES_BAYS BOOLEAN Request for reservation of other bays
ACK_TO_B BOOLEAN Acknowledge to other bays that this bay is reserved
RESERVED BOOLEAN Indicates that the bay is reserved
EXCH_OUT INTEGER Used for exchange signals between different BayRes blocks
15.4.10.4 Settings
Table 533: QCRSV Non group settings (basic)

tCancelRes 0.000 - 60.000 s 0.001 10.000 Supervision time for canceling the
reservation
ParamRequest1 Other bays res. - - Only own bay res. Reservation of the own bay only, at
Only own bay res. selection of apparatus 1

Technical manual
Control

M13505-4 v3
The Bay reserve (QCRSV) function handles the reservation. QCRSV function starts to operate in
two ways. It starts when there is a request for reservation of the own bay or if there is a
request for reservation from another bay. It is only possible to reserve the function if it is not
currently reserved. The signal that can reserve the own bay is the input signal RES_RQx (x=1-8)
coming from switch controller (SCWI). The signals for request from another bay are the
outputs RE_RQ_B and V_RE_RQ from function block RESIN. These signals are included in signal
EXCH_OUT from RESIN and are connected to RES_DATA in QCRSV.
The parameters ParamRequestx (x=1-8) are chosen at reservation of the own bay only (TRUE)
or other bays (FALSE). To reserve the own bay only means that no reservation request
RES_BAYS is created.
Reservation request of own bay M13505-7 v2

If the reservation request comes from the own bay, the function QCRSV has to know which
apparatus the request comes from. This information is available with the input signal RES_RQx
and parameter ParamRequestx (where x=1-8 is the number of the requesting apparatus). In
order to decide if a reservation request of the current bay can be permitted QCRSV has to
know whether the own bay already is reserved by itself or another bay. This information is
available in the output signal RESERVED.
If the RESERVED output is not set, the selection is made with the output RES_GRTx (where
x=1-8 is the number of the requesting apparatus), which is connected to switch controller
SCSWI. If the bay already is reserved the command sequence will be reset and the SCSWI will
set the attribute "1-of-n-control" in the "cause" signal.
Reservation of other bays M13505-11 v2

When the function QCRSV receives a request from an apparatus in the own bay that requires
other bays to be reserved as well, it checks if it already is reserved. If not, it will send a request
to the other bays that are predefined (to be reserved) and wait for their response
(acknowledge). The request of reserving other bays is done by activating the output
RES_BAYS.
When it receives acknowledge from the bays via the input RES_DATA, it sets the output
RES_GRTx (where x=1-8 is the number of the requesting apparatus). If not acknowledgement
from all bays is received within a certain time defined in SCSWI (tResResponse), the SCSWI will
reset the reservation and set the attribute "1-of-n-control" in the "cause" signal.
Reservation request from another bay M13505-15 v2

When another bay requests for reservation, the input BAY_RES in corresponding function block
RESIN is activated. The signal for reservation request is grouped into the output signal
EXCH_OUT in RESIN, which is connected to input RES_DATA in QCRSV. If the bay is not
reserved, the bay will be reserved and the acknowledgment from output ACK_T_B is sent back
to the requested bay. If the bay already is reserved the reservation is kept and no
acknowledgment is sent.
Blocking and overriding of reservation M13505-18 v4

If QCRSV function is blocked (input BLOCK is set to true) the reservation is blocked. That is, no
reservation can be made from the own bay or any other bay. This can be set, for example, via a
binary input from an external device to prevent operations from another operator place at the
same time.
The reservation function can also be overridden in the own bay with the OVERRIDE input
signal, that is, reserving the own bay without waiting for the external acknowledge.
Bay with more than eight apparatuses M13505-22 v6

If only one instance of QCRSV is used for a bay that is, use of up to eight apparatuses, the
input EXCH_IN must be set to zero.

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If there are more than eight apparatuses in the bay, there has to be one additional QCRSV. The
two QCRSV functions have to communicate and this is done through the input EXCH_IN and
EXCH_OUT according to Figure 471. If more than one QCRSV are used, the execution order is
very important. The execution order must be in the way that the first QCRSV has a lower
number than the next one.
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_RQ2 RES_GRT3
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6
RES_RQ6 RES_GRT7
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
BLOCK ACK_TO_B
OVERRIDE RESERVED
RES_DATA EXCH_OUT
QCRSV
EXCH_IN RES_GRT1
RES_RQ1 RES_GRT2
RES_BAYS
RES_RQ2 RES_GRT3 1
RES_RQ3 RES_GRT4
RES_RQ4 RES_GRT5
RES_RQ5 RES_GRT6 ACK_TO_B
RES_RQ6 RES_GRT7 1
RES_RQ7 RES_GRT8
RES_RQ8 RES_BAYS
1
BLOCK ACK_TO_B RESERVED
OVERRIDE RESERVED
RES_DATA EXCH_OUT
Figure 471: Connection of two QCRSV function blocks
15.4.11 Reservation input RESIN IP15650-1 v2
The Reservation input (RESIN) function receives the reservation information from other bays.
The number of instances is the same as the number of involved bays (up to 60 instances are
available).
RESIN1
BAY_ACK ACK_F_B
BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
Figure 472: RESIN1 function block

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RESIN2
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
Figure 473: RESIN2 function block
15.4.11.3 Signals
Table 534: RESIN1 Input signals

BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req. from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 535: RESIN1 Output signals

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks
Table 536: RESIN2 Input signals

EXCH_IN INTEGER 5 Used for exchange signals between different ResIn blocks
BAY_ACK BOOLEAN 0 Another bay has acknow. the reservation req. from this bay
BAY_VAL BOOLEAN 0 The reserv. and acknow. signals from another bay are valid
BAY_RES BOOLEAN 0 Request from other bay to reserve this bay
Table 537: RESIN2 Output signals

ACK_F_B BOOLEAN All other bays have acknow. the reserv. req. from this bay
ANY_ACK BOOLEAN Any other bay has acknow. the reserv. req. from this bay
VALID_TX BOOLEAN The reserv. and acknow. signals from other bays are valid
RE_RQ_B BOOLEAN Request from other bay to reserve this bay
V_RE_RQ BOOLEAN Check if the request of reserving this bay is valid
EXCH_OUT INTEGER Used for exchange signals between different ResIn blocks

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15.4.11.4 Settings
Table 538: RESIN1 Non group settings (basic)

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for
Bay future use future use
Table 539: RESIN2 Non group settings (basic)

FutureUse Bay in use - - Bay in use The bay for this ResIn block is for
Bay future use future use
15.4.11.5 Operation principle M16503-3 v6
The reservation input (RESIN) function is based purely on Boolean logic conditions. The logic
diagram in Figure 474 shows how the output signals are created. The inputs of the function
block are connected to a receive function block representing signals transferred over the
station bus from another bay.
EXCH_IN INT
BIN
ACK_F_B
&
FutureUse
³1
ANY_ACK
BAY_ACK ³1
VALID_TX
&
BAY_VAL ³1
RE_RQ_B
³1
BAY_RES &
V _RE_RQ
³1
BIN
EXCH_OUT
INT
en05000089.vsd
Figure 474: Logic diagram for RESIN

Figure 475 describes the principle of the data exchange between all RESIN modules in the
current bay. There is one RESIN function block per "other bay" used in the reservation

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mechanism. The output signal EXCH_OUT in the last RESIN functions are connected to the
module bay reserve (QCRSV) that handles the reservation function in the own bay.
RESIN
BAY_ACK ACK_F_B
Bay 1 BAY_VAL ANY_ACK
BAY_RES VALID_TX
RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay 2 BAY_VAL VALID_TX
BAY_RES RE_RQ_B
V_RE_RQ
EXCH_OUT
RESIN
EXCH_IN ACK_F_B
BAY_ACK ANY_ACK
Bay n BAY_VAL VALID_TX
BAY_RES RE_RQ_B QCRSV
V_RE_RQ
EXCH_OUT RES_DATA
en05000090.vsd
Figure 475: Diagram of the chaining principle for RESIN
15.5 Logic rotating switch for function selection and LHMI

presentation SLGAPC SEMOD114936-1 v5
SEMOD167845-2 v3

Logic rotating switch for function SLGAPC - -
selection and LHMI presentation
The logic rotating switch for function selection and LHMI presentation (SLGAPC) (or the
selector switch function block) is used to get an enhanced selector switch functionality
compared to the one provided by a hardware selector switch. Hardware selector switches are
used extensively by utilities, in order to have different functions operating on pre-set values.
Hardware switches are however sources for maintenance issues, lower system reliability and
an extended purchase portfolio. The selector switch function eliminates all these problems.

Technical manual
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SLGAPC
BLOCK ^P01
PSTO ^P02
UP ^P03
DOWN ^P04
^P05
^P06
^P07
^P08
^P09
^P10
^P11
^P12
^P13
^P14
^P15
^P16
^P17
^P18
^P19
^P20
^P21
^P22
^P23
^P24
^P25
^P26
^P27
^P28
^P29
^P30
^P31
^P32
SWPOSN
Figure 476: SLGAPC function block
15.5.4 Signals
Table 540: SLGAPC Input signals

UP BOOLEAN 0 Binary "UP" command
DOWN BOOLEAN 0 Binary "DOWN" command
Table 541: SLGAPC Output signals

P01 BOOLEAN Selector switch position 1

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SWPOSN INTEGER Switch position (integer)
15.5.5 Settings
Table 542: SLGAPC Non group settings (basic)

On
NrPos 2 - 32 - 1 32 Number of positions in the switch
OutType Pulsed - - Steady Output type, steady or pulse
Steady
tPulse 0.000 - 60.000 s 0.001 0.200 Operate pulse duration, in [s]
tDelay 0.000 - s 0.010 0.000 Time delay on the output, in [s]
60000.000
StopAtExtremes Disabled - - Disabled Stop when min or max position is
Enabled reached

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Table 543: SLGAPC Monitored data

SWPOSN INTEGER - - Switch position (integer)

SEMOD114931-4 v8
The logic rotating switch for function selection and LHMI presentation (SLGAPC) function has
two operating inputs – UP and DOWN. When a signal is received on the UP input, the function
will activate the output next to the present activated output, in ascending order (for example
if the present activated output is P03 and one activates the UP input then the output P04 will
be activated). When a signal is received on the DOWN input, the function will activate the
output next to the present activated output, in descending order (for example if the present
activated output is P03 and one activates the DOWN input then the output P02 will be
activated). Depending on the output settings the output signals can be steady or pulsed. In
case of steady signals, the output will be active till the time it receives next operation of UP/
DOWN inputs. Also, depending on the settings one can have a time delay between activation of
the UP or DOWN input signals and the output activation.
Besides the inputs visible in the application configuration in the Application Configuration
Tool, there are other possibilities that will allow an user to set the desired position directly
(without activating the intermediate positions), either locally or remotely, using a “select
before execute” dialog. One can block the function operation, by activating the BLOCK input.
In this case, the present position will be kept and further operation will be blocked. The
operator place (local or remote) is specified through the PSTO input. If any operation is
allowed the signal INTONE from the Fixed signal function block can be connected. SLGAPC
function block has also an integer value output, that generates the actual position number.
The positions and the block names are fully settable by the user. These names will appear in
the menu, so the user can see the position names instead of a number.
15.5.7.1 Graphical display SEMOD114931-35 v4
There are two possibilities for SLGAPC
• if it is used just for the monitoring, the switches will be listed with their actual position
names, as defined by the user (max. 13 characters).
• if it is used for control, the switches will be listed with their actual positions, but only the
first three letters of the name will be used.
In both cases, the switch full name will be shown, but the user has to redefine it when building
the Graphical Display Editor, under the "Caption". If used for the control, the following
sequence of commands will ensure:

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Control
From the graphical display:
Control
Control Sing le Line Diagram
Measurements Comma nds
Events
Disturb ance r eco rds
Settings
Diagno stics
Test
Chang e to the "Switche s" pag e Reset
of the SLD by left-righ t arrows. Authori zation
Sele ct switch by up-down Lan guage
arro ws
../Control/SLD/Switch
O I ../Control/SLD/Switch
SMBRREC control SMBRREC control

WFM Sele ct switch. Pre ss the
WFM
I or O key. A dialo g b ox
Pilo t se tup app ears.
Pilo t se tup
OFF OFF
Damage control
P: Disc N: Disc Fe
DAL
The pos will not b e mod ified
(outputs will not b e activa ted) unt il OK Cancel
you press the Enter button for O.K.
../Control/SLD/Switch
SMBRREC control
WFM
Pilo t se tup
OFF
Damage control
DFW
Figure 477: Example 2 on handling the switch from the local HMI.
From the single line diagram on local HMI.
15.6 Selector mini switch VSGAPC SEMOD158754-1 v3
SEMOD167850-2 v4

Selector mini switch VSGAPC - 43
The Selector mini switch (VSGAPC) function block is a multipurpose function used for a variety
of applications, as a general purpose switch.

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VSGAPC can be controlled from the menu, from a symbol on the single line diagram (SLD) on
the local HMI or from Binary inputs.
VSGAPC
BLOCK BLOCKED
PSTO POSITION
IPOS1 POS1
IPOS2 POS2
CMDPOS12
CMDPOS21
Figure 478: VSGAPC function block
15.6.4 Signals
Table 544: VSGAPC Input signals

IPOS1 BOOLEAN 0 Position 1 indicating input
IPOS2 BOOLEAN 0 Position 2 indicating input
Table 545: VSGAPC Output signals

BLOCKED BOOLEAN The function is active but the functionality is blocked
POSITION INTEGER Position indication, integer
POS1 BOOLEAN Position 1 indication, logical signal
POS2 BOOLEAN Position 2 indication, logical signal
CMDPOS12 BOOLEAN Execute command from position 1 to position 2
CMDPOS21 BOOLEAN Execute command from position 2 to position 1
15.6.5 Settings
Table 546: VSGAPC Non group settings (basic)

On
CtlModel Dir Norm - - Dir Norm Specifies the type for control model
SBO Enh according to IEC 61850
Mode Steady - - Pulsed Operation mode
Pulsed
tSelect 0.000 - 60.000 s 0.001 30.000 Max time between select and execute
signals
tPulse 0.000 - 60.000 s 0.001 0.200 Command pulse lenght

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Selector mini switch (VSGAPC) function can be used for double purpose, in the same way as
switch controller (SCSWI) functions are used:
• for indication on the single line diagram (SLD). Position is received through the IPOS1 and
IPOS2 inputs and distributed in the configuration through the POS1 and POS2 outputs, or
to IEC 61850 through reporting, or GOOSE.
• for commands that are received via the local HMI or IEC 61850 and distributed in the
configuration through outputs CMDPOS12 and CMDPOS21.
The output CMDPOS12 is set when the function receives a CLOSE command from the local
HMI when the SLD is displayed and the object is chosen.
The output CMDPOS21 is set when the function receives an OPEN command from the local
HMI when the SLD is displayed and the object is chosen.
It is important for indication in the SLD that a symbol is associated with a

controllable object, otherwise the symbol won't be displayed on the screen. A
symbol is created and configured in GDE tool in PCM600.
The PSTO input is connected to the Local remote switch to have a selection of operators place,
operation from local HMI (Local) or through IEC 61850 (Remote). An INTONE connection from
Fixed signal function block (FXDSIGN) will allow operation from local HMI.
As it can be seen, both indications and commands are done in double-bit representation,
where a combination of signals on both inputs/outputs generate the desired result.
The following table shows the relationship between IPOS1/IPOS2 inputs and the name of the
string that is shown on the SLD. The value of the strings are set in PST.
IPOS1 IPOS2 Name of displayed string Default string value

0 0 PosUndefined P00
1 0 Position1 P01
0 1 Position2 P10
1 1 PosBadState P11
15.7 Generic communication function for Double Point

indication DPGAPC SEMOD55384-1 v4
GUID-E16EA78F-6DF9-4B37-A92D-5C09827E2297 v3

Generic communication function for DPGAPC - -
Double Point indication

Technical manual
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Generic communication function for Double Point indication (DPGAPC) function block is used
to send double point position indications to other systems, equipment or functions in the
substation through IEC 61850-8-1 or other communication protocols. It is especially intended
to be used in the interlocking station-wide logics.
Figure 479: DPGAPC function block
Table 547: DPGAPC Input signals

OPEN BOOLEAN 0 Open indication
CLOSE BOOLEAN 0 Close indication
VALID BOOLEAN 0 Valid indication
Table 548: DPGAPC Output signals

POSITION INTEGER Double point indication
15.7.5 Settings ABBD8E283863 v4
The function does not have any parameters available in the local HMI or PCM600.
When receiving the input signals, DPGAPC sends the signals over IEC 61850-8-1 to the systems,
equipment or functions that requests and thus subscribes on these signals. To be able to get
the signals into other systems, equipment or functions, one must use other tools, described in
the Engineering manual, and define which function block in which systems, equipment or
functions should receive this information.
More specifically, DPGAPC function reports a combined double point position indication
output POSITION, by evaluating the value and the timestamp attributes of the inputs OPEN
and CLOSE, together with the logical input signal VALID.
When the input signal VALID is active, the values of the OPEN and CLOSE inputs determine the
two-bit integer value of the output POSITION. The timestamp of the output POSITION will have
the latest updated timestamp of the inputs OPEN and CLOSE.

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When the input signal VALID is inactive, DPGAPC function forces the position to intermediated
state.
When the value of the input signal VALID changes, the timestamp of the output POSITION will
be updated as the time when DPGAPC function detects the change.
Refer to Table 549 for the description of the input-output relationship in terms of the value
and the quality attributes.
Table 549: Description of the input-output relationship

POSITION
VALID OPEN CLOSE
Value Description
0 - - 0 Intermediate
1 0 0 0 Intermediate
1 1 0 1 Open
1 0 1 2 Closed
1 1 1 3 Bad State
15.8 Single point generic control 8 signals SPC8GAPC SEMOD176448-1 v3
SEMOD176456-2 v3

Single point generic control 8 signals SPC8GAPC - -
The Single point generic control 8 signals (SPC8GAPC) function block is a collection of 8 single
point commands that can be used for direct commands for example reset of LEDs or putting
IED in "ChangeLock" state from remote. In this way, simple commands can be sent directly to
the IED outputs, without confirmation. Confirmation (status) of the result of the commands is
supposed to be achieved by other means, such as binary inputs and SPGAPC function blocks.
The commands can be pulsed or steady with a settable pulse time.
SPC8GAPC
BLOCK ÔUT1
PSTO ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
Figure 480: SPC8GAPC function block

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15.8.4 Signals
Table 550: SPC8GAPC Input signals

BLOCK BOOLEAN 0 Blocks the function operation
Table 551: SPC8GAPC Output signals

OUT1 BOOLEAN Command output 1
15.8.5 Settings
Table 552: SPC8GAPC Non group settings (basic)

On
PulseMode1 Pulsed - - Pulsed Setting for pulsed/latched mode for
Latched output 1
tPulse1 0.01 - 6000.00 s 0.01 0.10 Pulse time output 1
Latched output 2
Latched output 3
Latched output 4
Latched output 5
Latched output 6
Latched output 7

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Latched output 8
The PSTO input selects the operator place (LOCAL, REMOTE or ALL). One of the eight outputs
is activated based on the command sent from the operator place selected. The settings
Latchedx and tPulsex (where x is the respective output) will determine if the signal will be
pulsed (and how long the pulse is) or latched (steady). BLOCK will block the operation of the
function – in case a command is sent, no output will be activated.
PSTO is the universal operator place selector for all control functions. Although,
PSTO can be configured to use LOCAL or ALL operator places, only REMOTE
operator place is used in SPC8GAPC function.
15.9 AutomationBits, command function for DNP3.0

AUTOBITS SEMOD158589-1 v3
GUID-C3BB63F5-F0E7-4B00-AF0F-917ECF87B016 v4

AutomationBits, command function
AUTOBITS - -
for DNP3
Automation bits function for DNP3 (AUTOBITS) is used within PCM600 to get into the
configuration of the commands coming through the DNP3 protocol. The AUTOBITS function
plays the same role as functions GOOSEBINRCV (for IEC 61850) and MULTICMDRCV (for LON).

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AUTOBITS
BLOCK ^CMDBIT1
PSTO ^CMDBIT2
^CMDBIT3
^CMDBIT4
^CMDBIT5
^CMDBIT6
^CMDBIT7
^CMDBIT8
^CMDBIT9
^CMDBIT10
^CMDBIT11
^CMDBIT12
^CMDBIT13
^CMDBIT14
^CMDBIT15
^CMDBIT16
^CMDBIT17
^CMDBIT18
^CMDBIT19
^CMDBIT20
^CMDBIT21
^CMDBIT22
^CMDBIT23
^CMDBIT24
^CMDBIT25
^CMDBIT26
^CMDBIT27
^CMDBIT28
^CMDBIT29
^CMDBIT30
^CMDBIT31
^CMDBIT32
Figure 481: AUTOBITS function block
15.9.4 Signals
Table 553: AUTOBITS Input signals

Table 554: AUTOBITS Output signals

CMDBIT1 BOOLEAN Command out bit 1

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15.9.5 Settings
Table 555: AUTOBITS Non group settings (basic)

On
AutomationBits function (AUTOBITS) has 32 individual outputs which each can be mapped as a
Binary Output point in DNP3. The output is operated by a "Object 12" in DNP3. This object
contains parameters for control-code, count, on-time and off-time. To operate an AUTOBITS
output point, send a control-code of latch-On, latch-Off, pulse-On, pulse-Off, Trip or Close. The
remaining parameters will be regarded were appropriate. ex: pulse-On, on-time=100, off-
time=300, count=5 would give 5 positive 100 ms pulses, 300 ms apart.
There is a BLOCK input signal, which will disable the operation of the function, in the same way
the setting Operation: On/Off does. That means that, upon activation of the BLOCK input, all
32 CMDBITxx outputs will be set to 0. The BLOCK acts like an overriding, the function still
receives data from the DNP3 master. Upon deactivation of BLOCK, all the 32 CMDBITxx
outputs will be set by the DNP3 master again, momentarily. For AUTOBITS , the PSTO input

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determines the operator place. The command can be written to the block while in “Remote”. If
PSTO is in “Local” then no change is applied to the outputs.
15.10 Single command, 16 signals SINGLECMD SEMOD119849-1 v2
GUID-2217CCC2-5581-407F-A4BC-266CD6808984 v1

Single command, 16 signals SINGLECMD - -
The IEDs can receive commands either from a substation automation system or from the local
HMI. The command function block has outputs that can be used, for example, to control high
voltage apparatuses or for other user defined functionality.
SINGLECMD
BLOCK ÔUT1
ÔUT2
ÔUT3
ÔUT4
ÔUT5
ÔUT6
ÔUT7
ÔUT8
ÔUT9
ÔUT10
ÔUT11
ÔUT12
ÔUT13
ÔUT14
ÔUT15
ÔUT16
Figure 482: SINGLECMD function block
15.10.4 Signals
Table 556: SINGLECMD Input signals

BLOCK BOOLEAN 0 Block single command function

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Table 557: SINGLECMD Output signals

OUT1 BOOLEAN Single command output 1
15.10.5 Settings
Table 558: SINGLECMD Non group settings (basic)

Steady
Pulsed
Single command, 16 signals (SINGLECMD) function has 16 binary output signals. The outputs
can be individually controlled from a substation automation system or from the local HMI.
Each output signal can be given a name with a maximum of 13 characters in PCM600.
The output signals can be of the types Off, Steady, or Pulse. This configuration setting is done
via the local HMI or PCM600 and is common for the whole function block. The length of the
output pulses are 100 ms. In steady mode, SINGLECMD function has a memory to remember
the output values at power interruption of the IED. Also a BLOCK input is available used to
block the updating of the outputs.
The output signals, OUT1 to OUT16, are available for configuration to built-in functions or via
the configuration logic circuits to the binary outputs of the IED.

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Section 16 Scheme communication

16.1 Scheme communication logic for distance or
overcurrent protection ZCPSCH IP15749-1 v3
M14854-1 v4

Scheme communication logic for ZCPSCH - 85
distance or overcurrent protection
To achieve instantaneous fault clearance for all line faults, scheme communication logic is
provided. All types of communication schemes for permissive underreaching, permissive
overreaching, blocking, delta based blocking, unblocking and intertrip are available.
The built-in communication module (LDCM) can be used for scheme communication signaling
when included.
ZCPSCH
I3P* TRIP
U3P* CS
BLOCK CHSTOP
BLKTR CRL
BLKCS LCG
CSBLK
CACC
CSOR
CSUR
CR
CRG
CBOPEN
IEC09000004
Figure 483: ZCPSCH function block

Technical manual
16.1.4 Signals
Table 559: ZCPSCH Input signals

SIGNAL
SIGNAL
BLKTR BOOLEAN 0 Signal for block of trip output from communication logic
BLKCS BOOLEAN 0 Block of carrier send in permissive OR and blocking schemes
CSBLK BOOLEAN 0 Reverse directed distance protection zone signal
CACC BOOLEAN 0 Permissive distance protection zone signal
CSOR BOOLEAN 0 Overreaching distance protection zone signal
CSUR BOOLEAN 0 Underreaching distance protection zone signal
CR BOOLEAN 0 Carrier Signal Received
CRG BOOLEAN 0 Carrier guard signal received
CBOPEN BOOLEAN 0 Indicates that the breaker is open
Table 560: ZCPSCH Output signals

CS BOOLEAN Carrier Send signal
CHSTOP BOOLEAN Stops the blocking signal to remote end
CRL BOOLEAN Carrier signal received or missing carrier guard signal
LCG BOOLEAN Loss of carrier guard signal
16.1.5 Settings
Table 561: ZCPSCH Group settings (basic)

On
SchemeType Intertrip - - Permissive UR Scheme type
Permissive UR
Permissive OR
Blocking
DeltaBlocking
tCoord 0.000 - 60.000 s 0.001 0.035 Co-ordination time for blocking
communication scheme
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send
signal

Technical manual
Table 562: ZCPSCH Group settings (advanced)

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
DeltaI 0 - 200 %IB 1 10 Current change level in % of IBase for
DeltaU 0 - 100 %UB 1 5 Voltage change level in % of UB for
Delta3I0 0 - 200 %IB 1 10 Zero seq current change level in % of
IBase
Delta3U0 0 - 100 %UB 1 5 Zero seq voltage change level in % of
UBase
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection
Table 563: ZCPSCH Non group settings (advanced)

GlobalBaseSelector 1 - 12 - 1 1 Selection of one of the Global Base
Value groups

M13893-3 v5
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into blocking and permissive schemes,
respectively.
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a
fast trip, so its dependability is lower than that of a blocking scheme.
16.1.6.1 Blocking scheme M13893-6 v7
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is
received from the remote IED.
The received signal, which shall be connected to CR, is used to block the zone to be accelerated
to clear the fault instantaneously (after time tCoord). The forward overreaching zone to be
accelerated is connected to the input CACC, see figure 484.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses to prevent a false trip, see figure 484.
The function can be totally blocked by activating the input BLOCK. Tripping can be blocked by
activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
Figure 484: Basic logic for trip signal in blocking scheme

Technical manual
Channels for communication in each direction must be available.
16.1.6.2 Delta blocking scheme GUID-22E3BFAC-82E9-4434-B761-AD63BCFC68D5 v2
In order to avoid delays due to carrier coordination times, the initiation of sending of blocking
signal to remote end is done by a fault inception detection element based on delta quantities
of currents and voltages. The delta based fault detection is very fast and if the channel is fast
there is no need for delaying the operation of the remote distance element. The received
blocking signal arrives well before the distance element has started. If the fault is in forward
direction the sending is immediately stopped by a forward directed distance, directional
current or directional earth fault element.
The fault inception detection element detects instantaneous changes in any phase currents or
zero sequence current in combination with a change in the corresponding phase voltage or
zero sequence voltage. The criterion for the fault inception detection is if the change of any
phase voltage and current exceeds the settings DeltaU and DeltaI respectively, or if the change
of zero sequence voltage and zero sequence current exceeds the settings Delta3U0,Delta3I0
respectively. The schemeType is selected as DeltaBlocking.
If the fault inception function has detected a system fault, a block signal CS will be issued and
sent to remote end in order to block the overreaching zones. Different criteria has to be
fulfilled for sending the CS signal:
1. The breaker has to be in closed condition, that is, the input signal CBOPEN is deactivated.
2. A fault inception should have been detected while the carrier send signal is not blocked,
that is, the input signal BLKCS is not activated.
If it is later detected that it was an internal fault that made the function issue the CS signal,
the function will issue a CHSTOP signal to unblock the remote end.
The received signal, which is connected to the CR input, is not used to accelerate the release of
the overreaching zone to clear the fault instantaneously. The overreaching zone to be
accelerated is connected to the input CACC, see Figure 485.
In case of external faults, the blocking signal (CR) must be received before the settable timer
tCoord elapses, to prevent a false trip, see Figure 485.
The function can be totally blocked by activating the input BLOCK, block of trip by activating
the input BLKTR, block of carrier send by activating the input BLKCS.
tCoord
CACC
t TRIP
CR AND
en05000512.vsd
Figure 485: Basic logic for trip signal in delta blocking scheme
Channels for communication in each direction must be available.
16.1.6.3 Permissive underreaching scheme M13893-13 v6
In a permissive underreaching scheme, a forward directed underreaching measuring element

(normally zone1) sends a permissive signal CS to the remote end if a fault is detected.in
forward direction. The received signal CR is used to allow an overreaching zone to trip after the
tCoord timer has elapsed. The tCoord in permissive underreaching schemes is normally set to
zero.
The logic for trip signal in permissive scheme is shown in figure 486.

Technical manual
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
Figure 486: Logic for trip signal in permissive scheme

activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.
16.1.6.4 Permissive overreaching scheme M13893-22 v6
In a permissive overreaching scheme, a forward directed overreaching measuring element

(normally zone2) sends a permissive signal CS to the remote end if a fault is detected in
forward direction. The received signal CR is used to allow an overreaching zone to trip after the
settable tCoord timer has elapsed. The tCoord in permissive overreaching schemes is normally
set to zero.
The logic for trip signal in permissive scheme is shown in figure 486.
tCoord
CACC
t TRIP
CR AND
en05000513.vsd
Figure 487: Logic for trip signal in permissive scheme

activating the input BLKTR. Signal send can be blocked by activating the input BLKCS.e.
16.1.6.5 Unblocking scheme M13893-31 v8
In unblocking scheme, the lower dependability of a permissive scheme is overcome by using

the loss of guard signal from the communication equipment to locally create a receive signal. It
is common or suitable to use the function when older, less reliable power-line carrier (PLC)
communication is used.
The unblocking function uses a guard signal CRG, which must always be present, even when no
CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 488. This enables a permissive scheme to
operate when the line fault blocks the signal transmission. The CRG signal is only used in
unblocking schemes.
The received signal created by the unblocking function is reset 150 ms after the security timer
has elapsed. When that occurs an output signal LCG is activated for signalling purpose. The
unblocking function is reset 200 ms after that the guard signal is present again.

Technical manual
CR
tSecurity CRL
t OR
CRG
200 ms 150 ms
t OR t AND
AND
LCG
Figure 488: Guard signal logic with unblocking scheme and with setting Unblock = Restart
CR
CRL
tSecurity OR
CRG t
Figure 489: Guard signal logic with unblocking scheme and with setting Unblock =
NoRestart
The unblocking function can be set in three operation modes (setting Unblock):
Off The unblocking function is out of operation

No restart Communication failure shorter than tSecurity will be ignored
If CRG disappears a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be
recurrent signalling
16.1.6.6 Intertrip scheme M13893-36 v5
In the direct intertrip scheme, the send signal CS is sent from an underreaching zone that is
tripping the line.
The received signal CR is directly transferred to a trip for tripping without local criteria. The
signal is further processed in the tripping logic.
In case of single-pole tripping in multi-phase systems, a phase selection is performed.
16.1.6.7 Simplified logic diagram M13893-40 v4
The simplified logic diagram for the complete logic is shown in figure 490.

Technical manual
Unblock =Off
CR
Unblock =
OR CRL
NoRestart AND
CRL
Unblock =
tSecurit
Restart
y
CRG 1 t AND
200 ms 150 ms LCG

AND
t OR AND t
SchemeType =
Intertrip
CSUR
tSendMi
n AND
OR
BLOCK AND
CSBLK OR
CRL
Schemetype =
Permissive UR AND CS
OR
tCoord
AND 25 ms
OR
t TRIP
CACC t
Schemetype =
Permissive OR
CSOR OR AND
AND
tSendMin
OR
AND
SchemeType =
Blocking
BLKCS
AND
Figure 490: Scheme communication logic for distance or overcurrent protection,

simplified logic diagram

M16038-1 v14
Table 564: ZCPSCH technical data

Scheme type Off -
Intertrip
Permissive UR
Permissive OR
Blocking
DeltaBlocking
Operate voltage, Delta U (0–100)% of UBase ±5.0% of ΔU
Operate current, Delta I (0–200)% of IBase ±5.0% of ΔI

Technical manual

Operate zero sequence voltage, (0–100)% of UBase ±10.0% of Δ3U0
Delta 3U0
Operate zero sequence current, (0–200)% of IBase ±10.0% of Δ3I0
Delta 3I0
Co-ordination time for blocking (0.000-60.000) s ±0.2% or ±15 ms whichever is
communication scheme greater
Minimum duration of a carrier (0.000-60.000) s ±0.2% or ±45 ms whichever is
send signal greater
Security timer for loss of guard (0.000-60.000) s ±0.2% or ±15 ms whichever is
signal detection greater
Operation mode of unblocking Off -
logic NoRestart
Restart
16.2 Phase segregated scheme communication logic for

distance protection ZC1PPSCH SEMOD141690-1 v2
SEMOD141699-2 v2

Phase segregated Scheme ZC1PPSCH - 85
communication logic for distance
protection
Communication between line ends is used to achieve fault clearance for all faults on a power
line. All possible types of communication schemes for example, permissive underreach,
permissive overreach and blocking schemes are available. To manage problems with
simultaneous faults on parallel power lines phase segregated communication is needed. This
will then replace the standard Scheme communication logic for distance or Overcurrent
protection (ZCPSCH) on important lines where three communication channels (in each
subsystem) are available for the distance protection communication.
The main purpose of the Phase segregated scheme communication logic for distance
protection (ZC1PPSCH) function is to supplement the distance protection function such that:
• fast clearance of faults is also achieved at the line end for which the faults are on the part
of the line not covered by its underreaching zone.
• correct phase selection can be maintained to support single-pole tripping for faults
occurring anywhere on the entire length of a double circuit line.
To accomplish this, three separate communication channels, that is, one per phase, each
capable of transmitting a signal in each direction is required.
ZC1PPSCH can be completed with the current reversal and WEI logic for phase segregated
communication, when found necessary in Blocking and Permissive overreaching schemes.

Technical manual
ZC1PPSCH
BLOCK TRIP
BLKTR TRL1
BLKTRL1 TRL2
BLKTRL2 TRL3
BLKTRL3 CSL1
CACCL1 CSL2
CACCL2 CSL3
CACCL3 CSMPH
CSURL1 CRLL1
CSURL2 CRLL2
CSURL3 CRLL3
CSORL1
CSORL2
CSORL3
CSBLKL1
CSBLKL2
CSBLKL3
BLKCSL1
BLKCSL2
BLKCSL3
CRL1
CRL2
CRL3
CRMPH
Figure 491: ZC1PPSCH function block
16.2.4 Signals
Table 565: ZC1PPSCH Input signals

BLKTR BOOLEAN 0 Common signal for block of trip output from communication
logic in all phases
BLKTRL1 BOOLEAN 0 Signal for block of trip output from communication logic in
Phase L1
Phase L2
Phase L3
CACCL1 BOOLEAN 0 Accelerated Distance protection zone start in Phase L1
CACCL2 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L2
CACCL3 BOOLEAN 0 Accelerated Distance protection zone signal in Phase L3
CSURL1 BOOLEAN 0 Underreaching distance protection zone signal in Phase L1
CSORL1 BOOLEAN 0 Overreaching distance protection zone signal in Phase L1
CSBLKL1 BOOLEAN 0 Reverse directed distance protection zone signal in Phase L1
BLKCSL1 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase L1

Technical manual

BLKCSL2 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase
L2
BLKCSL3 BOOLEAN 0 Block of carrier send in POR and Blocking schemes in Phase
L3
CRL1 BOOLEAN 0 Carrier signal received in Phase L1
CRMPH BOOLEAN 0 Carrier Signal received for multiphase fault
Table 566: ZC1PPSCH Output signals

TRIP BOOLEAN Common trip output in any of the phase
TRL1 BOOLEAN Trip output in Phase L1
CSL1 BOOLEAN Carrier Send in phase L1
CSMPH BOOLEAN carrier Send for multi phase fault
CRLL1 BOOLEAN Carrier signal received in Phase L1
16.2.5 Settings
Table 567: ZC1PPSCH Group settings (basic)

On
Scheme Type Off - - Permissive UR Scheme type
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.000 Trip coordinate time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of Carrier Send
signal

SEMOD141705-4 v2
Depending on whether a reverse or forward directed impedance zone is used to issue the send
signal, the communication schemes are divided into Blocking and Permissive schemes,
respectively.

Technical manual
A permissive scheme is inherently faster and has better security against false tripping than a
blocking scheme. On the other hand, a permissive scheme depends on a received signal for a
fast trip, so its dependability is lower than that of a blocking scheme.
The Phase segregated scheme communication logic for distance protection (ZC1PPSCH)
function is a logical function built-up from logical elements. It is a supplementary function to
the distance protection, requiring for its operation inputs from the distance protection and
the communication equipment.
The type of communication-aided scheme to be used can be selected by way of the settings.
The ability to select which distance protection zone is assigned to which input of ZC1PPSCH
makes this logic able to support practically any scheme communication requirements
regardless of their basic operating principle. The outputs to initiate tripping and sending of
the teleprotection signal are given in accordance with the type of communication-aided
scheme selected and the zone(s) and phase(s) of the distance protection which have operated.
When power line carrier communication channels are used for permissive schemes
communication, unblocking logic which uses the loss of guard signal as a receive criteria is
provided. This logic compensates for the lack of dependability due to the transmission of the
command signal over the faulted line.
16.2.6.1 Blocking scheme SEMOD141705-12 v2
The principle of operation for a blocking scheme is that an overreaching zone is allowed to trip
instantaneously after the settable co-ordination time tCoord has elapsed, when no signal is
received from the remote IED. The received signal (sent by a reverse looking element in the
remote IED), which shall be connected to CRLx, is used to not release the zone to be
accelerated to clear the fault instantaneously (after time tCoord). The overreaching zone to be
accelerated is connected to the input CACCLx, see figure 492. In case of external faults, the
blocking signal (CRLx) must be received before the settable timer tCoord elapses, to prevent
an unneccesary trip, see figure 492.
ZC1PPSCH can be totally blocked by activating the input BLOCK, block of trip is achieved by
activating the input BLKTRLx, Block of carrier send is done by activating the input BLKCSLx.
tCoord 25 ms
CACCLx
t t TRLx
CRLx AND
Figure 492: Basic logic for trip carrier in one phase of a blocking scheme
16.2.6.2 Permissive underreach scheme SEMOD141705-18 v1
In a permissive underreach scheme, a forward directed underreach measuring element

(normally zone1) sends a permissive signal CSLx to the remote end if a fault is detected in
forward direction. The received signal CRLx is used to allow an overreaching zone (connected
to CACCLx) to trip after the tCoord timer has elapsed. The tCoord is in permissive underreach
schemes normally set to zero. The logic for trip carrier in permissive scheme is shown in
figure 493. Three channels for communication in each direction must be available.

Technical manual
tCoord 25 ms
CACCLx t t TRLx
CRLx AND
Figure 493: Basic logic for trip carrier in one phase of a permissive underreach scheme
16.2.6.3 Permissive overreach scheme SEMOD141705-26 v1
In a permissive overreach scheme, a forward directed overreach measuring element (normally

zone2) sends a permissive signal CSLx to the remote end if a fault is detected in forward
direction. The received signal CRLx is used to allow an overreaching zone to trip after the
settable tCoord timer has elapsed. The tCoord is in permissive overreach schemes normally
set to zero. The logic for trip carrier is the same as for permissive underreach, see figure 492.
The permissive overreach scheme has the same blocking possibilities as mentioned for
blocking scheme above. The blocking inputs are activated from the current reversal logic when
this function is included.
Three channels for communication in each direction must be available.
16.2.6.4 Unblocking scheme SEMOD141705-31 v2
In an unblocking scheme, the lower dependability in permissive scheme is overcome by using

the loss of guard signal from the communication equipment to locally create a carrier receive
signal. It is common or suitable to use the function when older, less reliable, power-line carrier
(PLC) communication is used. As phase segregated communication schemes uses phases
individually and the PLC is typically connected single-phase or phase-to-phase it is not
possible to evaluate which of the phases to release and the unblocking scheme has thus not
been supported.
16.2.6.5 Intertrip scheme SEMOD141705-34 v1
In the direct intertrip scheme, the carrier send signal CS is sent from an underreaching zone
that is tripping the line.
The received signal per phase is directly transferred to the trip function block for tripping
without local criteria. The signal is not further processed in the phase segregated
communication logic. In case of single-pole tripping the phase selection and logic for tripping
the three phases is performed in the trip function block.
16.2.6.6 Simplified logic diagram SEMOD141705-38 v2
The simplified logic diagram for one phase is shown in figure 494.

Technical manual
SchemeType =
Intertrip
CSURLx
tSendMin AND
OR
BLOCK
AND
CSBLKLx OR
CRLx
Scheme Type =
Permissive UR AND CSLx
OR
tCoord
25 ms
AND t TRLx
OR t
CACCLx
Scheme Type =
Permissive OR
CSORLx OR AND
AND
tSendMin
OR
AND
Scheme Type =
Blocking
BLKCSx
AND
CSL1
CSL2 AND
CSL2
OR CSMPH
CSL3 AND
CSL3
CSL1 AND
CSL1
CSL2 GENERAL
OR
CSL3
Figure 494: Simplified logic diagram for one phase

Technical manual

SEMOD166936-2 v7
Table 568: ZC1PPSCH technical data

Scheme type Intertrip -
Permissive UR
Permissive OR
Blocking
Co-ordination time for blocking (0.000-60.000) s ±0.2% or ±15 ms whichever is
communication scheme greater
Minimum duration of a carrier (0.000-60.000) s ±0.2% or ±15 ms whichever is
send signal greater
16.3 Current reversal and Weak-end infeed logic for

distance protection 3-phase ZCRWPSCH IP15751-1 v4
M15073-1 v5

Current reversal and weak-end ZCRWPSCH - 85
infeed logic for distance protection
3-phase
The ZCRWPSCH function provides the current reversal and weak end infeed logic functions
that supplement the standard scheme communication logic. It is not suitable for standalone
use as it requires inputs from the distance protection functions and the scheme
communications function included within the terminal.
On detection of a current reversal, the current reversal logic provides an output to block the
sending of the teleprotection signal to the remote end, and to block the permissive tripping at
the local end. This blocking condition is maintained long enough to ensure that no unwanted
operation will occur as a result of the current reversal.
On verification of a weak end infeed condition, the weak end infeed logic provides an output
for sending the received teleprotection signal back to the remote sending end and other
output(s) for local tripping. For terminals equipped for single- and two-pole tripping, outputs
for the faulted phase(s) are provided. Undervoltage detectors are used to detect the faulted
phase(s).

Technical manual
ZCRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK TRWEIL1
IRV TRWEIL2
WEIBLK1 TRWEIL3
WEIBLK2 ECHO
VTSZ
CBOPEN
CRL
Figure 495: ZCRWPSCH function block
16.3.4 Signals
Table 569: ZCRWPSCH Input signals

SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure function
CBOPEN BOOLEAN 0 Block of trip from WEI logic by an open breaker
CRL BOOLEAN 0 POR Carrier receive for WEI logic
Table 570: ZCRWPSCH Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
TRWEIL1 BOOLEAN Trip signal from weak end infeed logic in phase L1
ECHO BOOLEAN Carrier send by WEI logic

Technical manual
16.3.5 Settings
Table 571: ZCRWPSCH Group settings (basic)

CurrRev Off - - Off Operating mode of Current Reversal
On Logic
tPickUpRev 0.000 - 60.000 s 0.001 0.020 Pickup time for current reversal logic
tDelayRev 0.000 - 60.000 s 0.001 0.060 Time Delay to prevent Carrier send
and local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
tPickUpWEI 0.000 - 60.000 s 0.001 0.010 Coordination time for the WEI logic
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection
of fault condition
UPN< 10 - 90 %UB 1 70 Phase to Neutral voltage for detection
of fault condition
Table 572: ZCRWPSCH Non group settings (basic)

Value groups
16.3.6.1 Current reversal logic M16679-3 v9
The current reversal logic can be enabled by setting the parameter CurrRev = On. The current
reversal logic uses a reverse zone connected to the input IRV to recognize the fault on the
parallel line in any of the phases.When the reverse zone has been activated (even if only for a
short time), it prevents sending of a communication signal and tripping through the scheme
communication logic after a settable time tPickUpRev. The prevention will last for tPickUpRev
+ 10 ms + tDelayRev after the IREV reset. This makes it possible for the receive signal to reset
before the carrier-aided trip signal is activated due to the current reversal by the forward
directed zone. The logic diagram for current reversal is shown in Figure 496.
BLOCK
IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVL
IRV AND t
t t t
CurrRev = On
Figure 496: Simplified logic diagram for current reversal

By connecting the output signal IRVL to input BLKCS in the ZCPSCH function, the sending of
the signal CS from the overreaching zone connected to CSOR in ZCPSCH will be blocked. By

Technical manual
connecting IRVL to input BLKTR in the ZCPSCH function, the TRIP output from the ZCPSCH
function will be blocked.
The function has an internal 10 ms drop-off timer which will secure that the current reversal
logic will be activated for short input signals even if the pick-up timer is set to zero.
16.3.6.2 Weak-end infeed logic M16679-8 v12
The weak-end infeed logic (WEI) function sends back (echoes) the received signal under the
condition that no fault has been detected on the weak-end by different fault detection
elements (distance protection in forward or reverse direction).
The WEI function returns the received signal, shown in Figure 497, when:
• The setting parameter WEI is set to either Echo or Echo & Trip.
• No active signal is present on the input BLOCK.
• The functional input CRL is active for a time longer than the tPickUpWei setting. This input
is usually connected to the CRL output on the scheme communication logic ZCPSCH.
• The WEI function is not blocked by the active signal connected to the WEIBLK1 functional
input or to the VTSZ functional input. The later is usually configured to the VTSZ
functional output of the fuse-failure function.
• No active signal has been present for at least 200 ms on the WEIBLK2 functional input. An
OR combination of all fault detection functions (not undervoltage) as present within the
IED is usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens.
BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND
OR t t
ECHO
200 ms AND
WEIBLK2
t
AND
OR
1500 ms
CBOPEN
t
WEI = Echo
Figure 497: Simplified logic diagram for weak-end infeed logic — Echo
When an echo function is used in both IEDs (should generally be avoided), a spurious signal can
be looped round by the echo logics. To avoid a continuous lock-up of the system, the duration
of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria, when the tripping of the
local breaker is selected, setting WEI = Echo&Trip. With this setting the Echo and Trip are
working in parallel as in logic shown in Figure 498.

Technical manual
BLOCK
VTSZ
WEIBLK1 OR
tPickUpWEI
CRL AND 50 ms 200 ms
t AND ECHO
OR t t AND
200 ms
WEIBLK2
t
AND
1500 ms
OR
CBOPEN
t
AND
U3P*
UL1<UPN<
UL2 < UPN<
UL3 < UPN<
UPN< 100 ms
OR
AND t
TRWEI
OR
15 ms
TRWEIL1
U3P*
AND t
UL1L2 <UPP< OR
UL2L3 < UPP<
UL3L1 < UPP<
15 ms
UPP< TRWEIL2
AND t
OR
15 ms
OR TRWEIL3
AND t
WEI = Echo & Trip
IEC00000551-TIFF V4 EN-US IEC00000551-TIFF.vsd
Figure 498: Simplified logic diagram for weak-end infeed logic — Echo&Trip

M16039-1 v16
Table 573: ZCRWPSCH technical data

Detection level phase-to- (10-90)% of UBase ±0.5% of Ur
neutral voltage
Detection level phase-to- (10-90)% of UBase ±0.5% of Ur
phase voltage
Operate time for current (0.000-60.000) s ±0.2% or ±15 ms whichever is
reversal logic greater
Delay time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Coordination time for weak- (0.000-60.000) s ±0.2% or ±15 ms whichever is
end infeed logic greater

Technical manual
16.4 Current reversal and weak-end infeed logic for phase

segregated communication ZC1WPSCH SEMOD155635-1 v2
SEMOD156467-2 v2

Current reversal and weak-end ZC1WPSCH - 85
infeed logic for phase segregated
communication
Current reversal and weak-end infeed logic for phase segregated communication (ZC1WPSCH)
function is used to prevent unwanted operations due to current reversal when using
permissive overreach protection schemes in application with parallel lines where the overreach
from the two ends overlaps on the parallel line.
The weak-end infeed logic is used in cases where the apparent power behind the protection
can be too low to activate the distance protection function. When activated, received carrier
signal together with local undervoltage criteria and no reverse zone operation gives an
instantaneous trip. The received signal is also echoed back to accelerate the sending end.
ZC1WPSCH
U3P* TRPWEI
BLOCK TRPWEIL1
BLKZ TRPWEIL2
CBOPEN TRPWEIL3
CRL1 IRVOP
CRL2 IRVOPL1
CRL3 IRVOPL2
IRVL1 IRVOPL3
IRVL2 ECHO
IRVL3 ECHOL1
IRVBLKL1 ECHOL2
IRVBLKL2 ECHOL3
IRVBLKL3
WEIBLK
WEIBLKL1
WEIBLKL2
WEIBLKL3
WEIBLKOP
WEIBLKO1
WEIBLKO2
WEIBLKO3
Figure 499: ZC1WPSCH function block

Technical manual
16.4.4 Signals
Table 574: ZC1WPSCH Input signals

U3P GROUP - Voltage
SIGNAL
BLKZ BOOLEAN 0 Block of trip from WEI logic by the fuse-failure function
CRL1 BOOLEAN 0 Carrier receive for WEI logic in Phase L1
IRVL1 BOOLEAN 0 Activation of current reversal logic in Phase L1
IRVL2 BOOLEAN 0 Activation of current reversal logic in Phase L2
IRVL3 BOOLEAN 0 Activation of current reversal logic in phase L3
IRVBLKL1 BOOLEAN 0 Block of current reversal function in Phase L1
WEIBLK BOOLEAN 0 Block of WEI logic
WEIBLKL1 BOOLEAN 0 Block of WEI logic in Phase L1
WEIBLKOP BOOLEAN 0 Block of WEI logic due to operation of other protection
WEIBLKO1 BOOLEAN 0 Block of WEI logic in Phase L1 due to operation of other
protection
protections
protections
Table 575: ZC1WPSCH Output signals

TRPWEI BOOLEAN Trip of WEI logic
TRPWEIL1 BOOLEAN Trip of WEI logic in Phase L1
IRVOP BOOLEAN Operation of current reversal logic
IRVOPL1 BOOLEAN Operation of current reversal logic in Phase L1
ECHO BOOLEAN Carrier Send by WEI logic
ECHOL1 BOOLEAN Carrier Send by WEI logic in Phase L1

Technical manual
16.4.5 Settings
Table 576: ZC1WPSCH Group settings (basic)

OperCurrRev Off - - Off Operating mode of Current Reversal
On Logic
and local trip
OperationWEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
UPE< 10 - 90 %UB 1 70 Phase to Earth voltage for detection
of fault condition
UPP< 10 - 90 %UB 1 70 Phase to Phase voltage for detection
of fault condition
Table 577: ZC1WPSCH Non group settings (basic)

Value groups
16.4.6.1 Current reversal logic SEMOD156478-5 v4
The current reversal logic can be enabled by setting the parameter OperCurrRev = On. The
current reversal logic uses a reverse zone connected to the input IRVLx to recognize the fault
on the parallel line in any of the phases. When the reverse zone has been activated (even if only
for a short time), it prevents sending of a communication signal and tripping through the
scheme communication logic after a settable time tPickUpRev. The prevention will last for
tPickUpRev + 10 ms + tDelayRev after the IRVLx reset. This makes it possible for the receive
signal to reset before the trip signal is activated due to the current reversal by the forward
directed zone. The logic diagram for current reversal is shown in Figure 500.
BLOCK
IRVBLKLx
tDelayRev
tPickUpRev 10 ms tPickUpRev IRVOPLx
IRVLx & t
t t t
operCurrRev=On

By connecting the IRVOPLx signal to input BLKCSLx in the ZC1PPSCH function, the sending
carrier send signal CSLx in ZC1PPSCH is blocked. By connecting the IRVOPLx signal to input
BLKTRLx in ZC1PPSCH, the TRIPLx output in ZC1PPSCH is blocked.

Technical manual
The Current reversal and weak-end infeed logic for phase segregated communication
(ZC1WPSCH) function has an internal 10 ms drop-off timer which secure that the current
reversal logic will be activated for short input signals even if the pickup timer is set to zero.
16.4.6.2 Weak-end infeed logic GUID-CBFC8E60-748A-49F6-AF73-563E7CFC0653 v4
The WEI function sends back (echoes) the received carrier signal under the condition that no
fault has been detected at the weak end by different fault detection elements (distance
protection in forward and reverse direction).
BLOCK
BLKZ
WEIBLKLx 1 ECHOLx-contd
&
tPickUpWEI
CRLx & 50 ms 200 ms
t &
1 t t
ECHOLx
200 ms &
WEIBLKOx
t
&
1
1500 ms
CBOPEN
t
OperationWEI=Echo
Figure 501: Simplified logic for weak-end infeed logic — Echo

The WEI function returns the received carrier signal, shown in Figure 501, when:
• No active signal present on the input BLOCK.

• The input CRLx is active. This input is usually connected to the CRLx output on the scheme
communication logic for distance or Overcurrent protection (ZCPSCH).
• The WEI function is not blocked by the active signal connected to the WEIBLKLx input or to
the BLKZ input. The latter is usually configured to the STGEN output of the fuse-failure
function.
• No active signal has been present for at least 200 ms on the WEIBLKOx input. An OR
combination of all fault detection functions (not undervoltage) as present within the IED
is usually used for this purpose.
• The weak-end infeed logic also echoes the received permissive signal when local breaker
opens, CBOPEN prior to faults appeared at the end of line.
When an echo function is used in both the IEDs on the protected line (should generally be
avoided), a spurious signal can be looped round by the echo logics. To avoid a continuous lock-
up of the system, the duration of the echoed signal is limited to 200 ms.
An undervoltage criteria is used as an additional tripping criteria when the tripping of the local
breaker is selected. Setting OperationWEI = Echo &Trip together with the WEI function and
ECHOLx, trip signal TRPWEIx has been issued by the echo and trip logic which is described in
Figure 502.

Technical manual
ECHOLx- contd
CBOPEN
U3P*
100 ms
=1
& t
Undervoltage TRPWEI
detection =1
UPE<
15 ms
UPP< TRPWEI1
& t
OperationWEI= Echo & Trip
15 ms
TRPWEI2
& t
15 ms
TRPWEI3
& t
Figure 502: Simplified logic diagram for weak-end infeed logic – Echo & Trip
It is strongly recommended to not connect any start signals from impedance

protection or directional overcurrent protection functions to WEIBLK and
WEIBLKOP inputs in ZC1WPSCH function to block the echo signal, if local
protection functions operate for faults at the weak end.
Start signals can be connected to WEIBLKLx and WEIBLKOx via OR gate to achieve the blocking
of echo signal in case if the faults are detected by local protection functions and thereby,
avoiding the operation from the remote end. By this, 3-pole operation can be accomplished in
addition to 1-pole and 2-pole operations by ZC1WPSCH function. Also, if a 3-pole operation
needs to be achieved by a separate protection function, current reversal and weak-end infeed
logic for distance protection 3-phase ZCRWPSCH function can be used. Figure 503 and Figure
504 shows the connection of start signals from ZMFCPDIS function to WEIBLKLx and
WEIBLKOx in ACT configuration to block echo signal.

Technical manual
852
Section 16

Figure 503: Blocking of echo signal using WEIBLKLx input of ZC1WPSCH
Project Responsible department Technical reference Document kind Doc. designation
Test123234 ABB Ltd. Graphical Application Co... AA1J1Q01A2
Replacing Created by Title Document id.
REL670
Test123234.Substation.Voltage Level.Bay Approved by Rev. Rel. date Lan
1/1
Rev. Modification Rel. date Created ... Based on 0 3/2/2018 en
Technical manual
1MRK 506 370-UEN J
Technical manual
1MRK 506 370-UEN J


Figure 504: Blocking of echo signal using WEIBLKOx input of ZC1WPSCH
Project Responsible department Technical reference Document kind Doc. designation
Test123234 ABB Ltd. Graphical Application Co... AA1J1Q01A2
Replacing Created by Title Document id.
REL670
Test123234.Substation.Voltage Level.Bay Approved by Rev. Rel. date Lan
1/1
Rev. Modification Rel. date Created ... Based on 0 3/2/2018 en
853
Section 16

SEMOD166938-2 v6
Table 578: ZC1WPSCH technical data

Detection level phase to (10-90)% of UBase ±0.5% of Ur
neutral voltage
Detection level phase to (10-90)% of UBase ±0.5% of Ur
phase voltage
Reset ratio <105% at (20-90)% of UBase -
Operate time for current (0.000-60.000) s ±0.2% or ±15 ms whichever is
reversal greater
Delay time for current reversal (0.000-60.000) s ±0.2% or ±15 ms whichever is
greater
Coordination time for weak- (0.000-60.000) s ±0.2% or ±15 ms whichever is
end infeed logic greater
16.5 Local acceleration logic ZCLCPSCH SEMOD52894-1 v4
M14860-1 v4

Local acceleration logic ZCLCPSCH - -
To achieve fast clearing of faults on the whole line, when no communication channel is
available, local acceleration logic (ZCLCPSCH) can be used. This logic enables fast fault
clearing and re-closing during certain conditions, but naturally, it can not fully replace a
communication channel.
The logic can be controlled either by the autorecloser (zone extension) or by the loss-of-load
current (loss-of-load acceleration).
ZCLCPSCH
I3P* TRZE
BLOCK TRLL
ARREADY
NDST
EXACC
BC
LLACC
Figure 505: ZCLCPSCH function block

Technical manual
16.5.4 Signals
Table 579: ZCLCPSCH Input signals

SIGNAL
ARREADY BOOLEAN 0 Autoreclosure ready, releases function used for fast trip
NDST BOOLEAN 0 Non directional criteria used to prevent instantaneous trip
EXACC BOOLEAN 0 Connected to function used for tripping at zone extension
BC BOOLEAN 0 Breaker Close
LLACC BOOLEAN 0 Connected to function used for tripping at loss of load
Table 580: ZCLCPSCH Output signals

TRZE BOOLEAN Trip by zone extension
TRLL BOOLEAN Trip by loss of load
16.5.5 Settings
Table 581: ZCLCPSCH Group settings (basic)

On
LoadCurr 1 - 100 %IB 1 10 Load current before disturbance in %
of IBase
LossOfLoad Off - - Off Enable/Disable operation of Loss of
On load.
ZoneExtension Off - - Off Enable/Disable operation of Zone
On extension
MinCurr 1 - 100 %IB 1 5 Lev taken as curr loss due to remote
CB trip in % of IBase
tLowCurr 0.000 - 60.000 s 0.001 0.200 Time delay on pick-up for MINCURR
value
tLoadOn 0.000 - 60.000 s 0.001 0.000 Time delay on pick-up for load current
release
tLoadOff 0.000 - 60.000 s 0.001 0.300 Time delay on drop off for load
current release
Table 582: ZCLCPSCH Non group settings (basic)

Value groups

Technical manual
16.5.6.1 Zone extension M13819-3 v3
When the auto-recloser controls the function, a signal auto-recloser ready (ZCLCARREADY)
allows an overreaching zone (ZCLC-EXACC) to trip instantaneously, see figure 506.
The ZCLC-ARREADY functional input should be configured to READY output of auto-reclosing

function.
The overreaching zone is connected to the input EXACC.
Figure 506: Simplified logic diagram for local acceleration logic

The function provides instantaneous trip (TRZE) if the ARREADY and EXACC inputs are set.
After that, the autorecloser initiates the close command and remains in the reclaim state and
therefore ARREADY signal will be low. This will block the TRZE output. If a non-direction start is
picked up after reclosing, the TRZE is blocked and therefore the fault clearance is as per the
step-time distance protection.
In case of a fault on the adjacent line within the overreaching zone range, an unwanted
autoreclosing cycle will occur due to the zone extension functionality.
On the other hand, if the fault is a persistent line fault on the line section and not covered by
instantaneous zone (normally zone 1), then a trip after reclosing will be with the step-time
distance function (which is time delayed) and only the first trip (before reclosing) will be
"instantaneous" .
The function will be blocked if the input BLOCK is activated (common with loss-of-load
acceleration).
16.5.6.2 Loss-of-Load acceleration M13819-9 v6
The local acceleration logic uses the loss-of-load condition to accelerate the trip for faults that
were not detected in an instantaneous zone (normally zone 1). If there is a fault in the range of
over reaching zone but still in the same line section, then the distance protection in the remote
operates in the instantaneous zone and the remote breaker opens in all three phases. Due to
this, the load current in the healthy phases will be discontinued, however, the current
continues to flow in the fault phases. Hence, this scenario is used to detect that the fault is
inside the line section and then LLACC is released for TRLL.
When the "acceleration" is controlled by a loss-of-load, the overreaching zone used for
"acceleration" connected to input LLACC is not allowed to trip "instantaneously" during normal
non-fault system conditions. When all three-phase currents have been above the set value
MinCurr for more than setting tLowCurr, an overreaching zone will be allowed to trip
"instantaneously" during a fault condition when one or two of the phase currents will become

Technical manual
low due to a three-phase trip at the opposite IED, see figure 507. The current measurement is
performed internally and the internal STILL signal becomes logical one under the described
conditions. The load current in a healthy phase is in this way used to indicate the tripping at
the opposite IED. Note that this function will not operate in case of three-phase faults,
because none of the phase currents will be low when the opposite IED is tripped.
BLOCK
BC OR
I_PHL1
a overPhase1
a>b
LoadCurr b
tLoadOn tLoadOff
a
a > b overPhase2 AND t t
b
a
a>b
b overPhase3
tLoadOn
AND TRLL
AND t
OR
a
a < b underPhase1
MinCurr b
tLowCurr
I_PHL2
a AND t
a < b underPhase2 OR
b
I_PHL3
a
a<b
b underPhase3
LLACC
Figure 507: Loss-of-load acceleration - simplified logic diagram

Breaker closing signals can if decided be connected to block the function during normal
closing.
M13819-14 v2
16.6 Scheme communication logic for residual overcurrent

protection ECPSCH IP14711-1 v2
M14882-1 v2

Scheme communication logic for ECPSCH - 85
residual overcurrent protection
To achieve fast fault clearance of earth faults on the part of the line not covered by the
instantaneous step of the residual overcurrent protection, the directional residual overcurrent
protection can be supported with a logic that uses communication channels.
In the directional scheme, information of the fault current direction must be transmitted to
the other line end. With directional comparison, a short operate time of the protection
including a channel transmission time, can be achieved. This short operate time enables rapid
autoreclosing function after the fault clearance.
The communication logic module for directional residual current protection enables blocking
as well as permissive under/overreaching, and unblocking schemes. The logic can also be

Technical manual
supported by additional logic for weak-end infeed and current reversal, included in Current
reversal and weak-end infeed logic for residual overcurrent protection (ECRWPSCH) function.
ECPSCH
BLOCK TRIP
BLKTR CS
BLKCS CRL
CSBLK LCG
CACC
CSOR
CSUR
CR
CRG
Figure 508: ECPSCH function block
16.6.4 Signals
Table 583: ECPSCH Input signals

BLKTR BOOLEAN 0 Signal for blocking trip due to communication logic
BLKCS BOOLEAN 0 Signal for blocking CS in Overreach and Blocking schemes
CSBLK BOOLEAN 0 Reverse residual overcurrent signal for Carrier Send
CACC BOOLEAN 0 Signal to be used for tripping by Communication Scheme
CSOR BOOLEAN 0 Overreaching residual overcurrent signal for Carrier Send
CSUR BOOLEAN 0 Underreaching residual overcurrent signal for Carrier Send
CR BOOLEAN 0 Carrier Receive for Communication Scheme Logic
CRG BOOLEAN 0 Carrier guard signal received
Table 584: ECPSCH Output signals

TRIP BOOLEAN Trip signal by communication scheme logic
CS BOOLEAN Carrier Send by Communication Scheme Logic
CRL BOOLEAN Carrier Receive from Communication Scheme Logic
LCG BOOLEAN loss of carrier guard signal

Technical manual
16.6.5 Settings
Table 585: ECPSCH Group settings (basic)

On
SchemeType Off - - Permissive UR Scheme type, Mode of Operation
Intertrip
Permissive UR
Permissive OR
Blocking
tCoord 0.000 - 60.000 s 0.001 0.035 Communication scheme coordination
time
tSendMin 0.000 - 60.000 s 0.001 0.100 Minimum duration of a carrier send
signal
Table 586: ECPSCH Group settings (advanced)

Unblock Off - - Off Operation mode of unblocking logic
NoRestart
Restart
tSecurity 0.000 - 60.000 s 0.001 0.035 Security timer for loss of carrier guard
detection

M13922-4 v5
The four step directional residual overcurrent protection EF4PTOC is configured to give input
information, that is directional fault detection signals, to the ECPSCH logic:
• Input signal CACC is used for tripping of the communication scheme, normally the start
signal of a forward overreaching step of STFW.
• Input signal CSBLK is used for sending block signal in the blocking communication
scheme, normally the start signal of a reverse overreaching step of STRV.
• Input signal CSUR is used for sending permissive signal in the underreaching permissive
communication scheme, normally the start signal of a forward underreaching step of
STINn, where n corresponds to the underreaching step.
• Input signal CSOR is used for sending permissive signal in the overreaching permissive
communication scheme, normally the start signal of a forward overreaching step of STINn,
where n corresponds to the overreaching step.
In addition to this a signal from the autoreclosing function should be configured to the BLKCS
input for blocking of the function at a single phase reclosing cycle.
16.6.6.1 Blocking scheme M13922-9 v5
In the blocking scheme a signal is sent to the other line end if the directional element detects
an earth fault in the reverse direction. When the forward directional element operates, it trips
after a short time delay if no blocking signal is received from the opposite line end. The time
delay, normally 30 – 40 ms, depends on the communication transmission time and a chosen
safety margin.

Technical manual
One advantage of the blocking scheme is that only one channel (carrier frequency) is needed if
the ratio of source impedances at both end is approximately equal for zero and positive
sequence source impedances, the channel can be shared with the impedance measuring
system, if that system also works in the blocking mode. The communication signal is
transmitted on a healthy line and no signal attenuation will occur due to the fault.
Blocking schemes are particular favorable for three-terminal applications if there is no zero-
sequence outfeed from the tapping. The blocking scheme is immune to current reversals
because the received signal is maintained long enough to avoid unwanted operation due to
current reversal. There is never any need for weak-end infeed logic, because the strong end
trips for an internal fault when no blocking signal is received from the weak end. The fault
clearing time is however generally longer for a blocking scheme than for a permissive scheme.
If the fault is on the line, the forward direction measuring element operates. If no blocking
signal comes from the other line end via the CR binary input (received signal) the TRIP output
is activated after the tCoord set time delay.
Figure 509: Simplified logic diagram for blocking scheme
16.6.6.2 Permissive under/overreaching scheme M13922-17 v6
In the permissive scheme the forward directed earth-fault measuring element sends a
permissive signal to the other end, if an earth fault is detected in the forward direction. The
directional element at the other line end must wait for a permissive signal before activating a
trip signal. Independent channels must be available for the communication in each direction.
An impedance measuring IED, which works in the same type of permissive mode, with one
channel in each direction, can share the channels with the communication scheme for residual
overcurrent protection. If the impedance measuring IED works in the permissive overreaching
mode, common channels can be used in single line applications. In case of double lines
connected to a common bus at both ends, use common channels only if the ratio Z1S/Z0S
(positive through zero-sequence source impedance) is about equal at both ends. If the ratio is
different, the impedance measuring and the directional earth-fault current system of the
healthy line may detect a fault in different directions, which could result in unwanted tripping.
Common channels cannot be used when the weak-end infeed function is used in the distance
or earth-fault protection.
In case of an internal earth-fault, the forward directed measuring element operates and sends
a permissive signal to the remote end via the CS output (sent signal). Local tripping is
permitted when the forward direction measuring element operates and a permissive signal is
received via the CR binary input (received signal).

Technical manual
The permissive scheme can be of either underreaching or overreaching type. In the

underreaching alternative, an underreaching directional residual overcurrent measurement
element will be used as sending criterion of the permissive input signal CSUR.
In the overreaching alternative, an overreaching directional residual overcurrent measurement

element will be used as sending criterion of the permissive input signal CSOR. Also the
underreaching input signal CSUR can initiate sending.
BLOCK
CRL
CR AND
25 ms
t TRIP
0 - 60 s
CACC AND AND t

50 ms
tCoord
t
AND
BLKCS OR CS
AND
Overreach
CSOR AND 25 ms
CSUR OR t
IEC05000280.vsd
16.6.6.3 Unblocking scheme M13922-45 v6
In unblocking scheme, the lower dependability in permissive scheme is overcome by using the
loss of guard signal from the communication equipment to locally create a receive signal. It is
common or suitable to use the function when older, less reliable, power line carrier (PLC)
communication is used.
The unblocking function uses a guard signal CRG, which must always be present, even when no
CR signal is received. The absence of the CRG signal for a time longer than the setting
tSecurity time is used as a CR signal, see figure 510. This also enables a permissive scheme to
operate when the line fault blocks the signal transmission.
The received signal created by the unblocking function is reset 150 ms after the security timer
has elapsed. When that occurs an output signal LCG is activated for signaling purpose. The
unblocking function is reset 200 ms after that the guard signal is present again.

Technical manual
CR
tSecurity CRL
t OR
CRG
200 ms 150 ms
t OR t AND
AND
LCG
Figure 510: Guard signal logic with unblocking scheme

The unblocking function can be set in three operation modes (setting Unblock):
Off: The unblocking function is out of operation

No restart: Communication failure shorter than tSecurity will be ignored
If CRG disappears, a CRL signal will be transferred to the trip logic
There will not be any information in case of communication failure (LCG)
Restart Communication failure shorter than tSecurity will be ignored
It sends a defined (150 ms) CRL after the disappearance of the CRG signal
The function will activate LCG output in case of communication failure
If the communication failure comes and goes (<200 ms) there will not be
recurrent signaling

M16049-1 v10
Table 587: ECPSCH technical data

Scheme type Permissive Underreaching -
Permissive Overreaching
Blocking
Communication scheme (0.000-60.000) s ±0.2% or ±20 ms whichever is greater
coordination time
16.7 Current reversal and weak-end infeed logic for residual

overcurrent protection ECRWPSCH IP14365-1 v4
M14883-1 v2

Current reversal and weak-end ECRWPSCH - 85
infeed logic for residual overcurrent
protection

Technical manual
M13928-3 v8
The Current reversal and weak-end infeed logic for residual overcurrent protection
(ECRWPSCH) is a supplement to Scheme communication logic for residual overcurrent
protection ECPSCH.
To achieve fast fault clearing for all earth faults on the line, the directional earth fault
protection function can be supported with logic that uses tele-protection channels.
This is why the IEDs have available additions to the scheme communication logic.
M13928-6 v2
If parallel lines are connected to common busbars at both terminals, overreaching permissive
communication schemes can trip unselectively due to fault current reversal. This unwanted
tripping affects the healthy line when a fault is cleared on the other line. This lack of security
can result in a total loss of interconnection between the two buses. To avoid this type of
disturbance, a fault current reversal logic (transient blocking logic) can be used.
M13928-8 v5
Permissive communication schemes for residual overcurrent protection can basically operate
only when the protection in the remote IED can detect the fault. The detection requires a
sufficient minimum residual fault current, out from this IED. The fault current can be too low
due to an opened breaker or high-positive and/or zero-sequence source impedance behind
this IED. To overcome these conditions, weak-end infeed (WEI) echo logic is used. The weak-
end infeed echo is limited to 200 ms to avoid channel lockup.
ECRWPSCH
U3P* IRVL
BLOCK TRWEI
IRVBLK ECHO
IRV
WEIBLK1
WEIBLK2
VTSZ
CBOPEN
CRL
Figure 511: ECRWPSCH function block
16.7.4 Signals
Table 588: ECRWPSCH Input signals

SIGNAL
IRVBLK BOOLEAN 0 Block of current reversal function
IRV BOOLEAN 0 Activation of current reversal logic
WEIBLK1 BOOLEAN 0 Block of WEI Logic
WEIBLK2 BOOLEAN 0 Block of WEI logic due to operation of other protections
VTSZ BOOLEAN 0 Block of trip from WEI logic through fuse-failure function
CRL BOOLEAN 0 POR Carrier receive for WEI logic

Technical manual
Table 589: ECRWPSCH Output signals

IRVL BOOLEAN Operation of current reversal logic
TRWEI BOOLEAN Trip signal from weak end infeed logic
ECHO BOOLEAN Permissive signal transmitted as echo signal or in case of
weak end infeed
16.7.5 Settings
Table 590: ECRWPSCH Group settings (basic)

CurrRev Off - - Off Operating mode of Current Reversal
On Logic
and local trip
WEI Off - - Off Operating mode of WEI logic
Echo
Echo & Trip
3U0> 5 - 70 %UB 1 25 Neutral voltage setting for fault
conditions measurement
Table 591: ECRWPSCH Non group settings (basic)

Value groups
16.7.6.1 Directional comparison logic function M13929-4 v6
The directional comparison function contains logic for blocking overreaching and permissive
overreaching schemes.
The circuits for the permissive overreaching scheme contain logic for current reversal and
weak-end infeed functions. These functions are not required for the blocking overreaching
scheme.
Use the independent or inverse time functions in the directional earth fault protection module
to get backup tripping in case the communication equipment malfunctions and prevents
operation of the directional comparison logic.
Connect the necessary signal from the autorecloser for blocking of the directional comparison
scheme, during a single-phase autoreclosing cycle, to the BLOCK input of the directional
comparison module.

Technical manual
16.7.6.2 Fault current reversal logic M13929-11 v8
The fault current reversal logic uses a reverse directed element, connected to the input signal
IRV, which recognizes that the fault is in reverse direction. When the reverse direction element
is activated the output signal IRVL is activated which is shown in Figure 512. The logic is now
ready to handle a current reversal without tripping. The output signal IRVL will be connected to
the block input on the permissive overreaching scheme.
When the fault current is reversed on the healthy line, IRV is deactivated and IRVBLK is
activated. The tDelayRev timer delays the reset of the output signal. The signal blocks
operation of the overreach permissive scheme for residual current and thus prevents
unwanted operation caused by fault current reversal.
BLOCK
IRVBLK
tDelayRev
tPickUpRev 10 ms tPickUpRev AND t
IRVL
IRV
t t t
CurrRev = On
16.7.6.3 Weak-end infeed logic M13929-24 v10
The weak-end infeed function can be set to send only an echo signal (WEI=Echo) or an echo
signal and a trip signal (WEI=Echo & Trip). The corresponding logic diagrams are depicted in
Figure 513 and Figure 514.
The weak-end infeed logic uses normally a reverse and a forward direction element, connected
to WEIBLK2 via an OR-gate. If neither the forward nor the reverse directional measuring
element is activated during the last 200 ms, the weak-end infeed logic echoes back the
received permissive signal as shown in Figure 513 and Figure 514. The weak-end infeed logic
also echoes the received permissive signal when CBOPEN is high (local breaker opens) prior to
faults appeared at the end of line.
If the forward or the reverse directional measuring element is activated during the last 200 ms,
the fault current is sufficient for the IED to detect the fault with the earth fault function that is
in operation.

Technical manual
CR
BLOCK AND
VTSZ
OR
tPickUpWEI
WEIBLK1
t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
CRL t
WEIBLK2
AND
1500 ms
CBOPEN OR
t
WEI = Echo
Figure 513: Simplified logic diagram for weak-end infeed logic - Echo
With the WEI= Echo & Trip setting, the logic sends an echo according to the diagram above.
Further, it activates the TRWEI signal to trip the breaker if the echo conditions are fulfilled and
the neutral point voltage is above the set operate value for 3U0>.
The voltage signal that is used to calculate the zero sequence voltage is set in the earth fault
function which is in operation.
BLOCK
VTSZ
OR
tPickUpWEI
WEIBLK1 t AND 50 ms 200 ms
AND
OR t t ECHO
200 ms AND
t
CRL
AND
WEIBLK2 1500 ms
OR
t
CBOPEN
AND
ST3U0
15 ms TRWEI
a>b AND
3U0> t
WEI = Echo&Trip
Figure 514: Simplified logic diagram for weak-end infeed logic - Echo & Trip
The weak-end infeed echo sent to the strong line end has a maximum duration of 200 ms.
When this time period has elapsed, the conditions that enable the echo signal to be sent are
set to zero for a time period of 50 ms. This avoids ringing action if the weak-end echo is
selected for both line ends.

Technical manual

M16051-2 v11
Table 592: ECRWPSCH technical data

Operate mode of WEI logic Off -
Echo
Echo & Trip
Operate voltage 3U0 for WEI (5-70)% of UBase ±0.5% of Ur
trip
Operate time for current (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
reversal logic
Delay time for current reversal (0.000-60.000) s ±0.2% or ±30 ms whichever is greater
Coordination time for weak- (0.000–60.000) s ±0.2% or ±30 ms whichever is greater
end infeed logic
16.8 Direct transfer trip logic GUID-F6AE5927-D93F-4CAD-A6C6-445720C806D8 v1
16.8.1 Introduction GUID-40B4D8B0-2B57-4E0B-BC85-CB611E8EFBFE v1
Direct transfer trip (DTT) logic is used together with Line distance protection function or other
type of line protection. One typical example for use of transfer trip is given below. When Line
distance protection function is extended to cover power lines feeding the transformer directly
and there is a fault in transformer differential area, the transformer differential protection
operates faster than line protection. A trip command is sent to the remote end of the line. On
remote end, before sending a trip command to the circuit breaker, the certainty of a fault
condition is ensured by checking local criterion in DTT logic.
CR CS TRIP
TRIP
DTT IDIFF>
Xsource VT1
~ CT1
Line
CT2 CT3
Source Power Load
Transformer
en03000120.vsd
Figure 515: Direct transfer trip

On receiving the CR signal from remote end, Direct transfer trip logic needs to check
additional local criterion, before sending the trip signal to circuit breaker.
DTT logic can be handled in the following separate application functions:
1. Low active power and power factor protection LAPPGAPC

2. Sudden change in current variation SCCVPTOC
3. Compensated over and undervoltage protection COUVGAPC
4. Carrier receive logic LCCRPTRC
5. Zero sequence overvoltage protection LCZSPTOV
6. Negative sequence overvoltage protection LCNSPTOV
7. Zero sequence overcurrent protection LCZSPTOC

Technical manual
8. Negative sequence overcurrent protection LCNSPTOC

9. Three-phase overcurrent LCP3PTOC
10. Three-phase undercurrent LCP3PTUC
A composite scheme of these functions must be configured in PCM600 configuration tool, to

make a complete DTT scheme as shown in Figure 516. The different individual local criteria
functions can also be used as direct tripping protections, normally with a time delay.
CR1
CR2
Low impedance protection
Breaker Failure Backup trip of breaker failure

protection
Three phase overcurrent
CarrierReceiveLogic
LCCRPTRC
Three phase undercurrent
U3P
CR1
CB Trip output
CR2
Zero sequence overcurrent
protection
LocalCheck
Analog input
Negative sequence overcurrent

protection OR
Zero sequence overvoltage

protection
I3P
Negative sequence overvoltage

protection
Compensated over and

undervoltage protection
Low active power and power

factor protection
Sudden change in current

variation
Figure 516: Direct transfer trip scheme
16.8.2 Low active power and power factor protection LAPPGAPC GUID-585236C8-583C-4415-9820-A1DD038EA995 v1
GUID-6F3FADD8-8974-4874-8A43-642C1D540D3E v1

Low active power and power factor LAPPGAPC - 37_55
protection

Technical manual
16.8.2.2 Functionality GUID-25A2A94F-09FE-4552-89F8-CF22632A7A0D v2
Low active power and power factor protection (LAPPGAPC) function measures power flow. It
can be used for protection and monitoring of:
• phase wise low active power

• phase wise low power factor
• phase wise reactive power and apparent power as service values
Following features are available:
• Definite time stage for low active power protection

• Definite time stage for low power factor protection
• Individual enabling of Low active power and Low power factor functions
• Low active power trip with 2 selection modes '1 out of 3' and '2 out of 3'
• Phase wise calculated values of apparent power, reactive power, active power and power
factor are available as service values
• Insensitive to small variations in voltage and current
16.8.2.3 Function block GUID-CB3033A2-D2AD-42CE-AAAE-1918A8A2861C v1
LAPPGAPC
I3P* TRLAP
U3P* TRLPF
BLOCK TRLPFL1
BLKTR TRLPFL2
TRLPFL3
STLAP
STLPF
STLAPL1
STLAPL2
STLAPL3
STLPFL1
STLPFL2
STLPFL3
Figure 517: LAPPGAPC function block
16.8.2.4 Signals
Table 593: LAPPGAPC Input signals

I3P GROUP - Three phase group signal for current
SIGNAL
U3P GROUP - Three phase group signal for voltage
SIGNAL
BLKTR BOOLEAN 0 Block all trip signals of the funtction

Technical manual
Table 594: LAPPGAPC Output signals

TRLAP BOOLEAN Trip low active power
TRLPF BOOLEAN Trip low power factor
TRLPFL1 BOOLEAN Trip low power factor phase 1
STLAP BOOLEAN Start low active power
STLPF BOOLEAN Start low power factor
STLAPL1 BOOLEAN Start low active power phase 1
STLPFL1 BOOLEAN Start low power factor phase 1
16.8.2.5 Settings
Table 595: LAPPGAPC Group settings (basic)

On
OperationLAP Off - - Off Operation low active power Off/On
On
OpMode 2 out of 3 - - 2 out of 3 Trip mode low active power 2out of 3
1 out of 3 or 1 out of 3
LAP< 2.0 - 100.0 %SB 0.1 5.0 3 Phase start value for low active
power in % of SBase
tOpLAP 0.000 - 60.000 s 0.001 0.010 Time delay to operate for low active
power
OperationLPF Off - - Off Operation low power factor Off/On
On
LPF< 0.00 - 1.00 - 0.01 0.40 Start value for low power factor
tOpLPF 0.000 - 60.000 s 0.001 0.010 Time delay to operate for low power
factor
Table 596: LAPPGAPC Group settings (advanced)

UGenZeroDb 0.0 - 100.0 %UB 0.1 30.0 Zero point Clamping in % of UBase
IGenZeroDb 0.0 - 100.0 %IB 0.1 3.0 Zero point clamping in % of IBase
Table 597: LAPPGAPC Non group settings (basic)

Value groups

Technical manual
16.8.2.6 Monitored data

Table 598: LAPPGAPC Monitored data

SL1 REAL - MVA Apparent power for phase 1
PL1 REAL - MW Active power for phase 1
QL1 REAL - MVAr Reactive power for phase 1
PFL1 REAL - - Power factor phase 1
16.8.2.7 Operation principle GUID-FF753775-9D02-4CC6-AD0C-7ED1693F6372 v2
Low active power and low power factor protection (LAPPGAPC) calculates power and power
factor from voltage and current values. Trip signal must be set independently for low active
power and low power factor condition after definite time delay.
Active power calculation
LAPPGAPC calculates single phase complex power of L1, L2 and L3 loop by following equations.
From this complex apparent power, the real and imaginary parts can be respective active and
reactive power values of respective phases. All the apparent power values given out of the
function are absolute values. The active power is the real part of the calculated apparent
power.
S L1 = U L1 × I L1
S L2 = U L2 × IL2
S L3 = U L3 × I L3
Power factor calculation
Power factor is a ratio of active power to apparent power. The function calculates power
factor from the calculated values of active power and apparent power of L1, L2 and L3 loop by
following equation:
PL1
pf L1 =
S L1

Technical manual
PL 2
pf L 2 =
SL2
PL 3
pf L 3 =
SL3
Active power trip mode
The low active power functionality has a trip mode setting. According to this setting, trip is
activated if the low active power is detected in one out of three phases or two out of three
phases respectively. These two modes are user settable through setting OpMode.
Zero clamping filtering
The function will do zero clamping to disable the calculation if the current and voltage values
of a particular phase are less than 30% of UBase for voltage and 3% of IBase for current value.
Calculation
The active power setting value used for detection of under power must be given as a three-
phase value. The design starts to calculate internally the per phase value from this setting and
detect phase wise under power condition individually. The power factor start value is common
for all the three phases.
Phase wise analog values apparent power, active power, reactive power and power factor are
available as service values.
STLAPLx
P < LAP<
I3P TRLAP
t
Calculation P and
pf
U3P
STLPFLx
pf < pf<
TRLPFLx
t
Figure 518: Logic diagram of Low active power and low power factor protection
(LAPPGAPC)

Technical manual
16.8.2.8 Technical data

GUID-B5714FAE-A87D-4C2D-A167-6CB3522CE1D5 v5
Table 599: LAPPGAPC technical data

Operate value, low active power (2.0-100.0)% of SBase ±1.0% of Sr
Reset ratio, low active power <105% -

Operate value, low power factor 0.00-1.00 ±0.02
low active power at 1.2 x Pset to 0.8 x greater
Pset

low power factor at 1.2 x PFset to 0.8 x greater
PFset
Critical impulse time, low active power 10 ms typically at 1.2 x Pset to 0.8 -
x Pset
Impulse margin time, low active power 10 ms typically -
16.8.3 Compensated over and undervoltage protection COUVGAPC GUID-41C1AD2A-3E57-40A9-9039-F159A3CE3DF8 v1
GUID-F5F76C4D-DD25-4695-9FF1-6B45C696CC5E v1

Compensated over and undervoltage COUVGAPC - 59_27
protection
16.8.3.2 Functionality GUID-229EB419-0903-46FA-9192-BBB35725C841 v2
Compensated over and undervoltage protection (COUVGAPC) function calculates the remote
end voltage of the transmission line utilizing local measured voltage, current and with the help
of transmission line parameters, that is, line resistance, reactance, capacitance and local shunt
reactor. For protection of long transmission line for in zone faults, COUVGAPCcan be
incorporated with local criteria within direct transfer trip logic to ensure tripping of the line
only under abnormal conditions.

Technical manual
16.8.3.3 Function block GUID-7A5D719C-3C29-43A8-B213-9FDABB4B05E6 v1
COUVGAPC
I3P* TRUV
U3P* TROV
BLOCK TRUVL1
BLKTR TRUVL2
SWIPOS TRUVL3
TROVL1
TROVL2
TROVL3
STUV
STOV
STUVL1
STUVL2
STUVL3
STOVL1
STOVL2
STOVL3
Figure 519: COUVGAPC function block
16.8.3.4 Signals
Table 600: COUVGAPC Input signals

I3P GROUP - Group signal for current inputs
SIGNAL
U3P GROUP - Group signal for voltage inputs
SIGNAL
BLKTR BOOLEAN 0 Blocks all operate outputs
SWIPOS BOOLEAN 1 Local shunt reactor connected or not
Table 601: COUVGAPC Output signals

TRUV BOOLEAN Common trip signal for compensated under voltage
TROV BOOLEAN Common trip signal for compensated over voltage
TRUVL1 BOOLEAN Trip signal for compensated under voltage of phase 1
TROVL1 BOOLEAN Trip signal for compensated over voltage of phase 1
STUV BOOLEAN Common start signal for compensated under voltage
STOV BOOLEAN Common start signal for compensated over voltage
STUVL1 BOOLEAN Start signal for compensated under voltage of phase 1

Technical manual

STOVL1 BOOLEAN Start signal for compensated over voltage of phase 1
16.8.3.5 Settings
Table 602: COUVGAPC Group settings (basic)

On
OperationUV Off - - On Operation compensated under
On voltage Off/On
U< 1 - 100 %UB 1 70 Compensated under voltage level in %
of UBase
tUV 0.000 - 60.000 s 0.001 1.000 Time delay to trip under voltage
OperationOV Off - - On Operation compensated over voltage
On Off/On
U> 1 - 200 %UB 1 120 Compensated over voltage level in %
of UBase
tOV 0.000 - 60.000 s 0.001 5.000 Time delay to trip over voltage
Table 603: COUVGAPC Group settings (advanced)

HystAbs 0.0 - 50.0 %UB 0.1 0.5 Hysteresis absolute for compensated
over/under voltage in % of UBase
Table 604: COUVGAPC Non group settings (basic)

Value groups
R1 0.01 - 3000.00 Ohm 0.01 5.00 Positive sequence resistance per
phase for the line in ohm
X1 0.01 - 3000.00 Ohm 0.01 40.00 Positive sequence reactance per
phase for the line in ohm
Xc 1.00 - 10000.00 Ohm 0.01 1000.00 Half of equivalent capacitive
reactance per phase in ohm
EnShuntReactor Off - - On Enable setting if shunt reactor
On connected in line
Xsh 1.00 - 10000.00 Ohm 0.01 1500.00 Per phase reactance of local Shunt
Reactor in ohm

Technical manual

Table 605: COUVGAPC Monitored data

CMPUL1 REAL - kV Compensated voltage of phase 1
16.8.3.7 Operation principle GUID-F0E1BCC7-2010-4B48-9A6F-9A2D92107AD8 v2
Compensated over and undervoltage protection (COUVGAPC) function is phase segregated

and mainly used for local criteria check in Direct transfer trip. The principle is to utilize local
measured voltage and current to calculate the voltage at the remote end of the line.
The main measured inputs to COUVGAPC are three-phase voltage and current signals.
COUVGAPCuses line resistance, reactance and line charging capacitance to calculate the
remote end voltage. It also takes the input for local shunt reactor, connected at the line side of
the line breaker, reactance value. The calculated voltage is referred to as compensated voltage.
STOV
TROV
Over voltage
U3P STOVLx
comparator
I3P TRIPOVLx
t
Compensated
SWIPOS voltage calculation STUVLx
EnShuntReactor &
TRIPUVLx
Under voltage t
TRUV
comparator
STUV
Figure 520: Logic diagram of Compensated over and undervoltage protection

(COUVGAPC)
The formula used for calculation of compensated voltage is as follows:
Uremote = Ulocal – (Ilocal – j x Ulocal/Xsr + j x Ulocal/Xcp) x Zsetting
Where:
Uremote calculated voltage at the opposite side of line
Ulocal measured local voltage
Ilocal measured local current
Xsr reactance of local line connected shunt reactor, if applicable
Xcp half of equivalent reactance of line distributed capacitor
Above calculated compensated voltage is compared to preset over and under voltage levels
set as percentage of base voltage UBase. If the calculated voltage exceeds setting in any

Technical manual
phase, COUVGAPC generates start and trip signals for that phase and common start and trip
signals. Independent enabling for overvoltage and undervoltage are available with definite
time delay. If shunt reactor is not present in the system, COUVGAPC does not include any
effect of shunt reactor while calculating the compensated voltage. This shunt reactor
calculation is enabled when both input SWIPOS is 1 and setting parameter EnShuntReactor is
On. Run time change in EnShuntReactor setting parameter restarts the IED and SWIPOS input
signal is used to enable/disable the shunt reactor calculations.
Calculations
• All resistance and reactance considered in compensated voltage calculation are primary
side values.
• Calculation of shunt reactor reactance in ohms from given MVAr rating:
2
UN
X sr =
QN
Where:
UN line to line voltage
QN is total three phase MVAr of shunt reactor

• If total line capacitance (Ctotal) is known then half line capacitive reactance:
2
X cp =
wCtotal
and if total line capacitive reactance XcTotal is known:
X cp = 2 X cTotal
Compensated voltage for all three phases is available as service values.

GUID-D9EADF1B-5FC7-4FDB-BF38-95BDBC4D7C3D v5
Table 606: COUVGAPC technical data

Operate value, undervoltage (1-100)% of UBase ±0,5% of Ur
Absolute hysteresis (0.00–50.0)% of UBase ±0.5% of Ur at U ≤ Ur

Critical impulse time, undervoltage 10 ms typically at 1.2 x Uset to 0.8 x -

Uset
Impulse margin time, undervoltage 15 ms typically -

Operate value, overvoltage (1-200)% of UBase ±0.5% of Ur at U≤Ur
± 0.5% of U at U>Ur
Critical impulse time, overvoltage 10 ms typically at 0.8 x Uset to 1.2 x -

Uset

Technical manual

Impulse margin time, overvoltage 15 ms typically -
Independent time delay for (0.000-60.000) s ±0.2% or ±40 ms whichever is
undervoltage functionality at 1.2 x greater
Uset to 0.8 x Uset
Independent time delay for (0.000-60.000) s ±0.2% or ±40 ms whichever is

overvoltage functionality at 0.8 x greater
Uset to 1.2 x Uset
16.8.4 Sudden change in current variation SCCVPTOC GUID-61E9C823-5313-4682-93CB-2BA6AC0A0640 v1
GUID-3B6E6472-8153-4D8F-874B-DF68891296C8 v1

Sudden change in current variation SCCVPTOC - 51
16.8.4.2 Functionality GUID-413851A9-5EB7-4C48-8F5D-E30E470EFFAF v2
Sudden change in current variation (SCCVPTOC) function is a fast way of finding any
abnormality in line currents. When there is a fault in the system, the current changes faster
than the voltage. SCCVPTOC finds abnormal condition based on phase-to-phase current
variation. The main application is as a local criterion to increase security when transfer trips
are used.
16.8.4.3 Function block GUID-98592177-56F1-400E-AE03-02D33C12B94E v1
SCCVPTOC
I3P* TRIP
BLOCK START
BLKTR
Figure 521: SCCVPTOC function block
16.8.4.4 Signals
Table 607: SCCVPTOC Input signals

I3P GROUP - Three phase to phase current samples group
SIGNAL
BLKTR BOOLEAN 0 Block trip signals

Technical manual
Table 608: SCCVPTOC Output signals

16.8.4.5 Settings
Table 609: SCCVPTOC Group settings (basic)

On
I> 5 - 100 %IB 1 20 Fixed threshold setting in % of IBase
tHold 0.000 - 60.000 s 0.001 0.500 Hold time for operate signals
Table 610: SCCVPTOC Group settings (advanced)

tDelay 0.000 - 0.005 s 0.001 0.002 Time delay for start and trip signals
Table 611: SCCVPTOC Non group settings (basic)

Value groups
16.8.4.6 Operation principle GUID-53346F67-4CF8-4E74-83AD-5DF32DECAA0A v2
Sudden change in current variation (SCCVPTOC) function calculates the variation in phase-to-
phase current and gives the START output when this variation crosses the sum of start level
and float threshold for a time of tDelay. The variation is calculated for all the three phase-to-
phase currents.
The variation in the current is calculated using the following equation:
Di = i ( t ) - 2 × i ( t - T ) + i ( t - 2T )
Where:
i(t) Amplitude of the current at the present instant
i(t-T) Amplitude of the current at the instant exactly one cycle time before
i(t-2T) Amplitude of the current at the instant exactly two cycle time before
Criteria:
Di > i (1.8 × DIT + I >)


Technical manual
I>: start level
It is the full-circle integral of the phase-to-phase current variation
1 2T -1
DIT = å Di ( t - n )
T n =T
T: the count of the sampling value in one cycle
If the above criteria becomes true for a time of tDelay, then respective START output is
activated provided the BLOCK input is false, and the respective TRIP outputs is activated for
the time of tHold provided the BLKTR and BLOCK input is false.

GUID-4BF21D95-4517-424E-BC23-6156EA0E253C v4
Table 612: SCCVPTOC technical data

Operate value, overcurrent (5-100)% of IBase ±2.0% of Ir
Hold time for operate signal at 0 to (0.000-60.000) s ±0.2% or ±15 ms whichever is

2 x Iset greater
16.8.5 Carrier receive logic LCCRPTRC GUID-13BF45AF-B04C-4C6D-B59D-79A51241C449 v1
GUID-D420E532-37DC-442F-B847-8F73EE8527A7 v1

Carrier receive logic LCCRPTRC - 94
16.8.5.2 Functionality GUID-79AB9B9E-9200-44D7-B4EE-57C9E7BB74A9 v2
In Direct transfer trip (DTT) scheme, the received CR signal gives the trip to the circuit breaker
after checking certain local criteria functions in order to increase the security of the overall
tripping functionality. Carrier receive logic (LCCRPTRC) function gives final trip output of the
DTT scheme.
Features:
• Carrier redundancy to ensure security in DTT scheme

• Blocking function output on CR Channel Error
• Phase wise trip outputs

Technical manual
16.8.5.3 Function block GUID-B90E2B88-8C17-4B9C-8BC0-E3194559A4D1 v1
LCCRPTRC
BLOCK TRIP
LOCTR TRL1
LOCTRL1 TRL2
LOCTRL2 TRL3
LOCTRL3
CHERR1
CHERR2
CR1
CR2
Figure 522: LCCRPTRC function block
16.8.5.4 Signals
Table 613: LCCRPTRC Input signals

LOCTR BOOLEAN 0 Local common trip signal coming from DTT
LOCTRL1 BOOLEAN 0 Local trip signal for phase 1 coming from DTT
CHERR1 BOOLEAN 0 Channel error indication flag for carrier receive 1
CHERR2 BOOLEAN 0 Channel error indication flag for carrier receive 2
CR1 BOOLEAN 0 Carrier receive 1
CR2 BOOLEAN 0 Carrier receive 2
Table 614: LCCRPTRC Output signals

TRIP BOOLEAN Common trip
TRL1 BOOLEAN Trip phase 1
16.8.5.5 Settings
Table 615: LCCRPTRC Group settings (basic)

On
ChMode 2 Out Of 2 - - 2 Out Of 2 Setting to select 1/2 or 2/2 mode
1 Out Of 2
tOperate 0.000 - 60.000 s 0.001 0.100 Time delay to operate

Technical manual
16.8.5.6 Operation principle GUID-203F41ED-D08B-41E1-AF54-DFFBECCE1F06 v2
The functionality of the Carrier receive logic (LCCRPTRC) is to release the TRIP signal for DTT
scheme based on the LOCTRL1, LOCTRL2, LOCTRL3, and LOCTR signals coming from local
criterion, and the Carrier receive signals CR1 and CR2. There are two modes of operation 1 out
of 2 and 2 out of 2. In the case of the 1 out of 2 mode if any one of the carrier signal is received
then the trip signals will be released, and in 2 out of 2 mode both the CRs should be high to
release trip signal. If any one of the channel error signals is high in 2 out of 2 mode, then logic
automatically switches to 1 out of 2 mode after a time delay of 200 ms. After switching to 1/2
mode under channel error condition and if channel error gets cleared the mode will switch
back only after a time delay of 200 ms.
If the input channel error signal is high then the respective carrier receive signal will be
blocked.
The complete function can be blocked by setting the BLOCK input high.

GUID-C99E063D-B377-40D5-8481-9F46D4166AED v3
Table 616: LCCRPTRC technical data

Operation mode 1 Out Of 2 -
2 Out Of 2
Independent time delay (0.000-60.000) s ±0.2% or ±35 ms whichever is
greater
16.8.6 Negative sequence overvoltage protection LCNSPTOV GUID-F15A69BA-58B1-4F3E-AE12-11FF71B96021 v1
GUID-C0F8D64B-FBCD-4115-9A5A-23B252CB7E45 v1

Negative sequence overvoltage LCNSPTOV - 47
protection
16.8.6.2 Functionality GUID-C5CBB6A2-780D-4008-98E3-455A404D32CB v2
Negative sequence components are present in all types of fault condition. Negative sequence
voltage and current get high values during unsymmetrical faults.
16.8.6.3 Function block GUID-F0F40881-AF96-45C4-8157-7EE6DE60C23A v1
LCNSPTOV
U3P* TRIP
BLOCK START
BLKTR
Figure 523: LCNSPTOV Function block

Technical manual
16.8.6.4 Signals
Table 617: LCNSPTOV Input signals

SIGNAL
BLOCK BOOLEAN 0 Block overall function
BLKTR BOOLEAN 0 Block trip output
Table 618: LCNSPTOV Output signals

TRIP BOOLEAN Trip signal for negative sequence over voltage
START BOOLEAN Start signal for negative sequence over voltage
16.8.6.5 Settings
Table 619: LCNSPTOV Group settings (basic)

On
U2> 1 - 200 %UB 1 10 Negative sequence over voltage start
value in % of UBase
tU2 0.000 - 120.000 s 0.001 2.000 Time delay to operate
Table 620: LCNSPTOV Non group settings (basic)

Value groups

Table 621: LCNSPTOV Monitored data

U2 REAL - kV Neagative sequence voltage value
16.8.6.7 Operation principle GUID-ADD0FC96-B81F-458D-AEA3-94C374128FB0 v2
Negative sequence over voltage protection (LCNSPTOV) is a definite time stage comparator
function. The negative sequence input voltage from the SMAI block is connected as input to
the function through a group connection U3P in PCM600. This voltage is compared against the
preset value and a start signal will be set high if the input negative sequence voltage is greater
than the preset value U2>. Trip signal will be set high after a time delay setting of tU2. There is

Technical manual
a BLOCK input which will block the complete function. BLKTR will block the trip output. The
negative sequence voltage is also available as service value output U2.

GUID-122A206E-27D2-4D15-AD5A-86B68F1ED559 v5
Table 622: LCNSPTOV technical data

Operate value, negative sequence (1-200)% of UBase ±0.5% of Ur at U≤Ur
overvoltage ±0.5% of U at U>Ur
Reset ratio, negative sequence >95% at (10–200)% of UBase -

overvoltage
Max. = 30 ms
Max. = 30 ms
Critical impulse time, negative 10 ms typically at 0 to 2 x Uset -
sequence overvoltage
Impulse margin time, negative 15 ms typically -
sequence overvoltage
Independent time delay to operate at (0.000-120.000) s ±0.2% or ±40 ms whichever is
16.8.7 Zero sequence overvoltage protection LCZSPTOV GUID-5179ADF5-7A85-4B95-972F-F55566B46709 v1
GUID-0D2A007F-167A-4534-A41B-22C107FEAC46 v1

Zero sequence overvoltage LCZSPTOV - 59N
protection
16.8.7.2 Functionality GUID-4CF3EC6A-D286-4808-929B-C9302418E4ED v2
Zero sequence components are present in all abnormal conditions involving earth. They can
reach considerably high values during earth faults.
16.8.7.3 Function block GUID-7764289A-A859-4C02-A9A1-B8F963F65138 v1
LCZSPTOV
U3P* TRIP
BLOCK START
BLKTR
Figure 524: LCZSPTOV function block

Technical manual
16.8.7.4 Signals
Table 623: LCZSPTOV Input signals

SIGNAL
BLKTR BOOLEAN 0 Block TRIP output
Table 624: LCZSPTOV Output signals

TRIP BOOLEAN TRIP signal for zero sequence over voltage protection
START BOOLEAN Start signal for zero sequence over voltage protection
16.8.7.5 Settings
Table 625: LCZSPTOV Group settings (basic)

On
3U0> 1 - 200 %UB 1 10 Zero sequence voltage start value in %
of UBase
t3U0 0.000 - 120.000 s 0.001 2.000 Time delay to operate
Table 626: LCZSPTOV Non group settings (basic)

Value groups

Table 627: LCZSPTOV Monitored data

3U0 REAL - kV Zero sequence voltage value
16.8.7.7 Operation principle GUID-901A8A6C-A68B-47CB-9C41-BB0E0BDF7EF8 v2
Zero sequence over voltage protection (LCZSPTOV) is a definite time stage comparator
function. The zero sequence input voltage from the SMAI block is connected as input to the
function through a group connection U3P in PCM600. This voltage is compared against the
preset value and a start signal will be set high if the input zero sequence voltage is greater
than the preset value 3U0>. Trip signal will be set high after a time delay setting of t3U0.

Technical manual
BLOCK input will block the complete function. BLKTR will block the trip output. The zero
sequence voltage will be available as service value output as 3U0.

GUID-7A8E7F49-F079-42A0-8685-20288FAD5982 v5
Table 628: LCZSPTOV technical data

Operate value, zero sequence (1-200)% of UBase ±0.5% of Ur at U ≤ Ur
overvoltage ±0.5% of U at U > Ur
Reset ratio, zero sequence >95% at (10–200)% of UBase -

overvoltage
Max. = 30 ms
Max. = 30 ms
Critical impulse time, zero sequence 10 ms typically at 0 to 2 x Uset -
overvoltage
Impulse margin time, zero sequence 15 ms typically -
overvoltage
Independent time delay to operate at (0.000-120.000) s ±0.2% or ±40 ms whichever is
16.8.8 Negative sequence overcurrent protection LCNSPTOC GUID-0593B07A-4F76-4F92-92E9-EB30FC836ABE v1
GUID-EDC20AC7-540D-43DE-8ABF-7A463E115950 v1

Negative sequence overcurrent LCNSPTOC - 46
protection
16.8.8.2 Functionality GUID-C4F99554-88BC-4F11-9EFE-91BCA6ED1261 v2
Negative sequence components are present in all types of fault condition. They can reach
considerably high values during abnormal operation.
16.8.8.3 Function block GUID-199CCB09-A4D0-4147-9BBD-5D1ADF85CA2F v1
LCNSPTOC
I3P* TRIP
BLOCK START
BLKTR
Figure 525: LCNSPTOC Function block

Technical manual
16.8.8.4 Signals
Table 629: LCNSPTOC Input signals

SIGNAL
BLKTR BOOLEAN 0 Block trip signal
Table 630: LCNSPTOC Output signals

TRIP BOOLEAN Trip signal negative sequence over current protection
START BOOLEAN Start signal for negative sequence over current protection
16.8.8.5 Settings
Table 631: LCNSPTOC Group settings (basic)

On
I2> 3 - 2500 %IB 1 100 Negative sequence over current start
value in % of IBase
tI2 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 632: LCNSPTOC Non group settings (basic)

Value groups

Table 633: LCNSPTOC Monitored data

I2 REAL - A Neagative sequence current value
16.8.8.7 Operation principle GUID-C7D22C1D-2441-4C7B-938B-E7B47559D3C5 v2
Negative sequence overcurrent protection (LCNSPTOC) is a definite time stage comparator

function. The negative sequence input current from the SMAI block is connected as input to
the function through a group connection I3P in PCM600. This current is compared against the
preset value and a start signal will be set high if the input negative sequence current is greater
than the preset value I2>. Trip signal will be set high after a time delay setting of tI2. BLOCK

Technical manual
input will block the complete function. BLKTR will block the trip output. The negative sequence
current is available as service value output I2.

GUID-0E964441-43DE-43B6-B454-485FBBF66B5C v5
Table 634: LCNSPTOC technical data

Operate value, negative sequence (3 - 2500)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio, negative sequence >95% at (50–2500)% of IBase -

overcurrent
Max. = 25 ms
Max. = 25 ms
Max. = 20 ms
Max. = 35 ms
Critical impulse time, negative sequence 10 ms typically at 0 to 2 x Iset -
overcurrent 2 ms typically at 0 to 10 x Iset
Impulse margin time, negative sequence 15 ms typically -

overcurrent
Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±35 ms, whichever is
greater
Transient overreach, start function <10% at τ = 100 ms -
16.8.9 Zero sequence overcurrent protection LCZSPTOC GUID-6F355F11-2863-4E05-A72C-FB4D6A1A6C0F v1
GUID-581BA9F0-7886-4E46-84B6-37E8B6962934 v1

Zero sequence overcurrent LCZSPTOC - 51N
protection
16.8.9.2 Functionality GUID-F0C38DA1-2F39-46DE-AFFE-F919E6CF4A57 v2
Zero sequence components are present in all abnormal conditions involving earth. They have a
considerably high value during earth faults.

Technical manual
16.8.9.3 Function block GUID-2EBCFED9-1980-4B9C-A27B-BFB07B279B5C v1
LCZSPTOC
I3P* TRIP
BLOCK START
BLKTR
Figure 526: LCZSPTOC Function block
16.8.9.4 Signals
Table 635: LCZSPTOC Input signals

SIGNAL
BLKTR BOOLEAN 0 Block trip output
Table 636: LCZSPTOC Output signals

TRIP BOOLEAN Trip signal for zero sequence over current protection
START BOOLEAN Start signal for zero sequence over current protection
16.8.9.5 Settings
Table 637: LCZSPTOC Group settings (basic)

On
3I0> 3 - 2500 %IB 1 100 Zero sequence over current start value
in % of IBase
t3I0 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 638: LCZSPTOC Non group settings (basic)

Value groups

Table 639: LCZSPTOC Monitored data

3I0 REAL - A Zero sequence current value

Technical manual
16.8.9.7 Operation principle GUID-AAB75539-3C71-4B32-97DA-4D1D349B25E5 v2
Zero sequence overcurrent protection (LCZSPTOC) is a definite time stage comparator

function. The zero sequence input current from the SMAI block is connected as input to the
function through a group connection I3P in PCM600. This current is compared against the
preset value and a start signal will be set high if the input zero sequence current is greater
than the preset value 3I0>. Trip signal will be set high after a time delay setting of t3I0. BLOCK
input will block the complete function. BLKTR will block the trip output. The zero sequence
current is available as service value output 3I0.

GUID-9F739808-04CA-4988-ABBC-1A444297FDB5 v5
Table 640: LCZSPTOC technical data

Operate value, zero sequence (3-2500)% of IBase ±1.0% of Ir at I≤Ir
overcurrent ±1.0% of I at I>Ir
Reset ratio, zero sequence overcurrent >95% at (50–2500)% of IBase -

Max. = 30 ms
Max. = 30 ms
Max. = 20 ms
Max. = 35 ms
Critical impulse time, zero sequence 10 ms typically at 0 to 2 x Iset -
overcurrent 2 ms typically at 0 to 10 x Iset
Impulse margin time, zero sequence 15 ms typically -

overcurrent
Independent time delay at 0 to 2 x Iset (0.000-60.000) s ±0.2% or ±35 ms whichever is
greater
16.8.10 Three phase overcurrent LCP3PTOC GUID-510F1FCE-39ED-4B44-89D0-338B085DD8C3 v1
GUID-5FBC4309-C8FB-4CDF-A4D6-84E3A89C81B7 v1

Three phase overcurrent LCP3PTOC - 51
16.8.10.2 Functionality GUID-AC4FF35E-5D86-421E-82C7-93F600E9F453 v2
Three phase overcurrent (LCP3PTOC) is designed for overcurrent conditions.
Features:

Technical manual
• Phase wise start and trip signals

• Overcurrent protection
• Phase wise RMS current is available as service values
• Single definite time stage trip function.
16.8.10.3 Function block GUID-CBFCC6B5-F239-4AE1-BDCC-0D192127579D v1
LCP3PTOC
I3P* TRIP
BLOCK TRL1
BLKTR TRL2
TRL3
START
STL1
STL2
STL3
Figure 527: LCP3PTOC Function block
16.8.10.4 Signals
Table 641: LCP3PTOC Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all binary outputs by resetting timers
BLKTR BOOLEAN 0 Block trip of the function
Table 642: LCP3PTOC Output signals


Technical manual
16.8.10.5 Settings
Table 643: LCP3PTOC Group settings (basic)

On
IOC> 5 - 2500 %IB 1 1000 Start value for 3 phase over current in
% of IBase
tOC 0.000 - 60.000 s 0.001 0.020 Time delay to operate
Table 644: LCP3PTOC Non group settings (basic)

Value groups

Table 645: LCP3PTOC Monitored data

16.8.10.7 Operation principle GUID-ED4F48A8-91AF-4123-94DA-C50E957931DC v2
Three phase overcurrent (LCP3PTOC) is used for detecting over current conditions. LCP3PTOC
starts when the current exceeds the set limit IOC>. It operates with definite time (DT)
characteristics, that is, the function operates after a predefined time tOC and resets when the
fault current disappears. The function contains a blocking functionality. It is possible to block
the function output, timer or the function itself, if desired.

GUID-C4ACE306-2A54-483D-B247-A479D48CBF5F v5
Table 646: LCP3PTOC technical data

Operate value, overcurrent (5-2500)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio, overcurrent > 95% at (50-2500)% of -

IBase
Max. = 25 ms
Max. = 35 ms

Technical manual

Critical impulse time, overcurrent 3 ms typically at 0 to 2 x Iset -
1 ms typically at 0 to 10 x Iset
Impulse margin time, overcurrent 10 ms typically -

Independent time delay to operate at 0 to (0.000-60.000) s ±0.2% or ±30 ms whichever is
2 x Iset greater
16.8.11 Three phase undercurrent LCP3PTUC GUID-E8EAE24D-4B69-43DC-BCFC-C4AC63AA66AB v1
GUID-51A4DEE2-C549-483B-9BDD-8F79AD4CFE23 v1

Three phase undercurrent LCP3PTUC - 37
16.8.11.2 Functionality GUID-E8EA5CE8-ED7A-4FA3-9DAC-83227D53387F v3
Three phase undercurrent function (LCP3PTUC) is designed for detecting loss of load
conditions.
Features:
• Phase wise start and trip signals

• Phase wise RMS current is available as service values
• Single definite time stage trip function
16.8.11.3 Function block GUID-432A180E-CBB4-4928-A898-0748C34D3527 v1
LCP3PTUC
I3P* TRIP
BLOCK TRL1
BLKTR TRL2
TRL3
START
STL1
STL2
STL3
Figure 528: LCP3PTUC Function block

Technical manual
16.8.11.4 Signals
Table 647: LCP3PTUC Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all binary outputs by resetting timers
BLKTR BOOLEAN 0 Block trip of the function
Table 648: LCP3PTUC Output signals

16.8.11.5 Settings
Table 649: LCP3PTUC Group settings (basic)

On
IUC< 1.00 - 100.00 %IB 0.01 50.00 Start value for 3 phase under current
in % of IBase
tUC 0.000 - 60.000 s 0.001 0.000 Time delay to operate
Table 650: LCP3PTUC Non group settings (basic)

Value groups

Table 651: LCP3PTUC Monitored data


Technical manual
16.8.11.7 Operation principle GUID-B13D3F9D-358E-4E6C-BD72-A44B00B27BC0 v2
Three phase undercurrent (LCP3PTUC) is used for detecting sudden load loss which is
considered as fault condition. LCP3PTUC starts when the current is less than the set limit
IUC<. It operates with definite time (DT) characteristics, that is, the function operates after a
predefined time tUC and resets when the load current restores. The function contains a
blocking functionality. It is possible to block the function output, timer or the function itself, if
desired.

GUID-CE2C6F0A-DF49-4AAF-80F0-9CDCBB08E755 v5
Table 652: LCP3PTUC technical data

Operate value, undercurrent (1.00-100.00)% of IBase ±1.0% of Ir
Reset ratio, undercurrent < 105% at (50.00-100.00)% -

of IBase
Start time at 2 x Iset to 0 Min. = 15 ms -
Max. = 30 ms
Reset time at 0 to 2 x Iset Min. = 10 ms -
Max. = 25 ms
Critical impulse time, undercurrent 10 ms typically at 2 x Iset to 0 -
Impulse margin time, undercurrent 10 ms typically -

Independent time delay to operate at 2 x (0.000-60.000) s ±0.2% or ±45 ms whichever is
Iset to 0 greater

Technical manual
896
Logic
Section 17 Logic
17.1 Tripping logic SMPPTRC IP14576-1 v4
SEMOD56226-2 v7

Tripping logic SMPPTRC 94
1 -> 0
A function block for protection tripping and general start indication is always provided as a
basic function for each circuit breaker. It provides a settable pulse prolongation time to ensure
a trip pulse of sufficient length, as well as all functionality necessary for correct co-operation
with autoreclosing functions.
The trip function block includes a settable latch function for the trip signal and circuit breaker
lockout.
The trip function can collect start and directional signals from different application functions.
The aggregated start and directional signals are mapped to the IEC 61850 logical node data
model.
SMPPTRC
BLOCK TRIP
BLKLKOUT TRL1
TRIN TRL2
TRINL1 TRL3
TRINL2 TR1P
TRINL3 TR2P
PSL1 TR3P
PSL2 CLLKOU T
PSL3 START
1PTRZ STL1
1PTREF STL2
P3PTR STL3
SETLKOUT STN
RSTLKOUT FW
STDI R REV
Figure 529: SMPPTRC function block

Technical manual
Logic
17.1.4 Signals
GUID-2918ECA6-4D98-493F-A33C-2D33DE64AE3B v1
Table 653: SMPPTRC Input signals

BLKLKOUT BOOLEAN 0 Blocks circuit breaker lockout output (CLLKOUT)
TRIN BOOLEAN 0 Trip all phases
TRINL1 BOOLEAN 0 Trip phase L1
PSL1 BOOLEAN 0 Functional input for phase selection in phase L1
1PTRZ BOOLEAN 0 Input for phase selective carrier aided trip
1PTREF BOOLEAN 0 Input for phase selective earth fault trip
P3PTR BOOLEAN 0 Prepare all tripping to be three-phase
SETLKOUT BOOLEAN 0 Input for setting the circuit breaker lockout function
RSTLKOUT BOOLEAN 0 Input for resetting the circuit breaker lockout function
STDIR INTEGER 0 General start direction input
GUID-D6B3DFE3-F7DF-4602-B57E-764DC9EB0D4A v1
Table 654: SMPPTRC Output signals

TRIP BOOLEAN General trip output signal
TR1P BOOLEAN Trip single-pole
TR2P BOOLEAN Trip two-pole
TR3P BOOLEAN Trip three-pole
CLLKOUT BOOLEAN Circuit breaker lockout output (set until reset)
STN BOOLEAN Start signal from neutral
FW BOOLEAN General forward signal
REV BOOLEAN General reverse signal

Technical manual
Logic
17.1.5 Settings
GUID-6D6424B9-B676-4D9B-949A-33C74BDC5711 v1
Table 655: SMPPTRC Group settings (basic)

On
Program 3 phase - - 1ph/3ph Three ph; single or three ph; single,
1ph/3ph two or three ph trip
1ph/2ph/3ph
tTripMin 0.000 - 60.000 s 0.001 0.150 Minimum duration of trip output
signal
tWaitForPHS 0.020 - 0.500 s 0.001 0.050 Secure 3-pole trip when phase
selection failed
Table 656: SMPPTRC Group settings (advanced)

TripLockout Off - - Off Latch TRIP output when SETLKOUT
On input is activated
AutoLock Off - - Off Activate CLLKOUT output when TRIP
On output is activated
tEvolvingFault 0.000 - 60.000 s 0.001 2.000 Secure 3-pole tripping at evolving
faults
The duration of the trip output signal is settable (tTripMin). The pulse length should be long
enough to secure the opening of the circuit breaker.
There is a single input (TRIN) through which all trip output signals from the protection
functions within the IED or from external protection functions via one or more of the IEDs'
binary inputs are routed. It has a single three-phase trip output (TRIP) to connect to one or
more of the IEDs' binary outputs, as well as to other functions within the IED requiring this
signal.

Technical manual
Logic
Simplified logic where setting

Program = 3 phase
BLKLKOUT
Final Tripping Circuits

3 phase BLKLKOUT TRIP
TRIP
BLOCK TRL1
BLOCK TRIPALL TRIPALL TRL1
TRIN TRL2
TRIN TRIPL1 TRL2
TRINL1 TRL3
TRINL1 TRIPL2 TRL3
TRINL2
TRINL2 TRIPL3 TR1P
TRINL3
TRINL3 SETLKOUT TR2P
1PTRZ TR3P
1PTRZ RSTLKOUT TR3P
1PTREF CLLKOUT
1PTREF CLLKOUT
SETLKOUT
RSTLKOUT

Program = 1ph/3ph
BLKLKOUT
BLOCK
TRIP
BLKLKOUT TRIP
1ph/3ph TRL1
TRIPALL TRL1
Phase Segregated TRL2
BLOCK TRIPL1 TRIPL1 TRL2
TRIN TRL3
TRIN L1TRIP L1TRIP TRIPL2 TRIPL2 TRL3
TRINL1 TR1P
TRINL1 L2TRIP L2TRIP TRIPL3 TRIPL3 TR1P
TRINL2
TRINL2 L3TRIP L3TRIP SETLKOUT TR2P
TRINL3 TR3P
TRINL3 P3PTR RSTLKOUT TR3P
PSL1 CLLKOUT
PSL1 CLLKOUT
PSL2
PSL2
PSL3
PSL3
1PTRZ
1PTRZ
1PTREF
1PTREF
P3PTR
SETLKOUT
RSTLKOUT

Program = 1ph/2ph/3ph
BLKLKOUT
BLOCK
TRIP
BLKLKOUT TRIP
1ph/2ph/3ph TRL1
TRIPALL TRL1
Phase Segregated BLOCK TRIPL1 TRL2
TRIPL1 TRL2
TRIN TRL3
TRIN L1TRIP L1TRIP TRIPL2 TRIPL2 TRL3
TRINL1 TR1P
TRINL1 L2TRIP L2TRIP TRIPL3 TRIPL3 TR1P
TRINL2 TR2P
TRINL2 L3TRIP L3TRIP SETLKOUT TR2P
TRINL3 P3PTR TR3P
TRINL3 RSTLKOUT TR3P
PSL1 CLLKOUT
PSL1 CLLKOUT
PSL2
PSL2
PSL3
PSL3
1PTRZ
1PTRZ
1PTREF
1PTREF
P3PTR
SETLKOUT
RSTLKOUT
IEC10000266=2=en=Original.vsdx
Figure 530: Simplified logic diagrams with different program modes

SMPPTRC function has separate inputs (TRINL1, TRINL2, TRINL3) which are used for single-
phase and two-phase tripping from the functions which offer phase segregated trip outputs.
The inputs 1PTRZ and 1PTREF enable single- phase and two-phase tripping for those functions
which do not have their own phase selection capability (i.e. which have just a single trip
output). An example of such a protection function is the residual overcurrent protection. The
SMPPTRC function has two inputs for these functions, one for impedance tripping (1PTRZ
used for carrier-aided tripping commands from the scheme communication logic), and one for
earth fault tripping (1PTREF used for tripping from a residual overcurrent protection). External
phase selection for these two trip signals shall be provided via inputs PSL1, PSL2 and PSL3.

Technical manual
Logic
A timer tWaitForPHS, secures a three-phase trip command for these two trip signals in the
absence of the external phase selection signals.
The SMPPTRC function has three trip outputs TRL1, TRL2, TRL3 (besides the three-phase trip
output TRIP), one per phase, to connect to one or more of the IEDs’ binary outputs, as well as
to other functions within the IED requiring these signals. These three output signals shall be
used as trip signals for individual circuit breaker poles. These signals are important for
cooperation with the autorecloser SMBRREC function.
The SMPPTRC function is equipped with logic which secures correct operation for evolving
faults as well as for reclosing on to persistent faults. A binary input P3PTR is provided which
will force all tripping to be three-phase. This input is required in order to cooperate with the
SMBRREC function.
In multi-breaker arrangements, one SMPPTRC function block is used for each circuit breaker.
The lockout function

A tripped circuit breaker can be locked out and prevented from closing by the output close
lockout (CLLKOUT). The reset lockout (RSTLKOUT) is the input for deactivating and resetting
the output close lockout CLLKOUT.
CLLKOUT can be set by an external trip signal from another protection function via the input
SETLKOUT or internally via a three-phase trip with the setting AutoLock = On. If CLLKOUT is
set by an external trip signal from another protection function and setting TripLockout = On,
all trip outputs are set true.
The BLKLKOUT input blocks the circuit breaker lockout output CLLKOUT.
Directional data
Merged directional data from application functions can be provided to the trip function
(SMPPTRC) via the start matrix function (SMAGAPC) connected to the STDIR input.
The directional input signal STDIR is a coded integer signal which may contain up to 14
individual Boolean signals; see Figure 535:
STDIRX=[b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, b10, b11, b12, b13, b14]
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (start L1)
b4= FWL1 (forward L1)
b5= REVL1 (reverse L1)
b6= STL2 (start L2)
b9= STL3 (start L3)
b12= STN (start N)
b13= FWN (forward N)
b14= REVN (reverse N)

Technical manual
Logic
The indications for general start START and phase-wise starts STL1, STL2 and STL3, and
neutral STN and general directional forward FW and reverse REV are all available as outputs on
the trip function.
All start and directional outputs are mapped to the IEC 61850 logical node data model of the
trip function. The time stamping is updated each time an operate or start signal is changed:
• The common DIR output (general) is mapped as:
dirGeneral
0 unknown
1 forward
2 backward (reverse)
3 both
• The phase wise directional outputs (DIRL1, DIRL2, DIRL3 and DIRN) are mapped as:
dirPhsA, dirPhsB, dirPhsC, dirNeut

0 unknown
1 forward
2 backward (reverse)
tTripMin
BLOCK TRIPALL
OR
AND t
TRINL1
TRINL2
TRINL3
TRIN OR
1PTREF
1PTRZ
IEC05000517=4=en=Original..vsdx
Figure 531: Three-phase front logic — simplified logic diagram

Technical manual
Logic
TRIN
TRINL1
L1TRIP
OR
PSL1
AND
TRINL2
L2TRIP
OR
PSL2
AND
TRINL3
L3TRIP
OR
PSL3
AND
-LOOP
OR OR
OR
AND
AND
OR
tWaitForPHS
-LOOP t
OR
1PTREF AND
AND
1PTRZ OR
Figure 532: Phase segregated front logic
tTripMin
BLOCK
OR TRIPL1
L1TRIP AND t OR
tEvolvingFault
t TRIP
AND
L2TRIP
L3TRIP
OR
P3PTR
Figure 533: Simplified additional logic per phase, Program = 1ph/3ph or 1ph/2ph/3ph

Technical manual
Logic
BLKLKOUT
TRIPL1
TRL1
OR
TRIPL2
TRL2
OR
TRIPL3
TRL3
OR
TRIP
TRIPALL OR
OR
-LOOP
OR
AND
TR3P
AND
10 ms To ensure that the

AND fault is single phase TR1P
t
OR 5 ms To ensure that the

fault is two phase TR2P
t
AND
AND
AND OR
OR
-LOOP
AND
-LOOP
AND
AutoLock
CLKLKOUT
OR AND
SETLKOUT OR AND
3ms
RSTLKOUT t
AND
TripLockout
-LOOP
Figure 534: Final tripping circuits
Directional logic
IntToBits
STDIR START START
in b0
FW STL1
b1
REV STL2
b2
STL1 STL3
b3
FWL1 STN
b4
REVL1
b5
STL2
b6
FWL2 FW
b7
REVL2 BitsToInt
b8 dirGeneral (61850 Standard)
STL3
b9 0 = unknown
FWL3 b0 out
b10 DIR 1 = forward
REVL3 b1 2 = backward (reverse)
b11
STN 3 = both
b12
FWN REV
b13
REVN
b14
b15
BitsToInt dirPhsA (61850 Standard)

0 = unknown
AND b0 out DIRL1
b0 = START 1 = forward
b1 2 = backward (reverse)
b1 = FW
b2 = REV
b3 = STL1 XOR
b4 = FWL1
b5 = REVL1
b6 = STL2 AND
b7 = FWL2
b8 = REVL2
b9 = STL3 BitsToInt dirPhsB (61850 Standard)
b10 = FWL3
0 = unknown
b11 = REVL3 AND b0 out DIRL2
1 = forward
b12 = STN b1 2 = backward (reverse)
b13 = FWN
b14 = REVN
b15 = N/A XOR
AND
BitsToInt dirPhsC (61850 Standard)

0 = unknown
AND b0 out DIRL3
1 = forward
XOR
AND
BitsToInt dirNeut (61850 Standard)

0 = unknown
AND b0 out DIRN
1 = forward
XOR
AND
Figure 535: The directional logic

Technical manual
Logic

M12380-1 v14
Table 657: SMPPTRC technical data

Trip action 3-ph, 1/3-ph, 1/2/3-ph -
Minimum trip pulse length (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
3-pole trip delay (0.020-0.500) s ±0.2% or ±15 ms whichever is greater
Evolving fault delay (0.000-60.000) s ±0.2% or ±15 ms whichever is greater
17.2 General start matrix block SMAGAPC
17.2.1 Identification GUID-C6D3DE50-03D2-4F27-82FF-623E81D019F4 v1
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2

Generat start matrix block SMAGAPC - -
17.2.2 Functionality GUID-BA516165-96DE-4CD9-979B-29457C7653C0 v3
The Start Matrix (SMAGAPC) merges start and directional output signals from different
application functions and creates a common start and directional output signal (STDIR) to be
connected to the Trip function, see Figure 536.
The purpose of this functionality is to provide general start and directional information for the
IEC 61850 trip logic data model SMPPTRC.
17.2.3 Function block GUID-99B1DF71-F7C4-4954-8688-BC709C3C2A16 v1
SMAGAPC
BLOCK STDIR
STDIR1
STDIR2
STDIR3
STDIR4
STDIR5
STDIR6
STDIR7
STDIR8
STDIR9
STDIR10
STDIR11
STDIR12
STDIR13
STDIR14
STDIR15
STDIR16
Figure 536: SMAGAPC function block

Technical manual
Logic
17.2.4 Signals
Table 658: SMAGAPC Input signals

STDIR1 INTEGER 0 Start direction input 1
Table 659: SMAGAPC Output signals

STDIR INTEGER Common start direction output
17.2.5 Settings
Table 660: SMAGAPC Group settings (basic)

On
17.2.6 Operation principle GUID-02403756-5715-4D6B-9308-540D72979BD0 v3
Start matrix
The Start Matrix function requires that a protection function delivers the directional output
signals in a fixed order to Start Matrix.
A directional input signal STDIRX of the Start Matrix is of type word. Each input contains 14
individual Boolean signals, which are positioned as, see Figure 538.

Technical manual
Logic
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b4= FWL1 (forwardL1)
b5= REVL1 (reverseL1)
b6= STL2 (startL2)
b9= STL3 (startL3)
b12= STN (startN)
b13= FWN (forwardN)
b14= REVN (reverseN)
The StartMatrix function contains two function: the START criteria and the DIRECTION criteria,
see Figure 537.
The START criteria is to ensure that a forward and reverse signal shall come together with a
start signal to pass through the block. This is done individually for each protection function
connected to the StartMatrix via the STDIRX inputs, see Figure 538.
All STDIROUT signals are then connected via an OR gate, see Figure 537.
The DIRECTION criteria allow either forward or reverse (phase-wise forward FWLx or forward
neutral FWN or phase-wise reverse REVLx or reverse neutral REVN) to pass through to the
general STDIR output. If both forward and reverse are active phase-wise (e.g. REVLx=FWLx =
True) or at neutral (e.g. FWN = REVN = True) at the same time, none will be shown, see Figure
539.

Technical manual
Logic
SMAGAPC
(StartMatrix)
START Criteria
STDIR1
STDIRX STDIROUT
START Criteria
STDIR2
STDIRX STDIROUT
START Criteria
STDIR3
STDIRX STDIROUT
DIRECTION Criteria
STDIR
≥1 STDIRIN STDIR
START Criteria
STDIR4
STDIRX STDIROUT
START Criteria
STDIR5
STDIRX STDIROUT
START Criteria
STDIR6
STDIRX STDIROUT
START Criteria
STDIR7
STDIRX STDIROUT
START Criteria
STDIR8
STDIRX STDIROUT
START Criteria
STDIR9
STDIRX STDIROUT
START Criteria
STDIR10
STDIRX STDIROUT
START Criteria
STDIR11
STDIRX STDIROUT
START Criteria
STDIR12
STDIRX STDIROUT
START Criteria
STDIR13
STDIRX STDIROUT
START Criteria
STDIR14
STDIRX STDIROUT
START Criteria
STDIR15
STDIRX STDIROUT
START Criteria
STDIR16
STDIRX STDIROUT
Figure 537: The StartMatrix function

Technical manual
Logic
START Criteria
START (in)
STL1 (in)
STL2 (in) ≥1 START (out)
STL3 (in)
IntToBits STN (in) BitsToint
STDIRX STDIROUT
in b0 START (in) STL1 (out) START (out) b0 out
b1 FW (in) STL2 (out) FW (out) b1
b2 REV (in) STL3 (out) REV (out) b2
b3 STL1 (in) STN (out) STL1 (out) b3
b4 FWL1 (in) FWL1 (out) b4
b5 REVL1 (in) REVL1 (out) b5
&
b6 STL2 (in) FW (in) STL2 (out) b6
≥1 FW (out)
b9 STL3 (in) STL3 (out) b9
b11 REVL3 (in) & REVL3 (out) b11
REV (in)
b12 STN (in) STN (out) b12
b13 FWN (in) ≥1 REV (out) FWN (out) b13
b14 REVN (in) REVN (out) b14
b15 N/A FALSE b15
& FWL1 (out)

FWL1 (in)
& REVL1 (out)

REVL1 (in)
& FWL2 (out)

FWL2 (in)
& REVL2 (out)

REVL2 (in)
& FWL3 (out)

FWL3 (in)
& REVL3 (out)

REVL3 (in)
& FWN (out)

FWN (in)
& REVN (out)

REVN (in)
Figure 538: The START Criteria function
DIRECTION Criteria
START (in) START (out)

IntToBits STL1 (in) STL1 (out) BitsToint
STDIRIN STL2 (in) STL2 (out) STDIR
in b0 START (in) START (out) b0 out
STL3 (in) STL3 (out)
b1 FW (in) FW (out) b1
STN (in) STN (out)
b2 REV (in) REV (out) b2
FW (in)
≥1 FW (out)
REV (in)
≥1 REV (out)
b12 STN (in) STN (out) b12
b13 FWN (in) FWN (out) b13
b14 REVN (in) REVN (out) b14
b15 N/A FALSE b15
& FWL1 (out)
FWL1 (in)
=1
REVL1 (in)
& REVL1 (out)
& FWL2 (out)
FWL2 (in)
=1
REVL2 (in)
& REVL2 (out)
& FWL3 (out)
FWL3 (in)
=1
REVL3 (in)
& REVL3 (out)
& FWN (out)
FWN (in)
=1
REVN (in)
& REVN (out)
Figure 539: The DIRECTION Criteria function
STARTCOMB
To make it possible to provide the directional information from a protection function, a
STARTCOMB block is used in between the application function and the Start Matrix function.
The STARTCOMB function has one block input and 14 Boolean inputs that convert the 14
Boolean inputs into a WORD output STDIR, see Figure 540.

Technical manual
Logic
b0= START (start)
b1= FW (forward)
b2= REV (reverse)
b3= STL1 (startL1)
b6= STL2 (startL2)
b9= STL3 (startL3)
b12= STN (startN)
b13= FWN (forwardN)
b14= REVN (reverseN)
STARTCOMB
BLOCK STDI R
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
FWL3
REVL3
STN
FWN
REVN
Figure 540: STARTCOMB
Protection functions
Some protection functions are provided with start and directional outputs, for example:
• Protection 1: General START, FW and REV

• Protection 2: Phase-wise STLx, FWLx and REVLx (where x = 1, 2 and 3)
• Protection 3: STN, FWN and REVN
• Protection 4: STDIR
Connection example
In Figure 541 below is an example how to connect start and directional signals from protection
functions via STARTCOMB and SMAGAPC to SMPPTRC.

Technical manual
Logic
SMAGAPC
STARTCOMB BLOCK STDIR
PROTECTION 1 BLOCK STDIR STDIR1
START START STDIR2
FW FW STDIR3
REV REV STDIR4
STL1 STDIR5
FWL1 STDIR6 SMPPTRC
REVL1 STDIR7 BLOCK TRIP
STL2 STDIR8 BLKLKOUT TRL1
FWL2 STDIR9 TRIN TRL2
REVL2 STDIR10 TRINL1 TRL3
STL3 STDIR11 TRINL2 TR1P
FWL3 STDIR12 TRINL3 TR2P
REVL3 STDIR13 PSL1 TR3P
STN STDIR14 PSL2 CLLKOUT
FWN STDIR15 PSL3 START
REVN STDIR16 1PTRZ STL1
1PTREF STL2
P3PTR STL3
STARTCOMB SETLKOUT STN
BLOCK STDIR RSTLKOUT FW
START STDIR REV
FW
PROTECTION 2 REV
STL1 STL1
FWL1 FWL1
REVL1 REVL1
STL2 STL2
FWL2 FWL2
REVL2 REVL2
STL3 STL3
FWL3 FWL3
REVL3 REVL3
STN
FWN
REVN
STARTCOMB
BLOCK STDIR
START
FW
REV
STL1
FWL1
REVL1
STL2
FWL2
REVL2
STL3
PROTECTION 4
FWL3
-
PROTECTION 3 REVL3
STDIR
STN STN
-
FWN FWN
-
REVN REVN
Figure 541: Connection example of protection functions using STARTCOMB, SMAGAPC to

SMPPTRC
17.3 Trip matrix logic TMAGAPC IP15121-1 v4
SEMOD167882-2 v3

Trip matrix logic TMAGAPC - -

Technical manual
Logic
The trip matrix logic (TMAGAPC) function is used to route trip signals and other logical output
signals to different output contacts on the IED.
The trip matrix logic function has 3 output signals and these outputs can be connected to
physical tripping outputs according to the specific application needs for settable pulse or
steady output.
TMAGAPC
BLOCK OUTPUT1
BLK1 OUTPUT2
BLK2 OUTPUT3
BLK3
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
INPUT17
INPUT18
INPUT19
INPUT20
INPUT21
INPUT22
INPUT23
INPUT24
INPUT25
INPUT26
INPUT27
INPUT28
INPUT29
INPUT30
INPUT31
INPUT32
Figure 542: TMAGAPC function block
17.3.4 Signals
Table 661: TMAGAPC Input signals

BLK1 BOOLEAN 0 Block of output 1
INPUT1 BOOLEAN 0 Binary input 1

Technical manual
Logic

Table 662: TMAGAPC Output signals

OUTPUT1 BOOLEAN OR function betweeen inputs 1 to 16
OUTPUT2 BOOLEAN OR function between inputs 17 to 32
OUTPUT3 BOOLEAN OR function between inputs 1 to 32

Technical manual
Logic
17.3.5 Settings
Table 663: TMAGAPC Group settings (basic)

On
PulseTime 0.050 - 60.000 s 0.001 0.150 Output pulse time
OnDelay 0.000 - 60.000 s 0.001 0.000 Output on delay time
OffDelay 0.000 - 60.000 s 0.001 0.000 Output off delay time
ModeOutput1 Steady - - Steady Mode for output ,1 steady or pulsed
Pulsed
ModeOutput2 Steady - - Steady Mode for output 2, steady or pulsed
Pulsed
ModeOutput3 Steady - - Steady Mode for output 3, steady or pulsed
Pulsed
The trip matrix logic (TMAGAPC) block is provided with 32 input signals and 3 output signals.
The function block incorporates internal logic OR gates in order to provide grouping of
connected input signals to the three output signals from the function block.
Internal built-in OR logic is made in accordance with the following three rules:
1. when any one of first 16 inputs signals (INPUT1 to INPUT16) has logical value 1 the first
output signal (OUTPUT1) will get logical value 1.
2. when any one of second 16 inputs signals (INPUT17 to INPUT32) has logical value 1 the
second output signal (OUTPUT2) will get logical value 1.
3. when any one of all 32 input signals (INPUT1 to INPUT32) has logical value 1 the third
output signal (OUTPUT3) will get logical value 1.
By use of the settings ModeOutput1, ModeOutput2, ModeOutput3, PulseTime, OnDelay and

OffDelay the behavior of each output can be customized. The OnDelay is always active and will
delay the input to output transition by the set time. The ModeOutput for respective output
decides whether the output shall be steady with an drop-off delay as set by OffDelay or if it
shall give a pulse with duration set by PulseTime. Note that for pulsed operation and that the
inputs are connected in an OR-function, a new pulse will only be given on the output if all
related inputs are reset and then one is activated again. For steady operation the OffDelay will
start when all related inputs have reset. Detailed logical diagram is shown in figure 543

Technical manual
Logic
PulseTime
t
&
ModeOutput1=Pulsed
INPUT 1
OUTPUT 1
Ondelay Offdelay
&
³1
³1 t t
INPUT 16
PulseTime
t
&
ModeOutput2=Pulsed
INPUT 17
OUTPUT 2
Ondelay Offdelay
&
³1
³1 t t
INPUT 32
PulseTime
t
&
ModeOutput3=Pulsed
OUTPUT 3
Ondelay Offdelay
&
³1
³1 t t
Figure 543: Trip matrix internal logic

Output signals from TMAGAPC are typically connected to other logic blocks or directly to
output contacts in the IED. When used for direct tripping of the circuit breaker(s) the pulse
time shall be set to at least 0.150 seconds in order to obtain satisfactory minimum duration of
the trip pulse to the circuit breaker trip coils.

GUID-3AB1EE95-51BF-4CC4-99BD-F4ECDAACB75A v3
Table 664: Number of TMAGAPC instances

Function Quantity with cycle time
3 ms 8 ms 100 ms
TMAGAPC 6 6 -
17.4 Logic for group alarm ALMCALH GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1
17.4.1 Identification GUID-64EA392C-950F-486C-8D96-6E7736B592BF v1

Logic for group alarm ALMCALH - -
17.4.2 Functionality GUID-16E60E27-F7A8-416D-8648-8174AAC49BB5 v4
The group alarm logic function (ALMCALH) is used to route several alarm signals to a common
indication, LED and/or contact, in the IED.

Technical manual
Logic
17.4.3 Function block GUID-EA192656-71DD-4D44-A1D5-96B1B4937971 v1
ALMCALH
BLOCK ALARM
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
17.4.4 Signals
Table 665: ALMCALH Input signals

Table 666: ALMCALH Output signals

ALARM BOOLEAN OR function betweeen inputs 1 to 16

Technical manual
Logic
17.4.5 Settings
Table 667: ALMCALH Group settings (basic)

On
17.4.6 Operation principle GUID-0405BB7B-7EF7-4546-92CD-F703AA0DD9F4 v2
The logic for group alarm ALMCALH block is provided with 16 input signals and one ALARM
output signal. The function block incorporates internal logic OR gate in order to provide
grouping of connected input signals to the output ALARM signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the ALARM output
signal will get logical value 1.
The function has a drop-off delay of 200 ms when all inputs are reset to provide a steady
signal.
Input 1
200 ms
ALARM
³1 t
Input 16
Figure 544: Group alarm logic

GUID-A05AF26F-DC98-4E62-B96B-E75D19F20767 v2
Table 668: Number of ALMCALH instances

3 ms 8 ms 100 ms
ALMCALH - - 5
17.5 Logic for group warning WRNCALH
17.5.1 Identification GUID-3EBD3D5B-F506-4557-88D7-DFC0BD21C690 v4

Logic for group warning WRNCALH - -
17.5.2 Functionality GUID-F7D9A012-3AD4-4D86-BE97-DF2A99BE5383 v4
The group warning logic function (WRNCALH) is used to route several warning signals to a
common indication, LED and/or contact, in the IED.

Technical manual
Logic
17.5.3 Function block GUID-C909E4FB-3F7A-47F7-8988-36B159E2C7B2 v1
WRNCALH
BLOCK WARNING
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
17.5.4 Signals
Table 669: WRNCALH Input signals

Table 670: WRNCALH Output signals

WARNING BOOLEAN OR function betweeen inputs 1 to 16

Technical manual
Logic
17.5.5 Settings
Table 671: WRNCALH Group settings (basic)

On
17.5.6 Operation principle GUID-71C65C20-7B6C-499F-BFCD-E418AA55F7EC v2
The logic for group warning WRNCALH block is provided with 16 input signals and 1 WARNING
grouping of connected input signals to the output WARNING signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the WARNING output
signal will get logical value 1.
signal.
INPUT1
200 ms
WARNING
³1 t
INPUT16

GUID-70B7357D-F467-4CF5-9F73-641A82D334F5 v2
Table 672: Number of WRNCALH instances

3 ms 8 ms 100 ms
WRNCALH - - 5
17.6 Logic for group indication INDCALH
17.6.1 Identification GUID-3B5D4371-420D-4249-B6A4-5A168920D635 v4

Logic for group indication INDCALH - -
17.6.2 Functionality GUID-D8D1A4EE-A87F-46C6-8529-277FC1ADA9B0 v4
The group indication logic function (INDCALH) is used to route several indication signals to a
common indication, LED and/or contact, in the IED.

Technical manual
Logic
17.6.3 Function block GUID-9D89E183-449A-4016-AB83-E57C8DDBA843 v1
INDCALH
BLOCK IND
INPUT1
INPUT2
INPUT3
INPUT4
INPUT5
INPUT6
INPUT7
INPUT8
INPUT9
INPUT10
INPUT11
INPUT12
INPUT13
INPUT14
INPUT15
INPUT16
17.6.4 Signals
Table 673: INDCALH Input signals

Table 674: INDCALH Output signals

IND BOOLEAN OR function betweeen inputs 1 to 16

Technical manual
Logic
17.6.5 Settings
Table 675: INDCALH Group settings (basic)

On
17.6.6 Operation principle GUID-72B1B4E8-BC6C-4AF7-8B41-058241B944F8 v2
The logic for group indication INDCALH block is provided with 16 input signals and 1 IND
grouping of connected input signals to the output IND signal from the function block.
When any one of 16 input signals (INPUT1 to INPUT16) has logical value 1, the IND output signal
will get logical value 1.
signal.
INPUT1
200 ms
IND
³1 t
INPUT16

GUID-EAA43288-01A5-49CF-BF5B-9ABF6DC27D85 v2
Table 676: Number of INDCALH instances

3 ms 8 ms 100 ms
INDCALH - 5 -
17.7 Basic configurable logic blocks M11396-4 v18
The basic configurable logic blocks do not propagate the time stamp and quality of signals
(have no suffix QT at the end of their function name). A number of logic blocks and timers are
always available as basic for the user to adapt the configuration to the specific application
needs. The list below shows a summary of the function blocks and their features.
These logic blocks are also available as part of an extension logic package.
• AND function block. The AND function is used to form general combinatory expressions
with boolean variables. The AND function block has up to four inputs and two outputs.
One of the outputs is inverted.
• GATE function block is used for whether or not a signal should be able to pass from the
input to the output.

Technical manual
Logic
• INVERTER function block that inverts the input signal to the output.
• LLD function block. Loop delay used to delay the output signal one execution cycle.
• OR function block. The OR function is used to form general combinatory expressions with
boolean variables. The OR function block has up to six inputs and two outputs. One of the
outputs is inverted.
• PULSETIMER function block can be used, for example, for pulse extensions or limiting of
operation of outputs, settable pulse time.
• RSMEMORY function block is a flip-flop that can reset or set an output from two inputs
respectively. Each block has two outputs where one is inverted. The memory setting
controls if, after a power interruption, the flip-flop resets or returns to the state it had
before the power interruption. RESET input has priority.
• SRMEMORY function block is a flip-flop that can set or reset an output from two inputs
controls if, after a power interruption, the flip-flop resets or returns to the state it had
before the power interruption. The SET input has priority.
• TIMERSET function has pick-up and drop-out delayed outputs related to the input signal.
The timer has a settable time delay.
• XOR is used to generate combinatory expressions with boolean variables. XOR has two
inputs and two outputs. One of the outputs is inverted. The output signal OUT is 1 if the
input signals are different and 0 if they are the same.
17.7.1 AND function block AND IP11013-1 v2
M11453-3 v4
The AND function is used to form general combinatory expressions with boolean variables. The
AND function block has up to four inputs and two outputs. One of the outputs is inverted.
17.7.1.1 Function block

M11452-3 v2
AND
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
Figure 545: AND function block

Technical manual
Logic
17.7.1.2 Signals
Table 677: AND Input signals

INPUT1 BOOLEAN 1 Input signal 1
Table 678: AND Output signals

OUT BOOLEAN Output signal
NOUT BOOLEAN Inverted output signal

GUID-D1179280-1D99-4A66-91AC-B7343DBA9F23 v3
Table 679: Number of AND instances

Logic block Quantity with cycle time
3 ms 8 ms 100 ms
AND 60 60 160
17.7.2 Controllable gate function block GATE IP11021-1 v2
M11489-3 v2
The Controllable gate function block (GATE) is used for controlling if a signal should be able to
pass from the input to the output or not depending on a setting.

M11490-3 v2
GATE
INPUT OUT
Figure 546: GATE function block
17.7.2.2 Signals
Table 680: GATE Input signals

INPUT BOOLEAN 0 Input to gate

Technical manual
Logic
Table 681: GATE Output signals

OUT BOOLEAN Output from gate
17.7.2.3 Settings
Table 682: GATE Group settings (basic)

On

GUID-45DF373F-DC39-4E1B-B45B-6B454E8E0E50 v3
Table 683: Number of GATE instances

3 ms 8 ms 100 ms
GATE 10 10 20
17.7.3 Inverter function block INV IP11011-1 v2

M11445-3 v1
INV
INPUT OUT
Figure 547: INV function block
17.7.3.2 Signals
Table 684: INV Input signals

INPUT BOOLEAN 0 Input
Table 685: INV Output signals

OUT BOOLEAN Output

Technical manual
Logic

GUID-0EC4192A-EF03-47C0-AEC1-09B68B411A98 v3
Table 686: Number of INV instances

3 ms 8 ms 100 ms
INV 90 90 240
17.7.4 Loop delay function block LLD GUID-05D959B5-A55B-437C-8E8F-831A4A357E24 v2
GUID-64B24094-010D-4B8F-8B7B-DDD49499AAE5 v3
The Logic loop delay function block (LLD) function is used to delay the output signal one
execution cycle, that is, the cycle time of the function blocks used.

GUID-EE44CFDF-C8F7-4870-BD1C-98D9CD91FD97 v4
LLD
INPUT OUT
IEC15000144.vsd
Figure 548: LLD function block
17.7.4.2 Signals
Table 687: LLD Input signals

INPUT BOOLEAN 0 Input signal
Table 688: LLD Output signals

OUT BOOLEAN Output signal delayed one execution cycle

GUID-B2E6F510-8766-4381-9618-CE02ED71FFB6 v2
Table 689: Number of LLD instances

3 ms 8 ms 100 ms
LLD 10 10 20
17.7.5 OR function block IP11012-1 v3
M11449-3 v2
The OR function is used to form general combinatory expressions with boolean variables. The
OR function block has up to six inputs and two outputs. One of the outputs is inverted.

Technical manual
Logic

M11448-3 v1
OR
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
Figure 549: OR function block
17.7.5.2 Signals
Table 690: OR Input signals

INPUT1 BOOLEAN 0 Input 1 to OR gate
Table 691: OR Output signals

OUT BOOLEAN Output from OR gate
NOUT BOOLEAN Inverted output from OR gate

GUID-35A795D7-A6BD-4669-A023-43C497DBFB01 v4
Table 692: Number of OR instances

3 ms 8 ms 100 ms
OR 78 60 160
17.7.6 Pulse timer function block PULSETIMER IP11016-1 v2
M11466-3 v3
The pulse (PULSETIMER) function can be used, for example, for pulse extensions or limiting the
operation time of outputs. The PULSETIMER has a settable length. When the input is 1, the
output will be 1 for the time set by the time delay parameter t. Then it returns to 0.

Technical manual
Logic

M11465-3 v4
PULSETIMER
INPUT OUT
Figure 550: PULSETIMER function block
17.7.6.2 Signals
Table 693: PULSETIMER Input signals

INPUT BOOLEAN 0 Input to pulse timer
Table 694: PULSETIMER Output signals

OUT BOOLEAN Output from pulse timer
17.7.6.3 Settings
Table 695: PULSETIMER Non group settings (basic)

t 0.000 - s 0.001 0.010 Time delay of function
90000.000

GUID-E05E5FB1-23E7-4816-84F2-1FBFFDFF2B43 v2
Table 696: Number of PULSETIMER instances

Logic block Quantity with cycle time Range or Value Accuracy
3 ms 8 ms 100 ms
PULSETIMER 10 10 20 (0.000–90000.000) s ±0.5% ±10 ms
17.7.7 Reset-set with memory function block RSMEMORY GUID-9C93669F-078B-49EA-85B8-C4BB6A434734 v1
GUID-4C804DEA-3C83-4C20-82C6-BAD03BD48242 v4
The Reset-set with memory function block (RSMEMORY) is a flip-flop with memory that can
reset or set an output from two inputs respectively. Each RSMEMORY function block has two
outputs, where one is inverted. The memory setting controls if, after a power interruption, the
flip-flop resets or returns to the state it had before the power interruption. For a Reset-Set
flip-flop, RESET input has higher priority over SET input.

Technical manual
Logic
Table 697: Truth table for RSMEMORY function block

RESET SET OUT NOUT
0 0 Last Inverted last
value value
0 1 1 0
1 0 0 1
1 1 0 1

GUID-50D5A4C0-59BF-44DE-86AC-47640ACD35A7 v3
RSMEMORY
SET OUT
RESET NOUT
Figure 551: RSMEMORY function block
17.7.7.2 Signals
Table 698: RSMEMORY Input signals

SET BOOLEAN 0 Input signal to set
RESET BOOLEAN 0 Input signal to reset
Table 699: RSMEMORY Output signals

17.7.7.3 Settings
Table 700: RSMEMORY Group settings (basic)

Memory Off - - On Operating mode of the memory
On function

GUID-BE6FD540-E96E-4F15-B2A2-12FFAE6C51DB v2
Table 701: Number of RSMEMORY instances

3 ms 8 ms 100 ms
RSMEMORY 10 10 20

Technical manual
Logic
17.7.8 Set-reset with memory function block SRMEMORY IP11020-1 v2
M11485-3 v4
The Set-reset with memory function block (SRMEMORY) is a flip-flop with memory that can set
or reset an output from two inputs respectively. Each SRMEMORY function block has two
outputs, where one is inverted. The memory setting controls if, after a power interruption, the
flip-flop resets or returns to the state it had before the power interruption. The input SET has
priority.
Table 702: Truth table for SRMEMORY function block

SET RESET OUT NOUT
0 0 Last Inverted
value last value
0 1 0 1
1 0 1 0
1 1 1 0

M11484-3 v2
SRMEMORY
SET OUT
RESET NOUT
Figure 552: SRMEMORY function block
17.7.8.2 Signals
Table 703: SRMEMORY Input signals

Table 704: SRMEMORY Output signals

17.7.8.3 Settings
Table 705: SRMEMORY Group settings (basic)

On function

Technical manual
Logic

GUID-7A0F4327-CA83-4FB0-AB28-7C5F17AE6354 v2
Table 706: Number of SRMEMORY instances

3 ms 8 ms 100 ms
SRMEMORY 10 10 20
17.7.9 Settable timer function block TIMERSET IP11022-1 v2
M11494-3 v3
The Settable timer function block (TIMERSET) timer has two outputs for the delay of the input
signal at drop-out and at pick-up. The timer has a settable time delay. It also has an Operation
setting On and Off that controls the operation of the timer.
Input
tdelay
On
Off
tdelay
t
Figure 553: TIMERSET status diagram

M11495-3 v3
TIMERSET
INPUT ON
OFF
Figure 554: TIMERSET function block
17.7.9.2 Signals
Table 707: TIMERSET Input signals

INPUT BOOLEAN 0 Input to timer

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Logic
Table 708: TIMERSET Output signals

ON BOOLEAN Output from timer, pick-up delayed
OFF BOOLEAN Output from timer, drop-out delayed
17.7.9.3 Settings
Table 709: TIMERSET Group settings (basic)

On
t 0.000 - s 0.001 0.000 Delay for settable timer n
90000.000

GUID-C6C98FE0-F559-45EE-B853-464516775417 v3
Table 710: Number of TIMERSET instances

3 ms 8 ms 100 ms
TIMERSET 15 15 30 (0.000–90000.000) s ±0.5% ±10 ms
17.7.10 Exclusive OR function block XOR IP11018-1 v2
M11477-3 v4
The exclusive OR function (XOR) is used to generate combinatory expressions with boolean
variables. XOR has two inputs and two outputs. One of the outputs is inverted. The output
signal OUT is 1 if the input signals are different and 0 if they are the same.
Table 711: Truth table for XOR function block

INPUT1 INPUT2 OUT NOUT
0 0 0 1
0 1 1 0
1 0 1 0
1 1 0 1

M11476-3 v1
XOR
INPUT1 OUT
INPUT2 NOUT
Figure 555: XOR function block

Technical manual
Logic
17.7.10.2 Signals
Table 712: XOR Input signals

INPUT1 BOOLEAN 0 Input 1 to XOR gate
INPUT2 BOOLEAN 0 Input 2 to XOR gate
Table 713: XOR Output signals

OUT BOOLEAN Output from XOR gate
NOUT BOOLEAN Inverted output from XOR gate

GUID-0B07F78C-10BD-4070-AFF0-6EE36454AA03 v2
Table 714: Number of XOR instances

3 ms 8 ms 100 ms
XOR 10 10 20
17.8 Configurable logic blocks Q/T GUID-0CA6511A-E8BD-416E-9B59-5C6BD98C60B7 v5
The configurable logic blocks QT propagate the time stamp and the quality of the input
signals (have suffix QT at the end of their function name).
The function blocks assist the user to adapt the IEDs' configuration to the specific application
needs. The list below shows a summary of the function blocks and their features.
• ANDQT AND function block. The function also propagates the time stamp and the quality
of input signals. Each block has four inputs and two outputs where one is inverted.
• INDCOMBSPQT combines single input signals to group signal. Single position input is
copied to value part of SP_OUT output. TIME input is copied to time part of SP_OUT
output. Quality input bits are copied to the corresponding quality part of SP_OUT output.
• INDEXTSPQT extracts individual signals from a group signal input. The value part of single
position input is copied to SI_OUT output. The time part of single position input is copied
to TIME output. The quality bits in the common part and the indication part of inputs
signal are copied to the corresponding quality output.
• INVALIDQT function which sets quality invalid of outputs according to a "valid" input.
Inputs are copied to outputs. If input VALID is 0, or if its quality invalid bit is set, all
outputs invalid quality bit will be set to invalid. The time stamp of an output will be set to
the latest time stamp of INPUT and VALID inputs.
• INVERTERQT function block that inverts the input signal and propagates the time stamp
and the quality of the input signal.

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Logic
• ORQT OR function block that also propagates the time stamp and the quality of the input
signals. Each block has six inputs and two outputs where one is inverted.
• PULSETIMERQT Pulse timer function block can be used, for example, for pulse extensions
or limiting of operation of outputs. The function also propagates the time stamp and the
quality of the input signal.
• RSMEMORYQT function block is a flip-flop that can reset or set an output from two inputs
controls if the block after a power interruption should return to the state before the
interruption, or be reset. The function also propagates the time stamp and the quality of
the input signal.
• SRMEMORYQT function block is a flip-flop that can set or reset an output from two inputs
controls if the block after a power interruption should return to the state before the
interruption, or be reset. The function also propagates the time stamp and the quality of
the input signal.
• TIMERSETQT function has pick-up and drop-out delayed outputs related to the input
signal. The timer has a settable time delay. The function also propagates the time stamp
and the quality of the input signal.
• XORQT XOR function block. The function also propagates the time stamp and the quality
of the input signals. Each block has two outputs where one is inverted.
17.8.1 ANDQT function block GUID-E3023D85-FDCC-4A5F-99B4-64DA7B4AC5BB v5
The ANDQT function is used to form general combinatory expressions with boolean variables.
The ANDQT function block has four inputs and two outputs.
17.8.1.1 Function block GUID-4CEE3C76-A39D-4C33-AD55-88C570210F2B v2
ANDQT
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
Figure 556: ANDQT function block
17.8.1.2 Signals GUID-4543C4C9-FAE2-4328-8DE2-4A5756A020E9 v1
Table 715: ANDQT Input signals


Technical manual
Logic
Table 716: ANDQT Output signals


GUID-23D4121A-4C9A-4072-BBE3-6DB076EDAB79 v1
Table 717: Number of ANDQT instances

3 ms 8 ms 100 ms
ANDQT - 20 100
17.8.2 Single point indication related signals combining function

block INDCOMBSPQT GUID-13C9325D-D3A0-480F-9F3B-738A13E0ECF8 v3
GUID-EEBD65A5-394C-4ECD-BF6F-D556B610FC57 v3
The value of single point input (SP_IN) is copied to the value part of the SP_OUT output. The
TIME input is copied to the time part of the SP_OUT output. State input bits are copied to the
corresponding state part of the SP_OUT output. If the state or value on the SP_OUT output
changes, the Event bit in the state part is toggled.
INDCOMBSPQT can propagate the quality, the value and the time stamps of the signals via IEC
61850.
17.8.2.1 Function block GUID-55B49FC7-8239-4891-BE16-29296A8F40BE v1
INDCOMBSPQT
SP_IN* SP_OUT
TIME*
BLOCKED*
SUBST*
INVALID*
TEST*
IEC15000146.vsd
Figure 557: INDCOMBSPQT function block
Table 718: INDCOMBSPQT Input signals

SP_IN BOOLEAN 0 Single point indication
TIME GROUP 0 Timestamp
SIGNAL
BLOCKED BOOLEAN 0 Blocked for update
SUBST BOOLEAN 0 Substitued
INVALID BOOLEAN 0 Invalid value
TEST BOOLEAN 0 Testmode

Technical manual
Logic
Table 719: INDCOMBSPQT Output signals

SP_OUT BOOLEAN Single point indication

GUID-27DF23C0-A0B2-4BB0-80B5-FC7B7F7FE448 v1
Table 720: Number of INDCOMBSPQT instances

3 ms 8 ms 100 ms
INDCOMBSPQT - 10 10
17.8.3 Single point input signal attributes converting function block

INDEXTSPQT GUID-9C3D6C45-6B3A-466C-86A1-3DBCD4809B33 v1
GUID-9B700C69-4DAE-434A-BCE6-CE2D1139680A v3
The value part of the single point input signal SI_IN is copied to SI_OUT output. The time part
of single point input is copied to the TIME output. The state bits in the common part and the
indication part of the input signal are copied to the corresponding state output.
INDEXTSPQT can propagate the quality, the value and the time stamps of the signals via IEC
61850.
17.8.3.1 Function block GUID-04AA5209-B919-4161-A585-336CE9618A89 v2
INDEXTSPQT
SI_IN* SI_OUT
TIME
BLOCKED
SUBST
INVALID
TEST
Figure 558: INDEXTSPQT function block
Table 721: INDEXTSPQT Input signals

SI_IN BOOLEAN 0 Single indication

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Logic
Table 722: INDEXTSPQT Output signals

SI_OUT BOOLEAN Single indication
TIME GROUP SIGNAL Timestamp of input
BLOCKED BOOLEAN Blocked for update
SUBST BOOLEAN Substituted
INVALID BOOLEAN Invalid value
TEST BOOLEAN Testmode

GUID-C1E61AE5-22CF-4198-97CF-8C8043EE96D2 v1
Table 723: Number of INDEXTSPQT instances

3 ms 8 ms 100 ms
INDEXTSPQT - 10 10
17.8.4 Invalid logic function block INVALIDQT GUID-66C6DCEE-1F0E-4EB8-9ADB-97F8B41E53DF v4
Component which sets quality invalid of outputs according to a "valid" input.
The values of the input signals INPUTx (where 1<x<16) are copied to the outputs OUTPUTx
(where 1<x<16). If the input VALID is 0 or if its quality bit is set invalid, all outputs OUTPUTx
(where 1<x<16) quality bit will be set to invalid. The time stamp of any output OUTPUTx (where
1<x<16) will be set to the latest time stamp of any input and the input VALID.
INVALIDQT can propagate the quality, the value and the time stamps of the signals via IEC
61850.
17.8.4.1 Function block GUID-0BD84306-0965-4702-8D5C-9570A70168EA v1
INVALIDQT
INPUT1 OUTPUT1
INPUT2 OUTPUT2
INPUT3 OUTPUT3
INPUT4 OUTPUT4
INPUT5 OUTPUT5
INPUT6 OUTPUT6
INPUT7 OUTPUT7
INPUT8 OUTPUT8
INPUT9 OUTPUT9
INPUT10 OUTPUT10
INPUT11 OUTPUT11
INPUT12 OUTPUT12
INPUT13 OUTPUT13
INPUT14 OUTPUT14
INPUT15 OUTPUT15
INPUT16 OUTPUT16
VALID
iec08000169.vsd
Figure 559: INVALIDQT function block

Technical manual
Logic
Table 724: INVALIDQT Input signals

INPUT1 BOOLEAN 0 Indication input 1
VALID BOOLEAN 1 Inputs are valid or not
Table 725: INVALIDQT Output signals

OUTPUT1 BOOLEAN Indication output 1

Technical manual
Logic

GUID-77FEBE9B-0882-4E85-8B1A-7671807BFC02 v2
Table 726: Number of INVALIDQT instances

3 ms 8 ms 100 ms
INVALIDQT 10 6 6
17.8.5 Inverter function block INVERTERQT GUID-502064E0-FE2F-43C0-AA40-79D058FC3E1C v4
The INVERTERQT function block inverts one binary input signal to the output. It can propagate
the quality, value and the time stamps of the signals via IEC 61850.
17.8.5.1 Function block GUID-06C5C594-E00B-4FD5-8B0F-4ED05DB348B6 v2
INVERTERQT
INPUT OUT
Figure 560: INVERTERQT function block
Table 727: INVERTERQT Input signals

Table 728: INVERTERQT Output signals


GUID-F25B94C6-9CC9-48A0-A7A3-47627D2B56E2 v1
Table 729: Number of INVERTERQT instances

3 ms 8 ms 100 ms
INVERTERQT - 20 100
17.8.6 ORQT function block GUID-F8F8D591-F895-4BCB-ADBD-5F95E7B70FEB v2
GUID-F8AECD9C-83FC-4025-9AB5-809D88122277 v4
The ORQT function block (ORQT) is used to form general combinatory expressions OR with
boolean variables. ORQT function block has up to six inputs and two outputs. One of the

Technical manual
Logic
outputs is inverted. It can propagate the quality, value and the timestamps of the signals via
IEC 61850.
17.8.6.1 Function block GUID-BCDFD5F0-4F30-4012-BA49-2E5C2115912E v2
ORQT
INPUT1 OUT
INPUT2 NOUT
INPUT3
INPUT4
INPUT5
INPUT6
Figure 561: ORQT function block
Table 730: ORQT Input signals

Table 731: ORQT Output signals


GUID-88B27B3C-26D2-47AF-9878-CC19018171B1 v1
Table 732: Number of ORQT instances

3 ms 8 ms 100 ms
ORQT - 20 100
17.8.7 Pulse timer function block PULSETIMERQT GUID-5CB71BD1-58A0-4A06-9207-6DAE389B5288 v2
GUID-D930E5A7-C564-4464-B97F-C72B4801C917 v4
The pulse timer function block (PULSETIMERQT) can be used, for example, for pulse extensions
or for limiting the operation time of the outputs. PULSETIMERQT has a settable output pulse
length.

Technical manual
Logic
When the input goes to 1, the output will be 1 for the time set by the time delay parameter t.
Then it returns to 0.
When the output changes value, the time stamp of the output signal is updated.
The supported “quality” state bits are propagated from the input to the output at each
execution cycle. A change of these bits will not lead to an updated time stamp on the output.
PULSETIMERQT can propagate the quality, value and the time stamps of the signals via IEC
61850.
17.8.7.1 Function block GUID-C0490ECF-5C4E-4F17-B628-482694C590D2 v1
PULSETIMERQT
INPUT OUT
IEC15000145.vsd
Figure 562: PULSETIMERQT function block
Table 733: PULSETIMERQT Input signals

Table 734: PULSETIMERQT Output signals

17.8.7.3 Settings
Table 735: PULSETIMERQT Non group settings (basic)

t 0.000 - s 0.001 0.010 Pulse time length
90000.000

GUID-61263951-53A8-4113-82B5-3DB3BF0D9449 v1
Table 736: Number of PULSETIMERQT instances

3 ms 8 ms 100 ms
PULSETIMERQT - 10 30 (0.000–90000.000) s ±0.5% ±10 ms

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Logic
17.8.8 Reset/Set function block RSMEMORYQT GUID-095B2670-610E-47AE-A5D3-F3E7C0A56B65 v2
GUID-32A1B759-2ED8-45B3-8385-762167626CE2 v5
The Reset-set function (RSMEMORYQT) is a flip-flop with memory that can reset or set an
output from two inputs respectively. Each RSMEMORYQT function block has two outputs,
where one is inverted. The memory setting controls if, after a power interruption, the flip-flop
resets or returns to the state it had before the power interruption. For a Reset-Set flip-flop,
the RESET input has higher priority than the SET input.
RSMEMORYQT can propagate the quality, the value and the time stamps of the signals via IEC
61850.
Table 737: Truth table for RSMEMORYQT function block

RESET SET OUT NOUT
0 0 Last Inverted last
value value
0 1 1 0
1 0 0 1
1 1 0 1
17.8.8.1 Function block GUID-BDBFD8BA-9253-4277-96D8-0FF7EE93B56E v1
RSMEMORYQT
SET OUT
RESET NOUT
Figure 563: RSMEMORYQT function block
Table 738: RSMEMORYQT Input signals

Table 739: RSMEMORYQT Output signals


Technical manual
Logic
17.8.8.3 Settings
Table 740: RSMEMORYQT Group settings (basic)

On function

GUID-94C803B4-6C5A-4072-AB5C-20DDE98C9A70 v1
Table 741: Number of RSMEMORYQT instances

3 ms 8 ms 100 ms
RSMEMORYQT - 10 30
17.8.9 Set/Reset function block SRMEMORYQT GUID-D910BA2D-07FA-44C5-A820-E0413AD7FD91 v2
GUID-39060D4B-9AA7-4505-9487-88B2CBC534F0 v5
The Set-reset function (SRMEMORYQT) is a flip-flop with memory that can set or reset an
output from two inputs respectively. Each SRMEMORYQT function block has two outputs,
where one is inverted. The memory setting controls if, after a power interruption, the flip-flop
resets or returns to the state it had before the power interruption. The SET input has priority.
SRMEMORYQT can propagate the quality, the value and the time stamps of the signals via IEC
61850.
Table 742: Truth table for SRMEMORYQT function block

SET RESET OUT NOUT
0 0 Last Inverted
value last value
0 1 0 1
1 0 1 0
1 1 1 0
If Memory parameter is On, the output result is stored in semi-retained memory.
17.8.9.1 Function block GUID-8B04BA86-9685-4E73-9C04-3AE74752CDBF v1
SRMEMORYQT
SET OUT
RESET NOUT
Figure 564: SRMEMORYQT function block

Technical manual
Logic
Table 743: SRMEMORYQT Input signals

Table 744: SRMEMORYQT Output signals

17.8.9.3 Settings
Table 745: SRMEMORYQT Group settings (basic)

On function

GUID-341562FB-6149-495B-8A63-200DF16A5590 v1
Table 746: Number of SRMEMORYQT instances

3 ms 8 ms 100 ms
SRMEMORYQT - 10 30
17.8.10 Settable timer function block TIMERSETQT GUID-582D9F19-9974-40D6-95EB-7BAD72910748 v2
GUID-3830BCA7-4876-481E-B5AC-2104675232E7 v5
The Settable timer function block (TIMERSETQT) has two outputs for delay of the input signal
at pick-up and drop-out. The timer has a settable time delay (t). It also has an Operation
setting On/Off that controls the operation of the timer.
When the output changes value, the timestamp of the output signal is updated. The supported
“quality” state bits are propagated from the input to the output at each execution cycle. A
change of these bits will not lead to an updated timestamp on the output.
TIMERSETQT can propagate the quality, value and the timestamps of the signals via IEC 61850.
17.8.10.1 Function block GUID-13589BAE-38AE-46A1-8E9F-94BCD1CBCBF1 v1
TIMERSETQT
INPUT ON
OFF
Figure 565: TIMERSETQT function

Technical manual
Logic
Table 747: TIMERSETQT Input signals

Table 748: TIMERSETQT Output signals

ON BOOLEAN Output signal, pick-up delayed
OFF BOOLEAN Output signal, drop-out delayed
17.8.10.3 Settings
Table 749: TIMERSETQT Group settings (basic)

On
t 0.000 - s 0.001 0.000 Delay for settable timer n
90000.000

GUID-B6231B97-05ED-40E8-B735-1E1A50FDB85F v1
Table 750: Number of TIMERSETQT instances

3 ms 8 ms 100 ms
TIMERSETQT - 10 30 (0.000–90000.000) s ±0.5% ±10 ms
17.8.11 Exclusive OR function block XORQT GUID-76ADACC1-A273-4100-BE62-99BCDABFEB7A v2
GUID-62986D87-1690-499E-B8D3-1F51D2DA191E v4
The exclusive OR function (XORQT) function is used to generate combinatory expressions with
boolean variables. XORQT function has two inputs and two outputs. One of the outputs is
inverted. The output signal OUT is 1 if the input signals are different and 0 if they are equal.
Table 751: Truth table for XORQT function block

INPUT1 INPUT2 OUT NOUT
0 0 0 1
0 1 1 0
1 0 1 0
1 1 0 1

Technical manual
Logic
XORQT can propagate the quality, value and time stamps of the signals via IEC 61850.
17.8.11.1 Function block GUID-A685524C-DF12-4BA8-A29C-A027CEAC75E5 v2
XORQT
INPUT1 OUT
INPUT2 NOUT
Figure 566: XORQT function block
Table 752: XORQT Input signals

Table 753: XORQT Output signals


GUID-1C381E02-6B9E-44DC-828F-8B3EA7EDAA54 v1
Table 754: Number of XORQT instances

3 ms 8 ms 100 ms
XORQT - 10 30
17.9 Extension logic package IP11362-1 v2
When extra configurable logic blocks are required, an additional package can be ordered.
GUID-19810098-1820-4765-8F0B-7D585FFC0C78 v8
Table 755: Number of instances in the extension logic package

3 ms 8 ms 100 ms
SLGAPC 10 10 54
VSGAPC 10 10 100
AND 80 40 100
OR 80 40 100
PULSETIMER 20 20 49

Technical manual
Logic

3 ms 8 ms 100 ms
GATE — — 49
TIMERSET 34 30 49
XOR 10 10 69
LLD — — 49
SRMEMORY 10 10 110
INV 80 40 100
RSMEMORY 10 10 20
17.10 Fixed signals FXDSIGN
SEMOD167904-2 v2

Fixed signals FXDSIGN - -
The Fixed signals function (FXDSIGN) has nine pre-set (fixed) signals that can be used in the
configuration of an IED, either for forcing the unused inputs in other function blocks to a
certain level/value, or for creating certain logic. Boolean, integer, floating point, string types of
signals are available.
One FXDSIGN function block is included in all IEDs.
FXDSIGN
OFF
ON
INTZERO
INTONE
INTALONE
REALZERO
STRNULL
ZEROSMPL
GRP_OFF
Figure 567: FXDSIGN function block

Technical manual
Logic
17.10.4 Signals
Table 756: FXDSIGN Output signals

OFF BOOLEAN Boolean signal fixed off
ON BOOLEAN Boolean signal fixed on
INTZERO INTEGER Integer signal fixed zero
INTONE INTEGER Integer signal fixed one
INTALONE INTEGER Integer signal fixed all ones
REALZERO REAL Real signal fixed zero
STRNULL STRING String signal with no characters
ZEROSMPL GROUP SIGNAL Channel id for zero sample
GRP_OFF GROUP SIGNAL Group signal fixed off
17.10.5 Settings
The function does not have any settings available in Local HMI or Protection and Control IED
Manager (PCM600).
There are nine outputs from FXDSIGN function block:
• OFF is a boolean signal, fixed to OFF (boolean 0) value

• ON is a boolean signal, fixed to ON (boolean 1) value
• INTZERO is an integer number, fixed to integer value 0
• INTONE is an integer number, fixed to integer value 1
• INTALONE is an integer value FFFF (hex)
• REALZERO is a floating point real number, fixed to 0.0 value
• STRNULL is a string, fixed to an empty string (null) value
• ZEROSMPL is a channel index, fixed to 0 value
• GRP_OFF is a group signal, fixed to 0 value
17.11 Boolean 16 to Integer conversion B16I SEMOD175715-1 v1
SEMOD175721-2 v2

Boolean 16 to integer conversion B16I - -
Boolean to integer conversion, 16 bit (B16I) is used to transform a set of 16 boolean (logical)
signals into an integer.

Technical manual
Logic
B16I
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
Figure 568: B16I function block
17.11.4 Signals
Table 757: B16I Input signals

IN1 BOOLEAN 0 Input 1
Table 758: B16I Output signals

OUT INTEGER Output value

Technical manual
Logic

Table 759: B16I Monitored data

OUT INTEGER - - Output value
The Boolean 16 to integer conversion function (B16I) will transfer a combination of up to 16

binary inputs INx, where 1≤x≤16, to an integer. Each INx represents a value according to the
table below from 0 to 32768. This follows the general formula: INx = 2x-1 where 1≤x≤16. The sum
of all the values on the activated INx will be available on the output OUT as a sum of the integer
values of all the inputs INx that are activated. OUT is an integer. When all INx (where 1≤x≤16)
are activated, that is = Boolean 1, it corresponds to that integer 65535 is available on the
output OUT. The B16I function is designed for receiving up to 16 booleans input locally. If the
BLOCK input is activated, it will freeze the output at the last value.
Values of each of the different OUTx from function block B16I for 1≤x≤16.
The sum of the value on each INx corresponds to the integer presented on the output OUT on
the function block B16I
Name of input Type Default Description Value when Value when

activated deactivated
IN1 BOOLEAN 0 Input 1 1 0
The sum of the numbers in column “Value when activated” when all INx (where 1≤x≤16) are
active that is=1; is 65535. 65535 is the highest boolean value that can be converted to an
integer by the B16I function block.

Technical manual
Logic

GUID-65A2876A-F779-41C4-ACD7-7662D1E7F1F2 v3
Table 760: Number of B16I instances

3 ms 8 ms 100 ms
B16I 6 4 8
17.12 Boolean to integer conversion with logical node

representation, 16 bit BTIGAPC SEMOD175753-1 v4
SEMOD175757-2 v5

Boolean to integer conversion with BTIGAPC - -
logical node representation, 16 bit
Boolean to integer conversion with logical node representation, 16 bit (BTIGAPC) is used to
transform a set of 16 boolean (logical) signals into an integer. The block input will freeze the
output at the last value.
BTIGAPC
BLOCK OUT
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
IN11
IN12
IN13
IN14
IN15
IN16
Figure 569: BTIGAPC function block

Technical manual
Logic
17.12.4 Signals
Table 761: BTIGAPC Input signals

Table 762: BTIGAPC Output signals

OUT INTEGER Output value

Table 763: BTIGAPC Monitored data

OUT INTEGER - - Output value
The Boolean 16 to integer conversion with logic node representation function (BTIGAPC) will
transfer a combination of up to 16 binary inputs INx, where 1≤x≤16, to an integer. Each INx
represents a value according to the table below from 0 to 32768. This follows the general
formula: INx = 2x-1 where 1≤x≤16. The sum of all the values on the activated INx will be available

Technical manual
Logic
on the output OUT as a sum of the integer values of all the inputs INx that are activated. OUT
is an integer. When all INx (where 1≤x≤16) are activated, that is = Boolean 1, it corresponds to
that integer 65535 is available on the output OUT. If the BLOCK input is activated, it will freeze
the logical outputs at the last value.
Values of each of the different OUTx from function block BTIGAPC for 1≤x≤16.
the function block BTIGAPC.
Name of input Type Default Description Value when Value when

The sum of the numbers in column “Value when activated” when all INx (where 1≤x≤16) are
active that is=1; is 65535. 65535 is the highest boolean value that can be converted to an
integer by the BTIGAPC function block.

GUID-3820F464-D296-4CAD-8491-F3F997359D79 v2
Table 764: Number of BTIGAPC instances

3 ms 8 ms 100 ms
BTIGAPC 4 4 8
17.13 Integer to boolean 16 conversion IB16
SEMOD167941-2 v2

Integer to boolean 16 conversion IB16 - -

Technical manual
Logic
Integer to boolean 16 conversion function (IB16) is used to transform an integer into a set of 16
boolean (logical) signals.
IB16
BLOCK OUT1
INP OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
Figure 570: IB16 function block
17.13.4 Signals
Table 765: IB16 Input signals

INP INTEGER 0 Integer Input
Table 766: IB16 Output signals

OUT1 BOOLEAN Output 1

Technical manual
Logic

17.13.5 Setting parameters ABBD8E242451 v4
The function does not have any parameters available in local HMI or Protection and Control IED
Manager (PCM600)
With integer 15 on the input INP the OUT1 = OUT2 = OUT3= OUT4 =1 and the remaining OUTx =
0 for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with
the table IB16_1. When not activated the OUTx has the value 0.
In the above example when integer 15 is on the input INP the OUT1 has a value =1, OUT2 has a
value =2, OUT3 has a value =4 and OUT4 has a value =8. The sum of these OUTx is equal to 1 + 2
+ 4 + 8 = 15.
This follows the general formulae: The sum of the values of all OUTx = 2x-1 where 1≤x≤16 will be
equal to the integer value on the input INP.
The Integer to Boolean 16 conversion function (IB16) will transfer an integer with a value
between 0 to 65535 connected to the input INP to a combination of activated outputs OUTx
where 1≤x≤16. The sum of the values of all OUTx will then be equal to the integer on input INP.
The values of the different OUTx are according to the table below. When an OUTx is not
activated, its value is 0.
When all OUTx where 1≤x≤16 are activated that is = Boolean 1 it corresponds to that integer
65535 is connected to input INP. The IB16 function is designed for receiving the integer input
locally. If the BLOCK input is activated, it will freeze the logical outputs at the last value.
Values of each of the different OUTx from function block IB16 for 1≤x≤16.
the function block IB16.
Name of OUTx Type Description Value when Value when

OUT1 BOOLEAN Output 1 1 0

Technical manual
Logic

The sum of the numbers in column “Value when activated” when all OUTx (where x = 1 to 16)
are active that is=1; is 65535. 65535 is the highest integer that can be converted by the IB16
function block.

GUID-B45901F4-B163-4696-8220-7F8CAC84D793 v2
Table 767: Number of IB16 instances

3 ms 8 ms 100 ms
IB16 6 4 8
17.14 Integer to Boolean 16 conversion with logic node

representation ITBGAPC SEMOD158419-1 v3
SEMOD167944-2 v4

Integer to boolean 16 conversion ITBGAPC - -
with logic node representation
Integer to boolean conversion with logic node representation function (ITBGAPC) is used to
transform an integer which is transmitted over IEC 61850 and received by the function to 16
boolean (logic) output signals.
ITBGAPC function can only receive remote values over IEC 61850 when the R/L (Remote/Local)
push button on the front HMI indicates that the control mode for the operator is in position R
(Remote i.e. the LED adjacent to R is lit), and the corresponding signal is connected to the
input PSTO ITBGAPC function block. The input BLOCK will freeze the output at the last received
value and blocks new integer values to be received and converted to binary coded outputs.

Technical manual
Logic
ITBGAPC
BLOCK OUT1
PSTO OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
OUT15
OUT16
Figure 571: ITBGAPC function block
17.14.4 Signals
Table 768: ITBGAPC Input signals

Table 769: ITBGAPC Output signals


Technical manual
Logic
17.14.5 Settings
GUID-F573CA16-4821-4203-970A-F7D01AF5E63B v1
This function does not have any setting parameters.
An example is used to explain the principle of operation: With integer 15 sent to and received
by the ITBGAPC function on the IEC 61850 the OUTx changes from 0 to 1 on each of the OUT1;
OUT2 OUT3 and OUT4. All other OUTx (5≤x≤16) remains 0. The boolean interpretation of this is
represented by the assigned values of each of the outputs OUT1 = 1; and OUT2 = 2; and OUT3=
4; and OUT4 = 8. The sum of these OUTx (1≤x≤4) is equal to the integer 15 received via the IEC
61850 network. The remaining OUTx = 0 for (5≤x≤16).
OUTx represents a value when activated. The value of each of the OUTx is in accordance with
the Table 770. When not activated the OUTx has the value 0.
The value of each OUTx for 1≤x≤16 (1≤x≤16) follows the general formulae: OUTx = 2x-1 The sum
of the values of all activated OUTx = 2x-1 where 1≤x≤16 will be equal to the integer value
received over IEC 61850 to the ITBGAPC_1 function block.
The Integer to Boolean 16 conversion with logic node representation function (ITBGAPC) will
transfer an integer with a value between 0 to 65535 communicated via IEC 61850 and
connected to the ITBGAPC function block to a combination of activated outputs OUTx where
1≤x≤16. The values represented by the different OUTx are according to Table 770. When an
OUTx is not activated, its value is 0.
The ITBGAPC function is designed for receiving the integer input from a station computer - for
example, over IEC 61850. If the BLOCK input is activated, it will freeze the logical outputs at the
last value.
Table 770: Outputs and their values when activated


Technical manual
Logic
The sum of the numbers in column “Value when activated” when all OUTx (1≤x≤16) are active
equals 65535. This is the highest integer that can be converted to boolean by the ITBGAPC
function block.
The operator position input (PSTO) determines the operator place. The integer number that is
communicated to the ITBGAPC can only be written to the block while the PSTO is in position
“Remote”. If PSTO is in position ”Off” or ”Local”, then no changes are applied to the outputs.

GUID-A339BBA3-8FD0-429D-BB49-809EAC4D53B0 v2
Table 771: Number of ITBGAPC instances

3 ms 8 ms 100 ms
ITBGAPC 4 4 8
17.15 Elapsed time integrator with limit transgression and

overflow supervision TEIGAPC
17.15.1 Identification GUID-1913E066-37D1-4689-9178-5B3C8B029815 v3
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2 device

identificatio identificatio number
n n
Elapsed time integrator TEIGAPC - -
17.15.2 Functionality GUID-390D7433-0C1C-48B4-9A90-71AA148C3C35 v3
Elapsed Time Integrator (TEIGAPC) function is a function that accumulates the elapsed time
when a given binary signal has been high, see also Figure 572.
BLOCK
RESET
IN Time Integration ACCTIME
with Retain
q-1
a
OVERFLOW
AND
a>b
999 999 s b
a
WARNING
AND
a>b
tWarning b
a
ALARM
AND
a>b
tAlarm b
q-1 = unit delay IEC13000290-2-en.vsd
Figure 572: TEIGAPC logics

The main features of TEIGAPC

Technical manual
Logic
• Applicable to long time integration up to 999 999.9 seconds

• Supervision of overflow
• Possibility to define a warning and an alarm with the resolution of 10 milliseconds
• Retain the integration value
• Possibilities for blocking and reset of the total integrated time
• Report of the integrated time
17.15.3 Function block GUID-6D50A060-7751-405B-AEC1-FAE942EBDA64 v2
TEIGAPC
BLOCK WARNING
IN ALARM
RESET OVERFLOW
ACCTIME
Figure 573: TEIGAPC function block
17.15.4 Signals
Table 772: TEIGAPC Input signals

BLOCK BOOLEAN 0 Freeze the integration and block the other outputs
IN BOOLEAN 0 The input signal that is used to measure the elapsed time,
when its value is high
RESET BOOLEAN 0 Reset the integration time
Table 773: TEIGAPC Output signals

WARNING BOOLEAN Indicator of the integrated time has reached the warning limit
ALARM BOOLEAN Indicator of the integrated time has reached the alarm limit
OVERFLOW BOOLEAN Indicator of the integrated time has reached the overflow
limit
ACCTIME REAL Integrated elapsed time in seconds
17.15.5 Settings
Table 774: TEIGAPC Group settings (basic)

On
tWarning 1.00 - 999999.00 s 0.01 600.00 Time limit for warning supervision
tAlarm 1.00 - 999999.00 s 0.01 1200.00 Time limit for alarm supervision

Technical manual
Logic
17.15.6 Operation principle GUID-04CC8365-DCDE-4DC7-BEF0-6EF8382305DD v3
The elapsed time integrator (TEIGAPC) provides
• time integration, accumulating the elapsed time when a given binary signal has been high
• blocking and reset of the total integrated time
• supervision of limit transgression and overflow, the overflow limit is fixed to 999999.9
seconds
• retaining of the integrated value
Figure 574 describes the simplified logic of the function where the block “Time
Integration“ covers the logics for the first two items listed above while the block
“Transgression Supervision Plus Retain“ contains the logics for the last two.
Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACCTIME
Time Integration
IN
Loop Delay
Figure 574: TEIGAPC Simplified logic

TEIGAPC main functionalities
• integration of the elapsed time when IN has been high

• applicable to long time integration (≤999 999.9 seconds)
• output ACCTIME presents integrated value in seconds
• integrated value is retained in nonvolatile memory
• any retained value with a warning/alarm/overflow is used as initiation value for the
integration following by a restart
• RESET: Reset of the integration value. Consequently all other outputs are also reset
• unconditionally on the input IN value
• reset the value of the nonvolatile memory to zero
• BLOCK: Freeze the integration and block/reset the other outputs
• unconditionally on the signal value
• BLOCK request overrides RESET request
• Monitor and report the conditions of limit transgression
• overflow if output ACCTIME >999999.9 seconds
• alarm if ACCTIME > tAlarm
• warning if ACCTIME > tWarning

Technical manual
Logic
The ACCTIME output represents the integrated time in seconds while tOverflow, tAlarm and
tWarning are the time limit parameters in seconds.
tAlarm and tWarning are user settable limits. They are also independent, that is, there is no
check if tAlarm > tWarning.
tAlarm and tWarning are possible to be defined with a resolution of 10 ms, depending on the
level of the defined values for the parameters.
The limit for the overflow supervision is fixed at 999999.9 seconds. The outputs freeze if an
overflow occurs.
17.15.6.1 Operation accuracy GUID-E0772193-9F6E-43DA-B642-2923565E5D4C v3
The accuracy of TEIGAPC depends on essentially three factors
• function cycle time

• the pulse length
• the number of pulses, that is, the number of rising and falling flank pairs
In principle, a shorter function cycle time, longer integrated time length or more pulses may
lead to reduced accuracy.
17.15.6.2 Memory storage GUID-6FDD6590-30F9-4CC1-AC9D-945544AB8688 v3
The value of the integrated elapsed time is retained in a non-volatile memory.

GUID-B258726E-1129-47C9-94F9-BE634A2085FA v4
Table 775: TEIGAPC Technical data

Function Cycle time (ms) Range or value Accuracy
Elapsed time integration 3 0 ~ 999999.9 s ±0.2% or ±20 ms whichever
is greater
8 0 ~ 999999.9 s ±0.2% or ±100 ms
100 0 ~ 999999.9 s ±0.2% or ±250 ms
Table 776: Number of TEIGAPC instances

3 ms 8 ms 100 ms
TEIGAPC 4 4 4
17.16 Comparator for integer inputs INTCOMP
17.16.1 Identification GUID-5992B0F2-FC1B-4838-9BAB-2D2542BB264D v1

Comparison of integer values INTCOMP Int<=>

Technical manual
Logic
17.16.2 Functionality GUID-A93564FA-0017-4939-A9C1-095DA0FD9832 v1
The function gives the possibility to monitor the level of integer values in the system relative
to each other or to a fixed value. It is a basic arithmetic function that can be used for
monitoring, supervision, interlocking and other logics.
17.16.3 Function block GUID-EB28F45B-B1D0-452F-98B4-F96D7FA34069 v1
INTCOMP
INPUT INEQUAL
REF INHIGH
INLOW
17.16.4 Signals
Table 777: INTCOMP Input signals

INPUT INTEGER 0 Input value to be compared with reference value
REF INTEGER 0 Reference value to be compared with input value
Table 778: INTCOMP Output signals

INEQUAL BOOLEAN Input value is equal to the reference value
INHIGH BOOLEAN Input value is higher than the reference value
INLOW BOOLEAN Input value is lower than the reference value
17.16.5 Settings
Table 779: INTCOMP Group settings (basic)

EnaAbs Signed - - Signed Selection for absolute or signed
Absolute comparison
RefSource Set Value - - Set Value Selection for reference value either
Input REF input or setting
SetValue -2000000000 - - 1 100 Set value for reference
2000000000

Technical manual
Logic

Table 780: INTCOMP Monitored data

INEQUAL BOOLEAN - - Input value is equal to the reference
value
INHIGH BOOLEAN - - Input value is higher than the
reference value
INLOW BOOLEAN - - Input value is lower than the reference
value
17.16.7 Operation principle GUID-E9C1B863-ACA7-45C0-91F1-A51FE38755FE v2
The comparison can be done in two ways,
• Between 2 inputs, INPUT and REF

• Between INPUT and the value set by the user SetValue.
The selection of reference value for comparison can be done through setting RefSource. If
RefSource is selected as Input REF then the reference value for comparison is taken from
second input signal (REF). If RefSource is selected as Set Value then the reference value for
comparison is taken from setting (SetValue).
The comparison can be done either between absolute values or signed values and it depends
on the setting EnaAbs. If EnaAbs is selected as Absolute then both input and reference value is
converted into absolute values and comparison is done. If EnaAbs is selected as Signed then
the comparison is done without any conversion.
The function has three state outputs high, low and equal to condition. It will check the
following condition and give corresponding outputs.
• If the input is above the reference value then INHIGH is set HIGH
• If the input is below the reference value then INLOW is set HIGH
• If the input is equal to reference value then INEQUAL is set HIGH
EnaAbs
INPUT ABS T a
F
INHIGH
a>b
b
a INEQUAL
a=b
b
RefSource
REF ABS T
T
SetValue
F a INLOW
F a<b
b
Figure 575: Function logic diagram for INTCOMP

Technical manual
Logic
17.16.8 Technical data GUID-CEA332FF-838D-42B7-AEFC-C1E87809825E v3
Table 781: Number of INTCOMP instances

3 ms 8 ms 100 ms
INTCOMP 10 10 10
17.17 Comparator for real inputs REALCOMP
17.17.1 Identification GUID-0D68E846-5A15-4C2C-91A2-F81A74034E81 v1

Comparator for real inputs REALCOMP Real<=>
17.17.2 Functionality GUID-E17A88D7-D095-4F36-9CD5-64EBFD2A1DEA v1
The function gives the possibility to monitor the level of real value signals in the system
relative to each other or to a fixed value. It is a basic arithmetic function that can be used for
monitoring, supervision, interlocking and other logics.
17.17.3 Function block GUID-8752DF2A-D131-4461-80C6-C52F9980D228 v1
REALCOMP
INPUT INEQUAL
REF INHIGH
INLOW
17.17.4 Signals
Table 782: REALCOMP Input signals

INPUT REAL 0.000 Input value to be compared with reference value
REF REAL 0.000 Reference value to be compared with input value
Table 783: REALCOMP Output signals

INEQUAL BOOLEAN Input value is equal to the reference value
INHIGH BOOLEAN Input value is higher than the reference value
INLOW BOOLEAN Input value is lower than the reference value

Technical manual
Logic
17.17.5 Settings
Table 784: REALCOMP Group settings (basic)

EnaAbs Signed - - Signed Selection for absolute or signed
Absolute comparison
RefSource Set Value - - Set Value Selection for reference value either
Input REF input or setting
SetValue -999.999 - - 0.001 0.001 Set value for reference
999.999
SetValPrefix milli - - unit Multiplication factor for SetValue
unit
kilo
Mega
Giga
EqualBandHigh 0.10 - 50.00 % 0.01 0.50 Equal band high limit in % of
reference value
EqualBandLow 0.10 - 50.00 % 0.01 0.50 Equal band low limit in % of reference
value
17.17.6 Operation principle GUID-3FA699A8-D076-4E5E-BCB8-C6B7907573D1 v2
The comparison can be done in two ways,
1. Between 2 inputs, INPUT and REF

2. Between INPUT and the SetValue setting
The selection of reference value for comparison can be done through setting RefSource. If
RefSource is selected as Input REF then the reference value for comparison is taken from
second input signal (REF). If RefSource is selected as Set Value then the reference value for
comparison is taken from setting (SetValue).
Generally the inputs to the function are in SI units, but when the comparison is to be done with
respect to set level, then the user can set a value in any unit out of Milli to Giga range in setting
SetValue. The unit can be separately set with setting RefPrefix. Internally the function handles
the reference value for comparator as SetValue*RefPrefix.
Additionally the comparison can be done either between absolute values or signed values and
it depends on the setting EnaAbs. If EnaAbs is selected as Absolute then both input and
reference value is converted into absolute values and then comparison is done. If EnaAbs is
selected as Signed then the comparison is done without absolute conversion.

Technical manual
Logic
EnaAbs
INPUT
ABS T
F
High
Comparator
EqualBandHigh INHIGH
RefSource XOR INEQUAL
REF ABS T
T
F Low
SetValue F comparator
INLOW
SetValPrefix
EqualBandLow
Figure 576: Logic diagram for REALCOMP

This function has two settings EqualBandHigh and EqualBandLow to provide margins from
reference value for equal to condition. When the INPUT value is within high and low band,
output INEQUAL will get set.
In order to avoid oscillations at boundary conditions of equal band low limit and high limit,
hysteresis has been provided. If the INPUT is above the equal high level margin including
hysteresis, then INHIGH will set. Similarly if the INPUT is below the equal low level margin
including hysteresis, then INLOW will set.
INEQUAL Reset / INHIGH Set INEQUAL Set / INHIGH Reset
EqualBandHigh
Internal
Equal Band REF or SetValue Hysteresis for
equal band
EqualBandLow
INEQUAL Reset / INLOW Set INEQUAL Set / INLOW Reset

Figure 577: Operation principle of REALCOMP
When EnaAbs is set as absolute comparison and SetValue is set less than 0.2%
of the set unit then INLOW output will never pickups. During the above
mentioned condition, due to marginal value for avoiding oscillations of
function outputs, the INLOW output will never set.

Technical manual
Logic

GUID-62792FCB-B436-4034-9A08-C9FF918FF547 v1
REALCOMP function can compare the values from milli value level to giga value level and the
maximum expectable accuracy level from the function is 10 µ.
GUID-3FDD7677-1D86-42AD-A545-B66081C49B47 v4
Table 785: Number of REALCOMP instances

3 ms 8 ms 100 ms
REALCOMP 10 10 10

Technical manual
968
Monitoring
Section 18 Monitoring
18.1 Measurements IP14593-1 v3
SEMOD56123-2 v8

Power system measurements CVMMXN -
P, Q, S, I, U, f
SYMBOL-RR V1 EN-US
Phase current measurement CMMXU -
SYMBOL-SS V1 EN-US
Phase-phase voltage measurement VMMXU -
SYMBOL-UU V1 EN-US
Current sequence component CMSQI -

measurement
I1, I2, I0
SYMBOL-VV V1 EN-US
Voltage sequence component VMSQI -

measurement
U1, U2, U0
SYMBOL-TT V1 EN-US
Phase-neutral voltage measurement VNMMXU -
SYMBOL-UU V1 EN-US
Measurement functions are used for power system measurement, supervision and reporting
to the local HMI, monitoring tool within PCM600 or to station level for example, via IEC 61850.
The possibility to continuously monitor measured values of active power, reactive power,
currents, voltages, frequency, power factor etc. is vital for efficient production, transmission
and distribution of electrical energy. It provides to the system operator fast and easy overview
of the present status of the power system. Additionally, it can be used during testing and
commissioning of protection and control IEDs in order to verify proper operation and
connection of instrument transformers (CTs and VTs). During normal service by periodic
comparison of the measured value from the IED with other independent meters the proper
operation of the IED analog measurement chain can be verified. Finally, it can be used to verify
proper direction orientation for distance or directional overcurrent protection function.

Technical manual
Monitoring
The available measured values from an IED are depending on the actual
hardware (TRM) and the logic configuration made in PCM600.
All measured values can be supervised with four settable limits that is, low-low limit, low limit,
high limit and high-high limit. A zero clamping reduction is also supported, that is, the
measured value below a settable limit is forced to zero which reduces the impact of noise in
the inputs.
Dead-band supervision can be used to report measured signal value to station level when
change in measured value is above set threshold limit or time integral of all changes since the
last time value updating exceeds the threshold limit. Measure value can also be based on
periodic reporting.
Main menu/Measurement/Monitoring/Service values/CVMMXN
The measurement function, CVMMXN, provides the following power system quantities:
• P, Q and S: three phase active, reactive and apparent power

• PF: power factor
• U: phase-to-phase voltage amplitude
• I: phase current amplitude
• F: power system frequency
,
The measuring functions CMMXU, VMMXU and VNMMXU provide physical quantities:
• I: phase currents (amplitude and angle) (CMMXU)

• U: voltages (phase-to-earth and phase-to-phase voltage, amplitude and angle) (VMMXU,
VNMMXU)
The CVMMXN function calculates three-phase power quantities by using fundamental

frequency phasors (DFT values) of the measured current and voltage signals. The measured
power quantities are available either, as instantaneously calculated quantities or, averaged
values over a period of time (low pass filtered) depending on the selected settings.
It is possible to calibrate the measuring function above to get better then class 0.5
presentation. This is accomplished by angle and amplitude compensation at 5, 30 and 100% of
rated current and at 100% of rated voltage.
The power system quantities provided, depends on the actual hardware, (TRM)
and the logic configuration made in PCM600.
The measuring functions CMSQI and VMSQI provide sequence component quantities:
• I: sequence currents (positive, zero, negative sequence, amplitude and angle)

• U: sequence voltages (positive, zero and negative sequence, amplitude and angle).
The available function blocks of an IED are depending on the actual hardware (TRM) and the
logic configuration made in PCM600.

Technical manual
Monitoring
CVMMXN
I3P* S
U3P* S_RANGE
P_INST
P
P_RANGE
Q_INST
Q
Q_RANGE
PF
PF_RANGE
ILAG
ILEAD
U
U_RANGE
I
I_RANGE
F
F_RANGE
Figure 578: CVMMXN function block
CMMXU
I3P* IL1
IL1RANG
IL1ANGL
IL2
IL2RANG
IL2ANGL
IL3
IL3RANG
IL3ANGL
Figure 579: CMMXU function block
VMMXU
U3P* UL12
UL12RANG
UL12ANGL
UL23
UL23RANG
UL23ANGL
UL31
UL31RANG
UL31ANGL
Figure 580: VMMXU function block
CMSQI
I3P* 3I0
3I0RANG
3I0ANGL
I1
I1RANG
I1ANGL
I2
I2RANG
I2ANGL
Figure 581: CMSQI function block

Technical manual
Monitoring
VMSQI
U3P* 3U0
3U0RANG
3U0ANGL
U1
U1RANG
U1ANGL
U2
U2RANG
U2ANGL
Figure 582: VMSQI function block
VNMMXU
U3P* UL1
UL1RANG
UL1ANGL
UL2
UL2RANG
UL2ANGL
UL3
UL3RANG
UL3ANGL
Figure 583: VNMMXU function block
18.1.4 Signals
Table 786: CVMMXN Input signals

SIGNAL
SIGNAL
Table 787: CVMMXN Output signals

S REAL Apparent Power magnitude of deadband value
S_RANGE INTEGER Apparent Power range
P_INST REAL Active Power
P REAL Active Power magnitude of deadband value
P_RANGE INTEGER Active Power range
Q_INST REAL Reactive Power
Q REAL Reactive Power magnitude of deadband value
Q_RANGE INTEGER Reactive Power range
PF REAL Power Factor magnitude of deadband value
PF_RANGE INTEGER Power Factor range
ILAG BOOLEAN Current is lagging voltage
ILEAD BOOLEAN Current is leading voltage
U REAL Calculated voltage magnitude of deadband value
U_RANGE INTEGER Calculated voltage range

Technical manual
Monitoring

I REAL Calculated current magnitude of deadband value
I_RANGE INTEGER Calculated current range
F REAL System frequency magnitude of deadband value
F_RANGE INTEGER System frequency range
Table 788: CMMXU Input signals

SIGNAL
Table 789: CMMXU Output signals

IL1 REAL IL1 Amplitude, magnitude of reported value
IL1RANG INTEGER IL1 Amplitude range
IL1ANGL REAL IL1 Angle, magnitude of reported value
Table 790: VMMXU Input signals

SIGNAL
Table 791: VMMXU Output signals

UL12 REAL UL12 Amplitude, magnitude of reported value
UL12RANG INTEGER UL12 Amplitude range
UL12ANGL REAL UL12 Angle, magnitude of reported value

Technical manual
Monitoring
Table 792: CMSQI Input signals

SIGNAL
Table 793: CMSQI Output signals

3I0 REAL 3I0 Amplitude, magnitude of reported value
3I0RANG INTEGER 3I0 Amplitude range
3I0ANGL REAL 3I0 Angle, magnitude of reported value
I1 REAL I1 Amplitude, magnitude of reported value
I1RANG INTEGER I1 Amplitude range
I1ANGL REAL I1 Angle, magnitude of reported value
I2 REAL I2 Amplitude, magnitude of reported value
I2RANG INTEGER I2 Amplitude range
I2ANGL REAL I2 Angle, magnitude of reported value
Table 794: VMSQI Input signals

SIGNAL
Table 795: VMSQI Output signals

3U0 REAL 3U0 Amplitude, magnitude of reported value
3U0RANG INTEGER 3U0 Amplitude range
3U0ANGL REAL 3U0 Angle, magnitude of reported value
U1 REAL U1 Amplitude, magnitude of reported value
U1RANG INTEGER U1 Amplitude range
U1ANGL REAL U1 Angle, magnitude of reported value
U2 REAL U2 Amplitude, magnitude of reported value
U2RANG INTEGER U2 Amplitude range
U2ANGL REAL U2 Angle, magnitude of reported value
Table 796: VNMMXU Input signals

SIGNAL

Technical manual
Monitoring
Table 797: VNMMXU Output signals

The available setting parameters of the measurement function (MMXU, MSQI) are depending
on the actual hardware (TRM) and the logic configuration made in PCM600.
These six functions are not handled as a group, so parameter settings are only available in the
first setting group.
The following terms are used in the Unit and Description columns:
• UBase (UB): Base voltage in primary kV. This voltage is used as reference for voltage
setting. It can be suitable to set this parameter to the rated primary voltage supervised
object.
• IBase (IB): Base current in primary A. This current is used as reference for current setting.
It can be suitable to set this parameter to the rated primary current of the supervised
object.
• SBase (SB): Base setting for power values in MVA.
Table 798: CVMMXN Non group settings (basic)

SLowLim 0.0 - 2000.0 %SB 0.1 80.0 Low limit in % of SBase
SLowLowLim 0.0 - 2000.0 %SB 0.1 60.0 Low Low limit in % of SBase
SMin 0.0 - 2000.0 %SB 0.1 50.0 Minimum value in % of SBase
SMax 0.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase
SRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
PMin -2000.0 - 2000.0 %SB 0.1 -200.0 Minimum value in % of SBase
PMax -2000.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase

Technical manual
Monitoring

PRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
QMin -2000.0 - 2000.0 %SB 0.1 -200.0 Minimum value in % of SBase
QMax -2000.0 - 2000.0 %SB 0.1 200.0 Maximum value in % of SBase
QRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
PFMin -1.000 - 1.000 - 0.001 -1.000 Minimum value
PFMax -1.000 - 1.000 - 0.001 1.000 Maximum value
PFRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
UMin 0.0 - 200.0 %UB 0.1 50.0 Minimum value in % of UBase
UMax 0.0 - 200.0 %UB 0.1 200.0 Maximum value in % of UBase
URepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
IMin 0.0 - 500.0 %IB 0.1 5.0 Minimum value in % of IBase
IMax 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
IRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
FrMin 0.000 - 100.000 Hz 0.001 0.000 Minimum value
FrMax 0.000 - 100.000 Hz 0.001 70.000 Maximum value
FrRepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
On
Value groups

Technical manual
Monitoring

Mode L1, L2, L3 - - L1, L2, L3 Selection of measured current and
Arone voltage
Pos Seq
L1L2
L2L3
L3L1
L1
L2
L3
PowAmpFact 0.000 - 6.000 - 0.001 1.000 Amplitude factor to scale power
calculations
PowAngComp -180.0 - 180.0 Deg 0.1 0.0 Angle compensation for phase shift
between measured I & U
measurement, U and I
Table 799: CVMMXN Non group settings (advanced)

SDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
SZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
SHiHiLim 0.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
SHiLim 0.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
SLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
PDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
PZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
PHiHiLim -2000.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
PHiLim -2000.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
PLowLim -2000.0 - 2000.0 %SB 0.1 -120.0 Low limit in % of SBase
PLowLowLim -2000.0 - 2000.0 %SB 0.1 -150.0 Low Low limit in % of SBase
PLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
QDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
QZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
QHiHiLim -2000.0 - 2000.0 %SB 0.1 150.0 High High limit in % of SBase
QHiLim -2000.0 - 2000.0 %SB 0.1 120.0 High limit in % of SBase
QLowLim -2000.0 - 2000.0 %SB 0.1 -120.0 Low limit in % of SBase
QLowLowLim -2000.0 - 2000.0 %SB 0.1 -150.0 Low Low limit in % of SBase
QLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
PFDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
PFZeroDb 0 - 100000 m% 100 500 Magnitude zero point clamping in
0,001% of range

Technical manual
Monitoring

PFHiHiLim -1.000 - 1.000 - 0.001 1.000 High High limit (physical value)
PFHiLim -1.000 - 1.000 - 0.001 0.800 High limit (physical value)
PFLowLim -1.000 - 1.000 - 0.001 -0.800 Low limit (physical value)
PFLowLowLim -1.000 - 1.000 - 0.001 -1.000 Low Low limit (physical value)
PFLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
UDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
UZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
UHiHiLim 0.0 - 200.0 %UB 0.1 150.0 High High limit in % of UBase
UHiLim 0.0 - 200.0 %UB 0.1 120.0 High limit in % of UBase
ULowLim 0.0 - 200.0 %UB 0.1 80.0 Low limit in % of UBase
ULowLowLim 0.0 - 200.0 %UB 0.1 60.0 Low Low limit in % of UBase
ULimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
IDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
IZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
IHiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IHiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
ILowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
ILowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
ILimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
FrDbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
FrZeroDb 0 - 100000 m% 10 100 Magnitude zero point clamping in
0,001% of range
FrHiHiLim 0.000 - 100.000 Hz 0.001 65.000 High High limit (physical value)
FrHiLim 0.000 - 100.000 Hz 0.001 63.000 High limit (physical value)
FrLowLim 0.000 - 100.000 Hz 0.001 47.000 Low limit (physical value)
FrLowLowLim 0.000 - 100.000 Hz 0.001 45.000 Low Low limit (physical value)
FrLimHyst 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
UGenZeroDb 1 - 100 %UB 1 5 Zero point clamping in % of UBase
IGenZeroDb 1 - 100 %IB 1 5 Zero point clamping in % of IBase
UAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate voltage
at 5% of Ur
at 30% of Ur
at 100% of Ur
IAmpComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to calibrate current
at 5% of Ir
at 30% of Ir

Technical manual
Monitoring

at 100% of Ir
IAngComp5 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 5% of
Ir
Ir
IAngComp100 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 100%
of Ir
Table 800: CMMXU Non group settings (basic)

IL1DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
On
IL1Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
IL1Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
Value groups
IL1RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
IL1AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min

Technical manual
Monitoring
Table 801: CMMXU Non group settings (advanced)

IL1ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
IL1HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
IL1HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
at 5% of Ir
at 30% of Ir
IL1LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
IL1LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
at 100% of Ir
Ir
Ir
IAngComp100 -10.000 - 10.000 Deg 0.001 0.000 Angle calibration for current at 100%
of Ir
IL1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
0,001% of range
0,001% of range
Table 802: VMMXU Non group settings (basic)

UL12DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
On
UL12ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
UL12Min 0.0 - 200.0 %UB 0.1 50.0 Minimum value in % of UBase

Technical manual
Monitoring

UL12Max 0.0 - 200.0 %UB 0.1 200.0 Maximum value in % of UBase
UL12RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
Value groups
UL12AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
0,001% of range
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
0,001% of range
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
Table 803: VMMXU Non group settings (advanced)

UL12HiHiLim 0.0 - 200.0 %UB 0.1 150.0 High High limit in % of UBase
UL12HiLim 0.0 - 200.0 %UB 0.1 120.0 High limit in % of UBase
UL12LowLim 0.0 - 200.0 %UB 0.1 80.0 Low limit in % of UBase
UL12LowLowLim 0.0 - 200.0 %UB 0.1 60.0 Low Low limit in % of UBase
at 100% of Ur
UL12LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,

Technical manual
Monitoring

Table 804: CMSQI Non group settings (basic)

3I0DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
3I0ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
3I0Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
3I0Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
3I0RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
Value groups
3I0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
3I0AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
On
I1DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
I1ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
I1Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase
I1Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
I1RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
I1AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
I2DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
I2ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
I2Min 0.0 - 500.0 %IB 0.1 50.0 Minimum value in % of IBase

Technical manual
Monitoring

I2Max 0.0 - 500.0 %IB 0.1 200.0 Maximum value in % of IBase
I2RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
I2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
I2AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
Table 805: CMSQI Non group settings (advanced)

3I0HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
3I0HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
3I0LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
3I0LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
I1HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
I1HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
I1LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
I1LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
I1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
I2HiHiLim 0.0 - 500.0 %IB 0.1 150.0 High High limit in % of IBase
I2HiLim 0.0 - 500.0 %IB 0.1 120.0 High limit in % of IBase
I2LowLim 0.0 - 500.0 %IB 0.1 80.0 Low limit in % of IBase
I2LowLowLim 0.0 - 500.0 %IB 0.1 60.0 Low Low limit in % of IBase
Table 806: VMSQI Non group settings (basic)

3U0DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
3U0ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
3U0Min 0.0 - 200.0 %UB 0.1 50.0 Minimum value in % of UBase
3U0Max 0.0 - 200.0 %UB 0.1 200.0 Maximum value in % of UBase
Value groups
3U0RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
3U0LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
3U0AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)

Technical manual
Monitoring

On
U1DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
U1ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
U1Min 0.0 - 200.0 %UB 0.1 50.0 Minimum value in % of UBase
U1Max 0.0 - 200.0 %UB 0.1 200.0 Maximum value in % of UBase
U1RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
U1LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
U1AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
U2DbRepInt 1 - 100000 Type 1 10 Cycl: Report interval (s), Db: In 0,001%
U2ZeroDb 0 - 100000 m% 500 1000 Magnitude zero point clamping in
0,001% of range
U2Min 0.0 - 200.0 %UB 0.1 50.0 Minimum value in % of UBase
U2Max 0.0 - 200.0 %UB 0.1 200.0 Maximum value in % of UBase
U2RepTyp Cyclic - - Cyclic Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
U2LimHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range,
U2AngDbRepInt 1 - 100000 s 1 10 Cyclic report interval (s)
UAmpPreComp5 -10.000 - 10.000 % 0.001 0.000 Amplitude factor to pre-calibrate
voltage at 5% of Ur
voltage at 30% of Ur
voltage at 100% of Ur
Table 807: VMSQI Non group settings (advanced)

3U0HiHiLim 0.0 - 200.0 %UB 0.1 150.0 High High limit in % of UBase
3U0HiLim 0.0 - 200.0 %UB 0.1 120.0 High limit in % of UBase
3U0LowLim 0.0 - 200.0 %UB 0.1 80.0 Low limit in % of UBase
3U0LowLowLim 0.0 - 200.0 %UB 0.1 60.0 Low Low limit in % of UBase
U1HiHiLim 0.0 - 200.0 %UB 0.1 150.0 High High limit in % of UBase
U1HiLim 0.0 - 200.0 %UB 0.1 120.0 High limit in % of UBase
U1LowLim 0.0 - 200.0 %UB 0.1 80.0 Low limit in % of UBase
U1LowLowLim 0.0 - 200.0 %UB 0.1 60.0 Low Low limit in % of UBase

Technical manual
Monitoring

U2HiHiLim 0.0 - 200.0 %UB 0.1 150.0 High High limit in % of UBase
U2HiLim 0.0 - 200.0 %UB 0.1 120.0 High limit in % of UBase
U2LowLim 0.0 - 200.0 %UB 0.1 80.0 Low limit in % of UBase
U2LowLowLim 0.0 - 200.0 %UB 0.1 60.0 Low Low limit in % of UBase
Table 808: VNMMXU Non group settings (basic)

On
0,001% of range
Value groups
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
0,001% of range
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
0,001% of range

Technical manual
Monitoring

Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
Table 809: VNMMXU Non group settings (advanced)

at 100% of Ur

Table 810: CVMMXN Monitored data

S REAL - MVA Apparent Power magnitude of
deadband value
P REAL - MW Active Power magnitude of deadband
value
Q REAL - MVAr Reactive Power magnitude of
deadband value
PF REAL - - Power Factor magnitude of deadband
value
U REAL - kV Calculated voltage magnitude of
deadband value
I REAL - A Calculated current magnitude of
deadband value
F REAL - Hz System frequency magnitude of
deadband value

Technical manual
Monitoring
Table 811: CMMXU Monitored data

IL1 REAL - A IL1 Amplitude, magnitude of reported
value
IL1ANGL REAL - deg IL1 Angle, magnitude of reported value
value
IL2ANGL REAL - deg IL2 Angle, magnitude of reported
value
value
IL3ANGL REAL - deg IL3 Angle, magnitude of reported
value
Table 812: VMMXU Monitored data

UL12 REAL - kV UL12 Amplitude, magnitude of
reported value
UL12ANGL REAL - deg UL12 Angle, magnitude of reported
value
reported value
value
reported value
value
Table 813: CMSQI Monitored data

3I0 REAL - A 3I0 Amplitude, magnitude of reported
value
3I0ANGL REAL - deg 3I0 Angle, magnitude of reported
value
I1 REAL - A I1 Amplitude, magnitude of reported
value
I1ANGL REAL - deg I1 Angle, magnitude of reported value
I2 REAL - A I2 Amplitude, magnitude of reported
value
I2ANGL REAL - deg I2 Angle, magnitude of reported value

Technical manual
Monitoring
Table 814: VMSQI Monitored data

3U0 REAL - kV 3U0 Amplitude, magnitude of
reported value
3U0ANGL REAL - deg 3U0 Angle, magnitude of reported
value
U1 REAL - kV U1 Amplitude, magnitude of reported
value
U1ANGL REAL - deg U1 Angle, magnitude of reported value
U2 REAL - kV U2 Amplitude, magnitude of reported
value
U2ANGL REAL - deg U2 Angle, magnitude of reported value
Table 815: VNMMXU Monitored data

UL1 REAL - kV UL1 Amplitude, magnitude of reported
value
value
reported value
value
reported value
value
18.1.7.1 Measurement supervision SEMOD54417-130 v4
options.

Phase angle reference SEMOD54417-303 v5

All phase angles are presented in relation to a defined reference channel. The General setting
parameter PhaseAngleRef defines the reference, see section "Analog inputs".

Technical manual
Monitoring
Zero point clamping SEMOD54417-137 v4

input signal to be ignored. The zero point clamping limit is a general setting (XZeroDb where X
equals S, P, Q, PF, U, I, F, IL1-3, UL1-3, UL12-31, I1, I2, 3I0, U1, U2 or 3U0). Observe that this
measurement supervision zero point clamping might be overridden by the zero point clamping
used for the measurement values within CVMMXN.

modes of operating:
X_RANGE = 3
High-high limit
High limit
X_RANGE=0
X_RANGE=0 t
Low limit
X_RANGE=2
Low-low limit
X_RANGE=4


are available:


Technical manual
Monitoring


reporting.
Y
(1st)
Y3 Value Reported
Y2 Y4
Y1 Y5
t (*) t (*) t (*) t (*)
t
Value 1
Value 2
Value 3
Value 4
Value 5


Technical manual
Monitoring
Value Reported
Y

Value Reported
(1st)
Y3 Y
Y
Y2 Y
Y
Y
Y
Y1

set limits.

Y4 and Y5).

Technical manual
Monitoring
Y A1 >=
A >= pre-set value
A2 >=
Y3 A3 + A4 + A5 + A6 + A7 >=
pre-set value
Y2 A1 A2
A4 A6
Value
(1st) Value
A Reported Y5
Reported Value
Reported Value
Y1 Reported
t
Amplitude deadband and xx cyclic (xx: 5 sec, 30 sec, 1 min) GUID-297D6481-EDFA-4A38-BC9D-29538491254D v1

In this mode of operation, the reporting interval will be cyclic like in reporting type cyclic. This
cyclic time has three options: 5sec, 30 sec and 1 min.
Additionally, if a measuring value has changed from the last reported value, and the change is
larger than ±ΔY predefined limits that are set by user (XDbRepInt), then the measuring channel
reports the new value to a higher level immediately irrespective of cyclic trigger. See Figure
588 for example.

Technical manual
Monitoring
Value
Y1...Y7 : Cyclic reported values, depending upon time Δt.

Y’ and Y” : Deadband reported value, change is greater than setting
Value
Reported
Y5
Y6
Y’ -ΔY
+ΔY
Y1 Y7
Y2 Y4 Y”
Y3
Δt Δt Δt Δt Δt Δt
Time
Figure 588: Example of value reporting in mode dead band and xx cyclic (xx : 5 sec , 30
sec, 1 min)
18.1.7.2 Measurements CVMMXN SEMOD54417-172 v3
Mode of operation SEMOD54417-174 v7

The measurement function must be connected to three-phase current and three-phase voltage
input in the configuration tool (group signals), but it is capable to measure and calculate
above mentioned quantities in nine different ways depending on the available VT inputs
connected to the IED. The end user can freely select by a parameter setting, which one of the
nine available measuring modes shall be used within the function. Available options are
summarized in the following table:

Technical manual
Monitoring
Set value Formula used for complex, Formula used for voltage Comment
for three-phase power calculation and current magnitude
parameter calculation
“Mode”
1 L1, L2, L3 Used when three phase-to-
* * *
S = U L1 × I L1 + U L 2 × I L 2 + U L 3 × I L 3 U = ( U L1 + U L 2 + U L 3 ) / 3 earth voltages are available
EQUATION1385 V1 EN-US (Equation 187) I = ( I L1 + I L 2 + I L 3 ) / 3

2 Arone Used when two phase-to-
S = U L1 L 2 × I L*1 - U L 2 L 3 × I L* 3 U = ( U L1 L 2 + U L 2 L 3 ) / 2 phase voltages are
available
(Equation 189)
I = ( I L1 + I L 3 ) / 2
3 PosSeq Used when only
S = 3 × U PosSeq × I PosSeq
*
U = 3 × U PosSeq symmetrical three phase
power shall be measured
(Equation 191)
I = I PosSeq
4 L1L2 Used when only UL1L2
S = U L1 L 2 × ( I L*1 - I L* 2 ) U = U L1 L 2 phase-to-phase voltage is
available
(Equation 193)
I = ( I L1 + I L 2 ) / 2

S = U L 2 L 3 × ( I L* 2 - I L* 3 ) U = U L2 L3 phase-to-phase voltage is
available
(Equation 195)
I = ( I L2 + I L3 ) / 2

S = U L 3 L1 × ( I L* 3 - I L*1 ) U = U L 3 L1 phase-to-phase voltage is
available
(Equation 197)
I = ( I L 3 + I L1 ) / 2

7 L1 Used when only UL1 phase-
S = 3 × U L1 × I L*1 U = 3 × U L1 to-earth voltage is
available
(Equation 199)
I = I L1

S = 3 × U L 2 × I L* 2 U = 3 × U L2 to-earth voltage is
available
(Equation 201)
I = IL2

S = 3 × U L 3 × I L* 3 U = 3 × U L3 to-earth voltage is
available
(Equation 203)
I = I L3

* means complex conjugated value

Technical manual
Monitoring
It shall be noted that only in the first two operating modes that is, 1 & 2 the measurement
function calculates the three-phase power accurately. In other operating modes that is, from 3
to 9 it calculates the three-phase power under assumption that the power system is fully
symmetrical. Once the complex apparent power is calculated then the P, Q, S, & PF are
calculated in accordance with the following formulas:
P = Re( S )
Q = Im( S )
S = S = P2 + Q2
PF = cosj = P
S
Additionally to the power factor value, the two binary output signals from the function are
provided which indicates the angular relationship between the current and voltage phasors.
Binary output signal ILAG is set TRUE when current phasor is lagging behind voltage phasor.
Binary output signal ILEAD is set TRUE when current phasor is leading the voltage phasor.
Each analogue output has a corresponding supervision level output (X_RANGE). The output
signal is an integer in the interval 0-4, see section "Measurement supervision".
Calibration of analog inputs SEMOD54417-293 v5

Measured currents and voltages used in the CVMMXN function can be calibrated to get 0.5
class measuring accuracy. This is achieved by amplitude and angle compensation at 5, 30 and
100% of rated current and voltage. The compensation below 5% and above 100% is constant
and linear in between, see example in figure 589.

Technical manual
Monitoring

The first current and voltage phase signal, in the group signals will be used as reference. The
amplitude and angle compensation will be used for other related input signals.
Low pass filtering SEMOD54417-233 v4

introduce the recursive, low pass filtering of the measured values for P, Q, S, U, I and power
factor. This will make slower measurement response to the step changes in the measured
quantity. Filtering is performed in accordance with the following recursive formula:
X = k × X Old + (1 - k ) × X Calculated
where:
X is a new measured value (that is P, Q, S, U, I or PF) to be given out from the function
XOld is the measured value given from the measurement function in previous execution cycle
XCalculated is the new calculated value in the present execution cycle
given out without any filtering (that is, without any additional delay). When k is set to value
bigger than 0, the filtering is enabled. Appropriate value of k shall be determined separately
for every application. Some typical value for k =0.14.
Zero point clamping SEMOD54417-250 v5

In order to avoid erroneous measurements when either current or voltage signal is not
present, it is possible for the end user to set the amplitudeIGenZeroDb level for current and
voltage measurement UGenZeroDb is forced to zero. When either current or voltage

Technical manual
Monitoring
measurement is forced to zero automatically the measured values for power (P, Q and S) and
power factor are forced to zero as well. Since the measurement supervision functionality,
included in CVMMXN, is using these values the zero clamping will influence the subsequent
supervision (observe the possibility to do zero point clamping within measurement
supervision, see section "Measurement supervision").
Compensation facility SEMOD54417-253 v5

In order to compensate for small amplitude and angular errors in the complete measurement
chain (CT error, VT error, IED input transformer errors and so on.) it is possible to perform on
site calibration of the power measurement. This is achieved by setting the complex constant
which is then internally used within the function to multiply the calculated complex apparent
power S. This constant is set as amplitude (setting parameter PowAmpFact, default value
1.000) and angle (setting parameter PowAngComp, default value 0.0 degrees). Default values
for these two parameters are done in such way that they do not influence internally calculated
value (complex constant has default value 1). In this way calibration, for specific operating
range (for example, around rated power) can be done at site. However, to perform this
calibration it is necessary to have an external power meter with high accuracy class available.
Directionality SEMOD54417-256 v7
If CT earthing parameter is set as described in section "Analog inputs", active and reactive
power will be always measured towards the protected object. This is shown in the following
figure 590.
Busbar
IED
P Q
Protected
Object
IEC09000038-1-EN V1 EN-US
Figure 590: Internal IED directionality convention for P & Q measurements

Practically, it means that active and reactive power will have positive values when they flow
from the busbar towards the protected object and they will have negative values when they
flow from the protected object towards the busbar.
In some application, for example, when power is measured on the secondary side of the power
transformer it might be desirable, from the end client point of view, to have actually opposite
directional convention for active and reactive power measurements. This can be easily
achieved by setting parameter PowAngComp to value of 180.0 degrees. With such setting the

Technical manual
Monitoring
active and reactive power will have positive values when they flow from the protected object
towards the busbar.
Frequency SEMOD54417-261 v2
Frequency is actually not calculated within measurement block. It is simply obtained from the
pre-processing block and then just given out from the measurement block as an output.
18.1.7.3 Phase current measurement CMMXU SEMOD54417-264 v7
The Phase current measurement (CMMXU) function must be connected to three-phase current
input in the configuration tool to be operable. Currents handled in the function can be
calibrated to get better then 0.5 class measuring accuracy for internal use, on the outputs and
IEC 61850. This is achieved by amplitude and angle compensation at 5, 30 and 100% of rated
current. The compensation below 5% and above 100% is constant and linear in between, see
figure 589.
Phase currents (amplitude and angle) are available on the outputs and each amplitude output
has a corresponding supervision level output (ILx_RANG). The supervision output signal is an
integer in the interval 0-4, see section "Measurement supervision".
18.1.7.4 Phase-phase and phase-neutral voltage measurements VMMXU, VNMMXU SEMOD54417-268 v6
The voltage function must be connected to three-phase voltage input in the configuration tool
to be operable. Voltages are handled in the same way as currents when it comes to class 0.5
calibrations, see above.
The voltages (phase-to-earth or phase-to-phase voltage, amplitude and angle) are available on
the outputs and each amplitude output has a corresponding supervision level output
(ULxy_RANG). The supervision output signal is an integer in the interval 0-4, see
section "Measurement supervision".
18.1.7.5 Voltage and current sequence measurements VMSQI, CMSQI SEMOD54417-299 v6
The measurement functions must be connected to three-phase current (CMSQI) or voltage

(VMSQI) input in the configuration tool to be operable. No outputs, other than X_RANG, are
calculated within the measuring blocks and it is not possible to calibrate the signals. Input
signals are obtained from the pre-processing block and transferred to corresponding output.
Positive, negative and three times zero sequence quantities are available on the outputs
(voltage and current, amplitude and angle). Each amplitude output has a corresponding
supervision level output (X_RANGE). The output signal is an integer in the interval 0-4, see
section "Measurement supervision".

M12386-1 v16
Table 816: Power system measurement CVMMXN technical data

Frequency (0.95-1.05) x fr ±2.0 mHz
Voltage (10 to 300) V ±0.3% of U at U≤ 50 V

±0.2% of U at U> 50 V
Current (0.1-4.0) x Ir ±0.8% of I at 0.1 x Ir< I < 0.2 x Ir
± 0.5% of I at 0.2 x Ir 0.5 x Sr
(100 to 220) V ±0.2% of P

(0.5-2.0) x Ir
cos φ> 0.7
Reactive power, Q (10 to 300) V ±0.5% of Sr at S ≤0.5 x Sr
(0.1-4.0) x Ir ±0.5% of S at S > 0.5 x Sr
(100 to 220) V ±0.2% of Q

(0.5-2.0) x Ir
cos φ< 0.7
Apparent power, S (10 to 300) V ±0.5% of Sr at S ≤0.5 x Sr
(0.1-4.0) x Ir ±0.5% of S at S >0.5 x Sr
(100 to 220) V ±0.2% of S

(0.5-2.0) x Ir
Power factor, cos (φ) (10 to 300) V <0.02

(0.1-4.0) x Ir
(100 to 220) V <0.01

(0.5-2.0) x Ir
GUID-5E04B3F9-E1B7-4974-9C0B-DE9CD4A2408F v6
Table 817: CMMXU technical data

Current at symmetrical load (0.1-4.0) × Ir ±0.3% of Ir at I ≤ 0.5 × Ir
±0.3% of I at I > 0.5 × Ir
Phase angle at symmetrical (0.1-4.0) × Ir ±1.0 degrees at 0.1 × Ir 50 V
Phase angle (10 to 300) V ±0.5 degrees at U ≤ 50 V
±0.2 degrees at U > 50 V
GUID-9B8A7FA5-9C98-4CBD-A162-7112869CF030 v5
Table 819: CMSQI technical data

Current positive sequence, I1 (0.1–4.0) × Ir ±0.3% of Ir at I ≤ 0.5 × Ir
Three phase settings ±0.3% of I at I > 0.5 × Ir
Current zero sequence, 3I0 (0.1–1.0) × Ir ±0.3% of Ir at I ≤ 0.5 × Ir

Current negative sequence, I2 (0.1–1.0) × Ir ±0.3% of Ir at I ≤ 0.5 × Ir

Phase angle (0.1–4.0) × Ir ±1.0 degrees at 0.1 × Ir < I ≤ 0.5 × Ir

±0.5 degrees at 0.5 × Ir 50 V
Voltage zero sequence, 3U0 (10 to 300) V ±0.5% of U at U ≤ 50 V
±0.2% of U at U > 50 V
Voltage negative sequence, U2 (10 to 300) V ±0.5% of U at U ≤ 50 V
±0.2% of U at U > 50 V
GUID-ED634B6D-9918-464F-B6A4-51B78129B819 v6
Table 821: VNMMXU technical data

Voltage (5 to 175) V ±0.5% of U at U ≤ 50 V
±0.2% of U at U > 50 V
18.2 Gas medium supervision SSIMG GUID-358AD8F8-AE06-4AEA-9969-46E5299D5B4B v3
GUID-AD96C26E-C3E5-4B21-9ED6-12E540954AC3 v4

Insulation gas monitoring function SSIMG - 63
18.2.2 Functionality GUID-0692CD0D-F33E-4370-AC91-B216CAAAFC28 v6
Insulation supervision for gas medium (SSIMG) is used for monitoring the circuit breaker
condition. Binary information based on the gas pressure in the circuit breaker is used as input
signals to the function. In addition, the function generates alarms based on received
information.

GUID-94B75A6D-973D-4F1F-8643-F2128AD31CC4 v3
SSIMG
BLOCK LOCKOUT
BLKALM PRESLO
SENPRES TEMPLO
SENTEMP ALARM
SENPRESALM PRESALM
SENPRESLO TEMPALM
SETPLO PRESSURE
SETTLO TEMP
RESETLO
Figure 591: SSIMG function block

Technical manual
Monitoring
18.2.4 Signals
GUID-89749F71-CAEB-4A57-A1F0-148CCF68E97E v2
Table 822: SSIMG Input signals

BLKALM BOOLEAN 0 Block all the alarms
SENPRES REAL 0.0 Pressure input from CB
SENTEMP REAL 0.0 Temperature of the insulation medium from CB
SENPRESALM BOOLEAN 0 Pressure alarm signal
SENPRESLO BOOLEAN 0 Pressure lockout signal
SETPLO BOOLEAN 0 Set pressure lockout
SETTLO BOOLEAN 0 Set temperature lockout
RESETLO BOOLEAN 0 Reset pressure and temperature lockout
Table 823: SSIMG Output signals

LOCKOUT BOOLEAN Pressure below lockout level or temperature above lockout
level
PRESLO BOOLEAN Pressure below lockout level
TEMPLO BOOLEAN Temperature above lockout level
ALARM BOOLEAN Pressure below alarm level or temperature above alarm level
PRESALM BOOLEAN Pressure below alarm level
TEMPALM BOOLEAN Temperature above alarm level
PRESSURE REAL Pressure service value
TEMP REAL Temperature of the insulation medium
18.2.5 Settings
Table 824: SSIMG Group settings (basic)

On
PresAlmLimit 1.00 - 100.00 - 0.01 5.00 Alarm setting for pressure
PresLOLimit 1.00 - 100.00 - 0.01 3.00 Pressure lockout setting
TempAlarmLimit -40.00 - 200.00 - 0.01 30.00 Temperature alarm level setting of the
medium
TempLOLimit -40.00 - 200.00 - 0.01 30.00 Temperature lockout level of the
medium
tPressureAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for pressure alarm
tPressureLO 0.000 - 60.000 s 0.001 0.000 Time delay for pressure lockout
indication
tTempAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for temperature alarm

Technical manual
Monitoring

tTempLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for temperture lockout
tResetPresAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for pressure alarm
tResetPresLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for pressure lockout
tResetTempLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture
lockout
tResetTempAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture alarm

Table 825: SSIMG Monitored data

PRESSURE REAL - - Pressure service value
TEMP REAL - deg Temperature of the insulation
medium
18.2.7 Operation principle GUID-359458EA-FFAA-4A44-A8E8-9469CA069C80 v7
Gas medium supervision SSIMG is used to monitor the gas pressure in the circuit breaker.
Binary inputs of gas density SENPRESALM, SENPRESLO, and gas pressure signal SENPRES, are
taken into account to initiate the alarm PRESALM and the lockout PRESLO. When SENPRES is
less than PresAlmLimit or binary signal from CB SENPRESALM is high, the gas pressure alarm
PRESALM will be initiated. Similarly, if pressure input SENPRES is less than PresLOLimit or
binary signal from CB SENPRESLO is high, PRESLO will be initiated.
There may be sudden change in pressure of the gas for a very small time, for which the
function need not to initiate any alarm. To avoid the intermittent alarm, two time delays
tPressureAlarm or tPressureLO have been included. If the pressure goes below the settings for
more than these time delays, the corresponding alarm PRESALM or lockout PRESLO will be
initiated. The SETPLO binary input is used for setting the gas pressure lockout PRESLO. The
PRESLO output retains the last value until it is reset by using the binary input RESETLO. The
binary input BLKALM can be used to block the alarms, and the BLOCK input can block both
alarm and the lockout indications.
Temperature of the medium is available from the input signal of temperature. The signal is
monitored to detect high temperature.
When temperature input SENTEMP is above TempAlarmLimit, temperature alarm TEMPALM

will be initiated. Similarly, if temperature input SENTEMP is above TempLOLimit, temperature
lockout TEMPLO will be initiated.
There may be sudden change in temperature of the medium for a very small time, for which the
tTempAlarm or tTempLockOut have been included. If the temperature goes above the settings
for more than these time delays, the corresponding alarm TEMPALM or lockout TEMPLO will be
initiated. The SETTLO binary input is used for setting the temperature lockout TEMPLO. The
TEMPLO output retains the last value until it is reset by using the binary input RESETLO. The
binary input BLKALM can be used to block the alarms, and the BLOCK input can block both
The output ALARM goes high if the pressure alarm condition or the temperature alarm
condition exists inside the circuit breaker. The output ALARM can be blocked by activating
BLOCK or BLKALM inputs.

Technical manual
Monitoring
The output LOCKOUT goes high if the pressure lockout condition or the temperature lockout
condition exists inside the circuit breaker and it resets by using the binary input RESETLO. The
output LOCKOUT can be blocked by activating BLOCK input.

GUID-F034B396-6600-49EF-B0A5-8ED96766A6A0 v8
Table 826: SSIMG Technical data

Pressure alarm level 1.00-100.00 ±10.0% of set value
Pressure lockout level 1.00-100.00 ±10.0% of set value
Temperature alarm level -40.00-200.00 ±2.5% of set value
Temperature lockout level -40.00-200.00 ±2.5% of set value
Time delay for pressure alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for pressure (0.000-60.000) s ±0.2% or ±250ms whichever is
alarm greater
Time delay for pressure lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for temperature alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
alarm greater
Time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
lockout greater
18.3 Liquid medium supervision SSIML GUID-37669E94-4830-4C96-8A67-09600F847F23 v3
GUID-4CE96EF6-42C6-4F2E-A190-D288ABF766F6 v3

Insulation liquid monitoring function SSIML - 71
18.3.2 Functionality GUID-3B1A665F-60A5-4343-85F4-AD9C066CBE8D v7
Insulation supervision for liquid medium (SSIML) is used for monitoring the oil insulated device
condition. For example, transformers, shunt reactors, and so on. Binary information based on
the oil level in the oil insulated devices are used as input signals to the function. In addition,
the function generates alarms based on the received information.

Technical manual
Monitoring
18.3.3 Function block GUID-AC82A86C-495D-4CBD-9BF9-3CC760591AA9 v3
SSIML
BLOCK LOCKOUT
BLKALM LVLLO
SENLEVEL TEMPLO
SENTEMP ALARM
SENLVLALM LVLALM
SENLVLLO TEMPALM
SETLLO LEVEL
SETTLO TEMP
RESETLO
Figure 592: SSIML function block
18.3.4 Signals
GUID-0C378BB3-2104-417F-94B5-16EFC55151FE v2
Table 827: SSIML Input signals

SENLEVEL REAL 0.0 Level input from CB
SENTEMP REAL 0.0 Temperature of the insulation medium from CB
SENLVLALM BOOLEAN 0 Level alarm signal
SENLVLLO BOOLEAN 0 Level lockout signal
SETLLO BOOLEAN 0 Set level lockout
SETTLO BOOLEAN 0 Set temperature lockout
RESETLO BOOLEAN 0 Reset level and temperature lockout
Table 828: SSIML Output signals

LOCKOUT BOOLEAN Level below lockout level or temperature above lockout level
LVLLO BOOLEAN Level below lockout level
TEMPLO BOOLEAN Temperature above lockout level
ALARM BOOLEAN Level below alarm level or temperature above alarm level
LVLALM BOOLEAN Level below alarm level
TEMPALM BOOLEAN Temperature above alarm level
LEVEL REAL Level service value
TEMP REAL Temperature of the insulation medium

Technical manual
Monitoring
18.3.5 Settings
Table 829: SSIML Group settings (basic)

On
LevelAlmLimit 1.00 - 100.00 - 0.01 5.00 Alarm setting for level
LevelLOLimit 1.00 - 100.00 - 0.01 3.00 Level lockout setting
TempAlarmLimit -40.00 - 200.00 - 0.01 30.00 Temperature alarm level setting of the
medium
TempLOLimit -40.00 - 200.00 - 0.01 30.00 Temperature lockout level of the
medium
tLevelAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for level alarm
tLevelLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for level lockout indication
tTempAlarm 0.000 - 60.000 s 0.001 0.000 Time delay for temperature alarm
tTempLockOut 0.000 - 60.000 s 0.001 0.000 Time delay for temperture lockout
tResetLevelAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for level alarm
tResetLevelLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for level lockout
tResetTempLO 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture
lockout
tResetTempAlm 0.000 - 60.000 s 0.001 0.000 Reset time delay for temperture alarm

Table 830: SSIML Monitored data

LEVEL REAL - - Level service value
TEMP REAL - deg Temperature of the insulation
medium
18.3.7 Operation principle GUID-F4340B59-90D0-4EA7-9FD8-F21D425C884A v8
Liquid medium supervision SSIML is used to monitor the oil level in the oil insulated devices.
Binary inputs of oil level SENLVLALM, SENLVLLO and oil level signal SENLEVEL are taken into
account to initiate the alarm LVLALM and the lockout LVLLO. When SENLEVEL is less than
LevelAlmLimit or binary signal from oil insulated device SENLVLALM is high, the oil level
indication alarm LVLALM will be initiated. Similarly, if oil level input SENLEVEL is less than
LevelLOLimit or binary signal from oil insulated device SENLVLLO is high, the oil level
indication lockout LVLLO will be initiated.
There may be sudden change in oil level for a very small time, for which the function need not
to initiate any alarm. To avoid the intermittent alarm, two time delays tLevelAlarm or
tLevelLockOut have been included. If the oil level goes below the settings for more than these
time delays, the corresponding alarm LVLALM or lockout LVLLO will be initiated. The SETLLO
binary input is used for setting the liquid level lockout LVLLO. The LVLLO output retains the
last value until it is reset by using the binary input RESETLO. The binary input BLKALM can be
used for blocking the alarms, and the BLOCK input can block both alarms and the lockout
indication.

Technical manual
Monitoring
Temperature of the medium is available from the input signal of temperature. The signal is
monitored to detect high temperature.
When temperature input SENTEMP is above TempAlarmLimit, temperature alarm TEMPALM

will be initiated. Similarly, if temperature input SENTEMP is above TempLOLimit, temperature
lockout TEMPLO will be initiated.
There may be sudden change in temperature of the medium for a very small time, for which the
tTempAlarm or tTempLockOuthave been included. If the temperature goes above the settings
for more than these time delays, the corresponding alarm TEMPALM or lockout TEMPLO will be
initiated. The SETTLO binary input is used for setting the temperature lockout TEMPLO. The
TEMPLO output retains the last value until it is reset by using the binary input RESETLO. The
binary input BLKALM can be used for blocking the alarms, and the BLOCK input can block both
The output ALARM goes high if the level alarm condition or the temperature alarm condition
exists in the oil insulated devices. The output ALARM can be blocked by activating BLOCK or
BLKALM inputs.
The output LOCKOUT goes high if the pressure lockout condition or the temperature lockout
condition exists in the oil insulated devices and it resets by using the binary input RESETLO.
The output LOCKOUT can be blocked by activating BLOCK input.

GUID-83B0F607-D898-403A-94FD-7FE8D45C73FF v8
Table 831: SSIMLTechnical data

Oil alarm level 1.00-100.00 ±10.0% of set value
Oil lockout level 1.00-100.00 ±10.0% of set value
Temperature alarm level -40.00-200.00 ±2.5% of set value
Temperature lockout level -40.00-200.00 ±2.5% of set value
Time delay for oil alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for oil alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for oil lockout (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Time delay for temperature alarm (0.000-60.000) s ±0.2% or ±250ms whichever is
greater
Reset time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
alarm greater
Time delay for temperature (0.000-60.000) s ±0.2% or ±250ms whichever is
lockout greater
18.4 Breaker monitoring SSCBR
18.4.1 Identification GUID-0FC081B2-0BC8-4EB8-9529-B941E51F18EE v7

Breaker monitoring SSCBR - -

Technical manual
Monitoring
18.4.2 Functionality GUID-E1FD74C3-B9B6-4E11-AA1B-7E7F822FB4DD v13
The circuit breaker condition monitoring function (SSCBR) is used to monitor different
parameters of the breaker condition. The breaker requires maintenance when the number of
operations reaches a predefined value. For a proper functioning of the circuit breaker, it is
essential to monitor the circuit breaker operation, spring charge indication or breaker wear,
travel time, number of operation cycles and estimate the accumulated energy during arcing
periods.
18.4.3 Function block GUID-B002ED61-5092-4E9E-AEB6-E4A4310BDAF2 v11
SSCBR
I3P* OPENPOS
BLOCK CLOSEPOS
BLKALM INVDPOS
TRIND TRCMD
POSOPEN TRVTOPAL
POSCLOSE TRVTCLAL
PRESALM OPERALM
PRESLO OPERLO
SPRCHRST CBLIFEAL
SPRCHRD MONALM
RSTCBWR IPOWALPH
RSTTRVT IPOWLOPH
RSTIPOW SPCHALM
RSTSPCHT GPRESALM
GPRESLO
Figure 593: SSCBR function block
18.4.4 Signals
Table 832: SSCBR Input signals

SIGNAL
BLOCK BOOLEAN 0 Block all the alarm and lockout indication
TRIND BOOLEAN 0 Trip command from trip circuit
PRESALM BOOLEAN 0 Pressure alarm indication from CB
PRESLO BOOLEAN 0 Pressure lockout indication from CB
SPRCHRST BOOLEAN 0 CB spring charging started indication signal
SPRCHRD BOOLEAN 0 CB spring charged indication signal
RSTCBWR BOOLEAN 0 Reset of CB remaining life and operation counter
RSTTRVT BOOLEAN 0 Reset of CB closing and opening travel times
RSTIPOW BOOLEAN 0 Reset of accumulated I^CurrExponent
RSTSPCHT BOOLEAN 0 Reset of CB spring charging time

Technical manual
Monitoring
Table 833: SSCBR Output signals

OPENPOS BOOLEAN CB is in open position
CLOSEPOS BOOLEAN CB is in closed position
INVDPOS BOOLEAN CB is in Invalid Position
TRCMD BOOLEAN Open command issued to CB
TRVTOPAL BOOLEAN CB open travel time exceeded set value
TRVTCLAL BOOLEAN CB close travel time exceeded set value
OPERALM BOOLEAN Number of CB operations exceeds alarm limit
OPERLO BOOLEAN Number of CB operations exceeds lockout limit
CBLIFEAL BOOLEAN Remaining life of CB reduced to Life alarm level
MONALM BOOLEAN CB 'not operated for long time' alarm
IPOWALPH BOOLEAN Accum I^CurrExponent integr over CB open travel time
exceeds alarm limit
IPOWLOPH BOOLEAN Accum I^CurrExponent integr over CB open travel time
exceeds lockout limit
SPCHALM BOOLEAN Spring charging time has crossed the set value
GPRESALM BOOLEAN Pressure below alarm level
GPRESLO BOOLEAN Pressure below lockout level
18.4.5 Settings
Table 834: SSCBR Non group settings (basic)

On
Value groups
PhSel Phase L1 - - Phase L1 Phase selection
Phase L2
Phase L3
RatedOperCurr 100.00 - 5000.00 A 0.01 1000.00 Rated operating current of the
breaker
OperNoRated 1 - 99999 - 1 10000 Number of operations possible at
rated current
RatedFltCurr 500.00 - 99999.99 A 0.01 5000.00 Rated fault current of the breaker
OperNoFault 1 - 10000 - 1 1000 Number of operations possible at
rated fault current
tTrOpenAlm 0.000 - 0.200 s 0.001 0.040 Alarm level for open travel time
tTrCloseAlm 0.000 - 0.200 s 0.001 0.040 Alarm level for close travel time
OperAlmLevel 0 - 9999 - 1 200 Alarm level for number of operations
OperLOLevel 0 - 9999 - 1 300 Lockout level for number of
operations
AccSelCal Aux Contact - - Trip Signal Accumulated energy calculation
Trip Signal selection

Technical manual
Monitoring

CurrExponent 0.50 - 3.00 - 0.01 2.00 Current exponent value used for
energy calculation
AccStopCurr 5.00 - 100.00 %IB 0.01 10.00 RMS current level below which energy
accumulation stops
AlmAccCurrPwr 0.00 - 20000.00 - 0.01 2500.00 Alarm level for accumulated
I^CurrExponent integrated over CB
open travel time
LOAccCurrPwr 0.00 - 20000.00 - 0.01 2500.00 Lockout level for accumulated
I^CurrExponent integrated over CB
open travel time
SpChAlmTime 0.00 - 60.00 s 0.01 1.00 Alarm level for spring charging time
InitCBRemLife 1 - 99999 - 1 10000 Initial value for remaining life
estimates
InactiveAlDays 0 - 9999 Day 1 2000 Alarm level for inactive days counter
Table 835: SSCBR Non group settings (advanced)

OpenTimeCorr -0.100 - 0.100 s 0.001 0.010 Correction for open travel time
CloseTimeCorr -0.100 - 0.100 s 0.001 0.010 Correction for close travel time
DirCoef -3.00 - -0.50 - 0.01 -1.50 Directional coefficient for CB life
calculation
CBLifeAlmLevel 1 - 99999 - 1 5000 Alarm level for CB remaining life
ContTrCorr -0.010 - 0.010 s 0.001 0.005 Correction for time difference in
auxiliary and main contacts open time
OperTimeDelay 0.000 - 0.200 s 0.001 0.020 Time delay between change of status
of trip output and start of main
contact separation
tDGasPresAlm 0.00 - 60.00 s 0.01 0.10 Time delay for gas pressure alarm
tDGasPresLO 0.00 - 60.00 s 0.01 0.10 Time delay for gas pressure lockout
InitCounterVal 0 - 9999 - 1 0 Initial value for number of operations
InitAccCurrPwr 0.00 - 9999.99 - 0.01 0.00 Initial value for accum I^CurrExponent
integr over CB open travel time value
InitInactDays 0 - 9999 Day 1 0 Initial value for inactive days
InactiveAlHrs 0 - 23 Hour 1 0 Alarm time for inactive days counter in
hours

Table 836: SSCBR Monitored data

TTRVOP REAL - ms Travel time of the CB during opening
operation
TTRVCL REAL - ms Travel time of the CB during closing
operation
NOOPER INTEGER - - Number of CB operation cycle
CBLIFEPH INTEGER - - CB Remaining life of respective phase

Technical manual
Monitoring

INADAYS INTEGER - - The number of days CB has been
inactive
IPOWPH REAL - - Accumulated I^CurrExponent
integrated over CB open travel time
SPCHT REAL - s The charging time of the CB spring
18.4.7 Operation principle GUID-3902D69C-1858-40DD-AD63-C33C381697BA v12
The breaker monitoring function includes metering and monitoring subfunctions. The
subfunctions can be enabled and disabled with the Operation setting. The corresponding
parameter values are On and Off.
The operation of the subfunctions is described by the module diagram as shown in figure 594.
All the modules in the diagram are explained in subsequent sections.

Technical manual
Monitoring
I3P-ILRMSPH
POSCLOSE TTRVOP
POSOPEN CB Contact Travel TTRVCL
BLOCK Time TRVTOPAL
BLKALM TRVTCLAL
RSTTRVT
OPENPOS
CB Status CLOSEPOS
INVDPOS
CBLIFEAL
Remaining Life of CB
CBLIFEPH
RSTCBWR
TRCMD
Accumulated IPOWALPH
energy
I3P-IL IPOWLOPH
TRIND
IPOWPH
RSTIPOW
CB Operation OPERALM
Cycles NOOPER
CB Operation MONALM
Monitoring INADAYS
SPCHALM
SPRCHRST CB Spring Charge SPCHT
SPRCHRD Monitoring
RSTSPCHT
CB Gas Pressure GPRESALM

PRESALM Indication GPRESLO
PRESLO
Figure 594: Functional module diagram of breaker monitoring

Technical manual
Monitoring
18.4.7.1 Circuit breaker contact travel time GUID-3AF0EE8D-AA8E-4F83-9916-61B5D0D6B05B v13
The circuit breaker contact travel time sub function calculates the breaker contact travel time
for opening and closing operations. The operation of the breaker contact travel time
measurement is described in figure595.
POSCLOSE TTRVOP
Contact travel
POSOPEN time TTRVCL
calculation
RSTTRVT
TRVTOPAL
Alarm limit
BLOCK check TRVTCLAL
BLKALM
Figure 595: Functional module diagram for circuit breaker contact travel time
Contact travel time calculation

The contact travel time of the breaker is calculated from the time between the state of change
of auxiliary contacts. The opening travel time is measured between the opening of the
POSCLOSE and closing of the POSOPEN auxiliary contacts. Similarly, the closing travel time is
measured between the opening of the POSOPEN and closing of the POSCLOSE auxiliary
contacts. A compensation factor has been added to consider the time difference between
auxiliary contact operation and the actual physical opening of the breaker main contact.
Main Contact
1
0
POSCLOSE
POSOPEN
1
t1 tOpen t2 t3 tClose t4
tTravelOpen = tOpen + t1 + t2 tTravelClose = tClose + t3 + t4

Figure 596: Travel time calculation

There is a time difference t1 between the start of the main contact opening and the opening of
the POSCLOSE auxiliary contact. Similarly, there is a time difference t2 between the time when
the POSOPEN auxiliary contact opens and the main contact is completely open. Therefore, a
correction factor needs to be added to get the actual opening time. This factor is added with
the OpenTimeCorr (t1+t2) setting. The closing time is calculated by adding the value set with
the CloseTimeCorr (t3+t4) setting to the measured closing time.
The last measured opening travel time (TTRVOP) and the closing travel time (TTRVCL) are given
as service values.
The values can be reset using the Clear menu on the LHMI or by activation the input RSTCBWR.

Technical manual
Monitoring
Alarm limit check

When the measured opening travel time is longer than the value set in the tTrOpenAlm setting,
the TRVTOPAL output is activated. Similarly, when the measured closing travel time is longer
than the value set in the tTrCloseAlm setting, the TRVTCLAL output is activated.
It is also possible to block the TRVTCLAL and TRVTOPAL alarm signals by activating the BLKALM
input.
18.4.7.2 Circuit breaker status GUID-390A1250-B258-4023-9A7D-0D7E19E13A6C v12
The circuit breaker status subfunction monitors the position of the circuit breaker, that is,
whether the breaker is in the open, closed or error position. The operation is described in
figure 597.
Phase current
I3P-ILRMSPH
check
OPENPOS
Contact
POSCLOSE position CLOSEPOS
indicator
POSOPEN INVDPOS
Figure 597: Functional module diagram for monitoring circuit breaker status
Phase current check

The module compares the phase current I3P-ILRMSPH to the AccStopCurr setting. If the
current in the selected phase exceeds the set level, it is reported to the contact position
indicator module as closed circuit breaker.
Contact position indicator

The circuit breaker status is open when the auxiliary input contact POSCLOSE is low, the
POSOPEN input is high and the phase current is less than the setting AccStopCurr value. The
circuit breaker is closed when the POSOPEN input is low and the POSCLOSE input is high. The
breaker is in the error state if both auxiliary contacts have the same value or if the auxiliary
input contact POSCLOSE is low and the POSOPEN input is high but the current is above the
setting AccStopCurr.
The status of the breaker is indicated with the binary outputs OPENPOS, CLOSEPOS and
INVDPOS for open, closed and error position respectively.
18.4.7.3 Remaining life of circuit breaker GUID-C347406A-2B6F-42BD-B70B-51489AB51EAE v13
The Remaining life of circuit breaker subfunction is used to give an indication on the wear and
tear of the circuit breaker. Every time the breaker operates, the life of the circuit breaker
reduces due to wear. The breaker wear depends on the interrupted current. The remaining life
of the breaker is estimated from the circuit breaker trip curve provided by the manufacturer.
The remaining life is decreased by at least one when the circuit breaker is opened. The
operation of the remaining life of circuit breaker subfunction is described in figure 598.

Technical manual
Monitoring
I3P-ILRMSPH
CB remaining CBLIFEPH
POSCLOSE life estimation
RSTCBWR
Alarm limit
BLOCK CBLIFEAL
Check
BLKALM
Figure 598: Functional module diagram for estimating the life of the circuit breaker
Circuit breaker remaining life estimation

If the interrupted current is less than the rated operating current set using the RatedOperCurr
setting, the remaining operations of the breaker are reduced by one operation. If the
interrupted current is more than the rated fault current set using the RatedFltCurr setting, the
remaining operations of the circuit breaker are reduced by the set OperNoRated divided by the
set OperNoFault value. If the tripping current is between these two values, the remaining life
of the circuit breaker is calculated based on the maintenance curve equation given by the
manufacturer. The OperNoRated parameter sets the number of operations the breaker can
perform at the rated current. The OperNoFault parameter sets the number of operations the
breaker can perform at the rated fault current.
Alarm limit check

When the remaining life of a circuit breaker phase drops below the CBLifeAlmLevel setting, the
life alarm CBLIFEAL is activated.
It is possible to deactivate the CBLIFEAL alarm signal by activating the binary input BLKALM.
The old circuit breaker operation counter value can be used by adding the value to the
InitCBRemLife parameter. The value can be reset using the Clear menu from LHMI or by
activating the input RSTCBWR.
18.4.7.4 Accumulated energy GUID-0163FF0F-6E18-4CDC-87AA-578304E0872E v12
The Accumulated energy subfunction calculates the accumulated energy (Iyt) based on current
samples, where the setting CurrExponent (y) ranges from 0.5 to 3.0. The operation is
The TRCMD output is enabled when either of the trip indications from the trip coil circuit TRIND
is high or the breaker status is OPENPOS.
I3P-IL
TRCMD
I3P-ILRMSPH Accumulated
POSCLOSE energy
calculation IPOWPH
TRIND
LRSTIPOW
IPOWALPH
Alarm limit
BLOCK Check IPOWLOPH
BLKALM
Figure 599: Functional module diagram for estimating accumulated energy

Technical manual
Monitoring
Accumulated energy calculation

Accumulated energy can be calculated either with TRIND or POSCLOSE by selecting the
AccSelCal parameter value accordingly.
The calculation is initiated with the POSCLOSE or TRIND input events. It ends when the RMS
current is lower than the AccStopCurr setting.
The ContTrCorr setting is used to determine the accumulated energy in relation to the time
the main contact opens. If the setting is positive, the calculation of energy starts after the
auxiliary contact has opened and the delay equal to the value of the ContTrCorr setting has
passed. When the setting is negative, the calculation starts in advance by the correction time
in relation to when the auxiliary contact opened.
Main Contact Main Contact

close close
open open
POSCLOSE 1 POSCLOSE 1
0 0
Energy Energy
Accumulation Accumulation
starts starts
ContTrCorr ContTrCorr
(Negative) (Positive)
Figure 600: Significance of correction factor setting

Accumulated energy can also be calculated by using the change of state of the trip output.
TRIND is used to get the instance of the trip output and the time delay between the trip
initiation and the opening of the main contact is introduced by the setting OperTimeDelay.
The accumulated energy output IPOWPH is provided as a service value. The value can be reset
by enabling RSTIPOW through LHMI or by activating the input RSTIPOW.
Alarm limit check

The IPOWALPH alarm is activated when the accumulated energy exceeds the set value
AlmAccCurrPwr.
IPOWLOPH is activated when the accumulated energy exceeds the limit of the LOAccCurrPwr
setting.
The IPOWALPH and IPOWLOPH outputs can be blocked by activating the binary input BLKALM.
18.4.7.5 Circuit breaker operation cycles GUID-D3481D26-2E42-455E-8DB2-91538421F3B1 v10
The circuit breaker operation cycles subfunction counts the number of closing-opening
sequences of the breaker. The operation counter value is updated after each closing-opening
sequence. The operation is described in figure601.

Technical manual
Monitoring
POSCLOSE
Operation
POSOPEN NOOPER
counter
RSTCBWR
OPERALM
Alarm limit
BLOCK
Check
OPERLO
BLKALM
Figure 601: Functional module diagram for circuit breaker operation cycles
Operation counter
The operation counter counts the number of operations based on the state of change of the
auxiliary contact inputs POSCLOSE and POSOPEN.
The number of operations NOOPER is given as a service value. The old circuit breaker
operation counter value can be used by adding the value to the InitCounterVal parameter and
can be reset by Clear CB wear in the Clear menu on the LHMI or activating the input RSTCBWR.
Alarm limit check

OPERALM is generated when the number of operations exceeds the set value of the
OperAlmLevel threshold setting.
If the number of operations increases and exceeds the limit value set with the OperLOLevel
setting, the OPERLO output is activated.
The binary outputs OPERALM and OPERALO are deactivated when the BLKALM input is activated.
18.4.7.6 Circuit breaker operation monitoring GUID-6DAE4C6B-BD66-49CD-817D-08E4EBF47DE0 v9
The circuit breaker operation monitoring subfunction indicates the inactive days of the circuit
breaker and gives an alarm when the number of days exceed the set level. The operation of the
circuit breaker operation monitoring is shown in figure 602.
POSCLOSE
Inactive timer INADAYS
POSOPEN
Alarm limit MONALM

BLOCK
Check
BLKALM
Figure 602: Functional module diagram for circuit breaker operation monitoring
Inactive timer
The Inactive timer module calculates the number of days the circuit breaker has remained in
the same open or closed state. The value is calculated by monitoring the states of the POSOPEN
and POSCLOSE auxiliary contacts.
The number of inactive days INADAYS is available as a service value. The initial number of
inactive days is set using the InitInactDays parameter.

Technical manual
Monitoring
Alarm limit check

MONALM is initiated when the number of inactive days and hours exceed the limit value defined
by the InactiveAlDays and InactivAlHrs setting. The alarm signal MONALM can be blocked by
activating the binary input BLKALM.
18.4.7.7 Circuit breaker spring charge monitoring GUID-F850A940-7890-4C37-8B31-6C7D5B30E582 v12
The circuit breaker spring charge monitoring subfunction calculates the spring charging time.
The operation is described in figure 603.
SPRCHRST
Spring charging
SPRCHRD time SPCHT
measurement
RSTSPCHT
Alarm limit
BLOCK SPCHALM
Check
BLKALM
Figure 603: Functional module diagram for circuit breaker spring charge indication
Spring charging time measurement

Spring charging time calculation will be initiated as soon as the circuit breaker is closed and
charging motor starts (NO contact of the device is connected to SPRCHRST) to store the energy
in the close spring. An indicator provided in the circuit breaker is displayed when the spring is
completely charged. This status is taken through NO contact and then connected to SPRCHRD.
The binary input SPRCHRST indicates the start of circuit breaker spring charging time.
SPRCHRD indicates that the circuit breaker spring is charged. The spring charging time is
calculated from the difference of these two signal timings. Spring charging indication is
The last measured spring charging time SPCHT is provided as a service value. The spring
charging time SPCHT can be reset on the LHMI or by activating the input RSTSPCHT.
Alarm limit check

If the time taken by the spring to charge is more than the value set with the SpChAlmTime
setting, the subfunction generates the SPCHALM alarm.
It is possible to block the SPCHALM alarm signal by activating the BLKALM binary input.
18.4.7.8 Circuit breaker gas pressure indication GUID-9D070D52-B499-4D45-9195-60181819184E v10
The circuit breaker gas pressure indication subfunction monitors the gas pressure inside the
arc chamber. The operation is described in figure 604.

Technical manual
Monitoring
PRESALM
tDGasPresAlm
BLOCK AND t GPRESALM
BLKALM
tDGasPresLO
PRESLO AND t GPRESLO
Figure 604: Functional module diagram for circuit breaker gas pressure indication
When the PRESALM binary input is activated, the GPRESALM output is activated after a time
delay set with the tDGasPresAlm setting. The GPRESALM alarm can be blocked by activating the
BLKALM input.
If the pressure drops further to a very low level, the PRESLO binary input goes high, activating
the lockout alarm GPRESLO after a time delay set with the tDGasPresLO setting. The GPRESLO
alarm can be blocked by activating the BLKALM input.
The binary input BLOCK can be used to block the function. The activation of the BLOCK input
deactivates all outputs and resets internal timers. The alarm signals from the function can be
blocked by activating the binary input BLKALM.

GUID-B6799420-D726-460E-B02F-C7D4F1937432 v9
Table 837: SSCBR Technical data

Alarm level for open and close (0 – 200) ms ±3 ms
travel time
Alarm level for number of (0 – 9999) -
operations
Independent time delay for spring (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
charging time alarm greater
Independent time delay for gas (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
pressure alarm greater
Independent time delay for gas (0.00 – 60.00) s ±0.2% or ±30 ms whichever is
pressure lockout greater
CB Contact Travel Time, opening ±3 ms
and closing
Remaining Life of CB ±2 operations
Accumulated Energy ±1.0% or ±0.5 whichever is greater
18.5 Event function EVENT SEMOD120002-1 v2
SEMOD167950-2 v2

Event function EVENT -
S00946 V1 EN-US

Technical manual
Monitoring
When using a Substation Automation system with LON or SPA communication, time-tagged
events can be sent at change or cyclically from the IED to the station level. These events are
created from any available signal in the IED that is connected to the Event function (EVENT).
The EVENT function block is used for LON and SPA communication.
Analog, integer and double indication values are also transferred through the EVENT function.
EVENT
BLOCK
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Figure 605: EVENT function block
18.5.4 Signals IP11335-1 v2
Table 838: EVENT Input signals

INPUT1 GROUP 0 Input 1
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL

Technical manual
Monitoring

SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
18.5.5 Settings IP11336-1 v2
Table 839: EVENT Non group settings (basic)

SPAChannelMask Off - - Off SPA channel mask
Channel 1-8
Channel 9-16
Channel 1-16
LONChannelMask Off - - Off LON channel mask
Channel 1-8
Channel 9-16
Channel 1-16
EventMask1 NoEvents - - AutoDetect Reporting criteria for input 1
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect

Technical manual
Monitoring

OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
OnSet
OnReset
OnChange
AutoDetect
MinRepIntVal1 0 - 3600 s 1 2 Minimum reporting interval input 1

Technical manual
Monitoring

The main purpose of the Event function (EVENT) is to generate events when the state or value
of any of the connected input signals is in a state, or is undergoing a state transition, for which
event generation is enabled.
Each EVENT function has 16 inputs INPUT1 - INPUT16. Each input can be given a name from the
Application Configuration tool. The inputs are normally used to create single events, but are
also intended for double indication events. For double indications, only the first eight inputs,
1–8, must be used. Inputs 9–16 can be used for other types of events in the same EVENT block.
The EVENT function also has an input BLOCK to block the generation of events.
Events that are sent from the IED can originate from both internal logical signals and binary
input channels. The internal signals are time-tagged in the main processing module, while the
binary input channels are time-tagged directly on the input module. Time-tagging of the
events that are originated from internal logical signals have a resolution corresponding to the
execution cycle-time of the source application. Time-tagging of the events that are originated
from binary input signals have a resolution of 1 ms.
The outputs from the EVENT function are formed by the reading of status, events and alarms
by the station level on every single input. The user-defined name for each input is intended to
be used by the station level.
All events according to the event mask are stored in a buffer, which contains up to 1000
events. If new events appear before the oldest event in the buffer is read, the oldest event is
overwritten and an overflow alarm appears.
Events are produced according to set event masks. The event masks are treated commonly for
both the LON and SPA communication. An EventMask can be set individually for each input
channel. These settings are available:
• NoEvents
• OnSet
• OnReset
• OnChange
• AutoDetect

Technical manual
Monitoring
It is possible to define which part of the EVENT function generates the events. This can be
performed individually for communication types SPAChannelMask and LONChannelMask. For
each communication type these settings are available:
• Off
• Channel 1-8
• Channel 9-16
• Channel 1-16
For LON communication, events are normally sent to station level at change. It is also possible
to set a time for cyclic sending of the events individually for each input channel.
To protect the SA system from signals with a high change rate that can easily saturate the
EVENT function or the communication subsystems behind it, a quota limiter is implemented. If
an input creates events at a rate that completely consume the granted quota then further
events from the channel will be blocked. This block will be removed when the input calms down
and the accumulated quota reach 66% of the maximum burst quota. The maximum burst
quota per input channel is 45 events per second.
18.6 Disturbance report DRPRDRE IP14584-1 v2
M16055-1 v9
Function description IEC 61850 identification IEC 60617 ANSI/IEEE C37.2

identification device number
Disturbance report DRPRDRE - -
Disturbance report A1RADR - A4RADR - -
Disturbance report B1RBDR - B22RBDR - -
Complete and reliable information about disturbances in the primary and/or in the secondary
system together with continuous event-logging is accomplished by the disturbance report
functionality.
Disturbance report (DRPRDRE), always included in the IED, acquires sampled data of all
selected analog input and binary signals connected to the function block with a maximum of
40 analog and 352 binary signals.
The Disturbance report functionality is a common name for several functions:
• Event list
• Indications
• Event recorder
• Trip value recorder
• Disturbance recorder
• Fault locator
• Settings information
The Disturbance report function is characterized by great flexibility regarding configuration,

starting conditions, recording times, and large storage capacity.

Technical manual
Monitoring
A disturbance is defined as an activation of an input to the AnRADR or BnRBDR function blocks,

which are set to trigger the disturbance recorder. All connected signals from start of pre-fault
time to the end of post-fault time will be included in the recording. Disturbance record will
have visible settings from all function instances that are configured in the application
configuration tool.
Every disturbance report recording is saved in the IED in the standard Comtrade format as a
reader file HDR, a configuration file CFG, and a data file DAT. The same applies to all events,
which are continuously saved in a ring-buffer. The local HMI is used to get information about
the recordings. The disturbance report files can be uploaded to PCM600 for further analysis
using the disturbance handling tool.
18.6.3 Function block IP806-1 v1
M12510-3 v3
DRPRDRE
DRPOFF
RECSTART
RECMADE
CLEARED
MEMUSED
Figure 606: DRPRDRE function block

SEMOD54843-4 v3
A4RADR
ÎNPUT31
ÎNPUT32
ÎNPUT33
ÎNPUT34
ÎNPUT35
ÎNPUT36
ÎNPUT37
ÎNPUT38
ÎNPUT39
ÎNPUT40
Figure 607: A4RADR function block, derived analog inputs

SEMOD54845-4 v6
B1RBDR
ÎNPUT1
ÎNPUT2
ÎNPUT3
ÎNPUT4
ÎNPUT5
ÎNPUT6
ÎNPUT7
ÎNPUT8
ÎNPUT9
ÎNPUT10
ÎNPUT11
ÎNPUT12
ÎNPUT13
ÎNPUT14
ÎNPUT15
ÎNPUT16
Figure 608: B1RBDR function block, binary inputs, example for B1RBDR - B22RBDR

Technical manual
Monitoring
18.6.4 Signals
Table 840: DRPRDRE Output signals

DRPOFF BOOLEAN Disturbance report function turned off
RECSTART BOOLEAN Disturbance recording started
RECMADE BOOLEAN Disturbance recording made
CLEARED BOOLEAN All disturbances in the disturbance report cleared
MEMUSED BOOLEAN More than 80% of memory used
GUID-D025D5D9-A0F3-4A00-891A-63AD5F609A77
v3
Table 841: A4RADR Input signals

INPUT31 REAL 0 Analog channel 31
Table 842: B1RBDR Input signals

INPUT1 BOOLEAN 0 Binary channel 1

Technical manual
Monitoring
GUID-D3A8067F-80F8-4174-BD2D-4C43F4B99020 v3
B2RBDR to B22RBDR functions have the same input signal specifications as B1RBDR but with
different numbering:
• B2RBDR: INPUT17 to INPUT32 (binary channels 17 to 32)

18.6.5 Settings
Table 843: DRPRDRE Non group settings (basic)

On
PreFaultRecT 0.05 - 9.90 s 0.01 0.10 Pre-fault recording time
PostFaultRecT 0.1 - 10.0 s 0.1 0.5 Post-fault recording time
TimeLimit 0.5 - 10.0 s 0.1 1.0 Fault recording time limit
PostRetrig Off - - Off Post-fault retrig enabled (On) or not
On (Off)
MaxNoStoreRec 10 - 100 - 1 100 Maximum number of stored
disturbances
ZeroAngleRef 1 - 30 Ch 1 1 Trip value recorder, phasor reference
channel
OpModeTest Off - - Off Operation mode during test mode
On
SetInfoInDRep Disable - - Enable Enable Disturbance report settings
Enable functionality
GUID-E05EEC82-CB90-4E73-B9C9-4C16FD95FCBF v1
A2RADR to A4RADR functions have the same Non group settings (basic) as A1RADR but with
different numbering:
• A2RADR: Operation11 to Operation20


Technical manual
Monitoring
A2RADR to A4RADR functions have the same Non group settings (advanced) as A1RADR but
with different numbering (examples given in brackets):
• A2RADR: 11 to 20 (NomValue11, nominal value for analog channel 11)

Table 844: B1RBDR Non group settings (basic)

TrigDR01 Off - - Off Trigger operation On/Off
On
SetLED01 Off - - Off Set LED on HMI for binary channel 1
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip

Technical manual
Monitoring

On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
On
Start
Trip
Start and Trip
FunType1 0 - 255 - 1 0 Function type for binary channel 1 (IEC
-60870-5-103)
InfNo1 0 - 255 - 1 0 Information number for binary
channel 1 (IEC -60870-5-103)
-60870-5-103)
channel 2 (IEC -60870-5-103)

Technical manual
Monitoring

-60870-5-103)
channel 3 (IEC -60870-5-103)
FunType4 0 - 255 - 1 0 Function type for binary channel 4
(IEC -60870-5-103)
channel 4 (IEC -60870-5-103)
-60870-5-103)
channel 5 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 6 (IEC -60870-5-103)
-60870-5-103)
channel 7 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 8 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 9 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 10 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 11 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 12 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 13 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 14 (IEC -60870-5-103)
(IEC -60870-5-103)

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Monitoring

channel 15 (IEC -60870-5-103)
(IEC -60870-5-103)
channel 16 (IEC -60870-5-103)
Table 845: B1RBDR Non group settings (advanced)

TrigLevel01 Trig on 0 - - Trig on 1 Trigger on positive (1) or negative (0)
Trig on 1 slope for binary input 1
IndicationMa01 Hide - - Show Indication mask for binary channel 1
Show
Show
Show
Show
Show
Show
Show
Show
Show
Show

Technical manual
Monitoring

Show
Show
Show
Show
Show
Show
GUID-8702C5B9-05A3-4E61-8952-C66483FFDFE2 v4
B2RBDR to B22RBDR functions have the same Non group settings (basic) as B1RBDR but with
different numbering (examples given in brackets):
• B2RBDR: 17 to 32 (SetLED17, set LED on HMI for binary channel 17)

B2RBDR to B22RBDR functions have the same Non group settings (advanced) as B1RBDR but
with different numbering (examples given in brackets):
• B2RBDR: 17 to 32 (IndicationMa17, indication mask for binary channel 17)


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Monitoring


Table 846: DRPRDRE Monitored data

MemoryUsed INTEGER - % Memory usage (0-100%)
UnTrigStatCh1 BOOLEAN - - Under level trig for analog channel 1
activated
OvTrigStatCh1 BOOLEAN - - Over level trig for analog channel 1
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated

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Monitoring

activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated

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Monitoring

activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated

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Monitoring

activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
activated
FaultNumber INTEGER - - Disturbance fault number

M12155-6 v13
Disturbance report DRPRDRE is a common name for several functions to supply the operator,
analysis engineer, and so on, with sufficient information about events in the system.
The functions included in the disturbance report are:
• Event list (EL)

• Indications (IND)
• Event recorder (ER)
• Trip value recorder (TVR)
• Disturbance recorder (DR)
• Fault locator (FL)
• Settings information
Figure 609 shows the relations between Disturbance Report, included functions and function
blocks. Event list (EL), Event recorder (ER) and Indications (IND) uses information from the
binary input function blocks (BxRBDR).Trip value recorder (TVR) uses analog information from
the analog input function blocks (AxRADR) which is used by FL after estimation by TVR.
Disturbance recorder DRPRDRE acquires information from both AxRADR and BxRBDR.

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AxRADR Disturbance Report
DRPRDRE FL
Analog signals
Trip value rec Fault locator
BxRBDR Disturbance
recorder
Binary signals
Event list
Event recorder
Indications
Figure 609: Disturbance report functions and related function blocks

The whole disturbance report can contain information for a number of recordings, each with
the data coming from all the parts mentioned above. The event list function is working
continuously, independent of disturbance triggering, recording time, and so on. Settings
information function contains all the visible settings, parameter information of components
configured in ACT, runtime status and IEC61850 behavior that is added to the disturbance
record header file. These settings information is recorded in XML format and then grouped for
each function instance in the HDR file. The function, setting names and Enum values are same
as in the HMI and can be translated to the selected HMI language. All setting values are
updated along with the units. If the setting values are related to the global base value, then the
setting value is scaled and updated with corresponding global base unit. All information in the
disturbance report is stored in non-volatile flash memories. This implies that no information is
lost in case of loss of auxiliary power. Each report will get an identification number in the
interval from 0-999.
Disturbance report
Record no. N Record no. N+1 Record no. N+100
General dist.
Trip Event Disturbance
Information & Setting Indications Fault locator Event list
values recordings recording
infotrmation
Figure 610: Disturbance report structure

Up to 100 disturbance reports can be stored. If a new disturbance is to be recorded when the
memory is full, the oldest disturbance report is overwritten by the new one. The total
recording capacity for the disturbance recorder is depending of sampling frequency, number
of analog and binary channels and recording time and settings information (refer Figure 612

Technical manual
Monitoring
for the recording times definition). Figure 611 shows the number of recordings versus the total
recording time tested for a typical configuration. In a 50 Hz system, it is possible to record 100
disturbance recordings where the average recording time for each disturbance recording file
is 3.4 seconds with 40 analog and 96 binary signals in each recording. The memory limit does
not affect the rest of the disturbance recordings report (Event list (EL), Event recordings (ER),
Indications (IND) and Trip value recordings (TVR)).
Number of recordings
100
3,4 s
80 3,4 s 20 analog
96 binary
40 analog
96 binary
60 6,3 s
6,3 s
6,3 s 50 Hz
40
60 Hz
Total recording time
250 300 350 400 s
en05000488.vsd
Figure 611: Example of number of recordings versus the total recording time
The maximum number of recordings depend on each recordings total

recording time. Long recording time will reduce the number of recordings to
less than 100.
The IED flash disk should NOT be used to store any user files. This might cause
disturbance recordings to be deleted due to lack of disk space.
Disturbance information M12155-175 v4

Date and time of the disturbance, the indications, events, fault location and the trip values are
available on the local HMI. To acquire a complete disturbance report the user must use a PC
and - either the PCM600 Disturbance handling tool - or a FTP or MMS (over 61850) client. The
PC can be connected to the IED front, rear or remotely via the station bus (Ethernet ports).
Indications (IND) M12155-87 v5

Indications is a list of signals that were activated during the total recording time of the
disturbance (not time-tagged).
Event recorder (ER) M12155-89 v6

The event recorder may contain a list of up to 150 time-tagged events, which have occurred
during the disturbance. The information is available via the local HMI or PCM600.

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Event list (EL) M12155-177 v7

The event list may contain a list of totally 1000 time-tagged events. The list information is
continuously updated when selected binary signals change state. The oldest data is
overwritten. The logged signals may be presented via the local HMI or PCM600.
Trip value recorder (TVR) M12155-91 v5

The recorded trip values include phasors of selected analog signals before the fault and during
the fault.
Disturbance recorder (DR) M12155-97 v5

Disturbance recorder records analog and binary signal data before, during and after the fault.
Settings information GUID-892F72ED-CC6C-469B-90CA-73E9E1181187 v2

For each disturbance recording, the setting values of the configured components are read
twice; once during the trigger of disturbance record and again during post processing of the
disturbance record.
During post processing of the disturbance record, the header file is updated with a section
called Settings . Settings has complete setting values of the configured components that are
read during the trigger time. The setting values, runtime status and the behavior of each
component are compared between the trigger and the post processing time. If there are any
differences, then it will be added in the header file under section Changed_settings.
In the HDR file, section tag Settings has an attribute tag called function which includes
parameters that are grouped based on the function instance. The function tag has content
called name which is the function name provided together with the user-defined name in
brackets similar to the HMI. Status content will indicate the runtime status of the function and
beh content will indicate the IEC61850 behavior of the components, if supported. Non runtime
components will not have status and beh tag contents.
Parameters of the function are listed as a child tag Set with contents name, value and unit:
• name — parameter name same as HMI

• value — actual parameter value
• unit — parameter unit
The changed_settings attribute tag is similar to the settings section. It contains functions
which have changes in parameter value or runtime status or IEC61850 behavior when
compared with trigger and post-processing settings values.
Fault locator (FL) M12155-186 v4

The fault location function calculates the distance to fault.
Time tagging M12155-194 v1

The IED has a built-in real-time calendar and clock. This function is used for all time tagging
within the disturbance report
Recording times M12155-99 v5

Disturbance report DRPRDRE records information about a disturbance during a settable time
frame. The recording times are valid for the whole disturbance report. Disturbance recorder
(DR), event recorder (ER) and indication function register disturbance data and events during
tRecording, the total recording time.
The total recording time, tRecording, of a recorded disturbance is:
tRecording = PreFaultrecT + tFault + PostFaultrecT or PreFaultrecT + TimeLimit, depending on

which criterion stops the current disturbance recording

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Monitoring
Trig point
TimeLimit
PreFaultRecT PostFaultRecT
1 2 3
en05000487.vsd
Figure 612: The recording times definition
PreFaultRecT, 1 Pre-fault or pre-trigger recording time. The time before the fault including the operate time
of the trigger. Use the setting PreFaultRecT to set this time.
tFault, 2 Fault time of the recording. The fault time cannot be set. It continues as long as any valid
trigger condition, binary or analog, persists (unless limited by TimeLimit the limit time).
PostFaultRecT, 3 Post fault recording time. The time the disturbance recording continues after all activated
triggers are reset. Use the setting PostFaultRecT to set this time.
TimeLimit Limit time. The maximum allowed recording time after the disturbance recording was
triggered. The limit time is used to eliminate the consequences of a trigger that does not
reset within a reasonable time interval. It limits the maximum recording time of a recording
and prevents subsequent overwriting of already stored disturbances. Use the setting
TimeLimit to set this time.
Analog signals M12155-160 v9

Up to 40 analog signals can be selected for recording by the Disturbance recorder and
triggering of the Disturbance report function. Out of these 40, 30 are reserved for external
analog signals from analog input modules (TRM) and line data communication module (LDCM)
via preprocessing function blocks (SMAI) and summation block (3PHSUM). The last 10 channels
may be connected to internally calculated analog signals available as function block output
signals (mA input signals, phase differential currents, bias currents and so on).

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SMAI A1RADR
Block AI3P A2RADR
^GRP2L1 AI1 INPUT1 A3RADR
External
analogue ^GRP2L2 AI2 INPUT2
signals ^GRP2L3 AI3 INPUT3
^GRP2N AI4 INPUT4
Type AIN INPUT5
INPUT6
...
A4RADR
INPUT31
INPUT32
INPUT33
Internal analogue signals INPUT34
INPUT35
INPUT36
...
INPUT40
Figure 613: Analog input function blocks

The external input signals will be acquired, filtered and skewed and (after configuration)
available as an input signal on the AxRADR function block via the SMAI function block. The
information is saved at the Disturbance report base sampling rate (1000 or 1200 Hz). Internally
calculated signals are updated according to the cycle time of the specific function. If a function
is running at lower speed than the base sampling rate, Disturbance recorder will use the latest
updated sample until a new updated sample is available.
If the IED is preconfigured the only tool needed for analog configuration of the Disturbance
report is the Signal Matrix Tool (SMT, external signal configuration). In case of modification of
a preconfigured IED or general internal configuration the Application Configuration tool within
PCM600 is used.
The preprocessor function block (SMAI) calculates the residual quantities in cases where only
the three phases are connected (AI4-input not used). SMAI makes the information available as
a group signal output, phase outputs and calculated residual output (AIN-output). In situations
where AI4-input is used as an input signal the corresponding information is available on the
non-calculated output (AI4) on the SMAI function block. Connect the signals to the AxRADR
accordingly.
For each of the analog signals, Operation = On means that it is recorded by the disturbance
recorder. The trigger is independent of the setting of Operation, and triggers even if operation
is set to Off. Both undervoltage and overvoltage can be used as trigger conditions. The same
applies for the current signals.
If Operation = Off, no waveform (samples) will be recorded and reported in graph. However,
Trip value, pre-fault and fault value will be recorded and reported. The input channel can still be
used to trig the disturbance recorder.
If Operation = On, waveform (samples) will also be recorded and reported in graph.
The analog signals are presented only in the disturbance recording, but they affect the entire
disturbance report when being used as triggers.

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Binary signals M12155-162 v10

Up to 352 binary signals can be selected to be handled by disturbance report. The signals can
be selected from internal logical and binary input signals. A binary signal is selected to be
recorded when:
• the corresponding function block is included in the configuration

• the signal is connected to the input of the function block
Each of the 352 signals can be selected as a trigger of the disturbance report (Operation = On).
A binary signal can be selected to activate the red LED on the local HMI (SetLED = On).
The selected signals are presented in the event recorder, event list and the disturbance
recording. But they affect the whole disturbance report when they are used as triggers. The
indications are also selected from these 352 signals with local HMI IndicationMask = Show/
Hide.
Trigger signals M12155-164 v3

The trigger conditions affect the entire disturbance report, except the event list, which runs
continuously. As soon as at least one trigger condition is fulfilled, a complete disturbance
report is recorded. On the other hand, if no trigger condition is fulfilled, there is no
disturbance report, no indications, and so on. This implies the importance of choosing the
right signals as trigger conditions.
A trigger can be of type:
• Manual trigger
• Binary-signal trigger
• Analog-signal trigger (over/under function)
Manual trigger M12155-167 v5

A disturbance report can be manually triggered from the local HMI, PCM600 or via station bus
(IEC 61850). When the trigger is activated, the manual trigger signal is generated. This feature
is especially useful for testing. Refer to the operator's manual for procedure.
Binary-signal trigger M12155-169 v4

Any binary signal state (logic one or a logic zero) can be selected to generate a trigger
(Triglevel = Trig on 0/Trig on 1). When a binary signal is selected to generate a trigger from a
logic zero, the selected signal will not be listed in the indications list of the disturbance report.
Analog-signal trigger M12155-171 v6

All analog signals are available for trigger purposes, no matter if they are recorded in the
disturbance recorder or not. The settings are OverTrigOp, UnderTrigOp, OverTrigLe and
UnderTrigLe.
The check of the trigger condition is based on peak-to-peak values. When this is found, the
absolute average value of these two peak values is calculated. If the average value is above the
threshold level for an overvoltage or overcurrent trigger, this trigger is indicated with a greater
than (>) sign with the user-defined name.
If the average value is below the set threshold level for an undervoltage or undercurrent
trigger, this trigger is indicated with a less than (<) sign with its name. The procedure is
separately performed for each channel.
This method of checking the analog start conditions gives a function which is insensitive to DC
offset in the signal. The operate time for this start is typically in the range of one cycle, 20 ms
for a 50 Hz network.
All under/over trig signal information is available on the local HMI and PCM600.

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Monitoring

M12760-1 v11
Table 847: DRPRDRE technical data

Pre-fault time (0.05–9.90) s -
Post-fault time (0.1–10.0) s -
Limit time (0.5–10.0) s -
Maximum number of recordings 100, first in - first out -
Time tagging resolution 1 ms See table 1053
Maximum number of analog inputs 30 + 10 (external + internally -
derived)
Maximum number of binary inputs 352 -
Maximum number of phasors in the Trip Value 30 -
recorder per recording
Maximum number of indications in a disturbance 352 -
report
Maximum number of events in the Event recording 150 -
per recording
Maximum number of events in the Event list 1000, first in - first out -
Maximum total recording time (3.4 s recording 340 seconds (100 recordings) -
time and maximum number of channels, typical at 50 Hz, 280 seconds (80
value) recordings) at 60 Hz
Sampling rate 1 kHz at 50 Hz -
1.2 kHz at 60 Hz
Recording bandwidth (5-300) Hz -
18.7 Logical signal status report BINSTATREP GUID-E7A2DB38-DD96-4296-B3D5-EB7FBE77CE07 v2
18.7.1 Identification GUID-E0247779-27A2-4E6C-A6DD-D4C31516CA5C v3

Logical signal status report BINSTATREP - -
18.7.2 Functionality GUID-A72E490D-01F7-4874-B010-8BDE38391D88 v3
The Logical signal status report (BINSTATREP) function makes it possible for a SPA master to
poll signals from various other functions.

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Monitoring
18.7.3 Function block GUID-BA0A5BC3-493B-4FE3-B4A9-14F60A88A22F v2
BINSTATREP
BLOCK OUTPUT1
ÎNPUT1 OUTPUT2
ÎNPUT2 OUTPUT3
ÎNPUT3 OUTPUT4
ÎNPUT4 OUTPUT5
ÎNPUT5 OUTPUT6
ÎNPUT6 OUTPUT7
ÎNPUT7 OUTPUT8
ÎNPUT8 OUTPUT9
ÎNPUT9 OUTPUT10
ÎNPUT10 OUTPUT11
ÎNPUT11 OUTPUT12
ÎNPUT12 OUTPUT13
ÎNPUT13 OUTPUT14
ÎNPUT14 OUTPUT15
ÎNPUT15 OUTPUT16
ÎNPUT16
Figure 614: BINSTATREP function block
18.7.4 Signals
Table 848: BINSTATREP Input signals

INPUT1 BOOLEAN 0 Single status report input 1

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Monitoring
Table 849: BINSTATREP Output signals

OUTPUT1 BOOLEAN Logical status report output 1
18.7.5 Settings
Table 850: BINSTATREP Non group settings (basic)

t 0.0 - 60.0 s 0.1 10.0 Time delay of function
18.7.6 Operation principle GUID-537921CA-82B9-4A02-BAD1-67E3AC61AE96 v3
The Logical signal status report (BINSTATREP) function has 16 inputs and 16 outputs. The
output status follows the inputs and can be read from the local HMI or via SPA communication.
When an input is set, the respective output is set for a user defined time. If the input signal
remains set for a longer period, the output will remain set until the input signal resets.
INPUTn
OUTPUTn
t t
Figure 615: BINSTATREP logical diagram

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18.8 Measured value expander block RANGE_XP SEMOD52451-1 v2
SEMOD113212-2 v3

Measured value expander block RANGE_XP - -
The current and voltage measurements functions (CVMMXN, CMMXU, VMMXU and VNMMXU),
current and voltage sequence measurement functions (CMSQI and VMSQI) and IEC 61850
generic communication I/O functions (MVGAPC) are provided with measurement supervision
functionality. All measured values can be supervised with four settable limits: low-low limit,
low limit, high limit and high-high limit. The measure value expander block (RANGE_XP) has
been introduced to enable translating the integer output signal from the measuring functions
to 5 binary signals: below low-low limit, below low limit, normal, above high limit or above
high-high limit. The output signals can be used as conditions in the configurable logic or for
alarming purpose.
RANGE_XP
RANGE* HIGHHIGH
HIGH
NORMAL
LOW
LOWLOW
Figure 616: RANGE_XP function block
Table 851: RANGE_XP Input signals

RANGE INTEGER 0 Measured value range
Table 852: RANGE_XP Output signals

HIGHHIGH BOOLEAN Measured value is above high-high limit
HIGH BOOLEAN Measured value is between high and high-high limit
NORMAL BOOLEAN Measured value is between high and low limit
LOW BOOLEAN Measured value is between low and low-low limit
LOWLOW BOOLEAN Measured value is below low-low limit

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The input signal must be connected to a range output of a measuring function block
(CVMMXN, CMMXU, VMMXU, VNMMXU, CMSQI, VMSQ or MVGAPC). The function block converts
the input integer value to five binary output signals according to table 853.
Table 853: Input integer value converted to binary output signals

Measured supervised below low- between low‐ between low between above high-high limit
value is: low limit low and low and high limit high-high
Output: limit and high limit
LOWLOW High
LOW High
NORMAL High
HIGH High
HIGHHIGH High
18.9 Fault locator LMBRFLO IP14592-1 v2
M14892-1 v3

Fault locator LMBRFLO - -
The accurate fault locator is an essential component to minimize the outages after a
persistent fault and/or to pin-point a weak spot on the line.
The fault locator is an impedance measuring function giving the distance to the fault in km,
miles or % of line length. The main advantage is the high accuracy achieved by compensating
for load current and for the mutual zero-sequence effect on double circuit lines.
The compensation includes setting of the remote and local sources and calculation of the
distribution of fault currents from each side. This distribution of fault current, together with
recorded load (pre-fault) currents, is used to exactly calculate the fault position. The fault can
be recalculated with new source data at the actual fault to further increase the accuracy.
Especially on heavily loaded long lines, where the source voltage angles can be up to 35-40
degrees apart, the accuracy can be still maintained with the advanced compensation included
in fault locator.

Technical manual
Monitoring
LMBRFLO
PHSELL1* CALCMADE
PHSELL2* FLT_X
PHSELL3* BCD_80
CALCDIST* BCD_40
BCD_20
BCD_10
BCD_8
BCD_4
BCD_2
BCD_1
Figure 617: LMBRFLO function block
18.9.4 Signals
Table 854: LMBRFLO Input signals

PHSELL1 BOOLEAN 0 Phase selecton L1
CALCDIST BOOLEAN 0 Do calculate fault distance (release)
Table 855: LMBRFLO Output signals

CALCMADE BOOLEAN Fault calculation made
FLT_X REAL Reactive distance to fault
BCD_80 BOOLEAN Distance in binary coded data, bit represents 80%

Technical manual
Monitoring
18.9.5 Settings
Table 856: LMBRFLO Group settings (basic)

R1A 0.001 - 1500.000 Ohm/p 0.001 2.000 Source resistance A (near end)
X1A 0.001 - 1500.000 Ohm/p 0.001 12.000 Source reactance A (near end)
R1B 0.001 - 1500.000 Ohm/p 0.001 2.000 Source resistance B (far end)
X1B 0.001 - 1500.000 Ohm/p 0.001 12.000 Source reactance B (far end)
R1L 0.001 - 1500.000 Ohm/p 0.001 2.000 Positive sequence line resistance
X1L 0.001 - 1500.000 Ohm/p 0.001 12.500 Positive sequence line reactance
R0L 0.001 - 1500.000 Ohm/p 0.001 8.750 Zero sequence line resistance
X0L 0.001 - 1500.000 Ohm/p 0.001 50.000 Zero sequence line reactance
R0M 0.000 - 1500.000 Ohm/p 0.001 0.000 Zero sequence mutual resistance
X0M 0.000 - 1500.000 Ohm/p 0.001 0.000 Zero sequence mutual reactance
LineLengthUnit kilometer - - kilometer Line length unit
miles
LineLength 0.0 - 10000.0 - 0.1 40.0 Length of line
Table 857: LMBRFLO Non group settings (basic)

DrepChNoIL1 1 - 30 Ch 1 1 Recorder input number recording
phase current, IL1
phase current, IL2
phase current, IL3
DrepChNoIN 0 - 30 Ch 1 4 Recorder input number recording
residual current, IN
DrepChNoIP 0 - 30 Ch 1 0 Recorder input number recording 3I0
on parallel line
DrepChNoUL1 1 - 30 Ch 1 5 Recorder input number recording
phase voltage, UL1
phase voltage, UL2
phase voltage, UL3
UL1Gain 0.000 - 10.000 - 0.001 1.000 Scale factor for fine tuning of voltage
magnitude L1
magnitude L2
magnitude L3

Technical manual
Monitoring

Table 858: LMBRFLO Monitored data

FLT_REL REAL - - Distance to fault, relative
FLT_DIST REAL - - Distance to fault in line length unit
FLT_X REAL - Ohm Reactive distance to fault
FLT_R REAL - Ohm Resistive distance to fault
FLT_LOOP INTEGER 1=L1-N - Fault loop
2=L2-N
3=L3-N
4=L1-L2
5=L2-L3
6=L3-L1
7=Others

M14982-4 v7
The Fault locator (LMBRFLO) in the IED is an essential complement to other monitoring
functions, since it measures and indicates the distance to the fault with high accuracy.
When calculating distance to fault, pre-fault and fault phasors of currents and voltages are
selected from the Trip value recorder data, thus the analog signals used by the fault locator
must be among those connected to the disturbance report function. The analog configuration
(channel selection) is performed using the parameter setting tool within PCM600.
The calculation algorithm considers the effect of load currents, double-end infeed and
additional fault resistance.
R0L+jX0L
R1L+jX1L
R1A+jX1A R1B+jX1B
Z0m=Z0m+jX0m
R0L+jX0L
R1L+jX1L
DRPRDRE
LMBRFLO
Figure 618: Simplified network configuration with network data, required for settings of
the fault location-measuring function
If source impedance in the near and far end of the protected line have changed in a significant
manner relative to the set values at fault location calculation time (due to exceptional
switching state in the immediate network, power generation out of order, and so on), new
values can be entered via the local HMI and a recalculation of the distance to the fault can be
ordered using the algorithm described below. It’s also possible to change fault loop. In this
way, a more accurate location of the fault can be achieved.
The function indicates the distance to the fault as a percentage of the line length, in kilometers
or miles according to the setting LineLengthUnit. The fault location is stored as a part of the

Technical manual
Monitoring
disturbance report information (ER, DR, IND, TVR and FL) and managed via the local HMI or
PCM600.
18.9.7.1 Measuring Principle M14983-4 v2
For transmission lines with voltage sources at both line ends, the effect of double-end infeed
and additional fault resistance must be considered when calculating the distance to the fault
from the currents and voltages at one line end. If this is not done, the accuracy of the
calculated figure will vary with the load flow and the amount of additional fault resistance.
The calculation algorithm used in the fault locator in compensates for the effect of double-end
infeed, additional fault resistance and load current.
M14983-5 v1
18.9.7.2 Accurate algorithm for measurement of distance to fault M14983-7 v5
Figure 619 shows a single-line diagram of a single transmission line, that is fed from both ends
with source impedances ZA and ZB. Assume that the fault occurs at a distance F from IED A on
a line with the length L and impedance ZL. The fault resistance is defined as RF. A single-line
model is used for better clarification of the algorithm.
A B
ZA IA pZL IB (1-p).ZL ZB
IF
UA RF
xx01000171.vsd
Figure 619: Fault on transmission line fed from both ends

From figure 619 it is evident that:
U A = I A × p × Z L + IF × R F
Where:
IA is the line current after the fault, that is, pre-fault current plus current change due to the fault,
IF is the fault current and
p is a relative distance to the fault
The fault current is expressed in measurable quantities by:

Technical manual
Monitoring
IF A
IF = --------
DA
Where:
IFA is the change in current at the point of measurement, IED A and
DA is a fault current-distribution factor, that is, the ratio between the fault current at line end A and the
total fault current.
For a single line, the value is equal to:
( 1 – p ) × Z L + ZB
DA = -----------------------------------------
Z A + Z L + ZB
Thus, the general fault location equation for a single line is:
I FA
U A = I A × p × Z L + -------- × R F
DA
Table 859: Expressions for UA, IA and IFA for different types of faults
Fault type: UA IA IFA

L1-N UL1A IL1A + KN x INA 3
--- ´ D ( I L 1 A – I 0A )
2
L2-N UL2A IL2A + KN x INA

3
--- ´ D ( I L2A – I 0A )
2
L3-N UL3A IL3A + KN x INA

3
--- ´ D ( I L3A – I0A )
2
L1-L2-L3, L1-L2,L1-L2- UL1A-UL2A IL1A - IL2A

DIL 1 L 2 A
N
L2-L3, L2-L3-N UL2A-UL3A IL2A - IL3A DIL2L3A

L3-L1, L3-L1-N UL3A-UL1A IL3A - IL1A

DIL3L1A
The KN complex quantity for zero-sequence compensation for the single line is equal to:
Z0L – Z 1L
K N = ------------------------
3 × Z1L
DI is the change in current, that is the current after the fault minus the current before the fault.
In the following, the positive sequence impedance for ZA, ZB and ZL is inserted into the
equations, because this is the value used in the algorithm.

Technical manual
Monitoring
For double lines, the fault equation is:
I FA
U A = I A × p × Z 1L + -------- × RF + I 0P × Z 0M
DA
Where:
I0P is a zero sequence current of the parallel line,
Z0M is a mutual zero sequence impedance and
DA is the distribution factor of the parallel line, which is:
( 1 – p ) × ( ZA + ZA L + ZB ) + Z B
DA = ----------------------------------------------------------------------------
-
2 × ZA + Z L + 2 × Z B
The KN compensation factor for the double line becomes:
Z0L – Z 1L Z 0M I 0P
K N = ----------------------- - × -------
- + ----------------
3 × Z1L 3 × Z1L I 0A
From these equations it can be seen, that, if Z0m = 0, then the general fault location equation
for a single line is obtained. Only the distribution factor differs in these two cases.
Because the DA distribution factor according to equation 213 or 215 is a function of p, the
general equation 215 can be written in the form:
2
p – p × K1 + K2 – K3 × RF = 0
Where:
UA ZB
K 1 = ---------------
- + --------------------------
-+1
I A × ZL Z L + ZA DD
UA ZB
K2 = --------------- × æè --------------------------- + 1öø
IA × Z L Z L + Z A DD
I F A æ Z A + ZB
- × --------------------------- + 1ö
K 3 = ---------------
I A × Z L è Z 1 + ZA DD ø
and:

Technical manual
Monitoring
• ZADD = ZA + ZB for parallel lines.

• IA, IFA and UA are given in the above table.
• KN is calculated automatically according to equation 217.
• ZA, ZB, ZL, Z0L and Z0M are setting parameters.
For a single line, Z0M = 0 and ZADD = 0. Thus, equation 218 applies to both single and parallel
lines.
Equation 218 can be divided into real and imaginary parts:
2
p – p × Re ( K 1 ) + Re ( K 2 ) – R F × Re ( K 3 ) = 0
– p × Im × ( K1 ) + Im × ( K 2 ) – R F × Im × ( K3 ) = 0
If the imaginary part of K3 is not zero, RF can be solved according to equation 223, and then
inserted to equation 222. According to equation 222, the relative distance to the fault is solved
as the root of a quadratic equation.
Equation 222 gives two different values for the relative distance to the fault as a solution. A
simplified load compensated algorithm, which gives an unequivocal figure for the relative
distance to the fault, is used to establish the value that should be selected.
If the load compensated algorithms according to the above do not give a reliable solution, a
less accurate, non-compensated impedance model is used to calculate the relative distance to
the fault.
18.9.7.3 The non-compensated impedance model M14983-121 v3
In the non-compensated impedance model, IA line current is used instead of IFA fault current:
U A = p × Z 1 L × IA + R F × IA
Where:
IA is according to table 859.
The accuracy of the distance-to-fault calculation, using the non-compensated impedance

model, is influenced by the pre-fault load current. So, this method is only used if the load
compensated models do not function.
18.9.7.4 IEC 60870-5-103 M14983-135 v2
The communication protocol IEC 60870-5-103 may be used to poll fault location information
from the IED to a master (that is station HSI). There are two outputs that must be connected
to appropriate inputs on the function block I103StatFltDis, FLTDISTX gives distance to fault
(reactance, according the standard) and CALCMADE gives a pulse (100 ms) when a result is
obtainable on FLTDISTX output.

Technical manual
Monitoring

M14987-1 v6
Table 860: LMBRFLO technical data

Function Value or range Accuracy
Reactive and resistive reach (0.001-1500.000) Ω/phase ±2.0% static accuracy
Conditions:
Phase selection According to input signals -

Maximum number of fault 100 -
locations
18.10 Limit counter L4UFCNT GUID-22E141DB-38B3-462C-B031-73F7466DD135 v1
GUID-F3FB7B33-B189-4819-A1F0-8AC7762E9B7E v3

Limit counter L4UFCNT -
18.10.2 Functionality GUID-13157EAB-1686-4D2E-85DF-EC89768F3572 v6
The Limit counter (L4UFCNT) provides a settable counter with four independent limits where
the number of positive and/or negative flanks on the input signal are counted against the
setting values for limits. The output for each limit is activated when the counted value reaches
that limit.
Overflow indication is included for each up-counter.

GUID-4D58423F-329C-4553-9FAF-E55A368849A5 v2
Limit counter (L4UFCNT) counts the number of positive and/or negative flanks on the binary
input signal depending on the function settings. L4UFCNT also checks if the accumulated
value is equal or greater than any of its four settable limits. The four limit outputs will be
activated relatively on reach of each limit and remain activated until the reset of the function.
Moreover, the content of L4UFCNT is stored in flash memory and will not be lost at an auxiliary
power interruption.
18.10.3.1 Design GUID-B643C994-D0BA-4BE9-BACB-ADEA0197CAE4 v1
Figure 620 illustrates the general logic diagram of the function.

Technical manual
Monitoring
BLOCK
INPUT
Operation
Counter
RESET
VALUE
Overflow
CountType Detection OVERFLOW
OnMaxValue
Limit LIMIT1 … 4
MaxValue Check
CounterLimit1...4
Error ERROR
Detection
InitialValue
Figure 620: Logic diagram

The counter can be initialized to count from a settable non-zero value after reset of the
function. The function has also a maximum counted value check. The three possibilities after
reaching the maximum counted value are:
• Stops counting and activates a steady overflow indication for the next count
• Rolls over to zero and activates a steady overflow indication for the next count
• Rolls over to zero and activates a pulsed overflow indication for the next count
The pulsed overflow output lasts up to the first count after rolling over to zero, as illustrated in
figure 621.
Overflow indication
Actual value ... Max value -1® Max value ® Max value +1 ® Max value +2 ® Max value +3 ...
Counted value ... Max value -1 ® Max value ® 0 ® 1 ® 2 ...
Figure 621: Overflow indication when OnMaxValue is set to rollover pulsed

The Error output is activated as an indicator of setting the counter limits and/or initial value
setting(s) greater than the maximum value. The counter stops counting the input and all the
outputs except the error output remains at zero state. The error condition remains until the
correct settings for counter limits and/or initial value setting(s) are applied.
The function can be blocked through a block input. During the block time, input is not counted
and outputs remain in their previous states. However, the counter can be initialized after reset
of the function. In this case the outputs remain in their initial states until the release of the
block input.

Technical manual
Monitoring
18.10.3.2 Reporting GUID-7DF874A7-F7DA-48DD-8760-5E4CF05FD870 v2
The content of the counter can be read on the local HMI.
Reset of the counter can be performed from the local HMI or via a binary input.
Reading of content and resetting of the function can also be performed remotely, for example
from a IEC 61850 client. The value can also be presented as a measurement on the local HMI
graphical display.
18.10.4 Function block GUID-C90E7375-F3CC-414A-93FC-9AC4A9156FFC v1
L4UFCNT
BLOCK ERROR
INPUT OVERFLOW
RESET LIMIT1
LIMIT2
LIMIT3
LIMIT4
VALUE
Figure 622: L4UFCNT function block
18.10.5 Signals
Table 861: L4UFCNT Input signals

INPUT BOOLEAN 0 Input for counter
RESET BOOLEAN 0 Reset of function
Table 862: L4UFCNT Output signals

ERROR BOOLEAN Error indication on counter limit and/or initial value settings
OVERFLOW BOOLEAN Overflow indication on count of greater than MaxValue
LIMIT1 BOOLEAN Counted value is larger than or equal to CounterLimit1
VALUE INTEGER Counted value

Technical manual
Monitoring
18.10.6 Settings
Table 863: L4UFCNT Group settings (basic)

On
CountType Positive edge - - Positive edge Select counting on positive and/or
Negative edge negative flanks
Both edges
CounterLimit1 1 - 65535 - 1 100 Value of the first limit
CounterLimit2 1 - 65535 - 1 200 Value of the second limit
CounterLimit3 1 - 65535 - 1 300 Value of the third limit
CounterLimit4 1 - 65535 - 1 400 Value of the fourth limit
MaxValue 1 - 65535 - 1 500 Maximum count value
OnMaxValue Stop - - Stop Select if counter stops or rolls over
Rollover Steady after reaching maxValue with steady
Rollover Pulsed or pulsed overflow flag
InitialValue 0 - 65535 - 1 0 Initial count value after reset of the
function

Table 864: L4UFCNT Monitored data

VALUE INTEGER - - Counted value

GUID-C43B8654-60FE-4E20-8328-754C238F4AD0 v3
Table 865: L4UFCNT technical data

Counter value 0-65535 -
Max. count up speed 30 pulses/s (50% duty cycle) -
18.11 Running hour-meter TEILGAPC
18.11.1 Identification GUID-3F9EF4FA-74FA-4D1D-88A0-E948B722B64F v1
Function Description IEC 61850 IEC 60617 ANSI/IEEE C37.2 device

identification identification number
Running hour-meter TEILGAPC - -

Technical manual
Monitoring
18.11.2 Functionality GUID-464FB24F-B367-446C-963A-A14841943B87 v2
The Running hour-meter (TEILGAPC) function is a function that accumulates the elapsed time
when a given binary signal has been high, see also figure 623.
BLOCK
RESET
IN Time Accumulation ACC_HOUR
ADDTIME with Retain
ACC_DAY
tAddToTime
q-1
OVERFLOW
a
&
a>b
99 999.9 h b
WARNING
a
&
a>b
tWarning b
ALARM
a
&
a>b
tAlarm b
Figure 623: TEILGAPC logics

The main features of TEILGAPC are:
• Applicable to very long time accumulation (≤ 99999.9 hours)

• Supervision of limit transgression conditions and rollover/overflow
• Possibility to define a warning and alarm with the resolution of 0.1 hours
• Retain any saved accumulation value at a restart
• Possibilities for blocking and reset
• Possibility for manual addition of accumulated time
• Reporting of the accumulated time
18.11.3 Function block GUID-D0E9688B-C9D9-44B7-BD95-81132CCA5E4F v1
TEILGAPC
BLOCK ALARM
IN WARNING
ADDTIME OVERFLOW
RESET ACC_HOUR
ACC_DAY
IEC15000323.vsdx
Figure 624: TEILGAPC function block

Technical manual
Monitoring
18.11.4 Signals
Table 866: TEILGAPC Input signals

BLOCK BOOLEAN 0 Freeze the accumulation and block the outputs
IN BOOLEAN 0 The input signal that is used to measure the elapsed time,
when its value is high
ADDTIME BOOLEAN 0 Add time to the accumulation
RESET BOOLEAN 0 Reset accumulated time
Table 867: TEILGAPC Output signals

ALARM BOOLEAN Indicator that accumulated time has reached alarm limit
WARNING BOOLEAN Indicator that accumulated time has reached warning limit
OVERFLOW BOOLEAN Indicator that accumulated time has reached overflow limit
ACC_HOUR REAL Accumulated time in hours
ACC_DAY REAL Accumulated time in days
18.11.5 Settings
Table 868: TEILGAPC Group settings (basic)

On
tAlarm 1.0 - 99999.9 Hour 0.1 90000.0 Time limit for alarm supervision
tWarning 1.0 - 99999.9 Hour 0.1 50000.0 Time limit for warning supervision
tAddToTime 0.0 - 99999.9 Hour 0.1 0.0 Time to add to the accumulation
18.11.6 Operation principle GUID-C7F91D4E-5942-4006-B7C8-4F499E7DC49D v3
Figure 625 describes the simplified logic of the function.

Technical manual
Monitoring
Loop Delay
tWarning
OVERFLOW
tAlarm
Transgression Supervision WARNING
Plus Retain
ALARM
BLOCK
RESET ACC_HOUR
Time Accumulation
IN
ADDTIME ACC_DAY
tAddToTime
Loop Delay
IEC15000322.vsd
Figure 625: TEILGAPC Simplified logic

TEILGAPC main functionalities
• IN: Accumulation of the elapsed time when input IN is high

• applicable to very long time accumulation (≤99999.9 hours)
• output ACC_HOUR presents accumulated value in hours and ACC_DAY presents
accumulated value in days
• accumulated value is retained in a non-volatile memory
• any retained value is used as initiation value for the integration following by a restart
• RESET: Reset of the accumulated value. Consequently all other outputs are also reset
• independent of the input IN value
• reset the value of the nonvolatile memory to zero.
Note that the nonvolatile memory will not reset to zero if the input IN is high during
the reset.
• reset can be made by activation of input RESET or from LHMI or with IEC 61850
command
• ADDTIME: Manually add time to the currently accumulated time
• the amount of time to be added is defined by a setting tAddToTime
• time is added through activation of input ADDTIME or from LHMI or with IEC 61850
command
• BLOCK: Freeze the accumulation and block/reset the other outputs
• independent of the input IN value
• BLOCK request overrides RESETrequest
• Monitor and report the conditions of limit transgression
• overflow if output ACC_HOUR > 99 999.9 hours
• alarm if output ACC_HOUR > tAlarm
• warning if output ACC_HOUR > tWarning
The ACC_HOURoutput represents the accumulated time in hours and the ACC_DAY output
represents the accumulated time in days.
tAlarm and tWarning are user settable time limit parameters in hours. They are also
independent of each other, that is, there is no check if tAlarm > tWarning.

Technical manual
Monitoring
tAddToTime is a user settable time parameter in hours.
tAlarm, tWarning and tAddToTime are possible to be defined with a resolution of 0.1 hours (6
minutes).
The limit for the overflow supervision is fixed at 99999.9 hours. The outputs will reset and the
accumulated time will reset and start from zero if an overflow occurs.
18.11.6.1 Operation accuracy GUID-B6FBEFD7-17C8-41C6-B5D5-32E1205E6752 v1
The accuracy of TEILGAPC depends on essentially two factors
• the pulse length

• the number of pulses, that is, the number of rising and falling flank pairs
In principle, more pulses may lead to reduced accuracy.
18.11.6.2 Memory storage GUID-B49698FF-0AB2-4792-A7CB-5534313B6CA0 v2
The value of the accumulated time is retained in a non-volatile memory,
• at every falling edge of the input IN

• at every even 6 minutes, after a rising edge of the input IN
• after a manual addition of time
Consequently in case of a power failure, there is a risk of losing the difference in time between
actual time and last time stored in the non-volatile memory.

GUID-F5E124E3-0B85-41AC-9830-A2362FD289F2 v1
Table 869: TEILGAPC Technical data

Time limit for alarm supervision, (0 - 99999.9) hours ±0.1% of set value
tAlarm
Time limit for warning supervision, (0 - 99999.9) hours ±0.1% of set value
tWarning
Time limit for overflow supervision Fixed to 99999.9 hours ±0.1%
18.12 Through fault monitoring PTRSTHR GUID-7AE60CB5-3CD5-4FE2-8D54-664AA78DD2DE v1
GUID-B62A30E5-C1F3-4E1F-B351-4F4CC60BA53F v1

Through fault monitoring PTRSTHR - 51TF

Technical manual
Monitoring
18.12.2 Functionality GUID-D5A0DC68-B3FD-4EBE-A5ED-68BE7DA20245 v1
The through fault monitoring function PTRSTHR is used to monitor the mechanical stress on a
transformer and place it against its designed withstand capability. During through faults, the
fault-current magnitude is higher as the allowed overload current range. At low fault current
magnitudes which are below the overload capability of the transformer, mechanical effects are
considered less important unless the frequency of fault occurrence is high. Since through fault
current magnitudes are typically closer to the extreme design capabilities of the transformer,
mechanical effects are more significant than thermal effects.
For other power system objects, for example, an over-head line, this function can be used to
make a log of all START and/or TRIP operations of the protection IED.
18.12.3 Function block GUID-EB4C73B5-6A8E-4F4F-AC37-390CD1A0AD2A v1
PTRSTHR
I3PW1* ALARM
I3PW2* W1L1ALM
I3PW3* W1L2ALM
U3P* W1L3ALM
BLOCK W2L1ALM
ACCFREEZE W2L2ALM
EXTTRIG W2L3ALM
INHIBIT W3L1ALM
RSTTFCNT W3L2ALM
RSTCMLI2T W3L3ALM
TAPOLTC1 MTFWRN
TAPOLTC2 I2TALM
CMLI2TALM
REPMADE
Figure 626: PTRSTHR function block
18.12.4 Signals
Table 870: PTRSTHR Input signals

I3PW1 GROUP - Group signal for winding 1 currents
SIGNAL
SIGNAL
SIGNAL
U3P GROUP - Group signal for three phase voltage
SIGNAL
ACCFREEZE BOOLEAN 0 Block accumulation values from incrementing
EXTTRIG BOOLEAN 0 External trigger to force fault (I^2)t calculation
INHIBIT BOOLEAN 0 Inhibit fault calculation, e.g. when transformer is energized
RSTTFCNT BOOLEAN 0 Reset all counters to initial value for all windings and phases
RSTCMLI2T BOOLEAN 0 Reset cumulated (I^2)t value to initial value for all windings
and phases
TAPOLTC1 INTEGER 1 Present tap position reading on OLTC 1
TAPOLTC2 INTEGER 1 Present tap position reading on OLTC 2

Technical manual
Monitoring
Table 871: PTRSTHR Output signals

ALARM BOOLEAN General fault detection alarm
W1L1ALM BOOLEAN Fault detection alarm of winding 1, phase L1
MTFWRN BOOLEAN Multiple faults detected in short time
I2TALM BOOLEAN General fault (I^2)t alarm for an event
CMLI2TALM BOOLEAN General cumulative fault (I^2)t alarm
REPMADE BOOLEAN Report is ready for file transfer
18.12.5 Settings
Table 872: PTRSTHR Non group settings (basic)

GlobalBaseSelW1 1 - 12 - 1 1 Selection of one of the Global Base
Value groups, winding 1
Table 873: PTRSTHR Group settings (basic)

On
W1I> 50 - 1000 %IB 1 350 Current start value for fault detection
in % of IBase of winding 1
tMin 0.00 - 10.00 s 0.01 0.05 Minimum duration of fault to start any
calculation
MaxI2tW1 1.000 - (kA)²s 0.001 60.000 (I^2)t threshold limit for alarm of
360000.000 individual fault event in winding 1 per
phase
phase

Technical manual
Monitoring

phase
MaxI2tCmlW1 1.000 - (kA)²s 0.001 600.000 Cumulative (I^2)t threshold limit for
1000000.000 alarm of all fault events in winding 1
per phase
per phase
per phase
tMultiThroFlt 1 - 86400 s 1 3600 Time window to detect multiple faults
tPulse 0.1 - 10.0 s 0.1 0.2 Pulse duration for alarm signals
Table 874: PTRSTHR Non group settings (advanced)

InitTFCnt 0 - 1000 - 1 0 Initial value of overall fault counter
InitTFCntW1L1 0 - 1000 - 1 0 Initial value of fault counter of winding
1 phase L1
1 phase L2
1 phase L3
2 phase L1
2 phase L2
2 phase L3
3 phase L1
3 phase L2
3 phase L3
InitCmlI2tW1L1 0.000 - (kA)²s 0.001 0.000 Initial value of cumulative (I^2)t value
1000000.000 of winding 1 phase L1

Technical manual
Monitoring

Table 875: PTRSTHR Group settings (advanced)

NoOfWindings Two winding - - Two winding Number of transformer windings
Three winding
ConnTypeW1 WYE (Y) - - WYE (Y) Connection type of winding 1
Delta (D)
ConnTypeW2 WYE (Y) - - WYE (Y) Connection type of winding 2
Delta (D)
ConnTypeW3 WYE (Y) - - Delta (D) Connection type of winding 3
Delta (D)
ZSCurrCor Off - - Off Enable or disable the zero sequence
On current correction for a single delta
winding
ClockNumberW2 0 [0 deg] - - 0 [0 deg] Phase displacement between W2 &
1 [30 deg lag] W1, hour notation
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg]
7 [150 deg lead]
8 [120 deg lead]
9 [90 deg lead]
10 [60 deg lead]
11 [30 deg lead]
ClockNumberW3 0 [0 deg] - - 5 [150 deg lag] Phase displacement between W3 &
1 [30 deg lag] W1, hour notation
2 [60 deg lag]
3 [90 deg lag]
4 [120 deg lag]
5 [150 deg lag]
6 [180 deg]
7 [150 deg lead]
8 [120 deg lead]
9 [90 deg lead]
10 [60 deg lead]
11 [30 deg lead]
OLTCWinding Not in use - - Not in use Transformer winding where OLTC1,
W1 OLTC2 is located
W2
W3
W1, W2
W1, W3
W2, W1
W2, W3
W3, W1
W3, W2
RatedTapOLTC1 1 - 100 - 1 6 OLTC1 rated voltage tap position
designation
HighTapOLTC1 1 - 100 - 1 11 OLTC1 number of tap position at
maximum voltage

Technical manual
Monitoring

LowTapOLTC1 1 - 100 - 1 1 OLTC1 number of tap position at
minimum voltage
StepSizeOLTC1 0.01 - 30.00 % 0.01 1.00 Voltage change per OLTC1 step in
percent of rated voltage
RatedTapOLTC2 1 - 100 - 1 6 OLTC1 rated voltage tap position
designation
HighTapOLTC2 1 - 100 - 1 11 OLTC2 number of tap position at
maximum voltage
LowTapOLTC2 1 - 100 - 1 1 OLTC2 number of tap position at
minimum voltage
StepSizeOLTC2 0.01 - 30.00 % 0.01 1.00 Voltage change per OLTC2 step in
percent of rated voltage

Table 876: PTRSTHR Monitored data

TFDUR REAL - s Last fault duration
TFCNT INTEGER - - Overall number of faults detected
since last reset
W1IP REAL - A Maximum peak current of winding 1
among all phases of the last event
W1IRMS REAL - A Maximum RMS current of winding 1
I2TP REAL - % Maximum through fault (I^2)t in % of
set limit among all windings and
phases of last event
W1CMLIP REAL - A Maximum cumulative peak current of
winding 1 among all phases
CMLI2TP REAL - % Maximum cumulative through
fault(I^2)t in % of set limit among all
windings and phases
L1URMS REAL - kV Measured RMS voltage, phase L1
W1L1MIRMS REAL - A Measured RMS current of winding 1,
phase L1

Technical manual
Monitoring

phase L2
phase L3
phase L1
phase L2
phase L3
phase L1
phase L2
phase L3
18.12.7 Operation principle GUID-55C86B69-66D5-4BB9-9C11-049BD7199F78 v1
The PTRSTHR function monitors the transformer during through fault and predicts the
degradation of its withstand capability. It detects the fault when the measured RMS current is
above the set threshold current limit. When the fault is detected, it calculates the I2t value for
the through fault duration with the calculated winding current. This calculation is triggered for
all individual events of through fault, winding-wise and in all phases. The function compares
the calculated I2t for each fault event with the set limit of I2t and an alarm is raised when the
limit is exceeded.
Similarly, the cumulative effect of through faults with the accumulated I2t is calculated
throughout the transformer lifetime. This cumulative I2t is compared with the set limit of ΣI2t
and an alarm is raised when the limit is exceeded.
Additionally, the function monitors the time between subsequent through faults against the
set time. If this time is shorter than the set time, then the multi-through faults in short time
detection warning is raised.
The function also reports the below monitoring parameters of each winding and phases:
• The maximum peak current during the fault

• The maximum RMS current during the fault
• The maximum peak current during all through fault duration
• Percentage degradation of transformer withstand capability with respect to the
calculated I2t
• Total percentage degradation of transformer withstand capability with respect to the
calculated ΣI2t
• Difference between subsequent through fault I2t values
• Number of through faults detected
This function can be used for both 2-winding and 3-winding transformer configurations with
maximum two on-line load tap changers. It calculates all required parameters for each through
faults and produces an individual report per event.

Technical manual
Monitoring
18.12.7.1 Transformer winding currents calculation GUID-F0DD5908-B7A0-4DB3-9096-8392C2A2FE04 v1
Generally, line currents are measured by current transformers at the transformer terminals.
However, the winding current should be calculated and used to estimate the degradation of
withstand capability due to through faults. Winding currents calculation from line currents
depend upon the transformer connection type and the phase displacement between winding
currents. Therefore, winding current calculation is required to protect the transformer within
its capacity. On the other hand, CT measurements done at the windings do not require any
further derivations of the winding current.
Consider the Dy11 transformer configuration shown in Figure 627, where ia, ib and ic are delta
winding side line currents and iA, iB and iC are star winding side line currents.
ia iA
ic iB
ibc
ib iC
Figure 627: Transformer configuration Dy11

In this example, both line currents and winding currents (phase) are equal in the star winding
side. The delta winding currents iac, ibc and ica are derived from the line currents ia, ib and ic.
Line currents at the delta side do not have zero sequence currents, which are present at the
star winding side in case of earth faults. In order to calculate the transformer through fault
withstand capability, these delta side winding currents are required to be calculated from the
measured currents. To perform this calculation, the number of windings is selected by the
NoOfWindings setting and the transformer winding configuration is selected by the
ConnTypeWx (where, x = winding number 1, 2 or 3) setting.
The winding current calculation requires voltage ratio information, which is dynamically
calculated from the present OLTC tap position. The tap position inputs TAPOLTC1 and
TAPOLTC2 can be driven from the tap changer supervision function (YLTC). The
RatedVoltageWx (where, x = winding number 1, 2 or 3) settings and settings corresponding to
OLTC1 and OLTC2 are required to calculate the voltage ratio. The placement of OLTC1 and
OLTC2 are selected using the OLTCWinding setting.
Table 877: Corresponding settings for OLTC parameters

Parameter Setting
Rated tap position RatedTapOLTC#1)
Minimum voltage tap position HighTapOLTC#
Maximum voltage tap position LowTapOLTC#
Step size StepSizeOLTC#
1) # = OLTC number 1 or 2
Phase displacement between the windings decides the direction of circulating zero sequence
current. The clock position of the phase displacement between winding 1 and winding 2 is set
using the ClockNumberW2 setting. Similarly, the clock position between winding 1 and winding
3 is set using the ClockNumberW3 setting.

Technical manual
Monitoring
The zero sequence current correction can be enabled or disabled by selecting the ZSCurrCor
setting. If the ZSCurrCor setting is selected as On, then the zero sequence current which
circulates internally in the delta winding is estimated from the available winding currents and
used for further calculations. If the ZSCurrCor setting is selected as Off, then the zero
sequence current is considered as zero. The utility can select the ZSCurrCor setting as Off
when:
• All the windings are in WYE (Y) configuration

• Transformer has two or more windings in the delta configuration
• Winding current transformers are used (In this case, the ConnTypeWx settings should be
set as WYE)
The function internally calculates the winding RMS current and peak current from the
measured current samples and used for further calculations.
18.12.7.2 Through fault detection GUID-6F61907D-3B6C-45F7-A99F-128414DE34AD v1
Through faults are detected if the measured RMS current in any phase among all windings is
above the set limit. The user can set the limit with reference to the IEEE standard (3.5 times
Irated) or according to the transformer manufacturer specification. The settings for the
through fault detection threshold (W1I>, W2I> and W3I>) are given winding-wise.
In addition to the limit check, through fault detection is verified against the INHIBIT binary
input. The INHIBIT input can be connected, for example, from the transformer differential
protection TxWPDIF function which blocks the through fault detection in case of an internal
fault. Similarly, the function can be blocked during transformer energization inrush by
connecting the second harmonic blocking to the INHIBIT input.
If both conditions are through, then the persistence of the signal is checked for set minimum
time tMin value. Through fault is declared only when the signal persists for the minimum
duration and BLOCK or INHIBIT input are not high. The function resets the through fault
detection alarm output when the measured current goes below the set limit including
hysteresis limits.
The through fault detection alarm outputs, WxLyALM (x = winding number 1 to 3 and y = phase
L1, L2 or L3) are given for all windings phase-wise. Additionally, the function has a general
alarm to indicate through fault detection. Once the through fault detection alarm has raised,
the function starts to calculate the I2t.
Besides this, the binary input EXTTRIG is used to trigger the through fault withstand capability
calculations.
W1L1ALM
tMin
W1L1IRMS
OR t CalculationStart
OR
W1I>
tMin
EXTTRIG
Figure 628: Through fault detection logic

In order to avoid the I2t calculation during any unwanted conditions, either the BLOCK or
INHIBIT inputs should be activated. Below cases describes the interoperability between
BLOCK, INHIBIT and I2t calculation:

Technical manual
Monitoring
• If BLOCK or INHIBIT input is activated first and a fault is detected, then that particular
fault is discarded.
• If BLOCK or INHIBIT input is activated first and deactivated before confirming the
detected fault, then that particular fault is considered.
• If BLOCK or INHIBIT input is activated after the fault confirmation, then that particular
fault is not discarded.
18.12.7.3 Through fault duration and count of occurrence calculation GUID-362E172E-D08B-4939-AFE5-810F90FB4CB4 v1
The through fault withstand capacity is decided based on the fault current magnitude and
duration of the fault. The fault duration is calculated from the instant the measured RMS
current crosses the set threshold current limit to the through fault detection reset. The TFDUR
output gives the duration of through fault in seconds. The through fault detection alarm is
picked up after confirming the fault with a time delay of tMin. If the fault is not confirmed,
then the TFDUR output will not be updated.
Additionally, the function measures the time between transformers subsequent through fault
events. When this time difference is smaller than the tMultiThroFlt setting, then the function
issues a warning signal MTFWRN. The transformer manufacturer may indicate the maximum
number of through fault per time period in order to set the tMultiThroFlt setting.
The function counts the number of through faults for all windings and phases whenever a
through fault is detected. Also, the overall transformer through fault count is incremented by
one if any winding phase detects the fault. The fault count increment occurs after each fault
has been cleared.
The through fault counts can be reset to the default value by activating either the RSTTFCNT
binary input or the command input. The default values for each individual winding phase and
the overall transformer is set through the InitCmlTFCnt and InitTFCntWxLy parameters
respectively.
The binary input ACCFREEZE can be activated to stop incrementing through fault counters. In
order to control the function during the test mode, connect the PTRSTHR function block with
the TESTMODE function block, as shown in Figure 629.
PTRSTHR
I3PW1* ALARM
I3PW2* W1L1ALM
I3PW3* W1L2ALM
TESTMODE U3P* W1L3ALM
IED_TEST TEST BLOCK W2L1ALM
IED_TEST ACCFREEZE W2L2ALM
BLOCK EXTTRIG W2L3ALM
NOEVENT INHIBIT W3L1ALM
INPUT RSTTFCNT W3L2ALM
SETTING RSTCMLI2T W3L3ALM
IEC61850 TAPOLTC1 MTFWRN
TAPOLTC2 I2TALM
CMLI2TALM
REPMADE
Figure 629: ACT configuration for test mode connection

Technical manual
Monitoring
18.12.7.4 Through fault withstand capability calculation GUID-6F0B19EF-434C-47F2-9783-50EFB5762ED7 v1
The transformer is subjected to electrical and mechanical stress when a fault current flows
through it, which is more than the transformer overload current. In general, stress reduces the
transformer life and it becomes even worse when stress occurs due to through faults. Stress
can cause insulation damages, conductor displacement and overall it weakens the windings
and collapses their structure. Therefore, stress reduces the transformer withstand capability
throughout its lifetime. Degradation of the transformer withstand capability can be predicted
using the equation:
Where,
I = Short circuit current
t = Duration of fault
k = Constant
Once the function detects a through fault based on the measured RMS current, it starts to
calculate I2t. The I2t calculation is based on the fault current instantaneous sample value and
the duration of the fault. If the fault is confirmed after the minimum time delay, then the I2t
calculation will be carried-out until the fault is cleared. If the fault is cleared before minimum
time delay, then the calculated I2t is discarded. This calculation is done for all windings and
phases individually and repeats for all individual faults.
The calculated I2t value is used to check whether the transformer is within its withstand
capability or not. This is monitored with respect to the maximum withstand capability set
limit. The I2t limits can be set winding-wise using MaxI2tW1, MaxI2tW2 and MaxI2tW3 settings
and this limit is applicable for all phases of the respective winding. If the calculated I2t value of
any winding crosses the corresponding set limit, then a general alarm I2TALM is raised. Once
the I2TALM alarm is raised, it resets after the set time tPulse.
Transformer through faults produces physical forces that cause insulation compression,
insulation wear, and friction-induced displacement in the winding. These effects are
cumulative and should be considered throughout the transformer lifetime. The damage
intensity from through faults depends on the current magnitude, fault duration, and the total
number of fault occurrences. Therefore, the function accumulates the calculated I2t value over
all through faults for winding and phase-wise.
The calculated cumulative ƩI2t values are used to check whether the transformer is within its
withstand capability or not. This is monitored with respect to the maximum cumulative
withstand capability set limit. The ƩI2t limits can be set winding-wise using MaxI2tCmlW1,
MaxI2tCmlW2 and MaxI2tCmlW3 settings and this limit is applicable for all phases of the
respective winding. If the calculated ƩI2t values of any winding cross the corresponding set
limit, then a general alarm CMLI2TALM is raised. Once the CMLI2TALM alarm is raised, it resets
only if the cumulative I2t values are reset to value below the set limit. In order to reset the ƩI2t
values to default, activate either the RSTCMLI2T binary input or the command input. Default
values for each individual winding phase is set using InitCmlI2tWxLy parameters.

Technical manual
Monitoring
WxL1zRMS tMin
a ≥ b t Time TFDUR
OR
WxI> accumulation
1 T WxLzTFCNT
tMin Ʃ
0 F
EXTTRIG
RSTTFCNT
InitTFCntWxLz T
F
WxLzISAMPLES 2 q‐1
a
T WxLzI2T
Ʃ
SAMPLINGRATE F
0.0 T 0.0
F q‐1
I2TALM
a ≥ b
MaxI2tWx
÷ WxLzI2TP
100.0 WxLzCI2T
RSTTFCNT Ʃ
InitTFCntWxLz T
F
q‐1 CMLI2TALM
a ≥ b
MaxCmlI2tWx
÷ WxLzCI2TP
100.0
x – winding 1, 2 and 3
z – Phase L1, L2 and L3
Figure 630: Through fault withstand capability calculation

Both I2t and ƩI2t values are limited to 3.6 e12 and the maximum fault duration for I2t calculation
is limited to 1 min. Additionally, the function performs a plausibility check on the measured
current samples prior to the calculation, which limits the maximum sample value as ±1e6 A.
18.12.7.5 Preparation of data for reporting GUID-75426B18-64EE-44A7-8EB4-21B8D8378CAD v1
The function monitors the following parameters which are related to through fault for all
windings and phases:
• Fault peak current

• Cumulative maximum peak fault current
• Fault RMS current
• Delta value of I2t between two subsequent through faults
The peak and RMS current are measured during the interval of through fault
period.
Additionally, the function gives the percentage degradation of withstand capability for
individual through faults and all faults as a cumulative effect.
The percentage degradation of withstand capability for the individual through fault event is
calculated as:
I 2 teventwise
Event-wise % degradation of withstand capability= 100
MaxI 2tWx
Where,

Technical manual
Monitoring
I2teventwise = Calculated I2t for an event of through fault
MaxI2Wx = xth winding maximum allowable withstand capability degradation during through
fault.
The total percentage degradation of withstand capability for the transformer is calculated as:
 I 2t
Total % degradation of withstand capability  100
MaxI 2tCmlWx
Where,
ΣI2t = Calculated ΣI2t over all through faults
MaxI2tCmlWx = xth winding maximum allowable withstand capability degradation over all
through faults.
The function provides general outputs from all windings and phases, which is displayed in the
local HMI and monitoring tool apart from the through fault monitoring report. The general
data are calculated as the maximum value out of all available data. The maximum fault peak
current, maximum cumulative fault peak current, and maximum fault RMS current outputs are
derived for each winding as the maximum of respective winding all phase values. The event
wise % degradation and total % degradation of withstand capability outputs are derived as
the maximum value of all winding and phase values. In the through fault monitoring report, the
data is divided into two parts; general and winding wise for maximum 3 windings.
The function provides service values of measured current RMS values for each phase of all
windings. Also, it displays the measured RMS phase-to-earth voltage values for any one of the
windings (which is connected to the function block). The instantaneous RMS voltage values are
captured at one and a half power cycle delayed from the point of detected fault or the fault
detection reset, whichever is earlier. In order to indicate the report is ready for file transfer, the
function provides a binary output REPMADE, see Figure 631. The outputs given as ‘general
data’ and ‘winding wise for all phases’ in the through fault monitoring report are shown in
Table 878.
Table 878: Through fault monitoring report outputs

General data Winding wise for all phases
• Test mode status • Cumulative maximum peak • Number of faults
• Fault duration in current W1 • Event wise maximum peak current
seconds • Cumulative maximum peak • Event wise RMS current
• Overall number of current W2 • Event wise I2t
faults • Cumulative maximum peak • Event wise I2t in % of set limit
• Event wise maximum current W3 • Delta I2t compared to prior fault
peak current W1 • Cumulative I2t in % of set • Cumulative maximum peak current
• Event wise maximum limit • Cumulative I2t
peak current W2 • Event wise RMS voltage L1 • Cumulative I2t in % of set limit
• Event wise maximum (The winding is based on
peak current W3 the input connection to
• Event wise RMS U3P)
current W1 • Event wise RMS voltage L2
• Event wise RMS (The winding is based on
current W2 the input connection to
• Event wise RMS U3P)
current W3 • Event wise RMS voltage L3
• Event wise I2t in % of (The winding is based on
set limit the input connection to
U3P)
• Multiple faults warning

Technical manual
Monitoring
The winding-wise data shows the fault phase values as calculated but other healthy phases will
show zero except peak and RMS values as calculated.
If two-winding configuration is used, then only winding 1 and winding 2 information are shown
in the report (winding 3 information will be hidden in the report). However, the general
information shows all windings data and it will show winding 3 data as zero in the case of two-
winding configuration.
U3P
I3PWx
TAPOLTC1
TAPOLTC2
NoOfWindings
ConnTypeWx
ZSCurrCor ALARM
Winding current WxLzALM
ClockNumberW2
calculation MTFWRN
ClockNumberW3 I2TALM
OLTCWinding CMLI2TALM
REPMADE
RatedTapOLTCy
WxLzMIRMS
HighTapOLTCy WxIP
LowTapOLTCy WxIRMS
I2TP
StepSizeOLTCy
WxCIP
CI2TP
Fault I2t TFTIME
EXTTRIG
calculation TFCNT
INHIBIT
WxLzTFCNT
WxI> WxLzIP
Through fault WxLzIRMS Through fault
tMin
detection WxLzI2T report
BLOCK
WxLzI2TP
tPulse
WxLzDI2T
tMultiThroFlt WxLzCIP
WxLzCI2T
WxLzCI2TP
TFDUR
LzURMS
MaxI2tWx
MaxI2tCmlWx
InitCI2TWxLz
InitTFCntWxLz
RSTTFCNT
RSTCMLI2T
x – Winding 1, 2 and 3
z – Phase L1, L2 and L3
Figure 631: Simplified logic diagram for through fault monitoring PTRSTHR
Through fault reports can be viewed using the local HMI. As shown in Figure 632, the list of
saved through fault reports those are grouped based on the instance can be found on the local
HMI under Main menu/Measurements/Through fault reports.
Figure 632: List of saved through fault reports

The local HMI mapped inputs can be displayed by entering each through fault report, see
Figure 633.

Technical manual
Monitoring
Figure 633: Report for one event

The through fault monitoring report can also be viewed in PCM600, using the through fault
monitoring tool, see Figure 634.
Figure 634: Through fault monitoring tool

GUID-3763D0D6-AD44-4C9B-91E4-050C0B63C7EA v1
Table 879: PTRSTHR technical data

Operate current (50-1000)% of IBase ±1.0% of Ir at I ≤ Ir
Reset ratio > 95% at (50-1000)% of IBase –

Technical manual
Monitoring
18.13 Current harmonic monitoring CHMMHAI GUID-692151F8-812B-4B32-AE86-E7A4E4B0101B v1
GUID-C7863D78-34DB-42E5-90FE-6483EDAAF319 v1

Current harmonic monitoring CHMMHAI ITHD ITHD
18.13.2 Functionality GUID-CD97D6CF-7343-416B-82D3-8352FFF9D73E v1
Current harmonic monitoring function CHMMHAI is used to monitor the current part of the
power quality of a system. It calculates the total harmonic distortion (THD) with respect to
fundamental signal amplitude, and the total demand distortion (TDD) with respect to
maximum demand load current. These indices indicate the current signal quality factor.
Additionally, the function is used to calculate the numerical multiple of rated frequency
harmonics amplitude and harmonic distortion upto the 5th order. It helps the user to know the
predominant harmonic frequencies order and their amplitudes present in the system. The
function also calculates the crest factor to indicate the effectiveness of the signal. All
calculations in the harmonic monitoring function are based on IEEE 1459 and IEEE 519
standards.
The current harmonic function monitors the harmonic distortion and demand distortion
values constantly. Whenever these value crosses their set limit levels, a warning signal will be
initiated. If the warning signal persists continuously for the set time, an alarm signal will be
generated.
18.13.3 Function block GUID-5165010F-A903-4D0F-8DE2-7AE03D80C94E v1
CHMMHAI
I3P* THDALM
BLOCK TDDALM
BLKALM 2NDHDALM
BLKWRN 3RDHDALM
4THHDALM
5THHDALM
THDWRN
TDDWRN
2NDHDWRN
3RDHDWRN
4THHDWRN
5THHDWRN
DCAMPL1
DCAMPL2
DCAMPL3
DCAMPN
Figure 635: CHMMHAI function block

Technical manual
Monitoring
18.13.4 Signals
Table 880: CHMMHAI Input signals

SIGNAL
BLKALM BOOLEAN 0 Block alarm signals
BLKWRN BOOLEAN 0 Block warning signals
Table 881: CHMMHAI Output signals

THDALM BOOLEAN General alarm signal for total harmonic distortion
TDDALM BOOLEAN General alarm signal for total demand distortion
2NDHDALM BOOLEAN 2nd order harmonic distortion alarm signal (Max of 3 phase)
3RDHDALM BOOLEAN 3rd order harmonic distortion alarm signal (Max of 3 phase)
4THHDALM BOOLEAN 4th order harmonic distortion alarm signal (Max of 3 phase)
THDWRN BOOLEAN General warning signal for total harmonic distortion
TDDWRN BOOLEAN General warning signal for total demand distortion
2NDHDWRN BOOLEAN 2nd order harmonic distortion warning signal (Max of 3
phase)
3RDHDWRN BOOLEAN 3rd order harmonic distortion warning signal (Max of 3
phase)
4THHDWRN BOOLEAN 4th order harmonic distortion warning signal (Max of 3
phase)
phase)
DCAMPL1 REAL DC Component value of phase L1
DCAMPN REAL DC Component value of neutral
18.13.5 Settings
Table 882: CHMMHAI Non group settings (basic)

Value groups

Technical manual
Monitoring
Table 883: CHMMHAI Group settings (basic)

On
MaxLoadCurr 10.0 - 200.0 %IB 0.1 100.0 Maximum demand load current at PCC
for total demand distortion
calculation
WrnLimitTHD 2.5 - 100.0 % 0.1 5.0 Warning limit for percentage total
harmonic distortion value
tDelayAlmTHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
total harmonic distortion
WrnLimitTDD 2.5 - 100.0 % 0.1 5.0 Warning limit for percentage total
demand distortion value
tDelayAlmTDD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
total demand distortion
WrnLimit2ndHD 2.5 - 100.0 % 0.1 3.5 Warning limit for percentage 2nd
order harmonic distortion value
tDelayAlm2ndHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
2nd order harmonic distortion
WrnLimit3rdHD 2.5 - 100.0 % 0.1 3.0 Warning limit for percentage 3rd order
tDelayAlm3rdHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
3rd order harmonic distortion
WrnLimit4thHD 2.5 - 100.0 % 0.1 2.5 Warning limit for percentage 4th
tDelayAlm4thHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
4th order harmonic distortion

Table 884: CHMMHAI Monitored data

THDL1 REAL - % Total harmonic distortion of phase L1
THDN REAL - % Total harmonic distortion of neutral
TDDL1 REAL - % Total demand distortion value of
phase L1
phase L2
phase L3
TDDN REAL - % Total demand distortion value of
neutral
2NDHD REAL - % 2nd order harmonic distortion (Max of
3 phase)

Technical manual
Monitoring

3RDHD REAL - % 3rd order harmonic distortion (Max of
3 phase)
4THHD REAL - % 4th order harmonic distortion (Max of
3 phase)
3 phase)
CFL1 REAL - - Crest factor of phase L1
CFN REAL - - Crest factor of neutral
TRMSL1 REAL - A True RMS value of phase L1
TRMSN REAL - A True RMS value of neutral
MEASFREQ REAL - Hz Measured frequency
FUNDL1 REAL - A Fundamental amplitude of phase L1
FUNDN REAL - A Fundamental amplitude of neutral
HAAMPL1 REAL - A Harmonic RMS value of phase L1
HAAMPN REAL - A Harmonic RMS value of neutral
DCAMPL1 REAL - A DC Component value of phase L1
DCAMPN REAL - A DC Component value of neutral
HA2NDAMP REAL - A 2nd order Harmonic RMS value (Max
of 3 phase)
HA3RDAMP REAL - A 3rd order Harmonic RMS value (Max of
3 phase)
HA4THAMP REAL - A 4th order Harmonic RMS value (Max of
3 phase)
HA5THAMP REAL - A 5th order Harmonic RMS value (Max of
3 phase)
18.13.7 Graphical display configurable data

GUID-F669DFF5-D999-4D6A-8BC7-4A0EA5870178 v1
Table 885: CHMMHAI Graphical display configurable data

Name Description
2NDHD 2nd order harmonic distortion
3RDHD 3rd order harmonic distortion
4THHD 4th order harmonic distortion

Technical manual
Monitoring
Name Description
HAAMPL1 Harmonic RMS value of phase L1
HAAMPN Harmonic RMS value of neutral
MEASFREQ Measured frequency
TDDL1 Total demand distortion value of phase L1
TDDN Total demand distortion value of neutral
THDL1 Total harmonic distortion of phase L1
THDN Total harmonic distortion of neutral
TRMSL1 True RMS value of phase L1
TRMSN True RMS value of neutral
FUNDL1 Fundamental amplitude of phase L1
FUNDN Fundamental amplitude of neutral
18.13.8 Operation principle GUID-C9E8E0EA-DED7-40F3-9520-2276398881DF v1
The current harmonic monitoring function calculates the following power quality indices based
on the current input signal:
• Total Harmonic Distortion (THD) in percentage of fundamental component

• Individual Harmonic Distortion (IHD) in percentage of fundamental component
• Total Demand Distortion (TDD) in percentage of maximum load demand current
• Crest Factor (CF)
The harmonic function calculates fundamental signal magnitude and specific harmonic values
from 2nd to 5th orders of the given signal using FFT filter.
The main functionality of the harmonic monitoring function is to find the total harmonic
distortion (THD) for current signals. If the distorted voltage and current waveforms consist of
only harmonics, a measurement time interval kT (T = Cycle Time) enables the correct
measurement of RMS value. If the monitored waveform contains an interharmonic, then the
measurement time interval kT should be designed according to the minimum frequency signal
measurement. The time interval, which is required for an accurate measurement of RMS values
and power, is the least common multiple of the periods of the fundamental component and
the interharmonic component (i.e., kT = mTi ; Ti =1 / fi , where ‘fi’ is the interharmonic
frequency and ‘k’, ‘m’ are integer numbers). When the measurement time interval kT does not
include an integer number of periods Ti (i.e., kT ≠ mTi), the RMS value of the interharmonic is
inaccurate. This error is also reflected in the measurement accuracy of the total RMS value. If
at least one of the interharmonics of order h is an irrational number, then the observed
waveform is not periodic, commonly known as Nearly Periodic. In such a case, the
measurement time interval kT should be infinitely large in order to have a correct

Technical manual
Monitoring
measurement of the RMS value or power. The larger the measurement time kT, the lesser the
significance of errors caused by interharmonics.
Figure 636 shows the envelopes of the maximum errors made when the RMS value of an
interharmonic is measured in function of the number of cycle’s m. For example, if m = 20, the
RMS value of the interharmonic will be measured with a maximum error of ± 0.2%. For the
accurate measurement of true RMS value and harmonic components amplitude, FFT filter
design is used for harmonic monitoring functionality.
2
1.6
1.2
MAXIMUM ERROR (%)
0.8
0.4
0
‐0.4
‐0.8
‐1.2
‐1.6
‐2
0 20 40 60 80 100 120
NUMBER OF CYCLES m
Figure 636: Percent maximum error of RMS measurement versus number of cycles
Individual harmonic distortion is calculated only for 2nd to 5th harmonic orders. For simplicity,
maximum harmonic amplitude out of all phases is considered for monitoring and the same
value is considered for harmonic distortion calculation, warning and alarm conditions. Phase
wise harmonic values are available in the IEC 61850 data model. The overview diagram of
harmonic monitoring function is shown in Figure 637.
A FFT filter is used to calculate complex amplitude and frequency for the rated frequency, and
its harmonic components up to 5th order include DC component. The filter length is fixed to 1
second, which is 1024 samples at 1 kHz sampling for calculation in each execution of the FFT
filter. This gives an increased resolution on true RMS calculation upto interharmonic level.
The function calculates THD, IHD, TDD and CF using the derived quantities of the given signal.
The FFT filter tries to find the fundamental frequency in a frequency search range of ± 5 Hz
from the system rated frequency. If the fundamental frequency is not able to identify from the
measured signal, then it will not do any calculation.
In many cases, the traditional instrument transformers which are only designed
to have a high accuracy at rated frequency, are used for harmonic
measurements. This questions accuracy of the harmonic measurements and
the reliability of any compliance assessment. In this function, the measurement
accuracy level of instrument transformers are not considered.
The following sections describe how each power quality indices are calculated.

Technical manual
Monitoring
18.13.8.1 Total harmonic distortion (THD) GUID-49B95C3B-76CB-4F99-AA63-720FD3A7C619 v1
The overall deviation of a distorted wave from its fundamental can be estimated using total
harmonic distortion (THD).
The total harmonic distortion of the current is as follows:
 2 
IH   I 
%THDI      1  *100
I1   I1  
 
Where,
= Current true RMS value
= Current fundamental DFT magnitude
= Current harmonic magnitude (including interharmonics)
Harmonic RMS HRMS
Calculation
FFT Filter
I3P (Input from SMAI) MEASFREQ
I3P FREQ
THDx
TRMS Total Harmonic
Distortion
FUND Calculation #HD
FundDFT
Harm2nd
Harm3rd
th
Harm4 THDALM
Individual
th Harmonic
Harm5 #HDALM
Distortion
Calculation THDWRN
Blocking , Alarm
and Warning
#HDWRN
logic TDDALM
TDDWRN
Peak
DCComp
Total Demand
Distortion
Calculation
MaxLoadCurr
TDDx
Crest Factor CFx
PEAK Calculation
DCAMPx
BLOCK
WrnLimit#HD
WrnLimitTHD
tDelayAlm#HD Harmonic RMS Values HAAMPx
tDelayAlmTHD Individual Harmonic HA#AMP
RMS Values
WrnLimitTDD
Fundamental FUNDx
tDelayAlmTDD Values
BLKALM True RMS TRMSx
Values
BLKWARN
x – Phase outputs L1 , L2, L3 and N
nd rd th th
# – Harmonic order (2 , 3 , 4 and 5 )
Figure 637: Simplified logic diagram for current harmonic monitoring CHMMHAI
18.13.8.2 Individual harmonic distortion (IHD) GUID-2B5D203F-9722-4F5F-A2E9-0743D6197A95 v1
The individual harmonic distortion is defined as the percentage of harmonics for order h with
respect to the fundamental frequency.
The individual harmonic distortion of the current for order h is as follows:

Technical manual
Monitoring
Ih
% IHDI h  *100
I1
Where, Ih = Current harmonic magnitude for the order h
Additionally, it calculates the maximum individual harmonic distortion value as the maximum
of all phase signals harmonic distortion. The individual harmonic distortion is used further in
warning and alarm logic.
18.13.8.3 Total demand distortion (TDD) GUID-753B43A5-133E-4F55-B610-7E9FFC34A03D v1
According to IEEE 519-1992 standard, the total effect of distortion in the current waveform at
the Point of Common Coupling PCC is measured by the index called total demand distortion
(TDD), as a percentage of the maximum demand current at the PCC. In other words, it is
defined as the ratio of the root-mean-square of the harmonic content, to the root-mean-
square of the maximum demand load current at the PCC. It is expressed as the percentage of
maximum demand load current.
I 
%TDD   H  *100
 IL 
Where,
= 2 2 = Current harmonic magnitude

1
= Maximum demand load current
When the PCC is considered at the service entrance or utility metering point, the IEEE-519
standard recommends that the maximum demand load current (IL) be calculated as the
average current of the maximum demand for the preceding 12 months.
18.13.8.4 Crest factor (CF) GUID-C9ED45F0-F780-4E32-B117-7F6B11710D5C v1
Crest factor is the ratio between value of the peak current and its RMS value.
The crest factor of current is as follows:
I Peak
CFI 
I RMS
Where,
= Current peak amplitude
= Current true RMS
18.13.8.5 Blocking and alarm logic GUID-800D9E0F-F89D-4FCD-BEBA-F2C83F28409F v1
It is possible to set warning limits for each individual harmonic order. If the calculated
individual harmonic distortion exceeds beyond the warning limit, an individual harmonic
warning will be raised. Also, the user can set the time delay to alarm for the individual

Technical manual
Monitoring
harmonic distortion value. If the IHD value sustains above the warning limit for the set time, an
alarm signal will be raised.
Similarly, total harmonic distortion and total demand distortion have separate settings for
warning limit and alarm time delay. Once the THD or TDD value exceeds beyond set warning
limit, a separate warning signal will be raised. If the warning signal sustains above the time set
at alarm time delay setting, an individual alarm signal will be raised.
The phase-wise alarm and warning signals with respect to total harmonic distortion is
provided through IEC 61850 communication protocol (general alarm and general warning are
also provided). Warning and alarm based on individual harmonic distortion are activated for
specific harmonic order outputs of alarm and warning. To avoid oscillations of warning signals
at boundary conditions, a hysteresis has been included.
When the BLOCK input is activated, all binary outputs will be forced to reset. Also, the alarm
outputs and warning outputs can be separately blocked by activating the BLKALM and
BLKWRN inputs, respectively.
BLOCK
BLKWARN
BLKALM
Total Harmonic
Distortion
a
a > b AND
THDWRN
b
WrnLimitTHD tOff
t AND
THDALM
tDelayAlmTHD
Individual Harmonic
Distortion
(Max of phase wise
a
a > b AND
#HDWRN
harmonic distortion) b
WrnLimit#HD tOff
#HDALM
t AND
tDelayAlmIHD #
Total Demand
Distortion
a
a > b AND
TDDWRN
b
WrnLimitTDD tOff
t AND
TDDALM
tDelayAlmTDD
Figure 638: Simplified logic diagram for warning and alarm

GUID-09EC65AC-C60B-4256-A601-FE2CC90D26EC v1
Table 886: CHMMHAI (50/60 Hz) technical data

Fundamental Harmonic
Frequency (0.95 - 1.05) X fr 2nd order to 5th order (0.1 - 0.5) X Ir ± 2 mHz
True RMS (0.1 to 1) X Ir None ± 0.5%
1 X Ir 2nd order to 5th order (0.1 - 0.5) X Ir ± 2%

Technical manual
Monitoring

Fundamental (0.1 to 1) X Ir None ± 0.5%
1 X Ir 2nd order to 5th order (0.1 - 0.5) X Ir ± 0.5%
Crest Factor (0.1 to 1) X Ir None ± 2%
Harmonic (0.1 to 1) X Ir 2nd order to 5th order (0.1 - 0.5) X Ir ± 5%
Amplitude
Total Demand (0.1 to 1) X Ir 2nd order to 5th order (0.1 - 0.5) X Ir ± 6%
Distortion (TDD)
Total Harmonic (0.1 to 1) X Ir 2nd order to 5th order (0.1 - 0.5) X Ir ± 6%
Distortion (ITHD)
18.14 Voltage harmonic monitoring VHMMHAI GUID-B2F24353-AAEA-4520-BB1C-5FD5FFCFC67B v1
GUID-BF90E93F-C0F4-43F7-BDD5-F3C289B5535B v1

Voltage harmonic monitoring VHMMHAI UTHD VTHD
18.14.2 Functionality GUID-868ED1BB-A921-45DE-94C4-0CF23ECD9ADA v1
Voltage harmonic monitoring function VHMMHAI is used to monitor the voltage part of the
power quality of a system. It calculates the total harmonic distortion (THD) with respect to the
fundamental signal amplitude which indicates the voltage signal quality factor.
Additionally, the function is used to calculate the numerical multiple of rated frequency
harmonics amplitude and harmonic distortion upto the 5th order. It helps the user to know the
predominant harmonic frequencies order and their amplitudes present in the system. The
function also calculates the crest factor to indicate the effectiveness of the signal. All
calculations in the harmonic monitoring function are based on IEEE 1459 and IEEE 519
standards.
The voltage harmonic function monitors the harmonic distortion value constantly. Whenever
these value crosses their set limit levels, a warning signal will be initiated. If the warning signal
persists continuously for the set time, an alarm signal will be generated.

Technical manual
Monitoring
18.14.3 Function block GUID-60BEA940-7577-471C-A7E3-64D1E65CA824 v1
VHMMHAI
U3P* THDALM
BLOCK 2NDHDALM
BLKALM 3RDHDALM
BLKWRN 4THHDALM
5THHDALM
THDWRN
2NDHDWRN
3RDHDWRN
4THHDWRN
5THHDWRN
DCAMPL1
DCAMPL2
DCAMPL3
DCAMPN
DCAMPL1L2
DCAMPL2L3
DCAMPL3L1
Figure 639: VHMMHAI function block
18.14.4 Signals
Table 887: VHMMHAI Input signals

U3P GROUP - Group signal for voltagee input
SIGNAL
BLKALM BOOLEAN 0 Block alarm signals
BLKWRN BOOLEAN 0 Block warning signals
Table 888: VHMMHAI Output signals

THDALM BOOLEAN General alarm signal for total harmonic distortion
2NDHDALM BOOLEAN 2nd order harmonic distortion alarm signal (Max of 3 phase)
3RDHDALM BOOLEAN 3rd order harmonic distortion alarm signal (Max of 3 phase)
THDWRN BOOLEAN General warning signal for total harmonic distortion
2NDHDWRN BOOLEAN 2nd order harmonic distortion warning signal (Max of 3
phase)
3RDHDWRN BOOLEAN 3rd order harmonic distortion warning signal (Max of 3
phase)
phase)
phase)

Technical manual
Monitoring

DCAMPN REAL DC Component value of neutral
DCAMPL1L2 REAL DC Component value of phase to phase L1L2
18.14.5 Settings
Table 889: VHMMHAI Non group settings (basic)

Value groups
Table 890: VHMMHAI Group settings (basic)

On
WrnLimitTHD 2.5 - 100.0 % 0.1 5.0 Warning limit for percentage total
tDelayAlmTHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
total harmonic distortion
WrnLimit2ndHD 2.5 - 100.0 % 0.1 3.5 Warning limit for percentage 2nd
tDelayAlm2ndHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
2nd order harmonic distortion
WrnLimit3rdHD 2.5 - 100.0 % 0.1 3.0 Warning limit for percentage 3rd order
tDelayAlm3rdHD 0.0 - 600.0 s 1.0 300.0 Time delay to alarm after warning for
3rd order harmonic distortion

Technical manual
Monitoring

Table 891: VHMMHAI Monitored data

THDN REAL - % Total harmonic distortion of neutral
THDL1L2 REAL - % Total harmonic distortion of phase to
phase L1L2
phase L2L3
phase L3L1
2NDHD REAL - % 2nd order harmonic distortion (Max of
3 phase)
3RDHD REAL - % 3rd order harmonic distortion (Max of
3 phase)
3 phase)
3 phase)
CFN REAL - - Crest factor of neutral
CFL1L2 REAL - - Crest factor of phase to phase L1L2
TRMSL1 REAL - kV True RMS value of phase L1
TRMSN REAL - kV True RMS value of neutral
TRMSL1L2 REAL - kV True RMS value of phase to phase L1L2
TRMSL2L3 REAL - kV True RMS value of phase to phase
L2L3
TRMSL3L1 REAL - kV True RMS value of phase to phase L3L1
MEASFREQ REAL - Hz Measured frequency
FUNDL1 REAL - kV Fundamental amplitude of phase L1
FUNDN REAL - kV Fundamental amplitude of neutral
FUNDL1L2 REAL - kV Fundamental amplitude of phase to
phase L1L2
phase L2L3

Technical manual
Monitoring

phase L3L1
HAAMPL1 REAL - kV Harmonic RMS value of phase L1
HAAMPN REAL - kV Harmonic RMS value of neutral
HAAMPL1L2 REAL - kV Harmonic RMS value of phase to
phase L1L2
phase L2L3
phase L3L1
DCAMPL1 REAL - kV DC Component value of phase L1
DCAMPN REAL - kV DC Component value of neutral
DCAMPL1L2 REAL - kV DC Component value of phase to
phase L1L2
phase L2L3
phase L3L1
HA2NDAMP REAL - kV 2nd order Harmonic RMS value (Max
of 3 phase)
HA3RDAMP REAL - kV 3rd order Harmonic RMS value (Max of
3 phase)
HA4THAMP REAL - kV 4th order Harmonic RMS value (Max of
3 phase)
HA5THAMP REAL - kV 5th order Harmonic RMS value (Max of
3 phase)
18.14.7 Graphical display configurable data

GUID-4C6C76EC-9E19-4A78-B2F5-6B6FEC6DF165 v1
Table 892: VHMMHAI Graphical display configurable data

Name Description
2NDHD 2nd order harmonic distortion
3RDHD 3rd order harmonic distortion
HAAMPN Harmonic RMS value of neutral
HAAMPL1L2 Harmonic RMS value of phase to phase L1L2

Technical manual
Monitoring
Name Description
MEASFREQ Measured frequency
THDN Total harmonic distortion of neutral
THDL1L2 Total harmonic distortion of phase to phase L1L2
TRMSN True RMS value of neutral
TRMSL1L2 True RMS value of phase to phase L1L2
FUNDN Fundamental amplitude of neutral
FUNDL1L2 Fundamental amplitude of phase to phase L1L2
18.14.8 Operation principle GUID-2799ED97-DBA6-447A-BCFA-C4AF0BE6964E v1
The voltage harmonic monitoring function calculates the following power quality indices
based on the voltage input signal:
• Total Harmonic Distortion (THD) in percentage of fundamental component

• Individual Harmonic Distortion (IHD) in percentage of fundamental component
• Crest Factor (CF)
The harmonic function calculates fundamental signal magnitude and specific harmonic values
from 2nd to 5th orders of the given signal using a FFT filter.
The main functionality of the harmonic monitoring function is to find the total harmonic
distortion (THD) for voltage signals. If the distorted voltage and current waveforms consist of
only harmonics, a measurement time interval kT (T = Cycle Time) enables the correct
measurement of RMS value. If the monitored waveform contains an interharmonic, then the
measurement time interval kT should be designed according to the minimum frequency signal
measurement. The time interval, which is required for an accurate measurement of RMS values
and power, is the least common multiple of the periods of the fundamental component and
the interharmonic component (i.e., kT = mTi ; Ti =1 / fi , where ‘fi’ is the interharmonic
frequency and ‘k’, ‘m’ are integer numbers). When the measurement time interval kT does not
include an integer number of periods Ti (i.e., kT ≠ mTi), the RMS value of the interharmonic is
inaccurate. This error is also reflected in the measurement accuracy of the total RMS value. If
at least one of the interharmonics of order h is an irrational number, then the observed

Technical manual
Monitoring
waveform is not periodic, commonly known as Nearly Periodic. In such a case, the
measurement time interval kT should be infinitely large in order to have a correct
measurement of the RMS value or power. The larger the measurement time kT, the lesser the
significance of errors caused by interharmonics.
Figure 640 shows the envelopes of the maximum errors made when the RMS value of an
interharmonic is measured in function of the number of cycle’s m. For example, if m = 20, the
RMS value of the interharmonic will be measured with a maximum error of ± 0.2%. For the
accurate measurement of true RMS value and harmonic components amplitude, FFT filter
design is used for harmonic monitoring functionality.
2
1.6
1.2
MAXIMUM ERROR (%)
0.8
0.4
0
‐0.4
‐0.8
‐1.2
‐1.6
‐2
0 20 40 60 80 100 120
NUMBER OF CYCLES m
Figure 640: Percent maximum error of RMS measurement versus number of cycles
Individual harmonic distortion is calculated only for 2nd to 5th harmonic orders. For simplicity,
maximum harmonic amplitude out of all phases is considered for monitoring and the same
value is considered for harmonic distortion calculation, warning and alarm conditions. Phase
wise harmonic values are available in the IEC 61850 data model. The overview diagram of
harmonic monitoring function is shown in Figure 641.
A FFT filter is used to calculate complex amplitude and frequency for the rated frequency, and
its harmonic components up to 5th order includes DC component. The filter length is fixed to 1
second, which is 1024 samples at 1 kHz sampling for calculation in each execution of the FFT
filter. This gives an increased resolution on true RMS calculation upto interharmonic level.
The function calculates THD, IHD and CF using the derived quantities of the given signal. The
FFT filter tries to find the fundamental frequency in a frequency search range of ± 5 Hz from
the system rated frequency. If the fundamental frequency is not able to identify from the
measured signal, then it will not do any calculation.
In many cases, the traditional instrument transformers which are only designed
to have a high accuracy at rated frequency, are used for harmonic
measurements. This questions accuracy of the harmonic measurements and
the reliability of any compliance assessment. In this function, the measurement
accuracy level of instrument transformers are not considered.
The following sections describe how each power quality indices are calculated.

Technical manual
Monitoring
18.14.8.1 Total harmonic distortion (THD) GUID-037ED9E1-8E21-455B-9DA0-F7914A97B3D7 v1
The overall deviation of a distorted wave from its fundamental can be estimated using total
harmonic distortion (THD).
The total harmonic distortion of the voltage is as follows:
 2 
VH   V 
%THDV      1  *100
V1   V1  
 
Where,
= Voltage true RMS value
= Voltage fundamental DFT magnitude
= Voltage harmonic magnitude (including interharmonics)
FFT Filter MEASFREQ
V3P ( Input from SMAI)
V3P FREQ
THDx
TRMS Total Harmonic
THDxx
Distortion
FUND Calculation #HD
FundDFT
nd
Harm2
Harm3rd
Harm4th THDALM
Individual
Harm5th Harmonic
Distortion
#HDALM
Calculation THDWRN
Blocking, Alarm
and Warning #HDWRN
logic
Peak
DCComp
CFx
Crest Factor
PEAK Calculation CFxx
DCAMPx
DCAMPxx
BLOCK
WrnLimit#HD
HAAMPx
Harmonic RMS Values
WrnLimitTHD HAAMPxx
tDelayAlmIHD# Individual Harmonic HA #AMP
RMS Values
tDelayAlmTHD FUNDx
Fundamental
Values FUNDxx
BLKALM TRMSx
True RMS
BLKWARN Values TRMSxx
x – Phase outputs (L1 , L2 , L 3 andN)

xx – Phase to Phase Outputs (L1L2, L2L3 and L3L1)
# – Harmonic order (2nd , 3rd , 4th and 5th ) IEC18000004-1-en.vsdx
Figure 641: Simplified logic diagram for voltage harmonic monitoring VHMMHAI
18.14.8.2 Individual harmonic distortion (IHD) GUID-8DFC8603-2C3B-402F-9774-93D9E166938B v2
The individual harmonic distortion is defined as the percentage of harmonics for order h with
respect to the fundamental frequency.
The individual harmonic distortion of the voltage for order h is as follows:

Technical manual
Monitoring
Vh
% IHDV h  *100
V1
Where, Vh = Voltage harmonic magnitude for the order h
Additionally, it calculates the maximum individual harmonic distortion value as the maximum
of three phase signals harmonic distortion.Additionally, it calculates the maximum individual
harmonic distortion value as the maximum of two phase signals harmonic distortion. The
individual harmonic distortion is used further in warning and alarm logic.
18.14.8.3 Crest factor (CF) GUID-11E60216-E7DB-42DB-872C-8B1E53D7D30A v1
Crest factor is the ratio between value of the peak voltage and its RMS value.
The crest factor of voltage is as follows:

VPeak
CFV 
VRMS
Where,
= Voltage peak amplitude
= Voltage true RMS
18.14.8.4 Blocking and alarm logic GUID-56FFB124-6F86-41FA-B34F-61C7D4CD5720 v1
It is possible to set warning limits for each individual harmonic order. If the calculated
individual harmonic distortion exceeds beyond the warning limit, an individual harmonic
warning will be raised. Also, the user can set the time delay to alarm for the individual
harmonic distortion value. If the IHD value sustains above the warning limit for the set time, an
alarm signal will be raised.
Similarly, total harmonic distortion has separate settings for warning limit and alarm time
delay. Once the THD value exceeds beyond set warning limit, a separate warning signal will be
raised. If the warning signal sustains above the time set at alarm time delay setting, an
individual alarm signal will be raised.
The phase-wise alarm and warning signals with respect to total harmonic distortion is
provided through IEC 61850 communication protocol (general alarm and general warning are
also provided). In case of phase-to-phase measurement, once the THD exceeded the limits,
both phase warning and alarm signals will be activated. Warning and alarm based on individual
harmonic distortion are activated for specific harmonic order outputs of alarm and warning.
To avoid oscillations of warning signals at boundary conditions, a hysteresis has been
included.
When the BLOCK input is activated, all binary outputs will be forced to reset. Also, the alarm
outputs and warning outputs can be separately blocked by activating the BLKALM and
BLKWRN inputs, respectively.

Technical manual
Monitoring
BLOCK
BLKWARN
BLKALM
Total Harmonic
Distortion
a
a > b AND
THDWRN
b
WarnLimitTHD tOff
t AND
THDALM
tDelayAlmTHD
Individual Harmonic
Distortion
a #HDWRN
(Max of phase wise a > b AND
harmonic distortion) b
WarnLimitIHD# tOff
#HDALM
t AND
tDelayAlmIHD #
Figure 642: Simplified logic diagram for warning and alarm

GUID-2068BBA0-9026-48D0-9DEB-301BCB3C600C v1
Table 893: VHMMHAI (50/60 Hz) technical data

Frequency (0.95 - 1.05) X fr 2nd order to 5th order (0.1 - 0.5) X V ± 2 mHz
True RMS (10 to 150) V None ± 0.5%
(10 to 150) V 2nd order to 5th order (0.1 - 0.5) X V ± 2%
Fundamental (10 to 150) V None ± 0.5%
(10 to 150) V 2nd order to 5th order (0.1 - 0.5) X V ± 0.5%
Crest Factor (10 to 150) V None ± 2%
Harmonic (10 to 150) V 2nd order to 5th order (0.1 - 0.5) X V ± 4%
Amplitude
Total Harmonic (10 to 150) V 2nd order to 5th order (0.1 - 0.5) X V ± 4%
Distortion
(VTHD)

Technical manual
Metering
Section 19 Metering
19.1 Pulse-counter logic PCFCNT IP14600-1 v3
M14879-1 v4

Pulse-counter logic PCFCNT -
S00947 V1 EN-US
Pulse-counter logic (PCFCNT) function counts externally generated binary pulses, for instance
pulses coming from an external energy meter, for calculation of energy consumption values.
The pulses are captured by the binary input module and then read by the PCFCNT function. A
scaled service value is available over the station bus. The special Binary input module with
enhanced pulse counting capabilities must be ordered to achieve this functionality.
PCFCNT
BLOCK INVALID
READ_VAL RESTART
BI_PULSE* BLOCKED
RS_CNT NEW_VAL
SCAL_VAL
Figure 643: PCFCNT function block
19.1.4 Signals
Table 894: PCFCNT Input signals

BI_PULSE BOOLEAN 0 Connect binary input channel for metering
READ_VAL BOOLEAN 0 Initiates an additional pulse counter reading
RS_CNT BOOLEAN 0 Resets pulse counter value

Technical manual
Metering
Table 895: PCFCNT Output signals

INVALID BOOLEAN The pulse counter value is invalid
RESTART BOOLEAN The reported value does not comprise a complete integration
cycle
BLOCKED BOOLEAN The pulse counter function is blocked
NEW_VAL BOOLEAN A new pulse counter value is generated
SCAL_VAL REAL Scaled value with time and status information
19.1.5 Settings
Table 896: PCFCNT Non group settings (basic)

On
EventMask NoEvents - - NoEvents Report mask for analog events from
ReportEvents pulse counter
CountCriteria Off - - RisingEdge Pulse counter criteria
RisingEdge
Falling edge
OnChange
Scale 1.000 - - 0.001 1.000 Scaling value for SCAL_VAL output to
90000.000 unit per counted value
Quantity Count - - Count Measured quantity for SCAL_VAL
ActivePower output
ApparentPower
ReactivePower
ActiveEnergy
ApparentEnergy
ReactiveEnergy
tReporting 0 - 3600 s 1 60 Cycle time for reporting of counter
value

Table 897: PCFCNT Monitored data

SCAL_VAL REAL - - Scaled value with time and status
information
M13397-3 v5
The registration of pulses is done for positive transitions (0->1) on one of the 16 binary input
channels located on the Binary Input Module (BIM). Pulse counter values are sent to the station
HMI with predefined cyclicity without reset.
The reporting time period can be set in the range from 1 second to 60 minutes and is
synchronized with absolute system time. Interrogation of additional pulse counter values can

Technical manual
Metering
be done with a command (intermediate reading) for a single counter. All active counters can
also be read by the LON General Interrogation command (GI) or IEC 61850.
Pulse-counter logic (PCFCNT) function in the IED supports unidirectional incremental counters.
That means only positive values are possible. The counter uses a 32 bit format, that is, the
reported value is a 32-bit, signed integer with a range 0...+2147483647. The counter is reset at
initialization of the IED.
The reported value to station HMI over the station bus contains Identity, Scaled Value (pulse
count x scale), Time, and Pulse Counter Quality. The Pulse Counter Quality consists of:
• Invalid (board hardware error or configuration error)

• Wrapped around
• Blocked
• Adjusted
The transmission of the counter value by SPA can be done as a service value, that is, the value
frozen in the last integration cycle is read by the station HMI from the database. PCFCNT
updates the value in the database when an integration cycle is finished and activates the
NEW_VAL signal in the function block. This signal can be connected to an Event function block,
be time tagged, and transmitted to the station HMI. This time corresponds to the time when
the value was frozen by the function.
The pulse-counter logic function requires a binary input card, BIMp, that is
specially adapted to the pulse-counter logic function.
M13399-3 v9
Figure 644 shows the pulse-counter logic function block with connections of the inputs and
outputs.
SingleCmdFunc PulseCounter EVENT

OUTx BLOCK
INVALID INPUT1
SingleCmdFunc Pulse RESTART INPUT2
OUTx INPUT OUT READ_VAL
Pulse length >1s BLOCKED INPUT3
I/O-module NEW_VAL INPUT4
BI_PULSE
”Reset counter” RS_CNT
NAME
SCAL_VAL IEC EVENT
SMS settings Database

1.Operation = Off/On Pulse counter value:
2.tReporting = 0s...60min 0...2147483647
3.Event Mask = No Events/Report Events
4.Scale = 1-90000
en05000744.vsd
Figure 644: Overview of the pulse-counter logic function

The BLOCK and READ_VAL inputs can be connected to Single Command logics, which are
intended to be controlled either from the station HMI or/and the local HMI. As long as the
BLOCK signal is set, the pulse counter is blocked. The signal connected to READ_VAL performs
one additional reading per positive flank. The signal must be a pulse with a length >1 second.
The BI_PULSE input is connected to the used input of the function block for the Binary Input
Module (BIM).
The RS_CNT input is used for resetting the counter.

Technical manual
Metering
Each pulse-counter logic function block has four binary output signals that can be connected
to an Event function block for event recording: INVALID, RESTART, BLOCKED and NEW_VAL.
The SCAL_VAL signal can be connected to the IEC Event function block.
The INVALID signal is a steady signal and is set if the Binary Input Module, where the pulse
counter input is located, fails or has wrong configuration.
The RESTART signal is a steady signal and is set when the reported value does not comprise a
complete integration cycle. That is, in the first message after IED start-up, in the first message
after deblocking, and after the counter has wrapped around during last integration cycle.
The BLOCKED signal is a steady signal and is set when the counter is blocked. There are two
reasons why the counter is blocked:
• The BLOCK input is set, or

• The Binary Input Module, where the counter input is situated, is inoperative.
The NEW_VAL signal is a pulse signal. The signal is set if the counter value was updated since
last report.
Note, the pulse is short, one cycle.
The SCAL_VAL signal consists of scaled value (according to parameter Scale), time and status
information.
M13404-2 v5
Table 898: PCFCNT technical data

Function Setting range Accuracy
Input frequency See Binary Input Module (BIM) -
Cycle time for report of (1–3600) s -
counter value
19.2 Function for energy calculation and demand handling

ETPMMTR SEMOD153638-1 v2
SEMOD175537-2 v4

Function for energy calculation and ETPMMTR W_Varh -
demand handling

Technical manual
Metering
19.2.2 Functionality GUID-6898E29B-DA70-421C-837C-1BBED8C63A7A v3
Power system measurement (CVMMXN) can be used to measure active as well as reactive
power values. Function for energy calculation and demand handling (ETPMMTR) uses
measured active and reactive power as input and calculates the accumulated active and
reactive energy pulses, in forward and reverse direction. Energy values can be read or
generated as pulses. Maximum demand power values are also calculated by the function. This
function includes zero point clamping to remove noise from the input signal. As output of this
function: periodic energy calculations, integration of energy values, calculation of energy
pulses, alarm signals for limit violation of energy values and maximum power demand, can be
found.
The values of active and reactive energies are calculated from the input power values by
integrating them over a selected time tEnergy. The integration of active and reactive energy
values will happen in both forward and reverse directions. These energy values are available as
output signals and also as pulse outputs. Integration of energy values can be controlled by
inputs (STARTACC and STOPACC) and EnaAcc setting and it can be reset to initial values with
RSTACC input.
The maximum demand for active and reactive powers are calculated for the set time interval
tEnergy and these values are updated every minute through output channels. The active and
reactive maximum power demand values are calculated for both forward and reverse direction
and these values can be reset with RSTDMD input.
ETPMMTR
P* ACCINPRG
Q* EAFPULSE
STARTACC EARPULSE
STOPACC ERFPULSE
RSTACC ERRPULSE
RSTDMD EAFALM
EARALM
ERFALM
ERRALM
EAFACC
EARACC
ERFACC
ERRACC
MAXPAFD
MAXPARD
MAXPRFD
MAXPRRD
Figure 645: ETPMMTR function block
19.2.4 Signals
Table 899: ETPMMTR Input signals

P REAL 0 Measured active power
Q REAL 0 Measured reactive power
STARTACC BOOLEAN 0 Start to accumulate energy values
STOPACC BOOLEAN 0 Stop to accumulate energy values.
RSTACC BOOLEAN 0 Reset of accumulated enery reading
RSTDMD BOOLEAN 0 Reset of maximum demand reading

Technical manual
Metering
Table 900: ETPMMTR Output signals

ACCINPRG BOOLEAN Accumulation of energy values in progress
EAFPULSE BOOLEAN Accumulated forward active energy pulse
EARPULSE BOOLEAN Accumulated reverse active energy pulse
ERFPULSE BOOLEAN Accumulated forward reactive energy pulse
ERRPULSE BOOLEAN Accumulated reverse reactive energy pulse
EAFALM BOOLEAN Alarm for active forward energy exceed limit in set interval
EARALM BOOLEAN Alarm for active reverse energy exceed limit in set interval
ERFALM BOOLEAN Alarm for reactive forward energy exceed limit in set interval
ERRALM BOOLEAN Alarm for reactive reverse energy exceed limit in set interval
EAFACC REAL Accumulated forward active energy value
EARACC REAL Accumulated reverse active energy value
ERFACC REAL Accumulated forward reactive energy value
ERRACC REAL Accumulated reverse reactive energy value
MAXPAFD REAL Maximum forward active power demand value for set interval
MAXPARD REAL Maximum reverse active power demand value for set interval
MAXPRFD REAL Maximum forward reactive power demand value for set
interval
MAXPRRD REAL Maximum reverse reactive power demand value for set
interval
19.2.5 Settings
Table 901: ETPMMTR Non group settings (basic)

On
EnaAcc Off - - Off Activate the accumulation of energy
On values
tEnergy 1 Minute - - 1 Minute Time interval for energy calculation
5 Minutes
10 Minutes
15 Minutes
30 Minutes
60 Minutes
180 Minutes
tEnergyOnPls 0.100 - 60.000 s 0.001 1.000 Energy accumulated pulse ON time in
secs
tEnergyOffPls 0.100 - 60.000 s 0.001 0.500 Energy accumulated pulse OFF time in
secs
EAFAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active forward
accumulated energy value
EARAccPlsQty 0.001 - 10000.000 MWh 0.001 100.000 Pulse quantity for active reverse
ERFAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive forward
ERRAccPlsQty 0.001 - 10000.000 MVArh 0.001 100.000 Pulse quantity for reactive reverse

Technical manual
Metering
Table 902: ETPMMTR Non group settings (advanced)

EALim 0.001 - MWh 0.001 1000000.000 Active energy limit
10000000000.00
0
ERLim 0.001 - MVArh 0.001 1000.000 Reactive energy limit
10000000000.00
0
EnZeroClamp Off - - On Enable of zero point clamping
On detection function
LevZeroClampP 0.001 - 10000.000 MW 0.001 10.000 Zero point clamping level at active
Power
LevZeroClampQ 0.001 - 10000.000 MVAr 0.001 10.000 Zero point clamping level at reactive
Power
DirEnergyAct Forward - - Forward Direction of active energy flow
Reverse Forward/Reverse
DirEnergyReac Forward - - Forward Direction of reactive energy flow
Reverse Forward/Reverse
EAFPrestVal 0.000 - MWh 0.001 0.000 Preset Initial value for forward active
100000000.000 energy
EARPrestVal 0.000 - MWh 0.001 0.000 Preset Initial value for reverse active
100000000.000 energy
ERFPresetVal 0.000 - MVArh 0.001 0.000 Preset Initial value for forward
100000000.000 reactive energy
ERRPresetVal 0.000 - MVArh 0.001 0.000 Preset Initial value for reverse reactive
100000000.000 energy

Table 903: ETPMMTR Monitored data

EAFACC REAL - MWh Accumulated forward active energy
value
EARACC REAL - MWh Accumulated reverse active energy
value
ERFACC REAL - MVArh Accumulated forward reactive energy
value
ERRACC REAL - MVArh Accumulated reverse reactive energy
value
MAXPAFD REAL - MW Maximum forward active power
demand value for set interval
MAXPARD REAL - MW Maximum reverse active power
MAXPRFD REAL - MVAr Maximum forward reactive power
MAXPRRD REAL - MVAr Maximum reverse reactive power

Technical manual
Metering
19.2.7 Operation principle GUID-4A46757C-EC5D-4BCE-9D09-C8152B062CE1 v3
The instantaneous output values of active and reactive power from the Measurements
function CVMMXN are used and integrated over a selected time tEnergy to measure the
integrated energy. Figure 646 shows the overall functionality of the energy calculation and
demand handling function ETPMMTR.
MAXPAFD
RSTDMD
MAXPARD
MAXPRFD
P
MAXPRRD
Zero Clamping Maximum Power
EAFALM
Detection Demand Calculation
Q EARALM
ERFALM
ERRALM
ACCINPRG
EAFPULSE
EARPULSE
ERFPULSE
Energy Accumulation ERRPULSE
STARTACC
Calculation EAFACC
EARACC
STOPACC
ERFACC
ERRACC
RSTACC
Figure 646: ETPMMTR Functional overview logical diagram

The integration of energy values is enabled by the setting EnaAcc and controlled by the
STARTACC and STOPACC inputs. If the integration is in progress, the output ACCINPRG is high.
Otherwise, it is low. Figure 647 shows the logic of the ACCINPRG output. ACCINPRG is active
when the STARTACC input is active and the EnaAcc setting is enabled. When the RSTACC input
is in the active state, the output ACCINPRG is low even if the integration of energy is enabled.
ACCINPRG is deactivated by activating the STOPACC input.
STOPACC
FALSE
STARTACC T
³1
& F ACCINPRG
EnaAcc &
q-1
RSTACC

Figure 647: ACCINPRG Logic diagram

The accumulated energy values (in MWh and MVArh) are available as service values and also as
pulsed output depending on the ExxAccPlsQty setting, which can be connected to a pulse
counter. Accumulated energy outputs are available for forward as well as reverse direction.
The accumulated energy values can be reset to initial accumulated energy values (ExxPrestVal)
from the local HMI reset menu or with the input signal RSTACC. Figure 648 shows the logic for
integration of energy in active forward direction. Similarly, the integration of energy in active
reverse, reactive forward and reactive reverse is done.

Technical manual
Metering
RSTACC
EAFPrestVal
ACCINPRG
P* (ACTIVE FORWARD)
X
 T
T EAFACC
60.0
F
F
&
q-1
1000 GWh T
-1 F
q 0.0
a
a>b
b
-1
q = unit delay
Figure 648: Logic for integration of active forward energy

The energy pulses generated by using internally calculated accumulated energy values and
energy per pulse (ExxAccPlsQty) setting. The accumulated energy values are divided by the
energy-per-pulse value to get the number of pulses. The number of pulses can be reset to zero
by activating RSTACC input or by using the local HMI reset menu. The pulse on and off time
duration is set by the settings tEnergyOnPls and tEnergyOffPls. Figure 649 shows the logic for
pulse output generation for the integrated energy in the active forward direction. Similarly, the
pulse generation for integrated energy in the active reverse, reactive forward and reactive
reverse is done.
tEnergyOffPls
EAFACC
a Counter q-1
a>b CU
1000 GWh b CV
Rst
tOff
t
R I q-1
0
÷ X
 R I T
EAFPULSE
a TP
a>b F
b
EAFAccPlsQty ÷ 0
Counter
CU
CV
RSTACC
Rst
q-1
tEnergyOnPls
q-1 = unit delay

Figure 649: Logic for pulse generation of integrated active forward energy
The maximum demand values for active and reactive power are calculated for the set time
interval tEnergy. The maximum values are updated every minute and stored in a register

Technical manual
Metering
available over communication and from outputs MAXPAFD, MAXPARD, MAXPRFD and MAXPRRD for
the active and reactive power forward and reverse direction. When the RSTDMD input is active
from the local HMI reset menu, these outputs are reset to zero. The energy alarm is activated
once the periodic energy value crosses the energy limit ExLim. Figure 650 shows the logic of
alarm for active forward energy exceeds limit and Maximum forward active power demand
value. Similarly, the maximum power calculation and energy alarm outputs in the active
reverse, reactive forward and reactive reverse is implemented.
P (ACTIVE FORWARD)
Average Power
X a EAFALM
tEnergy Calculation a>b
b
EALim
RSTMAXD
0.0 T MAXPAFD
MAX F
q-1
q-1 = unit delay
Figure 650: Logic for maximum power demand calculation and energy alarm

SEMOD153707-2 v5
Table 904: ETPMMTR technical data

Energy metering kWh Export/Import, kvarh Input from MMXU. No extra error at steady
Export/Import load

Technical manual
Ethernet
Section 20 Ethernet
20.1 Access point
20.1.1 Introduction GUID-6E5D2696-A8EE-43E7-A94B-69C3D0612127 v2
An access point is an Ethernet communication interface for single or redundant station

communication. Each access point is allocated with one physical Ethernet port, two physical
Ethernet ports are allocated if redundant communication is activated for the access point.
Device 1 Device 1
AP1 AP2 AP3 AP1 AP2 AP3

SFP_301 SFP_302 SFP_303 SFP_301 SFP_302 SFP_303
Figure 651: Access points, non redundant (left) and redundant communication (right)
20.1.2 Settings
Table 905: AP_1 Non group settings (basic)

Operation Off - - Off Operation on/off of the access point
On
Redundancy None - - None Ethernet redundancy mode
PRP-0
PRP-1
HSR
IPAddress 0 - 18 IP 1 192.168.1.10 IP address of the access point
Address
SubnetMask 0 - 18 IP 1 255.255.255.0 Subnet mask of the access point
Address
Description 1 - 18 - 1 Station bus User editable access point description
[1-18 char]
PTP Off - - Off Precision time protocol
On
Slave only
PCM600Access Off - - On PCM600 access
On
FTP Off - - On FTP and FTPS access
On
MMS Off - - On IEC61850-8-1 MMS
On
GOOSE Off - - On IEC61850-8-1 GOOSE
On
DNP3 Off - - On DNP3 slave
On

Technical manual
Ethernet

SNTPServer Off - - On SNTP server
On
FSTAccess Off - - On Field Service Tool access
On
C37.118TCP Off - - On IEEE 1344 and C37.118 TCP server
On
C37.118UDP1 Off - - On IEEE 1344 and C37.118 UDP stream and
On the TCP control server
DefaultGateway 0 - 18 IP 1 0.0.0.0 Default gateway IP address
Address
Table 906: AP_FRONT Non group settings (basic)

IPAddress 0 - 18 IP 1 10.1.150.3 IP address of the access point
Address
SubnetMask 0 - 18 IP 1 255.255.255.0 Subnet mask of the access point
Address
Description 1 - 18 - 1 FrontPort User editable access point description
[1-18 char]
PCM600Access Off - - On PCM600 access
On
FTP Off - - On FTP and FTPS access
On
MMS Off - - On IEC61850-8-1 MMS
On
GOOSE Off - - On IEC61850-8-1 GOOSE
On
DNP3 Off - - On DNP3 slave
On
SNTPServer Off - - On SNTP Server
On
FSTAccess Off - - On Field Service Tool access
On
C37.118TCP Off - - On IEEE 1344 and C37.118 TCP server
On

Technical manual
Ethernet

DefaultGateway 0 - 18 IP 1 0.0.0.0 Default gateway IP address
Address
20.2 Access point diagnostics
20.2.1 Functionality GUID-20F64A6D-AA8C-47D7-AA7D-4810996B2FF2 v2
The access point diagnostics function blocks (RCHLCCH, SCHLCCH and FRONTSTATUS)
supervise communication. SCHLCCH is used for communication over the rear Ethernet ports,
RCHLCCH is used for redundant communications over the rear Ethernet ports and
FRONTSTATUS is used for communication over the front port. All access point function blocks
include output signal for denial of service.
20.2.2 Function block GUID-727BF536-1D60-4060-A674-5D73F252CCB7 v2
SCHLCCH
LINKUP
DOSALARM
Figure 652: SCHLCCH Function block
RCHLCCH
REDLINKA
REDLINKB
DOSALARM
Figure 653: RCHLCCH Function block
20.2.3 Signals
Table 907: SCHLCCH Output signals

LINKUP BOOLEAN Access point link status
DOSALARM BOOLEAN Denial of service alarm

Technical manual
Ethernet
Table 908: RCHLCCH Output signals

REDLINKA BOOLEAN Channel A redundancy status
REDLINKB BOOLEAN Channel B redundancy status
DOSALARM BOOLEAN Denial of service alarm (A + B)

Table 909: SCHLCCH Monitored data

GatewayConfig INTEGER 0=Ok - Gateway configuration status
1=Error
-1=Off
2=Invalid
Table 910: RCHLCCH Monitored data

GatewayConfig INTEGER 0=Ok - Gateway configuration status
1=Error
-1=Off
2=Invalid
20.3 Redundant communication
GUID-B7AE0374-0336-42B8-90AF-3AE1C79A4116 v1

IEC 62439-3 Parallel redundancy PRP - -
protocol
IEC 62439-3 High-availability HSR - -
seamless redundancy
Access point diagnostic for RCHLCCH - -
redundant Ethernet ports
20.3.2 Functionality GUID-494FACF7-4BE0-4B9F-A18F-47CD1E92C0F9 v1
PRP IEC 62439-3 redundant communication

Redundant communication according to IEC 62439-3 PRP-0 and IEC 62439-3 PRP-1 parallel
redundancy protocol (PRP) is available as an option when ordering IEDs. PRP according to IEC
62439-3 uses two optical Ethernet ports.

Technical manual
Ethernet
IEC 62439-3 High-availabillity Seamless Redundancy (HSR)

Redundant station bus communication according to IEC 62439-3 Edition 1 and IEC 62439-3
Edition 2 High-availability seamless redundancy (HSR) is available as an option when ordering
IEDs. Redundant station bus communication according to 62439-3 uses two optical Ethernet
ports.
20.3.3 Operation principle GUID-73DB23CD-A924-4B89-8AAB-1E79D44DE429 v1
PRP IEC 62439-3 redundant communication

The communication is performed in parallel, that is the same data package is transmitted on
both channels simultaneously. The received package identity from one channel is compared
with data package identity from the other channel, if they are the same, the last package is
discarded.
The RCHLCCH function block supervise the redundant communication on the two channels. If
no data package has been received on one (or both) channels within the last 10 s, the output
LinkAUp and/or LinkBUp is set to 0 which indicates an error.
Device 1 Device 2
AP1 AP1
PhyPortA PhyPortB PhyPortA PhyPortB
Switch A Switch B

AP1 AP1
Device 3 Device 4
Figure 654: Redundant station bus
IEC 62439-3 High-availabillity Seamless Redundancy (HSR)

HSR applies the principle of parallel operation to a single ring.
For each message sent, the node sends two frames, one through each port. Both the frames
circulate in opposite directions over the ring. Every node forwards the frames it receives from
one port to another to reach the next node. When the originating sender node receives the
frame it sent, the sender node discards the frame to avoid loops

Technical manual
Ethernet
The RCHLCCH function block supervise the redundant communication on the two channels. If
no data package has been received on one (or both) channels within the last 10 s, the output
LinkAUp and/or LinkBUp is set to 0 which indicates an error.
If IEEE1588 (PTP) is used an accuracy of 1 µs can be guaranteed for up to 15 devices in one

HSR-ring.
Device 1 Device 2
AP1 AP1
PhyPortB PhyPortA PhyPortB PhyPortA

AP1 AP1
Device 3 Device 4
Figure 655: HSR ring
20.4 Merging unit
20.4.1 Introduction GUID-E630C16F-EDB8-40AE-A8A2-94189982D15F v1
The IEC/UCA 61850-9-2LE process bus communication protocol enables an IED to

communicate with devices providing measured values in digital format, commonly known as
Merging Units (MU). The rear access points are used for the communication.
The merging units (MU) are called so because they can gather analog values from one or more
measuring transformers, sample the data and send the data over process bus to other clients
(or subscribers) in the system. Some merging units are able to get data from classical
measuring transformers, others from non-conventional measuring transducers and yet others
can pick up data from both types.
20.4.2 Settings
Table 911: MU1 Non group settings (basic)

SampleValueID 0 - 34 - 1 ABB_MU0101 Sample Value ID (SVID) for the
merging unit [0-34 char]
APConnection None - - None Access point connection for the
AP1 merging unit
AP2
AP3
AP4

Technical manual
Ethernet
Table 912: MU1_HW Non group settings (basic)


Table 913: MU1_HW Monitored data

MUDATA BOOLEAN 0=Ok - Fatal error, data not received,
1=Error transmission errors, time-sync issues
or inconsistent sample rate
SYNCH BOOLEAN 0=Ok - High when IED clock is not within
1=Error configured accuracy or time domain
SMPLLOST BOOLEAN 1=Yes - Fatal error or recovery state after fatal
0=No error. High if any subscribed channel
has bad quality or TEST while IED not
in test mode.
MUSYNCH BOOLEAN 0=Ok - MU not synced or MU clock not synced
1=Error to same clock as IED
TESTMODE BOOLEAN 1=Yes - Quality of one or more subscribed
0=No analogue channels is TEST
SIMMODE BOOLEAN 1=Yes - MU delivers simulated data accepted
0=No by IED
BadReference BOOLEAN 1=Yes - BadReference indication output for I1
0=No
Derived BOOLEAN 1=Yes - Derived indication output for I1
0=No
Failure BOOLEAN 1=Yes - Failure indication output for I1
0=No
Inaccurate BOOLEAN 1=Yes - Inaccurate indication output for I1
0=No
Inconsistent BOOLEAN 1=Yes - Inconsistent indication output for I1
0=No
OldData BOOLEAN 1=Yes - OldData indication output for I1
0=No
OperatorBlocked BOOLEAN 1=Yes - OperatorBlocked indication output for
0=No I1
Oscillatory BOOLEAN 1=Yes - Oscillatory indication output for I1
0=No
OutOfRange BOOLEAN 1=Yes - OutOfRange indication output for I1
0=No
Overflow BOOLEAN 1=Yes - Overflow indication output for I1
0=No

Technical manual
Ethernet

Source BOOLEAN 0=Process - Source indication output for I1
1=Substituted
Test BOOLEAN 1=Yes - Test indication output for I1
0=No
Validity INTEGER 0=Good - Validity indication output I1
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No I2
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No I3
0=No

Technical manual
Ethernet

0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No I4
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
BadReference BOOLEAN 1=Yes - BadReference indication output for U1
0=No
Derived BOOLEAN 1=Yes - Derived indication output for U1
0=No
Failure BOOLEAN 1=Yes - Failure indication output for U1
0=No
Inaccurate BOOLEAN 1=Yes - Inaccurate indication output for U1
0=No
Inconsistent BOOLEAN 1=Yes - Inconsistent indication output for U1
0=No
OldData BOOLEAN 1=Yes - OldData indication output for U1
0=No

Technical manual
Ethernet

0=No U1
Oscillatory BOOLEAN 1=Yes - Oscillatory indication output for U1
0=No
OutOfRange BOOLEAN 1=Yes - OutOfRange indication output for U1
0=No
Overflow BOOLEAN 1=Yes - Overflow indication output for U1
0=No
Source BOOLEAN 0=Process - Source indication output for U1
1=Substituted
Test BOOLEAN 1=Yes - Test indication output for U1
0=No
Validity INTEGER 0=Good - Validity indication output U1
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No U2
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No

Technical manual
Ethernet

0=No
0=No
0=No U3
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
BadReference BOOLEAN 1=Yes - BadReference indication output for
0=No U4
0=No
0=No
0=No
0=No
0=No
0=No U4
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable

Technical manual
Ethernet
20.5 Routes
20.5.1 Introduction GUID-95F9C7BA-92F8-489F-AD0A-047410B5E66F v1
A route is a specified path for data to travel between the source device in a subnetwork to the
destination device in a different subnetwork. A route consists of a destination address and the
address of the gateway to be used when sending data to the destination device, see Figure
656.
Default gateway
Gateway
Source Destination
Figure 656: Route from source to destination through gateway
20.5.2 Settings
Table 914: ROUTE_1 Non group settings (basic)

Operation Off - - Off Operation on/off of the route
On
IPAddress 0 - 18 IP 1 0.0.0.0 IP address of the gateway
Address
DestIPAddress 0 - 18 IP 1 0.0.0.0 Destination IP address
Address
DestSubnetMask 0 - 18 IP 1 255.255.255.255 Destination IP subnet mask
Address
Name 1 - 18 - 1 Route1 User configurable name of the route
[1-18 char]

Table 915: ROUTE_1 Monitored data

RouteConfig INTEGER 0=Ok - Route configuration status
1=Error
-1=Off

Technical manual
Section 21 Station communication

21.1 Communication protocols M14815-3 v14
Each IED is provided with several communication interfaces enabling it to connect to one or
many substation level systems or equipment, either on the Substation Automation (SA) bus or
Substation Monitoring (SM) bus.
Available communication protocols are:
• IEC 61850-8-1 communication protocol

• IEC/UCA 61850-9-2LE communication protocol
• LON communication protocol
• SPA communication protocol
• IEC 60870-5-103 communication protocol
• C37.118 communication protocol
Several protocols can be combined in the same IED.
21.2 Communication protocol diagnostics GUID-6BC4671F-6D06-4BBD-B1FF-2F03FF16A856 v1
Status of the protocols can be viewed in the LHMI under Main menu/Diagnostics/IED status/
Protocol diagnostics. The diagnostic values are:
Diagnostic value Description

Off Protocol is turned off
Error An error has occured, refer to event list for more
information
Warning Configuration inconsistency. Unable to locate data
point.
Ready Protocol is ready

Technical manual
Figure 657: Protocol diagnostic screen in LHMI
21.3 DNP3 protocol GUID-54A54716-23BD-4E7C-8245-DE2B4C75E8DC v1
DNP3 (Distributed Network Protocol) is a set of communications protocols used to

communicate data between components in process automation systems. For a detailed
description of the DNP3 protocol, see the DNP3 Communication protocol manual.
21.4 IEC 61850-8-1 communication protocol IP14616-1 v2
IEC 61850 Ed.1 or Ed.2 can be chosen by a setting in PCM600. The IED is equipped with up to
six (order dependent) optical Ethernet rear ports for IEC 61850-8-1 station bus
communication.The IEC 61850-8-1 communication is also possible from the electrical Ethernet
front port. IEC 61850-8-1 protocol allows intelligent electrical devices (IEDs) from different
vendors to exchange information and simplifies system engineering. IED-to-IED
communication using GOOSE and client-server communication over MMS are supported.
Disturbance recording file (COMTRADE) uploading can be done over MMS or FTP.
The front port is only intended for PCM600 communication, maintenance,

training and test purposes due to risk of interference during normal operation.

Technical manual
21.4.2 Communication interfaces and protocols GUID-35C845D3-574A-40D1-AEF1-9E0D330E31DE v9
Table 916: Supported station communication interfaces and protocols

Protocol Ethernet Serial
100BASE-FX (ST connector) Glass fiber (ST connector) EIA-485
IEC 61850–8–1 ● - -
DNP3 ● ● ●
IEC 60870-5-103 - ● ●
● = Supported
When double Ethernet ports are activated, make sure that all ports are
connected to different subnets. For example: port 1 has IP address
198.168.101.10 with subnet mask 255.255.255.0, and port 2 has IP address
198.168.102.10 with subnet mask 255.255.255.0.
21.4.3 Settings
Table 917: IEC61850-8-1 Non group settings (basic)

On
GOOSEPortEd1 AP_FRONT - - AP_1 Selection of GOOSE port (only for
AP_1 IEC61850 Ed1)
AP_2
AP_3
AP_4
AP_5
AP_6
ProtocolEdition Ed 1 - - Ed 1 Protocol Edition
Ed 2
RemModControl Off - - Off Remote Mode Control
Maintenance
All levels
AllowSimulation No - - No Allow simulated GOOSE values or
Yes simulated sampled measurand values
RemSetControlEd2 Disabled - - Disabled Changing settings over 61850 enabled
Enabled (only for IEC61850 Ed2)
ResvTmsEd2 1 - 3600 s 1 60 Reservation time (only for IEC61850
Ed2)
M15031-1 v9
Table 918: Communication protocols

Function Value
Protocol IEC 61850-8-1
Communication speed for the IEDs 100BASE-FX
Protocol IEC 60870–5–103

Technical manual
Function Value
Communication speed for the IEDs 9600 or 19200 Bd
Protocol DNP3.0
Communication speed for the IEDs 300–115200 Bd
Protocol TCP/IP, Ethernet
Communication speed for the IEDs 100 Mbit/s
Protocol LON
Communication speed for the IEDs 1.25 Mbit/s
Protocol SPA
Communication speed for the IEDs 300–38400 Bd
21.4.5 Generic communication function for Single Point indication

SPGAPC, SP16GAPC SEMOD55999-1 v4
21.4.5.1 Functionality SEMOD55713-5 v8
Generic communication function for Single Point indication (SPGAPC) is used to send one
single logical signal to other systems or equipment in the substation.
21.4.5.2 Function block SEMOD54714-4 v4
SPGAPC
BLOCK
ÎN
Figure 658: SPGAPC function block
SP16GAPC
BLOCK
ÎN1
ÎN2
ÎN3
ÎN4
ÎN5
ÎN6
ÎN7
ÎN8
ÎN9
ÎN10
ÎN11
ÎN12
ÎN13
ÎN14
ÎN15
ÎN16
Figure 659: SP16GAPC function block

Technical manual
21.4.5.3 Signals SEMOD55830-1 v2
Table 919: SPGAPC Input signals

IN BOOLEAN 0 Input status
Table 920: SP16GAPC Input signals

IN1 BOOLEAN 0 Input 1 status
21.4.5.4 Settings ABBD8E283673 v4

Table 921: SPGAPC Monitored data

OUT GROUP - - Output status
SIGNAL

Technical manual
Table 922: SP16GAPC Monitored data

OUT1 GROUP - - Output 1 status
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
SIGNAL
OUTOR GROUP - - Output status logic OR gate for input
SIGNAL 1 to 16
21.4.5.6 Operation principle SEMOD55725-5 v8
Upon receiving a signal at its input, Generic communication function for Single Point
indication (SPGAPC) function sends the signal over IEC 61850-8-1 to the equipment or system
that requests this signal. Additional configuration is needed with PCM600 or IET600 to get the
IEC 61850-8-1 communication established. For more information, refer to the Engineering
manual.
21.4.6 Generic communication function for Measured Value MVGAPC SEMOD55402-1 v3

Technical manual
21.4.6.1 Functionality SEMOD55872-5 v10
Generic communication function for measured values (MVGAPC) function is used to send the
instantaneous value of an analog signal to other systems or equipment in the substation. It
can also be used inside the same IED, to attach a RANGE aspect to an analog value and to
permit measurement supervision on that value.
MVGAPC
BLOCK ^VALUE
ÎN RANGE
Figure 660: MVGAPC function block
21.4.6.3 Signals SEMOD55948-1 v2
Table 923: MVGAPC Input signals

IN REAL 0 Analog input value
Table 924: MVGAPC Output signals

VALUE REAL Magnitude of deadband value
RANGE INTEGER Range
21.4.6.4 Settings SEMOD55954-1 v2
Table 925: MVGAPC Non group settings (basic)

BasePrefix micro - - unit Base prefix (multiplication factor)
milli
unit
kilo
Mega
Giga
Tera
MV db 1 - 100000 Type 1 10000 Cycl: Report interval (s), Db: In % of
range, Int Db: In %s
MV zeroDb 0 - 100000 m% 500 1000 Zero point clamping in 0,001% of
range
MV hhLim -5000.00 - xBase 0.01 900.00 High High limit multiplied with the
5000.00 base prefix (multiplication factor)
MV hLim -5000.00 - xBase 0.01 800.00 High limit multiplied with the base
5000.00 prefix (multiplication factor)

Technical manual

MV lLim -5000.00 - xBase 0.01 -800.00 Low limit multiplied with the base
5000.00 prefix (multiplication factor)
MV llLim -5000.00 - xBase 0.01 -900.00 Low Low limit multiplied with the
MV min -5000.00 - xBase 0.01 -1000.00 Minimum value multiplied with the
MV max -5000.00 - xBase 0.01 1000.00 Maximum value multiplied with the
MV dbType Cyclic - - Deadband Reporting type
Deadband
Int deadband
Db & Cyclic 5s
Db & Cyclic 30s
Db & Cyclic 1min
MV limHys 0.000 - 100.000 % 0.001 5.000 Hysteresis value in % of range
(common for all limits)

Table 926: MVGAPC Monitored data

VALUE REAL - - Magnitude of deadband value
RANGE INTEGER 1=High - Range
2=Low
3=High-High
4=Low-Low
0=Normal
21.4.6.6 Operation principle SEMOD55936-5 v7
Upon receiving an analog signal at its input, Generic communication function for Measured
Value (MVGAPC) will give the instantaneous value of the signal and the range, as output values.
Additional configuration is needed with PCM600 or IET600 to get the IEC 61850-8-1
communication established. For more information see the Engineering manual.
21.4.7 GOOSE function block to receive a double point value

GOOSEDPRCV
GUID-8C11DB9A-7844-4E1F-A6BB-D97ECE350FC1 v1

GOOSE function block to receive a GOOSEDPRCV - -
double point value
21.4.7.2 Functionality GUID-1D2DBC22-4F04-4809-B34E-8939D442C185 v3
GOOSEDPRCV is used to receive a double point value using IEC 61850 protocol via GOOSE.

Technical manual
21.4.7.3 Function block GUID-ED277880-FB5D-4630-872F-9F343D449FFE v1
GOOSEDPRCV
BLOCK ^DPOUT
^SRCDPOUT DATAVALID
COMMVALID
TEST
Figure 661: GOOSEDPRCV function block
21.4.7.4 Signals
GUID-2DC54788-86AF-4B4B-8E57-A89E30F0C433 v1
Except for the BLOCK input, the rest of the inputs of this GOOSE function block
are used for GOOSE connections. These connections are visible and possible to
make only if Easy GOOSE engineering is enabled. For instructions on how to
enable Easy GOOSE engineering in PCM600, refer to the Engineering Manual.
Table 927: GOOSEDPRCV Input signals

SRCDPOUT INTEGER 0 Source to double point output
Table 928: GOOSEDPRCV Output signals

DPOUT INTEGER Double point output
DATAVALID BOOLEAN Data valid for double point output
COMMVALID BOOLEAN Communication valid for double point output
TEST BOOLEAN Test output
21.4.7.5 Settings
Table 929: GOOSEDPRCV Non group settings (basic)

On
21.4.7.6 Operation principle GUID-82A1C8A2-827A-40EF-8E58-F573E29E468E v4
The DATAVALID output will be HIGH if the incoming message is with valid data.
The COMMVALID output will become LOW when the sending IED is under total failure
condition and the GOOSE transmission from the sending IED does not happen.
The TEST output will go HIGH if the sending IED is in test mode.

Technical manual
Data Value Data Valid Comm Valid Test

Incoming data with q=Normal Updated 1 1 0
Incoming data with q=oldData 0 0 1 0
Incoming data with q=Invalid 0 0 1 0
Incoming data with q=test 0 0 1 1
Incoming data with q=test+oldData 0 0 1 1
Receiver in block 0 0 1 0
Receiver in block and communication 0 0 0 0
error
Receiver in test mode and incoming Updated 1 1 0
data with q= Normal
data with q= Test
Communication Error 0 0 0 0
The input of this GOOSE block must be linked either in SMT by means of a cross
or in ACT by means of a GOOSE connection (if easy GOOSE engineering is
enabled) to receive the double point values.
The implementation for IEC 61850 quality data handling is restricted to a

simple level. If quality data validity is GOOD then the DATAVALID output will be
HIGH. If quality data validity is INVALID, QUESTIONABLE, OVERFLOW, FAILURE
or OLD DATA then the DATAVALID output will be LOW.
21.4.8 GOOSE function block to receive an integer value

GOOSEINTRCV
GUID-93A1E81B-1DE8-483A-BB3B-DB771EE66DC1 v1

GOOSE function block to receive an GOOSEINTRCV - -
integer value
21.4.8.2 Functionality GUID-27B1ED7A-C8E8-499E-89C1-C656FB0337F8 v3
GOOSEINTRCV is used to receive an integer value using IEC 61850 protocol via GOOSE.

Technical manual
21.4.8.3 Function block GUID-56F0C9F7-98F3-4091-B071-53CA5074DC8F v1
GOOSEINTRCV
BLOCK ÎNTOUT
^SRCINTOUT DATAVALID
COMMVALID
TEST
Figure 662: GOOSEINTRCV function block
21.4.8.4 Signals
Table 930: GOOSEINTRCV Input signals

SRCINTOUT INTEGER 0 Source to integer output
Table 931: GOOSEINTRCV Output signals

INTOUT INTEGER Integer output
DATAVALID BOOLEAN Data valid for integer output
COMMVALID BOOLEAN Communication valid for integer output
21.4.8.5 Settings
Table 932: GOOSEINTRCV Non group settings (basic)

On
21.4.8.6 Operation principle GUID-5BBDF772-3B3E-4F7C-ABE9-18CE3C1A2E2D v4

Technical manual

Incoming data with q=oldData Freeze 0 1 0
Incoming data with q=Invalid Freeze 0 1 0
Incoming data with q=test Freeze 0 1 1
Incoming data with q=test+oldData Freeze 0 1 1
Receiver in block Freeze 0 1 0

Receiver in block and communication error Freeze 0 0 0
Receiver in test mode and incoming data Updated 1 1 0
with q= Normal
with q= Test
Communication Error Freeze 0 0 0
enabled) to receive the integer values.

21.4.9 GOOSE function block to receive a measurand value

GOOSEMVRCV
GUID-B1FFBE08-C823-4A58-9FE0-A9A20DA6BB44 v1

GOOSE function block to receive a GOOSEMVRCV - -
measurand value
21.4.9.2 Functionality GUID-759CB016-2B4D-4D98-82E1-592044983D53 v3
GOOSEMVRCV is used to receive measured value using IEC 61850 protocol via GOOSE.

Technical manual
21.4.9.3 Function block GUID-A0B333CC-AEF4-40EA-B152-364648AB78D3 v1
GOOSEMVRCV
BLOCK ^MVOUT
^SRCMVOUT DATAVALID
COMMVALID
TEST
Figure 663: GOOSEMVRCV function block
21.4.9.4 Signals
Table 933: GOOSEMVRCV Input signals

SRCMVOUT REAL 0 Source to measurand value output
Table 934: GOOSEMVRCV Output signals

MVOUT REAL Measurand value output
DATAVALID BOOLEAN Data valid for measurand value output
COMMVALID BOOLEAN Communication valid for measurand value output
21.4.9.5 Settings
Table 935: GOOSEMVRCV Non group settings (basic)

On
21.4.9.6 Operation principle GUID-7B24A6D3-2E5F-4961-A0A6-86436373809E v5

Technical manual

Incoming data with q=oldData Freeze 0 1 0
Incoming data with q=Invalid Freeze 0 1 0
Incoming data with q=test Freeze 0 1 1
Incoming data with q=test+oldData Freeze 0 1 1
Receiver in block Freeze 0 1 0

Receiver in block and communication error Freeze 0 0 0
with q= Normal
with q= Test
Communication Error Freeze 0 0 0
or in ACT by means of a GOOSE connection (in case easy GOOSE engineering is
enabled) to receive the measured value.

21.4.10 GOOSE function block to receive a single point value

GOOSESPRCV
GUID-F2B30A70-842E-435E-8FAB-B1E58B9C0164 v1

GOOSE function block to receive a GOOSESPRCV - -
single point value
21.4.10.2 Functionality GUID-0C99A106-C131-45D3-9B81-6B188E35EB34 v3
GOOSESPRCV is used to receive a single point value using IEC 61850 protocol via GOOSE.

Technical manual
21.4.10.3 Function block GUID-A414F31A-323F-4684-BADA-46F9C5E2B0E8 v1
GOOSESPRCV
BLOCK ^SPOUT
^SRCSPOUT DATAVALID
COMMVALID
TEST
Figure 664: GOOSESPRCV function block
21.4.10.4 Signals
Table 936: GOOSESPRCV Input signals

SRCSPOUT BOOLEAN 0 Source to single point output
Table 937: GOOSESPRCV Output signals

SPOUT BOOLEAN Single point output
DATAVALID BOOLEAN Data valid for single point output
COMMVALID BOOLEAN Communication valid for single point output
21.4.10.5 Settings
Table 938: GOOSESPRCV Non group settings (basic)

On
21.4.10.6 Operation principle GUID-0E25A3FB-41BD-4EFE-9CA0-1262B9CD14CD v4

Technical manual

error
data with q= Normal
data with q= Test
enabled) to receive the binary single point values.

21.4.11 Horizontal communication via GOOSE for interlocking

GOOSEINTLKRCV SEMOD173197-1 v2
21.4.11.1 Functionality GUID-92ECE152-892C-4214-95DE-B92718689434 v2
GOOSE communication can be used for exchanging information between IEDs via the IEC
61850-8-1 station communication bus. This is typically used for sending apparatus position
indications for interlocking or reservation signals for 1-of-n control. GOOSE can also be used to
exchange any boolean, integer, double point and analog measured values between IEDs.

Technical manual
GOOSEINTLKRCV
BLOCK ^RESREQ
^SRCRESREQ ^RESGRANT
^SRCRESGR ÂPP1_OP
^SRCAPP1 ÂPP1_CL
^SRCAPP2 APP1VAL
^SRCAPP3 ÂPP2_OP
^SRCAPP4 ÂPP2_CL
^SRCAPP5 APP2VAL
^SRCAPP6 ÂPP3_OP
^SRCAPP7 ÂPP3_CL
^SRCAPP8 APP3VAL
^SRCAPP9 ÂPP4_OP
^SRCAPP10 ÂPP4_CL
^SRCAPP11 APP4VAL
^SRCAPP12 ÂPP5_OP
^SRCAPP13 ÂPP5_CL
^SRCAPP14 APP5VAL
^SRCAPP15 ÂPP6_OP
ÂPP6_CL
APP6VAL
ÂPP7_OP
ÂPP7_CL
APP7VAL
ÂPP8_OP
ÂPP8_CL
APP8VAL
ÂPP9_OP
ÂPP9_CL
APP9VAL
ÂPP10_OP
ÂPP10_CL
APP10VAL
ÂPP11_OP
ÂPP11_CL
APP11VAL
ÂPP12_OP
ÂPP12_CL
APP12VAL
ÂPP13_OP
ÂPP13_CL
APP13VAL
ÂPP14_OP
ÂPP14_CL
APP14VAL
ÂPP15_OP
ÂPP15_CL
APP15VAL
COMMVALID
TEST
Figure 665: GOOSEINTLKRCV function block
21.4.11.3 Signals SEMOD173205-1 v2
Table 939: GOOSEINTLKRCV Input signals

SRCRESREQ BOOLEAN 0 Source to reservation request
SRCRESGR BOOLEAN 0 Source to reservation granted

Technical manual

SRCAPP1 INTEGER 0 Source to apparatus 1 position
Table 940: GOOSEINTLKRCV Output signals

RESREQ BOOLEAN Reservation request
RESGRANT BOOLEAN Reservation granted
APP1_OP BOOLEAN Apparatus 1 position is open
APP1_CL BOOLEAN Apparatus 1 position is closed
APP1VAL BOOLEAN Apparatus 1 position is valid

Technical manual

COMMVALID BOOLEAN Communication Valid
TEST BOOLEAN Test Output
Table 941: GOOSEINTLKRCV Non group settings (basic)

On
21.4.11.5 Operation principle GUID-7275CFBA-F1FE-496A-A9A1-724139DB2081 v1
The APPxVAL output will be HIGH if the incoming message is with valid data.

Technical manual

error
data with q= Normal
data with q= Test
At least one of the inputs of this GOOSE block must be linked either in SMT by
means of a cross or in ACT by means of a GOOSE connection (if easy GOOSE
engineering is enabled) to receive any data. Only those outputs whose source
input is linked/connected will be updated.

simple level. If quality data validity is GOOD then the APPxVAL output will be
or OLD DATA then the APPxVAL output will be LOW.

Technical manual
21.4.12 GOOSE binary receive GOOSEBINRCV SEMOD173158-1 v3
GOOSEBINRCV
BLOCK ÔUT1
^SRCOUT1 DVALID1
^SRCOUT2 ÔUT2
^SRCOUT3 DVALID2
^SRCOUT4 ÔUT3
^SRCOUT5 DVALID3
^SRCOUT6 ÔUT4
^SRCOUT7 DVALID4
^SRCOUT8 ÔUT5
^SRCOUT9 DVALID5
^SRCOUT10 ÔUT6
^SRCOUT11 DVALID6
^SRCOUT12 ÔUT7
^SRCOUT13 DVALID7
^SRCOUT14 ÔUT8
^SRCOUT15 DVALID8
^SRCOUT16 ÔUT9
DVALID9
ÔUT10
DVALID10
ÔUT11
DVALID11
ÔUT12
DVALID12
ÔUT13
DVALID13
ÔUT14
DVALID14
ÔUT15
DVALID15
ÔUT16
DVALID16
COMMVALID
TEST
Figure 666: GOOSEBINRCV function block
21.4.12.2 Signals SEMOD173166-1 v2
Table 942: GOOSEBINRCV Input signals

SRCOUT1 BOOLEAN 0 Source to binary output 1

Technical manual

Table 943: GOOSEBINRCV Output signals

OUT1 BOOLEAN Binary output 1
DVALID1 BOOLEAN Valid data on binary output 1

Technical manual

COMMVALID BOOLEAN Communication Valid
TEST BOOLEAN Test Output
Table 944: GOOSEBINRCV Non group settings (basic)

On
21.4.12.4 Operation principle GUID-950F2501-9183-43C0-A193-7D15124F6CCE v2
The DVALIDx output will be HIGH if the incoming message is with valid data.

error
data with q= Normal
data with q= Test

Technical manual

simple level. If quality data validity is GOOD then the DVALIDx output will be
or OLD DATA then the DVALIDx output will be LOW.
21.4.13 GOOSE function block to receive a switching device

GOOSEXLNRCV
GUID-4B23D0CF-F298-4BBC-B833-1B8CC98D1604 v1

GOOSE function block to receive a GOOSEXLNRCV - -
switching device
21.4.13.2 Functionality GUID-5AC7DE11-CB95-4565-A8AE-FB23D59FD717 v1
The GOOSE XLN Receive component is used to collect information from another device’s
XCBR/XSWI logical node sent over process bus via GOOSE. The GOOSE XLN Receive
component includes 12 different outputs (and their respective channel valid bits) with defined
names to ease the 61850 mapping of the GOOSE signals in the configuration process.
21.4.13.3 Function block GUID-690FD935-5344-4D6F-AB94-F9FD5FD35B23 v1
GOOSEXLNRCV
BLOCK ^BEH
^SRCBEH BEH_VALID
^SRCLOC ^LOC
^SRCBLKOPN LOC_VALID
^SRCBLKCLS ^BLKOPN
^SRCPOS BLKOPN_VALID
^SRCOPCNT ^BLKCLS
^SRCBLK BLKCLS_VALID
^SRCSTSELD ^POSVAL
^SRCOPRCVD POSVAL_VALID
^SRCOPOK ÔPCNT
^SRCEEHLT OPCNT_VALID
^SRCOPCAP ^BLK
BLK_VALID
^STSELD
STSELD_VALID
ÔPRCVD
OPRCVD_VALID
ÔPOK
OPOK_VALID
ÊEHEALTH
EEHEALTH_VALID
ÔPCAP
OPCAP_VALID
COMMVALID
TEST
Figure 667: GOOSEXLNRCV function block

Technical manual
21.4.13.4 Signals
Table 945: GOOSEXLNRCV Input signals

SRCBEH INTEGER 0 Source to behaviour output
SRCLOC BOOLEAN 0 Source to local control behaviour output
SRCBLKOPN BOOLEAN 0 Source to block opening
SRCBLKCLS BOOLEAN 0 Source to block closing
SRCPOS INTEGER 0 Source to switch position
SRCOPCNT INTEGER 0 Source to operation counter
SRCBLK BOOLEAN 0 Source to dynamic blocking of function described by the LN
SRCSTSELD BOOLEAN 0 Source to the controllable data is in the status "selected”
SRCOPRCVD BOOLEAN 0 Source to operate command for a controllable data object
received
SRCOPOK BOOLEAN 0 Source to operate command for a controllable data object
accepted
SRCEEHLT INTEGER 0 Source to external equipment health
SRCOPCAP INTEGER 0 Source to operating capability
Table 946: GOOSEXLNRCV Output signals

BEH INTEGER Behaviour
BEH_VLD BOOLEAN Valid data on Beh output
LOC BOOLEAN Local control behaviour
LOC_VLD BOOLEAN Valid data on Loc output
BLKOPN BOOLEAN Block opening
BLKOPN_VLD BOOLEAN Valid data on BlkOpn output
BLKCLS BOOLEAN Block closing
BLKCLS_VLD BOOLEAN Valid data on BlkCls output
POSVAL INTEGER Switch position
POSVAL_VLD BOOLEAN Valid data on PosVal output
OPCNT INTEGER Operation counter
OPCNT_VLD BOOLEAN Valid data on OpCnt output
BLK BOOLEAN Dynamic blocking of function described by the LN
BLK_VLD BOOLEAN Valid data on Blk output
STSELD BOOLEAN The controllable data is in the status "selected”

Technical manual

STSELD_VLD BOOLEAN Valid data on stSeld output
OPRCVD BOOLEAN Operate command for a controllable data object received
OPRCVD_VLD BOOLEAN Valid data on opRcvd output
OPOK BOOLEAN Operate command for a controllable data object accepted
OPOK_VLD BOOLEAN Valid data on opOk output
EEHEALTH INTEGER External equipment health
EEHEALTH_VLD BOOLEAN Valid data on EEHealth output
OPCAP INTEGER Operating capability
OPCAP_VLD BOOLEAN Valid data on OpCap output
COMMVALID BOOLEAN Communication valid
21.4.13.5 Settings
Table 947: GOOSEXLNRCV Non group settings (basic)

On
21.4.13.6 Operation principle GUID-903B5E3F-DC92-4D0A-B4D5-59DD01F36458 v1
The xxx_VALID outputs will be HIGH if the incoming message is with valid data.

simple level. If quality data validity is GOOD then the xxx_VALID output will be
or OLD DATA then the xxx_VALID output will be LOW.

Technical manual
21.5 IEC/UCA 61850-9-2LE communication protocol GUID-6814F62B-8D99-4679-A11E-68048D1AC424 v2
21.5.1 Introduction GUID-FE2AC08A-2E04-4E73-8CA4-905522B1026A v2
The IEC/UCA 61850-9-2LE process bus communication protocol enables an IED to

communicate with devices providing measured values in digital format, commonly known as
Merging Units (MU). The rear access points are used for the communication.
21.5.2 Function block GUID-2581F3AD-7487-4C80-BDF3-9C6EC9F2E43C v3
The function blocks are not represented in the configuration tool. The signals
appear only in the SMT tool when merging units (MU) are included in the
configuration with the Ethernet configuration tool. In the SMT tool they can be
mapped to the desired virtual input (SMAI) of the IED and used internally in the
configuration.
21.5.3 Signals
21.5.3.1 Output signals SEMOD166622-1 v1
GUID-942C81AD-22D9-438F-95FA-1972BA2BE2E5 v1
The output signals are the same for all MUs so only the table for MU1_HW is included in this
manual.
Table 948: MU1_HW Output signals

I1 STRING Analogue input I1
U1 STRING Analogue input U1
MUDATA BOOLEAN Fatal error, data not received, transmission errors, time-sync
issues or inconsistent sample rate
SYNCH BOOLEAN High when IED clock is not within configured accuracy or time
domain
SMPLLOST BOOLEAN Fatal error or recovery state after fatal error. High if any
subscribed channel has bad quality or TEST while IED not in
test mode.
MUSYNCH BOOLEAN MU not synced or MU clock not synced to same clock as IED
TESTMODE BOOLEAN Quality of one or more subscribed analogue channels is TEST
SIMMODE BOOLEAN MU delivers simulated data accepted by IED
I1QUALITY INTEGER Binary coded quality information for I1

Technical manual

U1QUALITY INTEGER Binary coded quality information for U1
Table 949: MU1_HW Non group settings (basic)


Table 950: MU1_HW Monitored data

MUDATA BOOLEAN 0=Ok - Fatal error, data not received,
1=Error transmission errors, time-sync issues
or inconsistent sample rate
SYNCH BOOLEAN 0=Ok - High when IED clock is not within
1=Error configured accuracy or time domain
SMPLLOST BOOLEAN 1=Yes - Fatal error or recovery state after fatal
0=No error. High if any subscribed channel
has bad quality or TEST while IED not
in test mode.
MUSYNCH BOOLEAN 0=Ok - MU not synced or MU clock not synced
1=Error to same clock as IED
TESTMODE BOOLEAN 1=Yes - Quality of one or more subscribed
0=No analogue channels is TEST
SIMMODE BOOLEAN 1=Yes - MU delivers simulated data accepted
0=No by IED
0=No
0=No
0=No
0=No

Technical manual

0=No
0=No
0=No I1
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No I2
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No

Technical manual

0=No
0=No
0=No
0=No
0=No I3
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No I4
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable

Technical manual

0=No
0=No
0=No
0=No
0=No
0=No
0=No U1
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No U2
0=No
0=No
0=No
1=Substituted
0=No

Technical manual

2=Reserved
1=Invalid
3=Questionable
0=No
0=No
0=No
0=No
0=No
0=No
0=No U3
0=No
0=No
0=No
1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
BadReference BOOLEAN 1=Yes - BadReference indication output for
0=No U4
0=No
0=No
0=No
0=No
0=No
0=No U4
0=No
0=No
0=No

Technical manual

1=Substituted
0=No
2=Reserved
1=Invalid
3=Questionable
21.5.6 Operation principle GUID-A1D31CDA-1FE2-4BC0-A472-1B35E73CA1F2 v6
The merging units (MUs) are situated close to the primary equipment, like circuit breakers,
isolators, etc. The MUs have the capability to gather measured values from measuring
transformers, non-conventional transducers or both. The gathered data are then transmitted
to subscribers over the process bus, utilizing the IEC/UCA 61850-9-2LE protocol.
The IED communicates with the MUs over the process bus via the rear access points. For the
user, the MU appears in the IED as a normal analogue input module and is engineered in the
very same way.

Technical manual
IED
Application
Station Wide
Preprocessing blocks Preprocessing blocks GPS Clock
SMAI SMAI
MU1 MU2
Splitter
Electrical-to-
Optical Converter
1PPS
TRM module
Access Point
110 V 1A 1A
IEC/UCA 61850-9-2LE
Ethernet Switch
IEC/UCA 61850-9-2LE
IEC/UCA 61850-9-2LE
Merging 1PPS Merging 1PPS

Unit Unit
Combi Combi
CT CT
Sensor Sensor
Conventional VT
IEC080000723enOriginal.vsd
Figure 668: Example of signal path for sampled analogue values from MU and
conventional CT/VT
The function has the following alarm signals:
• MUDATA:
• Ok[0] indicates that the merging unit samples are received from the merging unit
and are accepted.
• ERROR[1] indicates that the merging unit samples are generated by internal
substitution.
• SYNCH:
• OK[0] indicates
• when SyncLostMode = Block, and the time quality of the hardware is within
the set value [SyncAccLevel=1us, 4us or Unspecified]
• when SyncLostMode = BlockOnLostUTC, the time quality of the hardware is
within the set value [SyncAccLevel=1us, 4us or Unspecified] [AND] IED

Technical manual
receives global common time[UTC] from any of the FineSyncSource like IRIG-
B, PTP or GPS.
• when SyncLostMode = NoBlock
• ERROR[1] indicates
• when SyncLostMode = Block, and the time quality of the hardware is not
within the set value [SyncAccLevel=1us, 4us or Unspecified]
• when SyncLostMode = BlockonLostUTC, the time quality of the hardware is
not within the set value [SyncAccLevel=1us, 4us or Unspecified] [OR] IED
doesn't receive global common time[UTC] from any of the FineSyncSource
like IRIG-B, PTP or GPS.
• SMPLLOST:
• NO[0] indicates that the merging unit samples are received from the merging unit
and are accepted
• YES[1] indicates
• when merging unit data are generated by internal substitution
• when one/more channel's Quality is not good
• when merging unit is in Testmode/detailed quality=Test, IED is not in test
mode
• MUSYNCH:
• OK[0] indicates
• when SyncLostMode = Block/BlockOnLostUTC, the time quality of the
hardware is within the set value [SyncAccLevel=1us, 4us or Unspecified] [AND]
merging unit is time synchronized [smpSynch flag in datastream is not equal
to 0] [AND] the hardware time matches the time in the datastream within 10
ms.
• when SyncLostMode = NoBlock, the merging unit samples are received
• ERROR[1] indicates
• when SyncLostMode = Block/BlockOnLostUTC, the time quality of the
hardware is not within the set value [SyncAccLevel=1us, 4us or Unspecified]
[OR] merging unit is not time synchronized [smpSynch flag in datastream is
equal to 0] [OR] the hardware time is out of 10 ms from the time in the
datastream.
• when SyncLostMode = NoBlock, the merging unit samples are not received
• TESTMODE:
• NO[0] indicates that No merging unit analog channels are in testmode
• YES[1] indicates that one/more subscribed channels are in testmode
• SIMMODE:
• NO[0] indicates that normal data is received and are accepted
• YES[1] indicates that the received datastream is tagged as simulated and are
accepted
Internal substitution can happen during the following conditions:
1. Transient block after receive error (sample loss)

2. Transient block after Simulated/Real Sample value stream transition
3. Transient block after recovery from substitution
4. No data from merging unit
5. Bad data from merging unit
6. Merging unit report lost sync[smpSynch=0] and SyncLostMode = Block/BlockOnLostUTC

Technical manual
7. IED time quality of hardware is not good [not within set value SyncAccLevel] and
SyncLostMode = Block/BlockOnLostUTC
8. Merging unit channel reported with quality other than good
9. Merging unit channel/channels is/are in testmode and the IED is not in testmode
During Internal substitution, the functions connected to that particular merging unit will be
blocked and the merging unit channel's analog values will be forced to 0 with quality as Invalid,
Substituted, Failure.
Timeout
TSYNCERR Indicates that there is some timeout on any configured time source or the time
quality is worse than specified in SynchAccLevel. The timeout is individually specified per time
source (PPS, IRIG-B, SNTP etc.) See section "Time synchronization TIMESYNCHGEN"
21.5.6.1 Conditional blocking GUID-D129543D-82BE-4F8A-9333-4C3470693F98 v1
Introduction GUID-9D9A73FA-505E-4936-BB55-E7D86AB8023B v1
Conditional blocking is a concept in the 670 series which improves resilience against errors in
network communication, time synchronization, and hardware. This is important for digital
substations where analogue data (some or even all) is sourced from the IEC61850 9-2 MUs
(merging units).
Conditional blocking functionality GUID-C12A5162-7F49-4FF0-98AA-BA362BC48070 v1

The overall idea with conditional blocking is to avoid blocking of the parts of an IED which can
safely continue the operation in presence of certain error conditions (listed below).
To make conditional blocking work as intended, there are configuration rules that need to be
followed. If an incorrect configuration is deployed, the IED functionality may be blocked
inadvertently, thereby reducing the availability of protection functions. An incorrect
configuration also increases the sensitivity to single point failures.
With a proper configuration, on the other hand, only functions directly affected by an error will
be blocked, while other functions will continue to operate.
Implementation GUID-D9880430-E6D6-42EE-B315-7E9279BEC913 v1
In Figure 669, two functions are shown, F1 and F2, where F1 takes data only from MU1, while F2
takes data from both MU1 and MU2.
3Ph Group
MU1 SMAI F1
3Ph Group
MU2 SMAI F2
Figure 669: Implementation schematic

When F1 and F2 start-up, each function analyzes the analogue data which is driving it. This
information is used to determine how the function should be blocked during error conditions
separately.

Technical manual
Function F1 is independent of MU2, if MU2 is lost, this will not affect F1. It will execute its
algorithms as long as data from MU1 is available. Note that F1 will operate even with poor time
synchronization. This is possible because F1 only depends on data from a single MU.
Function F2 on the other hand, depends on the correct information and time synchronized
data being available from both MU1 and MU2. If any of the MUs fail, or if any of them indicates
the loss of time synchronization, F2 will be blocked.
Examples of error conditions GUID-AFB2C078-59A8-4DFD-AD6C-B458695E4FA5 v1

This section contains examples of error conditions that can trigger function blocking.
• Time synchronization is not available/correctly configured in the IED
• Time synchronization quality is poor
• Analogue MU data indicates bad time quality in the MU
• Analogue MU data indicates data error in the MU
• Analogue MU data is unavailable (for example, if a connection to an IEC 9-2 MU is lost)
• Hardware errors (for example, network switches and fibers, station clock failures etc.)
Depending on how the IED is configured, these kinds of errors will have a bigger or smaller
impact on how much of the IED functionality that is blocked.
Incorrect configuration GUID-7857CC4E-A7DF-4B85-BF4E-9470A02903E5 v1

As an example, consider an instance of OC4PTOC, which has four steps of functionality. In
Figure 670, it is configured with two 3-phase groups, one for current and one for voltage. The
analogue data comes from two different MUs.
Figure 670: Incorrect configuration

Technical manual
Assume, that the user has configured one step in the OC4PTOC as non-directional, and
another step as directional. Because the analogue data comes from two different MUs, the
user should understand that the data from both MUs must be available and both must indicate
that they are time synchronized, for the directional step to operate.
Due to the way conditional blocking works, if one or both of the MUs indicate poor time
synchronization, then the entire function will be blocked. Unfortunately, in this example, this
will also block the non-directional over-current step, although it would be perfectly capable of
operating without time synchronization.
This shows the incorrect configuration from a conditional blocking perspective.
Correct configuration GUID-AA803422-5774-4BDE-B84E-2FCF465EE4D0 v1

In Figure 671, the configuration is changed so the user have two instances of the function,
where the non-directional over-current instance uses only currents from one MU, while the
directional over-current instance uses current and voltage from both the MUs.
Figure 671: Correct configuration

If the time synchronization is lost, or if there is an error in the voltage modules of the MU, or if
the voltage MU is lost altogether, the non-directional instance will still be operative.
This is an example of how the user needs to configure the IED to ensure conditional blocking
works as intended.
Another way to avoid conditional blocking is to take currents as well as voltages from the
same MU. Thus, the usage of multiple SMAIs in itself is not a trigger of conditional blocking,
but the usage of multiple MUs can be. This also implies that hardware-wise, one should try to
not divide a 3-phase group of currents and voltages over multiple MUs, when this is possible
(this is really a consideration for the substation hardware setup).
Functions with multiple internal steps GUID-D067CD74-43CD-480E-9A50-4F978A8DF5D8 v1

The following functions have internal steps/functions, which also can be configured
incorrectly similar to the above description.
NS4PTOC, OC4PTOC, EF4PTOC
• Each step can be set differently with respect to directionality

Technical manual
SDEPSDE
• Directional overcurrent, non-directional residual overcurrent, and residual overvoltage
VRPVOC
• Voltage restrained overcurrent, undervoltage
LDRGFC
• Current variation, undercurrent, residual overcurrent, and undervoltage
CVGAPC
• Each step can be set differently with respect to directionality: Overcurrent1, Overcurrent2,
Undercurrent1, Undercurrent2, Overvoltage1, Overvoltage2, Undervoltage1, Undervoltage2
Time synchronization GUID-5DD58144-76EA-4019-A8EA-354E263810FB v1

A correct configuration also has to consider how the time synchronization is set up.
To begin with, a suitable station clock must be available. ABB recommends that PTP is used as
a time synchronization protocol.
Further, it is recommended that at least two station clocks are connected to the substation
network. This is to avoid the single point of failure. If one clock encounters an error, or loses its
connection to the network, the other clock will seamlessly take over the time synchronization
task, and thus avoid blocking due to lost time synchronization.
It is also required that PTP is active on all ports that send or receive sampled data on all
devices, to secure that the system time is common for all devices.
Synchronization via PTP GUID-F7D9C58F-CB87-4D2A-BC64-2B34D41557A4 v1

While synchronizing a station via PTP (IEC61850-9-3), the time propagates from the clock
through the system to each IED.
This means that during a transition, for example, when a clock regains time from the GPS
system after drifting for some time, there can be different times in different parts of a
substation.
Refer the following figure for a simple system:

Technical manual
GMC
MU2
REX 670
MU1 MU3
SAM600 - TS CT VT
Figure 672: Synchronization via PTP
If the station clock is out of order for some time and then regains good synch from, for
example, the satellite system, the correct time will reach MU2 and the 670 first. Then, it will
propagate to MU1 and MU3 through the boundary clock in the 670. This means, that for a short
duration, MU1 and MU2 will both appear to be synchronized, but they will in practice have
different times. If the protection is not blocked during this condition, user will get a false trip.
To fix this problem, the synch-lost signal from the merging units is prolonged for 16 seconds in
the 670. The synch-lost signal is used for conditional blocking of protections which use data
from the TRM of the IED in combination with a merging unit. The maximum time frame
specified by IEC61850-9-3 to propagate the time and resynchronize is 16 seconds.
The same time frame applies for the internal synchronization of the 670. In the scenario where
PTP is used in combination with 9-2, the synch-lost signal is also prolonged with 16 seconds.
Again, this delay is needed to ensure that the correct time has propagated to all units before
blocked functions are released for operation.
21.5.6.2 IEC 61850 quality expander QUALEXP GUID-9C5DC78E-041B-422B-9668-320E62B847A2 v1
The quality expander component is used to display the detailed quality of an IEC/UCA
61850-9-2LE analog channel. The component expands the channel quality output of a Merging
Unit analog channel received in the IED as per the IEC 61850-7-3 standard. This component can
be used during the ACT monitoring to get the particular channel quality of the Merging Unit.
The expanded quality bits are visible on the outputs as per IEC 61850-7-3 standard. When
written to IED, the configuration will show the expanded form of the respective MU channel
quality information during the online monitoring in the ACT.

Technical manual
The validity status of the quality as described in IEC 61850-7-3 is expanded to Good, Invalid,
Reserved and Questionable (QUEST) outputs.
The detailed quality as described in IEC 61850-7-3 is expanded to Overflow, Out of Range
(OUTRANGE), Bad reference (BADREF), Oscillatory (OSC), Failure, old data, inconsistent
(INCONS) and inaccurate (INACC) outputs.
The source status of the quality as described in IEC 61850-7-3 is expanded to Process and
Substituted (SUBST) outputs.
The other quality statuses (Test, Operator Blocked (OPBLKD) and Derived) are shown as they
are.
The derived quality is the extension to IEC 61850-7-3. If the derived bit is set to 1, it indicates
that there is no physical sensor within the system to determine the value, but the value is
derived from a combination of values from other physical sensors. Typically, I4 or U4 are
derived if they are calculated as the sum of the three phase quantities.
The configured MU channel quality as described in IEC 61850-7-3 is available on LHMI. This can
be viewed under Main Menu/Diagnostics/Merging units/MUX:XXXX/XX Quality.
Figure 673: Configured MU channel quality in LHMI
SEMOD172236-2 v3
Table 951: IEC/UCA 61850-9-2LE communication protocol

Functions Value
Protocol IEC/UCA 61850-9-2LE
Communication speed for the IEDs 100BASE-FX
21.6 LON communication protocol IP14420-1 v1
An optical network can be used within the substation automation system. This enables
communication with the IED through the LON bus from the operator’s workplace, from the
control center and also from other terminals.
LON communication protocol is specified in LonTalkProtocol Specification Version 3 from

Echelon Corporation and is designed for communication in control networks. These networks
are characterized by high speed for data transfer, short messages (few bytes), peer-to-peer

Technical manual
communication, multiple communication media, low maintenance, multivendor equipment,

and low support costs. LonTalk supports the needs of applications that cover a range of
requirements. The protocol follows the reference model for open system interconnection (OSI)
designed by the International Standardization Organization (ISO).
In this document the most common addresses for commands and events are available. For
other addresses, refer to section Related documents.
It is assumed that the reader is familiar with LON communication protocol in general.
21.6.2 Settings IP14441-1 v2
Table 952: HORZCOMM Non group settings (basic)

Operation Off - - Off Operation
On
Table 953: ADE Non group settings (basic)

Operation Off - - Off Operation
On
TimerClass Slow - - Slow Timer class
Normal
Fast
TimeDomain Local without DST - - Local with DST Time domain
Local with DST
M15083-3 v3
The speed of the network depends on the medium and transceiver design. With protection and
control devices, fiber optic media is used, which enables the use of the maximum speed of 1.25
Mbits/s. The protocol is a peer-to-peer protocol where all the devices connected to the
network can communicate with each other. The own subnet and node number are identifying
the nodes (max. 255 subnets, 127 nodes per one subnet).
The LON bus links the different parts of the protection and control system. The measured
values, status information, and event information are spontaneously sent to the higher-level
devices. The higher-level devices can read and write memorized values, setting values, and
other parameter data when required. The LON bus also enables the bay level devices to
communicate with each other to deliver, for example, interlocking information among the
terminals without the need of a bus master.
The LonTalk protocol supports two types of application layer objects: network variables and
explicit messages. Network variables are used to deliver short messages, such as measuring
values, status information, and interlocking/blocking signals. Explicit messages are used to
transfer longer pieces of information, such as events and explicit read and write messages to
access device data.
The benefits achieved from using the LON bus in protection and control systems include direct
communication among all terminals in the system and support for multi-master
implementations. The LON bus also has an open concept, so that the terminals can
communicate with external devices using the same standard of network variables.

Technical manual
Introduction of LON protocol M15083-8 v2

For more information, refer to LON bus, LonWorks Network in Protection and Control, User’s
manual and Technical description.
LON protocol M15083-11 v1
Configuration of LON M15083-13 v3

LON network tool (LNT) is a multi-purpose tool for LonWorks network configuration. All the
functions required for setting up and configuring a LonWorks network, is easily accessible on a
single tool program.
Activate LON Communication M15083-16 v3

Activate LON communication in the Parameter Setting tool under Main Menu/Configuration/
Communication/Station communication/ LON/HORZCOMM:1, where Operation must be set
to ON.
Add LON Device Types LNT M15083-19 v3

A new device is added to LON Network Tool from the Device menu or by installing the device
from the ABB LON Device Types package for LNT 505 using SLDT package version 1p2 r04.
LON net address M15083-22 v3

To establish a LON connection, the IED has to be given a unique net address. The net address
consists of a subnet and node number. This is accomplished with the LON Network Tool by
creating one device for each IED.
Vertical communication M15083-25 v1

Vertical communication describes communication between the monitoring devices and
protection and control IEDs. This communication includes sending of changed process data to
monitoring devices as events and transfer of commands, parameter data and disturbance
recorder files. This communication is implemented using explicit messages.
Events and indications M15083-28 v3

Events are sent to the monitoring devices using explicit messages (message code 44H) with
unacknowledged transport service of the LonTalk protocol. When a signal is changed in the
IED, one message with the value, quality and time is transmitted from terminal.
Binary events M15083-31 v6

Binary events are generated in Event function blocks EVENT:1 to EVENT:20 in the IEDs. The
EVENT function blocks have predefined LON addresses. Table 954 shows the LON addresses
to the first input on the EVENT function blocks. Addresses to the other inputs on the EVENT
function block are consecutive after the first input. For example, input 15 on EVENT:17 function
block has the address 1280 + 14 (15-1) = 1294.
For double indications, only the first eight inputs 1–8 must be used. Inputs 9–16 can be used
for other types of events at the same EVENT block.
Three EVENT function blocks EVENT:1 to EVENT:3 running with a fast loop time (3 ms) are
available as basic in the IEDs.. The remaining EVENT function blocks EVENT:4 to EVENT:9 run
with a loop time of 8 ms and EVENT:10 to EVENT:20 run with a loop time of 100 ms. The EVENT
blocks are used to send binary signals, integers, real time values like analogue data from
measuring functions and mA input modules as well as pulse counter signals.
16 pulse counter value function blocks PCFCNT:1 to PCFCNT:16, and 24 mA input service values
function blocks SMMI1_In1 to 6 – SMMI4_In1 to 6 are available in the IEDs.
The first LON address in every EVENT function block is found in table 954. The formula for
calculating the LON address is:
LON Address = (EVBlkNr-1)×16 + signalNr +1023
For instance, the first pin at Event block number 2 has the address: (2-1)×16 +1 +1023 = 1040

Technical manual
Table 954: LON adresses for EVENT functions

Function block First LON address in
function block
EVENT:1 1024
EVENT:2 1040
EVENT:3 1056
EVENT:4 1072
EVENT:5 1088
EVENT:6 1104
EVENT:7 1120
EVENT:8 1136
EVENT:9 1152
EVENT:10 1168
EVENT:11 1184
EVENT:12 1200
EVENT:13 1216
EVENT:14 1232
EVENT:15 1248
EVENT:16 1264
EVENT:17 1280
EVENT:18 1296
EVENT:19 1312
EVENT:20 1328
Event masks M15083-78 v4

Event mask for each input can be set individually from Parameter Setting Tool (PST) under:
Settings/IED settings/ Monitoring / Event Function or via parameter setting tool (PST) as
follows:
• No events
• OnSet, at pick-up of the signal
• OnReset, at drop-out of the signal
• OnChange, at both pick-up and drop-out of the signal
• AutoDetect, the EVENT function makes the reporting decision (reporting criteria for
integers has no semantic, prefer to be set by the user)
Single indication M15083-123 v3

Directly connected binary IO signal via binary input function block (SMBI) is always reported on
change, no changed detection is done in the EVENT function block. Other Boolean signals, for
example a start or a trip signal from a protection function is event masked in the EVENT
function block.
Double indications M15083-126 v3

Double indications can only be reported for the first 8 inputs on an EVENT function block.
• 00 generates an intermediate event with the read status 0

• 01 generates an open event with the read status 1
• 10 generates a close event with the read status 2
• 11 generates an undefined event with the read status 3
Analog value M15083-135 v4

Technical manual
All analog values are reported cyclic. The reporting interval is taken from the connected
function if there is a limit supervised signal. Otherwise it is taken from the EVENT function
block.
Command handling M15083-80 v4

Commands are transferred using transparent SPA-bus messages. The transparent SPA-bus
message is an explicit LON message which contains an ASCII character message following the
coding rules of the SPA-bus protocol. The message is sent using explicit messages with
message code 41H and using acknowledged transport service.
Both the SPA-bus command messages (R or W) and the reply messages (D, A or N) are sent
using the same message code. It is mandatory that one device sends out only one SPA-bus
message at a time to one node and waits for the reply before sending the next message.
For commands from the operator workplace to the IED for apparatus control, that is the
function blocks type SCSWI 1 to 30, SXCBR 1 to 18 and SXSWI 1 to 24, the SPA addresses are
according to table 955.
SEMOD116913-2 v2
Table 955: SPA addresses for commands from the operator workplace to the IED for apparatus control
Name Function SPA Description
block address
BL_CMD SCSWI01 1 I 5115 SPA parameters for block
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command

Technical manual

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
CANCEL SCSWI01 1 I 5107 SPA parameters for cancel
command
command
command
command
command
command
command
command
command
command
command

Technical manual

block address
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
command
SELECTOpen=00, SCSWI01 1 I 5105 SPA parameters for select
SELECTClose=01, (Open/Close) command
SELOpen+ILO=10, Note: Send select command
SELClose+ILO=11, before operate command
SELOpen+SCO=20,
SELClose+SCO=21,
SELOpen+ILO+SCO=30,
SELClose+ILO+SCO=31
SELECTClose=01, so on. (Open/Close) command

Technical manual

block address

Technical manual

block address
ExcOpen=00, SCSWI01 1 I 5106 SPA parameters for operate
ExcClose=01, (Open/Close) command
ExcOpen+ILO=10, Note: Send select command
ExcClose+ILO=11, before operate command
ExcOpen+SCO=20,
ExcClose+SCO=21,
ExcOpen+ILO+SCO=30,
ExcClose+ILO+SCO=31
ExcClose=01, so on. (Open/Close) command

Technical manual

block address
Sub Value SXCBR01 2 I 7854 SPA parameter for position to
be substituted
Note: Send the value before
Enable
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
Sub Value SXCBR09 3I7 SPA parameter for position to
be substituted
be substituted
be substituted
be substituted

Technical manual

block address
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
Sub Value SXSWI01 3 I 196 SPA parameter for position to
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted

Technical manual

block address
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
be substituted
Sub Enable SXCBR01 2 I 7855 SPA parameter for substitute
enable command
Note: Send the Value before
Enable
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXCBR09 3I8 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command

Technical manual

block address
enable command
Sub Enable SXSWI01 3 I 197 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
Sub Enable SXSWI11 3I 379 SPA parameter for substitute
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command
enable command

Technical manual

block address
enable command
enable command
enable command
Update Block SXCBR01 2 I 7853 SPA parameter for update block
command
command
command
command
command
command
command
command
Update Block SXCBR09 3I6 SPA parameter for update block
command
command
command
command
command
command
command
command
command
command
Update Block SXSWI01 3 I 198 SPA parameter for update block
command
command
command
command
command

Technical manual

block address
command
Update Block SXSWI07 3 I 311 SPA parameter for update bloc

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1MRK506370-UEN J en Technical Manual Line Distance Protection REL670 Version 2.2 IEC

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Relion® 670 SERIES

Line distance protection REL670

© Copyright 2017 ABB. All rights reserved

Section 2 Available functions.......................................................................................59

Section 3 Analog inputs................................................................................................ 77

Section 4 Binary input and output modules...............................................................91

Section 5 Local Human-Machine-Interface LHMI ......................................................93

Line distance protection REL670 1

Section 6 Wide area measurement system.............................................................. 115

2 Line distance protection REL670

6.2.7.3 Scaling Factors for ANALOGREPORT channels........................................................... 147

Section 7 Differential protection...............................................................................151

Section 8 Impedance protection............................................................................... 163

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8.2.5 Settings.................................................................................................................................... 184

4 Line distance protection REL670

8.5.6.1 Full scheme measurement.............................................................................................. 241

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8.9.6.4 Measuring principles........................................................................................................283

6 Line distance protection REL670

8.12.7.2 Distance measuring zones............................................................................................. 356

Line distance protection REL670 7

8.16.4 Signals..................................................................................................................................... 400

Section 9 Current protection..................................................................................... 433

8 Line distance protection REL670

9.1.2 Functionality........................................................................................................................... 433

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9.5.1 Identification.......................................................................................................................... 474

10 Line distance protection REL670

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9.13.6 Monitored data.......................................................................................................................536

Section 10 Voltage protection.....................................................................................545

12 Line distance protection REL670

10.3.1 Identification.......................................................................................................................... 569

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10.7.2 Functionality........................................................................................................................... 597

Section 11 Frequency protection................................................................................ 605

14 Line distance protection REL670

11.3.6.1 Measurement principle....................................................................................................615

Section 12 Multipurpose protection........................................................................... 619

Section 13 System protection and control................................................................ 643

Section 14 Secondary system supervision................................................................ 649

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14.2.4 Signals...................................................................................................................................... 653

16 Line distance protection REL670

14.5.8 Technical data.........................................................................................................................679

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15.3.4.3 Function block................................................................................................................... 725

18 Line distance protection REL670

15.3.12.1 Identification..................................................................................................................... 773

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15.4.10 Bay reserve QCRSV................................................................................................................ 807

20 Line distance protection REL670

15.9.4 Signals...................................................................................................................................... 824

Section 16 Scheme communication............................................................................ 829

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22 Line distance protection REL670

16.7.6.2 Fault current reversal logic.............................................................................................865

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16.8.6.7 Operation principle.......................................................................................................... 883

24 Line distance protection REL670

16.8.11.8 Technical data................................................................................................................... 895

Line distance protection REL670 25

17.6.3 Function block........................................................................................................................ 920