CONTROLLERS & APPLICATIONS Seas V (O76 ETRE, pd strane nton aye “ches bya Se eee nD: ee Boo, more opindD tae Table of Conten 5) cn pst Benes 8051 Microcontroller Ok e Salient features empore Meroprocessor and Microzotelles Men Block Diagram (arentectare) Structure of Internal RAM eS Special Function Registers at f Addressing Modes . Moocer, Intruction Set cowkene Branch instructions SIMP, ADMP, UMP, 3 Serial Pore 2 Timer Section 38 Trterrupe Structure 3 ‘ingle Stepping Operation 4 Power Saving Features 7 Programmer's Hodel (Software Model) of 8052 49 prots 59 8051 Programming= E 53 [235 163 13 LUGE. SLAGS 7 TDMI 1 Sallent Features 2 RISC Design Philosophy 3 RISC v/s CISC 4 CARMI Data Path Architecture 5 “CPSR (Flag Reaister) ‘Reglster Model (Programmers Software Model) Processor Modes 6 7 8 Plelining 5 Interrupts & Exception Modes 10 Addressing Modes Li Instruction Set and Program 42. Sample Program, Syllabus & Question Papers 1 EXTC Syllabus and Question Papers 2. ETRX Syllabus and Question Papers 3. TTSyllabus and Question Papers: Allie best © Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS "m1 VIEXTC, ETRX, and Instrumentation) Salient Features of 8051: 4) AMlerecontolleris @ complete computer system bult cn a single chip. 2) 1 contain al comporents lke Processor (CPU), RAM, ROM, Seval port, Paral por, Interrupt lie, Timers ete.-on chip. 3) AMicrocontroller saves cost, seves powar consumstion and makes the crcult compact. #) 8052 1s an 8-bit Microcontroller, having the flowing: On-chip ROM = 4 KB (Program Memory) O1-Chio RAM = 128 Bytes (Osta Memory) Four 8 bit bi-directional 1/0 ports. ‘Two 16 bit Up-counters (Fimers), + Tesupperte Intersupte with two-level pr + Power saving modes. 5) It Is used In appliances such as Washing Mechines, Mlerowave Owens, Remote Contiollers etc. hratsir@hotmallcom ‘Notes Prepared by Bharat sir Bharat Sin 96208 O82 allthe'sest © Page Scanned by CamScannereral f103,2" Fle Buarar ACADEMY ‘Comparison between a pP and @ YC roe re /Aosmhe Rees | ive XTAL, I ioc > nso fot OY (te guava por He OT eo pn . K—> 72-P.7/ AisAs OM (nares te yates Hosltpy Ki vay - var to inet ate Rare rere) nate scons offer} FH as } tinectnmats } sonttsoonte " XTAL) gp fyo teeter ae x ee ME _ppett fsen er Ro Ne 7 Nes =z. er 98204 08 se heerneo ‘All the best © Es, Scanned by CamScannerx ewere rer E OY Qouue ia BBE ttt ile] ] a] aa co t ' ' t ' ' 1 t ' ' 1 1 1 ' ! ' 1 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS f Semv (EXTC, ETRK:1T and Instrumentation) 1A batches by Bharat Sir Starting Dec 20361 ‘Bharauir@hotmallcon ‘Bharat Si 06208 00217 Page? Scanned by CamScannery IAAT ACADEM na eae tombe ig main component 9701 208s 0722540 8086/8 on 808 / 65 500 86 ure contains the followin! ‘The @o54 Architect 1) cpu ‘The CPU contains the following components | ALU (8-bit) ta. 1 performs arithmetic and logic operations on B-bit 42 Tt alse performs 1-bit operations. Accumulator (8-bit) Bis @ Spe iTmemory device Its the only register which c red from External E.g.ts MOVX A, @ATOPTR; Ram into " 8 Restster (8-012) daiston, Tes sped! obit register sed or multiplication an result 1 hoes tne operons ten wih the Accomatoer, and io olds Be est Fg: MUL AB; BAC AXB PC (16-bit) I holds the address of the program memory (ROM): Its used to fetch instructions. 1 Goes on Getung incremented after every Instruction fs fetched. Hence, it aways contains address of the next instruction. cnsteintci PC can olso provide ROM address during dala transfer using indexed aedressing n Eg: MOVC A, @A ++ PC; Here "A” gets data from ROM locetion pointed by (A+FC) PTR (16-bit) C15 divided Into two 8-bi registers DPH and DPL. Itholes the address of external RAM or ROM during data transfer. Eg: MOVX A, @DPTR; Here “A” gets cata from external RAM location pointed by DPTR ‘SP (B-bit) eis an SFR, Itholds the adéress of the top of the Stack, ‘The Stack can be placea anywnere in the Internal RAM. During PUSH the SPs Incremented by 1. During POP the SP Is Decremented by t, ‘When 8051 is initialized, the SP contzins the value O7H. (viva) Sw (8-bIt) ‘The PSW Is the flag Register cf 8051, It contains status of the current result, Flags are changed by the ALU after every operation, Thy can aso be changed by the programmer. PSW Is bit addressable. Its individual bits can Its bit pattern Is as show: can be accessed as PSW.0 ... ps. ‘haratsie@hotmal.com Notes Presared by Sham Chopra Academy Bandra ~ Scanned by CamScannerJAVA hatches by Bharat Sir Starting Dec 2 ELaG REGISTER (PSW) oF 8051 Ss CAPREIUP PSW.7 RSW. 95.5 Pew. PW. PSW2 PSW.L Sw.O cy | ac | Fo [_Rs2 | rso | ove | ea a | = = carvfiag | useedefined ting | oyertow sin Loree t occured | . ass notes for ex Gveritortiag (viva Question) R Auxiliary Carry Flag Register Bank Select i Pe Se arryfromtonertibble —@0-~ Ragetersank H a brawn DhantaeGhommacom ~Tetea renee Nets Prenat oC (lore Academy Bindra~02226¢2 1997 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS ‘sem V (EXTC, ETRX, [Tand Instrumentation) JAVA batches by Bharat Sir Starting Dec 2 8051 has a 128 x 8 (128 Bytes) Internal RAM. ‘The Internal RAM has three main parts | 2) Realster 6: {The first 32 locations of the Internal RAM (OOH Each Register Bank has eight 8-ble recisters RO .. A register can be addressed using its name, or by its address. Eg: Location OOH can be accessed as RO, if Bank 0 Is the active bank, Henca, if we write: MOV A, RO; A gets data from register RO. It can also be accessed as Location OOH, irrespective of which bank is the active bank. Hence, if we write: MOV A, OOH; A gets data fram Location 00H, The appropriate bank is selected by the RS1, RSO bits of PSW. Since PSW is available to the programmer, any Sank can be selected at run-time. Bank 0 is selected by default, on reset. . FH), are divided into four banke R7, b) Bit Addressable Area + The next 16-bytes of RAM, address 20H... 2FH, Is available as Bit Addressable Area, + AS each location has 8-bits, we have a total of > 16x 8 = 128 Addressable Bits. + These bits cen be adgressed using thelr Individual address OOH .. 7FH. Eg: SETB OOH; Will store a "1" on the LSB of Iccatlan 20H Eg: CLR 07H; Will store 2 “0” on the NSB of location 20H + Normal “BYTE” operations can also be performed at the addresses: 20H Eg: MOV 20H, #00H; Will store 20" on all B-bits of location 204 ©) General Purpose Ara +” The general-purpose area ranges from location 30H ... 7FH. + This is an 80-byte area which can be used for general deta storage. Another Important element of the Internal RAM is the Stack. In 8051, the Stack can only be present in the Internal RAM. This is because, SP which is an B-bit register, can only contain an 8-bit address and External RA has 16-bit address. (#Viva) On reset SP gets the vale O7H. ‘Thereafter SP Is changed by every PUSH or POP operation in the following manner: POP: SP € SP+1 Data € [SP] [5°] € New data sp © SP~1 * bharatsir@hotmall.com ‘Notes Prepared by Bharat Sir Bharat Sir: 98204 08 Allthe best © Page Scanned by CamScanneroe A BHARAT ACADEMY 1 [w). Te: 022 2540 8086 / 809703 hare: 1, Vaghalkar Apts, Behind Naprik Stores Neer Rly Stn, Than (W1 22 2771 8086 / 865509 09 jarl Mumba Tet 0 Nerul €-103, 1" Floce, Railway station Complex, Nerul (W), Nav! q Ht : Used for held OFOH OF7H..OFOH eg wd {| Bt Ru oro OEP oF Stans cea Hogmmnd| [8 [arthmetie Lead strains to =p Stack Pointer a Bol to memory ¢{ [peTaceress External Memory : [peat Adoress External Memory Ba" [1/0 Port atch yessoyeremecie © f p17 port tes eo > WO forts > [Pere rot tatch 7 SEO | Oe TH oa ‘ P3"__J1/0 Port latct % swrooymeseraion —-{ FEC | Seri Pore Comal oot SFH_98 s St [-Seur| serial Pert Bata Suter 5 ¢ Freon [reertome tater eH SFH.86H T (Eamon Timer/Counter Mode Control 9H 5 Used or Timer contra) g_J-[=-TLO [Timer 0 tow Byte SAH tq] [tu [imer + Lowbyte 6H 5 Seo pe ae sett & = Gaga inert TS 6 Ee inert eaabes ones Se 5 tre rene cansh $C ROR SFRs are B-bit registers, each having its own special function. | They are olaced inside the Microcontroller wma na thusarstsharene wn + SFRs are allotted addresses from BON + Ifan address begins with a Character, j identifies itas an address, and not os a label Addressing the SFRs: 1. For Byte-Wise operations SFR are not addressed by their names Instead, we use their respective address, (Except a) £9: To put the value 25H intoB, We must use its address OFOM meayaiue 25H ne B Address OFOH as follows However, to put 25H into A, Mov a, #254 |S preceded with a “o", 0 that the assembler vu like TLO or TCON ete, we can write follows: Eg: The bits of PO will be ‘The bits of PSW will The bits of TCON will addressed a6 8011. a7u be adiresied as aban pS 00 ~ PO.7) . "be addressed as 88H. gry +e: PSW/.0... PSW,7) "® TCON.O ..TCON.7) ete ‘haratsi*@hotmal.com Notes Prepared by Bhar st Chopra Academy Sandra «gosto, 798206 08" 022 2642 1927 marseate Soe ee ee Vee yee Scanned by CamScannerIn this addressing made, the Dati + We put 2 "#" symbol, before the Eg: Mov A, #351 ; MOV OPTR, #3000H ; 2)Register Addressi MOV Rx, RY nelly OF on tek 3)Direct Addressin: + Here, the address of the operat ‘Only Internal RAM addresses Eg: - MOVA, 35H, OVA, 60H Mov 20H, 30H een Addressing Nodes ls the maner in which epe ner In which eperands are gives in the Instructor Seer apeNetS elbtang Sauseeseng nocens = Sverin we marten 1)Immediate Addressing Mode 1a is given in the Instruction Itself. data, to identily itas @ data value and not as en eddress. In this eddressing mode, Data is glven bya Register in the instruction, try AES The permitted registers are A, R7 .. RO of each memory bane Note: Data transfer between two RAM re: .od Is given In the Instruction. (O0H.7FH) and SFR addresses (from BOH to FFH) allowed. A €35H pera € 3000H ode em e wgisters Is not allowed. roy A7AF A €RO.. IFRO = 25H, then A gets the Value 25H. if | A € Contents of RAM location 35H A € Contents of Port 0 (SFR at address GOH) ; [20H] © 30H] 5 ROH [20H ote ne cones of Loan 204 Scanned by CamScanner-ADEMY. 10 8086 / 809 701 soa \RAT Aci 022 254 BHAA AN ant Te 20 ae oe en twe ‘Thane: 3, vaghotar apts, Genin Nagrik stores, Neer ab Te 4)Indirect Addre: rogister. Here, the address of te operand is given in 2 FeBIS¥Eh sage, the address In Internal RAM and External RAM can be accessed using that we can increment logy ‘The adventage of giving an address using o regi fons. series of 1ocott by simply incrementing the register, and hence access Internal RAM: (Qcbitaddress olven bYROSERD aa aa 1 SME Rte ot Se a er Tf : : cation whose adress eg Fey ORAL e content of internal RAM Location who ine } by RO. satents of Location 25H ‘ Oy ES. an, then A gets tne content >: Fam doer ted by Ri gets value of, : ion pein ets value o, Mov GRi,& [Ri] €A Le. Internal RAN Location pointed by RI 9 i External RAM: (16 Bit address given by DPTR) by DEAR ' For the External RAM, address s provided by Ri oF RO, or by DPTR. T'DPTR i used to give'en addres, then the full AKO range of External RAM from OOOOH. Fer} is available. This is because DPTR is 16-bit and 2*° = 65536. } Asx Is present nthe struction, teats External RAL } Eo: MOVKA, @OFTR —: A € [08TAIs i 1 esd gets the contents of External RAM Location whose address | “icon by DBR | Ir Bere = 2000H, then A gets the contents of Location 20004 fo 1 the external RAM, : MOVX @DPTR,A — ; [DPTRI € 4 j ihe. Is stored at the External RAM Location whose address 418 given by DETR External RAM: (8 Bit address given by RO or Ri) IFRO or R1 Is used to give an address, then only the first 256 toy Bvollable rom 0000 H to GOFF H. This is because RO oF Ri ave Eg: MOVKA@RO 54 € (ROJN jhe. Age of Jigen py ng Contents of External RAM Location wnose address FRO = 25H, th External Ra MOV @RL,A (RIA @ a ihe. & is stored atthe Ex iis given by Rit SXteme! RAM Location whose address cations of Externel RAM IS 8-bit and 2° = only 256. Bharatsir@hormallcom Notes Prepared by Bhan 3 Academs 22a q ce "Bandra ~ 022 2642 1937 eae v 2 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS Sem V [EXTE, ETRX, IT and Instrumentation) JAVA batches by Bharat Sir Starting Dec 2016 5)Indexed Addressing Mode This mode is used to access data from the Code memery (Internal ROM or External ROM). In this addressing mode, address Is indirectly specified as 2 "SUM" of (A and OPTR) of (A and PC) Tis Is very useful because ROM contains permanent date which Is stored in te form cf Lock Up bles. To access a Look Up table, address Is given as a SUM or two registers, where one acts as the base and the cther acts as the Index within the table. A"C" is present in such Instructions, to Indicete Code Memory. Eg: MOVE A, @A+DPTR ; A € Contents of a ROM Location pointed by A+OPTR. } IF OPTR = 0400H and A = OSH, then A gets the contents of ROM } Location whose address is 0405 H. MOVE A, @A+PC € Contents of a ROM Location pointed by A+PC. ‘The same instruction may operate on Internal or External ROM, depending upon the address and on the value of EA pin of 8051. If the adress is in the range of 0000... OFFFH, then "EA pin will decide If it operates on Internal ROM or External ROM. IF EA’ = 0, External ROM else Internal ROM. + If Address is 1000H and more, it will certainly be External ROM. External Addressing using MOVX and MOVC Bos Hates Prepared by Braratsir "Biiarat Si? 98208 08217 Albéke best’ 7 pharatsir@hotmall.com Scanned by CamScannerats 022 2540 8086 / 809 701 £085 Goa 2771 8988 / 865 509 4086 meres [nero i — ; vce bennett ; Teatruction ‘source ‘Or Destination Ro-R? c - tae Reclster Addressing Mode thine Opeade (ade) Iatruction ‘souree oF Destination J Address tn Rarn Dats Diact Addressing Mode gy ee eee oe Scanned by CamScannerScanned by CamScannerseers | PPT AcapEMY 0 8086 / 809 701 g BHARATAGADEN al:022 2540 8088/8970 oy, ‘Thane: 1, Vagholkar Apts, Behind Nagrlk Store 103, 1" Flor, Ralway tatan Com EXAMPLE Iusrrucrion | cyeues | OPenarion - app A eas, ae ry _ egver wih Inmate de Ae A's 25H 1 [ADD A, #n De eet ina Register ‘ADD A, RO; “das Regner wh wove of RAM Reger ReRERO 2 | ADD a, Rr 1 | Stes eu Register. " [ADD A, 25H, “ils A Regiser wih coments ofthe ores. ACA‘ (254) 3 [ADD A addr | 1 | Streine res ind Register _ TaminerR. [ADD A, ORO: “as Reiter wih daa potted Re ARO} 4 {ADD A, ORD | te erie Regt alc Fier wih Ive dat WTR C7 Sher vind Ree Sea ne ve isctome byes uingsinple | ADOC A, #25H; SABC A, HM | 1 oD then we odd ne higher es wsing DDC so | A&A 25H + CF ‘har the cary of tower byte oddion continues inthe Sgher bye Fos Bsauple efor Bharati Lect Notes = Adis A Reise with value of AM Regis with | ADDC A, RO; GS PAPDEA RE | 1 | cay Stores result ind Register AEA ROYCE : Adis Register wih cones ofthe adress wth | ADOC A, 25H; 7 [ADPCA addr |b | carn. Sesh resull ind Register AGA + (25H) 4F Adis dRepster wih datapotnied ty Register Rp | ADO A, @RO; 8 }appca,erp| 1 et + ona P ‘wh cary. Stores result id Register, REA (RO) +O ori d Regter~Trmedlte data ~cariy Stores the resul nd Regier. For Example ner WharaSrLectre Notes ace thet there is mo “orinanyebiracten 9 [suspa,en | 1 | ThowisonySubracrom soon SUBS A, #25H; So we want te perform erdnery sebercton REA~ 25H CF | awe do’ want cerry fg toner wh the Beaton we mut uae cere cary fe by : eel CLEC: beforedoing Ske 10/suep arr | 1 | Fecmsd Resiter— valve ofRegiaer Thom A€A-RO- CF 11 /SuBB A, addr | 1. _|4 Reiter ~conentiafeddrear—e ‘Stores the result in Regier, °° SUBB A, 25H; a A © A~ [25H] - CF 12]SUBBA,@Rp | 1 [4 Reister~contentspoin | bharatsir@hotmailicom Chop: Notes Prepared by Bhara ¥ Bharat sip "Academy Bandra~ 072 2649 1927 SUBS A, @RO; A €@A- [RO] ~ | ‘Bharat Sir: 9820408 G aS ee Oe oe oe ee u Scanned by CamScannerMMICROCONTROLLERS & APPLICATIONS Sem V (EXTC, ETRX,IT and Instrumentation) JAVA batches by Bharat Sir Starting Dec 201 ia ]inca 1 [temnons he Conn oa et Nem Pathe rel ack Ri rekes dala Tncremens te Content cf RAM regen Te RO; |INC Rr 2 Puts the result back in the RAM Register. Oe ROS 15 |incaal Thermenahe Conant of thro wwe 26H ‘ar 1 Puts the result back at the same address. [25H] € [25H] + 1 as | an increas he Cont ofthe lation poled byte | INC ORO; IcenP 2 register. Puts the result back at the same focation. 1RO) € (RO) +1 Themen he Conc of DFR eine Tne oP va w : NGOFTR: 2 Puts the result back in DPTR Register. OPTR € OPTR+ 1 Decenens he Coens ofA ier Nem 18) BEGA: 7 Puts the result back in A Register. ReAH . Decemens he Conenisofa RAM. INR; 19) DECR 1 ‘Puts the result back in the RAM Register. ROE RO-1 : Decent te Contes of odes, whe 25%, 20 | DEC ada 1 ‘Puss the result back at the same address. [25H] € (25H) | Decrement Contents oft oat T Decrement Covent afte oan piney [INC ORO: 21 | DEC@RP a ‘the regisier. Puts the result back at the same location. | [RO] € [RO] - 1 Taps Coto of ond Ries : 22 | MUL AB 4 | Site 16 rent ULAR Ae ‘A (Lower Byte) and B (Higher Byte). s Divides eter by B Reso. Sores wot ond Remade. ate 23 | pxvan 4 | Here Paton yar te peormed hen Overfow, |B AEE ¢ 4 fag becomes "1" Idcating tat the rest is invalid Lise Overflow flag will be "0". Decimal Ade afer Ad = {isused wher we want ‘0 add twodecinal mmbers | mov A, #254; ; (BCD mbes) DD Ay # 25H; i» Weflrst enter the decimal numbers. DAA; ‘i Weadd them by normal ADD tnstruction. i Theanswer s then adjucted wsing DA A insiruction. | Before: DA A, a : | Open: DAA vas worksond Reisterony. A rgltr hes 4%, 24] DA I checks the Lower nibble-of A Register. Ps - [ower nihie's>9 orate Cary ts 1, ADD O4T | AEE DA, Tiencbels the ighorsibsles ‘relator has 50H, os ‘I Higher nibble is> ot Cirty Flag bs 1yADD 60H | |, ‘The final answer will bestored tA and Cary leg. | SO°A" gets } Please refer numerous examples discussed in the Decimal Adjusted. ‘lass, Fer doubts cal #BharatStr(@9820408217 rT A P tharateir@hetmallcom “Hotes Fropared by Bhatat Si Bharat Si 98204 0871 > All the'best © Page 2 ee annie Scanned by CamScannerBHARATACADEMY |, 2540 8086 / 809 701 soag 1 rhe: apes nares roe TOEaeDE 23 8m i y eh a — ssorvenon [eras | onmaron ; : rca ai ta ‘ei eee ee Sen pera. (EE, | ; 75) BULA, te 1 | ND ther bit with ‘0° ond the remaining bits with | ee mercies aa tt ea | 26 [ane aati aneatan (RR | ver 1 | Regizter. Stores resultin A Register. A, 4 Logiely ANDs A Regser wih omens ofthe 27| ANL A, ader ‘address. Sores the rest in Register AEA AND (25H) Tear tn | 2th tr omteccarez nn me Tamaya, 90 ANG aad 2 | valve "Stores result Back afte addvess. [25] € (25H) AND 308 ‘ogiclly ORs A Register with Immedia data > Sores the rsul A Register iy GaLagn OR susedro serany tafe regter, ORLA, #254; i Aeter 4 | on ihr ir wth" end the remaining bs with. | R'EA OR 254 Thott becomes the other il remain the some For examples refer WoharaSir Lecture Notes uloaaw 1 | Hesealy O26 4 Regier wih vole of Rant ORLA, RO; a Regist. Store result in A Regtter, A ©AORRO “agiealy ORs Regie a3forta,eaar | i Obed Register wh content ofthe ORLA, 25H; ‘address. Stores the result in d Reger. Rea‘on fas) sloma, Bk Lagcaly Os A Reiste wih dra poined| ; GRP || Ret Sore er ened by REX SR oy 2 Jonreass a | x [ska gums esas wing ORL 25H, a; cult beck atthe addres. (25H) ©'[25H] oRA. 36 | ORL addr, #n Logically ORs coments ofthe address wih 1 (25H) € (25H OR304 Draraiar@hotnalicom he ies Prepared hy Blan sa ed by Bharat Sr Academy Bandra ~ 022 26421927 re a Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS ‘sem V [EXTC, ETRX, Mand Instrumentation) JAVA batches by Bharat Sir Starting Dec 20161 Togieelly XORS 4 Register with Tamed cna. Stores the result in Register NOR ts usc wo complement any bit ef resiter, | XRLA, #25H; OR thar bit wth ‘andthe remet'g bus with 07. | AEA OR 254 That bir is complemented the other main the same. For examples refer WBharaStr Lecinre Notes xR Logically XORS A Register with value of RAM XRLA, RG: LA, Re Regiser toes vesull nd Resiser. RE AXOR RO ie Logically XORS A Register with contees oft XRLA, 254; pat eeesd address, Sores the result ind Register RE AKOR (25H) Logically XORs A Register with dara pointed by | XRLA, @RO; SEEAUORP. Regiver Rp Sores result nt Register AEA XOR [RO] Logically XORs contests ofthe adress with XRL25H, Regiver. Sores result back at the acess | fesiieabra x08 8 XRLaddr, A Logicolly XORsconteus ofthe aves: withthe | XRL25H, #30 xb iaede 0. valve" Stree result bak a the ees. (25H) €[254)xOR30H Clears a Reese. oR, ne 4 Reqisterbecones OOH. Re OOH Complements A Register. CLAY cela A Register pts complemented. Like aNOT gate. __| A © Complement of A ia Rotoes bite ofA register 1 positon tothe left LA: Rl ‘MSB goes 0 LS8 and Carry Flag. A gets left rotates ‘Rotaes lef, bits ofA register oleng with Carry lag. | RUC A; RLCA [MSD goer 0 Cary Flag and Carry Flag goes t01SB. | A end C* are rotated ‘Roteies bis of 4 reglter I position othe right RRA: RRA ‘LSB goes © MSB and Carry Flog. A gets right rotated “Rotates le bt of regiser along with Corry Fg. {18D goes 19 Cary Flag ard Carry Flag goes to MSB. Rotates are used to determine the vale ofery bit. | aoe, ‘Rotate the register as many tines thatthe bitcomes | RA are cotated int the cory lg. Now Check te cary fle to inow the value ofthe Bit, Rotate the munber baciwards 0 restore the original value needed. ‘Swope the nibbles of. SWAP A; ‘Mrcbchanges Lower nibble andhigher nibble ofa. _ | WA wes 25; it gste S2- “No Operation. PC simply gets incremented so that we | NOP; |g0 tothe vext iasirution. Iris Basically a dummy | ves rothing. Instrction used fo Ince delay nprogranss. PCE PC +t ‘bharatsir@hotmall.com Notes Prepared by BharatSir All the best © Scanned by CamScannerpe Thane:2,vagholar Apis Nerate€-10, 1" oor taay station Compas, Nel WE stores, Neamt 3 os ByARAT ACADEMY rane (Wh TS frnbal Tal 022 2540 8086 / 809 701 soa, 7865 509 Bou, EXAMPLE = usraverion cies |orenarion an | MO Aaa 51 {mov a, tn 1] a eater et the mmo vl Reza cathe comers ofa RAI MOV &, RO; 52 |Mova, re aaron ov A, | MOV A, 25H; 53 | Mov a, adar 1 | a heir ges he coments afte aaeress. | RY ch . econwnn poised bythe | MOV A, ORO; . 53 [Mov a, ORD 1 Pagar avote yon ie MOV RO, A; 55] movrr,a 1 | nawrreraer sew te valve aft Regier. | Roe? |= Mov Ro, #35) 56 | mover, #n 1 | aaacnepser geste vohe “n° MOY Ro, east, 2 ry addr RAM Regier gets th cones ofthe MOV RO, 25H; ee 2 | cathe Roe (2sr} 53 | Mov addr, a 1 | Stores he vatueofd atthe given cakiess. | MOV 25H, 8; ors the valued ethe given ade inov 25 @[rovssiies | 2 [oweawaey-wncsnmnann (NOL RH 61| MOV addri, addr2 2 Copies the data jrom address 2, address} | MOV 25H, 30H; (25H) € [30H] eg the given address. (25H) Sieh 63| Mov @Rp, a 1 cme OFA atthe, location pointed by MOV @RO, A; , i [RO] eA fe" > 64 | Mov onp, #n 1 [ae Regaltt "8h Lesion panied | wov ona, aren ' " . troy eae | 65 | MoV @Rp, addr 2 | {Ores contents the given address ath i siniadb nate frovew aes |B NEM into DPTR Register, | MOV DPTR, #4000H =) eg ae Scanned by CamScanner: Microcontroutet RS & APPLICATIONS ‘Sem V (EXTC, ETRY, IT and Instrumentation) JAVA batches by Bt Sir Starting Dee 201 : 67 | movx a, erp 2 | AResister ges contents of te location . tet ef te oc MOVX A, @RO; Pointed by the Register Rp, in External RAM. | &€ {ROI 68 | Movx a, @DPTR 2. | A Resster get coment afi locaton me | , te oeation (OVX A, @DPTR: Potnied by DPTR, in External RANE RE [oPTRI 69 | Movx orp, A 2. | Slores contents ofA Register atthe location | MOVX BRO, Ar ‘ ointed bythe Register Rp, m Bxternal RAM. | {ROY™ € A , 70 | Movx epprTR, A 2. | Slores contents of4 Register at the location | MOVX BOPTR, A Potnted by DPTR, in External RAM, [ora en . 1 gor doa from ROM location pele by the su of *DFTR, a The lestrcton em operate on eter teri 71] move a, @aspprr | 2 | Eten! ROW depending npontkeaddes: | wove a, @xsDerRs . formed by eddingA+DPTR ond"EA pin, | A {At DTRion Pleas ref: the nsw of Indeed ndessng & ode for more ons. 7300 il have doubt calle : 4 get datafrom ROM locaton poinedby — | MOVE, @A+?C: 72 | MOVC A, @AsPC 2 | team of 42PC. Re Tat Cheon Tuiportant pola to romanbar whenever ws operate on eternal RAM oF ROME 1) Wecanror use direct addressing mode e 2) All cata cam only be transfered oar from “A register. 3) Wecan enly perform dasa tossfers with hese memories; we con directly perform ADD or SUB ete, Sich operatiens ae only allowed th Interval RAM. 4 ‘Pushes the contets ofthe adres: onto the 7 lop ofstack. PUSH 251; a 73 | PUSH addr 2 | First SP gets mremented by 1 Fest: SP € SP +1 Now, the content of the given adres are | Then: [SP] © [25H] : stored tthe new location pointed by SP. ‘ope ie deta fram the top of stack and stores > ar the given adress. por 23H; a 2. | First dota pointed by SP (op of sack) & | Pest: [25H] € (SP) 7h FOr ae opted ino the given adres, ‘nen: 5? © SP=1 ow, SP gets decremented by 1. ‘Bichanges the content of A Reglter wih the | XCH A, RO; 75 | xcH A, Rr 1 | Ram Regiver Rr aeo'Ro a ‘Exchanges the content of A Reghter withthe | XCH A, 25H; 76 }XCH A, addr Content ofthe hen ates. Ae (25H) ou [Becharnges the conteit of A Regier withthe | YCH R, @QRO: 77.) MCHA ORE 1 | coments of location pointed by Regier Rp. | A €9 [RO] rea Brchanges Lower nites (ne dei of | XCHO A, RO; 78 | xcHD A RP 1 [meetin Sen pcnaaty Regine Ry | Aun #3 (hn “Wotes Prepared by Brera si rat Sr 90208 81 ~ Gharatair@hotiall.com fice rei Scanned by CamScanner1 BARAT ACADEMY 2225400088 / 40901 tal nM Tal: 222771 8086 / 965 sop gl New Rly St wstores. Tar Nerul (Wy Thane: 1 vaponar apt bend Hoar or Nerul: €-103, 1" Flor, Raiway Stattn Com ExanPue — RATION || ansraverron cress | —_—__— poMP esa; + 11 jump to the jocation ogram jumps; : takes a shart jump e 2 Program = the label “ooo Pearly relative at : on ‘MP Bac, an absolute jump 10 the rogram jumps Picea Nd by shor adres. the fabel wee van | DMP Back, . Program iakes a long jump to the lacat Program jumps to 5 81 LMP ladd 2 | specified by long address. the label “Back moe dae pani fh Aste nd ops . T._~ Prag jumps loetionpined br | NP GAsOeTR, | 82 | MP @a+DPTR 44 DPTR. + PTR to a | Peas Nowe: The ahow fowrinsrcton are UNCONDITIONAL Jumps. me ‘ACALL Oey; Program cals asubroutine atthe absolute | Program cate 9 83) ACALL sade 2 | ton spite by he shor ates saad. | "ORY stireaneas ar absolute brand LEAL Delay: . ‘Program cells subretine at he long Program cals 2 04 | LeaLt ada 2 ‘location specified by the long address ladd. “Delay” subroutine ag * 2 tong branch, The difference between a Jump and a Call is: : > Jn a Jump, we simply branch 10 the new location, and continue from there on. There is no hontan terete he pooieg nin 5 Hace heres no nedfor string ay retards nthe tok Jones con bof tree pes Oh Noes be ag : Futherore Jumps cov be inconitional errors rrccstde qa branch othe new lecalon, which be Basal subroutine, - seturn tthe maln program right at the NEXT insruction shan 1 Call nner M@ subroutine, and at heen . | Te invoke the subroutine we use Call instruction afer the Call instruction, * To retire tothe main program we we RET hction, | Buia Cal he reno 05 epahd a he te > arg RET. he return adress poppe po | Eaters me yan mel et nda bc 5 | Calis are abways unconditional in £051, [Aer crane fer hare ny ’ bharatsir@hotmail.com ~ "8~ 022 2642 1997 eee ee Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS . Sem V(EXTC, ETRX, IT and Instrumentation) os JAVA batches by Bharat Sir Starting Dec 20 : ‘Conditional Jumpst Please Note: All Condional Jumps are SHORT Jumps ov a0, #054; bode Decrement and Jump iat sro. * Wal decrement tecontens ofr 7 ib ithe valve ot sr, wiljinp tothe | 85 | DINZ Rr, radd 2 location specified by rad. a DINZ RO, Back; This ie very nein I cea Loops ta rogro. ‘Thi al perform tho Loop from the lebet “Bace’ to DINZ Instruction 5 tines. ‘The fp eoust wil be In Rr Register. MoV 25H, #0sH; back Decrement and jump ifr Will decrement the contents ofthe given > oddress c 86 | DINZ addr, radd 2 | ihe wee not zero, wittjump wine | DINE 25H, Bock : Iocaion specified by raid. ‘This cov alse be weed fecrene Loops. | Thiswill perform the The lop cott wil bei Rr Bepier. | Loop rom the abel Sou" te nee Instruction 5 times. Compare and jm I ot equal Sl Compare register ih the mamber | CONE A, #254, Cows 07 | cane a, #n, rad 2 | Mr pth are neque then program vill | SUA ea Sun oe . me ection addr eve wilsimPly | continue to next lncatin. Compare and jump if not equal. ‘EINE A, 25H, Dawn: Mil Compare A register with contents of | If Als not equal © 2 eg] CINEA, addr, radd | 2 | tegen direst they are unequal hen | cantons of ocaton 25H, ‘program wil jun to location radd or else | jump to Down, ese | Vill simply continue tothe next lcatios, | continue to next location. Compare and jump ifnot eva. q Will Compare restr Rr, withthe munber | CINE RO, 25H, Down 89 | CINE Rr, #n, radd 2 “a” [they are tnequal, then program will jump to Down ee 2 aap tection red orale witsinply SITE, OO Son, ‘continue 0 the,next location. = Y o Compare aud junp ifhot equal. CINE @RO, #25H, Down; = Wu Comparé contenis pointed by register_| 1f contents of location Ap, with tke umber "n”. If tey are palnted by RO is not 90 | CINEG@Ro, #n, Fadd | 2 | neque, shen’prograin willjump to ‘equal to 25H, jump to Tcoran radéor else vill simply continue Down, else continue to to thenext location, next location. ond 2 a be 2 Bharat Sir: 98204 08, < bbharatsir@hotmail.com Notes Prepared by Bharat Sir Allthebest@ Pagt Scanned by CamScannerBHARAT ACADEMY |. gan 2510 088/08 71 Neary sen Thane (Tel 022.2771 8066 / 855 509 ayy 1, Vapholkar Apts, Gebind Nagrk Stores, tebe Nerul: £103, 1" Floor, Rallway Staton Comples, Neu (W) JE Down; | pe nat ¢cryfe,| ios nang 91 | 3¢ rea Bea sine cont Continve to Mem Beagy : INC Down; Tunp No CH yw rcarcy flag. | if CFO, then Sump op bs Tom Pike e poeorens Eee ee “ee 2 Yt ra il ier ee en j BOOLEAN CONDITIONAL INSTRUCTIONS j Thexe mirucions check the value I indlnidual bits fo decde whether to Jump or No. | They ave very used in Embedded ssiem Application progromming mvolving Timers, Serial Fort et j 28 70.2, Down; } Jump if tes set 3 2.Cem: ie 95 | 38 b, rade 2 | foro" = 1, Junp to location “rade”, le contin fo nex location. Dove, eine contines ty next location, 3 60.2, Bown Jump if NOT wt Pow 96 | 3NB b, raed 2/76 mp1 lcaton“roaa’, | 1, P0-2 =O, Sump to | hccontos et acter Som, ae atm hu wad clear the bz | 38 0:2, Downs Por bei argc te. [rod St umpte 97 | 28C bread 2 |e comise nex ocoon nd avo’* | DOW and matte motes eo ebecontnveto nat: fecation | RETURN INSTRUCTIONS 1 eum in i 98 | RET 2 | Ms aed return fom asubroutine by | PCH & [SPI : Popping return address from the stock PCL © [5P-1] seca ; | eter from on SR ma . ae etm fom ; 99 | RETI 2 wn from an ISR. "vil pop renem ie PCH & [SP | tema ten adles rom be wack. | PEE (Sy EAB €linibarg, PE HY mig | 3p 59 ~2 ‘haratsin@notmall.com Notes Prepatad by Bharat G1 Chopra Academy Bandra ~ 022 2649 1927 ee Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS _ 58m V (EXTC, ETRX IT and Instrumentation) a + JAVA batches by Bharatssir starting Dec 201 . . INSTRUCTIONS: VENA WIS One These are bir wise portions, Here prec he Gry Fn, "b" represents any brome i adress area ofthe internal RAM having bit dresses 00. TPL “bean wo beu bi of any bt aldesable SP Ie Pr PA ee 109 [sera ¢ seth er ee {101 |erne Ser eo we, 102 ence 1 eee te Ee nef Con Fes| SNOT oF 09 | sera» eee spe ; vos [eur 1 | Bi ne eo Sanam eo - 305 | CPL Sener Bb" € Complement of Bids e thon raw.s zy os |move; — | 3 | Sisfinresthevneori b BREE 250 rt 107 | Mov b, © 2 | The given bit ges the vale of Cary Flog. Powe ec . ‘Please Note: In the following bit processing operations, Carry Flag will actas an Accumulator, : fuladee c| 2 ear eee ME ina " Frawlancesre | 2 [amemraweacemminmh | ateeftorrons molomen | 2 | onemaraenthiete REET m2 111 {ortc, /b 2 2 Go reg aden CRE geek or esw.s fe " aac ara sir Bharat Sir:98204 0821 ee wal Notes 1 : ‘pharatsir@hotmall.com TO Page 2 Scanned by CamScannerBHaRAT ACADEMY tary te Tene i Thane: , vagholtar Apts, Behind Nagte St ov Ma prot, el outta BRANCH opznarrone oF 8052 (SI¢P-BJMP-AND LIMP) ‘Short Jump Syntax: SMP rad; // Short Jump using he 7 “7) locations becouse "aaa Is an -BE HES Size struction: 2 Bytes (Opcode of SIP= 186, F208 = HONE aw ade calsatin: Pee peCarase af ext neTUCION) TO sa uncondivenel) and ALL Conditional jumps "ke 26; INC Usage: SINR ancnstona an ALL Conitona MPS SS a the ne cateuated a5 2 180g want 10 JUMP, We are tally ling were yy contains address of the next (022 2540 8086 / £09 701 g 0222771 2086 / 855 St9 ay, lative ecdrest ‘ee signed number Range: (128 Description: Mere tne branch agaress (rads) 18 to the branch location. in simple terms, instead of tl ‘ve want t9 Jursp. This “raga” Is ten added to PC, whic ‘struction, ApsoLurs Jump ‘Syntax: AIMP sadd;// Absolute Jump using the shert address Range: max 2KB as long as the Jump Is within the Same Page ‘ize oF instruction: 2 Bytes (Opcode of AIMP= 1Byte, sada = 1Byte) New address ealeulition Poe Opcode of AMP 5) i See oo Remainthe mess branch | Heneesimenas | Lower 8 ts of 2 isin ne same rege Sorcoaes sme jump location a Usage: AIMP and ACALL, 1 Description: Here the entire program memory (64 K), Is divided into 32 pag: ch yo . Into 32 pages, each page beinyd ee Sing Sy ct Gets Senate 22 age, coh roach epee ot ene : Dub of every ower eb Oe aMENN Fu ane hake ht we ven ye oade of HE 2B ve b ome ee Lone Jump I . Syntax: LIMP lad; // Lang Jump using the long (ful) address Range: 64 KB because “ladd" is a 16-bit addi Fe rots 3 cen be any value to Site of nstsctien: 3 Bytes (Oncote of LN = iBye, ned = novecsy ote A ow actress colvaton: PC « Ind ee 1 Usage: LAMP, LEAL, Description: This Is the simplest type of Jur ¥ using “ada, Ths Taga thenstapiy part tet® M8 Spy ve the address where we wish! Foresam Stanoles ofthese jumps, please refer WBharaSte ‘ny ‘bharatsi@ hotmail.com 5} Notes Prepare aim 4 es Propared by Bharat Sy ‘hopra Academy Bandra 02% ms; Bharat Sk: 9670 Scanned by CamScannerMicroconTrotters & APPLICATIONS Sem V (EXTC, ETRX, IT and instrumentation) JAVA batches by Bharat Sir Starting Dee 20: 1) RET ic used at the end of an RETI Is used at the enc of an ISR ordinary Subroutine FRET wil simply return back to the | RETT will not only return back to the next Instruction of the rain next instruction of the main program. rogram, but will also re-enable the Interrupts, by making EA, bt € 1. 3 | Operation: Operation? POP PC; PCH€ (SP) POP PC; PCHE [SP] : PCLE [SP-1] pCLe [SP-1] . SPE SP-2 SPE SP-2 BA G4; Enables interrupts by making EA bit “1* in the Te-SFR. TT Notes Prepared by:Bharat Sir ‘Bharat Sirz 96208082 [2 7 pharatsir@hotmall.com pei All the:best © Page Scanned by CamScannerMY BHARATACADEM ret 02225408086 /409o, pores el: 022 271 8086 / nes sot . Bind moe Saves TER wy, Nav Mumba, eS J eon Yaar pt, ehind NaH SP NEA Nara 63,1" Flo Raliay Sa ~ Je Serial Port. x, sonwore Programme cy through the TaD line, 8051 nas 2 high speed, full duplex, software PrsSesTeT Tie, 0 through the TaD, Data is receted seralythrovgh the Fal Teception and transmis: . register acts as a buffer for bo’ tion. SBUF register acts as a a icat The SCON SFR mainly controls serial Communi ud rate. The SMOD bit in the PCON SFR controls the bai SCON - Serial Control (SFR) [8it-Addressable As SCON.7 to SCON.0} (sro aeynes [TRE] SHO [ Swi SH2_TREW (orga Tome Trew [reste Tt Tat] SMO and SM1: (Serial Pox Mode Bits 0 and 1) SHO SMa] Sinjai Hobe | Descurion | BAD Rare oo Trtoaeo Shit Register | Fixed > fay/12 (oF Mode 1 ‘8-bit UART_ Variable sa 10 wode 2 9-6 UART | Fixed > fy,/32 orf a1 Tae 9-bit UART | Variable [ C SM2i (Serial Port Mode Bits 2) Enables multiprocessor features in Mode 2 and Mode 3. i.e. n ; Mose Zor Mode 3: IfSM2= 1 RI will be 1 when the 9” data bit received is "1: Mode 1: Size kent Ouahll,Be 2 when the Stop bit received is "4". (vad) Mode 0: ‘SM2 is kept 0 i.e. Not Used. 4 REN: (Receiver Enable) REN = 7" Enables the Receiver, REN=0 Disables the Receiver. TBS: (Bit8 Le, 9" bit transmitted) Tr Mode 2 and Node 3 It holds the 9" Programable : > In Mode 1 and Mode 0 it § not used, | Sh to Be transmitted, RBS: (Bits Le. 9" bit recieved) In Mode 2 and Mode 3 Its used to receive the ol» In Mode + it recieves she the Stop bit, In Mode 0 itis not used, Programable bit, BL (Receive Interrupt) RI-= 1 > One Complete ch RI must be explicitly cleare ‘recter 15 received, ¢ by software before reg ng the next byte, © receiving the nex: or ) ' Scanned by CamScannerMicROCONTROLLERS & APPLICATIONS Sem V(EXTC, ETRX,(Tand instrumentation) JAVA batches by bharat sir Starting bec 2 The Baud Rate Ig controtiad Smo: (Serial Baud rate Body Sk In PCON SFA) SHOD = 1 9 Doubles the Bout rate of Timer I for Modes 1, 2 ane 3, SMOD = 0 > Uses Timer 1 Baud Rate, " . SBUE Reaister * Giepuceal to eases, cog fr hl fed char hal Casesteai 5, c08,for holding the geceived character and the qther for holding the Gitrcene ongamenlts Teghsters are addressed 99H, Serial data Interrupt When a complete character's received the RI bit is set in the SCON Register. + When a complete character is transmitted the T? bits set in the SCON Register. These two bits are OR'ed to produce the serial data Interrupt ~RI/TI bit must be explicitly cleared by the program before transferring the next charecter. Pata Transmission Data written in SBUF. + Data transmitted through T,D. + When a complete character Ig transmitted TH is set. + Serial Data interrupt occurs. * Inits ISR the TY bit is reset. + New data written Into SBUF and the process continues till ll the data is transmitted, Data Reception + REN.in SCON must.be set, this prevents receiving unwanted data (eg neise), Data received through R,D Into the SBUF. When a complete character is received RT is set. Serial Data interrupt Occurs. wnasew tra Leva oun In its ISR the RI bit is reset and so the program accepts the received data. New data is received in SBUF and the process continues tll all the data is received, (es Prepared by Bharat Sir Bharat Sir: 98204 08 Allthe best © Page ‘haratsir@hotmall.com Scanned by CamScanner‘ ' BHARAT A “ADEMY cores, wear Riy Stn THANE (Ww) eral (w), Navi ub ‘pel; 022 2540 8086 / 209 702 a au stores ‘el: 022 2771 8086 / B65 509 aygy ex. ‘Thane: 1, Vagholkar Ast, Behind N erat €103, 1" Ror, Rallway Station COM | Data Transfer M a) Mode 0 (Shift Register) shift Dats Out 2 axpdatsovt "] 70 Clock v1 sat] $6P1 rao paain [00 {] i seP2 Shift Datain ‘this is @ 8-bit Half-Duplex moce. The Start/Stop bits are not required. | Both transmission and reception happen through the RxD line. | $25 ime prauldes the shift clock for data transfer. | The signat on the TD line is a Square wave fi Durmg-TramsnisSion data is "shifted out Pura Sz and low for Ss, Sa, nd 4 OEE area nab i tampled faving Prete tee toa ee This mode is mainly used for high speed data collection using discrete | It is not intended for data communication between co Sate . Baud rate: Fixed. computers. frove = £/12. (f= Oscillator Frequency). iggpaeiciianiannda casa wii Mis a haratsir@hotmall.com Totes opared Sy RGSS Ir Chopra Academy Bandra ~022 2642 1927 Scanned by CamScannerMicrocontrowters & APPLICATIONS Sem V(EXTC, ETRX, IT and Instrumentation} JAVA b w'ones by Bharat Sir Starting Dec 20161 b) Mode 1 (8-bit “Standard” UART) Receiver Samples Dataln Canter ot 8 Te svt ie ae] r TTT TT, 1 2t3 Poo lets le Start it. Data tte t el deeb Minin OF One Stop git aitne This is a 10-bit Full-Duplex mode, RxD recelves date, T,D transmits data. For Transmission data is sent as 4 Start bit (0), 8 Data hits (LS® first), 1 Stop bit (1). ‘Transmit Interrupt flag TH is set only after all the above 10 bits are transmitted. Bit Interval is inverse of Baud rate i.e. each bit has to be mainteined for that interval. Data is also received in the same order at the programmed Baud Rate, During reception, Start bit is discarded, 8 Data bits received in SBUF, Stop bit saved In RBS. + The RI will be set only if SM2 = 0 (unconditional) or the RBE = 1 (condition satisfied). This is an anti-noise safeguard. 2 + Once RI is set the program Is interrupted to accent the data just received, + Baud Rate: Variable (can be controlled be changing the overflow rate using difeent counts) foaus = 25¥0° x (Timer 4 overflow frequency), 32 Feoue = 1.x (Timer 1 overflow frequency); {when SMOD = 0}. 32 foaue = Lx (Timer 1 overflow frequency); { when SMOD = 1}. i6 Notes Prepared by Bharat Sir Bharat Sir; 98204 08217 : Allthe best @ Page 35 bharatsir@hotmail.com Scanned by CamScanner- Recelve Samples Dat I y Bupa ACADE gy T6012 2808880970 ; ©) Mode 2 (9-bi VAR) (Multnorcessar Meds) ; eer Tine i a Lei it JLiiig SSL pte ibs Ped ted pepe pt t—s—— so Stan Bit — sta Bits s sitine » This mode Is similar to Mode 1 except that Ithas 14 bits.ner character, + Format : 4 Start bit (0), 8 Data bits, 9" Programmable Bit and 1 Stop bit (1). During Transmission the 9° data bit Is copied form bit TBS of SCON. During Reception the & data bits are received in SBUF, 9" bit In RB& of SCON. Both Start bit and Stop bits are discarded, + This 9® bit can be used to control Multiprocessor Communication. + Baud Rate: Fixed (cannot be controlled be Timer1) fowus = 22802 x (Oscillator Frequency). ea Ae (Cesllator Frequency) {when SHOD = 0). 4 feng = Lx (Osellator Frequency) {when SMOD = 1, 2 d) Mode 3 (9-bit UART) (Multiporcessor Mode) + This mode Is exactly the same as Mode 2 except that the Bi determined using the Timer 1 overflow rate as in Moda 1. 4 “ate #8 Variable Le. Its Notes Pra Chopra Academy Ber ey Bharat Sie indra~ 022 2642 1927 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS ‘Som (EXTC, ETRX, IT and instrumentation) JAVA batches by Bharat Sie Starting Dec 2011 Multiprocessor Comm: i i 8051 (C) {sm2=0) 13051(0) {sM2=1} + This mode is also used for multiprocessor communication. Here the 9" bit is very useful. + Ifthe 9 bieis £ “Then every processor will be Interrupted and hence will recive the data (SM2=0 or 1) ‘his can be use to "Brozdcast” the data to all processors. ifthe spe ie 0. Then ONLY those processors with 'SM2 = 0 will be interrupted, hence receive the data. This enabler Selective ‘one another. snsmiesion [.e. processors can selectively talk + Inthe above example, IP"A” send date with the 9" bit as 1 then all will receive, and it will be @ “Broadcast” If °A” cond data with the 9" bit as O then only *C* will receive, and hence twill be "Selective Transmission’. Notes Prepared by Bharat Sir Bharat Sir: 98204 08. bbharatsir@hotmailicom PF 5 ‘Allthie'best© Page Scanned by CamScannerguts 1eue AREE 2h92 229 ~ e BA nt Auapeoy e 1S 248 YaAq Pavedasg fn wor yeunoy@uiseveyq “9136614 foray. 19 FPra|-moj oq asm OUNT 40 SANE 3e 3dnusaIUT - (9) pasealy POURBBIN GP9 on- 09 asm QANI 40 FANE 3@ adnssowU - (1) 195 (Ia TORS SANT TaNTSTUT EUS) :OLr pue 111 “(0 FuiLL 20) HEOOO pue F JETT IO) HeTOD Ssesppe) parnsoxo ust uour (0) 9220910 I AsRTOBUSST QLNT 20 EINE ¥8 PaNTOIeUBs nus jeusorx0 Woum (t) 195, | (oer op ToRDAU UIE) cos pue 3r t “Aronyoadsos 9 sou 40 1 OTB = (0) poses } “anqoadsa1 0 vau, 40 T sews vo bupuneD sUBNS - (5) 195 i GierTonveS-OMETEUTE) ‘ous pur Tus F osu .0j wa009 pue t sou 30) Het00 s59ppe) YS Serr29x0 JossaD01d ata UBuet (0) pase9.9 [tone 0: s.rite toss sano 0) 51g sa1"2"| Along2edses soy/on0 9 49uHL 29 J9WL Yow (1) 103 a (Deis MOTOAO IW) O41 pue tay a, as 1 tondSt Sr Fron. sv aiaessospPyial We f I [ o40)-yunan/ et). aa ‘pun Aq AuIew Paq1o4qUod S| UOTE sOWWPY Buy BAUG> Periods GOns 48 RUS NOL A Set ia el pop 2uro9 Yaeg -ou - OHL pue TL ‘eagind H2Of2TEUTHX SUNT H/T iz | fio> se UMoUr $1 I! sav 56 een QO ABUABATLSAUAOD $2309 243 |} | ee ieee ra eer | | ft en | puinen Ul IVE 9 jag ‘tidy seoytey [SeES 0 anon cc 8 ey snot anne aT Hn ceeannoeee se 2z0 od inn vee WS A Bharat Sir: 98204 0 19808 0 qnsawow LEW Pog Scanned by CamScannerGate an My) Yo MICROCONTROLLERS & APPLICATIONS Sem V (EXTC, ETRX, IT and Instrumentation) JAVA batches by Bharat Sir Starting IwOD.-= Timer Made Control (SER) [NOT Blt-Addressable] Gate [CT [vi [MO [Gate Te [i [Mo Timer 1 Timer 0 (Counter/Times) Set (1) ~ Acts as Counter (Counts external frequency on Tl and 70 pin inputs). Cleared (0) ~ Acts as Timer (Counts Internal clock frequency, fosc/12). Gate: (Gate Enable ) Set (1) = Timer controlled by hardware ke. INTX signal. Cleared (0) ~ Counting indepéndent of INTX tignal. MA, MO: (Mode Selection bits) Used to select the operational modes of the respective Timer. (ina wor] rimer node] 0. Mode 0 a ode 1 1 1 Mode 2 Mode 3 Timer Counter Interrupts ‘Touse the timer, s certain count value Is placed in the Count Reaister, is values the lx CaunE= Desired Count =U) : (on each count (rising edge of the Input dock) the counter increments its value. When the counter ros aver (Le. form all 1's to all 0's) It ssa to overttow. ‘Ths the Tmer Overton Fag, TFX (TFL or TFO) Is set {timer Interrupt is enabled then the Timer Interrupt will occur on overfow. haratsir@hotmallcom ‘Notes Propared by Bharat Sir ‘Bharat Sire 98204 All the best © Ps Scanned by CamScannerunnaT ACADEMY.» 540 8086 / £09701 aoa Thane (Tels 022 274 8086 / 865509 8085 uma swage stores, Nene RM on comple, Nerul We NE ‘Thanet 1, Vagholkar Apis Nerul: £103, 1" Foor allway Sta 110 tnt Poe Tio Bit tn TON ———— ‘ate Brin THOD TAT 00 input Pin + As shown above, based on C/T bit the tmer functions as a Counter or as a Timer. $2 Counter or as 2 Timer, Hit isa Timer, it will count the Internal clock frequency of 8051 divided by 12, (1/12). If itis a Counter, the input clock signal = ‘Timer respectively. wan ancrscrara eed aE ENe TX (TA. oF TO) Input pins for Tit ‘As shown the Timer Is running only ifthe TRY bit (TR1 oF TRO) ts eat, ; 4 } 4 ! 1 + Also If the Gate bit is set In the TMOD then the 11 forthe timer to count.” NT CINTT or INTO ) pin must be “hist! ‘bharatsir@hotmall.com Notes Prepared by Bharat Sir Chopra Academy Bandra ~o22 26421927 Bharat Sir: Scanned by CamScannermM, od } = © » J! Microcontrouters & AppLicATiONs 1 ° 1 ‘Som V (EXTC, ETRX, IT and Instrumentation) = JAVA batches by Bharat sir Starting Dec 201 Timer Modes a) Timer Mode 0 (13-bit Timer/Counter) ine Clock Plss ese taes tay} ao Ft} tere 1 2S 23h THX Js used as an B-bit counter. + TL% is used as a S-bit pre-set. Hence 13-bits are used for counting, ‘Gn each count the TLX Increments. Each time TLX rolls-over, THX increments. 1 FRED He input frequency ts alvided by 32 (5:bits of TLX and 2° = 32). | Thus the inp tsflow flag TPK Is set only when THX overflows :e. rolls rom FF 2 00H. | Max Count = 2" = 8K = 8192 (1FFFH). Hence Max Delay-> ado b) Timer Mode 4. (16-bit Timer/Counter) clock Pl teominpun ma Timor Interrupt [All Asebits of the Counter are used (6 bits of THX and 9 bits of TLS) Gh each count the 15-bit Timer increments. 2 gach Un gag TEX le set when the Timer sols-over from POT 7 A000 The Her over 29, Gk = e556 (FFF). Hence Max Delay > 65599(32/7) Braratsirioez0e 08 f | Pape Notes Prepared by Bharat Sir pharatsir@hotmail.com All the best © Scanned by CamScannerls 022 2540 8086 / 809701 295 | eo 240 8/097 ae Vagholar Apts, éehind Nogik tre :103, 1" Floor, Raita sation comole from TH) eral W1 Timer Interrupt 3 i | LX is used as on 8-bit counter } THix holds the count value to be reloaded i Gnench count TUX increments. Whar TU rolls-over (ue rom FH to 008), the ffowing events take place | 1 Timer overflow feg TX fs act, Rance timer interrupt Occurs. ' 2! The valos of THX copled Inia TLX. Hence TL% is auto-reloaded form THX, and the pros repeats 2 “Thus the timer interrupt occurs at regular intervals "Continuously". i Ine mose fuse} to guneate a dered requerey dsng the Timer Flag. fax Count > 2! = jence Hax Delay 3 255(42 Max Count > 2" = 256 (FFH), Hence Max Delay 3 255(12/1), d) Timer Mode 3 (Tvio 8-bit Timers Using Timer0) ee cc tox) 2 a |} LT] iar er Timeit0 ta used ad'2'eeparkte aeatttim ‘TO uses the control ats (TRO and TPO) Itcan werk a6 Timer ora Counter THO uses the control bits (TRI an Trt tt cen work only 25.3 Timer, mmcrwennsore ce ° Timer 1 can be ln Mode 0, Mode iver Mode 4, or Mode 2, but wil not generate an Interrupt. \ers THO and'TLo, of Timer 6. ‘bharatsi@hetmalicom Notes Prey chopra renarediby aheat Bandra 022 2642 1997 Bharat sir Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS Sem V (EXTC, ETRX, IT and Instrumentation) JAVA bot ches by Bharat Sir Starting Dec 20161 [INTERRUPISOnsOSt mina | 8051 supports 5 interrupts. Interrupts orc on the fellowing pins eek? dntomupt Ceutce Couh ne 2 Internal Timer interrupts are: + Timer 1 Ovarfiow Interrupt + Timer 0 Overflow Interrupt 4 Serial Port Interrupt (Common for RI or TI) All interrupts are vectered i.e. they cause the program to exeuute an ISR from a pre-determined address in the Program Memory. wunerivtwnseateaarnt Interrupts are controlled mainly by IE ard TP SFR's-ond also by, some bits of TCON SFR. IE = Interrupt Enable (SER) (Bit-Addressable As IE.7 to 1.0] Enable Timer’ TP Enable a imervopts STaterrupe 0 = Disable alt nterupts it Interrupt 1 Interrupt 6 (0 Disebe espectve nterupt Ip = Interrupt Priority (SER) [Bit-Addressable As IP.7 to IP.0] priority of | Friorty of Reserved | Timer tint, | TimetO Int. Prlorty of ority of Priority of Serial int. Gres Exe Into 1 = Prbrty of respective Interrupt > HIGH (= Prony of respective Interrupt LOW bharatsir@hotmall.com Notes Propared by Bharat Sir All the best © Scanned by CamScanner922 2540 8986 / 809703 3055 | Gaz 2773 £086 / 865509.006 ‘rane: 2, vagholar Apts seul 103.2" bor, RaW sete (TF 0F 770) B SEEINTCON Sh, i urs: I Timer Overflow Interrupts UF respect © nar Overflow Inert gy ertiow, Pe fer inter TUPt Oc ad. wen ony ofthe 2 Tena then the MET Tse Is exee 7 esd when their respec {he Tex bite ove aie ne eee) tag Ape te TH (TANS ATURE ety ? yee trans i Serial Port Interrupt (AI of TD. rote byte 6 Serial mart Tater areata, when 9 comets PY inthe Seon wee During transmission, whena complet av mterupts eb), fhe Seon. erent (2° ee eee nc EON ses ean cause the serial mseTaRl ne XBR. THe PrOBTEM ould exoleny E {Tne Ra/T1 bic Is not cleared 20 Clear this bitto alow further Ser omatically O° fal interrUPtS: External Intercupts (INTE and INTO) INTE and INTO wl incerrupts- See RAPE ang THT are inputs for exterral NETUPE | oon the ITO aNd ITE bt These interrupts can be -ve edge oF low wel trigaeres TCON SFR. (ITX = 1 > -ve edge trigger or TOON SER (pase inferruts cccur the respective Bits TES OF HE0 ene an ee copts are enabled then the SR Is execute are set in the TCON SFR, the respective address, Interrupt Sequence ‘The following sequence is execu! Ty auuress of next instruction of the main program | o. "Address (location) of the ISR. service on tert el et es BC is Pushes into the Stack Se 3} Program control is shifted to the Vector 4) The ISR begins. turning Sequence Re | Sy REMY Instruction denetes the end of the TSR. i 2} ecnuses the processor to POP the contents of the Stack Top into the PC. 1 3} Teale tevenables interrupts by maklng EA ble In IE SFR € 3. 4) The main program resumes, a ‘8051 has only two priority levels for the Interrupts: Low and High. *. j Interrupt priorities are set using the IP SFR. ‘As the name suggests, a high priority Interrupt can interrupt a low priority interrupt. Interrupt Pri 1 feuwo or more Interrupts atthe seme evel occur simultaneausiy then priorities are decided follows: Z ; iti 7 0003H i ti 2 TOBE ] 0013H | 3 ‘bharatslr@hotmail.com Notes Prepared by Bharat Si Chopra Academy Bandra ~022 2642 1977 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS Sem V (EXTC, ETRX, IT and instrumentation) JAVA batches by Bharat Sir Starting Dec 201" $$ avn notches by ahora sr Starting Doe 201 TF Ooi ni Serial (For Thy 003 3H Straareben ‘hare harat Sir: 98204 0821 malcom ‘Notes Prepared by Bharat Sir a sete All the best @ Pages Scanned by CamScanneruarat ACADEMY cary sea Thane OD TS ( (022 2540 8085 / 809 701 app, tru) Navi Mumbal TAL (022 2773 8086 / 855 508 a, | ind Nagi store ution Compe haces 3, Vagal ots, Bei 23,1" Fleer, allay ip inter ua where the pros technique nee ie programs: ese two imports has wd to an int rwiloxecute atest one 9 i ce another interpe Se aon 2 Beer inane omer em =” SSO_Implementation L. Make INTO low-level triggered ant properties. retire eee at eal or town a Mgot reaper! 5 4. Make FNS high priority. . The Inst three statements of the ISR for INTO should Be: .d to dieplay the contents of the piaoneons ; : i ere: “2NBP3:2, Here; Waar THAT gees hg ! suis 330baitine. Woman TAIT gie'bl un iste aah boaroms + The THD pin iskeption. Aer exeeutng tem nsruton othe mah program the 8084 enters the ISR of THTB. low = high = low. — STL = sso HT sin dus tne sn Now O51 executes RETT Instruction ané returns to the rain program, even though there isa = interrupt on the INTO tine (Becouse ofthe 1" property mentioned above ] and only then responds tothe internptetl 'ed above), J The (SR as shown above Is programmed to make the processor wait till the "INTO is ~~? I executes ONE instruction of the main progra, INTO pin (Because of the 2” property mention © Process continues, gram Is paused after execut on of every single instruction and hences! Notes Prepared by BRAGCST Vy Bharat Sir 9 Academy Bandra — 0222642 1927 Bharat Sirt Scanned by CamScannerMicrocontroiers & APPLICATIONS Som V (EXTC, ETRX, IT and instrumentation) 8051 provides the fallowing two a 1) Take Mates (Me following two power saving moses: , 2) Power Down Mode. ‘Toenter one of these modes the corresponding bit Is set In the PCON SFR PCON= Power Control (SER) (NOT Bit-Addressable] syon +1 Froorarne sud Rate Node 1, 2 end of Serial Port, Advantages of Power Saving Feature 1, Ils cost effective as less power is consumed. i 2. Power saving reduces the heat generated during the operations and hence more compact cirevi designs can be implemented. sHooTXTX[x 16h [ere Teo [ioe co 1 a> Enter tdle Mode General Pus Flog aks ede 3. Expensive fans and blowers are not required. | 4. As components are subject to less heat, thelr rellability increases and longer life is assured. | Power Saving Lagic Q bharatsir@hotmall.com Notes Prepared by Bharat sir Allthe best "Bharat Sir: 98204 082 Page Scanned by CamScanner01. 1) Idle Mode peor Peon SFR 15 #881 35 yout, cases! 26oneay : BL Be Fre CPU goes to sleey, Pui cut Of Tecrant ammount ef power. eigen ota sean ee + In Idle Node ONLY the clock sign! t The Oscillator is still running so the On-ChiP fo the Cl Supply, this saves 5 components lik ‘value as 1003 Termination from Idle Mode ‘hare are two ways ef terminating the Hale Mode. 2) tntorrupt 7 > men 2 valié interrupt oceurs the IDL bit in te PEON SOUT crmat autre fet aang tothe main tthe inert s executed. Control returns sae tee arr tne instruction that caused the Tale ode, Ie internat components maintained ther original values, sister is reset to 0. 2)Power Down Mode 2” 8051 enters Power Down Mode when the PD bit of PCON SFR is set to 1. + As FCON is NOT Bit-Addreceable, the instruction used is ORL 87H, #02H. (Address of PCON is674) * Here the entire chip is put to sleep as the oscillator is turned off. On-Chip RAM and SFR's maintain thelr values. mens ouatsctene hate + If 8052 Is running from external clock source then it Is blocked. + ALEand PSEN signals are held low. Important Use: (Reduced Power Supply Mode) In Power doven Mode the Ve can be reduced to minimlze:péwer consumption. | fe the RAM, Timer, Serial Por, 2 Vec iz mainteined high, program and execution of!) dae ginal state of the progray running As 80515 1's and the progn Its important that Vee must be maintained high until 8054 enters the Power Down Nod! and Vee Must be restored before Power Down Mode is ni no damage Is done to the internal crcuit, Groce Setemirated: Tl ‘Termination from Power Down Made ‘There is only one way of terminating the Power Down Mode. Roset : + The ONLY way of terminating the Power Ritts Ovclistoris et runnings te sey noes : 's and intemal ports contain 1's end the program starts fro register + "IF Ver was held high during Powter Down Mode then the sta of then Internal. bharatsir@hotmail.com ‘otes Prepared by Bhara tsi Chopra Academy Bandra—oz2 ire 1927 FS are res wn Node isthe maniial raset signal. ;: restart and stabllize.As 8054 Ie reset, all SER's and nec reve long enough for the escllaly mis would ensureB! ~ et, PC Is cleeredy eee ae “Bharat sir 98200) "> ara ee Scanned by CamScannerMuicrot CONTROLLERS & APPLICATIONS ‘Sem V (EXTC, ETRY, IT and Instrumentation) Program Memory Rom/ernom. 64KB Tor! Data Memory extemal Rag SKE Programmer's Model of s051 (Software Model) Dita Memory lier RAM 128 Bytes INVA batches by Bharat Sir Starting Dee 201 ee —_____ [Ar= (EO) Used as Accumstatr {0F0H)- Used in MULand DIV YEW" (ODOM) Flag Register SP (62H)~ Steck Poiner PL (82Hi~ Used as Data Pointer Fre extemal ROM/EPROM 0008 OFF 4x8 ROM FA « 1, internal |fA=o, external leooo FFF extern RAM eas, 000 #1 General Purpose seratenpa” RAM PH (@34)~ Uied as DataPointar [pre ee or = (G0)= For 9 Late Pie =(908)— Per 1 Bich Bit Addressable ‘area lew cone on ra Prater) row ace | —— Pas = (080H)~ Pore 3Latch 'SCON"— [BBH}- Programs SerialPort ‘SBUF — (998) ~HotasSerat Daw (2) er COR =H) Program Timers ‘TMOD = (89H)~ Programs Timers T.o— (8eH)~ Timer Lower Byte rus— (98H) Timer Lower Byte THO~(@CH) ~Timer OHigher Byte THL(GOH)= Timer 1 Higher Byte TE (OABH}~ Enables Interopts | [P= (OB8H} Dedder Int. Priorities PON (87H) —Used in Power saving Notes Prepared by Dliarat Sir Allthe best Scanned by CamScannerJSS IE TE SET IM SD IE ISIE TE IB J YY er, 1Y BHARATACADEMT |, a2 2540 8086 / 809701 ny ae siores, Near Ry St TONE NY” Toy gz 2774 8086 / B65 S09 ag Tran: gona aps tind Neg Sy ay Neri: €-203, 1 Foo Ralway Stilo wi uU Structure 1) The above figure represents one bit (on line) of Port 0. 2) Every por ine nase gheebIe TaEGHE tne fern of 2 FID Fee itis used to hold the value on thé port, nen ysed as an output port, _ “he itch wit Suptare 20° oral Re the barn basso aenE"write to-ateh 3) The port also has buffers that allow us to elther read from the latch of tead from the pert 4) Pore Dhas an alternate function. : can act as the multiplexed Address Data Bus (AD; ~ AD.) ; the port operates as A/D bus or simply as a Pot. wie Hence, there is a MUX that will decide Input operation 2 hen a v2" ls written to the lech, the port becomes an input port, by turning the FETs J siacethe Fort line goes inte a "oat" state (neither O nor 1), tis a ™true bldirectonsl” pate 2 ASRenD™ ype og kept ie walua of the Bert pin by enabling the “read pint butter Samer, Geet struction tke MOV A, PO; will read the value from the por: pine A SREy NoDang= ge read the value from the latch by enabling the "reed acer buffer APREAD-NODIPY pect rstuton he IME PO it res ea eae aE, ‘Output operation 1) To send a0": Write a"0" on the latch. This turns ON the FET and the port pn gets ieee 2) To send a“1": Write a"1” on the latch, e grounded, so the Port pin contains logic “e". ZThve turns OFF the FET anc the por line “floate" By connecting Vcc using an external 2 Ae Salta «containing neither tog a seats # logic 0 nor 1 (jist P resister, we can output a "4 on the por line Alternate fun: 2) Porto can also be used a the multiplexed by ae AD, - \ 3) The “control” slanal shown in the dlagram dias coo? AB Bnd tan carry addy ora 3} PARIRSGSA ma it ect nt rey lea 4) F400 toner upper FETS Ort ego 3 in becomes Logie “a i "omes Lagic™o" bharatsir@hotmall.com , Notes Brepared by Bhatat Sp akat Sip Chopra Academy Bandi 022, tem 1927 Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS Sem V(EXTC, ETRX, IT and Instrumentation) Sir Starting Dec 2011 ‘STRUCTURE OF PorT 1 Read Gren vec Rene Bin Structure 1) The above figure represents one bit (ene line) of Port 3. 2) Every port line has a one-bit latch, In the form of aD Flip Flop I Is used to hold the value on the’port, when used as en output port. The latch will capture a "0" or a"L” from the internal bus, on getting "write to lateh” signal. 3). The port also has buifers that allow us to either read from the latch or read from the port line. 4) Port 1 Is a simple 1/0 port and has no alternate function, hence the output of the latch is: directly connected to the FET through an internal pull up. Input operation 1) When 2 "4" is written to the latch, the port become 2). The Port line will not go into a "fioat” state. 3) Instead, the Internal pull up will maintain a logic 3 (Va) on the pert line. 4) ‘This meens, in spite of being in input mode, the pin stil carries "1" through the Vcc Pull up. Hence itis called a "quasi bidirectional” port. (Quasi means almost but not fully} 5) We can now read (ingut) the value of the port pin by enabling the “read pin” buffer. A READ" type of instruction like MOV A, P1; vill read the value from the port pins. Similarly, we can also read the value from the latch by enabling the “read latch” buffer. A"READ-MODIFY” type of instruction like INC P41; will read the value from the latch. Output operation 4) To send a "0": Write a "0" on the latch. ‘This turne ON the FET and the port 9in gets grounded,.so the port pin contains logic “0”, 2) To send 2 "1"; Write a “2” on.the latch, This turns. OFF.the FET. The intemal Vee Pull up provides a logic “i” on the pért line, an input port, by turning the FETs off. °) . ~fAlterna 41) Port { does not have any alternate function. bharatsir@hotmall.com Notes Prepared ‘Bharat Sir: 98204 082 All the best © Page Scanned by CamScannerao 3 BHARATACADEMY |, 2590 0086 /009701 4g ne (W)- hokar dots, Being Nagi stores, near Ry St TmNE(M) TTT OL) 274 gog6 / 865 SOD tong ‘StRucturE OF Port 2 bis Int, Bus ate ‘A"READ-MOLIFY" type of instruction tke INC 2; wil read the value foam erste” Ah Qutput operation {Totally same as port 1} 1) To send a%0": Write a0" on the etch, The internal Vic Pull up provides a logic"1” on the port line Er i " Alternate function 1) Port 2 can be used as the higher order address b US (Ase = 2) The ram directs the Sadr oi -ontrol” signal shown in the dia ‘a 885 line to the “gate” of the FE bharatsir@hotmallcom Notes Prepared by Bharat Sp Chopra Academy Bandra 022 2642 1927 Scanned by CamScannerMicrocontrouers & App ICATIONS. 2m V (EXTC, ETRX, and Instrumentation} Yate Structure {Totally same as port 1 &2} Taput operation (Totally same as port 1 & 2) Output operation {Totally same as port 1 & 2) al junction 4) Port 3 has a list of alternate functions 2) The “Alternate Output function” signal directs the alternate function to the “gate” of the FET Used to receive Serial data bit by bit Used ta transmit Serlal data bit by bit Used to receive external hardware Interrupt 0 Used to receive external hardware Interrupt 1 “Gives clock input to Timer Oto act as a Counter “Gives clock input to Timer 1 to ect'as a Counter ‘Used to Wirite data Into external RAN, ‘Used to Read data from external RAM —tharatsir@l Notes Prepared by Bharat Sir ‘Bharat Sir: 98204 08 ‘bharatsir@hotmail.com Allthe best © Pop. Scanned by CamScannerBHARAT ACADEMY eo iy se, Thane ind agrhstore hae sy station cempet, Nera (WA NEVINS 2 2540 8086 / 809701 9, 2 2771 986 / 965 303 ay, power on Reset circuit of 8051 Sharatsi@hotmallcom ob’ ~ Wo apard = Sahat on Academy Bindra~ O95 Sea apap ue Scanned by CamScannerMicrocontroue Semv (Exrc, eTRy, RS & APPLICATIONS "Tend Instrumentation) JAVA » \cnes by Bharat sir starting Dee 2016 1 YP to aad en : Ql» contents of Znternal RM toca! Result at 42H and carry at 3H 7 * SOL: ov 43m, soon Zeliotie Cory as" ov As on Read frst number DD A, 42h ne JRC site ‘tn ry ty rth ~ cere, EE 8H 2 Store cary os "1" Pr HOV 42H, a Seen ERE: SuMP ERE End of rogram | QZ TES TGIEiPlY the numbers nat and 27H, store Result in cegisters nO SOLN: HOV A, HoB2H 1 Reed fist number 7 Mov OFOH, #26H | Reed secondmumter jk MUL AB 2 Multiply the operands * SBTB PSW.4 aun” ees 2 Select Bank 2 . HOV RO, & 1 Store 158 of result 4 ov Ri, OFOH 1 Sore MSB of result 5 HERE: SMP HERE 3 End of progrem 3 YAP to add a series of 10 munbirs. the series bagins trom Location 20H Q3 Sn retezna1 RAM. Store the result at locations 30 and 33H. s SOLN: MOV RO, 1208 sintlize Source adress : Nov Fl, 10a $intiaize count of 10 cur 2 Areaister wil accumulate the Sum ‘ OV OFOH, #09H register wikoccumulote the Carry F REPEAT: ADD A, @R0 AGS thecurent element Rie SNC SKIP {if na cary, then ctecty proceed aheod F ic oFo# ifthere iso carry, Increment 8Reghter 2, SKIP: ~ INC RO {Increment source edéress s DsWe:R1, REPEAT Decrement count. Count Is NOT ZERO then repect. z Mov 30H, A. 4 Store Sum 7 Nov 31H, OFOH Store Cory one: SIMP HERE 1 End of program ~ tharawsn@hoimallcom ‘Note: Prepared by Bhafat Sir ‘Bharat Sir'98204 082 mente Allthe best © Page Scanned by CamScannerv BHARAT ACADEM ), Tel: 022 2540 8086 / 809 701 ain nr tenn tC TOOT Sra we / et ne _ ‘Nerul (W), Navi Mur ‘Thane: 1, Vaghotkar AP Q4 TAF te add a certo of 10 a location Location 20H, Store the result st 2 ee psu Ce pooner emu te OMY mes ora ee Le ert ur tc anbt Ine OF Ziftnereiso cerry, sires ihe eo There sou SHO! ac cpen repent. DaNz RL, REPEAT Decrement count. Count is NOT Mov 30H, A | store Sum “ Nov 31H, OFoH $store Cory Heme: Some HERE 1 end of rogram rom loctticn uno to adi a series of 10 nanbors. The series begins £1 Q5 _Neoou’ sn teternal Ras Store the result at locations 3000 and 300in, SOLN: MOV DETR, #2000H Intille Source odiress Mov Ri, #oalt | intwatze count of 30 cur a 1 A* wilaccumulate the Sum, and ALSO get the data from Ext. RAM MOY OFOR, #008 1B register willaccumulate the Corry 7 MOY Ro, #00H + RO wil be used to REPEAT: MOV A, @DPTR Get the data rom Ext RAM . ADD A, RO {Add the dota tothe previous sum NC SKIP 3 lf a0 cary, then diecty proceed ahead INC OFDH bif theresa carry, increment 8 Register INC DETR {Increment source address o {Store current Sum in RO from nextiteration DaNz RL, REPEAT Decrement count. f Count ls WOT ZERO then repect. MOV DPTR, #3000H 3 OPTR gets address to store the Sum MOVK @DPTR, A 2 Store Sum INC DPTR DPTA gets address to store the Camy Nov By oFo# ‘Troe Cory rom BoA regen, MOVK @DPTR, A 4 Store Cony " ia HERE: SIMD HORE 2nd of program , : ! : ! : a 2 1 bharatsir@hotmall.com Scanned by CamScannerMICROCONTROLLERS & APPLICATIONS ‘Sem V (EXTC, ETRX, IT and Instrumentation) JAVA batches by Bharat Sir Starting Dec 20 QE FAP t© copy the value 254 to ali locations from 2000% to 2100H in the External RA, —S=— HOV A, 25H HOV RO, #008 Nov DPTR, #20008 wovx eortR, A. INC OPTR, INC RO he Count COME RO, 400K, BACK jChecklf ROhos opon become OH notrepest Wovx eoerR, a $store at 21004 ERE: SUMP HERE 4 nd of program In the akove program, you must rememter that on Bites ik O will ge 2.255 count, Hence the extra step oftr the loops required anette tea umber stored nA of MOVE works only on | ROwillcontin the coust DPT contains the Dest oddress 1 Slore at EvtnaM location polntedby OFTR Fine oes averess —pranatsir@! Notes Prepared by Bharat Sir ‘Bharat Sir: 98204 08 ratsir@hotmall.com Riese Pe Allthe best © Pop Scanned by CamScannerBHARAT ACADEMY ni ry ane enn arse ne 5022 2540 8086 / 809 701 ggp Thane: Veshollar AB, |:022 2774 8086 / 885 S05 ane, ers e103, 1" For, allway Staton Jc using 8052. Assune evo 100 p80 7 Wa to gonecate «vgormenns Delay”’0f 30° © 2 27 __soteabal"ceynten vee ed Tor 12 Mi, then each machine eycte NOTE: rm 1051, 1 wo select ¢ cevacel of 12,MHE, SIRO CVCLSOr' econ tes iz = wal Re oe nese. thie 2 Bocaue i Tiiatee: emer } ‘the following instructions require machine cycle 95 oom t Mov Ri, In 9 1 Machine cycle . a 3 i egies ora i Dave wi, ade 3 2 Hachine eyele ‘ RET . 9 2 Hachine cycle > smu seis, 1301 tine ia ta oi i i ver 2 cine oye . wares Doe Ro, WADE "Eien Cyt x Countin B9ence SBE i wer > echine res ; o8 WAP to genorate a SOFTWARE delay of 10 msec using 8051. Assume i Here'we wlll ceeace an inner leop of 300 heey This will be inside | fnioster oop unten wilt repost 0 tinea. lence ve get's delay er | io 5°50 ="10,000°yeoe 19 meee. : Tsxpioxinate") 22 we ignove the celay caused due to the first an : Tast instructions of the loop. ¥ See 1 cetats tov mi, ren ees a OOFER: tov noy trad Hi Machine ee > wares Bote Ro Feprseiniet : : WATE 12 Machine Cyelesx (249) hence 4 } : er (240) hence 498 Ges 3 DyN2 RL, OUTER HA Mechnecrce va 3 rer 24 Machine Cyte PS bharotsir@hotmail Notes Prop Chopra Academy Be d-by Bharat sit indra — 022 2642 1997 Scanned by CamScannerMicroconrrouters & APPLICATIONS Sem V(©XTC, E72, and instrumentation) JAVA batches by Bharat ir starting Dee 202 79989 pene yar rR eset DELAY: Mov nz, gone Lop? count of 1 toon: ov au, teat ‘tome gay Toor: HOV RO, HHH #1 Mochne oye Nop Machine Gye ‘WAIT: DJNZ RO, wart 42 Machine Cycles x (249) hence 498 Cycles DONE RI, Looe {peterma00 reretors Danz R2, Looe {Reform so nertiors rer entopsierouine . —————— Bharat Sir: 98206082 srt —_— TWotes Prepared by Bharat Sir Bharatsir@hotmall.com Page Allthe best © Scanned by CamScannerQ10 Meee Se Sctay sane ——_— REE Reguency eg wil be wore, fghotber Apt: 3,1 Foor, Ralway Satio% wap to generate 2 delay of sehied Nag Sores Ne2e ‘complex, Nerul desired cout eornal tiner-0 of 8052. 20 prec using S*°5o ome Suitable Crystal aot though POrtS-2 fz > 3 usec Por an Up Thus c+ count = 70 Mode SOLN: MOV { Progrom TMOD + {0000 0003) Timer * ood tomer oye of Count hoy To. 10RFA Hedvoperotee Cot ag : Nov Peon, 4104 1 rogram TCON (000% 0000: : snes Shim teow ss art Wa for overow sere Poi [endo trough Pot3.1 ov reo%, #008 sop Pmero : mene: Samp HERE {end eforogom Q11 17 te gererate a square wave of 1 tis trom the TaD pin of 6051, Using Finerl. Assume Clock Frequency of 12 Miz, : Nome: Fo: a square vave of 1 iz, the delay required is .5 asec . tio know, each count will require 1/iMie > 1 uses. : Thus for $00 yeec, the Desired Count vill be $00, OLFAH. For an . t = Max Count - Desired count + 2 . Count + prep oira + + Count = Feoew sama CORES 4 Gear Ted Une inti . zH00, Program TOD s sera. tt RCN ne ; MoV THI, #0FEH toad i MOV TCON, 408 s prooregber byte of Count > cn I Program TCON +9 (0109 0000) . waate ONB COW, WALT Henan 2h Start Timers cpt P31 7 w » Nov TcON, 4008 Leet Bi ater te dey ‘SUMP REPEAT . ve aan + Repeat the process * Scanned by CamScanner