1)Discrete Cosine Transfrom and Inverse discrete cosine transform 

2)Async FIFO 
3)​Floating point addition IEEE standard 
4)Multiplication 
5)Error correction code 
6)UART 
7)A 2nd order (biquad) FIR filter 
8)​Quadic processor design
9) Log ALU design
10) HW for TCP/IP
11)Matrix Multiplication using Systolic Architecture
12)10101 Overlapping sequence detector