#include "DSP28x_Project.

h" // Device Headerfile and Examples Include File

#include <math.h>

//#define freq 50
//#define sample 10
//#define freq_tri 1000

void r_sine(void);
void y_sine(void);
void b_sine(void);
__interrupt void cpu_timer2_isr(void);
void Gpio_setup(void);
void dead_time(void);
void tri(void);
void tri1(void);
void tri2(void);
void tri3(void);
void delay(unsigned int value);
void step_1(void);
float
tri_out,tri1_out,tri2_out,tri3_out,tri_temp,tri_temp1,tri_temp2,tri_temp3,tri_inc,vm_
tri;
int freq=50;
int sample=10;
int freq_tri=1000;
float freq_new=50,x=0;
int N=1486;
float ch[334];
int j=0;
float Ns;
float rsine,ysine,bsine,step,vm_sin,temp=0;
Uint32 time_count=0;
int time_count1=1;
void main(void)
{

// Step 1. Initialize System Control:

// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
vm_tri=50;
vm_sin=100; // (50/.5) multiplying factor calculation

tri_temp=0;
tri_temp1=50;
tri_temp2=-0;
tri_temp3=-50;
tri_inc=1;
step=.5*vm_tri;
step=step*freq_tri;
step=step*sample;
step=step*(0.000001);
 DINT;

// Initialize PIE control registers to their default state.

// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:

IER = 0x0000;
IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
Gpio_setup();
for(;;)
{
delay(100);
delay(100);
}
}

void delay(unsigned int value)

{
unsigned int x,y;
for(x=0;x<value;x++)
for(y=0;y<10;y++);
}

interrupt void cpu_timer2_isr(void)

{
time_count++;
r_sine();
y_sine();
b_sine();
tri();
tri1();
tri2();
tri3();
//if(time_count>500)
// time_count=time_count;

if(time_count>(20000))
time_count=1;
//if(rsine>=0)
// GpioDataRegs.GPASET.bit.GPIO5 = 1; // Load output latch
//else
// GpioDataRegs.GPACLEAR.bit.GPIO5 = 1; // Load output latch

if(rsine>=tri_out)
GpioDataRegs.GPASET.bit.GPIO5 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO5 = 1; // Load output latch

if(rsine>=tri1_out)
GpioDataRegs.GPASET.bit.GPIO6 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO6 = 1; // Load output latch
//if(tri_out>=25)
// GpioDataRegs.GPASET.bit.GPIO7 = 1; // Load output latch
// else
// GpioDataRegs.GPACLEAR.bit.GPIO7 = 1; // Load output latch
//
if(rsine<=tri2_out)
GpioDataRegs.GPASET.bit.GPIO7 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO7 = 1; // Load output latch

if(rsine<=tri3_out)
GpioDataRegs.GPASET.bit.GPIO8 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO8 = 1; // Load output latch

if(ysine>=tri_out)
GpioDataRegs.GPASET.bit.GPIO9 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO9 = 1; // Load output latch

if(ysine>=tri1_out)
GpioDataRegs.GPASET.bit.GPIO10 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1; // Load output latch

if(ysine<=tri2_out)
GpioDataRegs.GPASET.bit.GPIO11 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO11 = 1; // Load output latch

if(ysine<=tri3_out)
GpioDataRegs.GPASET.bit.GPIO12 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO12 = 1; // Load output latch
if(bsine>=tri_out)
GpioDataRegs.GPASET.bit.GPIO13 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO13 = 1; // Load output latch

if(bsine>=tri1_out)
GpioDataRegs.GPASET.bit.GPIO14 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO14 = 1; // Load output latch

if(bsine<=tri2_out)
GpioDataRegs.GPASET.bit.GPIO15 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO15 = 1; // Load output latch

if(bsine<=tri3_out)
GpioDataRegs.GPASET.bit.GPIO16 = 1; // Load output latch
else
GpioDataRegs.GPACLEAR.bit.GPIO16 = 1; // Load output latch
if(j>1000)
j =0;
ch[j] = rsine;
j = j+1;

}
void r_sine(void)
{
float temp;
//time_count=250;
vm_sin=(freq_new)*(230/50);
vm_sin=(vm_sin*100)/230;
// if (freq_new>50)
// vm_sin=vm_sin;
// else if (freq_new<50 && freq_new>10)
// //else
//
// vm_sin=2*freq_new;
// else
// {
// vm_sin=(2*freq_new)+x;
// freq_new=(freq_new)+1;

Ns=30*freq_new;
N=29.72*freq_new;//1486/50
temp=(0.000006283)*(time_count)*freq_new*sample;
temp=sin(temp);
temp=vm_sin*temp;
rsine=temp;
}

void y_sine(void)
{
float temp;
//time_count=250;

temp=(0.000006283)*(time_count)*freq_new*sample;
temp=temp+(2*3.142857/3);
temp=sin(temp);
temp=vm_sin*temp;
ysine=temp;
}

void b_sine(void)
{
float temp;
//time_count=250;

temp=(0.000006283)*(time_count)*freq_new*sample;
temp=temp+(4*3.142857/3);
temp=sin(temp);
temp=vm_sin*temp;
bsine=temp;
}

void tri(void)
{
if(tri_inc==1)
tri_temp1=tri_temp1+step;
else
tri_temp1=tri_temp1-step;

if(tri_temp1>=vm_tri)
tri_inc=0;
else if(tri_temp1<=0)
tri_inc=1;
tri_out=tri_temp1;
}

void tri1(void)
{
if(tri_inc==1)
tri_temp1=tri_temp1+step;
else
tri_temp1=tri_temp1-step;

if(tri_temp1>=vm_tri)
tri_inc=0;
else if(tri_temp1<=0)
tri_inc=1;
tri1_out=tri_temp1+50;
}
void tri2(void)
{
if(tri_inc==1)
tri_temp1=tri_temp1+step;
else
tri_temp1=tri_temp1-step;

if(tri_temp1>=vm_tri)
tri_inc=0;
else if(tri_temp1<=0)
tri_inc=1;
tri2_out=tri_temp1-50;
}

void tri3(void)
{
if(tri_inc==1)
tri_temp1=tri_temp1+step;
else
tri_temp1=tri_temp1-step;

if(tri_temp1>=vm_tri)
tri_inc=0;
else if(tri_temp1<=0)
tri_inc=1;
tri3_out=tri_temp1-100;
}
//void tri(void)
//{
// float step=0.25;
// if(time_count1==800)
// time_count=1;
//if( time_count>0 && time_count<200)
// {
// if(tri_temp<50 && tri_temp>0)
//
////if(tri_temp>=0 && tri_temp<50)
// tri_temp=tri_temp+step;
// }
//else if( time_count1>=200 && time_count1<600)
// {
// if(tri_temp>-50 && tri_temp<50)
//
////else if(tri_temp<=50 && tri_temp>=-50)
// tri_temp=tri_temp-step;
// }
//else if( time_count1>=600 && time_count1<800)
// {
// if(tri_temp>-50 && tri_temp<0)
//
////else if (tri_out>-50 && tri_out<0)
// tri_temp=tri_temp+step;
// }
//
//
////else if (time_count1==800)
//// time_count1=1;
//tri_out=tri_temp;
//
////time_count++;
//
//}
//
//
//void tri1(void)
//{
//if(tri_inc==1)
// tri_temp1=tri_temp1+step;
//else
// tri_temp1=tri_temp1-step;
//
//if(tri_temp1<=50 && tri_temp>-50)
// tri_inc=0;
//else if(tri_temp1>=-50 && tri_temp1<50)
// tri_inc=1;
//tri_out=tri_temp1;
//}
//
//
//
//void tri2(void)
//{
//if(tri_inc==1)
// tri_temp2=tri_temp2+step;
//else if(tri_inc==0)
// tri_temp2=tri_temp2-step;
//else
// tri_temp2=tri_temp2-step;
//
//if(tri_temp2<=0 && tri_temp2>-50)
// tri_inc=0;
//else if(tri_temp2>-50 && tri_temp2<=50)
// tri_inc=1;
//else
// tri_inc=-1;
//tri_out=tri_temp2;
//}
//
//
//
//
//void tri3(void)
//{
//if(tri_inc==1)
// tri_temp3=tri_temp3+step;
//else
// tri_temp3=tri_temp3-step;
//
//if(tri_temp3>=-50 && tri_temp<50)
// tri_inc=1;
//else if(tri_temp3<50 && tri_temp3>-50)
// tri_inc=0;
//tri_out=tri_temp3;
//}

void Gpio_setup(void)
{
EALLOW;
GpioCtrlRegs.GPAPUD.bit.GPIO5 = 1; // Disable pullup on GPIO5 switch1
GpioDataRegs.GPACLEAR.bit.GPIO5 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 0; // GPIO5 = GPIO5
GpioCtrlRegs.GPADIR.bit.GPIO5 = 1; // GPIO5 = output

GpioCtrlRegs.GPAPUD.bit.GPIO6 = 1; // Disable pullup on GPIO6 switch

2
GpioDataRegs.GPACLEAR.bit.GPIO6 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // GPIO6 = GPIO6
GpioCtrlRegs.GPADIR.bit.GPIO6 = 1; // GPIO6 = output

GpioCtrlRegs.GPAPUD.bit.GPIO7 = 1; // Disable pullup on GPIO7 switch

3
GpioDataRegs.GPACLEAR.bit.GPIO7 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0; // GPIO7 = GPIO7
GpioCtrlRegs.GPADIR.bit.GPIO7 = 1; // GPIO7 = output

GpioCtrlRegs.GPAPUD.bit.GPIO8 = 1; // Disable pullup on GPIO8 switch

4
GpioDataRegs.GPACLEAR.bit.GPIO8 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0; // GPIO8 = GPIO8
GpioCtrlRegs.GPADIR.bit.GPIO8 = 1; // GPIO8 = output

GpioCtrlRegs.GPAPUD.bit.GPIO9 = 1; // Disable pullup on GPIO9 switch

5
GpioDataRegs.GPACLEAR.bit.GPIO9 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0; // GPIO9 = GPIO9
GpioCtrlRegs.GPADIR.bit.GPIO9 = 1; // GPIO9 = output

GpioCtrlRegs.GPAPUD.bit.GPIO10 = 1; // Disable pullup on GPIO10 switch

6
GpioDataRegs.GPACLEAR.bit.GPIO10 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0; // GPIO10 = GPIO10
GpioCtrlRegs.GPADIR.bit.GPIO10 = 1; // GPIO10 = output

GpioCtrlRegs.GPAPUD.bit.GPIO11 = 1; // Disable pullup on GPIO5 switch7

GpioDataRegs.GPACLEAR.bit.GPIO11 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0; // GPIO11 = GPIO11
GpioCtrlRegs.GPADIR.bit.GPIO11 = 1; // GPIO11 = output

GpioCtrlRegs.GPAPUD.bit.GPIO12 = 1; // Disable pullup on GPIO6 switch 8

GpioDataRegs.GPACLEAR.bit.GPIO12 = 1; // Load output latch
 GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0; // GPIO12 = GPIO12
GpioCtrlRegs.GPADIR.bit.GPIO12 = 1; // GPIO12 = output

GpioCtrlRegs.GPAPUD.bit.GPIO13 = 1; // Disable pullup on GPIO7 switch 9

GpioDataRegs.GPACLEAR.bit.GPIO13 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 0; // GPIO13 = GPIO13
GpioCtrlRegs.GPADIR.bit.GPIO13 = 1; // GPIO13 = output

GpioCtrlRegs.GPAPUD.bit.GPIO14 = 1; // Disable pullup on GPIO8 switch

10
GpioDataRegs.GPACLEAR.bit.GPIO14 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 0; // GPIO14 = GPIO14
GpioCtrlRegs.GPADIR.bit.GPIO14 = 1; // GPIO14 = output

GpioCtrlRegs.GPAPUD.bit.GPIO15 = 1; // Disable pullup on GPIO9 switch

11
GpioDataRegs.GPACLEAR.bit.GPIO15 = 1; // Load output latch
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 0; // GPIO15 = GPIO15
GpioCtrlRegs.GPADIR.bit.GPIO15 = 1; // GPIO15 = output

GpioCtrlRegs.GPAPUD.bit.GPIO16 = 1; // Disable pullup on GPIO10 switch

12
GpioDataRegs.GPACLEAR.bit.GPIO16 = 1; // Load output latch
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0; // GPIO16 = GPIO16
GpioCtrlRegs.GPADIR.bit.GPIO16 = 1; // GPIO16 = output

//for timer
PieVectTable.TINT2 = &cpu_timer2_isr;
InitCpuTimers(); // For this example, only initialize the Cpu Timers
//ConfigCpuTimer(&CpuTimer2, 150, sample);
ConfigCpuTimer(&CpuTimer2, 150, 10);
CpuTimer2Regs.TCR.all = 0x4000; // Use write-only instruction to set TSS bit =
0
IER |= M_INT14;
// Enable TINT0 in the PIE: Group 1 interrupt 7
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;

// Enable global Interrupts and higher priority real-time debug events:

EINT; // Enable Global interrupt INTM
ERTM; // Enable Global realtime interrupt DBGM
EDIS;
// step_1();
}

//void step_1(void)
//{
// GpioDataRegs.GPACLEAR.bit.GPIO5 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO6 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO7 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO8 = 1; // Load output latch
// GpioDataRegs.GPASET.bit.GPIO9 = 1; // Load output latch
// GpioDataRegs.GPASET.bit.GPIO10 = 1; // Load output latch
//
// GpioDataRegs.GPACLEAR.bit.GPIO11 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO12 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO13 = 1; // Load output latch
// GpioDataRegs.GPACLEAR.bit.GPIO14 = 1; // Load output latch
// GpioDataRegs.GPASET.bit.GPIO15 = 1; // Load output latch
// GpioDataRegs.GPASET.bit.GPIO16 = 1; // Load output latch
//}

void dead_time(void)
{
delay(10);
}