ASME-ATI-UIT 2010 Conference on Thermal and Environmental Issues in Energy Systems

16 – 19 May, 2010, Sorrento, Italy

JOINT ELECTRO-THERMAL SIMULATION OF PLANAR METAL

INTERCONNECTIONS UNDER HIGH CURRENT FLOW
Yabin Zhang
Dpt. of Information Engineering, University of Pisa, Via Caruso 16, 56100 Pisa Italy,
yabin.zhang@iet.unipi.it
Paolo Emilio Bagnoli
Dpt. of Information Engineering, University of Pisa, Via Caruso 16, 56100 Pisa Italy,
p.bagnoli@iet.unipi.it

1. INTRODUCTION

The present paper deals with an accurate electro-thermal simulator able to foresee all the electrical
and thermal parameters in any shaped planar metal interconnections of a circuit board driven with
high constant current and also in thermal contact with other heat sources like power devices. The
metal interconnections are subjected to the well known electromigration (EM) phenomenon which
is promoted not only by the high current density but also by the local distribution of temperature.
The recent simulation studies [1] for the EM generally operate in the isothermal regime, i.e. where
the temperature is considered uniformly distributed over the whole metal line. This hypothesis is
quite unrealistic since the Joule self-heating within the metal, the proximity of external power
dissipating devices and finally the packaging structure of the board with various boundary
conditions concur to change the temperature distribution of the metal. Furthermore, since the
resistivity of metals is an increasing function with temperature (TCR>0), the operating condition of
total constant current across the metal may be dangerous since it may lead to a positive feedback
locally causing a thermal runaway under given electrical and thermal boundary conditions.
The simulation program is composed by the cyclic interaction between an electrical solver for
current density and local power distribution calculation and a thermal one, this last based on the
recently proposed steady state analytical thermal simulator DJOSER for electronic power devices
[2], working on multilayer structures with planar power sources and various thermal boundary
conditions, including the convective ones. The simulation program may be used for several
purposes: it can be applied for the study of EM by means Montecarlo simulations in more realistic
conditions; it may be used by the circuit designer to choose the shape of the metal interconnections
and the cooling apparatus for a safe operating conditions and finally it may be used to simulate the
electro-thermal behaviour of planar heaters for domestic equipments like washers.

Keywords: Electro-Thermal, Planar metal, High current.

2. MAIN BODY

The simulation program, implemented in MATLAB environment, is composed by two different

solvers connected in a cycle: the electrical solver and a thermal one. The layout of the circuit is
given by a bitmap drawing where the graphical pixels correspond to the cells in which the whole
circuit is divided. The different colours, as depicted in the Figure 1A, define the roles of the cells:
positive voltage, negative voltage, metal, substrate and position of a discrete device dissipating a
fixed power. The circuit substrate was believed to be composed by a slab of homogeneous material,

1
with the metal on the top surface, eventually in contact on the bottom side with others layers
representing the assembling structure. On the bottom size the solid is in contact with a constant
temperature heat sink, directly or by means of a thermal contact resistance representing a
convection heat exchange coefficient. Convective boundary conditions may be set also on the
lateral and top surfaces of the solid.
The electrical solver, based on the Kirchhoff’s current law applied to each metal pixel and its
surrounding ones, works with a given voltage drop between the positive and negative pads [3]. It is
able to recursively calculate the voltage V in each pixel as a function of the metal conductances
between the pixel and the four adjacent ones. When there is no metal cell in some directions, the
corresponding voltage and conductance are defined as zero. The current and power densities for
each cell can be certainly calculated out with the voltage and conductance. However in order to
respect the constant current condition, once a stable condition is reached the obtained total current
and the voltage drop are scaled to the value of the given input current.
In the initial call of the electrical solver the temperature of the whole solid is set to the ambient
value. The electrical power distribution within the metal is then passed to the thermal solver and
assumed a distributed power load within the metal, together with those constant power loads (if
any) representing the contributions of the electrical devices. The output of the thermal solver is the
temperature distribution within the metal cells. On the basis of this last, the conductances of the
cells are changed according to the temperature dependence of the metal resistivity, so that each cell
has now its own conductance value given back to the electrical solver for a new call. This cyclic
procedure is stopped when a steady condition is reached.

3. RESULTS

As a first demonstrative test the simulation program was applied to the virtual circuit whose layout
and cross-section are shown in the Figure 1, A and B respectively. The metal interconnection with
various widths is made of copper 80 microns thick. The 1200 thick substrate is the typical FR4
board (thermal conductivity 16.5 W/m K). The structure was supposed to exchange heat by
convection with quiet air ambient (convection coefficient 6 W/K m2) at 20 °C on all the surfaces
except the bottom one which is in contact with a constant temperature heat sink (20 °C), directly or
through a thermal contact resistance Rb representing the contribution of an assembling structure, an
imperfect thermal contact, or a convective boundary condition.

The others colour scaled maps in Figure 1 represent the results of the simulation of the above circuit
at the end of the calculation cycle, with an input current of 60 A and for a perfect contact with the
heat sink (Rb=0 mm2 K/W). The maps show the current density within the metal pixels (Fig.1C),
the voltage distribution (Fig.1D), the power density dissipated in the metal for Joule effect (Fig.1E)
and the temperature map over the whole substrate (Fig.1F) calculated with the DJOSER program. In
these maps the power devices are supposed switched off. Note that the distributions of the electrical
parameters are consistent with what generally expected: the higher values occur just where the
metal is narrower and it has abrupt curves.

The effectiveness of the electro-thermal strategy can be seen from the curves of Figure 2A. Here the
peak values of the power density within the metal, for Rb= 0 and Rb= 200 mm2 K/W, are plotted as
functions of the input current following the electro-thermal strategy (black curves). Instead the red
curves represent the same parameter but calculated under isothermal conditions at the heat sink
temperature. The differences between the black and the red curves progressively increase for higher
current values and with the worsening of the heat dissipating conditions (Rb >0). Note that the
increase of the black curves of Figure 2A with the current, which are consistent with the peak
temperature curves in the Figure 2B, clearly tends to a thermal runaway where a stable steady
condition cannot be reached. However, in this case the simulation cycle does not converge.
 FIGURE 1. A: sample layout. B: sample cross-section. Maps of current density (C), voltage (D),
Joule power density (E) and temperature (F) for 60 A of input current and Rb=0.

FIGURE 2. Max power (A) and temperature (B) for two Rb values as functions of the input current.
The red curves are obtained under isothermal conditions.

REFERENCES

[1] Di Pascoli S., Iannaccone G., Monte Carlo simulation of electromigration in polycrystalline
metal stripes. Semicond. Sci. Technol. 15 (2000) 608–612.
[2] P.E. Bagnoli, C.Casarosa, F.Stefani, 2007, “DJOSER: Analytical Thermal Simulator for
Multilayer Electronic Structures. Theory and Numerical Implementation, Proc. of Thermal
Issues in Emerging Technologies Conf., ThETA 1, Cairo, Egypt, Jan 3-6th 2007; also published
on IEEE Xplore, Digital Object Identifier: 10.1109/THETA.2007.363413, May 2007.
[3] Jerke G., Lienig J., Hierarchical Current-Density Verification in Arbitrarily Shaped
Metallization Patterns of Analog Circuits, IEEE Trans. On Computer-aided Design of
Integrated Circuits and Systems, Vol 23, No. 1, January 2004.