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OUT
Features
NC
NC
NC
IN
• Output Current in Excess of 3.0 A 5 4 3 2 1
• 0.25% Typical Accuracy Over Line and Load IN 6 20 OUT
IN 7 19 OUT
• VIN Range: 0.8 V to 5.5 V IN 8 GND 18 OUT
• VBIAS Range: 2.2 V to 5.5 V PG 9 17 NC
SS
EN
GND
NC
NC
• Programmable Soft Start
• Open Drain Power Good Output QFN20, 5x5, 0.65P
• Excellent Transient Response
• Current Limit and Thermal Shutdown Protection MARKING DIAGRAM
• NCV Prefix for Automotive and Other Applications Requiring 1
Unique Site and Control Change Requirements; AEC−Q100
NCV59744
Qualified and PPAP Capable
AWLYYWWG
• These are Pb−Free Devices G
Applications
QFN20
• Automotive, Telecom and Industrial Equipment Point of Load
Regulation A = Assembly Location
• FPGA, DSP and Logic Power Supplies L/WL = Wafer Lot
Y/YY = Year
• Switching Power Supply Post Regulation W/WW = Work Week
• Applications with Specific Start−up Time or Sequencing G = Pb−Free Package
Requirements (Note: Microdot may be in either location)
NCV59744
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 9 of this data sheet.
0.45 mA
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NCV59744
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NCV59744
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NCV59744
TYPICAL CHARACTERISTICS
At TJ = +25°C, VOUT = 1.5 V, VIN = VOUT(TYP) + 0.3 V, VBIAS = 3.3 V, IOUT = 50 mA, VEN = VIN,
CIN = 1 mF, CBIAS = 1 mF, CSS = 0.01 mF, and COUT = 10 mF, unless otherwise noted.
0.20 0.5
0.15 0.4
0.3
0.10
CHANGE IN VOUT (%)
0.5 0.5
0.4 0.4
0.3 0.3 +125°C
CHANGE IN VOUT (%)
140 500
+125°C 450
120
400 IOUT = 3 A
100 +25°C 350
80 300
250
60 −40°C 200 +25°C
40 150
+125°C
100
20
50 −40°C
0 0
0 0.5 1.0 1.5 2.0 2.5 3.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
IOUT, OUTPUT CURRENT (A) VBIAS − VOUT (V)
Figure 7. VIN Dropout Voltage vs. IOUT and Figure 8. VIN Dropout Voltage vs. (VBIAS −
Temperature TJ VOUT) and Temperature TJ
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NCV59744
TYPICAL CHARACTERISTICS
At TJ = +25°C, VOUT = 1.5 V, VIN = VOUT(TYP) + 0.3 V, VBIAS = 3.3 V, IOUT = 50 mA, VEN = VIN,
CIN = 1 mF, CBIAS = 1 mF, CSS = 0.01 mF, and COUT = 10 mF, unless otherwise noted.
200 1400
180 1300
160 IOUT = 1.5 A
1200
140 −40°C
120 1100
80 +125°C
900
60 +125°C
+25°C 800
40
20 −40°C 700
0 600
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 0.5 1.0 1.5 2.0 2.5 3.0
VBIAS − VOUT (V) IOUT, OUTPUT CURRENT (A)
Figure 9. VIN Dropout Voltage vs. (VBIAS − Figure 10. VBIAS Dropout Voltage vs. IOUT and
VOUT) and Temperature TJ Temperature TJ
2000 2000
1800 1800
1600 +25°C 1600 +25°C
1400 +125°C 1400 +125°C
1200 1200
IBIAS (mA)
IBIAS (mA)
−40°C −40°C
1000 1000
800 800
600 600
400 400
200 200
0 0
0 0.5 1.0 1.5 2.0 2.5 3.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
IOUT, OUTPUT CURRENT (A) VBIAS (V)
Figure 11. BIAS Pin Current vs. IOUT and Figure 12. BIAS Pin Current vs. VBIAS and
Temperature TJ Temperature TJ
0.500 1.0
VPG,LO, L−LEVEL PG VOLTAGE (V)
0.9
0.475
0.8
0.450
0.7
0.425 0.6
ISS (mA)
0.400 0.5
0.375 0.4
0.3
0.350
0.2
0.325 0.1
0.300 0
−50 −25 0 25 50 75 100 125 0 2 4 6 8 10 12
TJ, JUNCTION TEMPERATURE (°C) IPG, PG PIN CURRENT (mA)
Figure 13. Soft Start Charging Current ISS vs. Figure 14. L−level PG Voltage vs. Current
Temperature TJ
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NCV59744
TYPICAL CHARACTERISTICS
At TJ = +25°C, VOUT = 1.5 V, VIN = VOUT(TYP) + 0.3 V, VBIAS = 3.3 V, IOUT = 50 mA, VEN = VIN,
CIN = 1 mF, CBIAS = 1 mF, CSS = 0.01 mF, and COUT = 10 mF, unless otherwise noted.
6.0
+25°C −40°C
5.0
3.0
2.0
1.0
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VBIAS − VOUT (V)
Figure 15. Current Limit vs. (VBIAS − VOUT)
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NCV59744
APPLICATIONS INFORMATION
The NCV59744 dual−rail very low dropout voltage example) the recommended Cin and Cbias value is 1 mF or
regulator is using NMOS pass transistor for output voltage greater. Ceramic or other low ESR capacitors are
regulation from VIN voltage. All the low current internal recommended. For the best performance all capacitors
controll circuitry is powered from the VBIAS voltage. should be connected to the NCV59744 respective pins
The use of an NMOS pass transistor offers several directly in the device PCB copper layer, not through vias
advantages in applications. Unlike a PMOS topology having not negligible impedance.
devices, the output capacitor has reduced impact on loop
stability. Vin to Vout operating voltage difference can be Enable Operation
very low compared with standard PMOS regulators in very The enable pin will turn the regulator on or off. The
low Vin applications. threshold limits are covered in the electrical characteristics
The NCV59744 offers programmable smooth monotonic table in this data sheet. If the enable function is not to be used
start-up. The controlled voltage rising limits the inrush then the pin should be connected to VIN or VBIAS.
current what is advantageous in applications with large Output Noise
capacitive loads. The Voltage Controlled Soft Start timing is When the NCV59744 device reaches the end of the
programmable by external Css capacitor value. Soft−Start cycle, the Soft Start capacitor is switched to serve
The Enable (EN) input is equipped with internal as a Noise filtering capacitor.
hysteresis and deglitch filter.
Open Drain type Power Good (PG) output is available for Output Voltage Adjust
Vout monitoring and sequencing of other devices. The output voltage can be adjusted from 0.8 V to 3.6 V
NCV59744 is a Adjustable linear regulator. The required using resistors divider between the output and the FB input.
Output voltage can be adjusted by two external resistors. Recommended resistor values for frequently used voltages
Typical application schematics is shown in Figure 16. can be found in the Table 6.
NCV59744 Programmable Soft−Start
The Soft-Start ramp time depends on the Soft Start
charging current ISS, Soft-Start capacitor value CSS and
internal reference voltage VREF.
The Soft –Start time can be calculated using following
equations:
tss = CSS x (VREF / ISS) [s, F,V,A]
or in more practical units
V OUT + 0.8 ǒ1 ) R 1ńR 2Ǔ tSS = CSS x 0.8V / 0.45 = CSS x 1.78
Figure 16. Typical Application Schematics where
tss = Soft−Start time in miliseconds
Dropout Voltage CSS = Soft−Start capacitor value in nano Farads
Because of two power supply inputs VIN and VBIAS and Capacitor values for frequently used Soft-Start times can be
one VOUT regulator output, there are two Dropout voltages found in the Table 7.
specified. The maximal recommended value of CSS capacitor is
The first, the VIN Dropout voltage is the voltage 15 nF. For higher CSS values the capacitor full discharging
difference (VIN – VOUT) when VOUT starts to decrease by before new Soft-Start cycle is not guaranteed.
percents specified in the Electrical Characteristics table.
VBIAS is high enough, specific value is published in the Current Limitation
Electrical Characteristics table. The internal Current Limitation circuitry allows the
The second, VBIAS dropout voltage is the voltage device to supply the full nominal current and surges but
difference (VBIAS – VOUT) when VIN and VBIAS pins are protects the device against Current Overload or Short.
joined together and VOUT starts to decrease.
Thermal Protection
Input and Output Capacitors Internal thermal shutdown (TSD) circuitry is provided to
The device is designed to be stable for all available types protect the integrated circuit in the event that the maximum
and values of output capacitors ≥ 2.2 mF. The device is also junction temperature is exceeded. When TSD activated , the
stable with multiple capacitors in parallel, which can be of regulator output turns off. When cooling down under the low
any type or value. temperature threshold, device output is activated again. This
In applications where no low input supply impedance is TSD feature is provided to prevent failures from accidental
available (PCB inductance in Vin and/or Vbias inputs as an overheating.
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NCV59744
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ÉÉ
1. DIMENSIONS AND TOLERANCING PER
PIN ONE L L ASME Y14.5M, 1994.
ÉÉ
REFERENCE 2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
L1 TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM THE TERMINAL TIP.
E 4. COPLANARITY APPLIES TO THE EXPOSED
DETAIL A PAD AS WELL AS THE TERMINALS.
ALTERNATE TERMINAL 5. OPTIONAL FEATURES.
0.15 C CONSTRUCTIONS MILLIMETERS
DIM MIN MAX
A 0.80 1.00
0.15 C A1 −−− 0.05
TOP VIEW
A3 0.20 REF
b 0.25 0.35
DETAIL B (A3) A D 5.00 BSC
0.10 C D2 3.05 3.25
DETAIL B E 5.00 BSC
ALTERNATE E2 3.05 3.25
CONSTRUCTION e 0.65 BSC
0.08 C NOTE 5 A1 L 0.45 0.65
SEATING
NOTE 4
SIDE VIEW C PLANE
L1 −−− 0.15
GENERIC
0.10 M C A B MARKING DIAGRAM*
DETAIL A D2 20X L 1
6
0.10 M C A B XXXXXXXX
11 XXXXXXXX
AWLYYWWG
E2 G
1
XXXXX = Specific Device Code
16 A = Assembly Location
20X b
WL = Wafer Lot
e 0.10 M C A B YY = Year
BOTTOM VIEW
0.05 M C NOTE 3 WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
RECOMMENDED
SOLDERING FOOTPRINT* *This information is generic. Please refer
5.30 to device data sheet for actual part
20X marking.
3.30 0.78
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
3.30 5.30
PACKAGE
OUTLINE
0.65 20X
PITCH 0.40
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON88183E Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
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