DSP Seminar

Computer Architecture for

Signal Processing
Topics to be covered:
Module 5
Computer architecture for signal processing: Harvard Architecture,
pipelining, MAC
Digital Signal Processors (DSPs) are
microprocessors with the following characteristics:

1. Real-time digital signal processing capabilities

2. High throughput.
3. Deterministic operation.
4. Re-programmability by software.

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Basic Architectural Features
The instruction set of a typical DSP device should include the following
1) Arithmetic operations such as ADD, SUBTRACT, MULTIPLY…
2) Logical operations such as AND, OR, NOT, XOR…
3) Multiply and Accumulate (MAC) operations.
4) Signal scaling operation

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MP3 Player

TI DSP in an MP3 Player-Picture Courtesy Texas Instruments

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 Architectures

Dr.ME Angoletta,CERN-https://cds.cern.ch/record/1100536/files/p167.pdf 7
Non-harvard Architecture timing diagram Instruction overlap using Harvard Arch

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 Basic Architecture of
DSP

1. Multiple Bus Structure

2. Separate Memory Space
3. DMA
4. I/O
5. ALU,Hardware multipliers and shifters
Key Architectural features

1.Harvard Architecture
2.Pipelining
3.Fast/dedicated hardware multiplier/accumulator
4.Special instructions dedicated to DSP
5.Replication
6.On chip memory/cache
7.Extended Parallelism

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Pipelining
Pipelining is a technique which allows two or more operations to overlap during
execution.
Average execution time per instruction is reduced by inherent parallelism

Pipestage

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>In a perfect pipeline,
Average time per instruction = time per instruction(non-pipeline) / no. of pipe stages
>Pipelining has a major impact on the system memory.

>DSP algorithms are often repetitive but highly structured, making them well suited to
multilevel pipelining

For example, FFT butterflies

Although requires the continuous calculation of each butterfly requires different data and coefficients
the basic butterfly arithmetic operations are identical.
Thus FFT processors can be tailored to take advantage of this. Pipelining ensures a steady flow of
instructions to the CPU, and in general leads to a significant increase in system throughput.
However, on occasions pipelining may cause problems.
For example, in some digital signal processors, pipelining may cause an unwanted instruction to be
executed, especially near branch instructions, and the designer should be aware of this possibility.
Hardware Multiplier-Accumulator(MAC)

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References
1. https://cds.cern.ch/record/1100536/files/p167.pdf
2. https://drive.google.com/file/d/1C6v-gzy4-p-RalhDQvo
HBWL_my1aj4kf/view?usp=sharing
3.

-Amith Tony Joseph 15