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2 应用 FDC2112,FDC221
2
WSON (DNT 12) 4.00mm x 4.00mm
• 接近传感器 FDC2114,FDC221
WQFN (RGH 16) 4.00mm x 4.00mm
• 手势识别 4
CLKIN VDD
40 MHz
0.1 F 1 F
Int. Osc. GND
IN0A
Resonant SD
GPIO
L C IN0B circuit driver INTB
GPIO MCU
Cap 3.3 V
Sensor 0 Core GND
IN3A ADDR
Resonant SDA I 2C
I 2C
L C IN3B circuit driver SCL peripheral
Cap
Sensor 3
Copyright © 2016, Texas Instruments Incorporated
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SNOSCZ5
FDC2212, FDC2214, FDC2112, FDC2114
ZHCSDX2A – JUNE 2015 – REVISED JUNE 2015 www.ti.com.cn
目录
1 特性 .......................................................................... 1 9.3 Feature Description................................................. 12
2 应用 .......................................................................... 1 9.4 Device Functional Modes........................................ 21
3 说明 .......................................................................... 1 9.5 Programming........................................................... 21
9.6 Register Maps ......................................................... 22
4 修订历史记录 ........................................................... 2
5 说明 (续) .............................................................. 3 10 Application and Implementation........................ 39
10.1 Application Information.......................................... 39
6 Device Comparison Table..................................... 3
10.2 Typical Application ............................................... 40
7 Pin Configuration and Functions ......................... 4
10.3 Do's and Don'ts ..................................................... 46
8 Specifications......................................................... 5
11 Power Supply Recommendations ..................... 46
8.1 Absolute Maximum Ratings ...................................... 5
12 Layout................................................................... 46
8.2 ESD Ratings ............................................................ 5
12.1 Layout Guidelines ................................................. 46
8.3 Recommended Operating Conditions....................... 5
12.2 Layout Example .................................................... 46
8.4 Thermal Information ................................................. 5
8.5 Electrical Characteristics........................................... 6 13 器件和文档支持 ..................................................... 51
13.1 器件支持 ............................................................... 51
8.6 Timing Requirements ................................................ 7
13.2 相关链接................................................................ 51
8.7 Switching Characteristics - I2C ................................. 8
13.3 社区资源................................................................ 51
8.8 Typical Characteristics .............................................. 9
13.4 商标 ....................................................................... 51
9 Detailed Description ............................................ 11
13.5 静电放电警告......................................................... 51
9.1 Overview ................................................................. 11
13.6 Glossary ................................................................ 51
9.2 Functional Block Diagrams ..................................... 11
14 机械、封装和可订购信息 ....................................... 51
4 修订历史记录
Changes from Original (June 2015) to Revision A Page
5 说明 (续)
FDC221x 经过优化,分辨率高达 28 位,而 FDC211x 的采样速率高达 13.3ksps,便于实现 使用 快速移动目标的
应用。250nF 超大最高输入电容支持使用远程传感器并跟踪环境随时间、温度和湿度的变化情况。
FDC2x1x 系列器件面向接近感测和液位感测 应用, 适用于所有液体类型。如果非导电液位感测 应用 存在干扰
(例如人手),建议使用集成有源屏蔽驱动器的 FDC1004。
FDC2112/FDC2212 WSON
DNT-12
Top View
SCL 1 12 IN1B
SDA 2 11 IN1A
CLKIN 3 10 IN0B
DAP
ADDR 4 9 IN0A
INTB 5 8 GND
SD 6 7 VDD
FDC2114/FDC2214 WQFN
RGH-16
Top View
IN3B
IN3A
IN2B
IN2A
16
15
14
13
SCL 1 12 IN1B
SDA 2 11 IN1A
DAP
CLKIN 3 10 IN0B
ADDR 4 9 IN0A
5
8
INTB
SD
VDD
GND
Pin Functions
PIN
TYPE (1) DESCRIPTION
NAME NO.
SCL 1 I I2C Clock input
SDA 2 I/O I2C Data input/output
CLKIN 3 I Master Clock input. Tie this pin to GND if internal oscillator is selected
I2C Address selection pin: when ADDR=L, I2C address = 0x2A, when ADDR=H, I2C address =
ADDR 4 I
0x2B.
INTB 5 O Configurable Interrupt output pin
SD 6 I Shutdown input
VDD 7 P Power Supply
GND 8 G Ground
IN0A 9 A Capacitive sensor input 0
IN0B 10 A Capacitive sensor input 0
IN1A 11 A Capacitive sensor input 1
IN1B 12 A Capacitive sensor input 1
IN2A 13 A Capacitive sensor input 2 (FDC2114 / FDC2214 only)
IN2B 14 A Capacitive sensor input 2 (FDC2114 / FDC2214 only)
(2) There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the GND pin of the device. Although the DAP
can be left floating, for best performance the DAP should be connected to the same potential as the device's GND pin. Do not use the
DAP as the primary ground for the device. The device GND pin must always be connected to ground.
8 Specifications
8.1 Absolute Maximum Ratings
MIN MAX UNIT
VDD Supply voltage range 5 V
Vi Voltage on any pin –0.3 VDD + 0.3 V
IA Input current on any INx pin –8 8 mA
ID Input current on any digital pin –5 5 mA
TJ Junction temperature –55 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in
very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables
under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond which
the device may be permanently degraded, either mechanically or electrically.
(2) Register values are represented as either binary (b is the prefix to the digits), or hexadecimal (0x is the prefix to the digits). Decimal
values have no prefix.
(3) Limits are ensured by testing, design, or statistical analysis at 25°C. Limits over the operating temperature range are ensured through
correlations using statistical quality control (SQC) method.
(4) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(5) I2C read/write communication and pull-up resistors current through SCL, SDA not included.
(6) Sensor capacitor: 1 layer, 20.9 x 13.9 mm, Bourns CMH322522-180KL sensor inductor with L=18µH and 33pF 1% COG/NP0 Target:
Grounded aluminum plate (176 x 123 mm), Channel = Channel 0 (continuous mode) CLKIN = 40 MHz, CHx_FIN_SEL = b10,
CHx_FREF_DIVIDER = b00 0000 0001 CH0_RCOUNT = 0xFFFF, SETTLECOUNT_CH0 = 0x0100, DRIVE_CURRENT_CH0 = 0x7800.
(7) Lower VSENSORMIN oscillation amplitudes can be used, but will result in lower SNR.
6 Copyright © 2015, Texas Instruments Incorporated
FDC2212, FDC2214, FDC2112, FDC2114
www.ti.com.cn ZHCSDX2A – JUNE 2015 – REVISED JUNE 2015
(1) This parameter is specified by design and/or characterization and is not tested in production.
SDA
tBUF
tf tLOW tHD;STA tr
tr tf tSP
SCL
tHD;STA tSU;STA tSU;STO
tHIGH
tHD;DAT tSU;DAT
3.25 3.25
VDD = 2.7 V
3.225 VDD = 3 V
VDD = 3.3 V
3.2 VDD = 3.6 V 3.2
IDD CH0 Current (mA)
3.15 3.15
3.125
Figure 2. Active Mode IDD vs. Temperature Figure 3. Active Mode IDD vs. VDD
60 65
VDD = 2.7 V -40°C 0°C 50°C 100°C
55 VDD = 3 V 60 -20°C 25°C 85°C 125°C
VDD = 3.3 V
VDD = 3.6 V 55
50
Sleep Current (µA)
50
45
45
40
40
35
35
30 30
25 25
-40 -20 0 20 40 60 80 100 120 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6
Temperature (°C) D005
VDD (V) D006
–40°C to +125°C
Figure 4. Sleep Mode IDD vs. Temperature Figure 5. Sleep Mode IDD vs. VDD
1.4 1.6
VDD = 2.7 V -40°C 0°C 50°C 100°C
1.2 VDD = 3 V 1.4 -20°C 25°C 85°C 125°C
VDD = 3.3 V
VDD = 3.6 V 1.2
Shutdown Current (µA)
1
1
0.8
0.8
0.6
0.6
0.4
0.4
0.2 0.2
0 0
-40 -20 0 20 40 60 80 100 120 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6
Temperature (°C) D007
VDD (V) D008
–40°C to +125°C
Figure 6. Shutdown Mode IDD vs. Temperature Figure 7. Shutdown Mode IDD vs. VDD
43.38
43.38
43.37
43.37
43.36
43.36
43.35
43.35
43.34
43.34
43.33 43.33
43.32 43.32
-40 -20 0 20 40 60 80 100 120 2.7 2.8 2.9 3 3.1 3.2 3.3 3.4 3.5 3.6
Temperature (°C) D009
VDD (V) D010
–40°C to +125°C Data based on 1 unit
Figure 8. Internal Oscillator Frequency vs. Temperature Figure 9. Internal Oscillator Frequency vs. VDD
9 Detailed Description
9.1 Overview
The FDC2112, FDC2114, FDC2212, and FDC2214 are high-resolution, multichannel capacitance-to-digital
converters for implementing capacitive sensing solutions. In contrast to traditional switched-capacitance
architectures, the FDC2112, FDC2114, FDC2212, and FDC2214 employ an L-C resonator, also known as L-C
tank, as a sensor. The narrow-band architecture allows unprecedented EMI immunity and greatly reduced noise
floor when compared to other capacitive sensing solutions.
Using this approach, a change in capacitance of the L-C tank can be observed as a shift in the resonant
frequency. Using this principle, the FDC is a capacitance-to-digital converter (FDC) that measures the oscillation
frequency of an LC resonator. The device outputs a digital value that is proportional to frequency. This frequency
measurement can be converted to an equivalent capacitance
3.3 V
3.3 V
CLKIN VDD
40 MHz
0.1 F 1 F
Int. Osc. GND
IN0A
Resonant SD
GPIO
L C IN0B circuit driver INTB
GPIO MCU
Cap 3.3 V
Sensor 0 Core GND
IN1A ADDR
Resonant 2 SDA I 2C
IC
L C IN1B circuit driver SCL peripheral
Cap
Sensor 1
Copyright © 2016, Texas Instruments Incorporated
3.3 V
3.3 V
CLKIN VDD
40 MHz
0.1 F 1 F
Int. Osc. GND
IN0A
Resonant SD
GPIO
L C IN0B circuit driver INTB
GPIO MCU
Cap 3.3 V
Sensor 0 Core GND
IN3A ADDR
Resonant 2 SDA I 2C
IC
L C IN3B circuit driver SCL peripheral
Cap
Sensor 3
Copyright © 2016, Texas Instruments Incorporated
The FDC is composed of front-end resonant circuit drivers, followed by a multiplexer that sequences through the
active channels, connecting them to the core that measures and digitizes the sensor frequency (fSENSOR). The
core uses a reference frequency (fREF) to measure the sensor frequency. fREF is derived from either an internal
reference clock (oscillator), or an externally supplied clock. The digitized output for each channel is proportional
to the ratio of fSENSOR/fREF. The I2C interface is used to support device configuration and to transmit the digitized
frequency values to a host processor. The FDC can be placed in shutdown mode, saving current, using the SD
pin. The INTB pin may be configured to notify the host of changes in system status.
IN0A
Cap L
÷m tfIN0t
Sensor 0 fSENSOR0 IN0B
CH0_FIN_SEL (0x14)
IN1A
Cap L
÷m tfIN1t
Sensor 1 fSENSOR1 IN1B
CH1_FIN_SEL (0x15) tfINt
IN2A(1)
Cap L ÷m tfIN2(1)t
Sensor 2(1) fSENSOR2(1) (1)
IN2B
CH2_FIN_SEL (0x16)(1)
IN3A(1)
Cap L
÷m tfIN3(1)t
Sensor 3(1) fSENSOR3(1) (1) CONFIG (0x1A)
IN3B
CH3_FIN_SEL (0x17)(1) MUX_CONFIG
Core
(0x1B)
÷n tfREF0t
CH0_FREF_DIVIDER (0x14)
REF_CLK_SRC
(0x1A) ÷n tfREF1t
fCLKIN CLKIN
CONFIG (0x1A)
CH3_FREF_DIVIDER (0x17)(1) MUX_CONFIG
(0x1B)
In Figure 12, the key clocks are fIN, fREF, and fCLK. fCLK is selected from either the internal clock source or external
clock source (CLKIN) . The frequency measurement reference clock, fREF, is derived from the fCLK source. It is
recommended that precision applications use an external master clock that offers the stability and accuracy
requirements needed for the application. The internal oscillator may be used in applications that require low cost
and do not require high precision. The fINx clock is derived from sensor frequency for a channel x, fSENSORx. fREFx
and fINx must meet the requirements listed in Table 1, depending on whether fCLK (master clock) is the internal or
external clock.
(1) Channels 2 and 3 are only available for FDC2114 and FDC2214.
(2) Refer to Sensor Configuration for information on differential and single-ended sensor configurations.
(1) Channels 2 and 3 are only available for FDC2114 and FDC2214
The digitized sensor measurement for each channel (DATAx) represents the ratio of the sensor frequency to the
reference frequency.
The data output (DATAx) of the FDC2112 and FDC2114 is expressed as the 12 MSBs of a 16-bit result:
12
¦SENSORx
DATA x
¦REFx (1)
The data output (DATAx) of the FDC2212 and FDC2214 is expressed as:
28
¦SENSORx
DATA x
¦REFx (2)
Table 4 illustrates the registers that contain the fixed point sample values for each channel.
(1) Channels 2 and 3 are only available for FDC2114 and FDC2214.
(2) The DATA_CHx.DATAx register must always be read first, followed by the DATA_LSB_ CHx.DATAx register of the same channel to
ensure data coherency.
(3) A DATA value of 0x0000000 = under range for FDC2212/FDC2214.
(4) A DATA value of 0xFFFFFFF = over range for FDC2212/FDC2214.
Copyright © 2015, Texas Instruments Incorporated 15
FDC2212, FDC2214, FDC2112, FDC2114
ZHCSDX2A – JUNE 2015 – REVISED JUNE 2015 www.ti.com.cn
When the FDC sequences through the channels in multi-channel mode, the dwell time interval for each channel
is the sum of three parts:
1. sensor activation time
2. conversion time
3. channel switch delay
The sensor activation time is the amount of settling time required for the sensor oscillation to stabilize, as shown
in Figure 13. The settling wait time is programmable and should be set to a value that is long enough to allow
stable oscillation. The settling wait time for channel x is given by:
tSx = (CHX_SETTLECOUNTˣ16)/fREFx (3)
Table 5 illustrates the registers and values for configuring the settling time for each channel.
Channel 0 Channel 0 Channel Channel 1 Channel 1 Channel Channel 0
Sensor Conversion switch delay Sensor Conversion switch delay Sensor
Activation Activation Activation
Channel 0
Channel 1
Active Channel
Sensor Signal
(1) Channels 2 and 3 are available only in the FDC2114 and FDC2214.
(2) fREFx is the reference frequency configured for the channel.
(1) Channels 2 and 3 are available only for FDC2114 and FDC2214.
The typical channel switch delay time between the end of conversion and the beginning of sensor activation of
the subsequent channel is:
Channel Switch Delay = 692 ns + 5 / fref (6)
The deterministic conversion time of the FDC allows data polling at a fixed interval. For example, if the
programmed RCOUNT setting is 512 FREF cycles and SETTLECOUNT is 128 FREF cycles, then one conversion
takes 1.8ms (sensor-activation time) + 3.2ms (conversion time) + 0.75ms (channel-switch delay) = 16.75ms per
channel. If the FDC is configured for dual-channel operation by setting AUTOSCAN_EN = 1 and
RR_SEQUENCE = 00, then one full set of conversion results will be available from the data registers every
33.5ms.
A data ready flag (DRDY) is also available for interrupt driven system designs (see the STATUS register
description in Register Maps).
MSB LSB
Conversion result 15 12 11 8 7 4 3 0
Output_gain = 0x3 11 0
Output_gain = 0x2 11 0
Output_gain = 0x1 11 0
Output_gain = 0x0
(default) 11 0
For systems in which the sensor signal variation is less than 25% of the full-scale range, the FDC can report
conversion results with higher resolution by setting the Output Gain. The Output Gain is applied to all device
channels. An output gain can be used to apply a 2-bit, 3-bit, or 4-bit shift to the output code for all channels,
allowing access to the 4 LSBs of the original 16-bit result. The MSBs of the sample are shifted out when a gain is
applied. Do not use the output gain if the MSBs of any active channel are toggling, as the MSBs for that channel
will be lost when gain is applied.
Example: If the conversion result for a channel is 0x07A3, with OUTPUT_GAIN=0x0, the reported output code is
0x07A. If OUTPUT_GAIN is set to 0x3 in the same condition, then the reported output code is 0x7A3. The
original 4 MSBs (0x0) are no longer accessible.
An offset value may be subtracted from each DATA value to compensate for a frequency offset or maximize the
dynamic range of the sample data. The offset values should be < fSENSORx_MIN / fREFx. Otherwise, the offset might
be so large that it masks the LSBs which are changing.
(1) Channels 2 and 3 are only available for FDC2114 and FDC2214.
The sensor capacitance CSENSE of a differential sensor configuration can be determined by:
1
CSENSOR C
L (2S ¦SENSORx 2
where
• C = parallel sensor capacitance (see Figure 55) (7)
The FDC2112 and FDC2114 sensor frequency fSENSORx can be determined by:
§ DATAx CHxOFFSET ·
¦SENSORx CHx_FIN_SEL ¦REFx ¨ (12 OUTPUT_GAIN) ¸
©2 216 ¹
where
• DATAx = Conversion result from the DATA_CHx register
• CHx_OFFSET = Offset value set in the OFFSET_CHx register
• OUTPUT_GAIN = output multiplication factor set in the RESET_DEVICE.OUTPUT_GAIN register (8)
The FDC2212 and FDC2214 sensor frequency fSENSORx can be determined by:
CHx_FIN_SEL ¦REFx '$7$x
¦SENSORx
228 (FDC2212, FDC2214)
where
• DATAx = Conversion result from the DATA_CHx register (9)
(1) Channels 2 and 3 are available for FDC2114 and FDC2214 only.
Copyright © 2015, Texas Instruments Incorporated 19
FDC2212, FDC2214, FDC2112, FDC2114
ZHCSDX2A – JUNE 2015 – REVISED JUNE 2015 www.ti.com.cn
The CHx_IDRIVE field should be programmed such that the sensor oscillates at an amplitude between 1.2Vpk
(VSENSORMIN) and 1.8Vpk (VSENSORMAX). An IDRIVE value of 00000 corresponds to 16 µA, and IDRIVE = b11111
corresponds to 1563 µA.
A high sensor current drive mode can be enabled to drive sensor coils with > 1.5mA on channel 0, only in single
channel mode. This feature can be used when the sensor minimum recommended oscillation amplitude of 1.2V
cannot be achieved with the highest IDRIVE setting. Set the HIGH_CURRENT_DRV register bit to b1 to enable
this mode.
(1) Channels 2 and 3 are available for FDC2114 and FDC2114 only.
See the STATUS and STATUS_CONFIG register description in the Register Map section. These registers can
be configured to trigger an interrupt on the INTB pin for certain events. The following conditions must be met:
1. The error or status register must be unmasked by enabling the appropriate register bit in the
STATUS_CONFIG register
2. The INTB function must be enabled by setting CONFIG.INTB_DIS to 0
When a bit field in the STATUS register is set, the entire STATUS register content is held until read or until the
DATA_CHx register is read. Reading also de-asserts INTB.
Interrupts are cleared by one of the following events:
1. Entering Sleep Mode
2. Power-on reset (POR)
3. Device enters Shutdown Mode (SD is asserted)
4. S/W reset
5. I2C read of the STATUS register: Reading the STATUS register will clear any error status bit set in STATUS
along with the ERR_CHAN field and de-assert INTB
Setting register CONFIG.INTB_DIS to b1 disables the INTB function and holds the INTB pin high.
9.4.4.1 Reset
The FDC can be reset by writing to RESET_DEV.RESET_DEV. Conversion will stop and all register values will
return to their default value. This register bit will always return 0b when read.
9.5 Programming
The FDC device uses an I2C interface to access control and data registers.
Programming (continued)
1 9 1 9
SCL
SDA A6 A5 A4 A3 A2 A1 A0 R/W R7 R6 R5 R4 R3 R2 R1 R0
Start by Ack by Ack by
Master Slave Slave
Frame 1 Frame 2
Serial Bus Address Byte Slave Register
from Master Address
1 9 1 9
SCL
1 9 1 9
SCL
SDA A6 A5 A4 A3 A2 A1 A0 R/W R7 R6 R5 R4 R3 R2 R1 R0
Start by Ack by Ack by
Master Slave Slave
Frame 1 Frame 2
Serial Bus Address Byte Slave Register
from Master Address
1 9 1 9 1 9
SCL
7 6 5 4 3 2 1 0
DATA0
7 6 5 4 3 2 1 0
DATA0
7 6 5 4 3 2 1 0
DATA1
7 6 5 4 3 2 1 0
DATA1
7 6 5 4 3 2 1 0
DATA2
7 6 5 4 3 2 1 0
DATA2
7 6 5 4 3 2 1 0
DATA3
7 6 5 4 3 2 1 0
DATA3
7 6 5 4 3 2 1 0
CH0_RCOUNT
7 6 5 4 3 2 1 0
CH1_RCOUNT
7 6 5 4 3 2 1 0
CH2_RCOUNT
7 6 5 4 3 2 1 0
CH3_RCOUNT
7 6 5 4 3 2 1 0
CH0_OFFSET
7 6 5 4 3 2 1 0
CH1_OFFSET
7 6 5 4 3 2 1 0
CH2_OFFSET
7 6 5 4 3 2 1 0
CH3_OFFSET
7 6 5 4 3 2 1 0
CH0_SETTLECOUNT
7 6 5 4 3 2 1 0
CH1_SETTLECOUNT
7 6 5 4 3 2 1 0
CH2_SETTLECOUNT
7 6 5 4 3 2 1 0
CH3_SETTLECOUNT
7 6 5 4 3 2 1 0
CH0_FREF_DIVIDER
7 6 5 4 3 2 1 0
CH1_FREF_DIVIDER
7 6 5 4 3 2 1 0
CH2_FREF_DIVIDER
7 6 5 4 3 2 1 0
CH3_FREF_DIVIDER
7 6 5 4 3 2 1 0
RESERVED DRDY RESERVED CH0_UNREA CH1_ CH2_ CH3_
DCONV UNREADCONV UNREADCONV UNREADCONV
7 6 5 4 3 2 1 0
RESERVED WD_ERR2INT RESERVED DRDY_2INT
7 6 5 4 3 2 1 0
7 6 5 4 3 2 1 0
RESERVED DEGLITCH
7 6 5 4 3 2 1 0
RESERVED
7 6 5 4 3 2 1 0
RESERVED
7 6 5 4 3 2 1 0
RESERVED
7 6 5 4 3 2 1 0
RESERVED
7 6 5 4 3 2 1 0
RESERVED
7 6 5 4 3 2 1 0
MANUFACTURER_ID
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
IN0A
L C
18 H 33 pF
IN0B
In the differential sensor configuration in Figure 55, one conductive plate is connected to IN0A, and a second
conductive plate is connected to IN0B. Together, they form a variable capacitor. When using an single-ended
sensor configuration, set CHx_FIN_SEL to b10 (divide by 2).
Target object
IN0A
L C
18 H 33 pF
IN0B
The single-ended configuration allows higher sensing range than the differential configuration for a given total
sensor plate area. In applications in which high sensitivity at close proximity is desired, the differential
configuration performs better than the single-ended configuration.
10.1.2 Shield
in order to minimize interference from external objects, some applications require an additional plate which acts
as a shield. The shield can either be:
• actively driven shield: The shield is a buffered signal of the INxA pin. The signal is buffered by an external
amplifier with a gain of 1.
FDC2114 / FDC2214
VDD
CLKIN VDD
40 MHz 0.1 F 1 F
Int. Osc. GND
IN0A
LEVEL Resonant SD
GPIO
SENSOR L C IN0B circuit driver INTB
ENVIRONMENTAL
SENSOR
GPIO MCU
Cap 3.3 V
Sensor 0 Core GND
IN1A ADDR
Resonant SDA I 2C
LIQUID I 2C
L C IN1B circuit driver SCL peripheral
SENSOR
Cap
Sensor 1
IN2A
Resonant
L C IN2B circuit driver
Cap
Sensor 2
IN3A
Resonant
IN3B circuit driver
4.7
4.65
4.6
4.55
4.5
Level (pF)
4.45
4.4
4.35
4.3
4.25
4.2
4.15
4.1
10 15 20 25 30 35 40
Level (mm) D031
175.0
150.0
125.0
Ls (µH)
100.0
75.0
50.0
25.0
0.0
0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
Frequency (MHz)
The example inductor in Figure 58, has a SRF at 6.38 MHz; therefore the inductor should not be operated above
0.8×6.38 MHz, or 5.1 MHz.
25 0.14
0.12
20
0.1
Capacitance (pF)
Capacitance (pF)
15
0.08
0.06
10
0.04
5
0.02
0 0
0 2 4 6 8 10 12 14 16 18 20 20 22 24 26 28 30 32 34 36 38 40
Target Distance (mm) with 20.9 x 13.9 mm Sensor D028
Target Distance (mm) with 20.9 x 13.9 mm Sensor D029
Figure 59. FDC2212 / FDC2214: Capacitance vs. Target Figure 60. FDC2112 / FDC2114: Capacitance vs. Target
Distance (0 to 20mm) Distance (20 to 40mm)
0.035 10
4.08 ksps
9 610 sps
0.03
Measurement Precision (mm)
8 38 sps
0.025 7
Capacitance (pF)
6
0.02
5
0.015
4
0.01 3
2
0.005
1
0 0
40 42 44 46 48 50 52 54 56 58 60 0 20 40 60 80 100
Target Distance (mm) with 20.9 x 13.9 mm Sensor D030
Target Distance (mm) with 20.9 x 13.9 mm Sensor D032
Figure 61. FDC2212 / FDC2214: Capacitance vs. Target Figure 62. Measurement precision in Distance vs. Target
Distance (40 to 60mm) Distance (0 to 60mm)
Greater current savings can be realized by use of shutdown mode during inactive periods. In shutdown mode,
device configuration is not retained, and so the device must be configured for each sample. For this example,
configuring each sample takes approximately 1.2 ms (13 registers * 92.5 µs per register). The total active time is
20.6 ms. The average current is 20 ms * 3.6 mA active current + 980 ms * 2 µA of shutdown current, which is
approximately 75 µA of average supply current.
12 Layout
13 器件和文档支持
13.1 器件支持
13.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
13.2 相关链接
表 48 列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件,以及样片或购买的快速访问。
表 48. 相关链接
器件 产品文件夹 样片与购买 技术文档 工具与软件 支持与社区
FDC2212 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
FDC2214 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
FDC2112 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
FDC2114 请单击此处 请单击此处 请单击此处 请单击此处 请单击此处
13.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
13.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
13.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。
www.ti.com 26-Jun-2016
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)
FDC2112DNTR ACTIVE WSON DNT 12 4500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2112
& no Sb/Br)
FDC2112DNTT ACTIVE WSON DNT 12 250 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2112
& no Sb/Br)
FDC2112QDNTRQ1 ACTIVE WSON DNT 12 4500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FDC2112
& no Sb/Br) Q1
FDC2112QDNTTQ1 ACTIVE WSON DNT 12 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FDC2112
& no Sb/Br) Q1
FDC2114QRGHRQ1 ACTIVE WQFN RGH 16 4500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FC2114Q
& no Sb/Br)
FDC2114QRGHTQ1 ACTIVE WQFN RGH 16 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FC2114Q
& no Sb/Br)
FDC2114RGHR ACTIVE WQFN RGH 16 4500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2114
& no Sb/Br)
FDC2114RGHT ACTIVE WQFN RGH 16 250 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2114
& no Sb/Br)
FDC2212DNTR ACTIVE WSON DNT 12 4500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2212
& no Sb/Br)
FDC2212DNTT ACTIVE WSON DNT 12 250 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2212
& no Sb/Br)
FDC2212QDNTRQ1 ACTIVE WSON DNT 12 4500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FDC2212
& no Sb/Br) Q1
FDC2212QDNTTQ1 ACTIVE WSON DNT 12 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FDC2212
& no Sb/Br) Q1
FDC2214QRGHRQ1 ACTIVE WQFN RGH 16 4500 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FC2214Q
& no Sb/Br)
FDC2214QRGHTQ1 ACTIVE WQFN RGH 16 250 Green (RoHS CU SN Level-3-260C-168 HR -40 to 125 FC2214Q
& no Sb/Br)
FDC2214RGHR ACTIVE WQFN RGH 16 4500 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2214
& no Sb/Br)
FDC2214RGHT ACTIVE WQFN RGH 16 250 Green (RoHS CU SN Level-1-260C-UNLIM -40 to 125 FDC2214
& no Sb/Br)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 26-Jun-2016
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Sep-2016
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 20-Sep-2016
Pack Materials-Page 2
PACKAGE OUTLINE
RGH0016A SCALE 3.000
WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
4.1 A
B
3.9
0.5
0.3
DETAIL
OPTIONAL TERMINAL
TYPICAL
DIM A
OPT 1 OPT 1
(0.1) (0.2)
C
0.8 MAX
SEATING PLANE
0.05
0.00
0.08
4X 17 SYMM
1.5
1
12
0.3
16X
0.2
0.1 C A B
PIN 1 ID 16 13 0.05
SYMM
(OPTIONAL)
0.5
16X
0.3
4214978/B 01/2017
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RGH0016A WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
( 2.6)
SYMM
16 13
16X (0.6)
(R0.05)
1 TYP
12
16X (0.25)
17 SYMM
(3.8)
(1)
9
4
12X (0.5)
( 0.2) TYP
VIA
5 8
(1)
(3.8)
SOLDER MASK
METAL OPENING
EXPOSED METAL EXPOSED METAL
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
RGH0016A WQFN - 0.8 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
4X ( 1.15)
(0.675) TYP
16 13
17
16X (0.6)
1
(0.675)
12 TYP
16X (0.25)
SYMM
(3.8)
12X (0.5)
9
4
EXPOSED METAL
TYP
5 8
(R0.05) SYMM
TYP
(3.8)
EXPOSED PAD 17
78% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:20X
4214978/B 01/2017
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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MECHANICAL DATA
DNT0012B WSON - 0.8mm max height
SON (PLASTIC SMALL OUTLINE - NO LEAD)
SDA12B (Rev A)
4214928/A 03/2013
NOTES: 1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is designed to be soldered to a thermal pad on the board for thermal and mechanical performance.
For more information, refer to QFN/SON PCB application note in literature No. SLUA271 (www.ti.com/lit/slua271).
www.ti.com
IMPORTANT NOTICE
重要声明