You are on page 1of 49

5 4 3 2 1

SIT Change List


SIT-0427-01 15 change Q39 PIN Connect,Unmount R125 change Q39 PIN Connect for SATA Led always light issue ,Unmount R125
SIT-0420-01 37 change JP8 PIN define meet new type FAN
SIT-0504-01 33 change Q40 PIN Connect change Q40 PIN Connect for Wlan Led always light issue
SIT-0505-01 34/35 Mount R47/Unmount R341 for flash screen issue in discrete board
SIT-0510-01 36 ADD Q42/Mount R192 ,DEL R719 Support PCIE Wake up function
SIT-0510-01 16 Change USB30_SMI#_PCH from PCH GPIO24 to GPIO 13 GPIO 24 no USB30_SMI#_PCH Function

SIT-0511-01 30 add D21/D22 ADD D21/D22 FOR Current leakage


SIT-0511-01 33 add R724/R725/R726/Q45;Del C273/R361 Meet HDMI SPEC
D D

SIT-0511-01 33 add R727 /Reserve Q44/Q43/R652 Meet VOL Command:reserve wlan wake up function
SIT-0511-01 7 un mount C4 H_PWRGD Rise time over SPEC

SIT-0512-01 33 DEL F2/F3/C262/C250/Q6/Q8/R365/R364/R354/R353 Cancel PCH Detect USB OC PIN/FUSE ADD Back IO BOARD
SIT-0512-01 del sense 电电 PR111/PR112/PR133/PR156/PR170/PR171/PR198/PR222/PR241/PR181 C-Stage power sense 电电 DEL
SIT-0512-01 42 PC82 Change to CC73301MZ00; Reserve PC254 Power concern
SIT-0512-01 16/12/15/21/20 ADD C273/C711/D25/D27/D28/C709, Reserve D24/D26 For ESD

SIT-0516-01 36 Q30 change to DTC144U for current leakage issue under S4/S5

SIT-0516-01 34 D18 Connect to EC_PWRGD


SIT-0516-01 29 Un-stuff AR76,AR77,AR78,AR79 vendor suggest
SIT-0516-01 29 AC47/AC52 Change to 100uF DIP cap vendor suggest
SIT-0516-01 37/16 Add RN5/RN6/R353/R354 for LPC OVER/Under SHOOT
SIT-0516-01 29 ADD AR80 vendor suggest
SIT-0516-01 29 DEL AR70/AR75
vendor suggest
SIT-0516-01 29 AC48/AC50 Change to 0欧欧 vendor suggest
SIT-0516-01 29 del AR71/AR72/AR73/AR74/AR76/AR77/AR78/AR79 vendor suggest
SIT-0516-01 29 DEL AR64/AR65 vendor suggest
SIT-0516-01 29 AC43/AC44 Change to 0欧欧/0603 vendor suggest
SIT-0517-01 36 ADD D29 for ESD
SIT-0517-01 36 DEL R653/R654/R656/Q32 Cancel USB OC Detect function

C SIT-0518-01 38/42 PR44 Unmount,Mount PR48,reserve PR170/PQ45 for ACPI SMDDR_VTERM fail C

SIT-0518-01 36 Reserve C250/C262/FB6 for USB3.0 Device lost issue,change to 1.05V_S3


SIT-0518-01 41 ADD PQ46/PR181/PR171/PQ76/PR251 For 1.05V_S3 Discharge
SIT-0518-01 41 ADD PR133/PC255/PC253/PC260/PR131/PR132/PC259/PC257/PC258/PU15,reserve PC256 ADD 1.05V_S3 Power for USB3.0 Device lost issue
SIT-0518-01 38 Reserve PR284/PQ77 预预 12V_HDD Discharge
SIT-0518-01 16 reserve R361 STP_PCI_N Reserve PU/PD resistance for VERB Table control(TV/PC mode)
SIT-0519-01 20 ADD C712/D30/D32 For ESD
SIT-0519-01 36 U31 power PIN3/7/8 Change to USB30_+3.3VAUX For Vendor suggest
SIT-0611-01 Stuff L1/L2/L11
Stuff L5/AC39/AC40/AC41/AC42
Stuff C113 For EMI
Stuff C91/C284/C237/C206
Stuff R399/R400/R401/R402
Stuff R83/R109 Change to 22欧欧,stuf C573/C563/PC153/PC95/PC9
Reserve R206/R212
SIT-0611-01 40 PR35 Change to 24.9K Power concern
SIT-0611-01 39 PL10/PL13 Change to CV-2275MZ00 Power concern
SIT-0611-01 40 PC143 Change to 680p Power concern
For Wlan 1.5V Power
SIT-0611-01 33 Stuf C574/C581
SIT-0611-01 39 PR227 Change to 150k/PR232 Change to 180k Power concern
SIT-0611-01 44 PR137 Change to 3.57k Power concern
SIT-0611-01 36 U10/U26 Change to BC101504Z00 For ESD
SIT-0611-01 40 Reseve PC60 Power concern

B
schematic Match BOM B

After SIT Change List

SIT-0603-01 30 add F11/F12/F13 (DK300WFU000) For safty


SIT-0603-01 41 Remove PQ64/PQ65 Power concern
SIT-0607-01 41 PQ37/PQ38 Change to BAM49260000 Power concern
SIT-0607-01 23 NO Stuff R198 for leakage current

SIT-0611-01 14 Del C709 For system hang up issue


SIT-0613-01 14/12 D24/D26 Reserve

SIT-0613-01 30 JP61 footprint change to sata-ld1107f-s33t5-7p-r follow SMT Requirement

SIT-0613-01 38 PR284 footprint from RC1206 to RC2512 Power concern

A A
SIT-0704-01 33 Mount Q43/R652 Support Wlan wake up function

5 4
www.vinafix.vn 3 2 1
5 4 3 2 1

QUA Block Diagram w/ HWTV


w/ UMA

SANDY BRIDGE Max to 8GB BOM


Channel A DDR3 S0-DIMM Control/Value
800/1066/1333MHz Socket 1 PG11
PROCESSOR DIS w/ DIS_TV@_
CPU VCore
Channel B DDR3 SO-DIMM TV TV@_
D
64-bit/32nm 800/1066/1333MHz Socket 2
UMA w/ TV UMA_TV@_ D

PG33 PG11
LGA1155 DIS w/o DIS@_
TV w/o TV PC@_
65W UMA UMA@_
PG[5..10] VRAM DDR3
512MB (64M*16b*4)

FDI x4

DMI Gen2 x4
<Sean0327> Modify

GPU
LVDS
PEG X16 Caspian M2
<20W

HDMI

RGB
UMA/DIS
SATA 0 SATA I/II Option 20" 16:9 Panel
SATA HDD(DT) SATA * 4 eDP to LVDS
PG29 Converter LVDS LVDS CONN 1600*900 Pixel
eDP
SATA ODD SATA 1 RTD2136S
C PG29 C

PG24
UMA/DIS
Multi TOUCH
USBP9 USB I/F USB *10 Option
PG27 HDMI Level
USBP8 shifter
CAREMA PG27
Cougar Point HW TV
(6.1W) UMA/DIS Scalar Board
Side USB * 1
USBP4/5 LVDS CONN
FCBGA Option
PG25 RGB

PCH TV Tuner Board


HD AUDIO (H61) RTD2673S DDR

HDMI
HWTV(HP
Audio Switch AMP)
HP
out TS5A23157
AUDIO CODEC
MIC ALC-272 IO
PG22
IN
PC BEEP
B
Support USB Port*4 HDMI DC IN GB LAN B

PG24
S5_Speaker USBP0/1/2/3 RTL8111E

USB
Audio Switch
PCIE * 6 PCIE I/F
TS5A23157

HWTV(Audio Out) Mini PCIE Mini PCIE USB3.0 CARD READER


WLAN PG28 TV PG28 VL801 RTS5209

Audio Switch PG[12..20]

TS5A23157
B-CAS USB3.0 CNN 3IN1 Card
CONN

Option Option
LPC SPI FLASH for Japan TV Model)
Amplifier ROM
R/L Header PG18
ALC107
3Wx2 Speaker

EC/KBC
A ITE8519 A

PG26
LQFP128

FLASH CIR
ROM FAN CTRL LED/PWR HotKey
Option
PG18 PG18 CPU X 1
LED BOARD Switch Button
PG26
Quanta Computer Inc.

www.vinafix.vn
PROJECT : QUA
Size Document Number Rev
1A
Block Diagram
Date: Monday, July 04, 2011 Sheet 1 of 48
5 4 3 2 1
5 4 3 2 1

CPU_CORE
VIN 65A CPU_AXG
35A

Adaptor DC-DC CPU_CORE


NCP6131 3+1phases
D D

1.05V_VCCIO 0.925V_VCCSA
17.4A
DC-DC VCCIO LDO VCCSA 8.8A
RT8240B LM358A
VGA_CORE
11A

DC-DC VGA_CORE
ISL62881HRTZ-T
12V_HDD
0.78A 8V_CORE
DC-DC VCC12
NCP1587 APL1117UC
1.5V_S3 1.5V 1.5V_VGA
C C
14A 4A
1A
SI4128
DC-DC DDR 1.5V
VREF_DDR
RT8207A
SMDDR_VTERM

1.05V
3V_AUX 3V_S5
8A 8.3A
0.1A LDO VCC1.05
SI4128
LM358A 1V_VGA
3V_S3 1A
LDO 1.05V
5V_AUX SI4128 APL5920

8.7A 3.3V
SI4129 4A
DC-DC 3V / 5V
B
1.8V 1.8V_VGA B

RT8223 VREG3 LDO 1.8V


2A 0.5A
LM358A

EC

5V_AMP 5V_TV
3.2A 2A

5V_S5
0.001A
SI4128
A
5V_S3 A

3.6A
SI4128

5V
3.4A
SI4128 Quanta Computer Inc.
PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
Power Map
Date: Monday, July 04, 2011 Sheet 2 of 48
5 4 3 2 1
8 7 6 5 4 3 2 1

Battery VCC_RTC >9ms

Battery RTCRST
3
Adapter VIN QUA Power sequence
DC/DC VREG3

D
PowerKey FP_PWRBTN# /SENSE_MIC_IN#/HWTV_PWR_ON# D

EC 3V5V_ON

DC/DC 3V_AUX/5V_AUX/5V_AMP/5V_TV

10ms
EC AVDD_ON/S5ON

DC/DC AVDD TV MODE

DC/DC 3V_S5/5V_S5 PC MODE

Voltage Rails
TV HWTV_PWRGD
Ctl Signal
>15ms
Power Voltage S0 S3 S4 S5 G3 TV mode
EC RSMRST# Battery IN
=20ms VCCRTC 3.3V ON ON ON ON ON
EC EC_PWRBTN_OUT# VIN 19V ON ON ON ON OFF ON Adaptor IN

VREG3 3.3V ON ON ON ON OFF ON VIN


PCH SLP_S4# 5V_AUX 5V 3V5V_ON
>30us ON ON OFF OFF OFF ON
3V_AUX 3.3V ON ON OFF OFF OFF ON 3V5V_ON
PCH SLP_S3#
5V_AMP 5V ON ON OFF OFF OFF ON 5V_AUX
C
EC S3_ON 5V_TV 5V ON ON OFF OFF OFF ON 5V_AMP
C

5V_S5 5V ON ON OFF OFF OFF OFF S5_ON


DC/DC 5V_S3/3V_S3/1.5V_S3 3V_S5 3.3V S5_ON
ON ON OFF OFF OFF OFF
S0_ON1 20ms 5V_S3 5V ON ON OFF OFF OFF OFF S3_ON
EC
3V_S3 3.3V ON ON OFF OFF OFF OFF S3_ON
12V_HDD/8V_CORE/5V/3.3V
DC/DC 12V_HDD 12V S0_ON1
ON OFF OFF OFF OFF OFF
S0_ON2 20ms
EC 5V 5V ON OFF OFF OFF OFF OFF S0_ON1

3.3V 3.3V ON OFF OFF OFF OFF OFF S0_ON1


DC/DC 1.8V/1.5V/1.05V_VCCIO/1.05V/1V_VGA/0.925V_VCCSA/SMDDR_VTERM
1.8V 1.8V ON OFF OFF OFF OFF OFF S0_ON2
1.5V
USB3 USB30_+3.3VAUX 1.5V ON OFF OFF OFF OFF OFF S0_ON2

1.05V 1.05V ON OFF OFF OFF OFF OFF S0_ON2


USB3 USB30_3.3V
5-20ms 1.05V_VCCIO 1.05V ON OFF OFF OFF OFF OFF S0_ON2
USB3 USB30_1VE/USB30_1VL SMDDR_VTERM 0.75V S0_ON2
ON OFF OFF OFF OFF OFF
50-450ms
PLTRST_PCIE_N_USB 1V_VGA 1V ON OFF OFF OFF OFF OFF S0_ON2
USB3
8V_CORE 8V ON OFF OFF OFF OFF OFF 12V_HDD

3V_VGA Ramp <20ms VGA_CORE 0.8V- 1.15V ON OFF OFF OFF OFF OFF VGA_ON
GPU
1.8V_VGA 1.8V ON OFF OFF OFF OFF OFF 1.8V

EC VGA_ON <10ms 1.5V_VGA 1.5V ON OFF OFF OFF OFF OFF 1.5V

B 0.95V_VCCSA 0.95V VR_PVCCUSA_SEL B


ON OFF OFF OFF OFF OFF
DC/DC VGA_CORE CPU_CORE by SVID ON OFF OFF OFF OFF OFF VR_ON

CPU_AXG by SVID ON OFF OFF OFF OFF OFF VR_ON


DC/DC 1.8V_VGA/1.5V_VGA

DC/DC HWPG

EC VRON(/DRON) >99ms

DC/DC CPU_CORE/CPU_AXG

DC/DC IMVP_PWRGD

EC EC_PWROK
=10ms
Logic PCH_SYSPWROK/PCH_PWRGD
>10ms
PCH PWRGD_DRAM

PCH H_PWRGD

PCH SUS_STAT#
>1ms
A PCH PLTRST# A

>210us
PCH DMI
>30us

Quanta Computer Inc.

www.vinafix.vn
PROJECT : QUA
Size Document Number Rev
1A
Power Sequence
Date: Monday, July 04, 2011 Sheet 3 of 48
8 7 6 5 4 3 2 1
5 4 3 2 1

Intel PCH (H61)


BTM: Buffer Through Mode
CLKIN_GND0_N CK_CSI_PCH_IN_DP/DN
Rs Need CK505 to provide 4 clock to PCH
CLKIN_GND0_P
CLKIN_GND1_N PCHCLK_P/N RSVD1 FCIM: Full Clock Intergration Mode
CLKIN_GND1_P Rs RSVD2 CPU Remove CK505
Co-Layout
Pin40 XDP1
D CLKOUT_ITPXDP_N CLK_100M_CPU_ITP_DP/DN Pin42 (CN33) D
CLK_100M_PCH_CPUXDP_DP/DN_R R0 CLK_100M_XDP_HEADER_DP/DN
CLKOUT_ITPXDP_P
R0
CLKOUT_PCIE7_N
CLKOUT_PCIE7_P R0 WLAN Mini Card
CLKOUT_DMI_N
CLK_100M_PCH_CPU_RP/N CLK_100M_CPU/#
CLKOUT_DMI_P R0 CPU BCLK
CLKOUT_DP_N
CLKOUT_DP_P
CLKOUT_PCIE0_N CLK_PCIE_TV_RP/RN CLK_PCIE_TV_P/N PCIE MINI CARD
CLKOUT_PCIE0_P R0
(TV TUNER)
CLKOUT_PCIE1_N CLK_PCIE_LAN_RP/RN CLK_PCIE_LAN_P/N PCIE MINI CARD
CLKOUT_PCIE1_P R0
(Daughter B/D)
CLKOUT_PCIE2_N CLK_PCIE_CR_RP/RN CLK_PCIE_CR_P/N CARD READER
CLKOUT_PCIE2_P R0
(RTS5209)
CLKOUT_PCIE3_N CLK_PCIE_USB3_RP/RN CLK_PCIE_USB3_P/N USB3.0
CLKOUT_PCIE3_P R0
C
(VL800) C

CLKOUT_PCIE4_N
CLKOUT_PCIE4_P
CLKOUT_PCIE5_N
CLKOUT_PCIE5_P
CLKOUT_PCIE6_N PCH_XDP_100M_RP/RN PCH_XDP_100M/# XDP2
CLKOUT_PCIE6_P R0
(CN34)
CLKOUT_PEG_A_N CLK_PCIE_VGA_RP/RN CLK_PCIE_VGA_P/N GPU
CLKOUT_PEG_A_P R0
(Caspian M2)
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
TP__CLK_33M
CLKOUT_PCI0 Test Pad
CLKOUT_PCI1
PCICLK_DB_R PCICLK_DB PCIE MINI CARD
CLKOUT_PCI2 Rs (PORT80)
B PCLK_EC_R PCLK_EC B
CLKOUT_PCI3 Rs EC(ITE8519E)
CLK_33M_PCH_R CLK_33M_PCH
CLKOUT_PCI4 Rs
PCICLK_IN
CLKIN_DOT_96N
CLKIN_DOT_96P Rs
CLKIN_SATA_N
CLKIN_SATA_P Rs
CLKIN_DMI_N
CLKIN_DMI_P Rs
REFCLK14MIN
Rs
Note: Red Color is Gen2 spec.
Note: R0 is 0 ohm optional resister
Note: Rs is series resister
A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
CLK Map
Date: Monday, July 04, 2011 Sheet 4 of 48
5 4 3 2 1
5 4 3 2 1

[11] M_A_DQ[63:0] M_A_A[15:0] [11] [11] M_B_DQ[63:0] M_B_A[15:0] [11]


XU1A
M_A_DQ0 AJ3 AV27 M_A_A0 XU1B
M_A_DQ1 SA_DQ0 SA_MA_0 M_A_A1 M_B_DQ0 M_B_A0
AJ4 SA_DQ1 SA_MA_1 AY24 AG7 SB_DQ0 SB_MA_0 AK24
M_A_DQ2 AL3 AW24 M_A_A2 M_B_DQ1 AG8 AM20 M_B_A1
M_A_DQ3 SA_DQ2 SA_MA_2 M_A_A3 M_B_DQ2 SB_DQ1 SB_MA_1 M_B_A2
AL4 SA_DQ3 SA_MA_3 AW23 AJ9 SB_DQ2 SB_MA_2 AM19
M_A_DQ4 AJ2 AV23 M_A_A4 M_B_DQ3 AJ8 AK18 M_B_A3
M_A_DQ5 SA_DQ4 SA_MA_4 M_A_A5 M_B_DQ4 SB_DQ3 SB_MA_3 M_B_A4
AJ1 SA_DQ5 SA_MA_5 AT24 AG5 SB_DQ4 SB_MA_4 AP19
M_A_DQ6 AL2 AT23 M_A_A6 M_B_DQ5 AG6 AP18 M_B_A5
M_A_DQ7 SA_DQ6 SA_MA_6 M_A_A7 M_B_DQ6 SB_DQ5 SB_MA_5 M_B_A6
AL1 SA_DQ7 SA_MA_7 AU22 AJ6 SB_DQ6 SB_MA_6 AM18
D M_A_DQ8 M_A_A8 M_B_DQ7 M_B_A7 D
AN1 SA_DQ8 SA_MA_8 AV22 AJ7 SB_DQ7 SB_MA_7 AL18
M_A_DQ9 AN4 AT22 M_A_A9 M_B_DQ8 AL7 AN18 M_B_A8
M_A_DQ10 SA_DQ9 SA_MA_9 M_A_A10 M_B_DQ9 SB_DQ8 SB_MA_8 M_B_A9
AR3 SA_DQ10 SA_MA_10 AV28 AM7 SB_DQ9 SB_MA_9 AY17
M_A_DQ11 AR4 AU21 M_A_A11 M_B_DQ10 AM10 AN23 M_B_A10
M_A_DQ12 SA_DQ11 SA_MA_11 M_A_A12 M_B_DQ11 SB_DQ10 SB_MA_10 M_B_A11
AN2 SA_DQ12 SA_MA_12 AT21 AL10 SB_DQ11 SB_MA_11 AU17
M_A_DQ13 AN3 AW32 M_A_A13 M_B_DQ12 AL6 AT18 M_B_A12
M_A_DQ14 SA_DQ13 SA_MA_13 M_A_A14 M_B_DQ13 SB_DQ12 SB_MA_12 M_B_A13
AR2 SA_DQ14 SA_MA_14 AU20 AM6 SB_DQ13 SB_MA_13 AR26
M_A_DQ15 AR1 AT20 M_A_A15 M_B_DQ14 AL9 AY16 M_B_A14
M_A_DQ16 SA_DQ15 SA_MA_15 M_B_DQ15 SB_DQ14 SB_MA_14 M_B_A15
AV2 SA_DQ16 AM9 SB_DQ15 SB_MA_15 AV16
M_A_DQ17 AW3 AW29 M_A_WE# M_B_DQ16 AP7
SA_DQ17 SA_WE_N M_A_WE# [11] SB_DQ16
M_A_DQ18 AV5 AV30 M_A_CAS# M_B_DQ17 AR7 AR25 M_B_WE#
SA_DQ18 SA_CAS_N M_A_CAS# [11] SB_DQ17 SA_CK[2] M_B_WE# [11]
M_A_DQ19 AW5 AU28 M_A_RAS# M_B_DQ18 AP10 AK25 M_B_CAS#
SA_DQ19 SA_RAS_N M_A_RAS# [11] SB_DQ18 AS_CK[1] M_B_CAS# [11]
M_A_DQ20 AU2 M_B_DQ19 AR10 AP24 M_B_RAS#
SA_DQ20 SB_DQ19 AS_ODT[2] M_B_RAS# [11]
M_A_DQ21 AU3 AY29 M_BA_A0 M_B_DQ20 AP6
SA_DQ21 SA_BS0 M_BA_A0 [11] SB_DQ20
M_A_DQ22 AU5 AW28 M_BA_A1 M_B_DQ21 AR6 AP23 M_BA_B0
SA_DQ22 SA_BS1 M_BA_A1 [11] SB_DQ21 SB_BS0 M_BA_B0 [11]
M_A_DQ23 AY5 AV20 M_BA_A2 M_B_DQ22 AP9 AM24 M_BA_B1
SA_DQ23 SA_BS2 M_BA_A2 [11] SB_DQ22 SB_BS1 M_BA_B1 [11]
M_A_DQ24 AY7 M_B_DQ23 AR9 AW17 M_BA_B2
SA_DQ24 SB_DQ23 SB_BS2 M_BA_B2 [11]
M_A_DQ25 AU7 AU29 M_CS#_A0 M_B_DQ24 AM12
SA_DQ25 SA_CS_N0 M_CS#_A0 [11] SB_DQ24
M_A_DQ26 AV9 AV32 M_CS#_A1 M_B_DQ25 AM13 AN25 M_CS#_B0
SA_DQ26 SA_CS_N1 M_CS#_A1 [11] SB_DQ25 SB_CS_N0 M_CS#_B0 [11]
M_A_DQ27 AU9 AW30 M_B_DQ26 AR13 AN26 M_CS#_B1
SA_DQ27 SA_CS_N2 SB_DQ26 SB_CS_N1 M_CS#_B1 [11]
M_A_DQ28 AV7 AU33 M_B_DQ27 AP13 AL25
M_A_DQ29 SA_DQ28 SA_CS_N3 M_B_DQ28 SB_DQ27 SB_CS_N2
AW7 SA_DQ29 AL12 SB_DQ28 SB_CS_N3 AT26
M_A_DQ30 AW9 AV19 M_CKE_A0 M_B_DQ29 AL13
SA_DQ30 SA_CKE0 M_CKE_A0 [11] SB_DQ29
M_A_DQ31 AY9 AT19 M_CKE_A1 M_B_DQ30 AR12 AU16 M_CKE_B0
C SA_DQ31 SA_CKE1 M_CKE_A1 [11] SB_DQ30 SB_CKE0 M_CKE_B0 [11] C
M_A_DQ32 AU35 AU18 M_B_DQ31 AP12 AY15 M_CKE_B1
SA_DQ32 SA_CKE2 SB_DQ31 SB_CKE1 M_CKE_B1 [11]
M_A_DQ33 AW37 AV18 M_B_DQ32 AR28 AW15
M_A_DQ34 SA_DQ33 SA_CKE3 M_B_DQ33 SB_DQ32 SB_CKE2
AU39 SA_DQ34 AR29 SB_DQ33 SB_CKE3 AV15
M_A_DQ35 AU36 AV31 M_ODT_A0 M_B_DQ34 AL28
SA_DQ35 SA_ODT0 M_ODT_A0 [11] SB_DQ34
M_A_DQ36 AW35 AU32 M_ODT_A1 M_B_DQ35 AL29 AL26 M_ODT_B0
SA_DQ36 SA_ODT1 M_ODT_A1 [11] SB_DQ35 SB_ODT0 M_ODT_B0 [11]
M_A_DQ37 AY36 AU30 M_B_DQ36 AP28 AP26 M_ODT_B1
SA_DQ37 SA_ODT2 SB_DQ36 SB_ODT1 M_ODT_B1 [11]
M_A_DQ38 AU38 AW33 M_B_DQ37 AP29 AM26
M_A_DQ39 SA_DQ38 SA_ODT3 M_B_DQ38 SB_DQ37 SB_ODT2
AU37 SA_DQ39 AM28 SB_DQ38 SB_ODT3 AK26
M_A_DQ40 AR40 M_B_DQ39 AM29
M_A_DQ41 SA_DQ40 M_B_DQ40 SB_DQ39 M_CLK_DDR_B0
AR37 SA_DQ41 AP32 SB_DQ40 SB_CK0 AL21 M_CLK_DDR_B0 [11]
M_A_DQ42 AN38 AY25 M_CLK_DDR_A0 M_B_DQ41 AP31 AL22 M_CLK_DDR#_B0
SA_DQ42 SA_CK0 M_CLK_DDR_A0 [11] SB_DQ41 SB_CK_N0 M_CLK_DDR#_B0 [11]
M_A_DQ43 AN37 AW25 M_CLK_DDR#_A0 M_B_DQ42 AP35 AL20 M_CLK_DDR_B1
SA_DQ43 SA_CK_N0 M_CLK_DDR#_A0 [11] SB_DQ42 SB_CK1 M_CLK_DDR_B1 [11]
M_A_DQ44 AR39 AU24 M_CLK_DDR_A1 M_B_DQ43 AP34 AK20 M_CLK_DDR#_B1
SA_DQ44 SA_CK1 M_CLK_DDR_A1 [11] SB_DQ43 SB_CK_N1 M_CLK_DDR#_B1 [11]
M_A_DQ45 AR38 AU25 M_CLK_DDR#_A1 M_B_DQ44 AR32 AL23
SA_DQ45 SA_CK_N1 M_CLK_DDR#_A1 [11] SB_DQ44 SB_CK2
M_A_DQ46 AN39 AW27 M_B_DQ45 AR31 AM22
M_A_DQ47 SA_DQ46 SA_CK2 M_B_DQ46 SB_DQ45 SB_CK_N2
AN40 SA_DQ47 SA_CK_N2 AY27 AR35 SB_DQ46 SB_CK3 AP21
M_A_DQ48 AL40 AV26 M_B_DQ47 AR34 AN21
M_A_DQ49 SA_DQ48 SA_CK3 M_B_DQ48 SB_DQ47 SB_CK_N3
AL37 SA_DQ49 SA_CK_N3 AW26 AM32 SB_DQ48
M_A_DQ50 AJ38 M_B_DQ49 AM31
M_A_DQ51 SA_DQ50 DDR3_DRAMRST_N_R R46 0R_4 M_B_DQ50 SB_DQ49
AJ37 SA_DQ51 SM_DRAMRST_N AW18 DDR3_DRAMRST# [11] AL35 SB_DQ50
M_A_DQ52 AL39 M_B_DQ51 AL32
M_A_DQ53 SA_DQ52 C41 M_B_DQ52 SB_DQ51
AL38 SA_DQ53 AM34 SB_DQ52
M_A_DQ54 AJ39 M_B_DQ53 AL31
M_A_DQ55 SA_DQ54 *1u/6.3V_4 M_B_DQ54 SB_DQ53
B AJ40 SA_DQ55 AM35 SB_DQ54 B
M_A_DQ56 AG40 M_B_DQ55 AL34
M_A_DQ57 SA_DQ56 M_B_DQ56 SB_DQ55
AG37 SA_DQ57 AH35 SB_DQ56
M_A_DQ58 AE38 M_B_DQ57 AH34
M_A_DQ59 SA_DQ58 M_B_DQ58 SB_DQ57
AE37 SA_DQ59 AE34 SB_DQ58
M_A_DQ60 AG39 M_B_DQ59 AE35
M_A_DQ61 SA_DQ60 M_A_DQS8 TP5 M_B_DQ60 SB_DQ59
AG38 SA_DQ61 SA_DQS_8 AV13 1 AJ35 SB_DQ60
M_A_DQ62 AE39 AV12 M_A_DQS#8 1 TP6 M_B_DQ61 AJ34
M_A_DQ63 SA_DQ62 SA_DQS_N_8 M_B_DQ62 SB_DQ61 M_B_DQS8 TP54
AE40 SA_DQ63 AF33 SB_DQ62 SB_DQS_8 AN16 1
AU12 M_B_DQ63 AF35 AN15 M_B_DQS#8 1 TP55
M_A_DQS0 SA_ECC_CB0 SB_DQ63 SB_DQS_N_8
[11] M_A_DQS0 AK3 SA_DQS_0 SA_ECC_CB1 AU14
M_A_DQS1 AP3 AW13 M_B_DQS0 AH7 AL16
[11] M_A_DQS1 SA_DQS_1 SA_ECC_CB2 [11] M_B_DQS0 SB_DQS_0 SB_ECC_CB0
M_A_DQS2 AW4 AY13 M_B_DQS1 AM8 AM16
[11] M_A_DQS2 SA_DQS_2 SA_ECC_CB3 [11] M_B_DQS1 SB_DQS_1 SB_ECC_CB1
M_A_DQS3 AV8 AU13 M_B_DQS2 AR8 AP16
[11] M_A_DQS3 SA_DQS_3 SA_ECC_CB4 [11] M_B_DQS2 SB_DQS_2 SB_ECC_CB2
M_A_DQS4 AV37 AU11 M_B_DQS3 AN13 AR16
[11] M_A_DQS4 SA_DQS_4 SA_ECC_CB5 [11] M_B_DQS3 SB_DQS_3 SB_ECC_CB3
M_A_DQS5 AP38 AY12 M_B_DQS4 AN29 AL15
[11] M_A_DQS5 SA_DQS_5 SA_ECC_CB6 [11] M_B_DQS4 SB_DQS_4 SB_ECC_CB4
M_A_DQS6 AK38 AW12 M_B_DQS5 AP33 AM15
[11] M_A_DQS6 SA_DQS_6 SA_ECC_CB7 [11] M_B_DQS5 SB_DQS_5 SB_ECC_CB5
M_A_DQS7 AF38 M_B_DQS6 AL33 AR15
[11] M_A_DQS7 SA_DQS_7 [11] M_B_DQS6 SB_DQS_6 SB_ECC_CB6
M_B_DQS7 AG35 AP15
[11] M_B_DQS7 SB_DQS_7 SB_ECC_CB7
M_A_DQS#0 AK2
[11] M_A_DQS#0 SA_DQS_N_0
M_A_DQS#1 AP2 M_B_DQS#0 AH6
[11] M_A_DQS#1 SA_DQS_N_1 [11] M_B_DQS#0 SB_DQS_N_0
M_A_DQS#2 M_B_DQS#1
[11] M_A_DQS#2
M_A_DQS#3
AV4
AW8
SA_DQS_N_2 [11] M_B_DQS#1
M_B_DQS#2
AL8
AP8
SB_DQS_N_1 DDR_1
[11] M_A_DQS#3 SA_DQS_N_3 [11] M_B_DQS#2 SB_DQS_N_2
M_A_DQS#4 M_B_DQS#3
A
[11] M_A_DQS#4
M_A_DQS#5
AV36
AP39
SA_DQS_N_4 DDR_0 [11] M_B_DQS#3
M_B_DQS#4
AN12
AN28
SB_DQS_N_3 A
[11] M_A_DQS#5 SA_DQS_N_5 [11] M_B_DQS#4 SB_DQS_N_4
M_A_DQS#6 AK39 M_B_DQS#5 AR33
[11] M_A_DQS#6 SA_DQS_N_6 [11] M_B_DQS#5 SB_DQS_N_5
M_A_DQS#7 AF39 M_B_DQS#6 AM33
[11] M_A_DQS#7 SA_DQS_N_7 [11] M_B_DQS#6 SB_DQS_N_6
M_B_DQS#7 AG34

LGA1155
[11] M_B_DQS#7 SB_DQS_N_7 Quanta Computer Inc.
LGA1155
PROJECT : QUA
Size Document Number Rev
1A
SOCKET H2 DDR3
Date: Monday, July 04, 2011 Sheet 5 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

XU1C
X5R <SEAN0331> change
PEG_RX15 PEG_TXP15_C C105 DIS@0.22u/6.3V_4
[22] PEG_RX15
PEG_RX#15
B11
B12
PEG_RX_0 PEG_TX_0 C13
C14 PEG_TXN15_C C104
AC-CAP PEG_TX15 [22]
DIS@0.22u/6.3V_4
[22] PEG_RX#15 PEG_RX_N0 PEG_TX_N0 PEG_TX#15 [22]
PEG_RX14 D12 E14 PEG_TXP14_C C107 DIS@0.22u/6.3V_4
[22] PEG_RX14 PEG_RX_1 PEG_TX_1 PEG_TX14 [22]
PEG_RX#14 D11 E13 PEG_TXN14_C C106 DIS@0.22u/6.3V_4
[22] PEG_RX#14 PEG_RX_N1 PEG_TX_N1 PEG_TX#14 [22]
PEG_RX13 C10 G14 PEG_TXP13_C C76 DIS@0.22u/6.3V_4
[22] PEG_RX13 PEG_RX_2 PEG_TX_2 PEG_TX13 [22]
PEG_RX#13 C9 G13 PEG_TXN13_C C75 DIS@0.22u/6.3V_4
[22] PEG_RX#13 PEG_RX_N2 PEG_TX_N2 PEG_TX#13 [22]
PEG_RX12 E10 F12 PEG_TXP12_C C93 DIS@0.22u/6.3V_4
[22] PEG_RX12 PEG_RX_3 PEG_TX_3 PEG_TX12 [22]
PEG_RX#12 E9 F11 PEG_TXN12_C C92 DIS@0.22u/6.3V_4
[22] PEG_RX#12 PEG_RX_N3 PEG_TX_N3 PEG_TX#12 [22]
PEG_RX11 B8 J14 PEG_TXP11_C C78 DIS@0.22u/6.3V_4
[22] PEG_RX11 PEG_RX_4 PEG_TX_4 PEG_TX11 [22]
PEG_RX#11 B7 J13 PEG_TXN11_C C77 DIS@0.22u/6.3V_4
[22] PEG_RX#11 PEG_RX_N4 PEG_TX_N4 PEG_TX#11 [22]
PEG_RX10 C6 D8 PEG_TXP10_C C95 DIS@0.22u/6.3V_4
D [22] PEG_RX10 PEG_RX_5 PEG_TX_5 PEG_TX10 [22] D
PEG_RX#10 C5 D7 PEG_TXN10_C C94 DIS@0.22u/6.3V_4
[22] PEG_RX#10 PEG_RX_N5 PEG_TX_N5 PEG_TX#10 [22]
PEG_RX9 A5 D3 PEG_TXP9_C C80 DIS@0.22u/6.3V_4
[22] PEG_RX9 PEG_RX_6 PEG_TX_6 PEG_TX9 [22]

PEG
PEG_RX#9 A6 C3 PEG_TXN9_C C79 DIS@0.22u/6.3V_4
[22] PEG_RX#9 PEG_RX_N6 PEG_TX_N6 PEG_TX#9 [22]
PEG_RX8 E2 E6 PEG_TXP8_C C97 DIS@0.22u/6.3V_4
[22] PEG_RX8 PEG_RX_7 PEG_TX_7 PEG_TX8 [22]
PEG_RX#8 E1 E5 PEG_TXN8_C C96 DIS@0.22u/6.3V_4
[22] PEG_RX#8 PEG_RX_N7 PEG_TX_N7 PEG_TX#8 [22]
PEG_RX7 F4 F8 PEG_TXP7_C C82 DIS@0.22u/6.3V_4
[22] PEG_RX7 PEG_RX_8 PEG_TX_8 PEG_TX7 [22]
PEG_RX#7 F3 F7 PEG_TXN7_C C81 DIS@0.22u/6.3V_4
[22] PEG_RX#7 PEG_RX_N8 PEG_TX_N8 PEG_TX#7 [22]
PEG_RX6 G2 G10 PEG_TXP6_C C99 DIS@0.22u/6.3V_4
[22] PEG_RX6 PEG_RX_9 PEG_TX_9 PEG_TX6 [22]
PEG_RX#6 G1 G9 PEG_TXN6_C C98 DIS@0.22u/6.3V_4
[22] PEG_RX#6 PEG_RX_N9 PEG_TX_N9 PEG_TX#6 [22]
PEG_RX5 H3 G5 PEG_TXP5_C C84 DIS@0.22u/6.3V_4
[22] PEG_RX5 PEG_RX_10 PEG_TX_10 PEG_TX5 [22]
PEG_RX#5 H4 G6 PEG_TXN5_C C83 DIS@0.22u/6.3V_4
[22] PEG_RX#5 PEG_RX_N10 PEG_TX_N10 PEG_TX#5 [22]
PEG_RX4 J1 K7 PEG_TXP4_C C101 DIS@0.22u/6.3V_4
[22] PEG_RX4 PEG_RX_11 PEG_TX_11 PEG_TX4 [22]
PEG_RX#4 J2 K8 PEG_TXN4_C C100 DIS@0.22u/6.3V_4
[22] PEG_RX#4 PEG_RX_N11 PEG_TX_N11 PEG_TX#4 [22]
PEG_RX3 K3 J5 PEG_TXP3_C C86 DIS@0.22u/6.3V_4
[22] PEG_RX3 PEG_RX_12 PEG_TX_12 PEG_TX3 [22]
PEG_RX#3 K4 J6 PEG_TXN3_C C85 DIS@0.22u/6.3V_4
[22] PEG_RX#3 PEG_RX_N12 PEG_TX_N12 PEG_TX#3 [22]
PEG_RX2 L1 M8 PEG_TXP2_C C74 DIS@0.22u/6.3V_4
[22] PEG_RX2 PEG_RX_13 PEG_TX_13 PEG_TX2 [22]
PEG_RX#2 L2 M7 PEG_TXN2_C C73 DIS@0.22u/6.3V_4
[22] PEG_RX#2 PEG_RX_N13 PEG_TX_N13 PEG_TX#2 [22]
PEG_RX1 M3 L6 PEG_TXP1_C C103 DIS@0.22u/6.3V_4
[22] PEG_RX1 PEG_RX_14 PEG_TX_14 PEG_TX1 [22]
PEG_RX#1 M4 L5 PEG_TXN1_C C102 DIS@0.22u/6.3V_4
[22] PEG_RX#1 PEG_RX_N14 PEG_TX_N14 PEG_TX#1 [22]
PEG_RX0 N1 N5 PEG_TXP0_C C88 DIS@0.22u/6.3V_4
[22] PEG_RX0 PEG_RX_15 PEG_TX_15 PEG_TX0 [22]
PEG_RX#0 N2 N6 PEG_TXN0_C C87 DIS@0.22u/6.3V_4
[22] PEG_RX#0 PEG_RX_N15 PEG_TX_N15 PEG_TX#0 [22]
DMI_PCH_CPU_RXP0 W5 V7 DMI_CPU_PCH_TXP0
[14] DMI_PCH_CPU_RXP0 DMI_RX_0 DMI_TX_0 DMI_CPU_PCH_TXP0 [14]
DMI_PCH_CPU_RXN0 W4 V6 DMI_CPU_PCH_TXN0
[14] DMI_PCH_CPU_RXN0 DMI_RX_N0 DMI_TX_N0 DMI_CPU_PCH_TXN0 [14]
DMI_PCH_CPU_RXP1 V3 W7 DMI_CPU_PCH_TXP1
[14] DMI_PCH_CPU_RXP1 DMI_RX_1 DMI_TX_1 DMI_CPU_PCH_TXP1 [14]
DMI_PCH_CPU_RXN1 V4 W8 DMI_CPU_PCH_TXN1
[14] DMI_PCH_CPU_RXN1 DMI_RX_N1 DMI_TX_N1 DMI_CPU_PCH_TXN1 [14]

DMI
DMI_PCH_CPU_RXP2 Y3 Y6 DMI_CPU_PCH_TXP2
[14] DMI_PCH_CPU_RXP2 DMI_RX_2 DMI_TX_2 DMI_CPU_PCH_TXP2 [14]
DMI_PCH_CPU_RXN2 Y4 Y7 DMI_CPU_PCH_TXN2
[14] DMI_PCH_CPU_RXN2 DMI_RX_N2 DMI_TX_N2 DMI_CPU_PCH_TXN2 [14]
DMI_PCH_CPU_RXP3 AA4 AA7 DMI_CPU_PCH_TXP3
C [14] DMI_PCH_CPU_RXP3 DMI_RX_3 DMI_TX_3 DMI_CPU_PCH_TXP3 [14] C
DMI_PCH_CPU_RXN3 AA5 AA8 DMI_CPU_PCH_TXN3
[14] DMI_PCH_CPU_RXN3 DMI_RX_N3 DMI_TX_N3 DMI_CPU_PCH_TXN3 [14]

P3 PE_RX_0 PE_TX_0 P8
P4 PE_RX_N0 PE_TX_N0 P7
R2 PE_RX_1 PE_TX_1 T7
R1 PE_RX_N1 PE_TX_N1 T8
GEN
T4 PE_RX_2 PE_TX_2 R6
T3 PE_RX_N2 PE_TX_N2 R5
U2 PE_RX_3 PE_TX_3 U5
1.05V_VCCIO U1 U6
PE_RX_N3 PE_TX_N3

R45 24.9R/F_4 GRCOMP B5 PEG_ICOMPO


C4 PEG_RCOMPO
B4 PEG_COMPI

CAD NOTE: LGA1155

PIN B5 ROUTING TO RESISTOR NEED TO BE 5 MILS


PIN C4 AND B4 ROUTING TO RESISTOR NEED TO BE 4 MILS
FDI DISABLE GUIDELINES (FROM PDG)
FDI SIGNAL RECOMMENDATION THERE ARE SPACING RULES ALSO - CHECK RULES DOCUMENT
FDI_TX[7:0] FLOAT
FDI_TX_N[7:0] FLOAT
FDI_FSYNC 1K RESISTOR TO VCC_FDI OR VSS
FDI_LSYNC 1K RESISTOR TO VCC_FDI OR VSS
B B
FDI_INT 1K RESISTOR TO VCC_FDI OR VSS

FDI_TXN[7:0] [18]
XU1D
FDI_TXN0
AC8 FDI_TXP0 FDI_TXN1
FDI_TX_0 FDI_TXN0 FDI_TXN2
FDI_TX_N0 AC7
AC2 FDI_TXP1 FDI_TXN3
FDI_TX_1 FDI_TXN1 FDI_TXN4
[18] FDI_FSYNC0 AC5 FDI_FSYNC_0 FDI_TX_N1 AC3
AC4 AD2 FDI_TXP2 FDI_TXN5
[18] FDI_LSYNC0 FDI_LSYNC_0 FDI_TX_2
AD1 FDI_TXN2 FDI_TXN6
FDI_TX_N2 FDI_TXP3 FDI_TXN7
FDI_TX_3 AD4
AD3 FDI_TXN3
FDI_TX_N3 FDI_TXP[7:0] [18]
AE5 AD7 FDI_TXP4
[18] FDI_FSYNC1 FDI_FSYNC_1 FDI_TX_4
AE4 AD6 FDI_TXN4 FDI_TXP0
[18] FDI_LSYNC1 FDI_LSYNC_1 FDI_TX_N4
A AE7 FDI_TXP5 FDI_TXP1 A
[18] FDI_INT FDI_TX_5
AE8 FDI_TXN5 FDI_TXP2
FDI_TX_N5 FDI_TXP6 FDI_TXP3
FDI_TX_6 AF3
R55 R54 R56 R59 R58 1.05V_VCCIO AF2 FDI_TXN6 FDI_TXP4
FDI_TX_N6 FDI_TXP7 FDI_TXP5
AG3 FDI_INT FDI_TX_7 AG2
AG1 FDI_TXN7 FDI_TXP6
FDI_TX_N7
*1K/F_4

*1K/F_4

*1K/F_4

*1K/F_4

*1K/F_4

R483 SNB_IPL_RCOMP AE2 FDI_TXP7


24.9R/F_4 AE1
FDI_COMPIO
FDI_ICOMPO
Quanta Computer Inc.
FDI LINK
LGA1155 PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
SOCKET H2 PEG/DMI
Date: Monday, July 04, 2011 Sheet 6 of 48
5 4 3 2 1
5 4 3 2 1

CAD NOTE:
1.05V_VCCIO MINIMIZE STUB BETWEEN THESE AND RESISTORS AT SINAI PAGE

H_VIDSCK_VR R2 0R_4 H_VIDSCK


[40] H_VIDSCK_VR
H_VIDSOUT_VR R12 0R_4 H_VIDSOUT
[40] H_VIDSOUT_VR
CAD NOTE: CAD NOTE: PLACE
R9 R11 R4 PLACE NEAR CPU H_VIDALERT_N_VR R3 0R_4 H_VIDALERT_N NEXT TO CPU
[40] H_VIDALERT_N_VR
*54.9R/F_4 110/F_4 75R/F_4

D D
1.05V_VCCIO 3V_S5

XU1E

CLK_100M_CPU W2 P34 VR_PVCCUSA_SEL


[12] CLK_100M_CPU BCLK_0 VCCSA_VID VR_PVCCUSA_SEL [43]
CLK_100M_CPU# W1 T2 VCCSA_SENSE R8 R21 R5
[12] CLK_100M_CPU# BCLK_N0 VCCSA_SENSE VCCSA_SENSE [43]
H_VIDSCK C37 A36 VCC_SENSE
VIDSCLK VCC_SENSE VCC_SENSE [40]

51R/F_4

51R/F_4

*220R_4
H_VIDSOUT B37 B36 VSS_SENSE
VIDSOUT VSS_SENSE VSS_SENSE [40]
CAD NOTE: H_VIDALERT_N R10 44.2R/F_4 VIDALERT_N A37 VIDALERT_N VTT_SENSE+
PLACE NEAR CPU VCCIO_SENSE AB4 VTT_SENSE+ [43]
H_PW RGD J40 AB3 VTT_SENSE-
[10,16] H_PW RGD UNCOREPWRGOOD VSSIO_SENSE VTT_SENSE- [43]
PW RGD_DRAM R481 120R/F_4 PW RGD_DRAM_R AJ19
[16] PW RGD_DRAM SM_DRAMPWROK
R463 200R_4 PLTRST_CPU_N_R F36 L32 VCCAXG_SENSE
[10,16] PLTRST_CPU_N RESET_N VCCAXG_SENSE VCCAXG_SENSE [40]
M32 VSSAXG_SENSE
VSSAXG_SENSE VSSAXG_SENSE [40]
H_PM_SYNC_0 E38
[15] H_PM_SYNC_0 PM_SYNC
CAD NOTE: R16 C3 H_PECI J35 L39 R52 0R_4 XDP_CPU_TDO
[15,37] H_PECI PECI TDO XDP_CPU_TDO [10]
PLACE NEAR CPU 100R/F_4 *0.1U/16V_4 H_CATERR_N E37 L40 R259 0R_4 XDP_CPU_TDI
CATERR_N TDI XDP_CPU_TDI [10]
D1 1N4148W S H_PROCHOT_N H34 M40 R460 0R_4 XDP_CPU_TCLK0
[40] VR_HOT# PROCHOT_N TCK XDP_CPU_TCLK0 [10]
H_THERMTRIP_N G35 L38 R705 0R_4 XDP_CPU_TMS
[15] H_THERMTRIP_N THERMTRIP_N TMS XDP_CPU_TMS [10]
J39 R721 0R_4 XDP_CPU_TRST_N
TRST_N XDP_CPU_TRST_N [10]
H_SKTOCC_N AJ33 K38 R722 0R_4 XDP_CPU_PRDY_N
[37] H_SKTOCC_N SKTOCC_N PRDY_N XDP_CPU_PRDY_N [10]
FM_PROCSEL_DMI_TERM K32 K40 R723 0R_4 XDP_CPU_PREQ_N
[13] FM_PROCSEL_DMI_TERM PROC_SEL PREQ_N XDP_CPU_PREQ_N [10]
E39 XDP_CPU_DBRESET_N R13 0R_4
DBR_N FP_RST_PCH_N [16]
SM_VREF AJ22 C40 CLK_100M_CPU_ITP_DP
SM_VREF RSVD_1 CLK_100M_CPU_ITP_DP [12]
1.5V_S3 1.05V_VCCIO D40 CLK_100M_CPU_ITP_DN R22 R20
RSVD_2 CLK_100M_CPU_ITP_DN [12]

51R/F_4

51R/F_4
C XDP_CPU_MBP_N[0:7] [10] C
PD_TEST_CPU_0 H36 H40 XDP_CPU_MBP_N0 CAD NOTE: PLACE
[10] PD_TEST_CPU_0 CFG_0 BPM_N0
R482 R19 TP35 1 PD_TEST_CPU_1 J36 H38 XDP_CPU_MBP_N1 NEXT TO CPU
PD_TEST_CPU_2 CFG_1 BPM_N1 XDP_CPU_MBP_N2
J37 CFG_2 BPM_N2 G38 ET-0329-09
*1K/F_4 *1K/F_4 TP44 1 PD_TEST_CPU_3 K36 G40 XDP_CPU_MBP_N3
TP18 PD_TEST_CPU_4 CFG_3 BPM_N3 XDP_CPU_MBP_N4
1 L36 CFG_4 BPM_N4 G39
PD_TEST_CPU_5 N35 F38 XDP_CPU_MBP_N5
PW RGD_DRAM H_PW RGD PD_TEST_CPU_6 CFG_5 BPM_N5 XDP_CPU_MBP_N6
L37 CFG_6 BPM_N6 E40
TP31 1 PD_TEST_CPU_7 M36 F40 XDP_CPU_MBP_N7
TP20 PD_TEST_CPU_8 CFG_7 BPM_N7
1 J38 CFG_8
C353 C4 TP45 1 PD_TEST_CPU_9 L35
R6 TP26 PD_TEST_CPU_10 CFG_9 1.05V_VCCIO
1 M38 CFG_10 RSVD_24 B39
1u/6.3V_4

*1u/6.3V_4

1K/F_4 TP41 1 PD_TEST_CPU_11 N36 J33


TP28 PD_TEST_CPU_12 CFG_11 RSVD_30
1 N38 CFG_12 RSVD_37 L34
TP22 1 PD_TEST_CPU_13 N39 L33
TP38 PD_TEST_CPU_14 CFG_13 RSVD_36
1 N37 CFG_14 RSVD_33 K34
TP17 1 PD_TEST_CPU_15 N40
TP25 PD_TEST_CPU_16 CFG_15
1 G37 CFG_16 RSVD_40 N33
TP40 1 PD_TEST_CPU_17 G36 M34 R7 R471 R474 R14 R15
CFG_17 RSVD_39 *51R/F_4 *1K/F_4 *51R/F_4 51R/F_4 *1K/F_4
RSVD_18 AV1
AT14 RSVD_16 RSVD_20 AW2
AY3 RSVD_23
1.5V_S3 H7 L9
RSVD_28 RSVD_38
H8 RSVD_29 RSVD_32 J9
RSVD_34 K9
H_PW RGD
R42 L31
100R/F_4 RSVD_35 H_PECI
J31 Z1218
RSVD_50 TP49
B LGA1155 K31 Z1219 H_THERMTRIP_N B
RSVD_53 TP50
AD34 Z1220 H_PROCHOT_N
RSVD_51 TP43
SM_VREF AD35 Z1221
RSVD_52 TP36
H_CATERR_N

R17 1K/F_4 PD_TEST_CPU_2


R43 C24
R473 *1K/F_4 PD_TEST_CPU_5 100R/F_4 0.1u/16V_4 R422 *10K/F_4 H_SKTOCC_N R23 10K/F_4 3.3V
R18 *1K/F_4 PD_TEST_CPU_6

The CFG signals have a default value of '1' if not erminated on CPU
the board Internal
CFG[1:0] RVSD/TP Reserved BPM[7:0] Pull Up VCCIO 65-165 
configuration PU/PD
PRDY# Pull Up VCCIO 65-165 
CFG[2] 0 PCI Express* lane
Static x16 Lane H_THERMTRIP_N

Numbering Reversal. PREQ# Pull Up VCCIO 65-165 


1

1 = Normal operation 0 = Lane TCK Pull Down VSS 5-15 k


CFG[3] RVSD/TP PCI Express*
numbers Static x4 Lane
reversed TDI Pull Up VCCIO 5-15 k
Numbering Reversal.
Reserved 2 Q1 TMS Pull Up VCCIO 5-15 k
CFG[4] RVSD/TP [23] GFX_CTF
2

*DIS@2N7002
configuration lane TRST# Pull Up VCCIO 5-15 k
A
CFG[5:6] 11 PCI Express Bifurcation A
R44 VCCSA_VID Pull Up VCCIO 5-15
00 = 1 x8, 2 x4 PCI Express *DIS@10K/F_4
k
3

01 = reserved
1

CFG[17:0] Pull Up VCCIO 5-15 k


10 = 2 x8 PCI Express
11 = 1 x16 PCI Express Quanta Computer Inc.
Reserved
PROJECT : QUA
CFG[17:7] RVSD/TP

www.vinafix.vn
Size Document Number Rev
configuration lane 1A
SOCKET H2 CLK/CTRL/MISC/DE
Date: Monday, July 04, 2011 Sheet 7 of 48
5 4 3 2 1
5 4 3 2 1

2011C: 65W TDP desktop


and server/workstation SKUs
BOM note:
CPU_CORE CPU_CORE 1.05V_VCCIO 1.5V_S3 EV@Cavity need
XU1F CPU_AXG
A12
VCC_1 VCC_82
F32 to stuff 0ohm RES XU1G
A13 F33 XU1H
VCC_2 VCC_83
A14 F34 M13 AB33
VCC_3 VCC_84 VCCIO_34 CPU_AXG VCCAXG_1
A15 G15 AB34
VCC_4 VCC_85 VCCAXG_2
A16
A18
VCC_5 VCC_86
G16
G18
A11
A7
VCCIO_1 VDDQ_1
AJ13
AJ14
CAVITY AB35
AB36
VCCAXG_3
VCC_6 VCC_87 VCCIO_2 VDDQ_2 VCCAXG_4
A24 G19 AA3 AJ23 AB37
VCC_7 VCC_88 VCCIO_3 VDDQ_4 VCCAXG_5
A25 G21 AB8 AJ24 AB38
VCC_8 VCC_89 VCCIO_4 VDDQ_5 C331 C332 C333 C11 C8 C9 C10 VCCAXG_6
A27 G22 AF8 AR20 AB39
D VCC_9 VCC_90 VCCIO_5 VDDQ_6 VCCAXG_7 D
A28 G24 AG33 AR21 AB40
VCC_10 VCC_91 VCCIO_6 VDDQ_7 VCCAXG_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8

UMA@22u/6.3V_8
B15
VCC_11 VCC_92
G25 VCC:75A max AJ16
VCCIO_7 VDDQ_8
AR22 AC33
VCCAXG_9
B16 G27 AJ17 AR23 AC34
VCC_12 VCC_93 VCCIO_8 VDDQ_9 VCCAXG_10
B18 G28 AJ26 AR24 AC35
VCC_13 VCC_94 VCCIO_9 VDDQ_10 VCCAXG_11
B24 G30 AJ28 AU19 AC36
VCC_14 VCC_95 VCCIO_10 VDDQ_11 VCCAXG_12
B25 G31 AJ32 AU23 AC37
VCC_15 VCC_96 VCCIO_11 VDDQ_12 VCCAXG_13
B27 G32 AK15 AU27 AC38
VCC_16 VCC_97 VCCIO_12 VDDQ_13 VCCAXG_14
B28 G33 VCCIO:8.5A max AK17 AU31 AC39
VCC_17 VCC_98 VCCIO_13 VDDQ_14 VCCAXG_15
B30 H13 AK19 AV21 AC40
VCC_18 VCC_99 VCCIO_14 VDDQ_15 VCCAXG_16
B31 H14 AK21 AV24 T33
VCC_19 VCC_100 VCCIO_15 VDDQ_16 VCCAXG_17
B33 H15 AK23 AV25 T34
VCC_20 VCC_101 VCCIO_16 VDDQ_17 change to 22u from 10u <Sean0327> add VCCAXG_18
B34 H16 AK27 AV29 T35
VCC_21 VCC_102 VCCIO_17 VDDQ_18 03/24 Jerry UMA@ VCCAXG_19
C15 H18 AK29 AV33 T36
VCC_22 VCC_103 VCCIO_18 VDDQ_19 VCCAXG_20
C16 H19 AK30 AW31 T37
VCC_23 VCC_104 VCCIO_19 VDDQ_20 VCCAXG_21
C18 H21 B9 AY23 T38
VCC_24 VCC_105 VCCIO_20 VDDQ_21 VCCAXG_22
C19 H22 D10 AY26 T39
VCC_25 VCC_106 VCCIO_21 VDDQ_22 VCCAXG_23
C21 H24 D6 AY28 T40
VCC_26 VCC_107 VCCIO_22 VDDQ_23 VCCAXG_24
C22
C24
VCC_27 VCC_108
H25
H27
E3
E4
VCCIO_23 PLACE BACKSIDE OF MCP CAVITY U33
U34
VCCAXG_25
VCC_28 VCC_109 VCCIO_24 VCCAXG_26
C25 H28 G3 U35
VCC_29 VCC_110 VCCIO_25 VCCAXG_27
C27 H30 G4 AJ20 U36
VCC_30 VCC_111 VCCIO_26 VDDQ_3 VCCAXG_28
C28 H31 J3 U37
VCC_31 VCC_112 VCCIO_27 VCCAXG_29
C30 H32 J4 U38
VCC_32 VCC_113 VCCIO_28 VCCAXG_30
C31
VCC_33 VCC_114
J12 J7
VCCIO_29
VCCAXG:35A max U39
VCCAXG_31
C33 J15 J8 VDDQ:4.75A max U40
VCC_34 VCC_115 VCCIO_30 VCCAXG_32
C34 J16 L3 W33
VCC_35 VCC_116 VCCIO_31 VCCAXG_33
C36 J18 L4 W34
VCC_36 VCC_117 VCCIO_32 VCCAXG_34
D13 J19 L7 W35
VCC_37 VCC_118 VCCIO_33 VCCAXG_35
D14 J21 N3 W36
VCC_38 VCC_119 VCCIO_35 VCCAXG_36
D15 J22 N4 W37
VCC_39 VCC_120 VCCIO_36 VCCAXG_37
D16 J24 N7 W38
VCC_40 VCC_121 VCCIO_37 VCCAXG_38
D18 J25 R3 Y33
VCC_41 VCC_122 VCCIO_38 VCCAXG_39
D19 J27 R4 Y34
VCC_42 VCC_123 VCCIO_39 VCCAXG_40
D21 J28 R7 Y35
VCC_43 VCC_124 VCCIO_40 VCCAXG_41
D22 J30 U3 Y36
VCC_44 VCC_125 VCCIO_41 VCCAXG_42
D24 K15 U4 Y37
VCC_45 VCC_126 VCCIO_42 VCCAXG_43
D25 K16 U7 Y38
VCC_46 VCC_127 VCCIO_43 VCCAXG_44
C D27 K18 V8 C
VCC_47 VCC_128 0.925V_VCCSA VCCIO_44
D28 K19 W3
VCC_48 VCC_129 VCCIO_45 LGA1155
D30 K21
VCC_49 VCC_130
D31 K22 H10
VCC_50 VCC_131 VCCSA_1
D33 K24 H11
VCC_51 VCC_132 VCCSA_2
D34 K25 H12
VCC_52 VCC_133 VCCSA_3
D35 K27 J10
VCC_53 VCC_134 VCCSA_4
D36 K28 K10
VCC_54 VCC_135 VCCSA_5
E15
VCC_55 VCC_136
K30 VCCSA:8.8A max K11
VCCSA_6
E16 L13 L11
VCC_56 VCC_137 VCCSA_7
E18 L14 L12
VCC_57 VCC_138 VCCSA_8
E19 L15 M10
VCC_58 VCC_139 VCCSA_9
E21 L16 M11
VCC_59 VCC_140 1.8V VCCSA_10
E22 L18 M12
VCC_60 VCC_141 VCCSA_11
E24 L19
VCC_61 VCC_142
E25 L21 AK11
VCC_62 VCC_143 VCCPLL_1
E27
E28
VCC_63 VCC_144
L22
L24 VCCPLL:1.5A max
AK12
VCCPLL_2 POWER
VCC_64 VCC_145 change to 22u from 10u,add C690/C691/692,add 330uF
E30 L25
VCC_65 VCC_146 03/24 Jerry CPU_CORE
E31 L27
VCC_66 VCC_147 LGA1155
E33 L28
VCC_67 VCC_148
E34 L30
VCC_68 VCC_149
E35 M14
VCC_69 VCC_150
F15 M15
VCC_70 VCC_151
F16 M16

330uF/SP-cap
VCC_71 VCC_152 C31 C349 C29 C32 C340 C361

C707
F18 M18 +
VCC_72 VCC_153
F19 M19
VCC_73 VCC_154

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
F21 M21 0.925V_VCCSA 1.8V
VCC_74 VCC_155
F22 M22
VCC_75 VCC_156
F24 M24
VCC_76 VCC_157
F25 M25
VCC_77 VCC_158
F27 M27
VCC_78 VCC_159
F28 M28
VCC_79 VCC_160 C34 C25 C367 C373 C381 C38 C20 C16 C383 C377
F30 M30
VCC_80 VCC_161 CPU_CORE
F31
VCC_81
10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8
LGA1155
B B

C27 C345 C19 C335 C26 C17

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
CAD note: Place on back side
1.05V_VCCIO 1.05V_VCCIO

C334 C33 C362 C336 C12 C28 C40 C35 C369 C39 C36 C18 C15 C342
CPU_CORE
22u/6.3V_8

22u/6.3V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/6.3V_6

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

10u/10V_8

C23 C30 C355 C14 C360 C354 C690 C691 C692


22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
DESIGN NOTE:
NET PROCESSOR
CPU_CORE SVID
CPU_AXG SVID
A
1.05V_VCCIO 1.05V A

0.925V_VCCSA 0.925V
1.5V_S3 1.5V
1.8V 1.8V Quanta Computer Inc.
PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
SOCKET H2 VCCP
Date: Monday, July 04, 2011 Sheet 8 of 48
5 4 3 2 1
5 4 3 2 1

XU1I XU1J
A17 VSS_1 VSS_91 AM27 AV11 VSS_181 VSS_271 G8
A23 AM3 AV14 H1
A26
VSS_2 VSS_92
AM30 AV17
VSS_182 VSS_272
H17
DE NOTE:
VSS_3 VSS_93 VSS_183 VSS_273
A29
A35
VSS_4 VSS_94 AM36
AM37
AV3
AV35
VSS_184 VSS_274 H2
H20
DQ VREF OPTION 1 - VOLTAGE DIVIDER GENERATED -- Page 8
VSS_5 VSS_95 VSS_185 VSS_275
AA33
AA34
VSS_6 VSS_96 AM38
AM39
AV38
AV6
VSS_186 VSS_276 H23
H26
DQ VREF OPTION 2 - PROGRAMMABLE DAC GENERATED -- Removed
D VSS_7 VSS_97 VSS_187 VSS_277 D
AA35 VSS_8 VSS_98 AM4 AW10 VSS_188 VSS_278 H29 DQ VREF OPTION 3 - CPU GENERATED -- This Page
AA36 VSS_9 VSS_99 AM40 AW11 VSS_189 VSS_279 H33
AA37 VSS_10 VSS_100 AM5 AW14 VSS_190 VSS_280 H35 TO MAINTAIN CONSISTENCY
AA38 AN10 AW16 H37
AA6
VSS_11
VSS_12
VSS_101
VSS_102 AN11 AW36
VSS_191
VSS_192
VSS_281
VSS_282 H39 AH4 FOR CHANNEL A DDR_VREF, AH1 FOR CHANNEL B
AB5 VSS_13 VSS_103 AN14 AW6 VSS_193 VSS_283 H5
AC1 VSS_14 VSS_104 AN17 AY11 VSS_194 VSS_284 H6
AC6 VSS_15 VSS_105 AN19 AY14 VSS_195 VSS_285 H9
AD33 VSS_16 VSS_106 AN22 AY18 VSS_196 VSS_286 J11
AD36 VSS_17 VSS_107 AN24 AY35 VSS_197 VSS_287 J17
AD38 VSS_18 VSS_108 AN27 AY4 VSS_198 VSS_288 J20
AD39 VSS_19 VSS_109 AN30 AY6 VSS_199 VSS_289 J23
AD40 AN31 AY8 J26 XU1K
VSS_20 VSS_110 VSS_200 VSS_290 Z1501 DIMM_VREFB R53 *0R_4
AD5 VSS_21 VSS_111 AN32 B10 VSS_201 VSS_291 J29 TP58 1 AB7 RSVD_4 FC_AH1 AH1 VREF_DQ_DDRB [11]
AD8 AN33 B13 J32 TP32 1 Z1502 AD37 AH4 DIMM_VREFA
VSS_22 VSS_112 VSS_202 VSS_292 RSVD_5 FC_AH4 VREF_DQ_DDRA [11]
AE3 AN34 B14 K1 TP60 1 Z1503 AG4 R57 *0R_4
VSS_23 VSS_113 VSS_203 VSS_293 Z1504 RSVD_8 Z1521 C54 C53
AE33 VSS_24 VSS_114 AN35 B17 VSS_204 VSS_294 K12 TP51 1 AJ29 RSVD_10 RSVD_15 AT11 1 TP7
AE36 AN36 B23 K13 TP48 1 Z1505 AJ30 AP20 Z1522 1 TP52
VSS_25 VSS_115 VSS_205 VSS_295 Z1506 RSVD_11 RSVD_14 Z1523
AF1 VSS_26 VSS_116 AN5 B26 VSS_206 VSS_296 K14 TP47 1 AJ31 RSVD_12 RSVD_13 AN20 1 TP53

0.1u/25V_4

0.1u/25V_4
AF34 AN6 B29 K17 TP4 1 Z1507 AV34 AU10 Z1524 1 TP8
VSS_27 VSS_117 VSS_207 VSS_297 Z1508 RSVD_19 RSVD_17 Z1525
AF36 VSS_28 VSS_118 AN7 B32 VSS_208 VSS_298 K2 TP3 1 AW34 RSVD_21 RSVD_22 AY10 1 TP9
AF37 AN8 B35 K20 [43] VTT_SEL VTT_SEL P33
VSS_29 VSS_119 VSS_209 VSS_299 Z1509 RSVD_42
AF40 VSS_30 VSS_120 AN9 B38 VSS_210 VSS_300 K23 TP39 1 P35 RSVD_43 CAD NOTE: PLACE NEAR CPU PINS
AF5 AP1 B6 K26 TP29 1 Z1510 P37
VSS_31 VSS_121 VSS_211 VSS_301 Z1511 RSVD_44
AF6 VSS_32 VSS_122 AP11 C11 VSS_212 VSS_302 K29 TP19 1 P39 RSVD_45
AF7 AP14 C12 K33 TP46 1 Z1512 R34
VSS_33 VSS_123 VSS_213 VSS_303 Z1513 RSVD_46 Z1526
AG36 VSS_34 VSS_124 AP17 C17 VSS_214 VSS_304 K35 TP33 1 R36 RSVD_47 RSVD_7 AF4 1 TP61
AH2 AP22 C20 K37 TP27 1 Z1514 R38 AB6 Z1527 1 TP59
VSS_35 VSS_125 VSS_215 VSS_305 Z1515 RSVD_48 RSVD_3 Z1528
AH3 VSS_36 VSS_126 AP25 C23 VSS_216 VSS_306 K39 TP15 1 R40 RSVD_49 RSVD_6 AE6 1 TP57
C Z1529 C
AH33 VSS_37 VSS_127 AP27 C26 VSS_217 VSS_307 K5 RSVD_9 AJ11 1 TP56
AH36 VSS_38 VSS_128 AP30 C29 VSS_218 VSS_308 K6
AH37 AP36 C32 L10 TP30 1 Z1516 A38 D38 Z1530 1 TP37
VSS_39 VSS_129 VSS_219 VSS_309 Z1517 NCTF_1 RSVD_27 Z1531
AH38 VSS_40 VSS_130 AP37 C35 VSS_220 VSS_310 L17 TP1 1 AU40 NCTF_2 RSVD_26 C39 1 TP16
AH39 AP4 C7 L20 TP2 1 Z1518 AW38 C38 Z1532 1 TP24
VSS_41 VSS_131 VSS_221 VSS_311 Z1519 NCTF_3 RSVD_25 Z1533 R472
AH40 VSS_42 VSS_132 AP40 C8 VSS_222 VSS_312 L23 TP62 1 C2 NCTF_4 RSVD_31 J34 1 TP42
AH5 AP5 D17 L26 TP63 1 Z1520 D1 N34 PD_CPU_RSVD_4_N34 24.9R/F_4
VSS_43 VSS_133 VSS_223 VSS_313 NCTF_5 RSVD_41
AH8 VSS_44 VSS_134 AR11 D2 VSS_224 VSS_314 L29
AJ12 VSS_45 VSS_135 AR14 D20 VSS_225 VSS_315 L8 SPARES
AJ15 VSS_46 VSS_136 AR17 D23 VSS_226 VSS_316 M1
AJ18 AR18 D26 M17 LGA1155
VSS_47 VSS_137 VSS_227 VSS_317
AJ21 VSS_48 VSS_138 AR19 D29 VSS_228 VSS_318 M2
AJ25 VSS_49 VSS_139 AR27 D32 VSS_229 VSS_319 M20 DE NOTE:
AJ27 VSS_50 VSS_140 AR30 D37 VSS_230 VSS_320 M23 STUFF ALL FOUR EMPTY RESISTOR,AND THE UPSTREAM ONE TO USE CPU VREF DQ B TO DRIVE VREF CA A AND B
AJ36 VSS_51 VSS_141 AR36 D39 VSS_231 VSS_321 M26 NEED TO UNSTUFF THE APPROPRIATE RESISTORS ON PAGE 16 AND 17
AJ5 VSS_52 VSS_142 AR5 D4 VSS_232 VSS_322 M29
AK1 AT1 D5 M33 STUFF THE LOWER THREE EMPTY RESISTOR TO USE DIG. POT. VREF DQ B TO DRIVE VREF CA A AND B
VSS_53 VSS_143 VSS_233 VSS_323
AK10 VSS_54 VSS_144 AT10 D9 VSS_234 VSS_324 M35 NEED TO UNSTUFF THE APPROPRIATE RESISTORS ON PAGE 16 AND 17
AK13 VSS_55 VSS_145 AT12 E11 VSS_235 VSS_325 M37
AK14 VSS_56 VSS_146 AT13 E12 VSS_236 VSS_326 M39
AK16 VSS_57 VSS_147 AT15 E17 VSS_237 VSS_327 M5
AK22 VSS_58 VSS_148 AT16 E20 VSS_238 VSS_328 M6
AK28 VSS_59 VSS_149 AT17 E23 VSS_239 VSS_329 M9
AK31 VSS_60 VSS_150 AT2 E26 VSS_240 VSS_330 N8
AK32 VSS_61 VSS_151 AT25 E29 VSS_241 VSS_331 P1
AK33 VSS_62 VSS_152 AT27 E32 VSS_242 VSS_332 P2
AK34 VSS_63 VSS_153 AT28 E36 VSS_243 VSS_333 P36
U35 U36
AK35 VSS_64 VSS_154 AT29 E7 VSS_244 VSS_334 P38
AK36 VSS_65 VSS_155 AT3 E8 VSS_245 VSS_335 P40
B AK37 AT30 F1 P5 B
VSS_66 VSS_156 VSS_246 VSS_336
AK4 VSS_67 VSS_157 AT31 F10 VSS_247 VSS_337 P6
AK40 VSS_68 VSS_158 AT32 F13 VSS_248 VSS_338 R33
AK5 VSS_69 VSS_159 AT33 F14 VSS_249 VSS_339 R35
AK6 VSS_70 VSS_160 AT34 F17 VSS_250 VSS_340 R37
AK7 VSS_71 VSS_161 AT35 F2 VSS_251 VSS_341 R39
AK8 VSS_72 VSS_162 AT36 F20 VSS_252 VSS_342 R8
AK9 AT37 F23 T1 CPU Frame Cover/31BOM
VSS_73 VSS_163 VSS_253 VSS_343
AL11 VSS_74 VSS_164 AT38 F26 VSS_254 VSS_344 T5
AL14 VSS_75 VSS_165 AT39 F29 VSS_255 VSS_345 T6
AL17 VSS_76 VSS_166 AT4 F35 VSS_256 VSS_346 U8
AL19 AT40 F37 V1 CPU BKT/31BOM
VSS_77 VSS_167 VSS_257 VSS_347
AL24 VSS_78 VSS_168 AT5 F39 VSS_258 VSS_348 V2
AL27 VSS_79 VSS_169 AT6 F5 VSS_259 VSS_349 V33
AL30 VSS_80 VSS_170 AT7 F6 VSS_260 VSS_350 V34
AL36 VSS_81 VSS_171 AT8 F9 VSS_261 VSS_351 V35
AL5 VSS_82 VSS_172 AT9 G11 VSS_262 VSS_352 V36
AM1 VSS_83 VSS_173 AU1 G12 VSS_263 VSS_353 V37
AM11 VSS_84 VSS_174 AU15 G17 VSS_264 VSS_354 V38
AM14 VSS_85 VSS_175 AU26 G20 VSS_265 VSS_355 V39
AM17 VSS_86 VSS_176 AU34 G23 VSS_266 VSS_356 V40
AM2 VSS_87 VSS_177 AU4 G26 VSS_267 VSS_357 V5
AM21 VSS_88 VSS_178 AU6 G29 VSS_268 VSS_358 W6
AM23 VSS_89 VSS_179 AU8 G34 VSS_269 VSS_359 Y5
AM25 VSS_90 VSS_180 AV10 G7 VSS_270 VSS_360 Y8
A4 VSS_NCTF_1 VSS_NCTF_2 AV39 AY37 VSS_NCTF_3 VSS_NCTF_4 B3

LGA1155 LGA1155

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
SOCKET H2 GND
Date: Monday, July 04, 2011 Sheet 9 of 48
5 4 3 2 1
1 2 3 4 5 6 7 8

1.05V_VCCIO 1.05V_VCCIO

CN2
1 2
XDP_CPU_PREQ_N 1 2
[7] XDP_CPU_PREQ_N 3 3 4 4
XDP_CPU_PRDY_N 5 6
[7] XDP_CPU_PRDY_N 5 6
[7] XDP_CPU_MBP_N[0:7] 7 8
XDP_CPU_MBP_N0 7 8
9 10
XDP_CPU_MBP_N1 9 10
11 12
11 12
13 14
XDP_CPU_MBP_N2 13 14
A 15 16 A
XDP_CPU_MBP_N3 15 16
17 17 18 18
19 20 1.05V_VCCIO
19 20
21 21 22 22
23 23 24 24
25 25 26 26
XDP_CPU_MBP_N4 27 28
XDP_CPU_MBP_N5 27 28 R461
29 29 30 30 NOTE: PLACE
31 32 51R/F_4 NEXT TO XDP
XDP_CPU_MBP_N6 31 32
33 34
XDP_CPU_MBP_N7 33 34
35 36
35 36
37 38
H_PWRGD R24 *1K/F_4 XDP_PWRGD 37 38 CLK_100M_XDP_HEADER_DP
[7,16] H_PWRGD 39 39 40 40 CLK_100M_XDP_HEADER_DP [12]
[16,37] EC_PWRBTN_OUT# R25 *0R_4 XDP_BP_PWRGD_RST_N 41 42 CLK_100M_XDP_HEADER_DN
41 42 CLK_100M_XDP_HEADER_DN [12]
43 44
PD_TEST_CPU_0 R464 *1K/F_4 XDP_CPU_EAR_R 43 44 XDP_CPU_RST_N R462 *1K/F_4 PLTRST_CPU_N
[7] PD_TEST_CPU_0 45 46 PLTRST_CPU_N [7,16]
R26 *0R_4 XDP_SYS_PWROK_R_N 45 46
[16] PCH_SYSPWROK 47 48
47 48
49 50
SMB_DAT_DEVICE R27 *0R_4 XDP_CPU_SMBDAT 49 50 XDP_CPU_TDO
[11,16,31,35] SMB_DAT_DEVICE 51 52 XDP_CPU_TDO [7]
SMB_CLK_DEVICE R28 *0R_4 XDP_CPU_SMBCLK 51 52 XDP_CPU_TRST_N
[11,16,31,35] SMB_CLK_DEVICE 53 53 54 54 XDP_CPU_TRST_N [7]
55 56 XDP_CPU_TDI
55 56 XDP_CPU_TDI [7]
XDP_CPU_TCLK0 57 58 XDP_CPU_TMS
[7] XDP_CPU_TCLK0 57 58 XDP_CPU_TMS [7]
59 60 PU_XDP_CPU_PRESENT_N 3V_S5
59 60 R1 *1K/F_4
C308 *CN XDP SMD 60P(P0.5,H3.25)

*1u/6.3V_4
B B
<Sean0327> add *

3V_S5 3V_S5

CN4
1 2
1 2
3 4
3 4
5 6
5 6
7 8
7 8
9 10
9 10
11 12
11 12
13 14
13 14
15 15 16 16
17 18
17 18
19 20
19 20
21 22
21 22
23 24
23 24
25 26
25 26 3V_S5
27 28
27 28
29
29 30
30 NOTE: PLACE
31 32 1.05V
31 32 NEXT TO XDP
33 34 R35
33 34
35 36
35 36
37 37 38 38
R41 *1K/F_4 PCH_PWRGD_XDP 39 40 P1V05_AUX_XDP_PCH_HK4 R40 *0R_4
[15,16] PCH_PWRGD 39 40
EC_PWRBTN_OUT# R39 *0R_4 XDP_PCH_HK1 41 42 TP_HOOK5 1 TP34 150R/F_4
41 42
43 44
PCH_XDP_100M 43 44 XDP_PCH_RST_N R38 *1K/F_4 PLTRST_CPU_N
[12] PCH_XDP_100M 45 45 46 46
PCH_XDP_100M# 47 48
[12] PCH_XDP_100M# 47 48
49 50
SMB_DAT_DEVICE R37 *0R_4 XDP_PCH_SMBDAT 49 50 XDP_PCH_TDO
51 51 52 52 XDP_PCH_TDO [16]
SMB_CLK_DEVICE R34 *0R_4 XDP_PCH_SMBCLK 53 54 TP_TRST_N 1 TP23
TP_XDP_PCH_TCK1 53 54 XDP_PCH_TDI
C TP21 1 55 56 XDP_PCH_TDI [16] C
XDP_PCH_TCK0 55 56 XDP_PCH_TMS
[16] XDP_PCH_TCK0 57 58 XDP_PCH_TMS [16]
57 58 PU_XDP_PCH_PRESENT_N R36
59 60
59 60 75R/F_4
C6 *CN XDP SMD 60P(P0.5,H3.25) R32 *1K/F_4 3V_S5

*1u/6.3V_4

D D

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
SOCKET H2 XDP
Date: Monday, July 04, 2011 Sheet 10 of 48

www.vinafix.vn
1 2 3 4 5 6 7 8
5 4 3 2 1

CHANNEL A DIMM 0 CHANNEL B DIMM 2 M_B_DQ[63:0] [5]

[5] M_B_A[15:0] JDIM1A


M_A_DQ[63:0] [5] 1.5V_S3 1.5V_S3
M_B_A0 98 5 M_B_DQ0
[5] M_A_A[15:0] JDIM2A JDIM2B A0 DQ0
M_B_A1 97 7 M_B_DQ1
M_A_A0 M_A_DQ0 M_B_A2 A1 DQ1 M_B_DQ2
98 5 75 44 96 15 JDIM1B
M_A_A1 A0 DQ0 M_A_DQ1 VDD1 VSS16 M_B_A3 A2 DQ2 M_B_DQ3
97 7 76 48 95 17
M_A_A2 A1 DQ1 M_A_DQ2 VDD2 VSS17 M_B_A4 A3 DQ3 M_B_DQ4
96 15 81 49 92 4 75 44
M_A_A3 A2 DQ2 M_A_DQ3 VDD3 VSS18 M_B_A5 A4 DQ4 M_B_DQ5 VDD1 VSS16
95 17 82 54 91 6 76 48
M_A_A4 A3 DQ3 M_A_DQ4 VDD4 VSS19 M_B_A6 A5 DQ5 M_B_DQ6 VDD2 VSS17
92 4 87 55 90 16 81 49
M_A_A5 A4 DQ4 M_A_DQ5 C388C372C368C378 VDD5 VSS20 M_B_A7 A6 DQ6 M_B_DQ7 VDD3 VSS18
91 6 88 60 86 18 82 54
M_A_A6 A5 DQ5 M_A_DQ6 VDD6 VSS21 M_B_A8 A7 DQ7 M_B_DQ8 VDD4 VSS19
90 16 93 61 89 21 87 55
A6 DQ6 VDD7 VSS22 A8 DQ8 VDD5 VSS20

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4
M_A_A7 86 18 M_A_DQ7 94 65 M_B_A9 85 23 M_B_DQ9 C384C356C363C343 88 60
M_A_A8 A7 DQ7 M_A_DQ8 VDD8 VSS23 M_B_A10 A9 DQ9 M_B_DQ10 VDD6 VSS21
89 21 99 66 107 33 93 61
A8 DQ8 VDD9 VSS24 A10/AP DQ10 VDD7 VSS22

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4
M_A_A9 85 23 M_A_DQ9 100 71 M_B_A11 84 35 M_B_DQ11 94 65
M_A_A10 A9 DQ9 M_A_DQ10 VDD10 VSS25 M_B_A12 A11 DQ11 M_B_DQ12 VDD8 VSS23
107 33 105 72 83 22 99 66
D
M_A_A11 A10/AP DQ10 M_A_DQ11 VDD11 VSS26 M_B_A13 A12/BC# DQ12 M_B_DQ13 VDD9 VSS24 D
84 35 106 127 119 24 100 71
A11 DQ11 VDD12 VSS27 A13 DQ13 VDD10 VSS25

PC2100 DDR3 SDRAM SO-DIMM


M_A_A12 83 22 M_A_DQ12 111 128 M_B_A14 80 34 M_B_DQ14 105 72
M_A_A13 A12/BC# DQ12 M_A_DQ13 VDD13 VSS28 M_B_A15 A14 DQ14 M_B_DQ15 VDD11 VSS26
119 24 112 133 78 36 106 127
A13 DQ13 VDD14 VSS29 A15 DQ15 VDD12 VSS27

PC2100 DDR3 SDRAM SO-DIMM


M_A_A14 80 34 M_A_DQ14 117 134 39 M_B_DQ16 111 128

PC2100 DDR3 SDRAM SO-DIMM


M_A_A15 A14 DQ14 M_A_DQ15 VDD15 VSS30 M_BA_B0 DQ16 M_B_DQ17 VDD13 VSS28
78 36 118 138 [5] M_BA_B0 109 41 112 133
A15 DQ15 M_A_DQ16 VDD16 VSS31 M_BA_B1 BA0 DQ17 M_B_DQ18 VDD14 VSS29
39 123 139 108 51 117 134

PC2100 DDR3 SDRAM SO-DIMM


DQ16 VDD17 VSS32 [5] M_BA_B1 BA1 DQ18 VDD15 VSS30
[5] M_BA_A0 M_BA_A0 109 41 M_A_DQ17 124 144 [5] M_BA_B2 M_BA_B2 79 53 M_B_DQ19 118 138
M_BA_A1 BA0 DQ17 M_A_DQ18 VDD18 VSS33 M_CS#_B0 BA2 DQ19 M_B_DQ20 VDD16 VSS31
[5] M_BA_A1 108 51 145 [5] M_CS#_B0 114 40 123 139
M_BA_A2 BA1 DQ18 M_A_DQ19 VSS34 M_CS#_B1 S0# DQ20 M_B_DQ21 VDD17 VSS32
[5] M_BA_A2 79 53 3.3V 199 150 [5] M_CS#_B1 121 42 124 144
M_CS#_A0 BA2 DQ19 M_A_DQ20 VDDSPD VSS35 M_CLK_DDR_B0 S1# DQ21 M_B_DQ22 VDD18 VSS33
[5] M_CS#_A0 114 40 151 [5] M_CLK_DDR_B0 101 50 145
M_CS#_A1 S0# DQ20 M_A_DQ21 VSS36 M_CLK_DDR#_B0 CK0 DQ22 M_B_DQ23 VSS34
[5] M_CS#_A1 121 42 77 155 [5] M_CLK_DDR#_B0 103 52 3.3V 199 150
M_CLK_DDR_A0 S1# DQ21 M_A_DQ22 NC1 VSS37 M_CLK_DDR_B1 CK0# DQ23 M_B_DQ24 VDDSPD VSS35
[5] M_CLK_DDR_A0 101 50 122 156 [5] M_CLK_DDR_B1 102 57 151
M_CLK_DDR#_A0 CK0 DQ22 M_A_DQ23 NC2 VSS38 M_CLK_DDR#_B1 CK1 DQ24 M_B_DQ25 VSS36
[5] M_CLK_DDR#_A0 103 52 125 161 [5] M_CLK_DDR#_B1 104 59 77 155
M_CLK_DDR_A1 CK0# DQ23 M_A_DQ24 NCTEST VSS39 M_CKE_B0 CK1# DQ25 M_B_DQ26 NC1 VSS37
[5] M_CLK_DDR_A1 102 57 162 [5] M_CKE_B0 73 67 122 156
M_CLK_DDR#_A1 CK1 DQ24 M_A_DQ25 PM_EXTTS#0 VSS40 M_CKE_B1 CKE0 DQ26 M_B_DQ27 NC2 VSS38
[5] M_CLK_DDR#_A1 104 59 198 167 [5] M_CKE_B1 74 69 125 161
M_CKE_A0 CK1# DQ25 M_A_DQ26 DDR3_DRAMRST# EVENT# VSS41 M_B_CAS# CKE1 DQ27 M_B_DQ28 NCTEST VSS39
[5] M_CKE_A0 73 67 [5] DDR3_DRAMRST# 30 168 [5] M_B_CAS# 115 56 162
M_CKE_A1 CKE0 DQ26 M_A_DQ27 RESET# VSS42 M_B_RAS# CAS# DQ28 M_B_DQ29 PM_EXTTS#1 VSS40
[5] M_CKE_A1 74 69 172 [5] M_B_RAS# 110 58 198 167
M_A_CAS# CKE1 DQ27 M_A_DQ28 VSS43 M_B_WE# RAS# DQ29 M_B_DQ30 DDR3_DRAMRST# EVENT# VSS41
[5] M_A_CAS# 115 56 173 [5] M_B_WE# 113 68 30 168
M_A_RAS# CAS# DQ28 M_A_DQ29 VREF_DQ_DDRA VSS44 SA0_B_0 WE# DQ30 M_B_DQ31 RESET# VSS42
[5] M_A_RAS# 110 58 [9] VREF_DQ_DDRA 1 178 197 70 172
M_A_WE# RAS# DQ29 M_A_DQ30 VREF_CA_DDRA VREF_DQ VSS45 SA1_B_0 SA0 DQ31 M_B_DQ32 VSS43
[5] M_A_WE# 113 68 126 179 201 129 173
SA0_A_0 WE# DQ30 M_A_DQ31 VREF_CA VSS46 SMB_CLK_DEVICE SA1 DQ32 M_B_DQ33 VREF_DQ_DDRB VSS44
197 70 184 [10,16,31,35] SMB_CLK_DEVICE 202 131 [9] VREF_DQ_DDRB 1 178
SA1_A_0 SA0 DQ31 M_A_DQ32 VSS47 SMB_DAT_DEVICE SCL DQ33 M_B_DQ34 VREF_CA_DDRB VREF_DQ VSS45
201 129 185 [10,16,31,35] SMB_DAT_DEVICE 200 141 126 179
SMB_CLK_DEVICE SA1 DQ32 M_A_DQ33 VSS48 SDA DQ34 M_B_DQ35 VREF_CA VSS46
202 131 2 189 143 184
SMB_DAT_DEVICE SCL DQ33 M_A_DQ34 3.3V VSS1 VSS49 M_ODT_B0 DQ35 M_B_DQ36 VSS47
200 141 3 190 [5] M_ODT_B0 116 130 185
SDA DQ34 M_A_DQ35 VSS2 VSS50 M_ODT_B1 ODT0 DQ36 M_B_DQ37 VSS48
143 8 195 [5] M_ODT_B1 120 132 2 189

(204P)
M_ODT_A0 DQ35 M_A_DQ36 VSS3 VSS51 ODT1 DQ37 M_B_DQ38 3.3V VSS1 VSS49
[5] M_ODT_A0 116 130 9 196 140 3 190
M_ODT_A1 ODT0 DQ36 M_A_DQ37 VSS4 VSS52 DQ38 M_B_DQ39 VSS2 VSS50
[5] M_ODT_A1 120 132 13 11 142 8 195

(204P)
ODT1 DQ37 M_A_DQ38 VSS5 DM0 DQ39 M_B_DQ40 VSS3 VSS51
140 14 28 147 9 196
DQ38 M_A_DQ39 C327 C329 VSS6 DM1 DQ40 M_B_DQ41 VSS4 VSS52
11 142 19 46 149 13

(204P)
DM0 DQ39 M_A_DQ40 VSS7 DM2 DQ41 M_B_DQ42 VSS5
28 147 20 63 157 14
DM1 DQ40 M_A_DQ41 VSS8 DM3 DQ42 M_B_DQ43 C313 C314 VSS6
46 149 25 136 159 19
(204P)

DM2 DQ41 VSS9 DM4 DQ43 VSS7

0.1U/16V_4

0.1u/16V_4
63 157 M_A_DQ42 26 203 SMDDR_VTERM 153 146 M_B_DQ44 20
DM3 DQ42 M_A_DQ43 VSS10 VTT1 DM5 DQ44 M_B_DQ45 VSS8
136 159 31 204 170 148 25
DM4 DQ43 VSS11 VTT2 DM6 DQ45 VSS9

0.1u/16V_4

0.1u/16V_4
153 146 M_A_DQ44 32 187 158 M_B_DQ46 26 203 SMDDR_VTERM
DM5 DQ44 M_A_DQ45 VSS12 DM7 DQ46 M_B_DQ47 VSS10 VTT1
170 148 37 205 160 31 204
DM6 DQ45 M_A_DQ46 VSS13 GND M_B_DQS0 DQ47 M_B_DQ48 VSS11 VTT2
187 158 38 206 [5] M_B_DQS0 12 163 32
DM7 DQ46 M_A_DQ47 VSS14 GND M_B_DQS1 DQS0 DQ48 M_B_DQ49 VSS12
160 43 [5] M_B_DQS1 29 165 37 205
M_A_DQS0 DQ47 M_A_DQ48 VSS15 M_B_DQS2 DQS1 DQ49 M_B_DQ50 VSS13 GND
C
[5] M_A_DQS0 12 163 [5] M_B_DQS2 47 175 38 206 C
M_A_DQS1 DQS0 DQ48 M_A_DQ49 M_B_DQS3 DQS2 DQ50 M_B_DQ51 VSS14 GND
[5] M_A_DQS1 29 165 [5] M_B_DQS3 64 177 43
M_A_DQS2 DQS1 DQ49 M_A_DQ50 DDR3-DIMM0_H=5.2_RVS M_B_DQS4 DQS3 DQ51 M_B_DQ52 VSS15
[5] M_A_DQS2 47 175 [5] M_B_DQS4 137 164
M_A_DQS3 DQS2 DQ50 M_A_DQ51 M_B_DQS5 DQS4 DQ52 M_B_DQ53
[5] M_A_DQS3 64 177 [5] M_B_DQS5 154 166
M_A_DQS4 DQS3 DQ51 M_A_DQ52 M_B_DQS6 DQS5 DQ53 M_B_DQ54 DDR3-DIMM0_H=9.2_RVS
[5] M_A_DQS4 137 164 [5] M_B_DQS6 171 174
M_A_DQS5 DQS4 DQ52 M_A_DQ53 M_B_DQS7 DQS6 DQ54 M_B_DQ55
[5] M_A_DQS5 154 166 [5] M_B_DQS7 188 176
M_A_DQS6 DQS5 DQ53 M_A_DQ54 M_B_DQS#0 DQS7 DQ55 M_B_DQ56
[5] M_A_DQS6 171 174 [5] M_B_DQS#0 10 181
M_A_DQS7 DQS6 DQ54 M_A_DQ55 M_B_DQS#1 DQS#0 DQ56 M_B_DQ57
[5] M_A_DQS7 188 176 [5] M_B_DQS#1 27 183
M_A_DQS#0 DQS7 DQ55 M_A_DQ56 M_B_DQS#2 DQS#1 DQ57 M_B_DQ58
[5] M_A_DQS#0 10 181 [5] M_B_DQS#2 45 191
M_A_DQS#1 DQS#0 DQ56 M_A_DQ57 M_B_DQS#3 DQS#2 DQ58 M_B_DQ59
[5] M_A_DQS#1 27 183 [5] M_B_DQS#3 62 193
M_A_DQS#2 DQS#1 DQ57 M_A_DQ58 M_B_DQS#4 DQS#3 DQ59 M_B_DQ60
[5] M_A_DQS#2 45 191 [5] M_B_DQS#4 135 180
M_A_DQS#3 DQS#2 DQ58 M_A_DQ59 M_B_DQS#5 DQS#4 DQ60 M_B_DQ61
[5] M_A_DQS#3 62 193 [5] M_B_DQS#5 152 182
M_A_DQS#4 DQS#3 DQ59 M_A_DQ60 M_B_DQS#6 DQS#5 DQ61 M_B_DQ62
[5] M_A_DQS#4 135 180 [5] M_B_DQS#6 169 192
M_A_DQS#5 DQS#4 DQ60 M_A_DQ61 M_B_DQS#7 DQS#6 DQ62 M_B_DQ63
[5] M_A_DQS#5 152 182 [5] M_B_DQS#7 186 194
M_A_DQS#6 DQS#5 DQ61 M_A_DQ62 DQS#7 DQ63
[5] M_A_DQS#6 169 192
M_A_DQS#7 DQS#6 DQ62 M_A_DQ63
[5] M_A_DQS#7 186 194
DQS#7 DQ63 DDR3-DIMM0_H=9.2_RVS

DDR3-DIMM0_H=5.2_RVS

Place these Caps near So-Dimm0. 3.3V Place these Caps near So-Dimm0.
1.5V_S3
3.3V 1.5V_S3
R468 *10K/F_4 PM_EXTTS#1

R465 *10K/F_4 PM_EXTTS#0 C374 C379 C364 C375 C348 C352 C382 C350 C346 C358 C370 C13
C371 C376 C347 C357 C380 C386 C391 C359 C365 C351 C393 C37

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

560u/2.5V_6357
10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6
1.5V_S3
10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

560u/2.5V_6357

B 1.5V_S3 B

R488 C366 C392 C394 C395


R487
1K/F_4

2.2u/6.3V_6

0.1u/16V_4

0.1u/16V_4
1K/F_4

2.2u/6.3V_6
3.3V SMDDR_VTERM 3.3V SMDDR_VTERM

C330 C328 C309 C319 C318 C310 C325 C324 C326 C320 C315 C311 C312 C317 C316 C323 C321 C322
R486 0R_4 VREF_DQ_DDRB
JDIM2 JDIM1
0.1u/16V_4

2.2u/6.3V_6 0.1u/16V_4
2.2u/6.3V_6

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

10u/6.3V_6

10u/6.3V_6

10u/6.3V_6
R484 0R_4 VREF_DQ_DDRA
R489 C396 C398
(CHB) (CHA)

1K/F_4

0.1u/16V_4

0.1u/16V_4
C399 C397
R485
1K/F_4

0.1u/16V_4

0.1u/16V_4

maybe can save maybe can save

1.5V_S3
SPD SA0 0 SPD SA0 0
1.5V_S3

R477 C385 C389


SPD SA1 0 SPD SA1 1

1K/F_4

2.2u/6.3V_6

0.1u/16V_4
C390 C387
R476
2.2u/6.3V_6

0.1u/16V_4
1K/F_4

A R467 0R_4 SA1_A_0 A


R466 0R_4 SA0_A_0 R470 0R_4 SA0_B_0
3.3V R469 0R_4 SA1_B_0

R480 0R_4 VREF_CA_DDRB


10: 9.2mm

00: 5.2mm

R479 VREF_CA_DDRA
R478 C337 C339
0R_4

1K/F_4

0.1u/16V_4

0.1u/16V_4
C344 C341
R475
Quanta Computer Inc.
0.1u/16V_4

0.1u/16V_4
1K/F_4

PROJECT : QUA
Size Document Number Rev
1A
DDR3 SODIMM 00/10
Date: Monday, July 04, 2011 Sheet 11 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

C563 10p/50V_4 PCICLK_DB U6H


R27 PCHCLK_N R577 10K_4
C284 10p/50V_4 PCLK_EC TP__CLK_33M CLKIN_GND1_N PCHCLK_P R576 10K_4
TP138 1 AT11 CLKOUT_PCI0 CLKIN_GND1_P P27
<Sean0327> add *
C573 10p/50V_4 CLK_33M_PCH R606 *22R/F_4 TPMPCICLK_R AN14 W53 CK_CSI_PCH_IN_DN R85 10K_4
CLKOUT_PCI1 CLKIN_GND0_N CK_CSI_PCH_IN_DP R117 10K_4
CLKIN_GND0_P V52
PCICLK_DB R610 22R/F_4 PCICLK_DB_R AT12
[33] PCICLK_DB CLKOUT_PCI2
R52 CLK_100M_PCH_CPUXDP_DN_R
PCLK_EC R600 22R/F_4 PCLK_EC_R CLKOUT_ITPXDP_N CLK_100M_PCH_CPUXDP_DP_R
[37] PCLK_EC AT17 CLKOUT_PCI3 CLKOUT_ITPXDP_P N52
D D
CLK_33M_PCH R604 22R/F_4 CLK_33M_PCH_R AT14 AE2
[19] CLK_33M_PCH CLKOUT_PCI4 CLKOUT_PCIE7N CLK_PCIE_WLAN_N [33]
CLKOUT_PCIE7P AF1 CLK_PCIE_WLAN_P [33]
<Sean0327> add P31 CLK_100M_CPU# [7]
CLK_48_USB30_PCH CLKOUT_DMI_N
USB3@ TP133 1 AT9 R31 CLK_100M_CPU [7]
R270 *22R/F_4 CLK_27_GPU_PCH CLKOUTFLEX0/GPIO64 CLKOUT_DMI_P
[23] CLKOUT_SS27M BA5 CLKOUTFLEX1/GPIO65
R268 USB#@22R/F_4 CLKOUT_25M_R AW5 N56
[36] CLKOUT_25M CLKOUTFLEX2/GPIO66 CLKOUT_DP_N
<Sean0327> add R269 DIS@90.9R/F_4 CLK_NONSS27_GPU_PCH_RBA2 M55
R298 DIS@0R_4 R299 DIS@110R/F_4 CLKOUTFLEX3/GPIO67 CLKOUT_DP_P
DIS@
[23] CLKOUT_NONSS27M
CLKOUT_PCIE0N AE6 CLK_PCIE_TV_N [33]
VCC1.05_VCCDIFFCLKN VCC1.05_VCCDIFFCLKN R640 90.9R/F_4 PU_PCH_XCLK_RCOMP AL2 AC6
XCLK_RCOMP CLKOUT_PCIE0P CLK_PCIE_TV_P [33]
CLK_14M_PCH AN8 AA5
REFCLK14IN CLKOUT_PCIE1N CLK_PCIE_LAN_N [33]
CLKOUT_PCIE1P W5 CLK_PCIE_LAN_P [33]

CLKOUT_PCIE2N AB12 CLK_PCIE_CR_N [32]


CLKOUT_PCIE2P AB14 CLK_PCIE_CR_P [32]
R630 XTAL_25M_PCH_R_OUT R260 0R_4 XTAL_25M_PCH_OUT AJ5 AB9
XTAL25_OUT CLKOUT_PCIE3N CLK_PCIE_USB3_N [36]
10K_4 AB8
CLKOUT_PCIE3P CLK_PCIE_USB3_P [36]
XTAL_25M_PCH_R_IN R261 0R_4 XTAL_25M_PCH_IN AJ3 XTAL25_IN PE4_REFCLK_RN TP134
CLKOUT_PCIE4N Y9 1
C Y8 PE4_REFCLK_RP 1 TP135 C
R291 1M/F_4 CLKOUT_PCIE4P
DESIGN NOTE: AF3
CLKOUT_PCIE5N
Y4 STUFF ALWAYS CLKOUT_PCIE5P AG2

1 2 DESIGN NOTE: CLKOUT_PCIE6N AB3 PCH_XDP_100M# [10]


25MHz/30PPM AA2
R89 DAMPING RESISTOR DO NOT CHANGE TO 0402. CLKOUT_PCIE6P PCH_XDP_100M [10]
BG625000737/BG625000486
<SEAN0331> Y4C193
add Main Source CLKOUT_PEG_A_N AG8 CLK_PCIE_VGA_N [22]
C194 AG9
CLKOUT_PEG_A_P CLK_PCIE_VGA_P [22]
27p/50V_4

27p/50V_4

CLKOUT_PEG_B_N AE12
CLKOUT_PEG_B_P AE11
CLK_33M_PCH_R for ESD
Jerry 0517
D26 CUGARPOINT

*VPORT 0603 220K-V05


GND
CAD NOTE:
PLACE RESISTORS NEAR CPU AND XDP HEADER AND OVERLAP COMMON PAD
B B

Co-Layout
R107 *0R_4 CLK_100M_PCH_CPUXDP_DN_R R115 0R_4
[10] CLK_100M_XDP_HEADER_DN CLK_100M_CPU_ITP_DN [7]
R106 *0R_4 CLK_100M_PCH_CPUXDP_DP_R R114 0R_4
[10] CLK_100M_XDP_HEADER_DP CLK_100M_CPU_ITP_DP [7]

A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
PCH-CLOCK
Date: Monday, July 04, 2011 Sheet 12 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

C191 *UMA@10p/50V_4

NOTE: R266 UMA@33R/F_4 HSYNC [31]


HPD[2:0] ARE 3.3V TOLERANT R265 UMA@33R/F_4 VSYNC [31]
U6F <sean0327> modify UMA_V@ -->
UMA@ *UMA@10p/50V_4
R278 UMA@0R_4 PCH_HDMI_B_HPD T1 AR4 INT_HSYNC C190
D [35] TMDSB_HOT_PLUG DDPB_HPD CRT_HSYNC D
N2 AR2 INT_VSYNC
R276 UMA@0R_4 PCH_DP_D_HPD DDPC_HPD CRT_VSYNC
[35] DP_HPD M1 DDPD_HPD
<sean0327> AN6 INT_CRT_RED R296 UMA@0R_4 VGA_RED [31]
modify TP_DDSP_AUXP0 CRT_RED INT_CRT_GRE R295 UMA@0R_4
TP137 1 R8 DDPB_AUXP CRT_GREEN AN2 VGA_GREEN [31]
TP130 1 TP_DDSP_AUXN0 R9 AM1 INT_CRT_BLU R294 UMA@0R_4 VGA_BLUE [31]
DDPB_AUXN CRT_BLUE
U14 DDPC_AUXP
U12 AM6 PD_PCH_CRT_IRTN Layout Note:close to PCH
DDPC_AUXN CRT_IRTN
[35] AUX_CN_P N6 DDPD_AUXP
R6 AW1 INT_CRT_DDCDAT
[35] AUX_CN_N DDPD_AUXN CRT_DDC_DATA
AW3 INT_CRT_DDCCLK CRT R639
X7R CRT_DDC_CLK 0R_4 R262 R263 R264
UMA@0.1u/16V_4 C256 TMDSB_DATA2_C+ R14 AT3 PD_PCH_CRT_DAC_IREF UMA@150R/F_4 UMA@150R/F_4
[35] TMDSB_DATA2+ DDPB_0P DAC_IREF
UMA@0.1u/16V_4 C257 TMDSB_DATA2_C- R12
[35] TMDSB_DATA2- DDPB_0N
UMA@0.1u/16V_4 C260 TMDSB_DATA1_C+ M11 UMA@150R/F_4
[35] TMDSB_DATA1+ DDPB_1P
UMA@0.1u/16V_4 C261 TMDSB_DATA1_C- M12 Y18 Z3901 1 TP112
[35] TMDSB_DATA1- DDPB_1N TP6
UMA@0.1u/16V_4 C254 TMDSB_DATA0_C+ H8 Y17 Z3902 1 TP116 R633
[35] TMDSB_DATA0+ DDPB_2P TP7
UMA@0.1u/16V_4 C255 TMDSB_DATA0_C- K8 AB18 Z3903 1 TP117 1K/F_4
[35] TMDSB_DATA0- DDPB_2N TP8
UMA@0.1u/16V_4 C258 TMDSB_CLK_C+ L5 AB17 Z3904 1 TP118
[35] TMDSB_CLK+ DDPB_3P TP9
UMA@0.1u/16V_4 C259 TMDSB_CLK_C- M3
[35] TMDSB_CLK- DDPB_3N
L2 DDPC_0P
J3 AL12 MB_DPC_SCL 1 TP126
DDPC_0N DDPC_CTRLCLK MB_DPC_SDA
G2 DDPC_1P DDPC_CTRLDATA AL14 1 TP122
G4 DDPC_1N
F3 AL9 DDPD_CTRL_CLK
DDPC_2P DDPD_CTRLCLK DDPD_CTRL_DATA eDP DDC
F5 DDPC_2N DDPD_CTRLDATA AL8
E4
eDP is enabled on the desktop PCH on digital display interface Port-D only E2
DDPC_3P
AL15 SDVO_CLK_TMDSB
DDPC_3N SDVO_CTRLCLK SDVO_CLK_TMDSB [35]
D5 AL17 SDVO_DATA_TMDSB HDMI DDC to Levelshifter
C [35] DP_LANE0_P DDPD_0P SDVO_CTRLDATA SDVO_DATA_TMDSB [35] C
[35] DP_LANE0_N B5 DDPD_0N
[35] DP_LANE1_P C6 DDPD_1P
[35] DP_LANE1_N D7 DDPD_1N
TP128 1 B7 DDPD_2P
TP129 1 C9 <sean0327> modify UMA_V@ --> 3.3V
DDPD_2N UMA@
TP123 1 E11 DDPD_3P
TP125 1 B11 DDPD_CTRL_CLK R609 UMA@2.2K_4
DDPD_3N
DDPD_CTRL_DATA R641 UMA@2.2K_4
TP142 1 TPEV_SDVO_INT_DP U2
TPEV_SDVO_INT_DN SDVO_INTP
TP140 1 T3 SDVO_INTN
TP141 1 SDVO_STALL+_R W3
SDVO_STALL-_R SDVO_STALLP INT_CRT_DDCDAT R297 UMA@0_4
TP143 1 U5 SDVO_STALLN MCH_DDC_DATA [31]
INT_CRT_DDCCLK R267 UMA@0_4 MCH_DDC_CLK [31]
TP139 1 TPEV_SDVO_TVCLKIN_DP U8
TPEV_SDVO_TVCLKIN_DN U9 SDVO_TVCLKINP
TP127 1 SDVO_TVCLKINN DDC PU near EDID_ROM
CUGARPOINT

3.3V
U6E

R529 *4.7K_4 PU_NVM_ALE AB50


PU_NVM_ALE NV_DQ0/NV_IO0
M48 Y50
FM_PROCSEL_DMI_TERM_R R47 NV_ALE
NV_CLE
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2 AB49 Thermal Hook
Y41 NV_RB_N NV_DQ3/NV_IO3 AB44
B DESIGN NOTE: M50 NV_RE_N_WRB0 NV_DQ4/NV_IO4 U49 B
STRAPPING OPTION PIN DIFFERENCE M49 NV_RE_N_WRB1 NV_DQ5/NV_IO5 R44 JP124 JP125
U43 U50
FOR HDD DATA PROTECTION NV_WE_N_CK0 NV_DQ6/NV_IO6
J57 NV_WE_N_CK1 NV_DQ7/NV_IO7 U46 1 1
PCH(IBX) PROVIDES INTERNAL P/D (DEFAULT) U44
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9 H50 2 2
NV_DQ10/NV_IO10 K46
NV_DQ11/NV_IO11 L56
CONN DIP HEADER 2P 1R MS(P5.08,H6.54)
NV_DQ12/NV_IO12 J55
R525 4.7K_4 FM_PROCSEL_DMI_TERM_R F53 CONN DIP HEADER 2P 1R MS(P5.08,H6.54)
[7] FM_PROCSEL_DMI_TERM NV_DQ13/NV_IO13
NV_DQ14/NV_IO14 H52
DESIGN NOTE: NV_DQ15/NV_IO15 E52
WHEN USING IBX --> RESISTOR EMPTY U37
WHEN USING CPT --> RESISTOR STUFFED (DEFAULT) K50
IBX EXPECTS A VALUE OF LOW (WEAK INTERNAL P/D PRESENT) AS NV_CE_N0
NV_CE_N1 K49
PART OF ITS STRAPPING OPTION FOR DMI TERMINATION VOLTAGE NV_CE_N2 AB46
NV_CE_N3 G56

NV_DQS0 Y44
1.8V L53
NV_DQS1

NV_RCOMP R50 NVR_RCOMP R510 *32.4R/F_4

R520 2.2K_4 FM_PROCSEL_DMI_TERM

DESIGN NOTE: PCH Thermal Pad/31BOM


DMI TX AND FDI RX TERMINATION VOLTAGE CUGARPOINT <sean0327> add PCH thernal, add to
31BOM
P/U: VCC TERMINATION (DEFAULT)
A A
P/D: VSS TERMINATION
PCH PROVIDES WEAK INTERNAL P/D
CPU TYPE DETERMINES WHETHER THIS NET IS DRIVEN HIGH OR LOW

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
PCH-DISPLAY/NV RAM
Date: Monday, July 04, 2011 Sheet 13 of 48
5 4 3 2 1
5 4 3 2 1

D D

U6B
D33 BF36 USBN0
[6] DMI_CPU_PCH_TXN0 DMI0RXN USBP0N USBN0 [28]
B33 BD36 USBP0
[6] DMI_CPU_PCH_TXP0 DMI0RXP USBP0P USBP0 [28]
J36 BC33 USBN1 Side x2
[6] DMI_PCH_CPU_RXN0 DMI0TXN USBP1N USBN1 [36]
H36 BA33 USBP1
[6] DMI_PCH_CPU_RXP0 DMI0TXP USBP1P USBP1 [36]
A36 BM33 USBN2
[6] DMI_CPU_PCH_TXN1 DMI1RXN USBP2N USBN2 [33]
B35 BM35 USBP2
[6] DMI_CPU_PCH_TXP1 DMI1RXP USBP2P USBP2 [33]
P38 BT33 USBN3
[6] DMI_PCH_CPU_RXN1 DMI1TXN USBP3N USBN3 [33]
R38 BU32 USBP3 Rear x4
[6] DMI_PCH_CPU_RXP1 DMI1TXP USBP3P USBP3 [33]
B37 BR32 USBN4 3V_S5
[6] DMI_CPU_PCH_TXN2 DMI2RXN USBP4N USBN4 [33]
C36 BT31 USBP4
[6] DMI_CPU_PCH_TXP2 DMI2RXP USBP4P USBP4 [33]

DMI
H38 BN29 USBN5 USB_OC3_N_XDP_TEST3 R539 10K_4
[6] DMI_PCH_CPU_RXN2 DMI2TXN USBP5N USBN5 [33]
J38 BM30 USBP5
[6] DMI_PCH_CPU_RXP2 DMI2TXP USBP5P USBP5 [33]
E37 BK33 USB_OC4_N_XDP_TEST4 R154 10K_4
[6] DMI_CPU_PCH_TXN3 DMI3RXN USBP6N
[6] DMI_CPU_PCH_TXP3 F38 DMI3RXP USBP6P BJ33
M41 BF31 H61 USB PORT6,7 disable USB_OC5_N_XDP_TEST5 R536 10K_4
[6] DMI_PCH_CPU_RXN3 DMI3TXN USBP7N
1.05V P41 BD31
[6] DMI_PCH_CPU_RXP3 DMI3TXP USBP7P
B31 BN27 USBN8 USB_OC6_N_XDP_TEST6 R153 10K_4
DMI_IRCOMP USBP8N USBN8 [28]
R557 49.9R/F_4 DMICOMP E31 BR29 USBP8 Touch Module
DMI_ZCOMP USBP8P USBP8 [28]
BR26 USBN9 USB_OC7_N_XDP_TEST7 R152 10K_4
USBP9N USBN9 [28]
CLK_100M_PCH_ESI_N P33 BT27 USBP9 WebCAM
CLKIN_DMI_N USBP9P USBP9 [28]
CLK_100M_PCH_ESI_P R33 BK25 USBN10 USBOC01_QN R531 10K_4
CLKIN_DMI_P USBP10N USBN10 [33]
BJ25 USBP10 TV
USBP10P USBP10 [33]
R560 R561 BJ31 USBOC23_QN R537 10K_4
USBP11N
J20 PERN1 USBP11P BK31
10K_4

10K_4

L20 BF27 USBOC45_QN R534 10K_4


PERP1 USBP12N
F25 PETN1 USBP12P BD27
C C
X7R
F23 PETP1 USBP13N BJ27 H61 USB PORT12,13 disable
[33] PCIE_RX2_N P20 PERN2 USBP13P BK27
[33] PCIE_RX2_P R20 PERP2
WLAN Card C188 0.1u/16V_4 PCIE_TX2_CN C22 BM43 USBOC01_QN
[33] PCIE_TX2_N PETN2 OC0_N/GPIO59 USBOC01_QN [36]
C189 0.1u/16V_4 PCIE_TX2_CP A22 BD41 USBOC23_QN
[33] PCIE_TX2_P PETP2 OC1_N/GPIO40 USBOC23_QN [33]
[33] PCIE_RX3_N H17 PERN3 OC2_N/GPIO41 BG41 USBOC45_QN USBOC45_QN [33]
[33] PCIE_RX3_P J17 PERP3 OC3_N/GPIO42 BK43 USB_OC3_N_XDP_TEST3
TV Card C187 0.1u/16V_4 PCIE_TX3_CN E21 BP43 USB_OC4_N_XDP_TEST4
[33] PCIE_TX3_N PETN3 OC4_N/GPIO43
C192 0.1u/16V_4 PCIE_TX3_CP B21 BJ41 USB_OC5_N_XDP_TEST5
[33] PCIE_TX3_P

USB
PETP3 OC5_N/GPIO9
[32] PCIE_RX4_N P17 PERN4 OC6_N/GPIO10 BT45 USB_OC6_N_XDP_TEST6
[32] PCIE_RX4_P M17 PERP4 OC7_N/GPIO14 BM45 USB_OC7_N_XDP_TEST7
Card Reader C136 0.1u/16V_4 PCIE_TX4_CN F18
[32] PCIE_TX4_N PETN4
C135 0.1u/16V_4 PCIE_TX4_CP E17
[32] PCIE_TX4_P PETP4
[36] PCIE_RX5_N N15 PERN5 USBRBIAS_N BP25

PCI-E
[36] PCIE_RX5_P M15 BM25 USBRBIAS_PCH
C169 0.1u/16V_4 PCIE_TX5_CN PERP5 USBRBIAS
USB30 [36] PCIE_TX5_N B17 PETN5
C165 0.1u/16V_4 PCIE_TX5_CP C16
[36] PCIE_TX5_P PETP5
[33] PCIE_RX6_N J15 PERN6
[33] PCIE_RX6_P L15 BD38 CLK_DOT96N R573
C266 0.1u/16V_4 PCIE_TX6_CN PERP6 CLKIN_DOT_96N CLK_DOT96P
Giga LAN [33] PCIE_TX6_N A16 PETN6 CLKIN_DOT_96P BF38 22.6R/F_4
C267 0.1u/16V_4 PCIE_TX6_CP B15
[33] PCIE_TX6_P PETP6
J12 PERN7 DMI2RBIAS A32
H12 R551 R562 CAD NOTE:
PERP7 D24 10K_4 10K_4 USBRBIAS (R2): TIE TRACES TOGETHER
F15 PETN7
F13 CLOSE TO PINS, WITH LENGTH NO
PETP7 R171 LONGER THAN 450 MILS TO RESISTOR.
H61 PCIE PORT7,8 disable H10 PERN8
J10 750R/F_4 *VPORT 0603 220K-V05
PERP8
B13 PETN8 GND
D13 PETP8
B B
CAD NOTE:
RBIAS_CPY (R3): TIE TRACES TOGETHER
CUGARPOINT CLOSE TO PINS, WITH LENGTH NO LONGER
THAN 450 MILS TO RESISTOR.

ET-0329-03

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
PCH-DMI/PCI-E/USB
Date: Monday, July 04, 2011 Sheet 14 of 48
5 4 3 2 1
5 4 3 2 1

3.3V

SERIRQ R120 10K_4

D GATEA20 R123 10K_4 D

RCIN# R96 10K_4


SATA 1.5GB/s and 3GB/s only
U6C KBSMI# R605 10K_4
AC56 SATA_RX0_N SATA_RX0_N [30]
SATA0RXN SATA_RX0_P PCH_GPIO38 R95 10K_4
BA50 CL_CLK1 SATA0RXP AB55 SATA_RX0_P [30] To SATA HDD
BF50 AE46 SATA_TX0_N
CL_DATA1 SATA0TXN SATA_TX0_N [30]
BF49 AE44 SATA_TX0_P WLAN_DET# R72 10K_4
CL_RST1# SATA0TXP SATA_TX0_P [30]
AA53 SATA_RX1_N SATA_RX1_N [30]
R503 0R_4 PCH_MEPWROK_R SATA1RXN SATA_RX1_P SATA2GP R73 10K_4
[10,16] PCH_PWRGD BC46 AA56 SATA_RX1_P [30]
APWROK SATA1RXP SATA_TX1_N
SATA1TXN AG49 SATA_TX1_N [30] To SATA ODD
AG47 SATA_TX1_P SATA0GP R93 10K_4
SATA1TXP SATA_TX1_P [30]
AL50 3.3V PCH_GPIO22 R122 10K_4
SATA2RXN
AL49
TP115 SATA2RXP TEMP_ALART# R92 10K_4
1 BN21 AL56
TP106 PWM0 SATA2TXN
1 BT21
PWM1 SATA2TXP
AL53 H61 SATA PORT2,3 are disable
TP105 1 BM20 AN46 PCH_GPIO1 R181 10K_4
TP114 PWM2 SATA3RXN
1 BN19 AN44
PWM3 SATA3RXP PCH_SATA_LED_# R125 *10K_4
AN56
PCH_GPIO17 SATA3TXN R713
BT17 S0 AM55
PCH_GPIO1 TACH0/GPIO17 SATA3TXP WP# R611 10K_4
BR19 AN49 10K_4
TACH1/GPIO1 SATA4RXN

2
PU_PCH_GPIO6 S0 <Jerry 0427> modify SATA
BA22 AN50
WP# TACH2/GPIO6 S0 SATA4RXP LED always light PCH_GPIO17 R199 10K_4
[18] WP# BR16 TACH3/GPIO7 SATA4TXN AT50
KBSMI# S0
[37] KBSMI# BU16 TACH4/GPIO68 S0 SATA4TXP AT49
BOARD_ID0 BM18 AT46 PU_PCH_GPIO6 R572 10K_4
TACH5/GPIO69 S0 SATA5RXN
BOARD_ID1 BN17 AT44 PCH_SATA_LED# 1 3
TACH6/GPIO70 S0 SATA5RXP PCH_SATA_LED_# 30
BOARD_ID2 BP15 AV50 PCH_GPIO39 R76 10K_4
TACH7/GPIO71 S0 SATA5TXN
AV49 Q39
SATA5TXP PCH_GPIO48 R90 10K_4
BC43
SST DTC144EU
CLKIN_SATA_N/CKSSCD_N AF55
AG56 P_GNT_N1 R646 *10K/F_4
PCH_GPIO22 CLKIN_SATA_P/CKSSCD_P
[18] PCH_GPIO22 BA53 SCLOCK/GPIO22 S0
C PCH_GPIO38 BE54 BF57 PCH_SATA_LED# 1.05V C
PCH_GPIO39 SLOAD/GPIO38 S0 SATALED_N SATA3GP R704 *10K_4
BF55 AJ55
PCH_GPIO48 SDATAOUT0/GPIO39 S0 SATAICOMPI SATARBIAS_PCH R118 37.4R/F_4 R70 R87
AW53 SDATAOUT1/GPIO48 S0 SATAICOMPO AJ53
10K_4 10K_4
BC54 SATA0GP
S0 SATA0GP/GPIO21 SATA1GP
AY52
S0 SATA1GP/GPIO19 SATA2GP
S0 SATA2GP/GPIO36
BB55 ET-0325-01
BG53 SATA3GP
S0 SATA3GP/GPIO37 WLAN_DET#
AU56 WLAN_DET# [33]
S0 SATA4GP/GPIO16 TEMP_ALART# for ESD
BA56
BOARD TP111 1 NC_PCH_TEST_RNG AY20
NC_5
S0 SATA5GP/GPIO49

SATA3COMPI
AE54
1.05V RCIN# Jerry 0517

AE52 SATA3COMP_PCH R86 49.9R/F_4 D25

ID 3.3V SATA3RCOMPO

TP16
AE50 Z3401 1 TP70
VPORT 0603 220K-V05
AC52 RBIAS_SATA3 R69 750R/F_4 GND
<Sean0327> add * SARA3RBIAS

R200 R204 R208 BB57 GATEA20 GATEA20 [37]


*10K_4 *10K_4 *10K_4 A20GATE FWH_INIT_N
INIT3_3V_N
BN56 CAD NOTE:
BOARD_ID0 BG56 RCIN# RCIN# [37]
RCIN_N
AV52 SERIRQ SARA3RIAS R177: TIE
SERIRQ SERIRQ [37]
BOARD_ID1 E56 H_THERMTRIP_N H_THERMTRIP_N [7] TRACES TOGETHER CLOSE
THRMTRIP_N TP_PECI_PCH R60 *0R_4
H48 H_PECI [7,37] TO PINS, WITH LENGTH
BOARD_ID2 PECI H_PM_SYNC_0
F55 H_PM_SYNC_0 [7]
PMSYNCH NO LONGER THAN 450
MILS TO RESISTOR.
CUGARPOINT
R82
R182 R203 R214 *51R/F_4
*1K/F_4 *1K/F_4 *1K/F_4 CAD NOTE:
SATA3COMP_PCH R176: TIE
B
TRACES TOGETHER CLOSE B
TO PINS, WITH LENGTH NO
R99 *1K/F_4 FWH_INIT_N LONGER THAN 200 MILS TO
P_GNT_N1 [19]
RESISTOR.
SATA1GP
<Sean0327> remove Board ID
table
DESIGN NOTE:
CPU OUTPUT BUFFER STRENGTH FOR CPUPWRGD CAD NOTE:
R625 R91
AND PM_SYNC *1K/F_4 *1K/F_4 SATA3_RBIAS R177:
P/U: STANDARD STRENGTH (DEFAULT) ROUTE TRACE LENGTH
P/D: STRONGER STRENGTH NO LONGER THAN 450
PCH PROVIDES WEAK INTERNAL P/U BBS[1] BBS[0]
MILS TO RESISTOR.

DESIGN NOTE:
BIOS BOOT DEVICE STRAP
1 1 SPI (DEFAULT)
1 0 PCI
0 1 RESERVED
0 0 LPC
PCH PROVIDES WEAK INTERNAL P/U

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
PCH-SATA/MLINK/GPIO
Date: Monday, July 04, 2011 Sheet 15 of 48
5 4 3 2 1
5 4 3 2 1

3V_S5

SML1CLK_PCH R524 10K_4


SML1DATA_PCH R528 10K_4
SMLALERT_PCH R142 10K_4
SMB_CLK_LAN_S5 R139 2.2K_4
SMB_DAT_LAN_S5 R140 2.2K_4
IRQ_PCH_NMI_N R517 10K_4
SMB_CLK_MAIN R146 2.2K_4
SMB_DATA_MAIN R143 2.2K_4
3.3V 3.3V 3.3V SML1ALERT_PCH R145 10K_4
PU_PCH_RI R518 10K_4
Add RN5 R353 for LPC overshoot SUSWARN# R148 10K_4
Jerry 0516 USB30_SMI#_PCH R100 10K_4
R586 R121 LAN_CLK_REQ# R98 10K_4
R624 *10K/F_4 10K_4 PCH_GPIO45 R522 10K_4
*10K/F_4 33X4-0402 U6D PCIE_WAKE# R502 10K_4
D PCH_GPIO24 R570 10K_4 D
RN6 L_DRQ1_N BA20 AW55 BMBUSY# PU_PCH_GP72 R523 10K_4
PCH_LPC_LAD0 LDRQ1_N/GPIO23 S0 BMBUSY_N/GPIO0
CLKRUN_N_R PCH_GPIO46 R80 10K_4
[33,37] LPC_LAD0 2 1 BK15 S0 CLKRUN_N/GPIO32 BC56 1 TP65
PCH_LPC_LAD1 FWH0/LAD0 WRITE_EDID_ROM GPIO31 R532 10K_4
[33,37] LPC_LAD1 4 3 BJ17 BC25 WRITE_EDID_ROM [31]
PCH_LPC_LAD2 FWH1/LAD1 S0 HDA_DOCK_EN_N/GPIO33 STP_PCI_N PECI_REQ_# R77 10K_4
[33,37] LPC_LAD2 6 5 BJ20 BL56
PCH_LPC_LAD3 FWH2/LAD2 S0 STP_PCI_N/GPIO34 PECI_REQ_#
[33,37] LPC_LAD3 8 7 BG20 BJ57 PECI_REQ# [37]
L_DRQ_N FWH3/LAD3 S5 GPIO35
BK17
R353 33R/F_4 LDRQ0_N SEL_FCIM_EN PCH_SYSPWROK R126 *10K/F_4
[33,37] LPC_LFRAME_N BG17 BP51
FWH4/LFRAME_N S5 GPIO8
SCI# LPCPD_N R129 *10K/F_4
BK50 SCI# [37]
S5LAN_PHY_PWR_CTRL/GPIO12 USB30_SMI#_PCH
S5HDA_DOCK_RST_N/GPIO13 BA25 USB30_SMI#_PCH [36] ET-0325-02
ACZ_BCLK BU22 BM55 SEL_TLS_EN
HDA_BCLK S5 GPIO15
ACZ_RST# BC22 BP53 PCH_GPIO24 SUS_PWR_ACK# R714 10K/F_4
R592 0R_4 ACZ_SDIN0_R HDA_RST_N S5 MEM_LED/GPIO24
OD_PLLVR_GPIO28 <sean0327> add
[29] ACZ_SDIN0 BD22 BJ55
HDA_SDIN0 S5 GPIO28 change USB30_SMI#PCH from GPIO24 TO GPIO13 PU
BF22 BH49 1 TP68
HDA_SDIN1 S5 SLP_LAN_N/GPIO29 CR_CLK_REQ#_R# R506 0R_4 Jerry 0505
TP103 1 BK22 S0PCIECLKRQ2_N/GPIO20 AV43 CR_CLK_REQ# [32]
HDA_SDIN2 LAN_CLK_REQ# RTC_VCC
BJ22 BL54 LAN_CLK_REQ# [33]
ACZ_SDOUT HDA_SDIN3 S5 PCIECLKRQ5_N/GPIO44 PCH_GPIO45
[37] ACZ_SDOUT BT23 AV44
ACZ_SYNC HDA_SDO S5 PCIECLKRQ6_N/GPIO45 PCH_GPIO46 INTRUDER_N R538 1K/F_4
BP23 BP55
HDA_SYNC S5 PCIECLKRQ7_N/GPIO46
BT53
R119 0R_4 SPI_PCH_MOSI_R S5 GPIO57 PCH_SYSPWROK
[18] SPI_SI AU53 BJ53
R89 0R_4 SPI_PCH_MISO_R SPI_MOSI SYS_PWROK PU_PCH_RI 3.3V
[18] SPI_SO_R AT55 BJ48
R71 0R_4 SPI_PCH_CS0R_N SPI_MISO RI_N PLTRST_N
[18] SPI_CS0# AT57 BK48
R88 0R_4 SPI_PCH_CLK SPI_CS0_N PLTRST_N PCIE_WAKE#
[18] SPI_CLK AR54 BC44 PCIE_WAKE# [33,36]
SPI_CLK WAKE_N SLP_A_N FP_RST_PCH_N R512 10K_4
TP69 1 AR56 BC41 1 TP77
SPI_CS1_N SLP_A_N SLP_S3_R# R505 0R_4 CR_CLK_REQ#_R# R521 10K_4
BM53 SLP_S3# [37]
SLP_S3_N SLP_S4_R# R507 0R_4 WRITE_EDID_ROM R571 10K_4
BN52 SLP_S4# [37]
XTAL_PCH_RTC1 SLP_S4_N STP_PCI_N R78 PC@10K_4
BR39
XTAL_PCH_RTC2 RTCX1 TP_SLP_S5_N
BN39 BH50 1 TP67
FM_RTCRST_N RTCX2 SLP_S5_N/GPIO63 LPCPD_N
[18] FM_RTCRST_N BT41 BN54 1 TP64
FM_SRTCRST_N RTCRST_N SUS_STAT_N/GPIO61 PCH_SUSCLK R361
[18] FM_SRTCRST_N BN37 BA47 1 TP75
INTRUDER_N SRTCRST_N SUSCLK/GPIO62 PU_PCH_GP72 <sean0327> add *
TP82 1 BM38 AV46 *TV@10K_4
PCH_PWRGD INTRUDER_N BATLOW_N/GPIO72 SUS_PWR_ACK# R147 *0R_4
BJ38 BP45
R559 0R_4 PCH_REMRST_N PWROK S5 SUSACK_N SUSWARN#
[37] RSMRST# BK38 BU46
PCH_INTVRMEN RSMRST_N SUSWARN_N/SUS_PWR_DN_ACK/GPIO30 PWRGD_DRAM
BN41 BG46 PWRGD_DRAM [7]
PCH_REMRST_N R558 0R_4 DPWROK_R INTVRMEN DRAMPWROK
BT37
PU_PCH_DSWODVREN DPWROK STP_PCI_N Reserve PU/PD resistance for VERB Table control(TV/PC mode)
BR42 DSW GPIO27 BJ43
DSWVRMEN Jerry 0518
Disable Deep IRQ_PCH_NMI_N BN49 DSW GPIO31 BG43 GPIO31
SMB_CLK_MAIN SMBALERT_N/GPIO11 SLP_SUS# For ESD
S4/S5 SMB_DATA_MAIN
BT47
BR49
SMBCLK SLP_SUS_N
BD43
BT43
1 TP78
3V_S5 Jerry 0513
SMBDATA PWRBTN_N EC_PWRBTN_OUT# [10,37]
SMLALERT_PCH BU49 C711
SMB_CLK_LAN_S5 SML0ALERT_N/GPIO60
BT51
C SMB_DAT_LAN_S5 SML0CLK FP_RST_PCH_N 0.1u/16V_4 C
BM50 BE52 FP_RST_PCH_N [7]
SML1ALERT_PCH SML0DATA SYS_RESET_N SPKROUT
BR46 BE56 SPKROUT [29]
SML1CLK_PCH SML1ALERT_N/PCHHOT_N/GPIO74 SPKR PCH_PWRGD R546 10K/F_4
BJ46
SML1DATA_PCH SML1CLK/GPIO58 H_PWRGD
BK46 D53 H_PWRGD [7,10]
SML1DATA/GPIO75 PROCPWRGD R508 R124 SEL_FCIM_EN R81 1K/F_4
150R/F_4 150R/F_4
3V_S5 BC49 TP_PCH_PMTEST_RST 1
TP12 TP72
BA43 XDP_PCH_TCK0
JTAG_TCK XDP_PCH_TCK0 [10]
R553 *22K/F_4 PCH_REMRST_N BC52 XDP_PCH_TDI
JTAG_TDI XDP_PCH_TDI [10]
BF47 XDP_PCH_TDO
JTAG_TDO XDP_PCH_TDO [10]
BC50 XDP_PCH_TMS SEL_FCIM_EN:
JTAG_TMS XDP_PCH_TMS [10]
R552 BTM: Leave floating. Do not pull low.
C480 C710 10K_4 FCIM:Pull low with 1k Ohm to ground.
*2.2U/6.3V_4 0.1u/16V_4 CUGARPOINT
R514 R94 R511
75R/F_4 75R/F_4 51R/F_4

PCH_REMRST_N
ET-0329-02
D32 for ESD
Jerry 0518

VPORT 0603 220K-V05


GND

Crystal 32.768KHz PCH POWEROK


PCH PLTRST RTC_VCC RTC_VCC
XTAL_PCH_RTC2 R138 *0R_4 3V_S5 3V_S5 1.5V_S3 3.3V 3V_S5
R499 *0R_4
3V_S5 3V_S5
R163 10M_6 XTAL_PCH_RTC1 3V_S5 R504 R75 R79 R155
R97 R101 R156
C123
C410 *10K/F_4 10K_4 390K_4 1K/F_4 *10K/F_4 10K_4
R137 390K_4
*10K/F_4 0.1u/16V_4 0.1u/16V_4 OD_PLLVR_GPIO28
Y2

5
U4 SCI#
5

1 4 DO NOT REPLACE PLTRST_N 2 PCH_INTVRMEN


1 4 PWRGD_DRAM
WITH 0402 [40] IMVP_PWRGD 1 4 PLTRST_CPU_N [7,10]
2 3 4 PCH_SYSPWROK 1 SPKROUT
2 3 PCH_SYSPWROK [10]
[37] EC_PWROK EC_PWROK 2 U30 SEL_TLS_EN
B 32.768KHZ/10PPM TC7SH08FU PU_PCH_DSWODVREN B

3
3

TC7SH08FU R127 R130 R159 R513 R74 R128 R157


C155 C164 R149 3V_S5
100K_4 C273
0.1u/16V_4 C402
*4.7K_4
*1K/F_4 *1K/F_4 *1K/F_4 *1K/F_4 *1K/F_4
15p/ 50V_4 15p/ 50V_4 *1K/F_4
R144 *0R_4 For ESD 0.1u/16V_4
Jerry 0513

5
2
4 PLTRST_PCIE_N [22,32,33,36,37]
1 STRAPPING Table
U28
TC7SH08FU OD_PLLVR:On-Die PLL Voltage Regulator
To Azalia
3

EC_PWROK R545 0R_4 PCH_PWRGD


PCH_PWRGD [10,15]
3.3V PCH_SYSPWROK R500 *0R_4
R491 *0R_4 PCH_INTVRMEN:Integrated 1.05V VRM
H: Integrated 1.05V VRM Enable
R173 L:Integrated 1.05V VRM Disable
*10K/F_4
SPKROUT:No Reboot Mode
[29] ACZ_SDOUT_AUDIO R174 33R/F_4 ACZ_SDOUT H: No reboot mode Enable
3.3V L:No reboot mode Disable
R172
C181 *10K/F_4 SEL_TLS_EN:TLS Confidentiality
*10p/50V_4 H:ME Crypto TLS cipher suite with confidentiality
L=ME Crypto TLS cipher suite with no confidentiality
Q28 R501
2

2N7002 4.7K_4 PU_PCH_DSWODVREN:DSW on-die VR Enable


[29] ACZ_RST#_AUDIO R584 33R/F_4 ACZ_RST# H:Enable
3.3V SMB_CLK_MAIN 3 1 SMB_CLK_DEVICE [10,11,31,35] L:No reboot mode Disable

R183
*10K/F_4
3.3V
[29] ACZ_SYNC_AUDIO R201 33R/F_4 ACZ_SYNC

R177
C183 *10K/F_4
A *10p/50V_4 Q29 R530 A
2

2N7002 4.7K_4

[29] BIT_CLK_AUDIO R178 33R/F_4 ACZ_BCLK SMB_DATA_MAIN 3 1 SMB_DAT_DEVICE [10,11,31,35]

R176
C182 *10K/F_4
22p/50V_4 <Sean0327>
mosidy

ACZ_SDOUT:Flash Descriptor Override Strap Flash descriptor Overide by EC


H:Flash descriptor security will be override
L:Disable ME in Manufacturing Mode(internal PD) Quanta Computer Inc.
Low = Disabled default
ACZ_SYNC:On-Die PLL VR Voltage Select ACZ_SDOUT PROJECT : QUA

www.vinafix.vn
H:1.5V
L:1.8V(internal PD) High = Enabled Size Document Number Rev
1A
PCH-MISC/GPIO/SMBus/LPC
Date: Monday, July 04, 2011 Sheet 16 of 48
5 4 3 2 1
5 4 3 2 1

PCH

<Sean0327> modify V2.0

D D

C C

B B

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
PCH-GPIO Table
Date: Monday, July 04, 2011 Sheet 17 of 48
5 4 3 2 1
5 4 3 2 1

RTC_VCC

FDI_TXN[7:0] [6]
FDI_TXN0
U6G FDI_TXN1
FDI_TXN2 R421 20K/F_4 FM_SRTCRST_N
FM_SRTCRST_N [16]
TP90 1 Z3601 H31 C42 FDI_TXN0 FDI_TXN3
Z3602 TP21 FDI_RXN0 FDI_TXP0 FDI_TXN4
TP89 1 J31 TP25 FDI_RXP0 B43
TP11 1 Z3603 C29 F45 FDI_TXN1 FDI_TXN5
Z3604 TP29 FDI_RXN1 FDI_TXP1 FDI_TXN6
TP10 1 E29 F43
D
TP96 1 Z3605
Z3606
J27
TP33

TP22
FDI_RXP1
FDI_RXN2
FDI_RXP2
H41
J41
FDI_TXN2
FDI_TXP2
FDI_TXN3
FDI_TXN7
FDI_TXP[7:0] [6]
RTC VREG3
C290
1u/16V_6
D

TP100 1 L27 TP26 FDI_RXN3 C46


TP88 1 Z3607 F28 D47 FDI_TXP3 FDI_TXP0
Z3608 TP30 FDI_RXP3 FDI_TXN4 FDI_TXP1
TP93 1 E27 TP34 FDI_RXN4 B45
A46 FDI_TXP4 FDI_TXP2
Z3609 FDI_RXP4 FDI_TXN5 FDI_TXP3 D16
TP95 1 J25 TP23 FDI_RXN5 B47
TP101 1 Z3610 L25 C49 FDI_TXP5 FDI_TXP4 2
Z3611 TP27 FDI_RXP5 FDI_TXN6 FDI_TXP5 R420 20K/F_4 FM_RTCRST_N
TP94 1 C26 TP31 FDI_RXN6 J43 3 FM_RTCRST_N [16]
TP87 1 Z3612 B27 H43 FDI_TXP6 FDI_TXP6 RTC_BAT R677 1K/F_4 1
TP35 FDI_RXP6 FDI_TXN7 FDI_TXP7
FDI_RXN7 M43
TP104 1 Z3613 L22 P43 FDI_TXP7 BAT54C
TP24 FDI_RXP7

1
Z3614
TP102
TP98
1
1 Z3615
J22
B25
TP28
B51
30mil C288 C286 G1
TP32 FDI_FSYNC0 FDI_FSYNC0 [6]
TP99 1 Z3616 D25 E49 FDI_LSYNC0 [6] 1u/16V_6 1u/16V_6 *SOLDERJUMPER-2
TP36 FDI_LSYNC0 U38
C52 FDI_FSYNC1 [6]

2
FDI_FSYNC1

1
FDI_LSYNC1 D51 FDI_LSYNC1 [6]
BT1
FDI_INT H46 FDI_INT [6] CONN SMD HOUSING 2P 1R FS(P30.1,H4.20)
RTC <Sean0327> add

2
G1
CUGARPOINT

RTC/31BOM

C C

U39
ME_Disable function DEL SW CLRCOMS
remove CN12,R259, ACZ_SDOUT series 10k to EC U34.76 CN8
03/22 Jerry
1
[15] PCH_GPIO22 2
3

CONN DIP HEADER 3P 1R MS(P2.54,H8.54) JMP/31BOM

BIOS SPI ,64Mbit (8M Byte) EC SPI


VREG3
B B
R493 0R_4 3.3V
R686 R683
3.3K/F_4
R494 10K_4
3.3K/F_4 R492 *0R_4 3V_S5 U27 C667
[37] 8512_SCE# 8512_SCE# 1 8 0.1u/25V_4
U2 R490 8512_SCK CE# VDD
[37] 8512_SCK 6 SCK
[16] SPI_CS0# SPI_CS0# 1 8 10K_4 [37] 8512_SI 8512_SI 5
SPI_CLK CE# VDD 8512_SO SI
[16] SPI_CLK 6 SCK [37] 8512_SO 2 SO HOLD# 78512_HOLD C668
[16] SPI_SI SPI_SI 5 C401 0.1u/16V_4
SPI_SO_R SI SPI_HOLD 0.1u/25V_4 3V_S5
[16] SPI_SO_R 2 SO HOLD# 7 3 WP# VSS 4

3V_S5 3 4 W25Q80BVSSIG
WP# VSS C400
W25Q64BVSSIG 0.1u/16V_4 R692
*8.2K_4
R495
*8.2K_4

3
3
3
3

WP# 2 2

[15] WP# WP#2 2 Q36


A Q37 *2N7002 A
1

Q27 *DTC144EU

1
Q24 *2N7002
1

*DTC144EU
1

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
PCH-FDI/SPI ROM/RTC

www.vinafix.vn
Date: Monday, July 04, 2011 Sheet 18 of 48
5 4 3 2 1
5 4 3 2 1

Layout note: PCI PULL-UPS


Loopback length and clock-to-device length must be within maximum 5000-mil delta to 3.3V
meet Tskew requirement
P_INTA_N R217 8.2K_4
U6A P_INTB_N R258 8.2K_4
TP136 1 PCI32_PAR BH8 P_INTC_N R218 8.2K_4
D PCI32_DEVSEL_N PAR P_INTD_N R245 8.2K_4 D
BH9 DEVSEL_N AD0 BF15
[12] CLK_33M_PCH CLK_33M_PCH BD15 BF17 P_INTE_N R231 8.2K_4
PCIRST# CLKIN_PCILOOPBACK AD1 P_INTF_N R612 8.2K_4
TP131 1 AV14 PCIRST_N AD2 BT7
TP132 1 PCI32_IRDY_N BF11 BT13 P_INTG_N R209 8.2K_4
P_PME_N IRDY_N AD3 P_INTH_N R244 8.2K_4
TP110 1 AV15 PME_N AD4 BG12
P_SERR_N BR6 BN11
PCI32_STOP_N SERR_N AD5
BC12 STOP_N AD6 BJ12
P_PLOCK_N BA17 BU9
PCI32_TRDY_N PLOCK_N AD7
BC8 TRDY_N AD8 BR12
P_PERR_N BM3 BJ3
PCI32_FRAME_N PERR_N AD9 3.3V
BC11 FRAME_N AD10 BR9
AD11 BJ10
AD12 BM8
P_GNT_N0 BA15 BF3 P_SERR_N R233 8.2K_4
P_GNT_N1 GNT0_N AD13
[15] P_GNT_N1 AV8 GNT1_N/GPIO51 AD14 BN2
P_GNT_N2 BU12 BE4 PCI32_DEVSEL_N R247 8.2K_4
P_GNT_N3 GNT2_N/GPIO53 AD15
BE2 GNT3_N/GPIO55 AD16 BE6
BG15 PCI32_IRDY_N R637 8.2K_4
AD17
AD18 BC6
PCI32_REQ_N0 BG5 BT11 P_PLOCK_N R598 8.2K_4
R602 *1K/F_4 P_GNT_N0 PCI32_REQ_N1 REQ0_N AD19
BT5 REQ1_N/GPIO50 AD20 BA14
PCI32_REQ_N2 BK8 BL2 P_PERR_N R246 8.2K_4
PCI32_REQ_N3 REQ2_N/GPIO52 AD21
AV11 REQ3_N/GPIO54 AD22 BC4
C BL4 PCI32_FRAME_N R626 8.2K_4 C
AD23
DESIGN NOTE: AD24 BC2
BM13 PCI32_TRDY_N R271 8.2K_4
STRAPPING OPTION PIN DIFFERENCE P_INTA_N AD25
BK10 PIRQA_N AD26 BA9
FOR BIOS BOOT DEVICE SELECTION P_INTB_N BJ5 BF9 PCI32_STOP_N R614 8.2K_4
PIRQB_N AD27
WHEN USING ZIGZAG P_INTC_N BM15 PIRQC_N AD28 BA8
PCH(IBX) PROVIDES INTERNAL P/U (DEFAULT) CHOSEN P_INTD_N BP5 BF8 PCI32_REQ_N0 R273 8.2K_4
P_INTE_N PIRQD_N AD29
BN9 PIRQE_N/GPIO2 AD30 AV17
P_INTF_N AV9 BK12 PCI32_REQ_N1 R232 8.2K_4
P_INTG_N PIRQF_N/GPIO3 AD31
BT15 PIRQG_N/GPIO4
R272 *4.7K_4 P_GNT_N3 P_INTH_N BR4 PCI32_REQ_N2 R230 8.2K_4
PIRQH_N/GPIO5
C/BE0_N BN4
BP7 PCI32_REQ_N3 R607 8.2K_4
C/BE1_N
PCI C/BE2_N BG2
BP13
DESIGN NOTE: C/BE3_N
A16 SWAP OVERRIDE OVERRIDE IF SAMPLED LOW
CUGARPOINT

R213 *4.7K_4 P_GNT_N2


B B

GNT2/GPIO53:
ESI Strap (Server Only)
ESI compatible mode is for server
platforms only. This signal should
not be pulled low for desktop and
mobile.

PME# Internal PU
3V_S5
A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
PCH_PCI
Date: Monday, July 04, 2011 Sheet 19 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

1.05V 1.05V
U6I

F20 VCCIO_24 VCCCORE_1 AC24


F30 VCCIO_25 VCCCORE_2 AC26
V25 VCCIO_26 VCCCORE_3 AC28
V27 AC30
VCCIO_27 VCCCORE_4
V31 AC32
VCCIO_28 VCCCORE_5
V33 VCCIO_29 VCCCORE_6 AE24 V5REF:1mA max
VCCIO:4.07A max Y24 AE28 1.05V
VCCIO_30 VCCCORE_7
Y26 VCCIO_31 VCCCORE_8 AE30 V5REF_Sus:1mA max
Y30 VCCIO_32 VCCCORE_9 AE32 VCCCORE:1.6A max
Y32 AE34 VccSusHDA:10mA max 1.8V R636 0R_4 VCC1.05_VCCDMI_CCI
VCCIO_33 VCCCORE_10
Y34 VCCIO_34 VCCCORE_11 AE36
AG32 C593 C584
VCCCORE_12 3V_S5 1.8V
VCCCORE_13 AG34

*10u/6.3V_6

1u/6.3V_4
AJ32 U6J
VCCCORE_14
VCCCORE_15
AJ34 CAD NOTE:
AJ36 VCC5_REF BF1 AJ1 VCC1.8_VCCXCKPLL_PCH R647 0R_4
VCCCORE_16 V5REF VCCVRM_1 VCC1.8_VCCADMI_VRM R277 0R_4 PLACE DCPL CAP
VCCCORE_17 AL32 VCCVRM_4 R2
AL34 5V_REF_SUS BT25 R54 VCC1.8_VCCAFDI_SATTA3_VRM R116 0R_4 AT EDGE OF PCH PIN AJ20
VCCCORE_18 V5REF_SUS VCCVRM_3
AN32 R56
D VCCCORE_19 3.3V VCCVRM_2 D
AN34 AV28
VCCCORE_20 VCCSUSHDA C607
VCCCORE_21 AR32 VCCPNAND_1 T55
AA34 VCCIO_22 VCCCORE_22 AR34 AU20 VCC3_3_9 VCCPNAND_2 T57
3.3V

*0.1U/16V_4
AA36 VCCIO_23 AV20 VCC3_3_10
3V_S5 R515 *0R_4 AU22 AL38 VccVRM:159mA max
VCC3_3_7 VCC3_3_5
V22 VCCIO_35 VCC3_3_6 AN38
Y20 3.3V R516 0R_4 AN52 R659 0R_4 VCC3_VCCA_DAC_PCH
VCCIO_36 1.05V VCCSPI
Y22 BC17
VCCIO_37 VCC3_3_2
VCCASW_4 AG24 VCC3_3_3 BD17 Vcc3:409mA max
AG26 CAD NOTE: C442 BD20 DESIGN NOTE:
VCCASW_5 VCC3_3_4 3.3V
VCCASW_6 AG28 PLACE CAPACITOR RESISTOR IS INSTALL AS DEFENSIVE MOVE
1.05V_VCCIO AJ24 1u/6.3V_4 A12
VCCASW_7 CLOSE TO PIN AN52 VCC3_3_8 FOR NON-VIDEO CONNECT VCCA_DAC DIRECTLY TO P3V3.
AJ26 AF57
VCCASW_8 VCC3_3_1 C481 C404
VCCASW_9 AJ28 CAD NOTE: FOR VIDEO CONNECT VCCA_DAC TO LINEAR VR (SEE PDG)
VCCASW_10 AL24 BG CAPS PLACE ON EACH PIN

0.1u/25V_4

0.1u/25V_4
B41 VCCDMI_02 VCCASW_11 AL28
VCCDMI:0.57A max VCCASW_12
AN22
E41 AN24 VccSPI:20mA max 1.05V
VCCDMI_01 VCCASW_13
VCCASW_14
AN26 VCCASW:1.61A max VCCSUS3_3_11
BT35
AN28 3V_S5
1.05V VCCASW_15 R84 *0R_4 VCC1.05_VCCAPLL_FDI
AR24 AV30
VCCASW_16 VCCSUS3_3_2 VCCSUS3_3 R563 0R_4
AR26 AV32
VCCASW_17 VCCSUS3_3_3 R279 *0R_4 VCC1.05_VCCA_CLK
AL40 AR28 AY31
VCCIO_8 VCCASW_18 VCCSUS3_3_4 C503 C517
AN40 AR30 AY33
VCCIO_9 VCCASW_19 VCCSUS3_3_5

0.1u/25V_4

0.1u/25V_4
AN41 VCCIO_10 VCCASW_20 AR36 VCCSUS3_3_6 BJ36
VCCASW_21
AR38
VCCSUS3_3_7
BK36 DESIGN NOTE:
AG38 VCCIO_20 VCCASW_22 AU30 VCCSUS3_3_8 BM36 VccSus3_3: 97mA max EV USE ONLY
AG40 AU36
VCCIO_21 VCCASW_23 ROUTE ON EV LAYERS
VCCSUS3_3_9
AT40 VccDSW3_3: 3mA max
AG41 AU34 AU38
VCCIO_7 VCCASW_3 VCCSUS3_3_10
AV36
VCCASW_2
VCCASW_1 AU32 VccDIFFCLKN:55mA max VCCSUS3_3_1 U31 V_PROC_IO: 1mA max
AV40 R548 *0R_4 3V_AUX
VCC1.05_VCCDIFFCLKN VCCDSW3_3
VCCDIFFCLKN0
AE15 Deep S4/S5 Power
AE17 D55 1.05V_VCCIO RTC_VCC
VCCDIFFCLKN1 V_PROC_IO R547 0R_4
VCCDIFFCLKN2 AG15 V_PROC_IO_NCTF B56 3V_S5
AJ20 VCC1.05_VCCDMI_CCI
VCCCLKDMI
AE40 A39 VCC1.05_VCCA_USBSUS
VCCIO_18 VCC1.05_PCH_VCCSSC DCPSUS_3
AC20 AA32 TP_VCC1.05_VCCSUS1 1 TP91
VCCSSC0 DCPSUS_1
AE20
VCCSSC1
BU42
VCCRTC
VCCIO_1
AV24 VccSSC:105mA max
VCC1.05_VCCPLL_SATA3_PCH U56 AV26 VCC3_VCCA_DAC_PCH AT1 BR54 VCC1.05_VCCRTCEXT
VCCAPLLSATA VCCIO_2 VCCADAC DCPRTC
VCCIO_3 AY25 DCPRTC_NCTF BT56
BA38 AY27 VCC1.05_VCCA_DPLLA AB1 AT41 TP_VCC1.05_VCCSUS1 TP79
VCCIO_19 VCCIO_4 VCCADPLLA DCPSUS_2
VCC1.05_VCCA_PLLEXP_PCH B53 V36 VCC1.05_VCCA_DPLLB AC2 AV41 TP_VCC1.05_VCCDSW 1 TP81
VCCAPLLEXP VCCIO_13 VCCADPLLB DCPSUSBYP
ET-0329-05
C VCC1.05_VCCAPLL_FDI C54 Y36 BA46 VCC1.05_VCCSST C
VCCAFDIPLL VCCIO_12 DCPSST
VCC1.05_VCCA_CLK AL5 AJ38 1.05V C426 C121 C160
VCCACLK VCCIO_11 CUGARPOINT

0.1u/25V_4

0.1u/25V_4

0.1u/25V_4
VCC1.05_VCCAPLL_CPY_PCH A19 Y28
VCCAPLLDMI2 VCCIO_14 C487 C535 C603
1u/6.3V_4

1u/6.3V_4

*0.1u/25V_4

CUGARPOINT CAD NOTE:


PLACE CAPACITOR
AT PCH EDGE
CLOSE TO PINS
VCC1.05_VCCAPLL_FDI

C712 D30
0.1u/25V_4

VPORT 0603 220K-V05


GND
for ESD
Jerry 0518 3.3V
PCIE
C619

0.1u/25V_4
USB CLASSIC FILTER
3.3V
1.05V 3V_S5 CAD NOTE:
VCC1.05_VCCDIFFCLKN 1.05V
PLACE CAP AT PCH EDGE
C595
NEAR PIN A12
VCC1.05_VCCDIFFCLKN R595 0R_4 C485 C486 C527 C533 C456 C479 C422 C436 CAD NOTE:

4.7u/10V_6
PLACE DCPL CAP
PCIE DECOUPLING
0.1u/25V_4

0.1u/25V_4

0.1u/25V_4

0.1u/25V_4

0.1u/25V_4
C558 CAD NOTE: AT CORNER OF PCH

10u/10V_8

10u/10V_8

2.2u/6.3V_6
5V 3.3V PLACE P3V3_STBY DCPL NEAR PIN BD17 1.05V
0.1u/25V_4

CAD NOTE CAD NOTE: CAPS AT ENDS OF POWER


PLACE CAPACITOR FOR PCH DECOUPLING CORRIDOR (VCCP_USB)
AT PCH EDGE NEAR PIN AE15 (E)
C520 C531
3.3V

1u/6.3V_4

1u/6.3V_4
VCCP_DSW
3

3V_AUX
2 Q31 C548
MMBT3904 C472

0.1u/25V_4
1

0.1u/25V_4
R655 10R_4 VCC5_REF
1.05V CAD NOTE: 3.3V PCIE
C614 PLACE DCPL CAP
3.3V 3.3V
B AT EDGE OF PCH B
0.1u/16V_4

VCC1.05_PCH_VCCSSC R589 0R_4


3V_S5 NEAR PIN AV40 C407 C543
C534 C568 C585

10u/10V_8

1u/6.3V_4
1u/6.3V_4

*1u/6.3V_4

1u/6.3V_4

CAD NOTE: 3.3V SATA BG 1.05V


SATA DCPL
5V_S5 PLACE DCPL CAP DESIGN NOTE:
GENERAL PURPOSE DCPL CAPS C421 C120
AT PIN AU22 (BSC)
3

0.1u/25V_4

1u/6.3V_4
2 Q2
MMBT3904 CAD NOTE: C494 C516 PCI
PLACE DCPL CAP
1

1u/6.3V_4

1u/6.3V_4
R151 10R_4 5V_REF_SUS 3.3V 3.3V 3.3V
AT EDGE OF PCH
C131 NEAR PIN AF57
DISIGN NOTE:PLACE REF5V CIRCUITRY NEAR PCH ET-0329-04
0.1u/16V_4

for ESD C604 C542 C403 C596 C471 C405


Jerry 0517 1.05V_VCCIO
PCH VCC CPU IO

22u/6.3V_8

0.1u/25V_4

0.1u/25V_4

0.1u/25V_4

0.1u/25V_4
1u/6.3V_4
D28 C118 C598 C154 C153
SATA PLLL FILTER
C109
1u/6.3V_4

*0.1u/25V_4

0.1u/25V_4

0.1u/25V_4

1.05V 1.05V
4.7u/10V_6

VPORT 0603 220K-V05


GND CAD NOTE:
10uH/125mA PLACE 4.7 UF DCPL L3 VCC1.05_VCCPLL_SATA3_PCH
L34 VCC1.05_VCCA_DPLLA_R R650 0R/F_6 VCC1.05_VCCA_DPLLA *10uH/125mA
CAP NEAR PIN D55
CORNER OF PCH
C108 C119 3V_S5 PCI
C605 C599 PLACE 1UF CAP

*10u/6.3V_6

*1u/6.3V_4
C427 VCCPSUS PCI
AT PCH EDGE PIN AB1
10u/6.3V_6

1u/6.3V_4

22u/6.3V_8
CAD NOTE:
CAD NOTE: PLACE DCPL CAPS
10uH/125mA PLACE VCCSATA DCPL CAPS AT ENDS OF POWER CORRIDOR NEAR PCH
L35 VCC1.05_VCCA_DPLLB_R R651 0R/F_6 VCC1.05_VCCA_DPLLB

C606 C600 PLACE 1UF CAP 3V_S5 1.8V


RTC_VCC
AT PCH EDGE PIN AC2
DMI PLL FILTER
10u/6.3V_6

1u/6.3V_4

CAD NOTE: C446 CAD NOTE: VCCPRTC


C406
PLACE DCPL CAP PLACE DCPL CAP NEAR PIN BU42 1.05V
NEAR PCH NEAR SERIES R
0.1u/25V_4

C142 0.1u/25V_4
10u/10V_8

*10uH/125mA ON PCH PIN R2


L28 VCC1.05_VCCAPLL_CPY_PCH_R R593 *0R/F_6 VCC1.05_VCCAPLL_CPY_PCH 1 2 VCC1.05_VCCA_PLLEXP_PCH_R R111 *0R_4 VCC1.05_VCCA_PLLEXP_PCH
VCC5_REF C613 0.1u/25V_4 L4 *1uH/500mA
A C112 C111 A
C549 C551 1.8V CAD NOTE:

*10u/6.3V_6

*1u/6.3V_4
PLACE VCCAPLLEXP CAPS AT ENDS OF POWER CORRIDOR
*10u/6.3V_6

*0.1U/16V_4

C428 0.1u/25V_4
DESIGN NOTE:
FENSIVE MOVE STUFF DESIGN NOTE:
1.05V 5V_REF_SUS C528 0.1u/25V_4
IF VCCAPLL_CPY HAS NOISE ISSUE PCH ASW DEFENSIVE EXTERNAL SOURCE FOR VCCAPLL_EXP

C455 C508 C495 C536 DESIGN NOTE:


PLACE 0.1UF DCPL CAPS WITHIN 40 MILS OF PCH
4.7u/10V_6

1u/6.3V_4

0.1u/25V_4

0.1u/25V_4

CAD NOTE:
PLACE 4.7 UF DCPL
CAP NEAR PIN D55 Quanta Computer Inc.

www.vinafix.vn
CORNER OF PCH
PROJECT : QUA
Size Document Number Rev
1A
PCH_POWER
Date: Monday, July 04, 2011 Sheet 20 of 48
5 4 3 2 1
5 4 3 2 1

U6K U6L
AT47 VSS_95 VSS_5 A26 BU29 VSS_181 VSS_275 V38
AT52 VSS_96 VSS_6 A29 BU36 VSS_182 VSS_276 V6
AT6 VSS_97 VSS_7 A42 BU39 VSS_183 VSS_277 W1
AT8 VSS_98 VSS_8 A49 C19 VSS_184 VSS_278 W55
AU24 VSS_99 VSS_9 A9 C32 VSS_185 VSS_279 W57
AU26 VSS_100 VSS_10 AA20 C39 VSS_186 VSS_280 Y11
AU28 VSS_101 VSS_11 AA22 C4 VSS_187 VSS_281 Y15
AU5 VSS_102 VSS_12 AA24 D15 VSS_188 VSS_282 Y38
D AV12 VSS_103 VSS_13 AA26 D23 VSS_189 VSS_283 Y40 D
BA49 VSS_119 VSS_14 AA28 D3 VSS_190 VSS_284 U41
BB1 VSS_120 VSS_15 AA30 D35 VSS_191 VSS_285 Y43
BB3 VSS_121 VSS_16 AA38 D43 VSS_192 VSS_286 Y46
BB52 VSS_122 VSS_17 AB11 D45 VSS_193 VSS_287 Y47
BB6 VSS_123 VSS_18 AB15 E19 VSS_194 VSS_288 Y49
BC14 VSS_124 VSS_19 AB40 E39 VSS_195 VSS_289 Y52
M33 VSS_241 VSS_20 AB41 E6 VSS_196 VSS_290 Y6
M36 VSS_242 VSS_21 AB43 E9 VSS_197
M46 VSS_243 VSS_22 AB47 F10 VSS_198 VSS_NCTF_1 A4
M52 VSS_244 VSS_23 AB52 F12 VSS_199 VSS_NCTF_2 A6
M57 VSS_245 VSS_24 AB57 F16 VSS_200 VSS_NCTF_3 B2
M6 AB6 F22 BM1 for ESD
VSS_246 VSS_25 VSS_201 VSS_NCTF_4 Jerry 0513
M8 VSS_247 VSS_26 AC22 F26 VSS_202 VSS_NCTF_5 BM57
M9 VSS_248 VSS_27 AC34 F32 VSS_203 VSS_NCTF_6 BP57
N4 VSS_249 VSS_28 AC36 F33 VSS_204 VSS_NCTF_7 BT2
N54 VSS_250 VSS_29 AC38 F35 VSS_205 VSS_NCTF_8 BU4
R11 VSS_251 VSS_30 AC4 F36 VSS_206 VSS_NCTF_9 BU52
R15 VSS_252 VSS_31 AC54 F40 VSS_207 VSS_NCTF_10 BU54
R17 AE14 F42 BU6 PD_PCH_TDE_FORCE2
VSS_253 VSS_32 VSS_208 VSS_NCTF_11
R22 VSS_254 VSS_33 AE18 F46 VSS_209 VSS_NCTF_12 D1
R4 AE22 F48 F1 D27
VSS_255 VSS_34 VSS_210 VSS_NCTF_13
R41 VSS_256 VSS_35 AE26 F50 VSS_211
R43 VSS_257 VSS_36 AE38 E54 VSS_212 VSS_4 AY22
R46 AE4 F8 C12 VPORT 0603 220K-V05
VSS_258 VSS_37 VSS_213 VSS_3
R49 VSS_259 VSS_38 AE47 AV18 VSS_104 VSS_1 AE56 GND
BC15 VSS_125 VSS_39 AE8 AV22 VSS_105 VSS_2 BR36
BC20 VSS_126 VSS_40 AE9 AV34 VSS_106 VSSADAC AU2
BC27 VSS_127 VSS_41 AF52 AV38 VSS_107
BC31 AF6 AV47 A54 PD_PCH_TDB_FORCE2 R112 0R_4
C VSS_128 VSS_42 VSS_108 NC_1 PD_PCH_TDB_SENSE2 R110 0R_4 C
BC36 VSS_129 VSS_43 AG11 AV6 VSS_109 NC_2 A52
BC38 AG14 AW57 F57 PD_PCH_TDE_FORCE2 R113 0R_4
VSS_130 VSS_44 VSS_110 NC_3 PD_PCH_TDE_SENSE2 R105 0R_4
BC47 VSS_131 VSS_45 AG20 AY38 VSS_111 NC_4 D57
BC9 VSS_132 VSS_46 AG22 AY6 VSS_112
BD25 VSS_133 VSS_47 AG30 B23 VSS_113 VSS_P25 P25
BD33 VSS_134 VSS_48 AG36 BA11 VSS_114 VSS_R25 R25
BF12 VSS_135 VSS_49 AG43 BA12 VSS_115 VSS_P36 P36
BF20 VSS_136 VSS_50 AG44 BA31 VSS_116 VSS_R36 R36
BF25 VSS_137 VSS_51 AG46 BA41 VSS_117 VSS_AL44 AL44
BF33 VSS_138 VSS_52 AG5 BA44 VSS_118 VSS_AL43 AL43
BF41 VSS_139 VSS_53 AG50 G54 VSS_214
BF43 AG53 H15 L33 Z3801 1 TP83
VSS_140 VSS_54 VSS_215 TP3 Z3802 TP74
BF46 VSS_141 VSS_55 AH52 H20 VSS_216 TP13 AE49 1
BF52 AH6 H22 BA36 Z3803 1 TP86
VSS_142 VSS_56 VSS_217 TP17 Z3804 TP85
BF6 VSS_143 VSS_57 AJ22 H25 VSS_218 TP18 AY36 1
BG22 AJ30 H27 Y14 Z3805 1 TP121
VSS_144 VSS_58 VSS_219 TP19 Z3806 TP124
BG25 VSS_145 VSS_59 AJ57 H33 VSS_220 TP20 Y12 1
BG27 AK52 H6 P22 Z3807 R585 *10K/F_4
VSS_146 VSS_60 VSS_221 TP1 Z3808 R540 *10K/F_4
BG31 VSS_147 VSS_61 AK6 J1 VSS_222 TP4 M38
BG33 AL11 J33 L31 Z3809 1 TP92
VSS_148 VSS_62 VSS_223 TP2 Z3810 TP84
BG36 VSS_149 VSS_63 AL18 J46 VSS_224 TP5 L36 1
BG38 AL20 J48 AE41 Z3811 1 TP80
VSS_150 VSS_64 VSS_225 TP14 Z3812 TP76
BH52 VSS_151 VSS_65 AL22 J5 VSS_226 TP15 AE43 1
BH6 AL26 J53 BA27 PD_PCH_PGDMON
VSS_152 VSS_66 VSS_227 TP11 Z3813 TP73
BJ1 VSS_153 VSS_67 AL30 K52 VSS_228 TP10 BM46 1
BJ15 VSS_154 VSS_68 AL36 K6 VSS_229
BK20 VSS_155 VSS_69 AL41 K9 VSS_230 VSS_NCTF_14 BP1
BK41 VSS_156 VSS_70 AL46 L12 VSS_231
BK52 VSS_157 VSS_71 AL47 L17 VSS_232
B BK6 AM3 L38 AG12 TP_PCH_BKLTCTL 1 TP120 B
VSS_158 VSS_72 VSS_233 L_BKLTCTL TP_PCH_BKLTEN_R 1 TP109
BM10 VSS_159 VSS_73 AM52 L41 VSS_234 L_BKLTEN AG18
BM12 AM57 L43 AG17 TP_PCH_VDDEN_R 1 TP119
VSS_160 VSS_74 VSS_235 L_VDD_EN
BM16 VSS_161 VSS_75 AN11 M20 VSS_236
BM22 VSS_162 VSS_76 AN12 M22 VSS_237
BM23 AN15 M25 TP_PCH_BKLTEN_R R302 UMA@0R_4
VSS_163 VSS_77 VSS_238 UMA_PCH_BKLTEN [31]
BM26 VSS_164 VSS_78 AN17 M27 VSS_239
BM28 AN18 M31 TP_PCH_VDDEN_R R280 UMA@0R_4
VSS_165 VSS_79 VSS_240 UMA_PCH_VDDEN [31]
BM32 VSS_166 VSS_80 AN20 T52 VSS_260
BM40 AN30 T6 TP_PCH_BKLTCTL R613 UMA@0R_4
VSS_167 VSS_81 VSS_261 PCH_PW M_IN [35]
BM42 VSS_168 VSS_82 AN36 U11 VSS_262
BM48 VSS_169 VSS_83 AN4 U15 VSS_263
BM5 VSS_170 VSS_84 AN43 U17 VSS_264
BN31 AN47 U20 R569 *1K/F_4 PD_PCH_PGDMON
VSS_171 VSS_85 VSS_265
BN47 VSS_172 VSS_86 AN54 U22 VSS_266
BN6 VSS_173 VSS_87 AN9 U25 VSS_267
BP3 VSS_174 VSS_88 AR20 U27 VSS_268
BP33 VSS_175 VSS_89 AR22 U33 VSS_269
BP35 VSS_176 VSS_90 AR52 U36 VSS_270
DESIGN NOTE:
BR22 VSS_177 VSS_91 AR6 U38 VSS_271 DFT STRAP -- DFXTESTMODE ENABLEDRIVEN HIGH OR LOW
BR52 VSS_178 VSS_92 AT15 U47 VSS_272 P/U: TEST MODE IS DISABLED (DEFAULT)
BU19 VSS_179 VSS_93 AT18 U53 VSS_273
BU26 AT43 V20 P/D: TEST MODE IS ENABLED
VSS_180 VSS_94 VSS_274
PCH PROVIDES WEAK INTERNAL P/U
CUGARPOINT CUGARPOINT

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
PCH_GND
Date: Monday, July 04, 2011 Sheet 21 of 48
5 4 3 2 1
5 4 3 2 1

U7A

<SEAN0331>
X5R change
PEG_TX0 C_PEG_RX0 C63 DIS@0.22u/6.3V_4
D
[6] PEG_TX0
PEG_TX#0
AA38
Y37
PCIE_RX0P PCIE_TX0P Y33
Y32 C_PEG_RX#0
AC-CAP
C64 DIS@0.22u/6.3V_4
PEG_RX0 [6] D

[6] PEG_TX#0 PCIE_RX0N PCIE_TX0N PEG_RX#0 [6]

PEG_TX1 Y35 W33 C_PEG_RX1 C71 DIS@0.22u/6.3V_4


[6] PEG_TX1 PCIE_RX1P PCIE_TX1P PEG_RX1 [6]
PEG_TX#1 W36 W32 C_PEG_RX#1 C72 DIS@0.22u/6.3V_4
[6] PEG_TX#1 PCIE_RX1N PCIE_TX1N PEG_RX#1 [6]

PEG_TX2 W38 U33 C_PEG_RX2 C61 DIS@0.22u/6.3V_4


[6] PEG_TX2 PCIE_RX2P PCIE_TX2P PEG_RX2 [6]
PEG_TX#2 V37 U32 C_PEG_RX#2 C62 DIS@0.22u/6.3V_4
[6] PEG_TX#2 PCIE_RX2N PCIE_TX2N PEG_RX#2 [6]

PEG_TX3 V35 U30 C_PEG_RX3 C69 DIS@0.22u/6.3V_4


[6] PEG_TX3 PCIE_RX3P PCIE_TX3P PEG_RX3 [6]
PEG_TX#3 U36 U29 C_PEG_RX#3 C70 DIS@0.22u/6.3V_4
[6] PEG_TX#3 PCIE_RX3N PCIE_TX3N PEG_RX#3 [6]

PEG_TX4 U38 T33 C_PEG_RX4 C59 DIS@0.22u/6.3V_4


[6] PEG_TX4 PCIE_RX4P PCIE_TX4P PEG_RX4 [6]
PEG_TX#4 T37 T32 C_PEG_RX#4 C60 DIS@0.22u/6.3V_4
[6] PEG_TX#4 PCIE_RX4N PCIE_TX4N PEG_RX#4 [6]

PCI EXPRESS INTERFACE


PEG_TX5 T35 T30 C_PEG_RX5 C67 DIS@0.22u/6.3V_4
[6] PEG_TX5 PCIE_RX5P PCIE_TX5P PEG_RX5 [6]
PEG_TX#5 R36 T29 C_PEG_RX#5 C68 DIS@0.22u/6.3V_4
[6] PEG_TX#5 PCIE_RX5N PCIE_TX5N PEG_RX#5 [6]

PEG_TX6 R38 P33 C_PEG_RX6 C57 DIS@0.22u/6.3V_4


C [6] PEG_TX6 PCIE_RX6P PCIE_TX6P PEG_RX6 [6] C
PEG_TX#6 P37 P32 C_PEG_RX#6 C58 DIS@0.22u/6.3V_4
[6] PEG_TX#6 PCIE_RX6N PCIE_TX6N PEG_RX#6 [6]

PEG_TX7 P35 P30 C_PEG_RX7 C65 DIS@0.22u/6.3V_4


[6] PEG_TX7 PCIE_RX7P PCIE_TX7P PEG_RX7 [6]
PEG_TX#7 N36 P29 C_PEG_RX#7 C66 DIS@0.22u/6.3V_4
[6] PEG_TX#7 PCIE_RX7N PCIE_TX7N PEG_RX#7 [6]

PEG_TX8 N38 N33 C_PEG_RX8 C55 DIS@0.22u/6.3V_4


[6] PEG_TX8 PCIE_RX8P PCIE_TX8P PEG_RX8 [6]
PEG_TX#8 M37 N32 C_PEG_RX#8 C56 DIS@0.22u/6.3V_4
[6] PEG_TX#8 PCIE_RX8N PCIE_TX8N PEG_RX#8 [6]

PEG_TX9 M35 N30 C_PEG_RX9 C130 DIS@0.22u/6.3V_4


[6] PEG_TX9 PCIE_RX9P PCIE_TX9P PEG_RX9 [6]
PEG_TX#9 L36 N29 C_PEG_RX#9 C132 DIS@0.22u/6.3V_4
[6] PEG_TX#9 PCIE_RX9N PCIE_TX9N PEG_RX#9 [6]

PEG_TX10 L38 L33 C_PEG_RX10 C129 DIS@0.22u/6.3V_4


[6] PEG_TX10 PCIE_RX10P PCIE_TX10P PEG_RX10 [6]
PEG_TX#10 K37 L32 C_PEG_RX#10 C126 DIS@0.22u/6.3V_4
[6] PEG_TX#10 PCIE_RX10N PCIE_TX10N PEG_RX#10 [6]

PEG_TX11 K35 L30 C_PEG_RX11 C139 DIS@0.22u/6.3V_4


[6] PEG_TX11 PCIE_RX11P PCIE_TX11P PEG_RX11 [6]
PEG_TX#11 J36 L29 C_PEG_RX#11 C133 DIS@0.22u/6.3V_4
[6] PEG_TX#11 PCIE_RX11N PCIE_TX11N PEG_RX#11 [6]

PEG_TX12 J38 K33 C_PEG_RX12 C143 DIS@0.22u/6.3V_4


[6] PEG_TX12 PCIE_RX12P PCIE_TX12P PEG_RX12 [6]
B PEG_TX#12 H37 K32 C_PEG_RX#12 C140 DIS@0.22u/6.3V_4 B
[6] PEG_TX#12 PCIE_RX12N PCIE_TX12N PEG_RX#12 [6]

PEG_TX13 H35 J33 C_PEG_RX13 C145 DIS@0.22u/6.3V_4


[6] PEG_TX13 PCIE_RX13P PCIE_TX13P PEG_RX13 [6]
PEG_TX#13 G36 J32 C_PEG_RX#13 C144 DIS@0.22u/6.3V_4
[6] PEG_TX#13 PCIE_RX13N PCIE_TX13N PEG_RX#13 [6]

PEG_TX14 G38 K30 C_PEG_RX14 C151 DIS@0.22u/6.3V_4


[6] PEG_TX14 PCIE_RX14P PCIE_TX14P PEG_RX14 [6]
PEG_TX#14 F37 K29 C_PEG_RX#14 C150 DIS@0.22u/6.3V_4
[6] PEG_TX#14 PCIE_RX14N PCIE_TX14N PEG_RX#14 [6]

PEG_TX15 F35 H33 C_PEG_RX15 C152 DIS@0.22u/6.3V_4


[6] PEG_TX15 PCIE_RX15P PCIE_TX15P PEG_RX15 [6]
PEG_TX#15 E37 H32 C_PEG_RX#15 C156 DIS@0.22u/6.3V_4
[6] PEG_TX#15 PCIE_RX15N PCIE_TX15N PEG_RX#15 [6]

CLOCK
[12] CLK_PCIE_VGA_P AB35 PCIE_REFCLKP
[12] CLK_PCIE_VGA_N AA36 PCIE_REFCLKN

CALIBRATION
AJ21 Y30 PCIE_CALRP R550 DIS@1.27K/F_4
NC#1 PCIE_CALRP
AK21 NC#2
DIS@10K/F_4
1 2 R591 AH16 Y29 PCIE_CALRN R549 DIS@2K/F_4 1V_VGA
A PWRGOOD PCIE_CALRN A

[16,32,33,36,37] PLTRST_PCIE_N AA30 PERSTB

DIS@Caspian M2
Quanta Computer Inc.
PROJECT : QUA
Size Document Number Rev

www.vinafix.vn
1A
Caspian_PEG
Date: Monday, July 04, 2011 Sheet 22 of 48
5 4 3 2 1
5 4 3 2 1

CONFIGURATION
STRAPS
MEM_ID2 MEM_ID1 MEM_ID0 ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE

R229 R216 R215


Memory Straps U7B
USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS Name DESCRIPTION OF DEFAULT SETTINGS

X7R TX_PWRS_ENB GPIO0 Transmitter Power Savings Enable


0 0 0 H5TQ1G63DFR-11C DDR3 64M*16 900MHz QB_AKD5LZWTW02/BS_AKD5LZWTW14 AU24 VGA_TMDSA_CLK+_C C175 DIS@0.1u/25V_4 1 0: 50% Tx output swing for mobile mode
TXCAP_DPA3P VGA_TMDSA_CLK+ [31]
AV23 VGA_TMDSA_CLK-_C C178 DIS@0.1u/25V_4 1: full Tx output swing (Default setting for Desktop)
TXCAM_DPA3N VGA_TMDSA_CLK- [31]
AT25 VGA_TMDSA_DAP0_C C173 DIS@0.1u/16V_4
TX0P_DPA2P VGA_TMDSA_DAP0 [31]
MUTI GFX AR24 VGA_TMDSA_DAN0_C C177 DIS@0.1u/25V_4 TX_DEEMPH_EN GPIO1 PCI Express Transmitter De-emphasis Enable
SAM K4W1G1646G-BC11 DDR3 64M*16 933MHZ(AKD5EGGT500) DPA TX0M_DPA2N VGA_TMDSA_DAN0 [31] 1 0: Tx de-emphasis disabled for mobile mode
0 1 0 AU26 VGA_TMDSA_DAP1_C C168 DIS@0.1u/25V_4 1: Tx de-emphasis enabled (Default setting for Desktop)
TX1P_DPA1P VGA_TMDSA_DAP1 [31]
1.8V AV25 VGA_TMDSA_DAN1_C C171 DIS@0.1u/16V_4
TX1M_DPA1N VGA_TMDSA_DAN1 [31]
0 1 1 HYN H5TQ2G63BFR-12C DDR3 128*16 800HZ (AKD5MGGTW00) AR8 AT27 VGA_TMDSA_DAP2_C C167 DIS@0.1u/25V_4 BIF_GEN2_EN_A GPIO2 0 = Advertises the PCI-E device as 2.5 GT/s capable at power-on.
AU8
DVPCNTL_MVP_0 TX2P_DPA0P
AR26 VGA_TMDSA_DAN2_C C170 DIS@0.1u/25V_4
VGA_TMDSA_DAP2 [31] 1 1 = Advertises the PCI-E device as 5.0 GT/s capable at power-on.
D DVPCNTL_MVP_1 TX2M_DPA0N VGA_TMDSA_DAN2 [31] D
AP8 Note:5.0 GT/s capability will be controlled by software.
3V_VGA <sean0327> +VDDR4 DVPCNTL_0
AW8 AR30
DVPCNTL_1 TXCBP_DPB3P
GFX_CORE_CNTRL1
modify AR3
DVPCNTL_2 TXCBM_DPB3N
AT29 HDMI/500R PD near CONN
R635 *DIS@10K/F_4 Memory ID AR1 BIF_VGA_DIS GPIO9 VGA Disable determines whether or not the card will
R215 VRAM_DIS@10K/F_4 MEM_ID0 AU1
DVPCLK
AV31
0 be recognized as the system's VGA controller
R202 *DIS@10K/F_4 GFX_CORE_CNTRL0 R216 VRAM_DIS@10K/F_4 MEM_ID1 DVPDATA_0 TX3P_DPB2P 0: VGA Controller capacity enabled
VRAM TYPE R229 VRAM_DIS@10K/F_4 MEM_ID2
AU3
AW3
DVPDATA_1 DPB TX3M_DPB2N
AU30
1: The device will not be recognized as the systemˇs VGA controller
R197 *DIS@10K/F_4 GPIO_23_CLKREQb R210 VRAM_DIS@10K/F_4 MEM_ID3 DVPDATA_2
AP6 AR32
DVPDATA_3 TX4P_DPB1P
AW5 AT31
R575 *DIS@10K/F_4 GPIO24_TRSTB DVPDATA_4 TX4M_DPB1N BIOS_ROM_EN GPIO22 ENABLE EXTERNAL BIOS ROM
AU5
DVPDATA_5 0 1:enable 0:disable
AR6 AT33 <sean0327>
R568 *DIS@10K/F_4 GPIO25_TDI DVPDATA_6 TX5P_DPB0P modify
AW6 AU32
DVPDATA_7 TX5M_DPB0N ROMIDCFG(2:0) GPIO[13:11]
AU6
DVPDATA_8 Primary Memory Aperture size requested
R566 *DIS@10K/F_4 GPIO27_TMS AT7 AU14
DVPDATA_9 TXCCP_DPC3P Size of the primary memory apertures CONFIG[2:0]
AV7 AV13
R587 DIS@10K/F_4 GPIO5 DVPDATA_10 TXCCM_DPC3N 128 MB 000
AN7
DVPDATA_11 256 MB 001
AV9 AT15
R596 *DIS@10K/F_4 EXT_LVDS_BLON DVPDATA_12 TX0P_DPC2P 64 MB 010
AT9 AR14
DVPDATA_13 TX0M_DPC2N 32 MB 011
AR10
R578 DIS@10K/F_4 GPIO0 DVPDATA_14 DPC 512 MB Not Supported
AW10 AU16
DVPDATA_15 TX1P_DPC1P Note:For frame buffers larger than 256 MB (e.g. 512 MB, 1 GB) the aperture
AU10 AV15
R580 DIS@10K/F_4 GPIO1 DVPDATA_16 TX1M_DPC1N size should be 256 MB.
AP10
VBIOS 3V_VGA AV11
DVPDATA_17
AT17
R179 DIS@10K/F_4 GPIO2 DVPDATA_18 TX2P_DPC0P
ROM C594 *DIS@0.1U/16V_4
AT11
AR12
DVPDATA_19 TX2M_DPC0N
AR16
VIP_DEVICE_STRAP_ENA DAC2_VSY IGNORE VIP DEVICE STRAPS 1:enable 0:disable
R634 *DIS@10K/F_4 GPIO8_ROMSO DVPDATA_20
U9 AW12 AU20
DVPDATA_21 TXCDP_DPD3P
AU12 AT19
R133 DIS@10K/F_4 EXT_CRT_HSYNC GPIO22_ROMCS# DVPDATA_22 TXCDM_DPD3N AUD[1] EXT_CRT_HSYNC AUD[1] AUD[0]
1 8 AP12
GPIO8_ROMSO CE# VDD DVPDATA_23 AUD[0] EXT_CRT_VSYNC 0 0 No audio function
2 7 AT21
R134 DIS@10K/F_4 EXT_CRT_VSYNC SO HOLD# GPIO10_ROMSCK TX3P_DPD2P 0 1 Audio for DisplayPort and HDMI if dongle is detected
3 6 AR20
WP# SCK GPIO9_ROMSI TX3M_DPD2N 1 0 Audio for DisplayPort only
ET-0325-03 4
VSS SI
5
R603 *DIS@10K/F_4 BBEN DPD AU22 1 1 Audio for both DisplayPort and HDMI
*DIS@W25X10BVSNIG TX4P_DPD1P
AV21
R638 *DIS@10K/F_4 GPIO9_ROMSI <sean0327> add * TX4M_DPD1N
I2C AT23 RSVD GPIO8 Internal use only.
R599 DIS@10K/F_4 GPIO11 TX5P_DPD0P RSVD GPIO_21_BB_EN Internal use only.
AR22
TX5M_DPD0N RSVD GENLK_CLK Internal use only.
AK26
R601 *DIS@10K/F_4 GPIO12 SCL <sean0327> modify DIS_TV@ -->
AJ26
SDA
DIS@
R608 *DIS@10K/F_4 GPIO13 AD39 EXT_CRT_RED C115 *DIS@10p/50V_4 Each configuration pin strap has an internal PD resistor which provides
GENERAL PURPOSE I/O R
AD37
R554 *DIS@10K/F_4 GENLK_CLK GPIO0 AH20
RB a default value of zero
GPIO1 GPIO_0 EXT_CRT_GRE C116 *DIS@10p/50V_4 R102 DIS@150R/F_4
AH18 AE36 EXT_CRT_RED [31]
C R631 *DIS@10K/F_4 GPIO22_ROMCS# GPIO2 GPIO_1 G C
AN16 AD35
R565 *DIS@0R_4 GPIO_2 GB R103 DIS@150R/F_4
AH23 EXT_CRT_GRE [31]
R574 *DIS@0R_4 GPIO_3_SMBDATA EXT_CRT_BLU C117 *DIS@10p/50V_4
AJ23 AF37
R567 DIS@10K/F_4 GPIO26_TCK TP150 GPIO5 GPIO_4_SMBCLK B R104 DIS@150R/F_4
AH17 AE38 EXT_CRT_BLU [31]
R632 *DIS@3.01K/F_4 GFX_CORE_CNTRL1 TP151 GPIO_5_AC_BATT DAC1 BB
AJ17
R205 *DIS@3.01K/F_4 GFX_CORE_CNTRL0 EXT_LVDS_BLON GPIO_6 EXT_CRT_HSYNC
AK17 AC36 EXT_CRT_HSYNC [31]
<sean0327> change Txx-> GPIO8_ROMSO GPIO_7_BLON HSYNC EXT_CRT_VSYNC
AJ13 AC38 EXT_CRT_VSYNC [31]
GPIO9_ROMSI GPIO_8_ROMSO VSYNC
TPxx AH15
GPIO10_ROMSCK GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK SYNC PU near
GPIO11 AK16 AB34 R519 DIS@499R/F_4
GPIO12 GPIO_11 RSET CONN
AL16
GPIO13 GPIO_12 +1.8V_AVDD_Q
AM16 AD34
GPIO13 GPIO12 TP152 AM14
GPIO_13 AVDD
AE34
GFX_CORE_CNTRL0 GPIO_14_HPD2 AVSSQ R542 DIS@10K/F_4
GPIO11 [44] GFX_CORE_CNTRL0
TP153
AM13
AK14
GPIO_15_PWRCNTL_0
AC33 +VDDD1 U7G
TP154 GPIO_16_SSIN VDD1DI
AG30 AC34
TBD TP155 AN14
GPIO_17_THERMAL_INT VSS1DI EXT_LVDS_BLON R544 DIS@0R/F_4
GPIO_18_HPD3 EXT_BKLT_EN [31]
GFX_CTF AM17
W25X10BVSNIG [7] GFX_CTF
[44] GFX_CORE_CNTRL1 GFX_CORE_CNTRL1 AL13
GPIO_19_CTF
AC30 LVDS CONTROL AK27 R543 *DIS@0R_4
BBEN GPIO_20_PWRCNTL_1 R2 VARY_BL
AJ14 AC31 AJ27 EXT_DISP_ON [31]
GPIO22_ROMCS# GPIO_21_BB_EN R2B DIGON
AK13
GPIO_23_CLKREQb GPIO_22_ROMCSB
AN13 AD30
GPIO24_TRSTB GPIO_23_CLKREQB G2
AM23
JTAG_TRSTB G2B
AD31 EVEN_CH
GPIO25_TDI AN23
GPIO26_TCK JTAG_TDI
AK23 AF30 AK35 EXT_TXUCLKOUTP [31]
GPIO27_TMS JTAG_TCK B2 TXCLK_UP_DPF3P
AL24 AF31 AL36 EXT_TXUCLKOUTN [31]
TP156 GPIO28_TDO JTAG_TMS B2B TXCLK_UN_DPF3N
AM24
Fixed 1.0V ET-0325-04 AJ19
JTAG_TDO
AJ38
GENERICA TXOUT_U0P_DPF2P EXT_TXUOUTP0 [31]
Volt AK19
AJ20
GENERICB C
AC32
AD32
TXOUT_U0N_DPF2N
AK37 EXT_TXUOUTN0 [31]
GENERICC Y
AK20 AF32 AH35
GFX_CORE_CNTRL0 H [33] VGA_TMDSB_HOT_PLUG
TP157 VGA_HPD4 AJ24
GENERICD COMP TXOUT_U1P_DPF1P
AJ36
EXT_TXUOUTP1 [31]
GENERICE_HPD4 TXOUT_U1N_DPF1N EXT_TXUOUTN1 [31]
AH26 DAC2
1.8V_VGA GENERICF GENLK_CLK
GFX_CORE_CNTRL1 H 0.6V AH24
GENERICG H2SYNC
AD29
TXOUT_U2P_DPF0P
AG38 EXT_TXUOUTP2 [31]
AC29 AH37 EXT_TXUOUTN2 [31]
R649 DIS@499R/F_4 V2SYNC TXOUT_U2N_DPF0N
AK24 AF35 EXT_TXUOUTP3 [31]
R648 DIS@249R/F_4 +0.6V_M92_VREFG HPD1 TXOUT_U3P
AG31 AG36 EXT_TXUOUTN3 [31]
VDD2DI TXOUT_U3N
AG32
VSS2DI
C609 LVTMDP ODD_CH
C608 DIS@0.1U/25V_4 DIS@68p/50V_4 AG33
+VDDD1 L15 A2VDD
1.8V_VGA AP34 EXT_TXLCLKOUTP [31]
B DIS@BEAD180R/1.5A_6 DIS@BEAD180R/1.5A_6 TXCLK_LP_DPE3P B
AD33 AR34 EXT_TXLCLKOUTN [31]
A2VDDQ R533 TXCLK_LN_DPE3N
1.8V_VGA AH13
C418 C423 L20 VREFG DIS@0R_4
AF33 AW37 EXT_TXLOUTP0 [31]
C408 C450 C433 A2VSSQ TXOUT_L0P_DPE2P
AU35 EXT_TXLOUTN0 [31]
DIS@0.1u/25V_4 DIS@1u/10V_4 DIS@4.7u/6.3V_6 C441 TXOUT_L0N_DPE2N
DIS@1U/10V_4 DIS@0.1U/25V_4 AA29 AR37
R2SET TXOUT_L1P_DPE1P EXT_TXLOUTP1 [31]
DIS@1U/10V_4 AM32 AU39
DPLL_PVDD TXOUT_L1N_DPE1N EXT_TXLOUTN1 [31]
AN32
DPLL_PVSS
LVDS AP35 EXT_TXLOUTP2 [31]
DDC/AUX TXOUT_L2P_DPE0P
1V_VGA AM26 VGA_LVDS_CLK [31] AR35 EXT_TXLOUTN2 [31]
L24 DIS@BEAD180R/1.5A_6 +1.1V_DPLL_VDDC AN31 PLL/CLOCK DDC1CLK TXOUT_L2N_DPE0N
AN26 VGA_LVDS_DAT [31]
DPLL_VDDC DDC1DATA
AN36 EXT_TXLOUTP3 [31]
C468 C467 C469 TXOUT_L3P
AM27 AP37 EXT_TXLOUTN3 [31]
DIS@1U/10V_4 DIS@0.1U/25V_4 EVGA-XTALI AUX1P TXOUT_L3N
AV33 AL27
DIS@1U/10V_4 EVGA-XTALO XTALIN AUX1N
AU34
+1.8V_AVDD_Q L17 XTALOUT
1.8V_VGA AM19
DIS@BEAD180R/1.5A_6 DDC2CLK add R710/R711 for reserve 3V_VGA
AL19
R162 DIS@0R_4 DIS_XOIN2 DDC2DATA 03/25 Joe DIS@Caspian M2
AW34
C435 C444 XO_IN
AN20
C424 R526 DIS@0R_4 AUX2P 3V_VGA
AW35 AM20
DIS@0.1U/25V_4 DIS@1U/10V_4 SS_IN AUX2N
DIS@4.7u/6.3V_6
<RrevB> chnage footprint AL30
HDMI R498
<sean0327> change DDCCLK_AUX3P
AM30 DIS@2.2K_4
DDCDATA_AUX3N

2
R160 *DIS@0R_4 DIS_XOIN2 footprint
[12] CLKOUT_SS27M
ET-0328-02 AL29
TMDS/HDMI
R166 *DIS@0R_4 EVGA-XTALI VGATHRM+ DDCCLK_AUX4P
[12] CLKOUT_NONSS27M AF29 AM29 1 3 VGA_TMDSA_DDC_CLK [31]
VGATHRM- DPLUS THERMAL DDCDATA_AUX4N
AG29 VGA_TMDSA_DDC_DAT [31]
DMINUS
AN21
DDCCLK_AUX5P Q26 DIS@2N7002
AM21
DDCDATA_AUX5N R497
AK32
TS_FDO CRT SDA/SCL PU near

2
AJ30 VGA_CRT_DDCCLK [31] DIS@2.2K_4 R710 *DIS@0R_4
EVGA-XTALI AL31
DDC6CLK
AJ31 VGA_CRT_DDCDAT [31]
CONN
C166 DIS@27p/50V_4 TS_A DDC6DATA
1 3
1

DIS@BEAD180R/1.5A_6 AK30 DDC PU near CONN


Y3 R168 +1.8V_TSVDD DDCCLK_AUX7P
For Int Clk 27Mhz 1.8V_VGA AJ32
TSVDD DDCDATA_AUX7N
AK29
DIS@27MHZ/20PPM DIS@10M_6 L19 AJ33 ET-0325-05 Q25 DIS@2N7002
TSVSS
2

C449 C432 C440 R711 *DIS@0R_4 781-1_3V R180 DIS@200R/F_6

C161 DIS@27p/50V_4
EVGA-XTALO
DIS@1U/10V_4 DIS@1U/10V_4 DIS@68p/50V_4
DIS@Caspian M2 GPU Thermal Sensor U8 C180 DIS@0.1u/25V_4
3V_VGA

[37] EC_SMB_CLK0 R582 DIS@0R_4 MB_CLK2 8 1


BG627000505/BG627000289 SMCLK VCC VGATHRM+
R588 DIS@0R_4 MB_DATA2 7 2
A
<SEAN0331> Y3 add Main Source [37] EC_SMB_DAT0 SMDATA DXP C477 A
R597 DIS@10K/F_4 VGA_THERMAL_ALERT 6 3 DIS@2200p/50V_4
3V_VGA -ALT DXN
5 4 VGATHRM-
GND -OVT
DIS@G781-1P8
-VGATHRM R198 *DIS@10K/F_4
3V_VGA
I2C ADDRESS: R703 DIS@10K/F_4
9AH DIS_DET# [37]

Quanta Computer Inc.

www.vinafix.vn
PROJECT : QUA
Size Document Number Rev
1A
Caspian_IO_STRAP/Thermal
Date: Monday, July 04, 2011 Sheet 23 of 48
5 4 3 2 1
5 4 3 2 1

U7C U7D
DDR2 DDR2 DDR2 DDR2
GDDR3/GDDR5 GDDR5/GDDR3 GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 ODTA0 DDR3 DDR3
[27] ODTA0
C37 G24 [27] ODTA1 ODTA1 MDA0 C5 P8 MAA0
DQA0_0/DQA_0 MAA0_0/MAA_0 MDA1 DQB0_0/DQB_0 MAB0_0/MAB_0 MAA1
C35 DQA0_1/DQA_1 MAA0_1/MAA_1 J23 C3 DQB0_1/DQB_1 MAB0_1/MAB_1 T9
A35 H24 RASA0# MDA2 E3 P9 MAA2

MEMORY INTERFACE A
DQA0_2/DQA_2 MAA0_2/MAA_2 [27] RASA0# DQB0_2/DQB_2 MAB0_2/MAB_2
E34 J24 RASA1# MDA3 E1 N7 MAA3

MEMORY INTERFACE B
DQA0_3/DQA_3 MAA0_3/MAA_3 [27] RASA1# DQB0_3/DQB_3 MAB0_3/MAB_3
G32 H26 MDA4 F1 N8 MAA4
DQA0_4/DQA_4 MAA0_4/MAA_4 CASA0# MDA5 DQB0_4/DQB_4 MAB0_4/MAB_4 MAA5
D33 DQA0_5/DQA_5 MAA0_5/MAA_5 J26 [27] CASA0# F3 DQB0_5/DQB_5 MAB0_5/MAB_5 N9
F32 H21 [27] CASA1# CASA1# MDA6 F5 U9 MAA6
DQA0_6/DQA_6 MAA0_6/MAA_6 MDA7 DQB0_6/DQB_6 MAB0_6/MAB_6 MAA7
E32 DQA0_7/DQA_7 MAA0_7/MAA_7 G21 G4 DQB0_7/DQB_7 MAB0_7/MAB_7 U8
D31 H19 [27] WEA0# WEA0# MDA8 H5 Y9 MAA8
DQA0_8/DQA_8 MAA1_0/MAA_8 WEA1# MDA9 DQB0_8/DQB_8 MAB1_0/MAB_8 MAA9
D F30 DQA0_9/DQA_9 MAA1_1/MAA_9 H20 [27] WEA1# H6 DQB0_9/DQB_9 MAB1_1/MAB_9 W9 D
C30 L13 MDA10 J4 AC8 MAA10
DQA0_10/DQA_10 MAA1_2/MAA_10 CSA0#_0 MDA11 DQB0_10/DQB_10 MAB1_2/MAB_10 MAA11
A30 DQA0_11/DQA_11 MAA1_3/MAA_11 G16 [27] CSA0#_0 K6 DQB0_11/DQB_11 MAB1_3/MAB_11 AC9
F28 J16 MDA12 K5 AA7 MAA12
DQA0_12/DQA_12 MAA1_4/MAA_12 MDA13 DQB0_12/DQB_12 MAB1_4/MAB_12 A_BA2
C28 DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 H16 L4 DQB0_13/DQB_13 MAB1_5/BA2 AA8
A28 J17 CSA1#_0 MDA14 M6 Y8 A_BA0
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 [27] CSA1#_0 DQB0_14/DQB_14 MAB1_6/BA0
E28 H17 MDA15 M1 AA9 A_BA1
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 MDA16 DQB0_15/DQB_15 MAB1_7/BA1
D27 DQA0_16/DQA_16 M3 DQB0_16/DQB_16
F26 A32 [27] CKEA0 CKEA0 MDA17 M5 H3 DQMA#0
DQA0_17/DQA_17 WCKA0_0/DQMA_0 CKEA1 MDA18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 DQMA#1
C26 DQA0_18/DQA_18 WCKA0B_0/DQMA_1 C32 [27] CKEA1 N4 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 H1
A26 D23 MDA19 P6 T3 DQMA#2
DQA0_19/DQA_19 WCKA0_1/DQMA_2 CLKA0 MDA20 DQB0_19/DQB_19 WCKB0_1/DQMB_2 DQMA#3
F24 DQA0_20/DQA_20 WCKA0B_1/DQMA_3 E22 [27] CLKA0 P5 DQB0_20/DQB_20 WCKB0B_1/DQMB_3 T5
C24 C14 [27] CLKA0# CLKA0# MDA21 R4 AE4 DQMA#4
DQA0_21/DQA_21 WCKA1_0/DQMA_4 MDA22 DQB0_21/DQB_21 WCKB1_0/DQMB_4 DQMA#5
A24 DQA0_22/DQA_22 WCKA1B_0/DQMA_5 A14 T6 DQB0_22/DQB_22 WCKB1B_0/DQMB_5 AF5
E24 E10 [27] CLKA1 CLKA1 MDA23 T1 AK6 DQMA#6
DQA0_23/DQA_23 WCKA1_1/DQMA_6 CLKA1# MDA24 DQB0_23/DQB_23 WCKB1_1/DQMB_6 DQMA#7
C22 DQA0_24/DQA_24 WCKA1B_1/DQMA_7 D9 [27] CLKA1# U4 DQB0_24/DQB_24 WCKB1B_1/DQMB_7 AK5
A22 MDA25 V6
DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 QSA#[7..0] MDA26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 QSA0
F22 DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 C34 [27] QSA#[7..0] V1 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 F6
D21 D29 MDA27 V3 K3 QSA1
DQA0_27/DQA_27 EDCA0_1/QSA_1/RDQSA_1 QSA[7..0] MDA28 DQB0_27/DQB_27 EDCB0_1/QSB_1/RDQSB_1 QSA2
A20 DQA0_28/DQA_28 EDCA0_2/QSA_2/RDQSA_2 D25 [27] QSA[7..0] Y6 DQB0_28/DQB_28 EDCB0_2/QSB_2/RDQSB_2 P3
F20 E20 MDA29 Y1 V5 QSA3
DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3 DQMA#[7..0] MDA30 DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3 QSA4
D19 DQA0_30/DQA_30 EDCA1_0/QSA_4/RDQSA_4 E16 [27] DQMA#[7..0] Y3 DQB0_30/DQB_30 EDCB1_0/QSB_4/RDQSB_4 AB5
E18 E12 MDA31 Y5 AH1 QSA5
DQA0_31/DQA_31 EDCA1_1/QSA_5/RDQSA_5 MDA[63..0] MDA32 DQB0_31/DQB_31 EDCB1_1/QSB_5/RDQSB_5 QSA6
C18 DQA1_0/DQA_32 EDCA1_2/QSA_6/RDQSA_6 J10 [27] MDA[63..0] AA4 DQB1_0/DQB_32 EDCB1_2/QSB_6/RDQSB_6 AJ9
A18 D7 MDA33 AB6 AM5 QSA7
DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 MAA[13..0] MDA34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 DQA1_2/DQA_34 [27] MAA[13..0] AB1 DQB1_2/DQB_34
D17 A34 MDA35 AB3 G7 QSA#0
DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 MDA36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 QSA#1
A16 DQA1_4/DQA_36 DDBIA0_1/QSA_1B/WDQSA_1 E30 AD6 DQB1_4/DQB_36 DDBIB0_1/QSB_1B/WDQSB_1 K1
F16 E26 MDA37 AD1 P1 QSA#2
DQA1_5/DQA_37 DDBIA0_2/QSA_2B/WDQSA_2 A_BA0 MDA38 DQB1_5/DQB_37 DDBIB0_2/QSB_2B/WDQSB_2 QSA#3
D15 DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3 C20 [27] A_BA0 AD3 DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3 W4
E14 C16 A_BA1 MDA39 AD5 AC4 QSA#4
DQA1_7/DQA_39 DDBIA1_0/QSA_4B/WDQSA_4 [27] A_BA1 DQB1_7/DQB_39 DDBIB1_0/QSB_4B/WDQSB_4
F14 C12 A_BA2 MDA40 AF1 AH3 QSA#5
DQA1_8/DQA_40 DDBIA1_1/QSA_5B/WDQSA_5 [27] A_BA2 DQB1_8/DQB_40 DDBIB1_1/QSB_5B/WDQSB_5
D13 J11 MDA41 AF3 AJ8 QSA#6
C DQA1_9/DQA_41 DDBIA1_2/QSA_6B/WDQSA_6 MDA42 DQB1_9/DQB_41 DDBIB1_2/QSB_6B/WDQSB_6 QSA#7
C
F12 DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 F8 support 1Gbit AF6 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7 AM3
A12 VRAM ( 64M X 16 ) MDA43 AG4
DQA1_11/DQA_43 MDA44 DQB1_11/DQB_43 ODTA0
D11 DQA1_12/DQA_44 ADBIA0/ODTA0 J21 AH5 DQB1_12/DQB_44 ADBIB0/ODTB0 T7
F10 G19 MDA45 AH6 W7 ODTA1
DQA1_13/DQA_45 ADBIA1/ODTA1 MDA46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 DQA1_14/DQA_46 AJ4 DQB1_14/DQB_46
C10 H27 MDA47 AK3 L9 CLKA0
DQA1_15/DQA_47 CLKA0 MDA48 DQB1_15/DQB_47 CLKB0 CLKA0#
G13 DQA1_16/DQA_48 CLKA0B G27 AF8 DQB1_16/DQB_48 CLKB0B L8
H13 MDA49 AF9
DQA1_17/DQA_49 MDA50 DQB1_17/DQB_49 CLKA1
J13 DQA1_18/DQA_50 CLKA1 J14 AG8 DQB1_18/DQB_50 CLKB1 AD8
H11 H14 MDA51 AG7 AD7 CLKA1#
DQA1_19/DQA_51 CLKA1B MDA52 DQB1_19/DQB_51 CLKB1B
G10 DQA1_20/DQA_52 AK9 DQB1_20/DQB_52
G8 K23 MDA53 AL7 T10 RASA0#
DQA1_21/DQA_53 RASA0B MDA54 DQB1_21/DQB_53 RASB0B RASA1#
K9 DQA1_22/DQA_54 RASA1B K19 AM8 DQB1_22/DQB_54 RASB1B Y10
K10 MDA55 AM7
DQA1_23/DQA_55 MDA56 DQB1_23/DQB_55 CASA0#
G9 DQA1_24/DQA_56 CASA0B K20 AK1 DQB1_24/DQB_56 CASB0B W10
A8 K17 MDA57 AL4 AA10 CASA1#
DQA1_25/DQA_57 CASA1B 1.5V_VGA MDA58 DQB1_25/DQB_57 CASB1B
C8 DQA1_26/DQA_58 AM6 DQB1_26/DQB_58
E8 K24 MDA59 AM1 P10 CSA0#_0
DQA1_27/DQA_59 CSA0B_0 MDA60 DQB1_27/DQB_59 CSB0B_0
A6 DQA1_28/DQA_60 CSA0B_1 K27 AN4 DQB1_28/DQB_60 CSB0B_1 L10
C6 MDA61 AP3
DQA1_29/DQA_61 R628 MDA62 DQB1_29/DQB_61 CSA1#_0
E6
A5
DQA1_30/DQA_62 CSA1B_0 M13
K16
Rd DIS@40.2K/F_4 MDA63
AP1
AP5
DQB1_30/DQB_62 CSB1B_0 AD10
AC10
DQA1_31/DQA_63 CSA1B_1 DQB1_31/DQB_63 CSB1B_1
1.5V_VGA L18 K21 U10 CKEA0
MVREFDA CKEA0 MVREFD CKEB0 CKEA1
L20 MVREFSA CKEA1 J20 Y12 MVREFDB CKEB1 AA11
AA12 MVREFSB
R564 DIS@243R/F_4 L27 K26 1.5V_VGA N10 WEA0#
R617 DIS@243R/F_4 MEM_CALRN0 WEA0B WEB0B WEA1#
N12 MEM_CALRN1 WEA1B L15 WEB1B AB11
R629 DIS@243R/F_4 R618
AG12 MEM_CALRN2 C570
Re DIS@100R/F_4
R616 DIS@243R/F_4 DIS@0.1U/25V_4 R620 R556 DIS@10K/F_4 TESTEN MAA13
M12 MEM_CALRP1 MAA0_8 H23 Rd AD28 TESTEN MAB0_8 T8
GDDR5

GDDR5
R555 DIS@243R/F_4 M27 J19 W8
R645 DIS@243R/F_4 MEM_CALRP0 MAA1_8 DIS@40.2K/F_4 CLKTESTA AK10 MAB1_8
B AH12 MEM_CALRP2 CLKTESTA
B
CLKTESTB AL10 AH11 DRAM_RST
MVREFS CLKTESTB DRAM_RST

TESTEN=0, Internal
Re R619 Debug Use
C571 DIS@100R/F_4 TESTEN=1, JTAG DIS@Caspian M2
DIS@Caspian M2 DIS@0.1U/25V_4 C602 C597

*DIS@0.1U/16V_4 *DIS@0.1U/16V_4
Caspian uses
memory group B R715
*DIS@51.1R/F_4
R716
*DIS@51.1R/F_4
only Place all these components very close to GPU (Within
<sean0327> modify location 25mm) and keep all component close to each Other (within
5mm) except Rser2
<Rev-B> reference need to change R typet R2 R3
DRAM_RST R643 DIS@10R_4 R644 DIS@51R/F_4
MEM_RST [27]

R1 R642 C601
DIS@5.1K_4
C1 DIS@120p/50V_4

A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
Caspian_Memory
Date: Monday, July 04, 2011 Sheet 24 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

D D
1.1V(110mA DPC_VDD10)
U7H

+1.8V_DPC_PVDD DP C/D POWER DP A/B POWER +1.8V_DPA_PVDD


1.8V(130mA)
L30 AP20 AN24
DPC_VDD18#1 DPA_VDD18#1

1V_VGA
DIS@BEAD180R/1.5A_6
+1.1V_DPC_VDD10
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
DPAB_VDD18 1.80 V ∮ 3% ∮ 3%
+1.1V_DPB_VDD10
C566 C567 C579
300 mA
*DIS@68p/50V_4 DIS@0.1U/25V_4 AP13 AP31 +1.1V_DPB_VDD10
DPC_VDD10#1 DPA_VDD10#1
AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
DIS@1U/10V_4

AN17 DPC_VSSR#1 DPA_VSSR#1 AN27


DPAB_VDD10 1.00 V ∮ 3% ∮ 3%
DPCD_VDD18 1.80 V ∮ 3% ∮ 3% AP16 DPC_VSSR#2 DPA_VSSR#2 AP27
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28 220 mA
150 mA AW14
AW16
DPC_VSSR#4 DPA_VSSR#4 AW24
AW26
DPC_VSSR#5 DPA_VSSR#5
+1.8V_DPC_PVDD +1.8V_DPA_PVDD
1.8V(130mA)
AP22 DPD_VDD18#1 DPB_VDD18#1 AP25
DPCD_VDD10 1.00 V ∮ 3% ∮ 3% AP23 DPD_VDD18#2 DPB_VDD18#2 AP26

L23
C
110 mA DIS@BEAD180R/1.5A_6 DIS@BEAD180R/1.5A_6 C
1V_VGA +1.1V_DPC_VDD10 AP14 AN33 +1.1V_DPB_VDD10 1V_VGA
L29 DPD_VDD10#1 DPB_VDD10#1 C454 C453
AP15 DPD_VDD10#2 DPB_VDD10#2 AP33
C577 C576 C578 C452
DIS@68p/50V_4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DIS@1U/10V_4
DIS@1U/10V_4 *DIS@10u/6.3V_6
AN19 DPD_VSSR#1 DPB_VSSR#1 AN29
AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32

(1.8V @ 400mA DPE_VDD18; +1.1V_DPE_VDD10


DIS@150R/F_4
200mA for DPE/DPF respectively) R175 R170
AW18 DPCD_CALR DPAB_CALR AW28
DIS@150R/F_4 +1.8V_DPA_PVDD +1.1V_DPE_VDD10 L22 1V_VGA
1.8V(20mA) DIS@BEAD180R/1.5A_6
1.8V(200mA) DP E/F POWER DP PLL POWER
+1.8V_DPE_VDD18 AH34 AU28 +1.8V_DPA_PVDD C429 C437
DPE_VDD18#1 DPA_PVDD DIS@1U/10V_4
AJ34 DPE_VDD18#2 DPA_PVSS AV27
+1.1V_DPE_VDD10 +1.8V_DPA_PVDD DIS@0.1U/25V_4

AL33 AV29 +1.8V_DPA_PVDD


DPE_VDD10#1 DPB_PVDD
AM33 DPE_VDD10#2 DPB_PVSS AR28

B
DPEF_VDD10 1.00 V ∮ 3% 1.8V(200mA DPC_PVDD) B
∮ 3% AN34
AP39
DPE_VSSR#1 DPC_PVDD AU18
AV17
+1.8V_DPC_PVDD +1.8V_DPC_PVDD
L27
1.8V_VGA
DPE_VSSR#2 DPC_PVSS
220 mA (DisplayPort/TMDS) AR39
AU37
DPE_VSSR#3
C526 C525
DIS@68p/50V_4
C524
DIS@0.1U/25V_4
DIS@BEAD180R/1.5A_6
DPE_VSSR#4 DIS@1U/10V_4
DPEF_VDD18 1.80 V ∮ 3% ∮ 3% 1.8V(200mA)
DPD_PVDD AV19
AR18
+1.8V_DPC_PVDD
DPD_PVSS
300 mA (DisplayPort/ TMDS) +1.8V_DPE_VDD18 AF34 +1.8V_DPA_PVDD
DPF_VDD18#1 +1.8V_DPE_PVDD
AG34 DPF_VDD18#2
+1.1V_DPE_VDD10 AM37 +1.8V_DPE_PVDD +1.8V_DPA_PVDD L26
DPE_PVDD +1.8V_DPE_PVDD 1.8V_VGA
AN38 DIS@BEAD180R/1.5A_6 +1.8V_DPE_PVDD L21 1.8V_VGA
DPE_PVSS C498 C497 DIS@BEAD180R/1.5A_6
AK33 1.8V(20mA) DIS@0.1U/25V_4 DIS@1U/10V_4 C438 C430
DPF_VDD10#1 DIS@0.1U/25V_4 DIS@1U/10V_4
AK34 DPF_VDD10#2
DPF_PVDD AL38 +1.8V_DPE_PVDD +1.8V_DPE_PVDD
DPF_PVSS AM35

AF39 DPF_VSSR#1
AH39 DPF_VSSR#2
AK39 L18
DPF_VSSR#3 +1.8V_DPE_VDD18
AL34 DPF_VSSR#4 1.8V_VGA
AM34 DIS@BEAD180R/1.5A_6
DPF_VSSR#5 C439 C431
DIS@0.1U/25V_4 DIS@1U/10V_4

A DIS@150R/F_4 R135 AM39 A


DPEF_CALR

DIS@Caspian M2

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
Caspian_DP_POWER

www.vinafix.vn
Date: Monday, July 04, 2011 Sheet 25 of 48
5 4 3 2 1
5 4 3 2 1

U7E U7F
+1.8V_PCIE_VDDR
MEM I/O PCIE_VDDR:440
PCIE
AC7 AA31 +1.8V_PCIE_VDDR mA AB39 A3
1.5V_VGA VDDR1#1 PCIE_VDDR#1 1.8V_VGA PCIE_VSS#1 GND#1
AD11 AA32 L14 E39 A37
VDDR1#2 PCIE_VDDR#2 C451 DIS@BEAD180R/1.5A_6 PCIE_VSS#2 GND#2
AF7 AA33 F34 AA16
C236 C630 C210 C564 C502 C588 C572 C569 C530 C507 VDDR1#3 PCIE_VDDR#3 C463 C457 C420 C425 C417 PCIE_VSS#3 GND#3
AG10 AA34 F39 AA18
DIS@4.7u/6.3V_6 DIS@0.1U/25V_4 DIS@1U/10V_4 DIS@1U/10V_4 DIS@1U/10V_4 VDDR1#4 PCIE_VDDR#4 DIS@0.1U/25V_4 DIS@1U/10V_4 DIS@1U/10V_4 DIS@4.7u/6.3V_6 PCIE_VSS#4 GND#4
AJ7 V28 G33 AA2
DIS@4.7u/6.3V_6 DIS@4.7u/6.3V_6 DIS@1U/10V_4 VDDR1#5 PCIE_VDDR#5 PCIE_VSS#5 GND#5
AK8 W29 G34 AA21
DIS@1U/10V_4 DIS@1U/10V_4 VDDR1#6 PCIE_VDDR#6 DIS@1U/10V_4 DIS@1U/10V_4 1V_VGA PCIE_VSS#6 GND#6
AL9 W30 H31 AA23
VDDR1#7 PCIE_VDDR#7 PCIE_VSS#7 GND#7
G11 Y31 H34 AA26
VDDR1#8 PCIE_VDDR#8 PCIE_VSS#8 GND#8
G14 H39 AA28
VDDR1#9 PCIE_VSS#9 GND#9
G17 J31 AA6
VDDR1#10 PCIE_VSS#10 GND#10
VDDR1 + DDR3 G20 G30 J34 AB12
D VDDR1#11 PCIE_VDDC#1 PCIE_VSS#11 GND#11 D
G23 G31 K31 AB15
VDDR1#12 PCIE_VDDC#2 PCIE_VSS#12 GND#12
Memory 1.5 V ∮ 3% ∮ 3% 2.3 A (RMS) / 2.8 G26
VDDR1#13 PCIE_VDDC#3
H29
C475 C474 C476 C466 C419 C473
K34
PCIE_VSS#13 GND#13
AB17
G29 H30 K39 AB20
A VDDR1#14 PCIE_VDDC#4 DIS@1U/10V_4 DIS@1U/10V_4 DIS@4.7u/6.3V_6 PCIE_VSS#14 GND#14
H10 J29 L31 AB22
VDDR1#15 PCIE_VDDC#5 PCIE_VSS#15 GND#15
J7 J30 L34 AB24
VDDR1#16 PCIE_VDDC#6 DIS@1U/10V_4 DIS@1U/10V_4 DIS@1U/10V_4 PCIE_VSS#16 GND#16
J9 L28 M34 AB27
VDDR1#17 PCIE_VDDC#7 PCIE_VSS#17 GND#17
K11 M28 M39 AC11
VDDR1#18 PCIE_VDDC#8 PCIE_VSS#18 GND#18
K13 N28 N31 AC13
VDDR1#19 PCIE_VDDC#9 PCIE_VSS#19 GND#19
K8 R28 N34 AC16
L12
VDDR1#20 PCIE_VDDC#10
T28
PCIE_VDDC: P31
PCIE_VSS#20 GND#20
AC18
VDDR1#21 PCIE_VDDC#11 PCIE_VSS#21 GND#21
L16
L21
VDDR1#22 PCIE_VDDC#12
U28 2A VGA_CORE
P34
P39
PCIE_VSS#22 GND#22
AC2
AC21
VDDR1#23 PCIE_VSS#23 GND#23
L23 R34 AC23
VDDR1#24 PCIE_VSS#24 GND#24
L26 AA15 T31 AC26
VDDR1#25 CORE VDDC#1 PCIE_VSS#25 GND#25
L7 AA17 T34 AC28
VDDR1#26 VDDC#2 PCIE_VSS#26 GND#26
M11 AA20 T39 AC6
VDDR1#27 VDDC#3 C511 C538 PCIE_VSS#27 GND#27
N11 AA22 U31 AD15
+1.8V_VDD_CT VDDR1#28 VDDC#4 C555 DIS@1U/10V_4 C540 PCIE_VSS#28 GND#28
P7 AA24 U34 AD17
VDDR1#29 VDDC#5 PCIE_VSS#29 GND#29
R11 AA27 V34 AD20
L25 +1.8V_VDD_CT VDDR1#30 VDDC#6 DIS@1U/10V_4 PCIE_VSS#30 GND#30
1.8V_VGA U11 AB16 V39 AD22
VDDR1#31 VDDC#7 DIS@1U/10V_4 DIS@4.7u/6.3V_6 PCIE_VSS#31 GND#31
U7 AB18 W31 AD24
DIS@BEAD180R/1.5A_6 C493 C501 VDDR1#32 VDDC#8 PCIE_VSS#32 GND#32
Y11 AB21 W34 AD27
C488 VDDR1#33 VDDC#9 PCIE_VSS#33 GND#33
Y7 AB23 Y34 AD9
DIS@4.7u/6.3V_6 DIS@1n/50V_4 VDDR1#34 VDDC#10 C553 C512 PCIE_VSS#34 GND#34
AB26 Y39 AE2
DIS@0.1U/25V_4 VDDC#11 C510 C541 C544 PCIE_VSS#35 GND#35
AB28 AE6
VDDC#12 DIS@1U/10V_4 DIS@1U/10V_4 DIS@4.7u/6.3V_6 GND#36
AC17 AF10
VDDC#13 GND#37
AC20 AF16
LEVEL VDDC#14 DIS@1U/10V_4 DIS@1U/10V_4 GND#38
AC22 AF18
TRANSLATION VDDC#15 GND#39
VDD_CT :219 mA AC24 AF21
VDDC#16
GND GND#40

POWER
AF26 AC27 AG17
VDD_CT#1 VDDC#17 GND#41
AF27 AD18 F15 AG2
VDD_CT#2 VDDC#18 C557 C513 C554 GND#100 GND#42
AG26 AD21 F17 AG20
R594 3V_VGA VDD_CT#3 VDDC#19 C519 C539 GND#101 GND#43
AG27 AD23 F19 AG22
3V_VGA VDD_CT#4 VDDC#20 DIS@4.7u/6.3V_6 DIS@1U/10V_4 DIS@4.7u/6.3V_6 GND#102 GND#44
3.3V 2 1 AD26 F21 AG6
DIS@0R/F_8 C500 VDDC#21 GND#103 GND#45
AF17 F23 AG9
C523 C515 I/O VDDC#22 DIS@4.7u/6.3V_6 DIS@1U/10V_4 GND#104 GND#46
AF20 F25 AH21
DIS@1U/10V_4 DIS@1U/10V_4 DIS@0.1U/25V_4 VDDC#23 GND#105 GND#47
AF23 AF22 F27 AJ10
VDDR3#1 VDDC#24 GND#106 GND#48
C AF24 AG16 F29 AJ11 C
VDDR3#2 VDDC#25 GND#107 GND#49
AG23 AG18 F31 AJ2
VDDR3#3 VDDC#26 GND#108 GND#50
AG24 AG21 F33 AJ28
+VDDR4 VDDR3#4 VDDC#27
AH22
Vcore: F7
GND#109 GND#51
AJ6 PowerXpress control signal for Madsion and Park only
VDDC#28 GND#110 GND#52
If not used, can be disconnected. (AL21 pin)
1.8V_VGA
L6 +VDDR4 DIS@0.1U/25V_4 AF13
VDDC#29
AH27
AH28
7.5A F9
G2
GND#111 GND#53
AK11
AK31
DIS@BEAD180R/1.5A_6 C565 VDDR4#4 VDDC#30 GND#112 GND#54
AF15 M26 G6 AK7
Ramp<20ms C583 AG13
VDDR4#5 VDDC#31
N24 H9
GND#113 GND#55
AL11
PX_EN = LOW, turn on
VDDR3(3V_VGA) DIS@1U/10V_4 AG15
VDDR4#7 VDDC#32
N27 J2
GND#114 GND#56
AL14
PX_EN = HIGH, turn off
C186 VDDR4#8 VDDC#33 GND#115 GND#57
R18 J27 AL17
DIS@4.7u/6.3V_6 VDDC#34 GND#116 GND#58
R21 J6 AL2
VDDC#35 GND#117 GND#59
AD12 R23 J8 AL20
VDDR4#1 VDDC#36 GND#118 GND#60
AF11 R26 K14 AL21
VDDR4#2 VDDC#37 GND#119 GND#61
VDDR4 :170 mA AF12
AG11
VDDR4#3 VDDC#38
T17
T20
K7
L11
GND#120 GND#62
AL23
AL26 R579
VDDR4#6 VDDC#39 GND#121 GND#63
T22 L17 AL32 *DIS@0R_4
VDDC(VGA_CORE) VDDC#40
T24 L2
GND#122 GND#64
AL6
VDDC#41 GND#123 GND#65
T27 L22 AL8
VDDC#42 GND#124 GND#66
U16 L24 AM11
VDDC#43 GND#125 GND#67
M20 U18 L6 AM31
NC_VDDRHA VDDC#44 GND#126 GND#68
M21
NC_VSSRHA VDDC#45
U21 M17
GND#127 GND#69
AM9 Reserve for PX_EN
U23 M22 AN11
VDDC#46 GND#128 GND#70
U26 M24 AN2
VDD_CT(1.8V_VGA) V12
VDDC#47
V17 N16
GND#129 GND#71
AN30
NC_VDDRHB VDDC#48 GND#130 GND#72
U12 V20 N18 AN6
NC_VSSRHB VDDC#49 GND#131 GND#73
V22 N2 AN8
VDDC#50 GND#132 GND#74
PCIE_VDDR :440 mA VDDC#51
V24
V27
N21
N23
GND#133 GND#75
AP11
AP7
VDDC#52 GND#134 GND#76
Y16 N26 AP9
PLL VDDC#53 GND#135 GND#77
Y18 N6 AR5
L16 +PCIE_PVDD VDDC#54 GND#136 GND#78
1.8V_VGA AB37 Y21 R15 B11
DIS@BEAD180R/1.5A_6 PCIE_PVDD VDDC#55 GND#137 GND#79
Y23 R17 B13
C414 +MPV18 VDDC#56 GND#138 GND#80
H7 Y26 R2 B15
C409 MPV18#1 VDDC#57 GND#139 GND#81
H8 Y28 R20 B17
DIS@4.7u/6.3V_6 DIS@0.1U/25V_4 MPV18#2 VDDC#58 GND#140 GND#82
R22 B19
GND#141 GND#83
R24 B21
+SPV18 GND#142 GND#84
(0.95-1.2V @ 136mA SPV10) AM10
SPV18
R27
GND#143 GND#85
B23
AA13 +VDDCI R6 B25
B VDDCI#1 VGA_CORE GND#144 GND#86 B
L33 +VGA_CORE_SPV10 AN9 AB13 T11 B27
1V_VGA SPV10 VDDCI#2 GND#145 GND#87
DIS@BEAD180R/1.5A_6 AC12 T13 B29
C591 VDDCI#3 C552 C509 C514 C550 GND#146 GND#88
AN10 AC15 T16 B31
C586 SPVSS VDDCI#4 DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@4.7u/6.3V_6 GND#147 GND#89
AD13 T18 B33
DIS@4.7u/6.3V_6 DIS@0.1U/25V_4 VDDCI#5 GND#148 GND#90
SPV10: 100 mA AD16 T21 B7
VDDCI#6 DIS@1U/10V_4 GND#149 GND#91
M15 T23 B9
VDDCI#7 GND#150 GND#92
SPV18: 50 mA VOLTAGE VDDCI#8
M16
M18
T26
U15
GND#151 GND#93
C1
C39
SENESE VDDCI#9 GND#153 GND#94
M23 U17 E35
VDDCI#10 GND#154 GND#95
N13 U2 E5
TP158 VGA_CORE_SENP R541 *DIS@0R_4 VDDCI#11 GND#155 GND#96
AF28 N15 U20 F11
FB_VDDC VDDCI#12 GND#156 GND#97
N17 U22 F13
VDDCI#13 GND#157 GND#98
N20 U24
TP159 VDDCI#14 GND#158
AG28 N22 U27
FB_VDDCI ISOLATED VDDCI#15 GND#159
R12 U6
CORE I/O VDDCI#16 R13 V11
GND#160
R535 *DIS@0R_4 VDDCI#17 GND#161
AH29 R16 V16
FB_GND VDDCI#18 GND#163
T12 V18
VDDCI#19 GND#164
T15 V21
VDDC_SENSE/VSS_SENSE and VDDCI_SENSE/VSS_SENSE route as differetial pair VDDCI#20 GND#165
V15 V23
VDDCI#21 GND#166
Y13 V26
L31 DIS@BEAD180R/1.5A_6 +MPV18 VDDCI#22 +1.8V_PCIE_VDDR GND#167
1.8V_VGA W2
GND#168
W6
DIS@Caspian M2 GND#169
Y15
C592 C587 GND#170
Y17
DIS@1U/10V_4 DIS@0.1U/25V_4 GND#171
Y20
C443 C434 GND#172
Y22 A39
DIS@0.1U/25V_4 DIS@1U/10V_4 GND#173 VSS_MECH#1
Y24 AW1
L32 DIS@BEAD180R/1.5A_6 +SPV18 GND#174 VSS_MECH#2
1.8V_VGA Y27 AW39
GND#175 VSS_MECH#3
U13
GND#152
V13
C589 C590 GND#162
DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@Caspian M2

A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
Caspian_POWER
Date: Monday, July 04, 2011 Sheet 26 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

1.5V_VGA
U12

MDA16
DDR3 BGA MEMORY U32
M9 E4
VREFCA DQL0 MDA20 MDA13
H2 F8 M9 E4
VREFDQ DQL1 MDA17 VREFCA DQL0 MDA8 QSA[7..0]
F3 H2 F8 [24] QSA[7..0]
MAA0 DQL2 MDA23 VREFDQ DQL1 MDA14
N4 F9 F3
R313 MAA1 A0 DQL3 MDA18 MAA0 DQL2 MDA11 QSA#[7..0]
P8 H4 N4 F9 [24] QSA#[7..0]
DIS@4.99K/F_4 MAA2 A1 DQL4 MDA21 1.5V_VGA MAA1 A0 DQL3 MDA12
P4 H9 P8 H4
MAA3 A2 DQL5 MDA19 MAA2 A1 DQL4 MDA9 DQMA#[7..0]
N3 G3 P4 H9 [24] DQMA#[7..0]
MAA4 A3 DQL6 MDA22 MAA3 A2 DQL5 MDA15
P9 H8 N3 G3
M_VREFCA1 MAA5 A4 DQL7 MAA4 A3 DQL6 MDA10 MDA[63..0]
P3 P9 H8 [24] MDA[63..0]
MAA6 A5 MAA5 A4 DQL7
R9 P3
MAA7 A6 MDA28 R334 MAA6 A5 MAA[13..0]
R3 D8 R9 [24] MAA[13..0]
C195 MAA8 A7 DQU0 MDA26 DIS@4.99K/F_4 MAA7 A6 MDA1
MAA9
T9
A8 DQU1
C4
MDA31
U13 U12 MAA8
R3
A7 DQU0
D8
MDA5
R312 R4 C9 T9 C4
DIS@4.99K/F_4 DIS@0.1U/25V_4 MAA10 A9 DQU2 MDA27 M_VREFCA2 MAA9 A8 DQU1 MDA6
L8 C3 R4 C9
MAA11 A10/AP DQU3 MDA29 MAA10 A9 DQU2 MDA3 A_BA0
R8 A8 L8 C3 [24] A_BA0
MAA12 A11 DQU4 MDA25 MAA11 A10/AP DQU3 MDA2 A_BA1
N8 A3 R8 A8 [24] A_BA1
D
MAA13 A12/BC DQU5 MDA30 C205 MAA12 A11 DQU4 MDA4 A_BA2 D
T4 B9 N8 A3 [24] A_BA2
A13 DQU6 MDA24 R331 MAA13 A12/BC DQU5 MDA0 MEM_RST
T8 A4 T4 B9 [24] MEM_RST
A14 DQU7 DIS@4.99K/F_4 DIS@0.1U/25V_4 A13 DQU6 MDA7
M8 T8 A4
A15/BA3 A14 DQU7
U33 U32 M8
A15/BA3 CLKA0
[24] CLKA0
A_BA0 M3 B3
1.5V_VGA A_BA1 BA0 VDD#B3 A_BA0 CLKA0#
N9 D10 M3 B3 [24] CLKA0#
A_BA2 BA1 VDD#D10 A_BA1 BA0 VDD#B3
M4 G8 N9 D10
BA2 VDD#G8 A_BA2 BA1 VDD#D10
K3 M4 G8
VDD#K3 BA2 VDD#G8 R670 R669
K9 K3
VDD#K9 VDD#K3 DIS@56.2R/F_4 DIS@56.2R/F_4
N2 K9
R325 CLKA0 VDD#N2 1.5V_VGA VDD#K9
J8 N10 N2
DIS@4.99K/F_4 CLKA0# CK VDD#N10 CLKA0 VDD#N2 1.5V_VGA
K8 R2 J8 N10
CKEA0 CK VDD#R2 1.5V_VGA CLKA0# CK VDD#N10
K10 R10 K8 R2
CKE/CKE0 VDD#R10 CKEA0 CK VDD#R2
K10 R10
M_VREFDQ1 C219 CKE/CKE0 VDD#R10
ODTA0 K2 A2 C624 C648
CSA0#_0 ODT/ODT0 VDDQ#A2 DIS@0.1U/25V_4 ODTA0 DIS@0.01U/25V_4
L3 A9 K2 A2
C203 RASA0# CS /CS0 VDDQ#A9 R657 CSA0#_0 ODT/ODT0 VDDQ#A2 DIS@0.1U/25V_4
J4 C2 L3 A9
R326 CASA0# RAS VDDQ#C2 DIS@4.99K/F_4 RASA0# CS /CS0 VDDQ#A9
K4 C10 J4 C2
DIS@4.99K/F_4 DIS@0.1U/25V_4 WEA0# CAS VDDQ#C10 CASA0# RAS VDDQ#C2
L4 D3 K4 C10
WE VDDQ#D3 M_VREFDQ2 WEA0# CAS VDDQ#C10
E10 L4 D3
VDDQ#E10 WE VDDQ#D3
F2 E10
QSA2 VDDQ#F2 VDDQ#E10
F4 H3 F2
QSA3 DQSL VDDQ#H3 C618 QSA1 VDDQ#F2
C8 H10 F4 H3
DQSU VDDQ#H10 R658 QSA0 DQSL VDDQ#H3
C8 H10
C212 C234 C226 C232 C218 C220 DIS@4.99K/F_4 DIS@0.1U/25V_4 DQSU VDDQ#H10
DQMA#2 E8 A10 C637 C217 C622 C633 C638 C649
DQMA#3 DML VSS#A10 DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DQMA#1
D4 B4 E8 A10
DMU VSS#B4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DIS@0.01U/25V_4 DQMA#0 DML VSS#A10 DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@0.1U/25V_4
E2 D4 B4
VSS#E2 DMU VSS#B4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DIS@0.01U/25V_4
G9 E2
QSA#2 VSS#G9 VSS#E2
G4 J3 G9
QSA#3 DQSL VSS#J3 QSA#1 VSS#G9
B8 J9 G4 J3
DQSU VSS#J9 QSA#0 DQSL VSS#J3
M2 B8 J9
VSS#M2 DQSU VSS#J9
M10 M2
VSS#M10 VSS#M2
P2 M10
MEM_RST VSS#P2 VSS#M10 ODTA0
T3 P10 P2 [24] ODTA0
RESET VSS#P10 MEM_RST VSS#P2
C T2 T3 P10 C
VSS#T2 RESET VSS#P10 RASA0#
L9 T10 T2 [24] RASA0#
ZQ/ZQ0 VSS#T10 VSS#T2
L9 T10
R311 ZQ/ZQ0 VSS#T10 CASA0#
[24] CASA0#
DIS@240R/F_4A1 B2 R663
NC VSSQ#B2 WEA0#
T1 B10 DIS@240R/F_4A1 B2 [24] WEA0#
NC VSSQ#B10 NC VSSQ#B2
A11 D2 T1 B10
NC VSSQ#D2 NC VSSQ#B10 CSA0#_0
T11 D9 A11 D2 [24] CSA0#_0
NC VSSQ#D9 NC VSSQ#D2
E3 T11 D9
1.5V_VGA VSSQ#E3 1.5V_VGA NC VSSQ#D9 CKEA0
J2 E9 E3 [24] CKEA0
NC/ODT1 VSSQ#E9 VSSQ#E3
L2 F10 J2 E9
NC/CS1 VSSQ#F10 NC/ODT1 VSSQ#E9
J10 G2 L2 F10
NC/CE1 VSSQ#G2 NC/CS1 VSSQ#F10
L10 G10 J10 G2
C211 C634 C222 NC/ZQ1 VSSQ#G10 C626 C209 C635 C230 C640 C639 NC/CE1 VSSQ#G2
L10 G10
C652 C631 100-BALL NC/ZQ1 VSSQ#G10
DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 SDRAM DDR3 DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 100-BALL
DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@H5TQ1G63DFR-11C DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 SDRAM DDR3
DIS@H5TQ1G63DFR-11C
U13

1.5V_VGA M9 E4 MDA49 U33


VREFCA DQL0 MDA52
H2 F8
VREFDQ DQL1 MDA51 MDA38
F3 M9 E4
MAA0 DQL2 MDA54 1.5V_VGA VREFCA DQL0 MDA35 ODTA1
N4 F9 H2 F8 [24] ODTA1
MAA1 A0 DQL3 MDA50 VREFDQ DQL1 MDA36
P8 H4 F3
R666 MAA2 A1 DQL4 MDA55 MAA0 DQL2 MDA33 RASA1#
P4 H9 N4 F9 [24] RASA1#
DIS@4.99K/F_4 MAA3 A2 DQL5 MDA48 MAA1 A0 DQL3 MDA37
N3 G3 P8 H4
MAA4 A3 DQL6 MDA53 MAA2 A1 DQL4 MDA34 CASA1#
P9 H8 P4 H9 [24] CASA1#
M_VREFCA3 MAA5 A4 DQL7 R315 MAA3 A2 DQL5 MDA39
P3 N3 G3
MAA6 A5 DIS@4.99K/F_4 MAA4 A3 DQL6 MDA32 WEA1#
R9 P9 H8 [24] WEA1#
MAA7 A6 MDA63 MAA5 A4 DQL7
R3 D8 P3
C645 MAA8 A7 DQU0 MDA59 M_VREFCA4 MAA6 A5 CSA1#_0
T9 C4 R9 [24] CSA1#_0
R665 MAA9 A8 DQU1 MDA61 MAA7 A6 MDA40
R4 C9 R3 D8
DIS@4.99K/F_4 DIS@0.1U/25V_4 MAA10 A9 DQU2 MDA58 MAA8 A7 DQU0 MDA47 CKEA1
L8 C3 T9 C4 [24] CKEA1
MAA11 A10/AP DQU3 MDA62 C196 MAA9 A8 DQU1 MDA41
R8 A8 R4 C9
MAA12 A11 DQU4 MDA56 R314 MAA10 A9 DQU2 MDA44
N8 A3 L8 C3
MAA13 A12/BC DQU5 MDA60 DIS@4.99K/F_4DIS@0.1U/25V_4 MAA11 A10/AP DQU3 MDA42 CLKA1
T4 B9 R8 A8 [24] CLKA1
A13 DQU6 MDA57 MAA12 A11 DQU4 MDA45
T8 A4 N8 A3
B A14 DQU7 MAA13 A12/BC DQU5 MDA43 CLKA1# B
M8 T4 B9 [24] CLKA1#
A15/BA3 A13 DQU6 MDA46
T8 A4
A14 DQU7
M8
1.5V_VGA A_BA0 A15/BA3 R338 R339
M3 B3
A_BA1 BA0 VDD#B3 DIS@56.2R/F_4 DIS@56.2R/F_4
N9 D10
A_BA2 BA1 VDD#D10 A_BA0
M4 G8 M3 B3
BA2 VDD#G8 1.5V_VGA A_BA1 BA0 VDD#B3
K3 N9 D10
VDD#K3 A_BA2 BA1 VDD#D10
K9 M4 G8
R318 VDD#K9 BA2 VDD#G8
N2 K3
DIS@4.99K/F_4 CLKA1 VDD#N2 1.5V_VGA VDD#K3
J8 N10 K9
CLKA1# CK VDD#N10 VDD#K9 C229
K8 R2 N2
M_VREFDQ3 CKEA1 CK VDD#R2 R667 CLKA1 VDD#N2 1.5V_VGA DIS@0.01U/25V_4
K10 R10 J8 N10
CKE/CKE0 VDD#R10 DIS@4.99K/F_4 CLKA1# CK VDD#N10
K8 R2
C223 CKEA1 CK VDD#R2
K10 R10
C197 ODTA1 M_VREFDQ4 CKE/CKE0 VDD#R10
K2 A2
R317 CSA1#_0 ODT/ODT0 VDDQ#A2 DIS@0.1U/25V_4 C216
L3 A9
DIS@4.99K/F_4 DIS@0.1U/25V_4 RASA1# CS /CS0 VDDQ#A9 ODTA1
J4 C2 K2 A2
CASA1# RAS VDDQ#C2 C650 CSA1#_0 ODT/ODT0 VDDQ#A2 DIS@0.1U/25V_4
K4 C10 L3 A9
WEA1# CAS VDDQ#C10 R668 RASA1# CS /CS0 VDDQ#A9
L4 D3 J4 C2
WE VDDQ#D3 DIS@4.99K/F_4DIS@0.1U/25V_4 CASA1# RAS VDDQ#C2
E10 K4 C10
VDDQ#E10 WEA1# CAS VDDQ#C10
F2 L4 D3
QSA6 VDDQ#F2 WE VDDQ#D3
F4 H3 E10
QSA7 DQSL VDDQ#H3 VDDQ#E10
C8 H10 F2
DQSU VDDQ#H10 QSA4 VDDQ#F2
F4 H3
C646 C647 C231 C228 C227 C641 QSA5 DQSL VDDQ#H3
C8 H10
DQMA#6 DQSU VDDQ#H10
E8 A10
DQMA#7 DML VSS#A10 DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 C225 C636 C215 C233 C213 C221
D4 B4
DMU VSS#B4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DIS@0.01U/25V_4 DQMA#4
E2 E8 A10
VSS#E2 DQMA#5 DML VSS#A10 DIS@1U/10V_4 DIS@0.1U/25V_4 DIS@0.1U/25V_4
G9 D4 B4
QSA#6 VSS#G9 DMU VSS#B4 DIS@0.1U/25V_4 DIS@0.1U/25V_4 DIS@0.01U/25V_4
G4 J3 E2
QSA#7 DQSL VSS#J3 VSS#E2
B8 J9 G9
DQSU VSS#J9 QSA#4 VSS#G9
M2 G4 J3
VSS#M2 QSA#5 DQSL VSS#J3
M10 B8 J9
VSS#M10 DQSU VSS#J9
P2 M2
MEM_RST VSS#P2 VSS#M2
T3 P10 M10
RESET VSS#P10 VSS#M10
T2 P2
VSS#T2 MEM_RST VSS#P2
L9 T10 T3 P10
ZQ/ZQ0 VSS#T10 RESET VSS#P10
A T2 A
R664 VSS#T2
L9 T10
DIS@240R/F_4 ZQ/ZQ0 VSS#T10
A1 B2
NC VSSQ#B2 R316
T1 B10
NC VSSQ#B10
A11 D2 DIS@240R/F_4 A1 B2
NC VSSQ#D2 NC VSSQ#B2
T11 D9 T1 B10
NC VSSQ#D9 NC VSSQ#B10
E3 A11 D2
1.5V_VGA VSSQ#E3 1.5V_VGA NC VSSQ#D2
J2 E9 T11 D9
NC/ODT1 VSSQ#E9 NC VSSQ#D9
L2 F10 E3
NC/CS1 VSSQ#F10 VSSQ#E3
J10 G2 J2 E9
NC/CE1 VSSQ#G2 NC/ODT1 VSSQ#E9
L10 G10 L2 F10

C628 C651
C224 C642 C644 NC/ZQ1 VSSQ#G10
100-BALL C235 C238
C643 C207 C204 C214 J10
NC/CS1
NC/CE1
VSSQ#F10
VSSQ#G2
G2 Quanta Computer Inc.
L10 G10
DIS@10u/6.3V_6 DIS@1U/10V_4 SDRAM DDR3 DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 NC/ZQ1 VSSQ#G10
PROJECT : QUA

www.vinafix.vn
DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 DIS@H5TQ1G63DFR-11C DIS@10u/6.3V_6 DIS@1U/10V_4 DIS@1U/10V_4 100-BALL
SDRAM DDR3 Size Document Number Rev
DIS@H5TQ1G63DFR-11C 1A
Caspian_VRAM_A0/A1
Date: Monday, July 04, 2011 Sheet 27 of 48
5 4 3 2 1
5 4 3 2 1

USB0_PWR Card Reader


USB (Side x1, Charge enable) C297
5V_S3 2
F4
1

C274 RC1206 POLY/6V/1.5A_1206


D 4.7u/10V_6 D
USB0_PWR 0.1u/16V_4
ET-0325-06
J71
1 V
[14] USBN0 3 4 2 D- GND 5
[14] USBP0 2 1 3
4
D+GND 6 USB3.0/USB2.0
GND
C281
L11
C280 BEAD90R/100mA
Co-Lay
CONN DIP(USB) 4P 1R MR(P2.0,H7.5) RVS
*0.1U/16V_4 *0.1U/16V_4
U26
1 Z1 Z4 6 ET-0325-09
2 5 USB0_PWR
GND VB
3 Z2 Z3 4
USB0_PWR

AZ2015-01H_ESD
AZ1013-04S

1
ET-0330-01 HP/MIC Jack
C296 + C294 D8 <sean0327> change footprint
330u/6.3V_6357
0.1u/16V_4

2
C C

Rev-B need to change footprint: d-sod523-1_2x0_8-0_7h

USB2.0

Back
WebCAM View
Touch Module
B 140mA B
JP195
JP150 F7
[14] USBP8 4 3 1 POLY/8V/1.1A_1206 1
[14] USBN8 1 2 2 5V_S3 2 1 2
3 3
L1 4 [14] USBP9 3 4 4
BEAD90R/100mA 5 [14] USBN9 2 1 5
L36 HCB1608KF-471T10/0.2ohm 6 6
C1 C2 [29] DMIC_DATA 7 L2
[29] DMIC_CLK 8 BEAD90R/100mA CONN.SMD WAFER 6P 1R MS(P1.25)
*0.1U/16V_4 *0.1U/16V_4 C674 C338
L38 C21 C22 4.7u/10V_6 0.1u/16V_4
HCB1608KF-471T10/0.2ohm
3.3V *0.1U/16V_4 *0.1U/16V_4
F6 7213-1000G
32V/0.5A_0603 144.7mA
2 1 CCD_PWR <Rev-B> add 4.7u

ET-0325-10
ET-0325-08 C307 4.7u/10V_6 C693 C694
22P/50V_4 22P/50V_4

Layout note: very close to CN1


A C306 0.1u/16V_4 A
ET-0325-07

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
USB/WebCAM/Touch
Date: Monday, July 04, 2011 Sheet 28 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

LDO
5V_AMP Rev-B need to change 0805 type footprint AVDD

AR2 0R/F_4 AR1 0R/F_4 AL3 *FCM2012V131D10


HPOUT_L_272
AR46 0R/F_4 AR37 0R/F_4 AU1
HPOUT_R_272 3 4 AR13
AR21 0R/F_4 AR39 0R/F_4 IN OUT
36K/F_4
Vset =1.25V
2 GND Vout =Vset[1+R(4,5)/R(5,GND)]
[37] AVDD_ON 1 5
SHDN SET
APL5323
300mA Linear Regulator + AC20 AC15 AC14 AC17
AC13 AR14
AGND GND AGND GND 10u/10V_8 0.1u/16V_4 0.1u/16V_4 0.1u/16V_4
Place next to pin 29, 30, 31 Next to CODEC 0.1u/16V_4 12K/F_4
POWER
FRONT_JD# PC@5.1K/F_4 AR22 Place next to pin 27
D D

MIC1-VREFO
AR80 TV@39.2K/F_4 AC26 AC25 AVREF
2.2u/6.3V_6 2.2u/6.3V_6 AC24 AC22
Vendor 建建 2.2u/6.3V_6 0.1u/16V_4
Jerry 0516

CPVEE_OUT
AVDD

SPK_LOUT_272

CPVN

CPVP
AVDD AVDD
SPK_ROUT_272
AC21 AC23
U15 0.1u/16V_4 10u/6.3V_6

36

35

34

33

32

31

30

29

28

27

26

25
AVDD AR36 AR52 5V_AMP

FRONT-R

HPOUT-R

CBN
Sense B

CPVEE

CBP

VREF
FRONT-L

MIC1-VREFO

AVSS1

AVDD1
HPOUT-L
10K_4 10K_4
Q14 AVDD
37 24 Place next to pin 25 2N7002
MONO-OUT LINE1-R
38 23 [37] EC_AMP_MUTE# EC_AMP_MUTE# 1 3
AVDD2 LINE1-L AC37 AC38
39 22 M1_RIN 0.1u/16V_4 10u/6.3V_6
AC16 AC18 LOUT2-L MIC1-R AC35 AC36

2
10u/6.3V_6 0.1u/16V_4 AR15 20K/F_6 JDR_O 40 21 M1_LIN AR38 *10K/F_4 3V_AUX 0.1u/16V_4 10u/6.3V_6
JDREF MIC1-L
41 20 Q11 2N7002
LOUT2-R LINE2-VREFO
42 19 1 3 AR51 0R/F_4 AC42

Place next to pin 38


43
AVSS2

NC
ALC272 MIC2-VREFO

LINE1-VREFO
18
[37] EC_AMP_SD#

AR23 *10K/F_4
AC28 2.2u/6.3V_6
11
U22
10 AMP_MODE2
AL9

60ohm,1A
SPK_OUT_RP
680p/25V_6

3V_AUX

2
MUTE# MODE2
44 17 12
DMIC-CLK3/4 MIC2-R SD# AL8
PGND 9
45 16 13 8 SPK_OUT_RN
SPDIFO2 MIC2-L BYPASS OUT_RN 60ohm,1A JP9
7
LINEOUT_R_272 SPK_ROUT AR27 0R/F_4 AC34 1u/16V_6 AVDD OUT_RP
46 DMIC-CLK1/2 LINE2-R 15 14 AGND PVDD2 6 1 1
15 AC41 2 5
AR55 1K/F_4 EAPD_R LINEOUT_L_272 AVDD 680p/25V_6 2 5
47 14 16 5 3 6

DMIC-1/2/GPIO0

DMIC-3/4/GPIO1
[37] EAPD EAPD LINE2-L IN_R PVDD1 3 6
17 4 AC40 4
IN_L OUT_LP 4

SDATA-OUT
<sean0327> akk SPDIF_O 48 13 SENSEA#AR12 20K/F_4SENSE_A_MIC1# 3 AL7 680p/25V_6
SPDIFO1 Sense A OUT_LN

SDATA-IN
1k TP160 SPK_LOUT AR26 0R/F_4 AC33 1u/16V_6 AMP_VOL_PWM_N 18 2 SPK_OUT_LN

DVDD-IO

PCBEEP
Vol/SCL/G1 PGND

RESET#
BIT-CLK
AMP_HOLD 19 60ohm,1A CONNECTOR SMD HEADER,4P,1R,MR(P1.25)
DVDD2

DVSS1
Hold/SDA/G2

SYNC
DVSS
AMP_VOLDIR 20 1 AMP_MODE1 AL6
VolDIR MODE1 SPK_OUT_LP
ANALOG
60ohm,1A
DMIC_CLK C237 10p/50V_4 AVDD
1

10

11

12
ALC107-GR AC39
DIGITAL 680p/25V_6

C
3.3V
AR53
Digital C
DMIC_DATA C206 10p/50V_4
AC6 AC1 10K_4
0.1u/16V_4 10u/6.3V_6 PCBEEP BEEP_1 AR6 47K/F_4
SPKROUT [16]
AC8
1u/16V_6 AC10 AR9 3.3V

3
2K/F_4 Q35
100p/50V_6 2N7002
[28] DMIC_CLK
AR3 2
ACZ_BITCLK_R

ACZ_SDIN

[28] DMIC_DATA AMP_VOL_PWM [37]


0R/F_8
+AZA_VDD

AC3 AC2

1
0.1u/16V_4 10u/6.3V_6
ACZ_RST#_AUDIO [16]
Digital ACZ_SYNC_AUDIO [16]
AVDD AVDD

AR4 22R/F_4 ACZ_SDIN0 [16]


AR41 AR40
AC4 10p/50V_4 AR29 AR30 22R/F_4 *22R/F_4
22R/F_4 *22R/F_4
ACZ_SDOUT_AUDIO [16] Place next to pin 9
AMP_MODE1
AR5 22R/F_4 BIT_CLK_AUDIO [16] AMP_HOLD AMP_MODE2 AMP-On AMP-Off
AMP_VOLDIR
AC5
10p/50V_4 AR43 AR42
AR34 AR35 *22R/F_4 22R/F_4
*22R/F_4 22R/F_4

Analog AVDD/PVDD
1SS355
Max. 100mVrms input for Mic-IN SD#
AD4
MIC1-VREFO MIC1-VREF-JKR

AVDD Input/PWM
AD3 AVDD
1SS355
MIC1-VREF-JKL
AVDD
AR44 50ms 50ms 50ms50ms
AR11 ET-0330-03

*TV@10K/F_4

*TV@10K/F_4
AR8 4.7K_4 AR69 AR66
4.7K_4 TV@10K_4 AR32
J72 U20 TV@0R/F_8
B 1 7 1 10 SPK_LOUT B
M1_LIN AC9 4.7u/10V_8 MICIN_L1 AR7 1K/F_4 MICIN-L2 AL1 MNB-160808 MICIN-L3 AC43 TV@0R/F_6 In1 COM1 SPK_L_SW
2 [31] SPK_LOUT_HWTV 2 9
NO1 NC1
6 3 8
M1_RIN AC11 4.7u/10V_8 MICIN_R1 AR10 1K/F_4 MICIN-R2 AL2 MNB-160808 MICIN-R3 AC44 TV@0R/F_6 GND VCC SPK_R_SW
3 [31] SPK_ROUT_HWTV 4 7
NO2 NC2 SPK_ROUT AC30
4 5 In2 COM2 6
SENSE_MIC# 5 8 TV@0.1u/16V_4
AVDD VREG3 TV@TS5A23157
1

D17 D3 D2 CONN DIP PHONE JACK 6P FR(H6.6)PINK

*TV@10K/F_4

*TV@10K/F_4
SENSE_A_MIC1# AR68 AR67
*BC5V0U1BZ01_ESD

BC5V0U1BZ01_ESD

BC5V0U1BZ01_ESD

AC12 AC7
MIC2-IN Jack
3

Q4 AR16 220P/50V_4 220P/50V_4 SILKSCREEN: MIC


2N7002 10K_4 AR17
10K_4
2

2 SENSE_MIC_IN AR50 PC@0R/F_4 SPK_ROUT


3

Q5 AR48 PC@0R/F_4 SPK_LOUT


2N7002
1

2 AVDD
<sean0327> add AVDD
ESD
AVDD
AR45
1

10K/F_4

10K/F_4
AR58 AR59
[37] SENSE_MIC_IN# 10K_4 AR33
J75 U21 0R/F_8
1 7 AC45 1 10 SPK_L_SW
HPOUT_L_SW AR24 68R/F_4 AL4 BLM15AG601SN1D HPOUT_L3 MICIN-L2 AR57 0R/F_4 10u/6.3V_6 In1 COM1 SPK_LOUT_272
2 2 9
AC46 NO1 NC1
6 3 GND VCC 8
HPOUT_R_SW AR25 68R/F_4 AL5 BLM15AG601SN1D HPOUT_R3 3 MICIN-R2 AR56 0R/F_4 10u/6.3V_6 4 7 SPK_ROUT_272
NO2 NC2 SPK_R_SW AC31
ET-0330-04 4 5
In2 COM2
6

3
AVDD VREG3 5 8 0.1u/16V_4
AC32 AC19 Q17 TS5A23157
1

220P/50V_4 220P/50V_4 CONN DIP PHONE JACK 6P FR(H6.6)LIME 10K/F_4 2N7002

10K/F_4
1

FRONT_JD# D20 Normal open Type AR63 AR60 2 SPK_S5MIC_EN# [37] HPOUT_L_272 AR47 PC@0R/F_4 HPOUT_L_SW
3

Q23 AR61 AD2 HPOUT_R_272 AR49 PC@0R/F_4 HPOUT_R_SW


*BC5V0U1BZ01_ESD

2N7002 10K_4 AD1


AR62 PESD5V0U1BB_ESD PESD5V0U1BB_ESD
3

2 10K_4
2

1
AR28 1K/F_4 2
2
3

Q38
2N7002 Q12
1

MMBT3904
1

2 Change to 0 欧欧
Rev-B need to change footprint: d-sod523-1_2x0_8-0_7h Change to 100uF DIP cap Jerry 0516
3

Jerry 0516 AVDD


VREG3 AR18 1K/F_4
[37] SENSE_HP_IN# 2 ET-0330-04
1

Q10 AC47 TV@100U/16V_R6_6


1

A 3V_AUX MMBT3904 AR31 A


AR20 U19 TV@0R/F_8

+
*10K/F_4 ET-0325-09 1 10 HPOUT_L_SW
AC48 TV@0R/F_4 In1 COM1 AC49 TV@0R/F_4 LINEOUT_L_272
[31] SPK_LOUT_HWTV_HP 2 NO1 NC1 9
3 8
GND VCC
1

Q9 AC50 TV@0R/F_4 4 7 AC51 TV@0R/F_4 LINEOUT_R_272


[31] SPK_ROUT_HWTV_HP NO2 NC2
EC_AMP_MUTE# AR54 1K/F_4 2 MMBT3906 5 6 HPOUT_R_SW AC29
In2 COM2 TV@0.1u/16V_4
3

Q16 TV@TS5A23157

+
3

TV@2N7002 AC52
AR19 4.7K_4 TV@100U/16V_R6_6
AC27 2 SPK_HWTV_EN# SPK_HWTV_EN# [37]
10u/6.3V_6

Add 1k for limit large current when Q9 turn on


1

03/23 Jerry Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
Audio ALC272/ALC107
Date: Monday, July 04, 2011 Sheet 29 of 48
5 4 3 2 1
5 4 3 2 1

5V
12V_HDD
HDD POWER

1
F12

1
FAST,3A,1206
ET-0325-12 F11
HDD FAST,3A,1206

2
341mA
JP60

2
D GND 1 496mA 1
D
[15] SATA_RX0_P C263 0.01u/16V_4 SATA_RX0_P_C 2 2
C264 0.01u/16V_4 SATA_RX0_N_C TXP
[15] SATA_RX0_N 3 TXN GND 4 3
4
GND 7
[15] SATA_TX0_N C270 0.01u/16V_4 SATA_TX0_N_C 5 JP160
C272 0.01u/16V_4 SATA_TX0_P_C RXN
[15] SATA_TX0_P 6 RXP G1 GND1 CONN DIP HEADER 4P 1R MS (P2.5,H5.9)
GND2 C666 C664 C665
G2 C298 C301
0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
0.1u/16V_4 10u/25V_12
CONN DIP HEADER 7P 1R MS(P1.27,H8.40)

5V

ET-0325-14
the same as QUX
ODD ODD POWER

1
for Safty F13
the same as QUX
JP61 Jerry 0603 FAST,3A,1206
GND 1
[15] SATA_TX1_P C125 0.01u/16V_4 SATA_TX1_P_C 2

2
C122 0.01u/16V_4 SATA_TX1_N_C TXP
C [15] SATA_TX1_N 3 TXN GND 4 C

GND 7 1
[15] SATA_RX1_N C114 0.01u/16V_4 SATA_RX1_N_C 5 2
C110 0.01u/16V_4 SATA_RX1_P_C RXN
[15] SATA_RX1_P 6 RXP G1 GND1 3
G2 GND2 4

C52 JP161
CONN SMD HEADER 7P 1R MS (P1.27, H3.8) C50 C51 *100u/6.3V_3528 CONN DIP HOUSING 4P FR(P2.5,H4.9)
0.1u/16V_4 10u/6.3V_6

Power Key
ET-0328-04
ET-0330-05
<sean0327> add
B
modify HotKey B

VREG3 R717 *0R_4 F8 PR277 PC@0R/F_4 CIR_RX [37]


32V/0.5A_0603
CIR support S3 R718 0R_4 2 1 PR278 TV@0R_4 JP5
3V_S3 HWTV_CIR_RX [31]
Wake up
Jerry 0518 JP6 1
1 [37] SCREEN_ON# 2
5V_AUX F9 2 1 32V/0.5A_0603 C673 0.1u/16V_4 2 [37] VOL+# 3
5V F10 2 1 32V/0.5A_0603 3 [37] VOL-# 4
[15] PCH_SATA_LED_# 4 [37] OSD_ON# 5
[33] WLAN_LED# 5 6
[37] SCREEN_LED# D21 1N4148WS 6
[37] PWR_LED# D22 1N4148WS 7

*1000P/16V_4

*1000P/16V_4

*1000P/16V_4

*1000P/16V_4
8
9 ET-0325-13

C686

C687

C688

C689
[37] FP_PWRBTN# 10
ADD DIODE For current lakage
Jerry 5/11
Layout note: place top side CONN SMD WAFER 10P 1R MR(P1.25)

SW1
3 1 ET-0325-13 5V_AUX 5V
1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

1000P/16V_4

A 4 2 A
5
C680

C681

C682

C683

C684

C685

mount forEMI
C672 C671 Quanta Computer Inc.
0.1u/16V_4 0.1u/16V_4
Jerry 6/20
PROJECT : QUA
Size Document Number Rev
1A
SATA HDD/ODD/Key
Date: Monday, July 04, 2011 Sheet 30 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

CRT(HWTV) [13] VGA_RED


R308 UMA@0_4 HWTV_CRT_RED
LVDS(Non-HWTV)
R306 UMA@0_4 HWTV_CRT_GREEN
[13] VGA_GREEN
R301 UMA@0_4 HWTV_CRT_BLUE LVDS_TXLOUT0-
UMA [13]
[13]
VGA_BLUE
HSYNC
R320 UMA@0_4 HWTV_CRT_HSYNC LVDS_TXLOUT0+
LVDS_TXLOUT0- [34]
LVDS_TXLOUT0+ [34]
R310 UMA@0_4 HWTV_CRT_VSYNC LVDS_TXLOUT1-
[13] VSYNC
to 2136S [35] LVDS_TX_LN0
R285 UMA@0R_4 LVDS_TXLOUT0- LVDS_TXLOUT1+
LVDS_TXLOUT1- [34]
LVDS_TXLOUT1+ [34]
<sean0327> modify UMA_V@ --> R286 UMA@0R_4 LVDS_TXLOUT0+ LVDS_TXLOUT2-
[35] LVDS_TX_LP0 LVDS_TXLOUT2- [34]
UMA@ R307 DIS@0R_4 R240 UMA@0R_4 LVDS_TXLOUT1- LVDS_TXLOUT2+

DIS
[23]
[23]
[23]
EXT_CRT_RED
EXT_CRT_GRE
EXT_CRT_BLU
R305
R300
R319
DIS@0R_4
DIS@0R_4
DIS@0R_4
HWTV [35]
[35]
[35]
LVDS_TX_LN1
LVDS_TX_LP1
LVDS_TX_LN2
R241
R287
R288
UMA@0R_4
UMA@0R_4
UMA@0R_4
LVDS_TXLOUT1+
LVDS_TXLOUT2-
LVDS_TXLOUT2+
LVDS_TXLOUT3-
LVDS_TXLOUT3+
LVDS_TXLCLK-
LVDS_TXLOUT2+ [34]
LVDS_TXLOUT3- [34]
LVDS_TXLOUT3+ [34]
[23] EXT_CRT_HSYNC [35] LVDS_TX_LP2 LVDS_TXLCLK- [34]
R309 DIS@0R_4 R289 UMA@0R_4 LVDS_TXLOUT3- LVDS_TXLCLK+
[23] EXT_CRT_VSYNC [35] LVDS_TX_LN3 LVDS_TXLCLK+ [34]
R290 UMA@0R_4 LVDS_TXLOUT3+
[35] LVDS_TX_LP3
<sean0327> modify DIS_V@ --> R242 UMA@0R_4 LVDS_TXLCLK- LVDS_TXUOUT0-
[35] LVDS_TXCLK_LN LVDS_TXUOUT0- [34]
DIS@ R243 UMA@0R_4 LVDS_TXLCLK+ LVDS_TXUOUT0+
[35] LVDS_TXCLK_LP LVDS_TXUOUT0+ [34]
LVDS_TXUOUT1-
LVDS_TXUOUT1- [34]
R322 UMA@0_4 CRT_SDA_SW R234 UMA@0R_4 LVDS_TXUOUT0- LVDS_TXUOUT1+
D [13] MCH_DDC_DATA
[13] MCH_DDC_CLK R324 UMA@0_4 CRT_SCL_SW
for VGA [35]
[35]
[35]
LVDS_TX_UN0
LVDS_TX_UP0
LVDS_TX_UN1
R235
R281
UMA@0R_4
UMA@0R_4
LVDS_TXUOUT0+
LVDS_TXUOUT1-
LVDS_TXUOUT2-
LVDS_TXUOUT2+
LVDS_TXUOUT1+ [34]
LVDS_TXUOUT2- [34]
LVDS_TXUOUT2+ [34]
D

[23] VGA_CRT_DDCDAT R321 DIS@0R_4 R282 UMA@0R_4 LVDS_TXUOUT1+ LVDS_TXUOUT3-


[35] LVDS_TX_UP1 LVDS_TXUOUT3- [34]
[23] VGA_CRT_DDCCLK R323 DIS@0R_4 R236 UMA@0R_4 LVDS_TXUOUT2- LVDS_TXUOUT3+
[35] LVDS_TX_UN2 LVDS_TXUOUT3+ [34]
R237 UMA@0R_4 LVDS_TXUOUT2+ LVDS_TXUCLK-
[35] LVDS_TX_UP2 LVDS_TXUCLK- [34]
R238 UMA@0R_4 LVDS_TXUOUT3- LVDS_TXUCLK+
[35] LVDS_TX_UN3 LVDS_TXUCLK+ [34]
R239 UMA@0R_4 LVDS_TXUOUT3+
[35] LVDS_TX_UP3
R283 UMA@0R_4 LVDS_TXUCLK-
[35] LVDS_TXCLK_UN
R284 UMA@0R_4 LVDS_TXUCLK+
[35] LVDS_TXCLK_UP

HDMI
R393 UMA@0R_4 HDMI_DATA2+ R252 DIS@0R_4
[35] TMDSB_DATA2+_LVS [23] EXT_TXLOUTN0
R394 UMA@0R_4 HDMI_DATA2- R253 DIS@0R_4
UMA [35]
[35]
TMDSB_DATA2-_LVS
TMDSB_DATA1+_LVS
R397 UMA@0R_4 HDMI_DATA1+ DIS [23]
[23]
EXT_TXLOUTP0
EXT_TXLOUTN1
R225 DIS@0R_4
R398 UMA@0R_4 HDMI_DATA1- R226 DIS@0R_4
[35] TMDSB_DATA1-_LVS [23] EXT_TXLOUTP1
R391 UMA@0R_4 HDMI_DATA0+ R254 DIS@0R_4
[35] TMDSB_DATA0+_LVS [23] EXT_TXLOUTN2
R392 UMA@0R_4 HDMI_DATA0- R255 DIS@0R_4
[35] TMDSB_DATA0-_LVS [23] EXT_TXLOUTP2
R395 UMA@0R_4 HDMI_CLK+ R256 DIS@0R_4
[35] TMDSB_CLK+_LVS [23] EXT_TXLOUTN3
R396 UMA@0R_4 HDMI_CLK- R257 DIS@0R_4
[35] TMDSB_CLK-_LVS [23] EXT_TXLOUTP3
R227 DIS@0R_4
[23] EXT_TXLCLKOUTN
R228 DIS@0R_4
[23] EXT_TXLCLKOUTP
R219 DIS@0R_4
[23] EXT_TXUOUTN0
R414 DIS@0R_4 HDMI_DATA2+ R220 DIS@0R_4
DIS [23]
[23]
VGA_TMDSA_DAP2
VGA_TMDSA_DAN2
R415 DIS@0R_4 HDMI_DATA2-
HDMI_DATA2+ [33]
HDMI_DATA2- [33]
[23]
[23]
EXT_TXUOUTP0
EXT_TXUOUTN1
R248 DIS@0R_4
R418 DIS@0R_4 HDMI_DATA1+ R249 DIS@0R_4
[23] VGA_TMDSA_DAP1 HDMI_DATA1+ [33] [23] EXT_TXUOUTP1
R419 DIS@0R_4 HDMI_DATA1- R221 DIS@0R_4
[23] VGA_TMDSA_DAN1 HDMI_DATA1- [33] [23] EXT_TXUOUTN2
R412 DIS@0R_4 HDMI_DATA0+ R222 DIS@0R_4
[23] VGA_TMDSA_DAP0 HDMI_DATA0+ [33] [23] EXT_TXUOUTP2
R413 DIS@0R_4 HDMI_DATA0- R223 DIS@0R_4
[23] VGA_TMDSA_DAN0 HDMI_DATA0- [33] [23] EXT_TXUOUTN3
R416 DIS@0R_4 HDMI_CLK+ R224 DIS@0R_4
[23] VGA_TMDSA_CLK+ HDMI_CLK+ [33] [23] EXT_TXUOUTP3
R417 DIS@0R_4 HDMI_CLK- R250 DIS@0R_4
[23] VGA_TMDSA_CLK- HDMI_CLK- [33] [23] EXT_TXUCLKOUTN
R251 DIS@0R_4
[23] EXT_TXUCLKOUTP

R381 UMA@0R_4 HDMI_SDVO_CLK


[35] SDVO_CLK_TMDSB_LVS
R377 UMA@0R_4 HDMI_SDVO_DAT
C
UMA [35] SDVO_DAT_TMDSB_LVS
[21] UMA_PCH_BKLTEN
R304 *UMA@0R_4
C

HDMI_SDVO_CLK R293 *UMA@0R_4


HDMI_SDVO_DAT
HDMI_SDVO_CLK
HDMI_SDVO_DAT
[33]
[33]
UMA [21] UMA_PCH_VDDEN
[35] PANEL_VCC_ON
R292 UMA@0R_4 LVDS_DISP_ON
R303 UMA@0R_4 LVDS_BKLT_EN
[23] VGA_TMDSA_DDC_CLK
R382 DIS@0R_4 2136S [35] BLACKLIGHT_ON
R378 DIS@0R_4
DIS [23] VGA_TMDSA_DDC_DAT
to DIS [23] EXT_BKLT_EN
R274 DIS@0R_4 LVDS_DISP_ON
LVDS_DISP_ON [34]
R275 DIS@0R_4 LVDS_BKLT_EN
[23] EXT_DISP_ON LVDS_BKLT_EN [34]

IO
B/D
HWTV LVDS EDID(DIS)
3.3V LVDS/CRT 3.3V
3.3V
EDID Write Address:0xA8
J107

5V_TV
HWTV_CRT_HSYNC
HWTV_CRT_VSYNC
51
49
HSYNC
VSYNC
POWER_ON
BL_ADJ
52
50
HWTV_PWR_ON#

HWTV_SM_SCL_Q
HWTV_PWR_ON# [37]
HWTV_BL_ADJ [34]
EDID DTC144EU R386
C279 DIS@0.1U/25V_4
CRT for UMA Debug
47 48
HWTV_CRT_BLUE_R GND SMBCLK HWTV_SM_SDA_Q 10K_4 U24
160mil 45
RGB_BLUE SMBDAT
46 Q13
43 44 8 1
HWTV_CRT_GREEN_R GND GND VCC A0
41 42 HWTV_RXD1 [37] 1 3 7 2
RGB_GREEN RXD1 LVDS_SCL WC# A1 WRITE_EDID_ROM
39 40 HWTV_TXD1 [37] 6 3
C300 C299 HWTV_CRT_RED_R GND TXD1 LVDS_SDA SCL A3
37 38 HWTV_GPIO [37] 5 4
RGB_RED GPIO SDA GND CN20
35 36 HWTV_INT# [37]
TV@10u/6.3V_6 TV@0.1u/16V_4 GND INT# DIS@M24C02
33 34 5V 1
NC GND HWTV_CRT_RED
31 32 HWTV_CIR_RX [30] 2

2
NC CIR_RX HWTV_CRT_GREEN
12V_HDD 29 30 3
+12V NC WRITE_EDID_ROM C295 HWTV_CRT_BLUE
27 28 HWTV_BKLT_EN [34] 4
NC BKLT_EN PC@0.1u/16V_4
25 26 5
+5V NC HWTV_CRT_VSYNC
23 24 6
5V_TV 2 1 21
+5V
+5V
PWRGD
THERMAL
22
HWTV_PWRGD [37]
HWTV_THERMAL [37]
VGA EDID(TV) <sean0327> add HWTV_CRT_HSYNC 7
F5 19 20 PC@ CRT_SDA_SW 8
B
*TV@FAST/24V/5A_12 +5V NC 3.3V 3.3V CRT_SCL_SW B
17
+5V NC
18
<sean0327> modify I2C 3.3V
EDID Write 9
10
15
NC Reserved
16 EC_TV_RVS3 [37]
PU
3.3V
Address:0xAC PC@CONN SMD HEADER 10P 1R MS(P1.0,H4.25)
13 14 TV_PC_DET [37]
AGND Reserved R387 R388 C277 TV@0.1u/10V_4
[29] SPK_LOUT_HWTV_HP 11 12 EC_TV_RVS1 [37]
HP_LOUT Reserved <sean0327> add
[29] SPK_ROUT_HWTV_HP 9 10 MUTE_2673S [37] *4.7K_4 *4.7K_4
HP_ROUT Reserved U25 PC@
7 8
AGND Reserved R697 TV@0R_4
[29] SPK_ROUT_HWTV 5 6 TV_DET# [37] 8 1
SPK_ROUT DET# R383 R384 VCC A0
[29] SPK_LOUT_HWTV 3 4 7 2
SPK_LOUT NC CRT_SCL WC# A1 WRITE_EDID_ROM
1 2 6 3
AGND NC CRT_SDA SCL A3
TV_LED# [37] 5 4
TV@CONN SMD HOUSING 52P 2R FR(P0.8,H9.9) 4.7K_4 SDA GND
<sean0327> 4.7K_4 TV@M24C02
AGND modify
Codec'
CRT_SDA_SW
AGND CRT_SCL_SW 3.3V 3.3V

ET-0328-06
VGA_LVDS_CLK R426 *DIS@0R_4 LVDS_SCL
R432 R431 5V VGA_LVDS_DAT R427 *DIS@0R_4 LVDS_SDA
U23
4.7K_4 4.7K_4
C278 16 8
VCC GND CRT_SDA_SW R390 *TV@0R_4 CRT_SDA
ET-0328-05 0.22u/6.3V_4 CRT_SCL_SW R389 *TV@0R_4 CRT_SCL
HWTV_CRT_RED R581 0R_4 HWTV_CRT_RED_R VGA_LVDS_CLK 2
[23] VGA_LVDS_CLK IA0
HWTV_CRT_GREEN R708 0R_4 HWTV_CRT_GREEN_R VGA_LVDS_DAT 5 4 LVDS_SCL
[23] VGA_LVDS_DAT IB0 YA
HWTV_CRT_BLUE R709 0R_4 HWTV_CRT_BLUE_R CRT_SDA_SW 11
CRT_SCL_SW IC0 LVDS_SDA
14 7
R444 R443 R442 ID0 YB
For EMI 03/23 Jerry
[10,11,16,35] SMB_CLK_DEVICE 3 9 CRT_SDA
TV@150R/F_4 IA1 YC
[10,11,16,35] SMB_DAT_DEVICE 6
C675 C676 C677 IB1 CRT_SCL
10 12
IC1 YD
10p/50V_4 10p/50V_4 10p/50V_4 13
ID1
SW2
3 1 HWTV_PWR_ON# 3.3V 1 15
S OE
A 4 2 A
5 SN74CBT3257CPWR
6
R438
3.3V *10K/F_4

HWTV_CRT_VSYNC R441 *TV@10K/F_4 isolation PU on TV board [16] WRITE_EDID_ROM WRITE_EDID_ROM


HWTV_CRT_HSYNC R440 *TV@10K/F_4

HWTV_SM_SCL_Q R690 TV@0R_4 R429

HWTV_SM_SDA_Q R691 TV@0R_4


HWTV_SM_SCL [37]
*10K/F_4 Quanta Computer Inc.
HWTV_SM_SDA [37]
PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
DIS/UMA_SW/HWTV
Date: Monday, July 04, 2011 Sheet 31 of 48
5 4 3 2 1
5 4 3 2 1

3 IN 1 JP220
Reserved for Serial Flash
CARD [16,22,33,36,37] PLTRST_PCIE_N

[16] CR_CLK_REQ#
R136 *10K/F_4 3V3_IN
3.3V
CARD_3V3 CARD_3V3
SD_D0
SD_D1
10
3
2
SD-VCC
SD-DAT0
SD-DAT1
SD_D2 20
READER 3.3V R141 10K/F_4
3.3V
OCP= 0.95A
+ C459
SD_D3
SD_CLK
18
7
SD-DAT2
SD-DAT3
SD-CLK
C445 SD_CMD 15
SD_CD# SD-CMD
21 SD-C/D

PLTRST_PCIE_N
C127 0.1u/16V_4 0.1u/16V_4 10u/10V_8 SD_WP 1

CR_CLK_REQ#
SD-WP
D D
R150 6.2K/F_6 4

EEDO_CR
SD-GND

EECS_CR

EESK_CR

MS_INS#
5

SD_CD#
SD-GND

RREF

SP15

SP14
CARD_3V3 CARD_3V3 17
MS_D0 MS-VCC
9 MS-DATA0
MS_D1

48

47

46

45

44

43

42

41

40

39

38

37
8 MS-DATA1
P5 R509 *0R_4 P9 U3 C491 C492 MS_D2 11
MS_D3 MS-DATA2
14

RREF

EECS

EESK
3V3_IN

GPIO/EEDI
CLK_REQ#

PERST#

EEDO

MS_INS#

SD_CD#

SP15

SP14
*0.1U/16V_4 0.1u/16V_4 MS_CLK MS-DATA3
16 MS-SCLK GND 23
MS_INS# 13 22
MS_BS MS-INS GND
6 MS-BS
GND 19
12 Resister
GND value depend
on LED type.

1 36 CONN SMD HOUSING 22P 1R(P0.76,H4.3)FR


[14] PCIE_TX4_P HSIP SP13
2 35 SP12
[14] PCIE_TX4_N HSIN SP12

[12] CLK_PCIE_CR_P 3 REFCLKP SP11 34

4 33 SP10
[12] CLK_PCIE_CR_N REFCLKN SP10
C415 4.7u/10V_6 P5 5 32 SP9
AV12 SP9
C137 0.1u/16V_4 PCIE_RXP4_C 6 31
C [14] PCIE_RX4_P HSOP SP8 C

[14] PCIE_RX4_N
C138 0.1u/16V_4 PCIE_RXN4_C

GND
7 HSON RTS5209-GR SP7 30 SP7

8 29

C416 0.1u/16V_4 P9 9
GND

DV12
SP6

SP5 28 SP5
C89 4.7u/10V_6
Share Pin
3.3V CARD_3V3 10 27 CR_DV12_S C90 0.1u/16V_4
Card1_3V3 DV12_S
Share Pin MS SD
11 26 GND SP9 R63 0R_4 MS_D0
3V3_IN GND SP7 R64 0R_4 MS_D1
Card2_3V3 12 25 SD_D2_R R66 0R_4 SD_D2 SP1 SP10 R62 0R_4 MS_D2
Card2_3V3 SD_D2 SP12 R61 0R_4 MS_D3
C413 + C411 C134 SP5 R65 0R_4 MS_BS
SP2 SP14 R109 22R_4 MS_CLK
10u/10V_8 0.1u/16V_4 *0.1U/16V_4 SP15 R132 0R_4 SD_WP

SP3 C113

SD_CMD
DV33_18
XD_CD#

SD_CLK
5P/50V_4

SD_D1

SD_D0

SD_D3
COMBO LUN
GND

SP1

SP2

SP3

SP4
SP4

Reserved
13

14

15

16

17

18

19

20

21

22

23

24
SP5 MS_BS

SD_CMD_R
SD_CLK_R
DV33_18

GND

SD_D1_R

SD_D0_R

SD_D3_R
SP6
B B
SP7 MS_D1

SP8
R131R108R83 R68 R67 R4~R9,C16 close to chip pin
C128 C124
SP9 MS_D0
0R_4

0R_4

0R_4

0R_4
22R_4

4.7u/10V_6 0.1u/16V_4

SP10 MS_D2
Reserved
SD_CMD
SD_CLK
SD_D1

SD_D0

SD_D3

SP11

SP12 MS_D3

C91 SP13
5P/50V_4

SP14 MS_CLK
Reserved
SP15 SD_WP
3.3V
U29
8 1 EECS_CR
A
C412 VCC CS EESK_CR A
7 DC SK 2
6 3 EEDO_CR
ORG DI EEDI_CR R496 *10K/F_4
5 GND DO 4
*0.1U/16V_4
*AT93C46DN
Use for SSID
Quanta Computer Inc.
PROJECT : QUA
Size Document Number Rev
1A
Card Reader RTS5209
Date: Monday, July 04, 2011 Sheet 32 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

3.3VWL

Mini Card (WLAN)


3V_S5
Meet Mini Card Slot spec 1.2

Q44 3.3VWL For VOL Reqqirement


Jerry 0510
6 1 1.5V 3.3VWL R623 10K_4
IN OUT <Jerry0504>
4 2 J105 modify

2
IN GND
51 52
Reserved +3.3V
37 3VWL_ON 3 5 49 50
ON/OFF GND 3.3VWL Reserved GND
47 48
Reserved +1.5V
45 46
*AAT4280IGU-1-T1 Reserved LED_WPAN#
43 44 1 3 WLAN_LED# [30]
Reserved LED_WLAN# cancel PCH Detect USB OC PIN /Back IO board add fuse
41 42
Reserved LED_WWAN# Jerry 0512
39 40
Reserved GND Q40
37 38
3V_S5 R727 3.3VWL Reserved USB_D+ DTC144EU
35 36
D GND USB_D- D
[14] PCIE_TX2_P 33 34
PETp0 GND 3.3VWL
[14] PCIE_TX2_N 31 32
0R/F_8 PETn0 SMB_DATA Del D15,add R712 Oohm
29 30
GND SMB_CLK 03/24 Jerry
27 28
GND +1.5V
[14] PCIE_RX2_P 25
PERp0 GND
26 ET-0328-08
[14] PCIE_RX2_N 23 24
PERn0 +3.3Vaux PLTRST_PCIE_N C580 C575 C610
21 22 PLTRST_PCIE_N [16,22,32,36,37]
GND PERST# R712 0R_4
[12] PCICLK_DB 19 20 WLAN_RF_ON [37] 0.01u/16V_4 0.1u/16V_4 10u/10V_8
Reserved Reserved R621 0R_4
17 18 WLAN_DET# [15]
Reserved GND R622 *0R_4
15 16 LPC_LAD0 [16,37] 1.5V
GND Reserved
[12] CLK_PCIE_WLAN_P 13 14 LPC_LAD1 [16,37]
REFCLK+ Reserved
[12] CLK_PCIE_WLAN_N 11 12 LPC_LAD2 [16,37]
REFCLK- Reserved
9 10 LPC_LAD3 [16,37]
3.3VWL GND Reserved
7 8 LPC_LFRAME_N [16,37]
CLKREQ# Reserved C574 C581 C582
5 6
Reserved +1.5V *10u/10V_8
3 4 0.1U/16V_4 0.1U/16V_4
Reserved GND
2

WAKE_N_MI 1 2
R652 WAKE# +3.3V
10K_4 CONN SMD HOUSING 52P 2R FR(P0.8,H9.9)
67910-0002
[16,36] PCIE_WAKE# 3 1
Q43 Delete L36 direct short
DTC144EUA For VOL Reqqirement,Mount 03/22 Jerry <sean0327>
Jerry 0704 ET-0328-09 modify 3.3V
3.3V

Mini Card (TV TUNER) <sean0327>


modify
160mil 160mil
1.5V 3.3V
VCC3_TV Inrush current: 3A. C620 C202
VCC1.5 Inrush current:500mA 10u/6.3V_6 0.1u/16V_4
C200
10u/6.3V_6
C198
0.1u/16V_4
C615
10u/6.3V_6

J106
VCC_TV Change to 3.3V power rail 1 51 52
Jerry 0603 TP144 Reserved +3.3V
49 50
Reserved GND
C
TP148 1 47 48 C
Debug(PCIRST#) +1.5V 1.5V
TP145 1 45 46
Debug(PCICLK) LED_WPAN#
43 44
GND LED_WLAN# R327 *10K/F_4
3.3V 41 42 3.3V
+3.3Vaux LED_WWAN#
39 40
+3.3Vaux GND C201 C199
37 38 USBP10 [14]
GND USB_D+
35 36 USBN10 [14]
GND USB_D- 0.1u/16V_4 4.7u/10V_6 UMA@100R/F_4
[14] PCIE_TX3_P 33 34
PETp0 GND HDMI_DATA0+ R399 HDMI_DATA0-
[14] PCIE_TX3_N 31 32
PETn0 SMB_DATA
29 30
GND SMB_CLK HDMI_DATA1+ R400 UMA@100R/F_4 HDMI_DATA1-
27 28
GND +1.5V
[14] PCIE_RX3_P 25 26
PERp0 GND HDMI_DATA2+ R401 UMA@100R/F_4 HDMI_DATA2-
[14] PCIE_RX3_N 23 24
PERn0 +3.3Vaux PLTRST_PCIE_N
21 22
GND PERST# HDMI_CLK+ R402 UMA@100R/F_4 HDMI_CLK-
TP146 1 19 20
Reserved W_DISABLE#
TP147 1 17 18
Reserved GND
15 16
GND Reserved
[12] CLK_PCIE_TV_P 13 14
REFCLK+ Reserved
[12] CLK_PCIE_TV_N 11 12
REFCLK- Reserved
9 10
GND Reserved R404 DIS@499R/F_4 HDMI_DATA0+
7 8
CLKREQ# Reserved R405 DIS@499R/F_4 HDMI_DATA0-
5 6
Reserved +1.5V R407 DIS@499R/F_4 HDMI_DATA1+
3 4
GND

GND

Reserved GND R406 DIS@499R/F_4 HDMI_DATA1-


1 2
WAKE# +3.3V R408 DIS@499R/F_4 HDMI_DATA2+
CONN SMD HOUSING 52P 2R FR(P0.8,H9.9) R409 DIS@499R/F_4 HDMI_DATA2-
53

54

R411 DIS@499R/F_4 HDMI_CLK+


R410 DIS@499R/F_4 HDMI_CLK-

3
Q15
DIS@2N7002
5V 2

Daughter B/D

1
B B
3V_VGA
5V
VGA_TMDSB_HOT_PLUG form Q7.3 to Q7.1

R362 10K_4 HDMI_SDVO_CLK


J31 R363 10K_4 HDMI_SDVO_DAT
A1 B1 3V_VGA
3.3V 3.3V_S0 GND
A2 B2 PCIE_RX6_P [14]
3.3V_S0 PERP0
3V_S5 A3 B3 PCIE_RX6_N [14]
3V_S5 PERN0
5V A4 B4
NC GND
5V_S3 A5 B5 PCIE_TX6_P [14]
5V_S3 PETP0 3.3V 5V R725
A6 B6 PCIE_TX6_N [14]
5V_S3 PWR PETN0 DIS@4.7K_4
A7 B7
5V_S3 GND
A8 B8 CLK_PCIE_LAN_P [12]
5V_S3 PE_CKP0 R360 Change to 200K from 10K VGA_TMDSB_HOT_PLUG
5V_S3 A9 B9 CLK_PCIE_LAN_N [12]
5V_S3 LAN PE_CKN0 03/23 Jerry R724
A10 B10 VGA_TMDSB_HOT_PLUG [23]
5V_S3 GND

3
5V_S3 A11 B11 PCIE_WAKE# C659 C658 C249 DIS@100K_4
5V_S3 WAKE#
A12 B12 3V_LAN 10u/6.3V_6 0.1u/16V_4 0.1u/16V_4
GND LAN_3.3V
A13 B13 2
[14]
[14]
USBP5
USBN5 A14
USB_P5
USB_N5
LAN_3.3V
LAN_CLK_REQ
B14 R726
DIS

3
A15 B15 LAN_CLK_REQ# [16] DIS@40.2K_4 Q45
GND GND PLTRST_PCIE_N
[14] USBP4 A16 B16 2 DIS@2N7002
USB_P4 PCIE_RST HDMI_HOT_PLUG
[14] USBN4 A17 B17

1
1
USB_N4 HDMI_HPD HDMI_SDVO_CLK D23 Q7 MEET HDMI SPEC
A18 B18 HDMI_SDVO_CLK [31]

1
2
GND USB HDMI_DDC_CLK HDMI_SDVO_DAT 5V_S3 DIS@MMBT3904 Jerry 5/11
[14] USBP3 A19 B19 HDMI_SDVO_DAT [31]
USB_P3 HDMI_DDC_DATA

*BC5V0U1BZ01_ESD
[14] USBN3 A20 B20 R360
USB_N3 GND
A21 B21 HDMI_DATA0+ [31] DIS@200K/F_4
GND HDMI_TXP0
[14] USBP2 A22 B22 HDMI_DATA0- [31]
USB_P2 HDMI_TXN0
[14] USBN2 A23 B23

1
USB_N2 GND C265 C268
A24 B24 HDMI_DATA1+ [31]
GND HDMI_TXP1
A25 B25 ET-0328-12
A26
NC
NC
HDMI_TXN1
GND
B26
HDMI_DATA1- [31]
10u/6.3V_6 0.1u/16V_4 UMA
A27 HDMI B27
NC HDMI_TXP2 HDMI_DATA2+ [31]
A28 B28 HDMI_DATA2- [31]
NC HDMI_TXN2 HDMI_HOT_PLUG R359 UMA@0R/F_4 TMDSB_HOT_PLUG_LVS
A29 B29 TMDSB_HOT_PLUG_LVS [35]
NC GND 03/22 Jerry
A A30 B30 HDMI_CLK+ [31]
A
NC HDMI_CLKP R403 0ohm change to 0603 from 0402 C253
A31 B31 HDMI_CLK- [31]
NC HDMI_CLKN
A32
NC GND
B32 ET-0328-10
*UMA@0.1U/16V_4
3V_S5
CONN DIP HS 64P 4R FS(P1.00,H11)
3V_LAN R403 0R/F_6

C285 C282 C287

10u/6.3V_6 0.1u/16V_4 0.1u/16V_4 Quanta Computer Inc.


HDMI_HOT_PLUG R358 *100K_4
PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
WLAN/TV/Daughter BD
Date: Monday, July 04, 2011 Sheet 33 of 48
5 4 3 2 1
5 4 3 2 1

LCD CONNECTOR LCD POWER SWITCH

ET-0329-03 3.3V

5V
ET-0328-18
ET-0328-15 F8 Direct short 03/22 Jerry
LCDVCC
L7 Direct short 03/22 Jerry
R662
3.59A <sean0327>add D/ R662 PC@10K/F_4 Q33
LCDVCC mount
D [37] EC_PWROK EC_PWROK C621 6 1 LCDVCC D
J50 D18 1N4148WS PC@0.1u/16V_4 IN OUT

1 16 4 IN GND 2
2 17 LVDS_DISP_ON PR250 PC@0R/F_4 PANEL_PWON R661 PC@0R/F_4 C617 C616
3 18 [31] LVDS_DISP_ON 3 ON/OFF GND 5
[31] LVDS_TXLCLK+ 4 19 LVDS_TXUCLK+ [31] PC@10u/10V_8 PC@0.1u/16V_4
[31] LVDS_TXLCLK- <sean0327> remove EC
5 20 LVDS_TXUCLK- [31]
BLON/DISPON PC@AAT4280IGU-1-T1
6 21
[31] LVDS_TXLOUT0+ 7 22 LVDS_TXUOUT0+ [31]
[31] LVDS_TXLOUT0- 8 23 LVDS_TXUOUT0- [31]
[31] LVDS_TXLOUT1+ R660
9 24 LVDS_TXUOUT1+ [31]
[31] LVDS_TXLOUT1- PC@100K/F_4 R340 change to 5V_AUX from 5V
10 25 LVDS_TXUOUT1- [31]
11 26 ET-0329-04 03/22 Jerry 5V_AUX LCDVCC
[31] LVDS_TXLOUT2+ 12 27 LVDS_TXUOUT2+ [31]
[31] LVDS_TXLOUT2- 13 28 LVDS_TXUOUT2- [31]
[31] LVDS_TXLOUT3+ 14 29 LVDS_TXUOUT3+ [31]
[31] LVDS_TXLOUT3- 15 30 LVDS_TXUOUT3- [31]
ET-0328-19
PC@CONN SMD HEADER 30P 2R MS(P1.0,H4.25) R340 R336
PC@20K/F_4 PC@169R/F_4

HWTV have LCD PWR circuit, TV -->

3
N.C. Q34
DIGON_R_A 2
Q3
PC@2N7002E

3
PC@DTC144EU

PANEL_PWON 2

1
1
C241
*PC@3300P/50V_4

2
C C

Converter B/D BACKLIGHT CONTROL


ET-0328-16
ET-0328-17
F1 fuse change to 2A from 5A 03/22 Jerry
VIN R52 Direct short 03/22 Jerry

F1
JP7
2 1 3V_AUX C45
12 FAST/32V/2A_12
11 0.1u/16V_4
10
9 DISPON C47 C46 C49 C48 R48
8 10u/25V_12 0.01u/25V_4 0.01u/25V_4 10u/25V_12 <sean0327> add 10K_4
7

5
PC@
6 BL_PWR_OFF#
[37] BL_PWR_OFF# 2
5 DISPON
4 4
VADJ-1 R50 PC@0R_4 VADJ [37] LVDS_BKLT_EN PR152 PC@0R_4 PR154 0R_4 BL_EN_AND 1
3 [31] LVDS_BKLT_EN
U1 C43
2 R49 *UMA@0R_4 HWTV_BKLT_EN PR150 TV@0R_4 TC7SH08FU *1n/50V_4
2136S_PWM_OUT [35] [31] HWTV_BKLT_EN

3
1
2

CONN SMD WAFER,12P,1R,MS(P1.25,H4.7) EP R51 TV@0R_4 HWTV_BL_ADJ [31] <sean0327> remove EC <sean0327> add
C44 BLON/DISPON PC@
*1n/50V_4 C42 R47
1

*0.1u/16V_4 100K/F_4

B version need to change footprint 85205-12001-12p-l Mount R47


JERRY 0505
B B

Hole 1.5V_S3
ET-0328-20

H6 H17 H1 H24 H2 H3 H19 H22 H13

C696 C697 C698 C699 C701


150p/25V_0402 150p/25V_0402 150p/25V_0402 150p/25V_0402 150p/25V_0402

*Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole *Guard-Via Hole
H23 H7

lock on Middle For EMI


1.5V_S3 03/24 Jerry

*Guard-Via Hole *Guard-Via Hole

H18 H16 H14 H5 H4 H12 H11

CPU/GPU Thermal Module C695 C702 C703 C704 C678 C700 C679 C705 C706
150p/25V_0402 150p/25V_0402 150p/25V_0402 150p/25V_0402 0.1u/25V_4 150p/25V_0402 0.1u/25V_4 150p/25V_0402 150p/25V_0402
A *PTH_H *PTH_H *PTH_H *PTH_H *PTH_H *PTH_H *PTH_H A

H21 CPU Socket ET-0331-01


H15 H20 H9 H10 H8 PAD1 PAD2

PTH_H PTH_H *NPTH_H *PTH_H *NPTH_H *PAD_H *PAD_H

*Guard-Via Hole
Quanta Computer Inc.
Mini-PCIe PH(TV)

www.vinafix.vn
Mini-PCIe
PROJECT : QUA
Size Document Number Rev
Rear PH PH(WLAN) 1A
LVDS/Converter/Hole
Date: Monday, July 04, 2011 Sheet 34 of 48
5 4 3 2 1
1

SWR_V12

C208
UMA@0.1u/25V_6
LVDS_TX_UN0 [31]
LVDS_TX_UP0 [31]
LVDS_TX_UN1 [31]
LVDS_TX_UP1 [31]

PIN48

PIN45
PIN44
PIN47
PIN46
LVDS_TX_UN2 [31]
LVDS_TX_UP2 [31]
LVDS_TXCLK_UN [31]
LVDS_TXCLK_UP [31]

49

48
47
46
45
44
43
42
41
40
39
38
37
U14 EVEN_CH LVDS_TX_UN3 [31]
LVDS_TX_UP3 [31]

EPD

TXE0+

TXE1+

TXE2+
VCCK
GPIO/PWM0/PWMOUT
MIICSCL0
MIICSDA0
MIICSCL1
MIICSDA1

TXE0-

TXE1-

TXE2-
DP input signals
R352 UMA@0R_4 PIN1
[13] DP_HPD

R343 36
PIN1 TXEC-
1 35
UMA@100K_6 3.3V L37 PIN2 DP_HPD TXEC+
2 TEST_MODE TXE3- 34
DVCC33 AVCC33 PIN3 3 33
UMA@60ohm,1A PIN4 AUX-CH_N TXE3+
4 AUX-CH_P TXO0- 32 LVDS_TX_LN0 [31]
5 31 LVDS_TX_LP0 [31]
DP_V33 TXO0+
6 30 LVDS_TX_LN1 [31]
<sean0327> change R673 R671 C655 PIN7 DP_GND TXO1-
7 LANE0P TXO1+ 29 LVDS_TX_LP1 [31]
part C629 C653 UMA@0.1u/25V_6 PIN8 8 RTD2136S 28
UMA@100K_6 *UMA@1M/F_6 LANE0N TXO2- LVDS_TX_LN2 [31]
UMA@10U/6.3V_6 UMA@0.1u/25V_6 PIN9 9 27
LANE1P TXO2+ LVDS_TX_LP2 [31]
PIN10 10 26
LANE1N TXOC- LVDS_TXCLK_LN [31]
C251 UMA@0.1u/16V_4 AUX_CN_N_C C242 UMA@0.1u/16V_4 PIN3 SWR_V12 11 25
[13] AUX_CN_N DP_V12 TXOC+ LVDS_TXCLK_LP [31]
12

GPIO/PWMOUT
DP_REXT LVDS_TX_LN3 [31]
C252 UMA@0.1u/16V_4 AUX_CN_P_C C243 UMA@0.1u/16V_4 PIN4 C248

GPIO/PWMIN
[13] AUX_CN_P LVDS_TX_LP3 [31]

GPIO/PWM1
UMA@0.1u/25V_6

SWR_VCCK

SWR_VDD
R345

CIICSDA1
CIICSCL1

SWR_LX
R672 R674 UMA@12K/F_6

TXO3+
TXO3-
PVCC
<sean0327> change DVCC33

GND
UMA@100K_6 *UMA@1M/F_6
part 3.3V L9
DVCC33
UMA@60ohm,1A

PIN13 13
PIN14 14
SWR_V1215
16
SWR_LX 17
18
PIN19 19
PIN20 20
PIN21 21
22
23
24
C632 C654 ODD_CH
UMA@10U/6.3V_6 UMA@0.1u/25V_6
ET-0328-29
DVCC33
withstand current > 600mA
L8
SWR_LX SWR_V12
UMA@4.7uH/750mA R337
<sean0327> L8 need to change UMA@0R_4
footprint C623 C627 C625
C240 C239 UMA@22U/6.3V_8 UMA@0.1u/25V_6 UMA@0.1u/25V_6
UMA@22U/6,3V_8 UMA@0.1u/25V_6
UMA@0.1u/16V_4 C244 PIN7
[13] DP_LANE0_P
UMA@0.1u/16V_4 C245 PIN8
[13] DP_LANE0_N

UMA@0.1u/16V_4 C246 PIN9


[13] DP_LANE1_P
UMA@0.1u/16V_4 C247 PIN10
[13] DP_LANE1_N

In System Programing
Program EEPROM, EDID EEPROM,
GPIO & TESTing signals
slave address=0xA8 slave address=0xA0
DVCC33 DVCC33 DVCC33 DVCC33
PIN2

R333 UMA@0R_4 PIN19


[34] 2136S_PWM_OUT
R330 UMA@0R_4 PIN20 R349 R357 R356 R355
[31] PANEL_VCC_ON
UMA@4.7K_6 UMA@4.7K_6 UMA@4.7K_6 UMA@4.7K_6
R329 UMA@0R_4 PIN21 DVCC33 DVCC33 PIN48 PIN47 PIN45 PIN46
[21] PCH_PWM_IN
R342 UMA@0R_4 PIN44
[31] BLACKLIGHT_ON
DVCC33 DVCC33

R350 R351
R344

R335

R332

R341

DVCC33 DVCC33 UMA@4.7K_6 UMA@4.7K_6


[10,11,16,31] SMB_CLK_DEVICE R346 UMA@0R_4 PIN13 U17 U16
8 VCC WP 7 8 VCC WP 7
UMA@100K_4

UMA@100K_4

UMA@100K_4

*UMA@100K_4

R347 UMA@0R_4 PIN14 PIN47 5 PIN45


A2 3
5
[10,11,16,31] SMB_DAT_DEVICE
PIN48 SDA PIN46 SDA A2 3
6
A1 2
6
R328 R348 SCL SCL A1 2
4
A0 1
4
*UMA@4.7K_6 *UMA@4.7K_6 GND GND A0 1
PIN20 PIN44 UMA@M24C64 *UMA@M24C02
Unmount R341
Jerry 0505
A A
The Program EEPROM must be The EDID EEPROM must be 1
2 byte addressing device byte addressing device

3.3V

EMI
2

3.3V
HDMI
R370 UMA@4.7K_4 PC0 R371 *UMA@4.7K_4 L10
UMA@0R/F_6 U18
R373 *UMA@4.7K_4 PC1 R374 UMA@4.7K_4
1

+3V_LS 2
R367 *UMA@4.7K_4 HDMI_CFG0 R366 *UMA@4.7K_4 VCC
11
VCC
15 VCC
R369 UMA@4.7K_4 HDMI_CFG1 R368 *UMA@4.7K_4 21
VCC
26
VCC
33
C660 C657 C656 C276 C271 C269 C661 C275 VCC
40
VCC POWER
46
UMA@0.1u/10V_4

UMA@0.1u/10V_4

UMA@0.1u/10V_4

UMA@0.1u/10V_4

UMA@0.1u/10V_4

UMA@0.1u/10V_4

UMA@0.1u/10V_4

REXT R376 UMA@499R/F_4 VCC

RT_EN# R380 *UMA@0R_4 39 22


[13] TMDSB_DATA1+ IN_D1+ OUT_D1+ TMDSB_DATA1+_LVS [31]
[13] TMDSB_DATA1- 38 23 TMDSB_DATA1-_LVS [31]
HDMI_OE# R385 UMA@4.7K_4 IN_D1- OUT_D1-

[13] TMDSB_CLK+ 42 19 TMDSB_CLK+_LVS [31]


IN_D2+ OUT_D2+
[13] TMDSB_CLK- 41 20 TMDSB_CLK-_LVS [31]
IN_D2- OUT_D2-
HDMI Terminator near CONN
[13] TMDSB_DATA2+ 45 16 TMDSB_DATA2+_LVS [31]
IN_D3+ OUT_D3+
[13] TMDSB_DATA2- 44 17 TMDSB_DATA2-_LVS [31]
IN_D3- OUT_D3-

[13] TMDSB_DATA0+ 48 IN_D4+ OUT_D4+ 13 TMDSB_DATA0+_LVS [31]


[13] TMDSB_DATA0- 47 14 TMDSB_DATA0-_LVS [31]
IN_D4- OUT_D4-
3.3V 9 28 SDVO_CLK_TMDSB_LVS
[13] SDVO_CLK_TMDSB SCL SCL_SINK SDVO_CLK_TMDSB_LVS [31]
EQUALIZATION SETTING [13] SDVO_DATA_TMDSB 8 29 SDVO_DAT_TMDSB_LVS SDA/SCL PU near
SDA SDA_SINK SDVO_DAT_TMDSB_LVS [31]
PC1:PC0=0:0 8dB TMDSB_HOT_PLUG_LVS CONN
[13] TMDSB_HOT_PLUG 7 30 TMDSB_HOT_PLUG_LVS [33]
PC1:PC0=0:1 4dB Recommanded R379 R375 3.3V HPD HPD_SINK
PC1:PC0=1:0 12dB UMA@2.2K_4 UMA@2.2K_4
PC1:PC0=1:1 0dB R372 UMA@4.7K/F_4 DDC_EN 32
PC0 DDC_EN
3 1
PC1 PC0 GND
4 5
HDMI_CFG1 PC1 GND
34 DDCBUF_EN GND 12
CFG = LOW: LOW-level input voltage: <0.40 V, LOW-level output voltage: 0.60 V SDVO_DATA_TMDSB HDMI_CFG0 35 18
CFG GND
CFG = HIGH: LOW-level input voltage: <0.44 V, LOW-level output voltage: 0.66 V GND 24
SDVO_CLK_TMDSB 27
HDMI_CFG1 = LOW: Passive DDC buffer RT_EN# GND
10 31
HDMI_CFG1 = HIGH: Active DDC buffer HDMI_OE# RT_EN# GND
25 OE# GND 36
REXT 6 37
REXT GND
GND GND
43
CONTROL EPAD 49

UMA@PI3VDP411LSRZBE

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
DP2LVDS(RTD2136S)/HDMI LevelShifter
Date: Monday, July 04, 2011 Sheet 35 of 48
1
5 4 3 2 1

USB30_+3.3VAUX USB30_+3.3VAUX
Change to DTC144EU USB30_SMI#
Jerry 0516 Stuff R186 USB30_+3.3VAUX USB30_+3.3VAUX USB30_+3.3VAUX
Jerry 0516 SPI Flash ROM
For debug only.

1
USB30_+3.3VAUX R192 R191 R188 Don't connect to OVCUR1 R187 USB3@10K/F_4

USB3@10K/F_4
Q30 U31
system SMBus

USB3@10K/F_4

USB3@10K/F_4
PLTRST_PCIE_N_USB 2 USB3@DTC144EU OVCUR2 R186 USB3@10K/F_4 R583 SPICS# 1 8
USB3@10K/F_4 SPISCLK 6 CE# VDD
R195 R194 OVCUR3 R185 USB3@10K/F_4 SPISI SCK
5
SI

2
USB3@10K/F_4 USB3@10K/F_4 SPISO 2 7

3
PCIE_WAKE#_R OVCUR4 R184 USB3@10K/F_4 SO HOLD#

[16] USB30_SMI#_PCH 3 4
USB30_SMI# SMCLK WP# VSS
3 1 SMDAT USB3@MX25L512MC-12G
[16,33] PCIE_WAKE#
Q42 JTAGCK

R196 USB3@4.7K_4 TESTEN_USB USB3@DTC144EU


D D
ET-0328-21

USB30_+3.3VAUX

USB30_+3.3VAUX

USB30_+3.3VAUX
R158 USB3@6.04K/F_4 SSREXT

TP108

TP107

TP113
R165 USB3@3.01K/F_4 PEXREXT CN15 change footprint to usb-uea111uc-r14u3-7h-9p

USB30_1VL

USB30_1VL
R207 0R_4
PCH USB [14] USBN1 03/23 Jerry

PLTRST_PCIE_N_USB
R189 USB3@4.7K_4 USB30_RMTWKEN#

USB30_RMTWKEN#
[14] USBP1 R211 0R_4

1
R590 *USB3@4.7K_4 LOPWREN# R206 *0R/F_6 USB0_PWR ET-0328-22

PCIE_WAKE#_R
TESTEN_USB

USB30_SMI#
LOPWREN#
R190 USB30_+3.3VAUX USB20_DM1 R615 *USB3@0R_4 L5 1 2 USB0_FB#

COREPWRDN
OVCUR1
OVCUR2
OVCUR3
OVCUR4
USB3@4.7K_4

JTAGCK
SMDAT
SMCLK
USB20_DP1 R627 *USB3@0R_4 4 3 USB0_FB J70
1 VBUS
L CHOKE WCM2012-900T 0.4A 100MHz USB0_FB# 1
2 D-
2

1
AZ2015-01H_ESD
USB0_FB3
R212 *0R/F_6 3 D+
4
R615, R627 no stuff 0ohm D29 USB30_RX1- 5 4 GND
R207, R211 stuff 0ohm for ESD USB30_RX1+ 6 5 SSRX-

66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
U5 03/22 Jerry Jerry 0517 7
6 SSRX+
USB30_TX1- 7 GND
8 12

VSUS33

PEXRST#
PEXWAKE#
SMI#
LOPWREN#
RMTWKEN#
GPO3
VSUS33

PEXCPPE#
USBHOC1#
USBHOC2#
USBHOC3#
USBHOC4#
USBHPE1#
VSUS33
VDD
VDD

TESTEN

VDD
SMDAT
SMCLK

JTAGCK

2
USB30_TX1+ 8 SSTX- 12
USB0_PWR 9
9 SSTX+
13

11

10
13
Near PCIEx Slot U10

11

10
6 1
Z4 Z1
USB30_1VL 67 44 USB30_+3.3VAUX 5 2
VDD VSUS33 PWREN2 TP13 VB GND
68 43 1 4 3
NC USBHPE2# PWREN3 TP12 Z3 Z2 CONN DIP USB HOUSING 9P 2R FR(P2,H7.0)
69 42 1
NC USBHPE3# PWREN4 TP97
USB30_1VE 70 41 1
VCCA10SSRX1 USBHPE4# SPISO AZ1013-04S
71 40
NC SPISO SPISI U11
72 39
NC SPISI SPISCLK
USB30_+3.3VAUX 73 38 GND 9
VCCA33SS1 SPISCLK SPICS# USB30_RX1- USB30_RX1-
74 37 1 8
NC SPICS# USB30_RX1+ Z1 NC USB30_RX1+
75 36 USB30_1VL 2 7
NC VDD USB30_TX1- Z2 NC USB30_TX1-
76 35 3 6
USB30_TX1+ C184
USB30_+3.3VAUX
USB3@0.1u/16V_4 U3TXDP1 77
VCCA33SS1 USB3@VL801 VCCA33PEXTX
34 PCIE_RX5_N_C
USB30_3.3V
USB3@0.1u/16V_4 C174 USB30_TX1+ 4
Z3 NC
5 USB30_TX1+
SSTX2+ PEXTX0- PCIE_RX5_N [14] Z4 NC
USB30_TX1- C185 USB3@0.1u/16V_4 U3TXDN1 78 33 PCIE_RX5_P_C USB3@0.1u/16V_4 C172
SSTX2- PEXTX0+ PCIE_RX5_P [14]
C 79 32 USB3@RClamp0544T C
USB30_1VE VCCA10SSRX2 VCCA33PEXM USB30_3.3V
USB30_RX1+ R169 USB3@0R_4 U3RXDP1 80 31
SSRX2+ PEXRX0- PCIE_TX5_N [14]
USB30_RX1- R167 USB3@0R_4 U3RXDN1 81 30
SSRX2- PEXRX0+ PCIE_TX5_P [14]
USB30_+3.3VAUX 82 29 USB30_3.3V
USB20_DP1 VCCA33SS2 VCCA33PEXRX
83 28 CLK_PCIE_USB3_N [12]
USB20_DM1 USBHP2+ PEXCLK-
84 27 CLK_PCIE_USB3_P [12]
USBHP2- PEXCLK+
USB30_+3.3VAUX 85 26 USB30_3.3V
VCCA33SS2 VCCA33REG12 PEXREXT
USB30_1VE 86 25
SSXI VCCA10SSM PEXREXT
87 24 USB30_3.3V
SSXO SSXI VCCA33REG25
88 23 USB30_1VL
SSXO VDD
VCCA10SSRX3

VCCA10SSRX4
VCCA33SSM

VCCA33SS3

VCCA33SS3

VCCA33SS4

VCCA33SS4
VSUSUSB

ET-0329-06
USBHP3+
USBHP3-
SSREXT

SSRX3+
SSTX3+

PLTRST_PCIE_N_USB
SSRX3-

USB3@0R_4 R193 ET-0328-23


SSTX3-

PLTRST_PCIE_N [16,22,32,33,37]
GND

USB0_PWR
NC
NC

NC
NC

NC
NC

89

<sean0327> add
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

89

USB0_PWR 330u

VSUSUSB
From Motherboard
+ C708
SSREXT

C148 3V_S3 USB30_+3.3VAUX C611 PC225 C612 330u/6.3V_6357


USB30_+3.3VAUX

USB30_1VE

USB30_+3.3VAUX

USB30_+3.3VAUX

USB30_1VE

USB30_+3.3VAUX

USB30_+3.3VAUX

USB3@0.1u/16V_4 0.1u/16V_4 *10u/10V_8 0.1u/16V_4

3.3V USB30_3.3V

USB30_1VE
USBVCC port : 80 mil (0.9A)
Power sequence for Host. 1.05V
B B
USB30_+3.3VAUX USB30_3.3V Reset
USB30_1VL USB30_3V_S3 R527 USB3@0R/F_6 3V_S3
+1.05V

5V_S3 PC223 PC224


For USB Down Port USB3@0.1u/50V_6 USB3@10u/6.3V_8
USB30_5V_S3
5-20ms

50-450ms

USB30_+3.3VAUX 3.3V USB30_3.3V <SEAN0331> Y1 add Main


USB30_3V_S3
FB3 FB1 Source
ET-0328-24

USB30_+3.3VAUX USB30_1VL USB3@BLM18PG300SN1D USB3@BLM18PG300SN1D


C447 C448 C470 C458
C157 C162 X'tal 25MHz
USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4

USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4

USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4
C158 C163

USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4
C490 C483 C462 C505 C545 C465 C464 C546 C521 C547 C518 C529 C561 C159 C560 C559 R164 *USB3@0R/F_6
[12] CLKOUT_25M
USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

*USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

C149 USB@33P/50V_4 R161 USB3@0R/F_6 SSXI

1
Y1
USB3@25MHz/30PPM

2
*USB3@BLM18PG300SN1D C141 USB@33P/50V_4 SSXO
FB6
USB30_1VE USB30_1VL BG625000737/BG625000486
1.05V
FB2 FB4 XTL-5_3X3_2-3_8-1_2H
1.05V_S3 USB30_1V

USB30_3.3V USB30_+3.3VAUX USB30_1VE USB3@BLM18PG300SN1D USB3@BLM18PG300SN1D


A
C179 C176 FB5
Crystal foot print must be reserved A

C250 C262 P/N:CX11P300000 in case 25MHz clock from clock


USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4

generator is not stable enough.


*USB3@4.7uF/6.3V_6

*USB3@0.1u/16V_4

C482 C489 C496 C504 C484 C537 C461 C460 C522 C499 C478 C147 C146 USB3@BLM18PG300SN1D
SIT Reserve
USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

USB3@0.1u/16V_4

Jerry 0518 C506 C532 C562 C556


USB3@0.1u/16V_4

USB3@4.7uF/6.3V_6

USB3@0.1u/16V_4

USB3@4.7uF/6.3V_6
Quanta Computer Inc.
PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
USB3.0 VL801
Date: Monday, July 04, 2011 Sheet 36 of 48
5 4 3 2 1
5 4 3 2 1

3.3V

1n/50V_4

0.1u/16V_4
C303

C302 POW_EC1 L13


BEAD120R/2.5A
VREG3
Q22
R449
DIS@4.7K_4
26

2
DIS@2N7002W
VREG3 *10u/10V_8 C304
POW_EC2 L12 VREG3 EC_SMB_CLK_Q 3 1 EC_SMB_CLK0 [23]
BEAD120R/2.5A 3V5V_ON [39] VREG3
SPK_HWTV_EN# [29]
EC_AMP_MUTE# [29]
C305 C291 C669 C670 C663 RTC_VCC 3.3V EC_SMB_CLK_Q R448 4.7K_4
EC_TV_RVS1 [31]
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4
0.1u/16V_4 AVDD_ON [29] EC_SMB_DAT_Q R446 4.7K_4
HWTV_SM_SCL R681 4.7K_4
Cascade - GPU HWTV_SM_SDA R680 4.7K_4
EC_PWROK [16] HWTV_INT#
3.3V SLP_S4# [16]
R445
thermal OSD_ON#
R684
R701
4.7K_4
4.7K_4
D D
C289 S5_ON [38] Q19 DIS@4.7K_4 VOL+# R455 4.7K_4

2
0.1u/16V_4 DIS@2N7002W VOL-# R428 4.7K_4
RSMRST# [16]
TV_DET# R700 4.7K_4
VR_ON [40] EC_SMB_DAT_Q 3 DIS_DET#
VREG3 1 R699 4.7K_4
VGA_ON [44] EC_SMB_DAT0 [23]
FP_PWRBTN# R424 4.7K_4
S0_ON1 [38,45]
S0_ON2 [38,41,42,43,45] SCREEN_ON# R696 4.7K_4
EC_AMP_MUTE# R454 *4.7K_4
SCREEN_ON# [30]
Add RN5 R354 for LPC overshoot C292 S3_ON [38,42] HWTV_PWR_ON# R456 4.7K_4
Jerry 0516 EC_AMP_SD# R433 *4.7K_4
0.1u/16V_4
SENSE_MIC_IN# R676 *4.7K_4
HWTV_THERMAL R694 *4.7K_4

114
121

127

107
33X4-0402

11
26
50
92

74

84
83
82

56
57

19
20

99
98
97
96
95
94
93
3
RN5 U34 EC_TV_RVS1 R447 *4.7K_4
2 1 EC_LPC_LAD0 10 110 EC_SMB_CLK_Q MUTE_2673S R698 *4.7K_4

VSTBY_1
VSTBY_2
VSTBY_3
VSTBY_4
VSTBY_5

VSTBY_6

EGCLK/WUI27/GPE3
EGCS#/WUI26/GPE2
EGAD/WUI25/GPE1

KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

L80HLAT/BAO/WUI24/GPE0
L80LLAT/WUI7/GPE7

DTR1#/SBUSY/GPG1/ID7
HMOSI/GPH6/ID6
HMISO/GPH5/ID5
HSCK/GPH4/ID4
HSCE#/WUI19/GPH3/ID3
WUI18/SOUT1/GPH2/SMDATA3/ID2
WUI17/SIN1/GPH1/ID1
CLKRUN#/WUI16/GPH0/ID0
VCC

VBAT
AVCC
[16,33] LPC_LAD0 LAD0/GPM0 SMCLK0/GPB3
[16,33] LPC_LAD1 4 3 EC_LPC_LAD1 9 111 EC_SMB_DAT_Q EC_TV_RVS3 R675 *4.7K_4

SM BUS
EC_LPC_LAD2 LAD1/GPM1 SMDAT0/GPB4 HWTV_SM_SCL TV_PC_DET R682 *4.7K_4
[16,33] LPC_LAD2 6 5 8 115 HWTV_SM_SCL [31]
EC_LPC_LAD3 LAD2/GPM2 SMCLK1/GPC1 HWTV_SM_SDA
[16,33] LPC_LAD3 8 7 7 116 HWTV_SM_SDA [31]
LAD3/GPM3 SMDAT1/GPC2 3V_S5
[16,22,32,33,36] PLTRST_PCIE_N 22 117 H_PECI [7,15]
LPCRST#/WUI4/GPD2 SMCLK2/PECI/GPF6
[12] PCLK_EC 13 LPCCLK/GPM4 SMDAT2/RECIRQT#/GPF7 118 PECI_REQ# [16]
[16,33] LPC_LFRAME_N R354 33R/F_4 6 ET-0328-25 EAPD_Q R430 10K_4
LFRAME#/GPM5
85 TV_LED# [31]
PS2CLK0/TMB0/GPF0 <sean0327> screen_on# change
[33] WLAN_RF_ON 17 LPCPD#/WUI6/GPE6 PS2DAT0/TMB1/GPF1 86 SCREEN_LED# [30]
GPF1 ET-0328-26 3.3V
GATEA20_EC 126 <sean0327> remove EC
[15] GATEA20 GA20/GPB5
[15] SERIRQ D9 1N4148WS 5 89 TV_ID0 BLON/DISPON
KBSMI#_EC SERIRQ/GPM6 PS2CLK2/WUI20/GPF4 TV_ID1
[15] KBSMI# 15 90
D7 1N4148WS SCI#_EC ECSMI#/GPD4 PS2DAT2/WUI21/GPF5
[16] SCI# 23 ECSCI#/GPD3 LPC GPIO
D6 1N4148WS PCURST# 14 R459
WRST#

PS/2
D4 1N4148WS RCIN#_EC 4 1K/F_4
[15] RCIN# KBRST#/GPB6
16 PWUREQ#/BBO/GPC7
24 D12 1SS355 HWPG

[30] CIR_RX 119


GPC0
ITE8519E PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
25
28
29
VADJ [34]
MUTE_2673S [31]
AMP_VOL_PWM [29]
EC_TV_RVS3 [31]
[39] HWPG_3/5V

[42] 1.5V_PWRGD
D13 1SS355
VOL-# CPU_FAN_CTRL

C
[30] VOL-# 123 TMA0/GPB2 CIR
LQFP-128L PWM
PWM4/GPA4
PWM5/GPA5
PWM6/SSCK/GPA6
30
31
32
34
SPK_S5MIC_EN# [29]
SENSE_MIC_IN# [29] [43] VCCIO_PWRGD
R435
2
R434
0R_4
1 D10
*UMA@0R_4
1SS355
C
PWM7/RIG1#/GPA7 H_SKTOCC_N [7]
[40] IGFX _PWRGD 2 1 D15 UMA@1SS355
OSD_ON# 33 47 R707 0R_4 CPU_FAN_TACH ET-0328-27 FAN_TACH change U34.48 --> U34.47
[30] OSD_ON# GINT/CTS0#/GPD5 TACHA0/GPD6
SIT Jerry 0518 80 48 03/22 Jerry R436 DIS@0R_4
[41] 1.05V_S3_ON DAC4/DCD0#/GPJ4 TACHA1/TMA1/GPD7 TV_PC_DET [31]
VOL+# 81 2 1 D11 DIS@1SS355
[30] VOL+# DAC5/RIG0#/GPJ5 [45] VCC1.0_VGA_PG
87 120 EAPD_Q R437 DIS@0R_4
[31] HWTV_GPIO PS2CLK1/DTR0#/GPF2 TMR0/WUI2/GPC4
88 124 3VWL_ON 33 2 1 D19 DIS@1SS355
[30] PWR_LED# PS2DAT1/RTS0#/GPF3 TMR1/WUI3/GPC6 [44] dGPU_PWROK
[31] HWTV_RXD1 108 RXD/SIN0/GPB0 COM
[31] HWTV_TXD1 109 TXD/SOUT0/GPB1 ET-0328-26
VREG3 112 3.3V <sean0327>
[31] HWTV_INT# RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7
104 125 FP_PWRBTN# modify
[45] 12V_ON DSR0#/GPG6 PWRSW/GPE4 FP_PWRBTN# [30]
18 SLP_S3# [16]
RI1#/WUI0/GPD0

2
21 EC_PWRBTN_D# EC_PWRBTN_OUT# VREG3
RI2#/WUI1/GPD1 EC_PWRBTN_OUT# [10,16]
R425 WAKE UP D5 1N4148WS
35 EC_SLP# EAPD_Q 3 1
RTS1#/WUI5/GPE5 EAPD [29]
470K_6 R685 *10K/F_4

1
PCURST#
<sean0327> add Q41 2N7002 HWTV_PWR_ON# 2
C293 EAPD
R720 *0R_4
0.1u/16V_4

VREG3 2 1 Q21

3
66 HWTV_THERMAL [31] DTA124EUA
R687 *10K/F_4 ADC0/GPI0
106 67 HWTV_PWRGD [31]
8512_SCK 33R/F_4 8512_SCK_EC SSCE1#/GPG0 ADC1/GPI1
[18] 8512_SCK
R688 105
FSCK ADC2/GPI2
68 SENSE_HP_IN# [29] ET-0330-04
69 TV_DET# VREG3 VREG3
ADC3/GPI3 TV_DET# [31]
8512_SO R689 0R_4 8512_SO_EC 103 FLASH 70 HWPG
[18] 8512_SO FMISO ADC4/WUI28/GPI4
8512_SI R693 33R/F_4 8512_SI_EC 102 71 DIS_DET#
[18] 8512_SI FMOSI ADC5/DCD1#/WUI29/GPI5 DIS_DET# [23]
8512_SCE# R695 33R/F_4 8512_SCE#_EC 101 72 R702 10K_4
[18] 8512_SCE# FSCE# ADC6/DSR1#/WUI30/GPI6

1
100 A/D D/A 73 R458 10K_4 add R706 10Kohm to ACZDOUT for FDT override
SSCE0#/GPG2 ADC7/CTS1#/WUI31/GPI7 03/24 Jerry
MY0 36 FP_PWRBTN# 2
MY1 KSO0/PD0
37
MY2 KSO1/PD1
38
KSO2/PD2

2
MY3 39 76 R706 10K_4 ET-0328-28 Q18

3
KSO3/PD3 TACH2/GPJ0 ACZ_SDOUT [16]
MY4 40 KBMX 77 EC_AMP_SD# R439 DTA124EUA
KSO4/PD4 GPJ1 EC_AMP_SD# [29]
MY5 41 78 10K/F_4
KSO5/PD5 DAC2/TACH0B/GPJ2 HWTV_PWR_ON# [31]
MY6 42 79
KSO6/PD6 DAC3/TACH1B/GPJ3 BL_PWR_OFF# [34]
MY7 43

1
MY8 KSO7/PD7
44
B
MY9 KSO8/ACK# D14 RB501V-40 EC_SLP#
B
45 KSO9/BUSY
MY10 46
KSO10/PE

3
MY11 51 2 PMUX1
KSO11/ERR# CK32KE
KSI3/SLIN#
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 CLOCK 128 PMUX2


MY13 KSO12/SLCT CK32K R423
53
KSO13
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7

CONN SMD FFC 24P 1R FR (P1.0,H2.0) 2N7002


AVSS

MY14 54 R678 *10M_6 SENSE_MIC_IN# 2 100K_4


KSI4
KSI5
KSI6
KSI7

MY15 KSO14 Q20


55 Y5
MX2 KSO15
24
24 MX4 IT8519E/CX
23 1 4
58
59
60
61
62
63
64
65

1
12
27
49
91
113
122

75

23 MX1
22 2 3

1
22 MX7 AVSS_EC
21
21

1
MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

20 MX3 R457 R679


20 MX0 0R_4 *32.768KHZ/10PPM C662
19 19
18 MX6 0R_4 *10p/50V_4

2
18 MX5 VSS_EC
17
17 MY4
16
16 MY1 VREG3
15 15
14 MY3
14 MY5 C283
13
13 MY6 R? change to 0ohm--> IT8518/9
12
12 MY7
11 0.1u/16V_4 PIN 128 (CK32K)
11

2
10 MY8
10 MY9 R453 R450
9
9 MY10 *15K/F_4 *15K/F_4
8
8 MY14
7
7
6 MY11 CPU FAN 12V_HDD

1
6 MY2
5
5 MY0
4
4 MY12 12V_HDD
3 3 C7 ET-0328-29
2 MY13 unmount C5 cap and change part to meet de-rating volt TV_ID0
2 MY15 <sean0327> remove
1
1 ET-0328-30 10u/25V_12
03/22 Jerry LED TV_ID1
2

CN25
C5 *1u/16V_6 R33
JP8
3.3K/F_4

2
6 3
GND GND R452 R451
5 4
1

GND 12V CPU_FAN_SENSE *15K/F_4 *15K/F_4


SENSE 2
1 R29 330R/F_4 CPU_FAN_CTRL <sean0327> add *
A
CONTROL A

1
CONNECTOR SMD HEADER,4P,1R,MR(P1.25)
2

R31
15K/F_4
1

chang to STN FAN CPU_FAN_TACH


04/20 Jerry
2

R30
6.2K/F_4
Quanta Computer Inc.
1

PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
EC-ITE8519/FAN
Date: Monday, July 04, 2011 Sheet 37 of 48
5 4 3 2 1
1

ramp-up time for all power rails


50 us <All power rails except 5V_S5 <40 ms
100 us <5V_S5<40 ms
PL16
FBMJ3216HS480NT_1206

PQ57 VIN

PL19 AO4435
PJ1 FBMJ3216HS480NT_1206 1 8
1 2 7
2 3 6
3 5

2
4
5 2/23

0.1U/25V_6
PR274 PC241

0.1U/25V_6
PC240

4
*22U/25V_1210

*22U/25V_1210

1
0.1U/25V_6
PR195

PC246

PC245
6 PC243

PC155

PC154

PC244
PR276 200K/F_4 *0.1U/50V_6 30K/F_6
7 0.1U/25V_6
10K_4 PD7 0.1U/25V_6
8

1
9 *P4SMAJ20A
10 15V_AUX

2
POWER_JACK

2
PR275 PR194 PC148
200K/F_4
R=109kohm
820K/F_6 0.1U/25V_6

1
5V_S5 3V_S5 15V_AUX
DC IN JACK
2/23
S5
PR261
VIN 0.1W PR260 0.044W PR176
249R_8 249R/F_6 1M/F_4

VIN
Reserve fo EMI
S5_OND [46]
PR263

1M/F_4
3

3
PC9 PC95 PC189 PC181 PC153 PC222 PC220 PC190
PC234
2 2 2 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6 0.1U/25V_6
*0.01U/50V_6
PQ66 PQ39 PQ69
2N7002 2N7002 2N7002
1

1
3

PQ72
[37] S5_ON S5_ON 2 PR262

DDTC144EU 1M/F_4
1

3V_S3 5V_S3 15V_AUX


2/23

PR264
VIN 0.044W PR179 0.1W PR187
249R/F_6 249R_8 1M/F_4

S3
S3_OND [46]
PR183

1M/F_4
3

PC235
2 2 2
*0.01U/50V_6
A PQ43 PQ47 PQ73 A

2N7002 2N7002 2N7002 2/23


DELETE
1

1
3

PQ42 PQ46/PR189/PR188/PQ50/PQ52/PQ49/PR190/PR197
[37,42] S3_ON S3_ON 2 PR182 PR181/PC143
DDTC144EU 1M/F_4
1

2/23
Delete PR184/PQ45

15V_AUX
2/23
5V 3.3V 1.8V ADD 12V_HDD Discharge
12V_HDD Jerry 0518

VIN
PR267
S0_1 PR191 PR268 PR265
PR284
1M/F_4
0.1W 0.044W 0.027W *220R/F_2512
249R_8 249R/F_6 120R/F_6 S0_ON1D [46]
PR186
3

1M/F_4
3

PC236
2 2 2 2
2 *0.01U/50V_6
PQ70 PQ74 PQ71 PQ75
2N7002 2N7002 2N7002 PQ77 2N7002
*2N7002
1

1
1
3

[37,45] S0_ON1 2 PR185


PQ48
DDTC144EU 1M/F_4
1

for ACPI SMDDR_VTERM fail


Jerry 0518

2/23
S0_2 SMDDR_VTERM
15V_AUX

1.05V 0.925V_VCCSA 1.05V_VCCIO 1.5V 1V_VGA

VIN
PR161

PR170 1M/F_4
PR243 PR158 PR157 PR162 PR166 *47R/F_6
47R/F_6 47R/F_6 47R/F_6 120R/F_6 47R/F_6 S0_ON2D [46]
PR159
3

1M/F_4
3

PC118
2 2 2 2 2 2
2 *0.01U/50V_6
PQ59 PQ32 PQ31 PQ36 PQ35 PQ34
2N7002 2N7002 2N7002 2N7002 2N7002 PQ45 2N7002
*2N7002
1

1
1
3

PQ33
[37,41,42,43,45] S0_ON2 2 PR160

DDTC144EU 1M/F_4
1

Quanta Computer Inc.

www.vinafix.vn
PROJECT : QUA
Size Document Number Rev
1A
ACIN/CHARDGE/DISCHARDGE
Date: Monday, July 04, 2011 Sheet 38 of 48
1
5 4 3 2 1

D D
VREG3

2
PR238
VL
Irms=4.68A PR231 0R/F_8 Irms=4.34A
PL18 BEAD22R/6A_8
VIN_3V5V VIN_3V5V
VIN

1
2.2/J_6

10U/25V_1206

10U/25V_1206
10U/25V_1206
PC216
PC214

2200P/50V_4
2

2
*100U/25V_6358
PC209 PC197 PC202 PR236 PC207 PC199

PC247
PC192 2200P/50V_4 0.1U/25V_4

4.7U/6.3V_6

PC200
+ 560K/F_4

PC212

PC206

PC203
0.1U/25V_4
0.1U/25V_4
1

1
4.7U/6.3V_6
10U/25V_1206 10U/25V_1206 PC210

5
6
7
8
0.1U/50V_6
Ven=4.2V
PC211

8
7
6
5

0.1U/10V_4
PR234 4 PQ30
150K/F_4 SI4128DY
4

16

17
8

3
C Reserve PC247 for 3/5V MLCC noise C
PQ28 Del PR239
03/24

REF
VIN

VREG3

VREG5
SI4128DY Del PR230 13 4

3
2
1
EN0 TONSEL 3V_AUX
5V_UG 3V_UG
21 10 TDC:11A

1
2
3
5V_AUX PC201 UGATE1 UGATE2
PR223
PL10
5V_BOOT 22
BOOT1 BOOT2
9 3V_BOOT
PL13 OCP=16.5A
1R_6 PR237 1R_6 PC215 0.1U/50V_6
2.2UH/7.5A 0.1U/50V_6 2.2UH/7.5A f=500kHz
5V_AUX 5V_PHASE 20
PHASE1 PHASE2
11 3V_PHASE 3V_AUX
IL=1.67A
5V_LG 3V_LG
TDC:10.8A 19
LGATE1 LGATE2
12

8
7
6
5
PR147

5
6
7
8
OCP=16A
330U/6.3V_6358

1.5R/F_1206 5V_AUX 24

ENTRIP1

ENTRIP2

SKIPSEL
VOUT1
PC193

330U/6.3V_6358
+ 5V_FB 2 7 3V_AUX PR155
f=400kHz FB1 OUT2

*1000P/16V_4

10U/6.3V_6

PC115
0.1U/25V_4
PC187 PC188 PQ27 4 1R/F_1206 +

GND
GND
ENC

*1000P/16V_4
6.49K/F_4
10U/6.3V_6 0.1U/25V_4 23 5 Del PR240 4 PQ29
IL=2.84A PGOOD FB2

PC205

PR228

PC218
SI4134DY

PC219
2200P/50V_4
PC213
6.65K/F_4
PC107

3V_FB
SI4134DY

18

14
25
15
2200P/50V_4
PC208

PR235

PC217
1500P/50V_4 PU13
Del PR225 RT8223PZQW PC111

150K/F_4

180K/F_4
2200P/50V_4 ESR=17mohm

1
2
3
B
V=1.67*17=28.4mV B

3
2
1
Vref=2V Vref=2V

4.32K/F_4
PR229

10.2K/F_4
ESR=8mohm

PR233
V=2.84*17=48.3mV R(Ilim)=( Ilim(17.6A)-1.67A/2 )*17.5(ohm)*10/10u

PR227

PR232
Rds(on)=17.5ohm Rds(on)=21ohm =293K (ohm) --->294Kohm (PR232)
3V_AUX
R(Ilim)=( Ilim(16A)-2.84A/2 )*17.5(ohm)*10/10u
=255K (ohm) --->267Kohm (PR227)
PR224
*100K/F_4
PR226 0R_4
[37] HWPG_3/5V 3V5V_ON [37]

A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
SYSTEM 5V/3V (RT8223P)
Date: Monday, July 04, 2011 Sheet 39 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

VIN
CPU_PWR_SRC
22Oohm,6A PL2
PC70
PR86 10R/F_4 3300P/50V_4 PUT COLSE
1.05V_VCCIO
TO VCORE 22Oohm,6A PL1
Phase 1 PC162 PC163 PC161 PC160 PC15

*220U/25V_R6
PR84 1.21K/F_4 PR74 Inductor

8V_CORE

PC18
2200P/50V_4

0.1U/50V_6
100K/NTC +

10U/25V_1206

10U/25V_1206

10U/25V_1206
PR71 PR67 PR70
110R/F_4 *75R/F_4 54.9/F_4 PR85 24.9K/F_4

TRBST

RJK03B9DPA
PC69
3300P/50V_4 3300P to 2200P for PR96 PR95
H_VIDSOUT_VR 48.7K/F_4 82.5K/F_4 PD3
[7] H_VIDSOUT_VR Vcore compensation

PQ3
H_VIDALERT_N_VR_R PR61 49.9K/F_6 RB500V-40 PR45 2.2R/F_8 4
[7] H_VIDALERT_N_VR
[7] H_VIDSCK_VR
H_VIDSCK_VR
PR98 PC50
CSP1 65A

1
2
3
24.9/F_4 PC68 22P/50V_4 PC179
3300P/50V_4 PR77 49.9K/F_6
PR3
2R_6
PC4
0.22U/25V_6 OCP~114A
CSP2 1 2 PL5
330P/50V_4 PR97 PC61 0.3uH/APL11T08PM-43A
D 3.01K/F_4 2200P/50V_4 D
CPU_CORE

DIFFOUT
PUT COLSE TO CPU PC60 *330P/50V_4 PR72 49.9K/F_6
CSP3 1 8 HG1
PR108 1K/F_4 BST HG
COMP VR1_PWM1 2 7 SW1
SW

5
PWM
PR219 100R/F_6 PR83 23.2K/F_4 for Vcore OCP~114A(32.4K) PR19 PC195 PC56

PQ9

PQ11
RJK0392DPA

RJK0392DPA
DRON PR205 49.9R/F_4 3
GND 6 1R/F_1206 PC57 PC59

1
PR87 0R_4 EN

820U/2.5V_R6_7
CSCOMP 4 LG1 PR211 PR212 + + +

0.1U/50V_6
4 4

820U/2.5V_R6_7

820U/2.5V_R6_7
[7] VSS_SENSE 12V_HDD VCC LG 5
*SHORT_4 *SHORT_4

DROOP
PC51 CSSUM CSN2 PR6

1
2
3

1
2
3

2
PR88 0R_4 *1000P/50V_4 2.2R_6 PU3 PC11
CSN1 PC47 PC7 NCP5901DR2G 1000P/50V_4
[7] VCC_SENSE
PR94 10R/F_4 1U/16V_6

TRBST
PR218 100R/F_6 VR1_CSREF CSN2

CSN1
CSP1
FB
CPU_CORE PR76 10R/F_4 0.1U/10V_4

IMON
CSN3 CSP2
PR80 10R/F_4
PC52 PR73 5.1K/F_4 Add PC56
1000P/50V_4
1.05V_VCCIO CSN3 Rds(on): 3.5mohm For Vocre transient

53
52
51
50
49
48
47
46
45
44
43
42
41
40
PC46 CPU_PWR_SRC
PU6

DIFFOUT

TRBST

IOUT
CSREF
NC2
NC1
ILIM

CSSUM
EPAD

VSN

FB
COMP

DROOP
CSCOMP

8V_CORE
PR75 NCP6131S52MNR2G
75R/F_4 0.1U/10V_4
1 39 CSN2 CSP3
TSENSE VSP CSN2 CSPP2
2 38
TSENSE CSP2 CSN3 PR69 5.1K/F_4
3 37
VRHOT# CSN3

5
[7] VR_HOT#

RJK03B9DPA
H_VIDSOUT_VR 4 36 CSPP3 PD2 PC167 PC166 PC14 PC158 PC159
H_VIDSCK_VR SDIO CSP3 CSN1 CSN1

10U/25V_1206

10U/25V_1206

10U/25V_1206
5 35 RB500V-40
H_VIDALERT_N_VR SCLK CSN1 CSPP1
6 34

2200P/50V_4

0.1U/50V_6
ALERT# CSP1

PQ2
IMVP_PWRGD 7 33 DRON PC40 PR1 PC2 PR42 2.2R/F_8 4
PR58 0R_4 IGFX _PWRGD VR_RDY DRON VR1_PWM1 2R_6 0.22U/25V_6
8 32
VR_RDYA PWM1/ADDR VR1_PWM3
9 31 1 2

1
2
3
[37] VR_ON 6131_VCC ENABLE PWM3/VBOOT VR1_PWM2 0.1U/10V_4
10 30
PR53 10K/F_411 VCC PWM2/ISHED PR55 60.4K/F_4 CSP1
5V ROSC IMAX
29
PR54 2.2R/F_6 12 28
CPU_PWR_SRC VRMP PWMA/IMAXA

CSCOMPA
DIFFOUTA
TSENSEA 13 27 VR1_PWMA PR64 5.1K/F_4 1 8 HG2 PL4

DROOPA

CSSUMA
TSENSEA VBOOTA BST HG

TRBSTA
COMPA
PR46 1K/F_4 0.3uH/APL11T08PM-43A

IOUTA

CSNA
VSNA

CSPA
VSPA

ILIMA
PC38 PC37 PR60 PR59 VR1_PWM2 2 7 SW2
CPU_CORE

FBA
PWM SW
1U/6.3V_4 0.01U/25V_4 10K/F_4 10K/F_4
PR56 DRON PR204 49.9R/F_4 3
EN GND 6

PR190
DIS@0R_4
PR50 UMA@28K/F_4
14
15
16
17
18
19
20
21
22
23
24
25
26
4 LG2 PR20
12V_HDD VCC LG 5

5
UMA@10K/F_4
PR5 1R/F_1206

PQ8

PQ10
RJK0392DPA

RJK0392DPA
PC191 PC74 PC73 PC54

1
DROOPA
2.2R_6 PU2
PR184 + + +
TRBSTA PC6 NCP5901DR2G 4 4 PR209 PR210

820U/2.5V_R6_7

820U/2.5V_R6_7

*820U/2.5V_R6_7
IMONA
*SHORT_4 *SHORT_4

0.1U/50V_6
<SEAN0331> mount 5V Vaxg loadline(16.2K) 1U/16V_6
C 3.3V PC12 C
Vaxg RC match(1500P)

1
2
3

1
2
3

2
PR63 CSNA 1000P/50V_4
10K/F_4 DIS@0R_4 PC32
IMVP_PWRGD CSPPA CSNA
[16] IMVP_PWRGD

CSN2
CSP2
CSSUMA CSPA UMA@0.1U/10V_4
3.3V Vaxg OCP~53A(30.9K)

PR279
CSCOMPA CSPA

DIS@0R_4
PR62 PC27 UMA@3300P/50V_4 PR35
*10K/F_4 UMA@24.9K/F_6
IGFX _PWRGD PR38 UMA@33.2K/F_4 PR36 UMA@6.98K/F_4 Rds(on): 3.5mohm
[37] IGFX _PWRGD PC143 UMA@680P/50V_4
PR221 UMA@100R/F_6 COMPA

PR197
DIS@0R_4
PR206
DIFFOUTA UMA@48.7K/F_4 PR37
PR34 UMA@0R_4 UMA@82.5K/F_4
PC28 UMA@39P/50V_4 UMA@10R/F_4
[7] VSSAXG_SENSE
PR32
PC34 PR66
PR33 UMA@0R_4 UMA@1000P/50V_4 PR41 UMA@1K/F_4 UMA@100K/NTC

8V_CORE
CPU_PWR_SRC
[7] VCCAXG_SENSE
PR220 UMA@100R/F_6 FBA PC17 UMA@39P/50V_4
CPU_AXG PUT COLSE
DIS@0R_4

PR11 UMA@3.01K/F_4
TO V_GT
PR280

PD1 PC157 PC156 PC165 PC13 PC164

RJK03B9DPA
Inductor

10U/25V_1206
RB500V-40

2200P/50V_4
PC16 UMA@3300P/50V_4

0.1U/50V_6

10U/25V_1206

10U/25V_1206
PUT COLSE

PQ1
PR2 PC3 PR39 2.2R/F_8 4
TO CPU 2R_6 0.22U/25V_6
1 2

1
2
3
PR188
PR18 PC21 UMA@3300P/50V_4
1 8 HG3 PL3
BST HG
0.3uH/APL11T08PM-43A
UMA@10R/F_4 DIS@0R_4 VR1_PWM3 2 7 SW3
PR189 PWM SW CPU_CORE
PR28 UMA@1.21K/F_4
DRON PR203 49.9R/F_4 3
EN GND 6
PR16

5
TRBSTA

PR24 UMA@24.9K/F_4 4 LG3


DIS@0R_4 12V_HDD VCC LG 5 1R/F_1206

PQ7

PQ6
RJK0392DPA

RJK0392DPA
PC25 PC186
PR4
UMA@3300P/50V_4 PC55 PC78 PC53

1
2.2R_6 PU1 4 4
PC5 NCP5901DR2G PR213 PR214 + + +

0.1U/50V_6

820U/2.5V_R6_7
*820U/2.5V_R6_7

*820U/2.5V_R6_7
1U/16V_6 *SHORT_4 *SHORT_4

1
2
3

1
2
3
PC10

2
1000P/50V_4
1.5K/F_4 PC75 10R/F_4 PC67
PR109 1500P/50V_4 PR82 470P/50V_4
B CSCOMP VR1_CSREF B

CSN3
CSP3
TSENSEA TSENSE

PR110 4.7K/F_4 PR107 20K/F_4

PC35 Rds(on): 3.5mohm


0.1U/10V_4
PC48
DROOP
DIS@0R_4

0.1U/10V_4
PR283

PR43 3.3K to 4.7K for Vcore DVID


UMA@8.25K/F_4 PR22 PR79 PR9
UMA@100K/NTC 8.25K/F_4 100K/NTC

PR25
UMA@1.5K/F_4
PC29
UMA@1000P/50V-4
PR26 PC20
UMA@10R/F_4 UMA@470P/50V_4
PR47
UMA@10R/F_4
CPU_PWR_SRC
IGPU Power
PUT COLSE CSCOMPA CSNA

8V_CORE
TO V_GT PUT COLSE
HOT SPOT TO VCORE PR40 UMA@7.15K/F_4 PR27 UMA@13K/F_4 PC169 PC168 PC170 PC171 PC172

HOT SPOT

UMA@2200P/50V_4

UMA@10U/25V_1206

UMA@10U/25V_1206

UMA@10U/25V_1206
UMA@0.1U/50V_6
PD5
DROOPA

PC33 UMA@RB500V-40

5
UMA@RJK03B9DPA

UMA@RJK03B9DPA
UMA@1500P/50V_4
DIS@0R_4
PR282

PR207 PC173

PQ5

PQ4
IMON IMONA UMA@2R_6 UMA@0.22U/25V_6 PR29 4 4
1 2
UMA@2.2R/F_8
35A

1
2
3

1
2
3
PR81 PC66 PR17 PC24
OCP~53A
DIS@0R_4

23.7K/F_4 0.1U/10V_4 UMA@24.3K/F_4 UMA@0.1U/10V_4


PR281

1 8 HGA PL6
BST HG
UMA@0.5UH/APL11T08PCM-42A
VR1_PWMA 2 7 SWA
CPU_AXG
PWM SW
DRON PR208 UMA@9.9R/F_43
EN GND 6
PR52
4 LGA PC49 PC72 PC84 PC65 PC83
12V_HDD VCC LG 5 UMA@1R/F_1206

1
PR216

PQ13

PQ12

UMA@0.1U/50V_6
+ + + +

UMA@820U/2.5V_R6_7

UMA@820U/2.5V_R6_7

UMA@820U/2.5V_R6_7
*UMA@820U/2.5V_R6_7
UMA@RJK0392DPA

UMA@RJK0392DPA
UMA@2.2R_6 PU12
PC174 UMA@NCP5901DR2G 4 4 PR215 PR217

2
<sean0327> change *DIS@ --> UMA@1U/16V_6 *SHORT_4 *SHORT_4
12V_HDD PU4 UMA@ PC39

1
2
3

1
2
3
8V_CORE UMA@1000P/50V_4
GND/ADJ

3 4 PR10 0R/F_8
VIN VOUT

CSNA
CSPA
A A

APL1117UC
1

PC1
Rds(on): 3.5mohm PC72:Unmount
10U/25V_1206 2/23
PR8 121R/F_6

R1

PR7 PC8
R2 665R/F_6 10U/25V_1206

Quanta Computer Inc.


Vout = 1.25V*{(R1+R2)/R1}
PROJECT : QUA
Size Document Number Rev
1A
CPU_NCP6131_CONTROLLER
Date: Monday, July 04, 2011 Sheet 40 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

VCC1.05 FOR PCH


1.5V_S3

5V_AUX 3V_AUX 12V_HDD

D D

10U/6.3V_6

10U/6.3V_6
PC137
0.1U/25V_6
Remove PQ64

PC140

PC229
PR178 PR255
PC230
10K/F_6 32.4K/F_6 Jerry 0603
0.01U/25V_4

5
8
3 +
1 4
2 - PQ37

1
2
3
3
PU11A NTMFS4926NT1G

4
PC232 LM358A

3
PR256
2 PR254
PR180 15K/F_6
S0_ON2 S0_ON2_D 2 PC135 1K/F_6

0.1U/25V_6
[37,38,42,43,45] S0_ON2
PQ67
0R/F_6
PQ40 2N7002
47P/50V_6
1

1
PC142 1.05V
DDTC144EU 1.05V
0.1U/25V_6
PR252 TDC=5.5A
2/23
0R/F_6 2.5W

390U/2.5V_R6_10
PC132
PC130 +
PC125
PC133

10U/6.3V_6

2
0.1U/25V_6

PC127
100P/50V_6 0.01U/25V_4
Vout =3.3(15/32.4+15)=1.044V

C C

3V_AUX

5V_AUX 3V_AUX

VCCPLL

10U/6.3V_6

10U/6.3V_6
PC141
0.1U/25V_6

PC138

PC139
PR177 PR257
10K/F_6 12.1K/F_6
Remove PQ65

5
Jerry 0603
5 +
7 4
6 - PQ38

1
2
3
3

PU11B NTMFS4926NT1G
PC233 LM358A
3

PR259
2 PR173
S0_ON2 2 15K/F_6 PC136 1K/F_6
0.1U/25V_6

PQ68 1.8V
PQ41 2N7002 TDC=4.1A
47P/50V_6
1

1.8V
DDTC144EU 3.6W
PR253

2/23 0R/F_6
PC131
PC128
1

PC129 PC126
PC134 +
390U/2.5V_R6_10
0.1U/25V_6

100P/50V_6 0.01U/25V_4
10U/6.3V_6

Vout =3.3(15/27.1)=1.82V
2

B B

C stage VIN 1.05V_S3

1.5V_S3

PR251
47R/F_6
PR181
PU15

3
1M/F_4
APL5920
10U/6.3V_8

0.1U/10V_4

3 5 2
PC255

PC253

VIN NC
PQ76
2N7002
0.23A

1
6 1.05V_S3
VOUT

3
PR133 0R_4
2 PQ46
10U/6.3V_8

[37] 1.05V_S3_ON
10U/6.3V_8

0.1U/10V_4

EN PR171
[37] 1.05V_S3_ON 2
PC259

PC257

PC258

5V_AUX 4 8
VDD GND DDTC144EU 1M/F_4
ADJ

PC256 1 9
1U/6.3V_4

1
PGOOD GND1
1

*0.1U/10V_4
PC260

Power VIN=1.5V
2

R1 PR132 Vout=1.05V
A A

Load current=0.23A
10K/F_6
Pd=0.103W
PR131
R2 32K/F_6

VO=(0.8(R1+R2)/R2)
R2<120Kohm

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
VCC1.8/VCC1.05
Date: Monday, July 04, 2011 Sheet 41 of 48
5 4 3 2 1
5 4 3 2 1

SMDDR_VTERM
TDC : 1A
SMDDR_VTERM

*0.1U/16V_4
D D

1
PC44
PC45 PC43
10U/6.3V_6 10U/6.3V_6

2
From 1.5V_S1 TO 1.5V_S3 PL17
Jerry 0518 VIN_DDR VIN
1.5V_S3 22Oohm,6A

10U/25V_1206
Irms=4.8A

10U/25V_1206

10U/25V_1206
2200P/50V_4
25
PC42

0.1U/25V_6
5

RJK03B9DPA
2.2U/6.3V_6

PC176

PC178

PC180
1 24

PC177
PC175
GND
VTTGND VTT

PQ17
Del PR103 TDC:18A
for ACPI SMDDR_VTERM fail
2 VTTSNS VLDOIN 23 4 OCP=27A
Jerry 0518 PR49 PR68
PC41 f=400kHz

1
2
3
0R_4
3 GND VBST 22 DDR_VBST
2.2R/F_4
IL=3.47A
0.1U/25V_4
C 1.5V_S3 4 21 DRVH C
*0R_4 MODE DRVH PL7
PR44 1UH/APL1108P-35A
5 20 DDR_LL 1.5V_S3
VREF_DDR_S0 PR48 0R_4 VTTREF LL 1.5V_S3

6 19 DRVL
COMP DRVL
1

RJK03D3DPA
PR104

10U/6.3V_6

0.1U/25V_4
1
PC31

PQ18

PC88
2200P/50V_4
1R/F_1206

330U/6.3V_6358

*330U/6.3V_6358
PC85

PC82
0.033U/16V_4

PC254
7 18 Del PR93 + +
2

NC PGND

PC86
4

1000P/50V_4

2
*100P/50V_4
PC71

10.2K/F_4

PC26
PR21
8 17

1
2
3
PR12 VDDQSNS CS_GND
*0R_4 PR57
DDR_V5FILT 9 16 DDR_CS
VDDQSET CS
11.8K/F_4
PR14 0R_4
S3 10 15 DDR_V5IN
RDS(on)=4.7mohm
[37,38,41,43,45] S0_ON2 S3 V5IN

PR51
1

*0.1U/16V_4

S5 DDR_V5FILT For EA 1.5V_S3 Power noise Low issue


PC23

11 S5 V5FILT 14 5V_AUX Jerry 0603


5.1R_6
PR30
2

1
13 1.5V_PWRGD

10K/F_4
12 PC30
NC PGOOD 3V_AUX PC36

PR15
B 100K/F_4 B
1U/6.3V_4 1U/6.3V_4

2
PR13 0R_4 PU5
[37,38,41] S3_ON RT8207LZQW

1.5V_PWRGD [37]
1

1 2 PR23
PC22
PD4 *1SS355 620K/F_4
*0.1U/16V_4
2

VIN_DDR

PR31 Vout=0.75*(1+10/10)=1.5V
DDR_COMP
0R_4

A A
ESR=7mohm
V=3.47*7=24.3mV
Quanta Computer Inc.
R(Ilim)=( Ilim(27A)-3.47A/2 )*4.7(ohm)/10u
=11.86K (ohm) --->11.8K (ohm)(PR57) PROJECT : QUA
Size Document Number Rev
1A
1.5VSUS(RT8207A)/SMDDR_VTERM
Date: Monday, July 04, 2011 Sheet 42 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

3V_S5
G0 H L
FOR POR 1.05 (VCCIO_SEL=H)
VCCIO FOR CPU PR116
10K/F_4
Vout 1.05V 1V

PR114
PR115 *4.7K_4 VTT_SEL [9] VIN
*0R_4
D PR128 Irms=5.02A PL9 22Oohm,6A D
PR120
5V_S5
10R/F_6 *360K/F_4

PC183
2200P/50V_4

0.1U/25V_4

10U/25V_1206

10U/25V_1206

10U/25V_1206
8240_VCC

RJK03B9DPA
PC92

PC96
PC184

PC185

PC182
8240_G0
3V_S5 1U/6.3V_4 PC97

0.1U/25V_4
PQ22
4

PR119

11
Del PR132

1
2
3
5
10K/F_4
3 8240_HG

VCC

G0
PR117 UGATE 1.05V_VCCIO
8240_ILIM 10 PC91
CS 8240_BST PR127
124K/F_4 BOOT 4
2R_6 PL8
[37] VCCIO_PWRGD PR118 0R_4 8240_PG 9 0.1U/25V_4 1UH/APL1108P-35A
PGOOD 8240_LX
PHASE 2
[37,38,41,42,45] S0_ON2 PR123 0R_4 8240_EN 8 EN 8240_LG PC98 PC99
LGATE 1

1
RGND

VOUT
PC90 PR113
Fix Vout=1.05V

GND

*10U/6.3V_6
RJK03D3DPA
PQ21
*0.1U/16V_4 13 1R/F_1206 + +

820U/2.5V_R6_7

820U/2.5V_R6_7
PAD PC101

PC100
2200P/50V_4
2

PC94
Del PR131 4 TDC=17.4A

0.1U/10V_4
12

2
RT8240BGQW
PU8 PC89 PR130 f=400KHz
IL=2.49A

1
2
3
8240_VOUT
1000P/50V_4 100R_4
OCP=26A
PC93
PR121
5V_S5
*0R_4
*100P/50V_4
Rds(on): 4.7mohm
C C
CPU:unmount,PR140:mount,VSSP_Sense璶璶GND PR129
CPU:mount,PR140:open
0R_4
PR126

VTT_SENSE+ [7]
PR125
*10K/F_4
0R_4

PR124
VTT_SENSE- [7] ESR=3.5 mohm
0R_4 V=2.49*3.5=8.72mV
PR122
100R_4 R(Ilim)=( Ilim(26)-2.49/2)*(4.7*8)/10
=93K (ohm)--->124K (ohm)(PR117)

VCCSA FOR CPU 1.05V_VCCIO

12V_HDD

3.3V 3V_AUX 12V_HDD

10U/6.3V_6

0.1U/50V_6
*10U/6.3V_6

8
B B

PC81

PC80
PC79
3 +
1
2 -
EN:Low PU7A
PR91 PC58 LM358A

4
Vout=3.3*(8.25/21+8.25)=0.925V PR65 PR78 21K/F_6
0.01U/25V_4

5
10K/F_6 10K/F_6
PR102 PR90 PQ19
5 + AOL1448
10K/F_6 7 4
64.9K/F_6
6 -
PU7B

1
2
3
3

LM358A
3

PR100 PR89 1K/F_6 PR92


[7] VR_PVCCUSA_SEL 2 2 2 PC62 PR105
8.25K/F_6 PC63
0R_4 0.1U/50V_6
1K/F_6 TDC=8.8A
1

PQ14 PQ15 PQ16


PR99 MMBT3904 MMBT3904 2N7002 47P/50V_6
1

1K/F_4
PR101
0.925V_VCCSA 0.925V_VCCSA
100R_4
PC87

0.01U/25V_4
10U/6.3V_6
3V_AUX +
PR106

PC76
820U/2.5V_R6_7

PC77
[7] VCCSA_SENSE 1 2 PC64
100P/50V_6
Lo = 0.925V
2
0R/F_6
PR298
3

10K/F_6
A A

2
3

PQ80
1

METR5213-G
[37,38,41,42,45] S0_ON2 2

PQ79 Quanta Computer Inc.


1

METR5213-G 2/23
PROJECT : QUA

www.vinafix.vn
ADD PR298/PQ79/PQ80
Size Document Number Rev
1A
VCCIO(RT8240B)/VCCSA
Date: Monday, July 04, 2011 Sheet 43 of 48
5 4 3 2 1
5 4 3 2 1

VGA Core
D D

5V_S3 Irms=2.62A
VIN
PD6
DIS@RB501V-40
PR134 PL11 DIS@22Oohm,6A
2 1 8208_BST
DIS@10R/F_6

8208_VDD
PC102

DIS@2200P/50V_4

DIS@0.1U/50V_6

DIS@0.1U/50V_6
PC106

DIS@10U/25V_1206

DIS@10U/25V_1206
3.3V DIS@1U/10V_4 DIS@1U/10V_4 PC105

PC194

PC196

PC110
DIS@0.1U/25V_4

PC198

PC204
PR144
8208_BST 1 2 8208_BST_1
DIS@0R/F_6

DIS@RJK03B9DPA
PQ26
PR135 Del PR153

13
2

9
C *DIS@10K/F_4 C
PR146
8208_CS 10 12 8208_DH 4

BST
VDDP
VDD
CS DH VGA_CORE
DIS@9.76K/F_4
Vout=1V

1
2
3
PR136 DIS@0R/F_4 8208_PG 8208_LX PL12
[37] dGPU_PWROK 4 PGOOD PHASE 11
DIS@1UH/APL1108P-35A
PR142 DIS@0R/F_4 8208_EN 15 16 8208_TON
PR145 DIS@232K/F_4 TDC:12A
[37] VGA_ON EN/DEM TON
OCP=21.5A
17 8 8208_DL
PAD DL f=300kHz

VOUT
PC117 PC116

DIS@10U/10V_8
*DIS@10U/6.3V_6
5

1
DIS@RJK03D3DPA
PC104 8208_D1 PR151

DIS@0.1U/16V_4
14 5

G0

D0
FB
G1 D1 IL=2.64A

PQ25

PC113

PC114

PC112
*DIS@0.22U/10V_4 Del PR148 + +

DIS@820U/2.5V_R6_7
*DIS@1R/F_1206

*DIS@820U/2.5V_R6_7
8208_G1

6
PR139 4

2
PU9 *DIS@30K/F_4
PR140

*DIS@2200P/50V_4

1
2
3
DIS@ RT8208AGQW 8208_D0

PC108
*DIS@30K/F_4 PC109

8208_G0
*DIS@1000P/50V_4
PR141 8208_FB
3V_S5
*DIS@10K/F_4 3V_S5 PR138
B PR137 DIS@3.57K/F_4 B

DIS@10K/F_4 Rdson=4.7mohm
3

PC103 *DIS@100P/50V_4
PR143 unmount
*DIS@10K/F_4 ESR=7mohm
[23] GFX_CORE_CNTRL0 2 V=2.64*3.5=9.3mV
PQ23
*DIS@2N7002 Vo=0.75(R1+R2)/R2
OCP
1

=Current limit + Iripple/2


3

PVT
=(9.76K*10uA/4.7m)+(3.16A/2)=22A
2 PQ24
[23] GFX_CORE_CNTRL1
*DIS@2N7002
1

A A

Quanta Computer Inc.


PROJECT : QUA
Size Document Number Rev
1A
VGA_CORE(RT8208A)
Date: Monday, July 04, 2011 Sheet 44 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

5V_AUX

VCC12 FOR HDD

2
Irms=0.38A VIN
PD8
BAT54C PL14 22Oohm,6A

D 5V_AUX D

10U/25V_1206

10U/25V_1206

2200P/50V_4

0.1U/25V_4
PC238 +

PC251
*100U/25V
PC151

PC250
0.1U/16V_6

PC249

PC248
5
6
7
8
PR270
2.2R/F_8 PR202
0R/F_8
1 2 4 PQ54
SI4128DY
PC237
1U/6.3V_6
2/23
Add PC250/PC251/PC248/PC249

3
2
1
1587_BST
5V_AUX High:ENABLE

1587_TG
Low:DISABLE

5
PU14 12V_HDD
PR199 1587_EN 7 1 PL15

VCC
COMP/DIS BST 10UH/MSCDRI-4.4A
10K/F_4 TG 2
PR273 8 1587_PHASE
PHASE
3

3.3K/F_4 TDC=0.78A

100P/50V_4
PC239

GND
f=275KHz

100U/16V_R6_6
10U/25V_1206
1587_FB

*10U/25V_1206
6 4

2200P/50V_4
FB BG PR201 + IL=1.75A

1587_BG
2

PC147

PC145
5
6
7
8
PC242 NCP1587DR2G

PC252
1R/F_1206 OCP=10A

PC146
Del PR196
3

PQ56 0.22U/25V_6 PR272 PR271


2N7002 160R_6 2.26K/F_6 4 PQ53
1

[37] 12V_ON 2 SI4128DY

2200P/50V_4
PC152
PQ55 PR269

2200P/50V_4
1

DDTC144EU Rset

PC150
C 19.1K/F_4 C
2/23

3
2
1
Rds=30mohm(max) ESR=6 mohm
V=1.75*6=10.5mV
R(Ilim)=Ilim(10)*30(mohm)/10u
VO=0.8(1+2260/160)=12V =30k (ohm)--->19.1k (ohm) (PR269)

B B

VCC1.0_VGA
3V_AUX

5V_AUX
PU10 2A PR168
PC122 *DIS@100K/F_4 1V_VGA
DIS@APL5920KAI
DIS@0.1U/25V_6
4 VCNTL POK 1 VCC1.0_VGA_PG [37]

[37,38,41,42,43] S0_ON2 PR169 DIS@0R_4 VCC1.0_VGA_EN 2 6


EN VOUT

1.5V_S3 3 VIN
8 GND 1V
PC123 9 5
FB

GND NC PR165
TDC=1A
PC120 PC121 PC119 0.5W
DIS@3.83K/F_6
7

*DIS@0.1U/25V_6 PC124
VCC01.0_VGA_FB DIS@10U/6.3V_8 DIS@10U/6.3V_8 DIS@0.1U/25V_6
DIS@10U/6.3V_8

PR164

DIS@15K/F_6

A A

Vout=0.8(1+3.83/15)=1V
<sean0327> add DIS@

Quanta Computer Inc.


PROJECT : QUA

5 4
www.vinafix.vn 3 2
Size

Date:
Document Number
VCC12(NCP1587)/VCC1.0_VGA
Monday, July 04, 2011
1
Sheet 45 of 48
Rev
1A
5 4 3 2 1

S5 3/21
PQ63
AO6402A
5V_S5
S0 AMP/TV
6
5
2
4 0.001A
5V_AUX 5V_AUX
1
D D
5V_AUX

3
5V_AMP

5
6
7
8
PR258
PR172 0R_4
[38] S5_OND PR266
[38] S0_ON1D S0_ON1D 4 PR175 0R_1206

*2200P/50V_4
0R_4 0R_4 PQ44 3.2A
PR174 0R_1206

PC231
SI4128DY

*2200P/50V_4
PC144

3
2
1
Dont Concern
Timing 5V

3.4A
PQ61 3V_S5
AO6402A Dont Concern
6
Timing
5V_AMP 5V_TV
5
2
4 0.107A
3V_AUX
C 1 3V_AUX C
PR192 0R_1206
2A
3

PR200 0R/F_6
PR245

5
6
7
8
S5_OND
PR244
S0_ON1D
*2200P/50V_4

0R_4 4 PQ60
0R_4
PC227

SI4128DY

*2200P/50V_4
PC226

3
2
1
3.3V
5V_AUX
S3 4A
VGA
5
6
7
8

1.5V 1.5V_VGA

PR193
[38] S3_OND S3_OND 4 PR249 0R_1206
B 0R_4 PQ51 B

SI4128DY PR248 0R_1206


4A
*2200P/50V_4

1.5V_S3
PC149

PR246 0R/F_6
3
2
1

5V_S3

5
6
7
8
3.6A S0_ON2D
PR247
4 PQ62
[38] S0_ON2D
0R_4 1.8V 1.8V_VGA
SI4134DY

*2200P/50V_4
PC228
PR167 0R_1206
Dont Concern PQ58 3V_S3

3
2
1
AO6402A
Timing PR163 0R/F_6

6
2.2A
1.5V
5
2
4 0.37A
3V_AUX
1

4A
3

A A
PR242
S3_OND
*2200P/50V_4

0R_4 Quanta Computer Inc.


PC221

PROJECT : QUA
Size Document Number Rev
1A
LOAD SWITCH
Date: Monday, July 04, 2011 Sheet 46 of 48
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

ET Change List
Item Page Reason Detail

ET-0325-01 15 SATA3GP Pull up 10kohm for reserve Add R704 for reserve
ET-0325-02 16 SCI# change to GPIO12 request from BIOS GPIO53 change to GPIO12 for SCI#
ET-0325-03 23 AUD0, AUD1 strap pin pull high for HDMI display Stuff R133, R134 10Kohm
ET-0325-04 23 VGA_TMDSB_HOT_PLUG short to 3V_VGA Remove 3V_VGA on VGA_TMDSB_HOT_PLUG
ET-0325-05 23 Add 0ohm for VGA_TMDSA_DDC_CLK & VGA_TMDSA_DDC_CLK R710, R711 for reserve
ET-0325-06 28 Change footprint for SMT issue J71 footprint to usb-020173gr004s417zl-4p-r

D ET-0325-07 28 Add HCB1608KF-471T10/0.2ohm * 2 22P/50V_4 * 2 for EMI Add L36, L38, C693, C694 D

ET-0325-08 28 F6 change to 0.5 A from 1.1A for Camera fit F6 change to 0.5A from 1.1A
ET-0325-09 28 C294 change to 330uF from 470uf C294 change to 330uF from 470uf
ET-0325-10 28 Add 4.7uF for touch moudle Add C674 4.7uF
ET-0325-11 29 Add 1k for limit large current when Q9 turn on Add R54 1Kohm
ET-0325-12 30 SATA TX & RX swap for SATA connector reverse SATA_RX0_P_C, SATA_RX0_N_C, SATA_TX0_N_CSATA_TX0_P_C SWAP
ET-0325-13 30 Add 10pcs 1000pf for Power & Hotkey signal by EMI request Add C680, C681, C682, C683, C684, C685, C686, C687, C688, C689
ET-0325-14 30 Correct JP160, JP161 footprint JP160 --> 20288-044l3-4p-l J161 --> 20288-044l3-4p-l
ET-0325-15 31 Add 0ohm 3pcs & 3pcs 10pf for EMI Add R581, R708, R709 0ohm, C675, C676, C677 10pF
change CPU_CORE cap. to 22uF from 10uF & 330uF for CPU transiting issue
ET-0325-16 08 C14,C17,C19,C23,C26,C27,C29,C30,C31,C32,C335,C340,C345,C349,
C354,C355,C360,C361,C690,C691,C692 change to 22uF from 10uF
Add C707 330uF
ET-0328-01 31 Add R713 10Kohm & Q39 2N7002 for SATA LED Add R713 10kohm & Q39 2N7002
ET-0328-02 23 R562 Change footprint to RC0402 from short0402 Stuff R562 0ohm in BOM
ET-0328-03 24 Reference name error C598 & C603 5.11kohm change to R715 & R716 5.11ohm
ET-0328-04 30 Power S/W connector add Fuse 0.5A for safety Add R717, R718 0ohm stuff R717 for PC
Add F8, F9, F10 0.5A for Fsue
Add C673 0.1uF
ET-0328-05 31 Add 3pcs 0ohm & 3pcs 10pf for HW_TV_CRT for EMI Add R581, R708, R709 0ohm
Add C675, C676, C677 10pF
ET-0328-06 31 Add 4.7kohm for VGA_LVDS_CLK & VGA_LVDS_DAT pull up Add R431, R432 4.7kohm
ET-0328-07 33 Add R623 10Kohm & Q40 DTC144EU for WLAN_LED Add R623 10kohm & Q40 DTC144EU
ET-0328-08 33 Change D15 to R712 0ohm for CE control Chagne D15 to R712 0ohm
ET-0328-09 33 Delete L36, don't need diode Del L36
C C

ET-0328-10 33 R403 change to 0603 from 0402 for margin R403 change to 0603 0ohm
ET-0328-11 33 R360 change to 200kohm follow AMD recommand R360 change to 200kohm from 10kohm
ET-0328-12 33 VGA_TMDSB_HOT_PLUG form Q7.3 to Q7.1 for correct connect VGA_TMDSB_HOT_PLUG form Q7.3 to Q7.1
ET-0328-13 33 USBPWR_45, USBPWR_23 divide voltage to 3.3v from 2.5v R364, R365 change to 10kohm from 33Kohm
R353, R354 change to 15Kohm from 30kohm

ET-0328-14 33 F2, F3 change to Poly fuse 1.5A from fast fuse 5A for fit F2, F3 change to Poly fuse 1.5A from 5A
ET-0328-15 34 Delete L7, don't need Del L7
ET-0328-16 34 F1 change to 2A from 5A for fit F1 change to 2A from 5A
ET-0328-17 34 Delete R52 0ohm direct short Del R52
ET-0328-18 34 Delete F8 fuse direct short Del F8
ET-0328-19 34 R340 pin1 change to 5V_AUX from 5V for discharge R340 pin1 change to 5V_AUX from 5V for discharge
ET-0328-20 34 Add 150pf 12pcs & 0.1uf 2pcs for 1.5V_S3 by EMI request Add C695, C696, C697, C698, C699, C700, C701, C702, C703, C704, C705, C706 for 150pF
Add C678, C679 for 0.1uF
ET-0328-21 36 Stuff R207, R211 for PCH USB interface Stuff R207, R211 0ohm, No stuff R615, R627
No stuff R615, R627 for cancel from VL801
ET-0328-22 36 J70 change footprint for SMT issue J70 change to usb-uea111uc-r14u3-7h-9p
ET-0328-23 36 USB0_PWR divide voltage to 3.3v from 2.5v R656 change to 10kohm from 33kohm
R654 change to 15kohm from 30kohm
ET-0328-24 36 C141, C149 change to 33pF from 18pF to meet spec C141, C149 change to 33pF from 18pF
ET-0328-25 37 U34.85 change to TV_LED# remove EC_DISP_ON U34.85 change to TV_LED#
ET-0328-25 37 SCREEN_LED# U34.16 change to U34.86 for LED light SCREEN_LED# U34.16 change to U34.86 for LED light
ET-0328-26 37 Add Q41 2N7002 & R430 10Kohm for EAPD leakage issue Add Q41 2N7002, R430 10kohm
R720 10kohm for reserve
B ET-0328-27 37 EC U34. 47(CPU_FAN_TACH) & 48 (TV_PC_DET)swap Add R707 0ohm B

ET-0328-28 37 add R706 10Kohm to ACZDOUT for FDT override Add R706 10kohm damping resistor
ET-0328-29 37 don't need LED debug Del R460, LED1, Q23
ET-0328-30 37 C5 2.2uF 10V Derating fail C5 change to 1uF/16V from 2.2uF/10V
ET-0329-01 37 Add 0.1uF for ESD Add C710 0.1uF
ET-0329-02 16 Add 0.1uF for ESD Add C710 0.1uF
ET-0329-03 14 Add 0.1uF for ESD Add C709 0.1uF
ET-0329-04 20 Add 0.1uF for ESD Add C598 0.1uF
ET-0329-05 20 Add 0.1uF for ESD Add C603 0.1uF
ET-0329-06 36 Add 330uF for USB drop Add 330uF
ET-0329-07 36 Add R719 0ohm for PCIE_WAKE# Add R719 0ohm
ET-0329-08 35 Change L8 footprint for SMT issue Change L8 footprint to L3x3-1
ET-0329-09 07 Add 0ohm 7pcs for ESD Add R52, R460, R259, R705, R721, R722, R723 0ohm
ET-0330-01 28 Change U26 footprint & P/N same as QUB,D Change U26 footprint to SOT23-2_8-95-6P
ET-0330-02 36 Change U10 footprint & P/N same as QUB,D Change U10 footprint to SOT23-2_8-95-6P
ET-0330-03 29 add lin-in/HP/TV signal bias voltage add AR64, AR65, AC43,AC44, AR69,AR66,AR68,AR67, AR57,AR56,AR58,AR59,AR63,AR60,AC45,AC46,AR70,AR75,AC48,AC50,AR74,AR71,AR73,AR72,AC47,AC52,AR79,AR76,AR78,AR77,AC49,AC51 for audio Mux DC-Bias voltage, add TP161
ET-0330-04 37, 29 add Headphone jack in sensing pin add EC pin 68, Q23, AR61, Q38, AR62, D20 for ESD
ET-0330-05 30 chaneg CIR power rail mount R718, unmount R717
ET-0331-01 34 change H10 fotprint, add PAD1/PAD2 for EMI change H10 fotprint, add PAD1/PAD2 for EMI

A A

www.vinafix.vn
Quanta Computer Inc.
PROJECT : QUA
Size Document Number Rev
1A
Change List
Date: Monday, July 04, 2011 Sheet 47 of 48
5 4 3 2 1
5 4 3 2 1

ET Change List for Power


A stage TO B stage Upate
1.Change PR260/PR176/PR179/PR187/PR191/PR268/PR265/PR243/PR158/PR157/PR162/PR166 for discharge resistor spec.
2. DELETE PQ46/PR189/PR188/PQ50/PQ52/PQ49/PR190/PR197/ PR181/PC143 (3V/5V_AUX discharge)
D D
3. Delete PR184/PQ45 for 1.5V_S3 discharge
4. Mount PC187 for 5V_AUX ripple
5. Mount PC218 for 3V_AUX ripple
6. Change PQ27(SI4812 to SI4134)/PR227(309Kohm to 267Kohm) for 5V_AUX OCP
7. Change PQ29(SI4812 to SI4134)/PR232(357Kohm to 294Kohm) for 3V_AUX OCP
8. Change PR147(1 ohm to 1.5 ohm)/PC107(1000pF to 1500pF) to reduce 5V_AUX spike voltage
9. Change PC61(3300pF to 2200pF) /PC68 (100pF to 330pF) for Vcore compensation
10.Change PR83(32.4kohm to 23.2Kohm) for Vcore OCP
11.Change PR35 (16.2Kohm to 22.6kohm) for Vaxg loadline
12.Change PC143(1500pF to 330pF) for Vaxg RC match
13.Change PR38 (30.9kohm to 33.2Kohm) for Vaxg OCP
14.Change PR110(3.3kohm to 4.7Kohm) for Vcore DVID
15.Change PR117 (47kohm to 124Kohm)for VCCIO OCP
16.Add PR298/PQ79/PQ80 for VCCSA_0.925V on pin control
17.Unmount PR151/PC109/PC108 to increase VGA_Core efficiency
18.PR269 (30kohm to 19.1kohm) for 12V_HDD OCP
19.Add PC147/PC252 for EMI request
20.Change PQ58/PQ61/PQ63(SI4128 to AO6402A) for low switch cost down
21.Reserve PC253 100uFfor 12V_VDD MLCC noise
22.Reserve PC247 100uF for 3/5V MLCC noise
23.PR57(15kohm to 11.8kohm) for 1.5V_S3
24.Del PR230/PR239/PR240/PR225 for gate resistor
25.Del PR93/PR103 for gate resistor
26. 27.mount PR30
28.1.5V_S3,PG pin change to 3V_AUX
C
29.V5FILT change to 5V_AUX C
30.DEL PR131/PR132 for gate resistor
31.mount PR119
32.mount PR119
33.Del PR148/PR153
34.Unmount PC116
35.mount PC250
36.Del PR169 for gate resistor

B B

A A

Quanta Computer Inc.


PROJECT : QUA

www.vinafix.vn
Size Document Number Rev
1A
Change List
Date: Monday, July 04, 2011 Sheet 48 of 48
5 4 3 2 1

You might also like