1) DESIGN ABSTRACTION LEVELS

-Transistor level
-Gate level
-Register-transfer level
-Behavioral level
DESIGN ABSTRACTION LEVELS con’t
Digital circuits can be designed at any one of
several abstraction levels namely, transistor
level; gate level; register-transfer level and
behavioral level.
a) Transistor level: Lowest level which deals with
discrete transistors, connecting them together
to form the circuit.
b) Gate level: Logic gates are used to build the
circuit. The circuit can be specified using either
a truth table or Boolean expression.
 DESIGN ABSTRACTION LEVELS con’t
c) Register-transfer level: designer creates
standard combinational and sequential
components for larger circuits using logic
gates. At this level, the designer is concerned
with how data is transferred between the
various components (registers & functional
units) in order to realize or solve the problem
at hand
d) Behavioral level: The circuit is constructed by
describing the behavior or operation using
VHDL
Example: Different abstraction levels of a
2-to-1 multiplexer
• This example is to illustrate that there are
many different ways to create the same
functional circuits using different abstraction
levels. They are different with respect to size
(how big the circuit is or how many transistors
it uses); speed (how long it takes for the
output result to be valid); cost (how much it
costs to manufacture); power usage (how
much power it uses).
 Example: 2-to-1 multplexer con’t
• Hence, when designing a circuit, besides being
functionally correct, there will always be
economic versus performance tradeoffs that
we need to consider
• Logic symbol for a 2-to-1 multiplexer is as
follows
 i) Behavioral level
• The behavior of a 2-to-1 multiplexer is as follows:
if s = 0 then y = d0 otherwise y = d1

• The VHDL code is as follows

Entity multiplexer is
port (do, d1, s: in std_logic;
y: out std_logic);
end multiplexer;
Architecture Behavioral of multiplexer is
Begin
Process (s, d0, d1)
begin
if (s = ‘0’) then
y <= d0;
else
y <= d1;
end if;
end process
end behavioral;
 Behavioral level con’t
• Entity section declares the interface for the
circuit by specifying the input and output
signals of the circuit
• Architecture section defines the actual
operation of the circuit. The operation of the
multiplexer is defined in the conditional IF-
THEN-ELSE statement
 ii) GATE LEVEL
• At the gate level, you can draw a schematic diagram which is a
diagram showing how the logic gates are connected;
• The schematic diagram is obtained from the truth table or
Boolean expression.
GATE LEVEL con’t
 iii) TRANSISTOR LEVEL
• It contains six transistors, three of which are
PMOS and three are NMOS
• Pair of transistors on the left forms an inverter
for signal, s
• 2 pairs of transistors on the right form two
transmission gates:
- if s = 0, top transmission gate is turned on
and y = d0
- if s = 1, bottom transmission gate is turned
on and y = d1
TRANSISTOR LEVEL con’t