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IRL3103S - N CH, HEXFET® Power MOSFET, 30v 64A 1v VGS (TH)
IRL3103S - N CH, HEXFET® Power MOSFET, 30v 64A 1v VGS (TH)
IRL3103S
l Advanced Process Technology
IRL3103L
l Surface Mount (IRL3103S) HEXFET® Power MOSFET
l Low-profile through-hole (IRL3103L)
l 175°C Operating Temperature D
l Fast Switching
VDSS = 30V
l Fully Avalanche Rated
Description
RDS(on) = 12mΩ
G
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to ID = 64A
achieve extremely low on-resistance per silicon area. S
This benefit, combined with the fast switching speed and
ruggedized device design that HEXFET power MOSFETs
are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of its
low internal connection resistance and can dissipate up to D2Pak TO-262
2.0W in a typical surface mount application. IRL3103S IRL3103L
The through-hole version (IRL3103L) is available for low-
profile applications.
Thermal Resistance
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.6
°C/W
RθJA Junction-to-Ambient (PCB mount)** ––– 40
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02/14/02
IRL3103S/IRL3103L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 30 ––– ––– V VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.028 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 12 VGS = 10V, ID = 34A
RDS(on) Static Drain-to-Source On-Resistance mΩ
––– ––– 16 VGS = 4.5V, ID = 28A
VGS(th) Gate Threshold Voltage 1.0 ––– ––– V VDS = VGS, ID = 250µA
gfs Forward Transconductance 22 ––– ––– S VDS = 25V, ID = 34A
––– ––– 25 VDS = 30V, VGS = 0V
IDSS Drain-to-Source Leakage Current µA
––– ––– 250 VDS = 24V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– ––– 100 VGS = 16V
IGSS nA
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
Qg Total Gate Charge ––– ––– 33 ID = 34A
Qgs Gate-to-Source Charge ––– ––– 5.9 nC VDS = 24V
Qgd Gate-to-Drain ("Miller") Charge ––– ––– 17 VGS = 4.5V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 8.9 ––– VDD = 15V
tr Rise Time ––– 120 ––– ID = 34A
td(off) Turn-Off Delay Time ––– 14 ––– RG = 1.8Ω
tf Fall Time ––– 9.1 ––– VGS = 4.5V, See Fig. 10
Between lead, D
LD Internal Drain Inductance ––– 4.5 –––
6mm (0.25in.)
nH G
from package
LS Internal Source Inductance ––– 7.5 –––
and center of die contact S
VSD Diode Forward Voltage ––– ––– 1.2 V TJ = 25°C, IS = 34A, VGS = 0V
trr Reverse Recovery Time ––– 57 86 ns TJ = 25°C, IF = 34A
Qrr Reverse Recovery Charge ––– 110 170 nC di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature. (See fig. 11)
This is a typical value at device destruction and represents
Starting TJ = 25°C, L = 220µH operation outside rated limits.
RG = 25Ω, IAS = 34A, VGS=10V (See Figure 12) This is a calculated value limited to TJ = 175°C .
**When mounted on 1" square PCB (FR-4 or G-10 Material). For
ISD ≤ 34A, di/dt ≤ 120A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C recommended footprint and soldering techniques refer to
application note #AN-994
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IRL3103S/IRL3103L
1000 1000 VGS
VGS
TOP 15V TOP 15V
10V 10V
4.5V 4.5V
I D , Drain-to-Source Current (A)
2.7V
10 10
2.7V
1
20µs PULSE WIDTH
T = 25 C
J °
1
20µs PULSE WIDTH
T = 175 C
J °
1000 2.5
ID = 56A
RDS(on) , Drain-to-Source On Resistance
I D , Drain-to-Source Current (A)
TJ = 25 ° C
2.0
100
TJ = 175 ° C
(Normalized)
1.5
1.0
10
0.5
1
V DS = 15V
20µs PULSE WIDTH
0.0
VGS = 10V
2.0 3.0 4.0 5.0 6.0 7.0 8.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V) TJ , Junction Temperature ( °C)
3000 15
VGS = 0V, f = 1MHz
ID = 34A
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
2000
Ciss
9
1500
Coss
6
1000
3
500
C
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0 0
1 10 100 0 10 20 30 40
VDS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC)
1000 1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
100
TJ = 175 ° C
100
10
100µsec
10
1
TJ = 25 ° C 1msec
Tc = 25°C
Tj = 175°C 10msec
V GS = 0 V
1
Single Pulse
0.1
0.0 0.4 0.8 1.2 1.6 2.0 2.4 1 10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
70 RD
VDS
60
VGS
D.U.T.
RG
I D , Drain Current (A)
50 +
-VDD
40
VGS
Pulse Width ≤ 1 µs
30 Duty Factor ≤ 0.1 %
20
Fig 10a. Switching Time Test Circuit
10 VDS
90%
0
25 50 75 100 125 150 175
TC , Case Temperature ( °C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
td(on) tr t d(off) tf
Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50
0.20
0.10
P DM
0.05
0.1 SINGLE PULSE
0.02 t1
0.01 (THERMAL RESPONSE)
t2
0.01
Notes:
1. Duty factor D = t 1 / t 2
2. Peak T J = P DM x Z thJC + TC
www.irf.com 5
IRL3103S/IRL3103L
240
1 5V
ID
160
RG D .U .T +
- VD D
IA S A
120
2V0GS
V
tp 0 .0 1 Ω
80
Fig 12a. Unclamped Inductive Test Circuit
40
V (B R )D SS
tp
0
25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( °C)
50KΩ
12V .2µF
QG .3µF
VGS +
V
D.U.T. - DS
QGS QGD
VGS
VG 3mA
IG ID
Charge Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit
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IRL3103S/IRL3103L
Peak Diode Recovery dv/dt Test Circuit
+
- +
-
RG • dv/dt controlled by RG +
• ISD controlled by Duty Factor "D" VDD
-
• D.U.T. - Device Under Test
VGS
[VGS=10V ] ***
Reverse
Recovery Body Diode Forward
Current Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
[VDD]
Re-Applied
Voltage Body Diode Forward Drop
Inductor Curent
Ripple ≤ 5% [ ISD ]
8.8 9 (.3 50 )
1.40 (.0 55) 1.3 9 (.0 55 ) R E F.
3X
1.14 (.0 45) 0.9 3 (.0 37 ) 0.55 (.0 22) 1.1 4 (.0 45 )
3X 0.46 (.0 18)
0.6 9 (.0 27 )
5 .08 (.20 0) 0.25 (.0 10 ) M B A M M IN IM U M R EC O M M E ND E D F O O TP R IN T
1 1.43 (.4 50 )
2.5 4 (.100 )
2.0 8 (.08 2) 2X
2X
A
IN TE R N A TIO N A L PART NUM BER
R E C T IF IE R
F530S
LO G O
9 24 6
9B 1M DATE CODE
(Y YW W )
A S S E M B LY
YY = Y E A R
LO T C O D E
W W = W EEK
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IRL3103S/IRL3103L
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IRL3103S/IRL3103L
TR R
1 .6 0 (.0 6 3 )
1 .5 0 (.0 5 9 )
1 .6 0 (.0 6 3 )
4 .1 0 ( .1 6 1 ) 1 .5 0 (.0 5 9 )
3 .9 0 ( .1 5 3 ) 0.3 6 8 (.01 4 5 )
0.3 4 2 (.01 3 5 )
F E E D D IR E C T IO N
30.4 0 (1.19 7)
N O TE S : M A X.
1 . CO M F OR M S TO E IA -418 . 26 .40 (1 .03 9) 4
2 . CO N TR O L LIN G D IM E N SIO N : M IL LIM E T ER . 24 .40 (.9 61 )
3 . DIM E NS IO N M EA S UR E D @ H U B.
3
4 . IN C LU D ES FL AN G E DIST O R T IO N @ O UT E R E D G E.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/02
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