III B.Tech. I Semester (R15) ECE - JNTUA DESCRIPTIVE MID TEST No: I DIGITAL SYSTEM DESIGN (15A04502) Time: 90 Minutes Date: 06.09.2017 Max Marks: 20 * Answer any three Questions * All Questions carry equal marks
Cos Blooms Q.No. Question Marks Mapping level
1. Explain the following. i) Sensitivity list
Understan 1 CO1 ii) Entity iii) Architecture iv) Fan-out 10 d v) Transition time
Explain the steady state electrical CMOS behavior for
Understan 2 CO1 (i) Resistive Loads (ii) Non ideal Inputs 10 d
(a) Explain interfacing of low voltage TTL and low 5
Understan voltage CMOS logic. 3 CO1 d (b) What is ECL? Explain operation of basic ECL 5 Inverter circuit? (a) Discuss the steps in VHDL design flow. Understan 4 CO2 (b) Draw the OR gate circuit using CMOS logic and 10 d explain the operation using Functional Table? (a) Explain about Structural design elements? 5 Understan 5 CO2 d (b)Explain about Behavioral Elements? 5
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SET – 2 KUPPAM ENGINEERING COLLEGE, KUPPAM – 517425 III B.Tech. I Semester (R15) ECE - JNTUA DESCRIPTIVE MID TEST No: I DIGITAL COMMUNICATION SYSTEMS (15A04502) Time: 90 Minutes Date: 06.09.2017 Max Marks: 20 * Answer any three Questions * All Questions carry equal marks 1. With the help of neat diagram, explain the transmitter and receiver operation of pulse code modulation. 2. Explain in detail about Time Division Multiplexing and the need for synchronization. 3. A television signal having a bandwidth of 4.2 MHZ is transmitted using binary PCM system. Given that the number of quantization levels is 512. Determine i) Code word length ii) Transmission bandwidth iii) Final bit rate iv) Output Signal-to-quantization noise ratio 4. Derive the expression for error rate due to noise for a binary polar NRZ PCM signal transmission. 5. Describe the operation of a modified duo-binary filter in baseband data transmission with necessary block diagram.