DIVINE WORD COLLEGE OF CALAPAN

ENGINEERING AND ARCHITECTURE DEPARTMENT

PRE-FINAL EXAMINATION

NAME: ________________________________________________ SCORE: ________ RATING: _________

ID NUMBER: ______________________________ COURSE: _________________

I. Problem Solving: Write your solutions on the extra sheets provided. Write the solutions clearly and put a box in your final
answer.

1. Sketch the voltage output waveform for the limiter circuits as shown in (A) and (B).
(A) (B)

2. Determine the following dc performance quantities for the emitter bias configuration; (a) I B, (b) IC, (c) IE, (d) VCE, (e) VB, (f)
VC, and (g) VE.

3. At what value of R should be adjusted to provide I B of 24.8 uA. Also determine the value of βdc to produce VC = 3.8 V.

SUBJECT: Electronics 1 DATE OF EXAMINATION: November 24, 2020

TIME: 8:00 – 10:00 AM / 6:00 – 8:00 PM DAY: Wed/Fri TIME OF EXAMINATION: 6:00 – 8:00 PM
Page 1
PREPARED BY: NOTED BY: APPROVED BY :

ENGR. REODELIN V SEVILLA ARCH. CRESELDA M. ROLDAN, PhD DR. ALELI C. DUGAN, CPA
ECE Faculty OIC – SEA Vice President for Academic Affair
4. Determine the ff. dc performance quantities for the circuit as shown; (a) I B, (b) IC, (c) IE, (d) VCE, (e) VB, (f) VC, and (g) VE.

5. Calculate the following dc performance quantities for the circuit as shown below. (a) I C , (b) VCE , (c) VB , (d) VC , (e) VE

SUBJECT: Electronics 1