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8051
• An instruction is a single operation of a processor defined by an instruction set
architecture.
• According to type of operations, the instruction set of 8051 is classified as follows
1) Data Transfer Instructions
2) Byte Level Logical Instructions
3) Arithmetic Instructions
4) Bit Level Instructions
5) Rotate and Swap instructions
6) Jump and CALL Instructions
Data Transfer Instructions
1) Instructions to Access External Data Memory.
2) Instructions to Access External ROM / Program Memory.
3) Data Transfer with Stack (PUSH and POP) instructions.
4) Data Exchange Instructions.
Data Transfer Instructions
• An immediate, direct, register and indirect addressing modes are used in different
MOVE instructions.
Ex:
MOV A, Rn
MOV A, direct
MOV A, @Ri
Instructions to Access External Data
Memory
Ex:
MOV X A, @Ri
Copy the contents of external address in Ri to A.
This copies the data from the 8-bit address in R0 to A.
MOVX A, @DPTR
This instruction copies data from the 16-bit address in DPTR to A.
MOVX @DPTR, A
This instruction copies data from A to the 16-bit address in DPTR.
Important Points to be remembered
in accessing external data memory
• All external data moves with external RAM involve the A register.
• While accessing external RAM, Rp can address 256 bytes and DPTR can
address 64Kbytes.
• MOVX instruction is used to access external RAM or I/O addresses.
Instructions to Access External
ROM/Program Memory
MOVC A, @A + DPTR
This copy the contents of the external ROM address formed by adding A and the
DPTR, to A.
MOVC A, @A + PC
This copy the contents of the external ROM address formed by adding A and the
PC, to A.
Important Points to be remembered
in accessing external Read only
Memory
• When PC is used to access external ROM, it is incremented by 1 before it is
added to A to form the physical address of external ROM.
• All external data moves with external ROM involve the A register.
• MOVC is used with internal or external ROM and can address 4K of internal
code or 64K of external code.
• The DPTR and the PC are not changed.
Data transfer with Stack (PUSH and
POP) Instruction
PUSH direct : Push onto stack
Ex:
PUSH B
This instruction increments the stack pointer by one and stores the contents of
register B to the internal RAM location addressed by the stack pointer (SP).
POP ACC
This instruction copies the contents of the internal RAM location addressed by
the stack pointer to the accumulator. Then the stack pointer is decrements by
one.
Important points to remember during
PUSH and POP
• When the SP contents become FFH, for the next PUSH, the SP rolls over to
00H.
• The top of the internal RAM, i,e. its end address is 7FH. So next PUSHes after
&FH result in errors.
• Generally the SP is set at address above the register banks.
• The PUSH and POP operations are used for the registers from the register
banks (bank 0 – bank 3), specify direct addresses within the instructions. Do not
use register name from register bank since the register name does not specify the
bank in use.
Data Exchange Instructions
• The Exchange instruction move data from source address to destination
address and vice versa.
Ex:
XCH A,Rn
XCH, direct
XCH A, @Ri
XCHD A, @Ri
Important points to remember in
Exchange Instructions
• All exchanges involve the A register.
•All exchanges take place internally within 8051.
• When XCHD A, @Ri instruction is executed, the upper nibble of A and the
upper nibble of the address in Ri do not change.
• Immediate addressing mode cannot be used in the exchange instructions.
Byte Level Logical Instructions
• The instructions ANL, ORL, and XRL perform the logical functions AND, OR,
and/or Exclusive – OR on the two byte variables indicated, leaving the result in
the first. No flags are affected.
• The byte – level logical operations use all four addressing modes for the source
of a data byte.
• Here, directly addressed bytes may be used as the destination with either the
accumulator or a constant as the source. These instructions are useful for
clearing (ANL), setting (ORL) or complementing (XRL) one or more bits in a
RAM, output ports, or control registers.
• ANL <dest-byte>, <src-byte>
ANL performs the bitwise logical-AND operation between the variables
indicated and stores the result in the destination variable. No flags are affected.
Decimal Arithmetic
Function Resister] .
The eight bits in the Accumulator are rotated one bit to the left. Bit 7 is rotated
The eight bits in the Accumulator and the carry flag are together rotated one bit
to the left. Bit 7 moves into the carry flag; the original state of the carry flag
The eight bits in the Accumulator are rotated one bit to the right. Bit 0 is rotated
The eight bits in the Accumulator and the carry flag are together rotated one bit
to the right. Bit 0 moves into the carry flag; the original value of the carry flag
Swap A interchanges the low and high-order nibbles of the Accumulator. The
operation can also be thought of as a four – bit rotate instruction. No flags are
affected.