Professional Documents
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SERVICE MANUAL
MODEL DVD-2200
DVD AUDIO-VIDEO / SUPER AUDIO CD PLAYER
注 意
サービスをおこなう前に、このサービスマニュアルを
必ずお読みください。本機は、火災、感電、けがなど
に対する安全性を確保するために、さまざまな配慮を
おこなっており、また法的には「電気用品安全法」に
もとづき、所定の許可を得て製造されております。
従ってサービスをおこなう際は、これらの安全性が維
持されるよう、このサービスマニュアルに記載されて
いる注意事項を必ずお守りください。
SAFETY PRECAUTIONS
The following check should be performed for the continued protection of the customer and service technician.
LASER RADIATION
Do not stare into beam or view directly with optical instruments, class 3A laser product.
500V
1M
(1)
(2)
(1)
(2)
2
DVD-2200 3
DISASSEMBLY ฦㇱߩߪߕߒ߆ߚ
(Follow the procedure below in reverse order when reassem- 㧔⚵ߺ┙ߡࠆߣ߈ߪޔㅒߩ㗅ᐨߢⴕߞߡߊߛߐޕ㧕
bling.)
Front Panel
Power Switch
Loader Panel
"OPEN/CLOSE"button
A-part
Fig. The left side view of the Mechanism.
3
DVD-2200 4
DVD Mecha.
3. Mecha.Unit ࡔ࡙ࠞ࠾࠶࠻ߩߪߕߒ߆ߚ
(1) Remove 2 screws on the top of the Mecha. Unit, and de-
ࡔࠞߩ߆ࠄߨߓ ᧄࠍߪߕߒࡉࡊࡦࠢ࠼ࠗࠟޔ
tach the Guide Clamp Bracket with sliding in the arrow di- ࠤ࠶࠻ࠍ⍫ශᣇะߦߕࠄߒߥ߇ࠄߪߕߒ߹ߔޕ
rection.
࠼ࠗࡃࡔࠞߩ࡚ࠪ࠻ࠨࠠ࠶࠻ࠍඨ↰ઃߌߒ߹
(2) Solder the short-circuit on the Traverse Unit. (Refer to ߔޕ㧔࠻ࡃ࡙ࠬ࠾࠶࠻ߩߪߕߒ߆ߚ ࡍࠫෳᾖ㧕
"Traverse Unit Disassembly" on page 5.
ࡔࠗࡦၮ᧼ߣធ⛯ߒߡࠆࡢࠗࡗ㧔%: %:
(3) Disconnect the wires (CX151, CX241, CX031, CX051) %: %:㧕ࠍߪߕߒ߹ߔޕ
connecting with the Main PWB.
৻ߩࡔ࡙ࠞ࠾࠶࠻ ࡔࠗࡦၮ᧼ࠍⵣߒᧄ ߓߨޔ
(4) Turn over the Mecha. Unit/Main PWB assembly, and re- ࠍߪߕߒ߹ߔޕ
move 3 screws.
4
DVD-2200 5
5
DVD-2200 6
6
DVD-2200 7
7
DVD-2200 8
ࠩ㚟േ㔚ᵹ୯
㧕DVD 㧖㧖㧖 mA, CD 㧖㧖㧖 mA
8
DVD-2200 9
LD(DVD) LD(DVD)
+5V-A2 +5V-A2
Oscilloscope Oscilloscope
(1) Connect the oscilloscope to +5V-A2 of test point for GND
ࠝࠪࡠࠬࠦࡊࠍ࠹ࠬ࠻ࡐࠗࡦ࠻
8#
)0& ߣ
side and LD(DVD) of test point for signal side. .&
&8&
ାภ ߳ធ⛯ߒ߹ߔޕ
(2) Playback the title 1 / chapter 1 of the DVD Test Disc.
&8& ࠹ࠬ࠻࠺ࠖࠬࠢߩ࠲ࠗ࠻࡞ ࠴ࡖࡊ࠲ ࠍౣ↢ߒ
(3) Measure the voltage between +5V-A2 and LD(DVD), cal- ߹ߔޕ
culate Iop by the formula as shown below.
8# ߣ .&
&8& 㑆ߩ㔚ࠍ᷹ቯߒ㨮ᰴᑼߦࠃࠅ +QR ࠍ
▚ߒ߹ߔޕ
Measurement Voltage Value
Iop = -----------------------------------------------------------------------------
14 (Resistance value) ᷹ቯ㔚୯
+QR
ᛶ᛫୯
᷹ቯ㔚୯
Measurement Voltage Value
Iop = ----------------------------------------------------------------------------- +QR
11.75 (Resistance value)
ᛶ᛫୯
9
DVD-2200 10
10
DVD-2200 11
11
DVD-2200 12
(b) If the REV button or the FWD button is pushed again, it ࠛ࠻␜ ߦߥࠆޕ
will become the trace mode (error rate display). (. ▤ߩ␜
ᩴߩ␜ㇱ
FL display (The display part of 13 digits)
1 2 3 4 5 6 7 8 9 10 11 12 13 㨀 㧣
T 7
ࡕ ࠼ߩ⏕ቯ
(3) Mode decision • ࡕ࠼ࠍㆬᛯߒߡࠆ⁁ᘒߢ 2.#; ࠠࠍߔߣࡕ࠼
• The mode will be decided if the PLAY button is pushed in ࠍ⏕ቯߔࠆޕ
the state where the mode is chosen.
Cࠨࡏ⺞ᢛ୯␜ࡕ࠼ߩ႐วߪࡈࠝࠬࠞࠜࡈޔ
(a) In the case of servo adjustment value display mode, a ࠶࠻⺞ᢛ୯ࠍ␜ߔࠆޕ
focus offset adjustment value is displayed. (. ▤ߩ␜
ᩴߩ␜ㇱ
FL display (The display part of 13 digits)
1 2 3 4 5 6 7 8 9 10 11 12 13 㨀 㧟 㧝 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚
T 3 1 n n n n n n n n n n
P ⺞ᢛ୯
(n:adjustment value)
D࠻ࠬࡕ࠼
ࠛ࠻␜ ߩ႐วߪޔ㧝ጀ
(b) In the case of trace mode (error rate display), trace of ౝߩ࠻ࠬࠍㆬᛯߔࠆޕ
the circumference in one layer is chosen. (. ▤ߩ␜
ᩴߩ␜ㇱ
FL display (The display part of 13 digits)
1 2 3 4 5 6 7 8 9 10 11 12 13 㨀 㧣 㧝 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲
T 7 1 F F F F F F F F F F
㧲 ࠕ࠼ࠬ߮ࠛ ࠻ߪᧂ⏕ቯᤨޔ㧲 ࠍ␜ߔࠆޕ
(F: An address and an error rate display F at the time of undecided.)
ࡕ ࠼ౝߢߩᄌᦝ
(4) Change within the mode • ࡕ࠼ࠍ⏕ቯߒߡࠆ⁁ᘒߢ 4'8 ࠠߪ (9& ࠠࠍ
• If the REV button or the FWD button is pushed in the state ߔߣࡕ࠼ౝߢߩᄌᦝࠍⴕ߁ޕ
where the mode is decided, a change within the mode will
Cࠨࡏ⺞ᢛ୯␜ࡕ࠼ߩ႐ว㧔 㧝ࠨࡏ⺞ᢛ୯
be made. ␜ࡕ࠼⚦ ෳᾖ㧕
(a) In the case of servo adjustment value display mode (re- (. ▤ߩ␜
ᩴߩ␜ㇱ
fer to table 1 servo adjustment value display mode de-
tails)
㨀 㨄 㨄 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚 㨚
FL display (The display part of 13 digits)
㨄㨄 ㆬᛯࡕ ࠼ = 㨪 ?ޔP ⺞ᢛ୯
1 2 3 4 5 6 7 8 9 10 11 12 13
T X X n n n n n n n n n n
12
DVD-2200 13
(b) In the case of trace mode (error rate display) (refer to ta-
D ࠻ࠬࡕ࠼
ࠛ࠻␜ ߩ႐ว㧔
ble 2 trace mode details) ࠻ࠬࡕ࠼⚦ ෳᾖ㧕
FL display (The display part of 13 digits) (. ▤ߩ␜
ᩴߩ␜ㇱ
1 2 3 4 5 6 7 8 9 10 11 12 13
T Y Y F F F F F F F F F F 㨀 㨅 㨅 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲 㧲
(YY: select mode [71 94] ,F: address and an error rate display F at the
㨅㨅 ㆬᛯࡕ ࠼ = 㨪 ?ޔ㧲 ࠕ࠼ࠬ߮ࠛ ࠻ߪᧂ⏕
time of undecided) ቯᤨޔ㧲 ࠍ␜ߔࠆޕ
13
DVD-2200 14
(7) Test mode detailed table
࠹ࠬ࠻ࡕ ࠼⚦৻ⷩ
Table 1: servo adjustment value display mode details ࠨࡏ⺞ᢛ୯␜ࡕ࠼⚦
Contents
XX Contents suppleme Contents explanation 㨄㨄 ౝኈ ౝኈ⿷ ౝኈ⺑
nt
31 RFP FE Offset layer 0 PI of CXD1881AR An offset value and 4(2 (' 1HHUGV ࠗࡗ %: ߩ 2+ ࠝࡈ࠶࠻୯ߣ (' ࠝ
FE An offset value is displayed. ࡈ࠶࠻୯ࠍ␜ޕ
Pi offset is shown in higher rank $[VG ߦ 2K ࠝࡈ࠶࠻ࠍ␜ߔޕ
1Byte. ਅ $[VG ߦ (' ࠝࡈ࠶࠻ࠍ␜ߔޕ
FE offset is shown in low rank 1Byte.
32 RFP TE Bal layer 0 TE balance gain value of 4(2 6' $CN ࠗࡗ %: ߩ 6' ࡃࡦࠬࠥࠗࡦ୯ࠍ
Gain CXD1881AR is displayed. )CKP ␜ߔޕ
33 RFP TE layer 0 TE output gain value of CXD1881AR 4(2 6' 1WVRWV ࠗࡗ %: ߩ 6' ജࠥࠗࡦ୯ࠍ␜
Output Gain is displayed. )CKP ߔޕ
34 RFP TE Offset layer 0 TE offset value of CXD1881AR is 4(2 6' 1HHUGV ࠗࡗ %: ߩ 6' ࠝࡈ࠶࠻୯ࠍ␜ޕ
displayed.
35 DSP TE Offset layer 0 TE offset value inside CXD1885Q is &52 6' 1HHUGV ࠗࡗ %:&3 ౝㇱߩ 6' ࠝࡈ࠶࠻୯ࠍ
displayed. ␜ޕ
36 Fcs Bias layer 0 The focus bias value inside (EU $KCU ࠗࡗ %:&3 ౝㇱߩࡈࠜࠞࠬࡃࠗࠕࠬ
CXD1885Q is displayed. ୯ࠍ␜ޕ
37 Fcs AGC layer 0 The inside focus gain (setting 0x2000 (EU #)% ࠗࡗ %:&3 ౝㇱࡈࠜࠞࠬࠥࠗࡦ
to 1) value of CXD1885Q is displayed.
Z ࠍ ߣߒߡ ୯ࠍ␜ޕ
Therefore, 0x1FF2 and in the case of Z(( ߿ Z ߩ႐วޔએਅߩࠃ߁
0x2012, it is as follows. ߦߥࠆޕ
0x1FF2(8178) / 0x2000(8192) = Z((
Z
0.998291015625(fold)
0x2012(8210) / 0x2000(8192) = Z
Z
1.002197265625(fold)
Notes: The inside of ( ) is a decimal ᵈ
ౝߪ ㅴ឵▚୯
system equivalent.
38 Trk AGC layer 0 The inside tracking gain (setting 6TM #)% ࠗࡗ %:&3 ౝㇱ࠻࠶ࠠࡦࠣࠥࠗࡦ
0x2000 to 1) value of CXD1885Q is Z ࠍ ߣߒߡ ୯ࠍ␜ޕ
displayed. Z(( ߿ Z ߩ႐วޔએਅߩࠃ
Therefore, 0x1FF2 and in the case of ߁ߦߥࠆޕ
0x2012, it is as follows. Z((
Z
0x1FF2(8178) / 0x2000(8192) =
0.998291015625(fold) Z
Z
0x2012(8210) / 0x2000(8192) =
1.002197265625(fold) ᵈ
ౝߪ ㅴ឵▚୯
Notes: The inside of ( ) is a decimal
system equivalent
39 Pi Offset layer 0 It is the parameter calculated inside 2K 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
40 FE Offset layer 0 It is the parameter calculated inside (' 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
41 SE Offset layer 0 It is the parameter calculated inside 5' 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
42 RFP FE Offset layer 1 PI of CXD1881AR An offset value and 4(2 (' 1HHUGV ࠗࡗ %: ߩ 2+ ࠝࡈ࠶࠻୯ߣ (' ࠝ
FE An offset value is displayed. ࡈ࠶࠻୯ࠍ␜ޕ
Pi offset is shown in higher rank $[VG ߦ 2K ࠝࡈ࠶࠻ࠍ␜ߔޕ
1Byte. ਅ $[VG ߦ (' ࠝࡈ࠶࠻ࠍ␜ߔޕ
FE offset is shown in low rank 1Byte.
43 RFP TE Bal layer 1 TE balance gain value of 4(2 6' $CN ࠗࡗ %: ߩ 6' ࡃࡦࠬࠥࠗࡦ୯ࠍ
Gain CXD1881AR is displayed. )CKP ␜ޕ
44 RFP TE layer 1 TE output gain value of CXD1881AR 4(2 6' 1WVRWV ࠗࡗ %: ߩ 6' ജࠥࠗࡦ୯ࠍ␜ޕ
Output Gain is displayed. )CKP
45 RFP TE Offset layer 1 TE offset value of CXD1881AR is 4(2 6' 1HHUGV ࠗࡗ %: ߩ 6' ࠝࡈ࠶࠻୯ࠍ␜ޕ
displayed.
46 DSP TE Offset layer 1 It is the parameter calculated inside &52 6' 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
47 Fcs Bias layer 1 It is the parameter calculated inside (EU $KCU ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
48 Fcs AGC layer 1 The inside focus gain (setting 0x2000 (EU #)% ࠗࡗ %:&3 ౝㇱࡈࠜࠞࠬࠥࠗࡦ
to 1) value of CXD1885Q is displayed.
Z ࠍ ߣߒߡ ୯ࠍ␜ޕ
Therefore, 0x1FF2 and in the case of Z(( ߿ Z ߩ႐วޔએਅߩࠃ߁
0x2012, it is as follows. ߦߥࠆޕ
0x1FF2(8178) / 0x2000(8192) = Z((
Z
0.998291015625(fold)
0x2012(8210) / 0x2000(8192) = Z
Z
1.002197265625(fold)
Notes: The inside of ( ) is a decimal ᵈ
ౝߪ ㅴ឵▚୯
system equivalent.
14
DVD-2200 15
49 Trk AGC layer 1 The inside tracking gain (setting 6TM #)% ࠗࡗ %:&3 ౝ ㇱ ࠻ ࠶ ࠠ ࡦ ࠣ ࠥ ࠗ ࡦ
0x2000 to 1) value of CXD1885Q is
Z ࠍ ߣߒߡ ୯ࠍ␜ޕ
displayed. Z(( ߿ Z ߩ႐วޔએਅߩࠃ
Therefore, 0x1FF2 and in the case of ߁ߦߥࠆޕ
0x2012, it is as follows. Z((
Z
0x1FF2(8178) / 0x2000(8192) =
0.998291015625(fold) Z
Z
0x2012(8210) / 0x2000(8192) =
1.002197265625(fold) ᵈ
ౝߪ ㅴ឵▚୯
Notes: The inside of ( ) is a decimal
system equivalent
50 Pi Offset layer 1 It is the parameter calculated inside 2K 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
51 FE Offset layer 1 It is the parameter calculated inside (' 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
52 SE Offset layer 1 It is the parameter calculated inside 5' 1HHUGV ࠗࡗ %:&3 ౝㇱߢ⸘▚ߐࠇࠆࡄࡔ
CXD1885Q. ࠲ޕ
The value displayed on a set serves ࠶࠻ߦ␜ߐࠇࠆ୯ߪ ޔߐࠇ
as the number of complement of 2 of ߚ $[VGU ߩ ߩᢙߣߥࠆޕ
2Bytes(es) doubled 256. 㔚୯ߪ DKV ߚࠅ O8ޕ
A voltage value is 6.25mV per bit.
53 PO error Error rate It is invalid at the time of CD 21 ⺋ࠅᬌᢙ ࠛ %& ᤨߪήലޕ
detection num- operation. ࠻
ber
54 PO uncorrect- Error Rate It is invalid at the time of CD 21 ⸓ᱜਇนᢙ ࠛ %& ᤨߪήലޕ
able error operation. ࠻
number
55 PI error detec- Error Rate CD : C1 error detection number 2+ ⺋ࠅᬌᢙ ࠛ %& ᤨߪ % ⺋ࠅᬌᢙޕ
tion number ࠻
56 PI uncorrect- Error Rate CD : C2 uncorrectable error number 2+ ⸓ᱜਇนᢙ ࠛ %& ᤨߪ % ⸓ᱜਇนᢙޕ
able error ࠻
number
57 Mirr Count Disc dis- They are the contents at the time of /KTT %QWPV ࠺ࠖࠬࠢ ࠺್ࠖࠬࠢᤨߩౝኈޕ
criminant disc distinction. ್ ୯ߩౝኈߪޟ㧟࠺್ࠖࠬࠢᖱႎޠ
Please refer to "Table 3 Disc ࠍෳᾖޕ
distinction information" about the
contents of a value.
58 Mirr Width Disc dis- They are the contents at the time of /KTT 9KFVJ ࠺ࠖࠬࠢ ࠺್ࠖࠬࠢᤨߩౝኈޕ
criminant disc distinction. ್ ୯ߩౝኈߪޟ㧟࠺್ࠖࠬࠢᖱႎޠ
Please refer to "Table 3 Disc ෳᾖޕ
distinction information" about the
contents of a value.
59 FZC Count Disc dis- They are the contents at the time of (<% %QWPV ࠺ࠖࠬࠢ ࠺್ࠖࠬࠢᤨߩౝኈޕ
criminant disc distinction. ್ ୯ߩౝኈߪޟ㧟࠺್ࠖࠬࠢᖱႎޠ
Please refer to "Table 3 Disc ෳᾖޕ
distinction information" about the
contents of a value.
60 Pi Level Disc dis- They are the contents at the time of 2K .GXGN ࠺ࠖࠬࠢ ࠺್ࠖࠬࠢᤨߩౝኈޕ
criminant disc distinction. ್ ୯ߩౝኈߪޟ㧟࠺್ࠖࠬࠢᖱႎޠ
Please refer to "Table 3 Disc ෳᾖޕ
distinction information" about the
contents of a value.
61 Disc Type Disc Type They are the contents at the time of &KUE 6[RG ࠺ࠖࠬࠢ ࠺ࠖࠬࠢ⒳ߩౝኈޕ
disc type. ⒳ ୯ߩౝኈߪޟ㧠࠺ࠖࠬࠢ⒳ᖱႎޠ
Please refer to "Table 4 Disc ෳᾖޕ
classification information" about the
contents of a value.
62 PO error Error rate PO error detection number is invalid 21 ⺋ࠅᬌᢙ ࠛ %& ᤨߪ 21 ⺋ࠅᬌᢙߪήലޕ
detection at the time of CD operation. ߣࠕ࠼ࠬ ࠻
number and
address
15
DVD-2200 16
16
DVD-2200 17
Mirr Count Mirr Width FZC Count PI Level /KTT %QWPV /KTT 9KFVJ (<% %QWPV 2+ .GXGN
No Disc Except 2 - - - 0Q &KUE ߣ એᄖ
and 3
%& 㜞 Z'& એ Z એ
CD High reflec- 2 More than - More than
tion 0x8ED 0x99 %& ૐ Z'& એ Z એਅ
CD Low reflec- 2 More than - Less than &8& 㜞 Z' એਅ Z એ
tion 0x8ED 0x98 &8& ૐ Z' એਅ Z એਅ
DVD High 2 Less than 1 More than &8& ጀ Z' એਅ
reflection 0x8E9 0x81
5#%& *[DTKF
DVDLow reflec- 2 Less than 1 Less than
tion 0x8E9 0x80 2+ NGXGN ⸘▚ᑼ㧦2+ NGXGN
8 ᷹ቯ୯ ¸
DVD 2-layer 2 Less than 2 - ߪήല
0x8E9
SACD Hybrid 3 - - -
17
DVD-2200 18
TROUBLE SHOOTING
1. GU-3570 MAIN PWB
1.1. FL TUBE doesnít light
(1) Check the Set-up process of Panel μ-COM
O.K.
O.K.
O.K.
O.K.
O.K.
18
DVD-2200 19
O.K.
O.K.
O.K.
O.K.
O.K.
O.K.
19
DVD-2200 20
O.K.
O.K.
END
O.K.
O.K.
20
DVD-2200 21
END
O.K.
END
O.K.
O.K.
END
21
DVD-2200 22
Check communication.
• [VSTEM]: communication Check soldering
N.G.
"L"--"H" level alternate? • [IC404]
• R437--R449.
O.K.
O.K.
O.K.
END
22
DVD-2200 23
O.K.
O.K.
(2) SACD
O.K.
23
DVD-2200 24
O.K.
O.K.
24
DVD-2200 25
O.K.
O.K.
O.K.
N.G.
Check IC704. Check soldering.
RESET "H"? • [IC704]
O.K.
N.G.
Check IC601. Check soldering.
RESET "H"? • [IC601]
O.K.
N.G.
Check IC704. Check soldering.
RESET "H"? • [IC704]
25
DVD-2200 26
1. SETTING ࠶࠹ࠖࡦࠣᚻ㗅
(1) Connect the monitor TV to the video output terminal.
࠶࠻ߩ 8+&'1 176 ┵ሶߦ࠹ࡆࡕ࠾࠲ࠍធ⛯ߔࠆޕ
(2) Connect the oscilloscope to the Y-signal and C-signal of
࠶࠻ߩ 5 8+&'1 176 ┵ሶ߆ࠄ ; ାภߣ % ାภࠍߘࠇ
S-VIDEO output terminal and each terminate at 75 Ohms. ߙࠇࠝࠪࡠࠬࠦࡊ㧔⚳┵ᛶ᛫㧦ǡ㧕ߦធ⛯ߔࠆޕ
(3) Connect the oscilloscope to the Y-signal, PB-signal and
࠶࠻ߩ %1/210'06 8+&'1 176 ߩฦ┵ሶ㧔;2$24㧕ࠍߘ
PR-signal of Component video output terminal and each ࠇߙࠇࠝࠪࡠࠬࠦࡊ㧔⚳┵ᛶ᛫㧦ǡ㧕ߦធ⛯ߔࠆޕ
terminate at 75 Ohms. ̪ ǡ ᛶ᛫ߪ 㧑ຠࠍ↪ߔࠆޕ
̪ Use the 75 Ohms resistance must be 1%
&8& ࠹ࠬ࠻࠺ࠖࠬࠢ㧦&8&65 ࠍ↪ᗧߔࠆޕ
(4) DVD test disc : DVDT-S01
Ḱᚻ㗅
2.2. Preparation
࠶࠻ߩ #% ࠦ࠼ࠍࠦࡦࡦ࠻߳ᝌߒߩ࠻࠶ޔ㔚
(1) power on. Ḯࠍ 10 ߔࠆޕ
(2) Set the [SOURCE] selector knob : DVD
࠶࠻ߩޟ12'0%.15'ࠍࡦ࠲ࡏޠߒ࠻ࠗࠍ㐿߈࠻ޔ
(3) Push [OPEN/CLOSE] button, then open the Disc Tray. ࠗߦ &8& ࠹ࠬ࠻࠺ࠖࠬࠢ㧔&8&65㧕ࠍ࠶࠻ᓟޔ
(4) Set DVD test disc (DVDT-S01) on the Disc Tray, and ޟ%.15'? ࡏ࠲ࡦࠍߔޕ
then push [CLOSE] button.
࠶࠻␜▤ߦ 5612 ߇␜ߐࠇߡ߆ࠄޔ2.#; ࡏ࠲
(5) FL display appear "STOP", push [PLAY] button to play- ࡦࠍߒࠍࠢࠬࠖ࠺ޔౣ↢ߔࠆޕ
back DVD.
ࡕࠦࡦߢ 8+&'1 ജࠍࠗࡦ࠲ࠬࡕ࠼ߦ⸳ቯߔ
(6) Set the Video output to INTERLACED by remote control ࠆޕ
unit.
ࡕࠦࡦߩ &+52.#; ࡏ࠲ࡦࠍߒࠣࡈࠖࠞ࡞࡙
(Push the [SETUP] button, set to the mode of ࠩࠗࡦ࠲ࡈࠚࠗࠬ
)7+ ↹㕙ࠍߔޕ
VIDEO SETUP.)
⇟ภࡏ࠲ࡦߩࠍࡦ࠲ࡏޠޟߒޔ6KVNG ࠍㆬᛯߔ
(7) Push the [DISPLAY] button of remote control unit and
ࠆޕ
then appear the ON-Screen Display (GUI) on the monitor
'ޟ06'4ࠍࡦ࠲ࡏޠߒޔ6KVNG ࠍౣ↢ߔࠆ㧔㧑ࠞ
TV.
ࡃାภ㧕ޕ
(8) Push the [12] button, select title 12 of DVD.
(9) Push the [ENTER] button, playback title 12. (color bar
75%)
26
DVD-2200 27
Y
Y
C
C
ࡊࡠࠣ࠶ࠪࡉߩ ; ାภࡌ࡞
Y-signal
PB
PB
PB-signal 2$ ାภࡌ࡞
27
DVD-2200 28
PR PR
24 ାภࡌ࡞
PR-signal
28
DVD-2200 30
SEMICONDUCTORS
Only major semiconductrors are shown, general semiconducors etc. are omitted to list.
ਥߥඨዉࠍ⸥タߒߡ߹ߔޕ᳢↪ߩඨዉߪ⸥タࠍ⋭⇛ߒߡ߹ߔޕ
1. ICís
Note: Abbreviation ahead of IC No. indicates the name of P.W.B., etc.
ᵈ +% 0Q ߩ೨ߩ⸥ภߪޔၮ᧼ߩฬ⒓ࠍߒ߹ߔޕ
MA: Main P.W.B.
AU: Audio/Power/Display P.W.B.
VI: Video P.W.B.
SC: Scart P.W.B.
DA3 (SLED2_TILT)
DA2 (FSCON)
DA0 (TSCON)
DA1 (SLED)
GPWM5
GPWM4
GPWM3
GPWM2
GPWM1
GPWM0
SPWM2
SPWM1
DVDD18
DVDD18
DVDD33
AVDD33
XUCAS
XLCAS
XMWR
XMOE
XRAS
RD10
RD11
RD12
RD13
RD14
RD15
RA10
RA11
DVSS
DVSS
AVSS
RD9
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RA0
RA1
RA2
RA3
RA4
RA5
RA6
RA7
RA8
RA9
FG
156 155 154 153 152 151 150 149 148 147 146 145 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105
A/D
97 AD5
TEST6 165 96 AD4
TEST7 166 95 AD3
Test/Monitor Pin
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
DVDD33
ALCR
MSEL0
MSEL1
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
TESTSEL
MD0
MD1
MD2
MD3
MD4
MD5
DVSS
MD6
MD7
MALE
MCS
MWR
DVDD33
MRD
MRDY
MINT
SYSCK
DVDD18
XI
XO
DVSS
VDT7
VDT6
DVSS
VDT5
VDT4
VDT3
VDT2
VDT1
VDT0
HDRQ
XHAC
VEFG
XSHD
DCK
DRVIRQ
DRVRST
DVDD18
30
DVD-2200 31
Block Diagram
16/4M DRAM
Memory EDC
HF Data DVD manager
Slicer Demodulation
MPEG I/F Video
Data-PLL CD-DSP (DDCD)
VSTEM Serial
ASP ASP Serial I/F Serial I/F VSTEM
Command
CD-ROM
PWM Header Dec. DSP CLK/Mode
Spindle
ATC TZC TC
Audio I/F Audio
JTAG DSP CMD/
RSP MCU I/F MCU
Mecha
GIO Direction Data reg.
control ROM/RAM RAM ICU
D/A Servo
Servo A/D PWM control
singnal ICU Timer
Peri. CLK X'tal
31
DVD-2200 32
32
DVD-2200 33
33
DVD-2200 34
34
DVD-2200 35
M65776BFP (MA:IC101)
Top View
208 157
1
156
1
(●)TruSurround
#M65776BFP
JAPAN
xxxxxx
52 105
53 104
35
DVD-2200 36
Pin Assignment
No Name I/O No Name I/O No Name I/O No Name I/O
36
DVD-2200 37
Functions (Bit stream interface / SDRAM interfacial
PIN Name I/O Functions
37
DVD-2200 38
Functions (Host interface)
Pin Name I/O Functions
Video DAC
Pin Name I/O Functions
IREF I Reference current input.
AVRI I Reference voltage input.
BIAS1 I Bias voltage for the source of current.
BIAS2 I Bias voltage for the source of current.
PAY O Analog current output.(for Y)
PAB O Analog current output.(for Pb)
PAC O Analog current output.(for Pr)
DAOUTB O It fixed to Analog Ground..
AVDD33 Power +3.3V Analog Power supply.
AGND33 Power Analog Ground.
System service
Pin Name I/O Functions
38
DVD-2200 39
Sil504CM208 (VC: IC701)
Top View
BypPLLMemClk
ExtRefXtalIOut
HostRd_SDA
HostWr_SCL
ExtRefXtalIn
MemData16
MemData17
MemData18
MemData19
MemData20
MemData21
MemData22
MemData23
MemData31
MemData30
MemData29
MemData28
MemData27
MemData26
MemData25
MemData24
MemData15
VidlnData9
VidlnData8
VidlnData7
VidlnData6
VidlnData5
VidlnData4
VidlnData3
VidlnData2
HostAddr5
HostAddr4
HostAddr3
HostAddr2
HostAddr1
HostAddr0
GNDCore
GNDCore
VDDCore
VDDCore
VidlnClk
HostCS
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
VDDIO
VDDIO
VDDIO
RSVD
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
HostAddr6 157 104 RSVD
HostAddr7 158 103 RSVD
HostMode 159 102 GNDCore
VDDCore 160 101 MemClk
HostClk 161 100 GNDCore
GNDCore 162 99 VDDCore
HostData15\VidlnData19 163 98 MemData14
HostData14\VidlnData18 164 97 MemData13
HostData13\VidlnData17 165 96 MemData12
HostData12\VidlnData16 166 95 MemData11
GNDCore 167 94 MemData10
VDDCore 168 93 GNDIO
HostData11\VidlnData15 169 92 MemData9
HostData10\VidlnData14 170 91 MemData8
HostData9\VidlnData13 171 90 PuPdDis
HostData8\VidlnData12 172 89 VDDIO
RSVD 173 88 MemData0
HostData7\VS 174 87 MemData1
HostData6\HS 175 86 MemData2
HostData5 176 85 GNDIO
HostData4 177 84 MemData3
HostData3 178 83 MemData4
HostData2
HostData1
179
180
TOP VIEW 82
81
MemData5
MemData6
HostData0 181 80 MemData7
VDDIO 182 79 GNDIO
GNDIO 183 78 DQM
Det32PD 184 77 WE
Det22PD 185 76 CAS
DetVideo 186 75 RAS
DeintDone 187 74 VDDIO
MemAddr12 188 73 VDDIO
VDDIO 189 72 GNDIO
GNDIO 190 71 RSVD
SDOut 191 70 MemAddr11
WSOut 192 69 MemAddr10
SCKOut 193 68 MemAddr9
VDDIO 194 67 MemAddr8
SDIn 195 66 GNDIO
WSIn 196 65 MemAddr7
SCKIn 197 64 MemAddr6
GNDIO 198 63 MemAddr5
VDDCore 199 62 MemAddr4
Reset 200 61 GNDIO
Test0 201 60 MemAddr0
Test1 202 59 MemAddr1
BypPLLClk54_72M 203 58 MemAddr2
Clk54_72M 204 57 MemAddr3
VDDCore 205 56 VDDCore
GNDCore 206 55 GNDCore
ARTN 207 54 RSVD
AVDD 208 53 RSVD
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
1
2
3
4
5
6
7
8
9
RSVD
Green_Y0
Green_Y1
Green_Y2
Green_Y3
Green_Y4
Green_Y5
Green_Y6
Green_Y7
Green_Y8
Green_Y9
Red_Cr0
Red_Cr1
Red_Cr2
Red_Cr3
Red_Cr4
Red_Cr5
Red_Cr6
Red_Cr7
Red_Cr8
Red_Cr9
Clk48M
GNDIO
VDDIO
GNDIO
VDDIO
GNDIO
VDDCore
BypPLLClk48M
VDDCore
CBIank
VSync
HSync
VidOutClk
VDDCore
Blue_Cb0
Blue_Cb1
Blue_Cb2
Blue_Cb3
Blue_Cb4
Blue_Cb5
Blue_Cb6
Blue_Cb7
Blue_Cb8
Blue_Cb9
ExtRefSel
GNDCore
LCDPwrEn
CSync
GNDCore
GNDCore
GNDCore
39
DVD-2200 40
40
DVD-2200 41
CXD2753R (MA: IC401)
Pin Assignment
Blocks
41
DVD-2200 42
Terminal Functions
Pin Name I/O Functions
42
DVD-2200 43
43
DVD-2200 44
44
DVD-2200 45
lpu: Pull up input lpd: Pull down input Ai: Analog input
45
DVD-2200 46
M32102S6FP (MA: IC102)
46
DVD-2200 47
64M SDRAM (VI: IC401)
47
DVD-2200 48
M66005AFP (AU: IC101)
48
DVD-2200 49
ADV7190 (VI: IC705) For Europe model
VSO/CLAMP
PAL_NTSC
CSO_HSO
RESET
AGND
AGND
TTX
VAA
VAA
NC
NC
NC
NC
NC
NC
NC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
P0 1 48 RSET1
P1 2 47 VREF
P2 3 46 COMP 1
P3 4 45 DAC A
P4 5 44 DAC B
P5 6 43 VAA
P6 7 42 AGND
P7 8 TOP VIEW 41 DAC C
P8 9 40 DAC D
P9 10 39 AGND
P10 11 38 VAA
P11 12 37 DAC E
P12 13 36 DAC F
P13 14 35 COMP 2
P14 15 34 RSET2
P15 16 33 AGND
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
HSYNC
SCRESET/TRC/TR
AGND
AGND
VAA
AGND
CLKIN
VAA
VSYNC
BLANK
SDA
VAA
TTXREQ
CLKOUT
SCL
ALSB
1~16 P0-P15 I 8-Bit or 16-Bit 4:2:2 Multiplexed YCrCb Pixel Port. The LSB of the input data is set up on Pin P0.
17, 25, 29, 38,
43, 54, 63 VAA P Analog Power Supply (3.3V to 5V).
18, 24, 26, 33,
39, 42, 55, 64 AGND G Analog Ground.
HSYNC (Modes 1, 2, and 3) Control Signal. This pin may be configured to be an output
19 HSYNC I/O (Master Mode) or an input (Slave Mode) and accept Sync Signals.
VSYNC Control Signal. This pin may be configured as an output (Master Mode) or as an input
20 VSYNC I/O (Slave Mode) and accept VSYNC as a Control Signal.
Video Blanking Control Signal. This signal is optional. For further information see Vertical
21 BLANK I/O Blanking Data Insertion and BLANK Input section.
22 ALSB I TTL Address Input. This signal sets up the LSB of the MPU address.
23 TTXREQ O Teletext Data Request Output Signal, used to control teletext data transfer.
TTL Clock Input. Requires a stable 27 MHz reference clock for standard operation. Alternatively,
27 CLKIN I a 24.5454 MHz (NTSC) or 29.5 MHz (PAL) can be used for square pixel operation.
28 CLKOUT O Clock Output Pin.
30 SCL I MPU Port Serial Interface Clock Input.
31 SDA I/O MPU Port Serial Data Input/Output.
Multifunctional Input: Real-Time Control (RTC) Input, Timing Reset Input,
32 SCRESET/RTC/TR I Subcarrier Reset Input.
A 1200 ohm resistor connected from this pin to ground is used to control full-scale amplitudes of
34 RSET2 I the Video Signals from DACs D, E, and F.
35 COMP 2 O Compensation Pin for DACs D, E, and F. Connect a 0.1μF Capacitor from COMP2 toVAA.
36 DAC F O S-Video C/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
37 DAC E O S-Video Y/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
40 DAC D O Composite/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
41 DAC C O S-Video C/V/RED Analog Output. This DAC is capable of providing 4.33 mA output.
44 DAC B O S-Video Y/U/BLUE Analog Output. This DAC is capable of providing 4.33 mA output.
45 DAC A O Composite/Y/GREEN Analog Output. This DAC is capable of providing 4.33 mA output.
46 COMP 1 O Compensation Pin for DACs A, B, and C. Connect a 0.1μF Capacitor from COMP1 toVAA.
Voltage Reference Input for DACs or Voltage Reference Output (1.235V). An external VREF
47 VREF I/O cannot be used in 4x oversampling mode.
A 1200 ohm resistor connected from this pin to ground is used to control full-scale amplitudes of
48 RSET1 I the Video Signals from DACs A, B, and C.
The input resets the on-chip timing generator and sets the ADV7190/ADV7191 into default
49 RESET I mode. See Appendix 8 for Default Register Settings.
50 CSO_HSO O Dual function CSO or HSO Output Sync Signal at TTL Level.
Multifunction Pin. VSO Output Sync Signal at TTL level. CLAMP TTL Output Signals can be
51 VSO/CLAMP I/O used to drive external circuitry to enable clamping of all Video Signals.
52 PAL_NTSC I Input signal to select PAL or NTSC mode of operation, pin set to Logic 1 selects PAL.
53, 57~62 NC No Connect.
56 TTX I Teletext Data Input Pin.
49
DVD-2200 50
ADV7300 (VI:IC704)
S_HSYNC
S_VSYNC
CLKIN_B
GND_IO
DGND
VDD
S9
S8
S7
S6
S5
S4
S3
S2
S1
S0
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
VDD_IO 1 48 S_BLANK
Y0 2 47 R SET 1
Y1 3 46 VREF
Y2 4 45 COMP1
Y3 5 44 DAC A
Y4 6 43 DAC B
Y5 7 42 DAC C
Y6 8 TOP VIEW 41 VAA
Y7 9 40 AGND
VDD 10 39 DAC D
DGND 11 38 DAC E
Y8 12 37 DAC F
Y9 13 36 COMP2
C0 14 35 R SET 2
C1 15 34 EXT_LF
C2 16 33 RESET
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SPI/I2C
SDA_CLKSP
P_HSYNC
P_VSYNC
CLKIN_A
C3
C4
ALSB_SO
C5
C6
C7
C8
C9
SCLK_SI
P_BLANK
RTC_SCR_TR
ADV7300 Terminal Function
Pin No. Pin Name I/O Function
50
DVD-2200 51
CXD1881AR (MA: IC501)
SDATA
MNTR
SDEN
SCLK
V125
LINK
LCN
TPH
LCP
DFT
V33
V25
CE
FE
TE
PI
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
RX 49 32 MEVO
MEV 50 31 MIN
VNA 51 30 MLPF
FNN 52 29 MB
FNP 53 28 MP
DIP 54 27 MIRR
DIN 55 26 LDON
BYP 56 25 VNB
CXD1881AR
RFAC 57 24 CDPD
VPA 58 23 DVDPD
AIP 59 22 COLD
AIN 60 21 DVDLD
ATON 61 20 VC
ATOP 62 19 VPB
RFSIN 63 18 CD_E
RFDC 64 17 CD_F
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
DVDRFP
DVDRFN
A2
B2
C2
D2
CP
CN
CD_D
CD_C
CD_B
CD_A
51
DVD-2200 52
Block Diagram
ATON
RFAC
ATOP
FNN
FNP
DIN
AIN
DIP
AIP
62 61 60 59 53 52 55 54 57
FCCR b7-0 AGC HOLD HOLDEN
FBCR b6-0 RFCR b3 CDR b6
AGC CGR b1
DVDRFP 1 PROGRAMMABLE OUTPUT INHIBIT
ATT INPUT EQUALIZER FULL WAVE AGC
DVDRFN 2 MUX BIAS FILTER RECTIFIER CHARGE
DIFFERENTIATOR PUMP
RFSIN 63 4 2
SIGR b7-4 56 BYP
2 RFCR b5-4
ATT
SIGR b3 INPUT IMP SEL AGCO
INPUT RFCR b7-6 SSOUT 49 RX
SEL INPUT IMP Clamp
SEL & Env
2
CAR b1-0
2 Level
Env/Clamp TENV
DAC CCR b4-0
CAR b3-2
SIGDET FE offset
B+D
A W/LPF
5
A 12 GCA
SUM 70kHz +/-6dB, 4bit
B W/LPF Amp. Offset
CD_A 16 GCA GCA +/-4dB LPF GCA 40 FE
cancel
A+C
C W/LPF 4 FOCR b7-4
B 11 GCA PIOR b4-0 4
FS Gain 5 PI offset FOCR b3-0
D W/LPF 70kHz Pll
FO Gain
CD_B 15 GCA Offset
SIGR b2-0 LPF 38 PI
12dB is added cancel
MUX @ high gain mode
(CDR b5=1) CTCR b7 TOPHLD 35 TPH
C 10 GCA BCA DET COMP
A+D SEL 34 DFT
CD_C 14 GCA CBR b3-2 DAC
2
2
Buff
CBR b1-0 61 RFDC
D 9 GCA CGR b0
OUTPUT INHIBIT
B+C SEL
CD_D 13 GCA CTCR b3-0 4
3 CO Gain
SIGR b2-0 2
12dB is added TOPHLD Offset CAR b7-4
PDCR b3 @ high gain mode GCA 41 CE
cancel TE MASK SEL
CD/DVD (CDR b5=1) TOPHLD
4D 0-+8dB, 4bit
SUM 4 PI
CER b4-0 FE 42 MNTR
CE offset TE MON
6dB is added CE
V25 SEL
@ high gain mode RESUM V125
(CDR b5=1)
V25/3
3
CD_E 18 GCA PIOR b7-5
+3dB 44 LCP
+/-4dB CFR b2-0 3 LPF
CE-ATT ATT
CD_F 17 GCA GCA 43 LCN
CFR b3 Pol sel.
3 buff (Ð12dB)
CEPOL
4
RFCR b2-0 CDR b5
TRCR2 b3-0 High Gain
3B 7 CP
12dB is added
@ high gain mode 8 CN
(CDR b5=1)
Comp.
A2 3 GCA EQ
MUX SUB Offset TE
PHASE LPF GCA 39 TE
B2 4 GCA EQ DETECTOR cancel RST
6 3
C2 5 GCA EQ
CFR b7-5
PDCR b3 TRCR2 b7 CEFDB TRCR b5-0
PHASE CD/DVD CP/CN TR offset TR Gain
D2 6 GCA EQ DETECTOR Low lmp
for TE, FE & CE output ref.
3 VC
3 for PI output ref. V25/3 V25/2
RFCR b2-0 36 V125
TRCR b6
TRCR2 b6-4 DPD COMP HYS ON CDR b2
DPD EQ CHR b7-6 37 V25
VCI for servo input
Mirr Defect
Comp ATT VC 20 VC
TOP HLD
2
GCA
MUX
DVDPD 23
BENV
MUX 45 V33
CDPD 24 BTM HLD
Btm clamp Vref
MUX
& clip BTM ENV
CGR b5-4 CCR b7
MUX MUX DISK DET
Gain CDR b7
LINKEN
26 22 21 50 32 31 28 29 30 33 27 58 19 51 25
LDON
CDLD
DVDLD
MEV
MEVO
MIN
MP
MB
MLPF
LINK
MIRR
VPA
VPB
VNA
VNB
52
DVD-2200 53
Terminal Function
Input Pins
Name I/O Function
DVDRFP,DVDRFN I RF signal input
RFSIN I RF signal input
AIP,AIN I AGC amp. input
DIP,DIN I Analog input for RF single buffer
A,B,C,D I Photo detector interface input
A2,B2,C2,D2 I Photo detector interface input
CD A,B,C,D I CD photo detector interface input
CD E,F I CD photo detector interface input
MIN I RF signal input for mirror
DVDPD I APC input
CDPD I APC input
LDON I APC input ON/OFF (L:Open)
I Link signal input (L:Open)
LINK
O Mirror monitor output
Output Pins
Name I/O Function
ATOP,ATON O Differential attenuator output
FNP,FNN O Differential normal output
RFAC O Single end normal output
RFDC O RF signal output
FE O Focus error signal output
TE O Tracking error signal output
CE O Center error signal output
MEVO O RFDDC bottom envelope output
DFT O Defect output
MIRR O Mirror detected output
PI O Pull in signal output
DVDLD O APC output
CDLD O APC output
MNTR O Monitor output
53
DVD-2200 54
Analog Pins
Name I/O Function
BYP RF AGC integration capacitor connecting terminal
CP Differential phase tracking LPF terminal
CN Differential phase tracking LPF terminal
LCP Lens shift offset cancel LPF terminal
LCN Lens shift offset cancel LPF terminal
MP MIRR top hold terminal
MB MIRR bottom hold terminal
MEV RFDC bottom envelope terminal
MLPF Mirror LPF terminal
TPH PI top hold terminal
VC Reference voltage output
V125 Reference voltage output
RX Reference resistor input
54
DVD-2200 55
W986416DH (MA: IC104)
VCC 1 54 VSS
DQ0 2 53 DQ15
VCCQ 3 52 VssQ
DQ1 4 51 DQ14
DQ2 5 50 DQ13
VSSQ 6 49 VCCQ
DQ3 7 48 DQ12
DQ4 8 47 DQ11
VCCQ 9 46 VSSQ
DQ5 10 45 DQ10
DQ6 11 44 DQ9
VSSQ 12 43 VCCQ
DQ7 13 42 DQ8
VCC 14 41 VSS
LDQM 15 40 NC
WE 16 39 UDQM
CAS 17 38 CLK
RAS 18 37 CKE
CS 19 36 NC
BS0 20 35 A11
BS1 21 34 A9
A10/AP 22 33 A8
A0 23 32 A7
A1 24 31 A6
A2 25 30 A5
A3 26 29 A4
Vcc 27 28 Vss
1, 14, 27 VCC Power (+3.3V) Power for input buffers and logic circuit inside DRAM.
2, 4, 5, 7, 8, 10,
11, 13, 42, 44,
DQ0-DQ15 Data Input/Output Multiplexed pins for data output and input.
45, 47, 48, 50,
51, 53
3, 9, 43, 49 VCCQ Power (+3.3V) for I/O buffer Separated power from VCC, to improve DQ noise immunity.
6, 12, 46, 52 VSSQ Ground for I/O buffer Separated ground from VSS, to improve DQ noise immunity.
16 WE Write Enable Referred to RAS.
17 CAS Column Address Strobe Referred to RAS.
Command input. When sampled at the rising edge of the clock RAS, CAS
18 RAS Row Address Strobe
and WE define the operation to be executed.
Disable or enable the command decoder. When command decoder is
19 CS Chip Select
disabled, new command is ignored and previous operation continues.
Select bank to activate during row address latch time, or bank to read/write
20, 21 BS0, BS1 Bank Select
during address latch time.
Multiplexed pins for row and column address. Row address: A0-A11.
23~26, 22
A0-A11 Address Column address: A0-A7. A10 is sampled during a precharge command to
29~35
determine if all banks are to be precharged or bank selected by BS0, BS1.
28, 41, 54 VSS Ground Ground for input buffers and logic circuit inside DRAM.
36, 40 NC No Connection No Connection
CKE controls the clock activation and deactivation. When CKE is low,
37 CKE Clock Enable
Power Down mode, Suspend mode, or Self Refresh mode is entered.
38 CLK Clock Inputs System clock used to sample inputs on the rising edge of clock.
The output buffer is placed at Hi-Z (with latency of 2) when DQM is sampled
39, 15 UDQM, LDQM Input/Output mask high in read cycle. In write cycle, sampling DQM high will block the write
operation with zero latency.
55
DVD-2200 56
16M SDRAM (TOSP)-8 (MA: IC402)
37 N.C/RFU
36 UDQM
44 VDDQ
38 VDDQ
47 VSSQ
41 VSSQ
49 DQ15
48 DQ14
46 DQ13
45 DQ12
43 DQ11
42 DQ10
34 CKE
40 DQ9
39 DQ8
35 CLK
50 VSS
26 VSS
33 N.C
32 A9
31 A8
30 A7
29 A6
28 A5
27 A4
A2 23
A1 22
A3 24
VDD 25
VSSQ 10
DQ6 11
DQ7 12
VDDQ 13
LDQM 14
WE 15
CAS 16
RAS 17
CS 18
BA 19
A10/AP 20
A0 21
VDD 1
DQ0 2
DQ1 3
4
DQ2 5
DQ3 6
VDDQ 7
DQ4 8
9
DQ5
VSSQ
Terminal Function
Pin No. Pin Name Symbol Function
1 VDD Power Supply/Ground Power and ground for the input buffer and the core logic
2 DQ0 Data Input/Output Data input/output are mutiplexed on the same pin
3 DQ1 Data Input/Output Data input/output are mutiplexed on the same pin
4 VSSQ Data Output Power/Ground Isolated power supply and ground for the output buffer
5 DQ2 Data Input/Output Data input/output are mutiplexed on the same pin
6 DQ3 Data Input/Output Data input/output are mutiplexed on the same pin
7 VDDQ Data Output Power/Ground Isolated power supply and ground for the output buffer
8 DQ4 Data Input/Output Data input/output are mutiplexed on the same pin
9 DQ5 Data Input/Output Data input/output are mutiplexed on the same pin
10 VSSQ Data Output Power/Ground Isolated power supply and ground for the output buffer
11 DQ6 Data Input/Output Data input/output are multiplexed on the same pin
12 DQ7 Data Input/Output Data input/output are multiplexed on the same pin
13 VDDQ Data Output Power/Ground Isolated power supply and ground for the output buffer
14 L DQM Data Input/Output Mask Blocks data input when active
15 WE Write Enable Enables write operation and row precharge
16 CAS Column Address Strobe Latches column address on the positive going edge of the CLK at low
17 RAS Row Address Strobe Latches row address on the positive going edge of the CLK at low
Disables or enables device operation by masking or enabling all
18 CS Chip Select
inputs except CLK, CKE, and LDQM
19 BA Bank Select Address Selects bank to be activated during row address latch time
20 A10/AP Address Row/column addresses are multiplexed on the same pin
21 A0 Address Row/column addresses are multiplexed on the same pin
22 A1 Address Row/column addresses are multiplexed on the same pin
23 A2 Address Row/column addresses are multiplexed on the same pin
24 A3 Address Row/column addresses are multiplexed on the same pin
25 VDD Power Supply/Ground Power and ground for the input buffer and the core logic
26 VSS Power Supply/Ground Power and ground for the input buffer and the core logic
27 A4 Address Row/column addresses are multiplexed on the same pin
28 A5 Address Row/column addresses are multiplexed on the same pin
29 A6 Address Row/column addresses are multiplexed on the same pin
30 A7 Address Row/column addresses are multiplexed on the same pin
31 A8 Address Row/column addresses are multiplexed on the same pin
32 A9 Address Row/column addresses are multiplexed on the same pin
33 N. C No Connection No connect pin
34 CKE Clock Enable Masks system clock to freeze operation from the next clock cycle
35 CLK System Clock Active on the positive going edge to sample all inputs
36 U DQM Data Input/Output Mask Blocks data input when active
37 N. C/RFU NC/Reserved No connect pin
38 VDDQ Data Output Power/Ground Isolated power supply and ground for the output buffer
39 DQ8 Data Input/Output Data input/output are multiplexed on the same pin
40 DQ9 Data Input/Output Data input/output are multiplexed on the same pin
41 VSSQ Data Output Power/Ground Isolated power supply and ground for the output buffer
42 DQ10 Data Input/Output Data input/output are multiplexed on the same pin
43 DQ11 Data Input/Output Data input/output are multiplexed on the same pin
44 VDDQ Data Output Power/Ground Isolated power supply and ground for the output buffer
45 DQ12 Data Input/Output Data input/output are multiplexed on the same pin
46 DQ13 Data Input/Output Data input/output are multiplexed on the same pin
47 VSSQ Data Output Power/Ground Isolated power supply and ground for the output buffer
48 DQ14 Data Input/Output Data input/output are multiplexed on the same pin
49 DQ15 Data Input/Output Data input/output are multiplexed on the same pin
50 VSS Power Supply/Ground Power and ground for the input buffer and the core logic
56
DVD-2200 57
FAN8042 (MA: IC508)
Pin Assignments
OPOUT1
OPOUT2
OPIN1+
OPIN1-
OPIN2+
PVCC1
OPIN2-
SVCC
VREF
PS
GND
GND
48 47 46 45 44 43 42 41 40 39 38 37
IN1+ 1 36 DO1+
IN1- 2 35 DO1-
OUT1 3 34 DO2+
IN2+ 4 33 DO2-
IN2- 5 32 DO3+
GND 6
FAN8042 31 GND
GND 7 30 GND
OUT2 8 29 DO3-
IN3+ 9 28 DO4+
IN3- 10 27 DO4-
OUT3 11 26 DO5+
IN4+ 12 25 DO5-
13 14 15 16 17 18 19 20 21 22 23 24
SGND
OUT4
FWD
GND
GND
REV
MUTE4
CTL
PVCC2
IN4-
MUTE123
TSD-M
57
DVD-2200 58
Pin Definitions
Pin Number Pin Name I/O Pin Function Descrition
1 IN1 I CH1 op-amp input ( )
2 IN1 I CH1 op-amp input ( )
3 OUT1 O CH1 op-amp output
4 IN2 I CH2 op-amp input ( )
5 IN2 I CH2 op-amp input ( )
6 GND - Ground
7 GND - Ground
8 OUT2 O CH2 op-amp output
9 IN3+ I CH3 op-amp input (+)
10 IN3 I CH3 op-amp input ( )
11 OUT3 O CH3 op-amp output
12 IN4+ I CH4 op-amp input (+)
13 IN4 I CH4 op-amp input ( )
14 OUT4 O CH4 op-amp output
15 CTL I CH5 motor speed control
16 FWD I CH5 forward input
17 REV I CH5 reverse input
18 GND - Ground
19 GND - Ground
20 SGND - Signal Ground
21 MUTE123 I Mute for CH1,2,3
22 MUTE4 I Mute for CH4
23 TSD-M O TSD monitor
24 PVCC2 - Power supply voltage 2 (For CH4, CH5)
25 DO5- O CH5 drive output (-)
26 DO5+ O CH5 drive output (+)
27 DO4 O CH4 drive ouptut ( )
28 DO4+ O CH4 drive output (+)
29 DO3 O CH3 drive ouptut ( )
30 GND - Ground
31 GND - Ground
32 DO3+ O CH3 drive output (+)
33 DO2 O CH2 drive ouptut ( )
34 DO2+ O CH2 drive output (+)
35 DO1 O CH1 drive ouptut ( )
36 DO1+ O CH1 drive output (+)
37 PVCC1 - Power supply voltage 1 (FOR CH1, CH2, CH3)
38 PS I Power save
39 OPOUT2 O Normal op-amp2 output
40 OPIN2 I Normal op-amp2 input ( )
41 OPIN2+ I Normal op-amp2 input (+)
42 GND - Ground
43 GND - Ground
44 VREF I Bias voltage input
45 SVCC - Signal & OPAMPs supply voltage
46 OPOUT1 O Normal op-amp1 output
47 OPIN1 I Normal op-amp1 input ( )
48 OPIN1+ I Normal op-amp1 input (+)
58
DVD-2200 59
POWER
SAVE
IN1+ 1 36 DO1+
40 K
IN1- 2 10K 35 DO1-
10K
40K
GND 7 30 GND
40K
OUT2 8 10 K 29 DO3-
10 K 40K
IN3+ 9 40K 28 DO4+
10 K
IN3- 10 10 K 27 DO4-
40K
OUT3 11 S M + D 26 DO5+
S
W C - D
IN4+ 12 25 DO5-
MUTE123 MUTE4 TSD-M
13 14 15 16 17 18 19 20 21 22 23 24
IN4- OUT4 CTL FWD REV GND GND SGND MUTE4 TSD-M PVCC2
MUTE123
40 K
10 K
DO+
From input opamp +
10K 40 K
Pref
10K 40 K
Vref +
DO-
10K
40K
59
DVD-2200 60
MX29LV160ABTC-90 (MA: IC103)
VCC
A15
A14
WE
NC
NC
NC
CE
Terminal Function
6
5
4
3
2
1
44
43
42
41
40
I/O12 7 39 A13
I/O11 8 38 A12 Pin Name Function
I/O10 9 37 A11 A0-A15 Address Inputs
I/O9 10 36 A10 CE Chip Enable
I/O8 11 35 A9 OE Output Enable
GND 12 34 GND WE Write Enable
NC 13 33 NC I/O0-I/O15 Data Inputs/Outputs
I/O7 14 32 A8
NC No Connection
I/O6 15 31 A7
I/O5 16 30 A6
I/O4 17 29 A5
18
19
20
21
22
23
24
25
26
27
28
I/O3
I/O2
I/O1
I/O 0
A0
A1
A2
A3
A4
OE
NC
60
DVD-2200 61
M11L16161SA (MA: IC503)
Vcc 1 44 Vss
I/O0 2 43 I/O15
I/O1 3 42 I/O14
I/O2 4 41 I/O13
I/O3 5 40 I/O12
Vcc 6 39 Vss
I/O4 7 38 I/O11
I/O5 8 37 I/O10
I/O6 9 36 I/O9
I/O7 10 35 I/O8
NC 11 34 NC
NC 12 33 NC
NC 13 32 CASL
WE 14 31 CASH
RAS 15 30 OE
NC 16 29 A9
NC 17 28 A8
A0 18 27 A7
A1 19 26 A6
A2 20 25 A5
A3 21 24 A4
Vcc 22 23 Vss
PIN DESCRIPTIONS
Address Input
18~21,24~29 A0~A9 Input Row Address:A0~A9
Column Address:A0~A9
15 RAS Input Row Address Strobe
31 CASH Input Column Address Strobe/Upper Byte Control
32 CASL Input Column Address Strobe/Lower Byte Control
14 WE Input Write Enable
30 OE Input Output Enable
2~5,7~10,
I/O0~I/O15 Input/Output Data Input/Output
35~38,40~43
1,6,22 Vcc Supply Power,(5V or 3.3V)
23,39,44 Vss Ground Ground
11,12,13,16,
NC - No Connect
17,33,34
61
DVD-2200 62
AN8471SA (MA: IC505)
( )
32 17 Pin No. Pin Name Function
1 VHB Hall bias pin
2 H3L Hall element 3 input (-)
3 H3H Hall element 3 input (+)
4 H2L Hall element 2 input (-)
5 H2H Hall element 2 input (+)
1 16 6 H1L Hall element 1 input (-)
7 H1H Hall element 1 input (+)
VPUMP
VDD
VM1
BC4
BC3
BC2
BC1
VLP
8 EC Torque command input pin
18 16 15 14 13 12 32 31 9 ECR Torque command ref. input pin
10 FG1 FG signal lout put pin (0.C)
OSC
Booster 11 START Start/Stop switching pin
FG2 20
Logic Circuit
62
DVD-2200 63
DSD1791DBR (AU: IC301, 302, 303)
PLRCK 1 28 MS
PBCK 2 27 MC
PDATA 3 26 MDI
DBCK 4 25 DSDL
SCK 5 24 DSDR
RST 6 23 ZEROL
VDD 7 22 ZEROR
DGND 8 21 VCCF
AGNDF 9 20 VCCL
VCCR 10 19 AGNDL
AGNDR 11 18 VOUTL–
VOUTR– 12 17 VOUTL+
VOUTR+ 13 16 AGNDC
VCOM 14 15 VCCC
Block Diagram
PLRCK
Audio Current VOUT L
PBCK Segment
Data Input
PDATA I/F DAC VOUT L+
and
I/V Buffer
Current VOUT R+
MDI Function Segment
MC Control DAC VOUT R
I/F and
MS I/V Buffer
VCCC
VCCR
SCK
AGNDF
VCCL
AGNDC
AGNDR
AGNDL
63
DVD-2200 64
Terminal Functions
TERMINAL
I/O DESCRIPTIONS
NAME PIN
PLRCK 1 I Left and right clock (fs) input for PCM-format operation. WDCK clock input in external DF mode.
Connected to ground in DSD mode (1)
PBCK 2 I Bit clock input for PCM mode. Connected to GND for DSD mode (1)
PDATA 3 I Serial audio data input for PCM mode (1)
DBCK 4 I Bit clock input for DSD mode. Connected to ground in PCM mode (1)
SCK 5 I System clock input (1)
RST 6 I Reset (1)
VDD 7 Digital power supply, 3.3V
DGND 8 Digital ground
AGNDF 9 Analog ground (DACFF)
VCCR 10 Analog power supply (R-channel I/V), 5 V
AGNDR 11 Analog ground (R-channel I/V)
VOUTR 12 O R-channel analog voltage output
VOUTR+ 13 O R-channel analog voltage output +
VCOM 14 Internal bias decoupling pin
VCC C 15 Analog power supply (internal bias and current DAC), 5 V
AGNDC 16 Analog ground (internal bias and current DAC)
VOUT L+ 17 O L-channel analog voltage output +
VOUT L 18 O L-channel analog voltage output
AGNDL 19 Analog ground (L-channel I/V)
VCC L 20 Analog power supply (L-channel I/V), 5 V
VCC F 21 Analog power supply (DACFF), 5 V
ZEROR 22 O Zero flag for R-channel
ZEROL 23 O Zero flag for L-channel
DSDR 24 I R-channel data input for DSD mode and external DF mode (1)
DSDL 25 I L-channel data input for DSD mode and external DF mode (1)
MDI 26 I/O Mode control data input (2)
MC 27 I Mode control clock input (1)
MS 28 I/O Mode control chip select (2)
Notes: (1) Schmitt-trigger input, 5-V tolerant
(2) Schmitt-trigger input and output, 5-V tolerant
64
DVD-2200 65
PIC18LC242-I/SO (VI: IC703)
MCLR 1 28 RB7
RA0 2 27 RB6
RA1 3 26 RB5
RA2 4 25 RB4
RA3 5 24 RB3
RA4 6 23 RB2
RA5 7 22 RB1
VSS
TOP VIEW INT0
8 21
OSC1 9 20 VDD
OSC2 10 19 VSS
RC0 11 18 RC7
RC1 12 17 RC6
RC2 13 16 RC5
RC3 14 15 RC4
1 MCLR I Master Clear (Reset) input. This pin is an active low RESET to the device.
2 RA0 I/O Digital I/O.
3 RA1 I/O Digital I/O.
4 RA2 I/O Digital I/O.
5 RA3 I/O Digital I/O.
6 RA4 I/O Digital I/O. Open drain when configured as output.
7 RA5 I/O Digital I/O.
8 VSS P Ground reference for logic and I/O pins.
Oscillator crystal input or external clock source input.
9 OSC1 I
ST buffer when configured in RC mode. CMOS otherwise.
10 OSC2 O Oscillator crystal output. Connects to crystal or resonator in Crystal Oscillator mode.
11 RC0 I/O Digital I/O.
12 RC1 I/O Digital I/O.
13 RC2 I/O Digital I/O.
14 RC3 I/O Digital I/O.
15 RC4 I/O Digital I/O.
16 RC5 I/O Digital I/O.
17 RC6 I/O Digital I/O.
18 RC7 I/O Digital I/O.
19 VSS P Ground reference for logic and I/O pins.
20 VDD P Positive supply for logic and I/O pins.
21 INT0 I External Interrupt 0.
22 RB1 I/O Digital I/O.
23 RB2 I/O Digital I/O.
24 RB3 I/O Digital I/O.
25 RB4 I/O Digital I/O. Interrupt-on-change pin.
26 RB5 I/O Digital I/O. Interrupt-on-change pin.
27 RB6 I/O Digital I/O. Interrupt-on-change pin. ICSP programming clock.
28 RB7 I/O Digital I/O. Interrupt-on-change pin. ICSP programming data.
Legend: O=Output
I=Input
P=Power
65
DVD-2200 66
BH7860FP (VI: IC706, 707) IC707 for Europe model
CRRAP 01 25 COUT
6dB 75ohm
VCC 06 20 YTRAP
N.C. 07 N.C.
VCC 08 19 YOUT
CbIN 09 3M 18 YFB
LPF
20k
GND 10 17 GND
Functions
Pin No. Pin Name Functions
1,13,15,20 CTRAP LC oscillation terminal
CbTRAP
CrTRAP
YTRAP
2 MUTE Mute control. If MUTE is set to "L", five channels will be muted simultaneously.
3,9,11 CIN Signal input.
CbIN Chroma signal. The bias type input terminal.
CrIN Input impedance: 20kohms.
4,10,17,21 GND It fixed to ground.
5 YIN Signal input.
Input terminal of a luminance signal. Di clamp input .
6,8 VCC VCC of 6 and 8 pins does not connected inside. Use it by connection externally
C, MIX and Y connect with Vcc of 6 pin. Cb and Cr connect with VCC of 8 pin.
12 SEL C/CbCr select.
Cb and Cr are turned off if SEL is set to "L"
.
14,16 CrOUT Signal output.
CbOUT Color difference signal output.
18,19 YFB Signal output.
YOUT Luminance signal output.
22,23 MIXFB Signal output.
MIXOUT Y/C MIX signal output.
24 TEST TEST terminal. Usually, please short circuit with GND.
25 COUT Signal output. Chroma output terminal.
66
DVD-2200 67
SM8707EU (MA: IC105)
Top View
VDD1 1 16 NC
VSS1 SO2
MO1 FSEL
MO2 SO1
VDD2 VDD3
VSS2 VSS3
VT1 AO2
XTO 8 9 AO1
Block Diagram
FSEL
SO1
Control
Reference Phase Charge Logic
LPF 1 VCO 1
Divider 1 Divider 1 Pump 1
SO2
Loop
MO1
Divider 1
MO2
Functions
67
DVD-2200 68
4 Vin 3 Drain
DRV.REC=8.6V
T.S.D 2 Source
VIN
S
D
GND
O.C.P./F.B.
Vth1=0.73±0.05V 1 OCP/FB
+
OCP/FB comp.
1.35mA
OSC
Vth2=1.3~1.6V
+
INH comp.
Tth(min)=1 S
5 GND
TOP VIEW
ANODE COLLECTOR
CATHODE EMITTER
HAT2053M IMD3A
1 25 6
DDD D (4) (5) (6)
TOP VIEW 10k
4 5 6
R1 R2
1 6
3 TOP
2 5 G 10k
VIEW
DTr1
3 4 DTr2
3 2 1 10k
S 10k
4 R2 R1
4 Source
3 Gate (3) (2) (1)
1,2,5,6 Drain
68
DVD-2200 69
PIN CONNECTION
54 4 44 4 44 4 44 3 3333 3 3 3 33 22 22 222 2 2211 1 11 11 11 1
PIN NO. 09 8 76 5 43 2 10 9 8765 4 3 2 10 98 76 543 2 1098 7 65 43 21 09 87 6 543 2 1
P P P P P P PPPP PP P P P P P P 1 11 111
CONNECTION 2 2 22 2 2 2211 1 1 1 1 1 1 1 1 P P P P P P P P P N NN 5 4 3 1 2 3 4 5 6 7 8 9 0 1 2 NNN F
7 6 54 3 2 1098 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 C C C G GG G G G G G G G G G G G G P P X +
NOTE 1) F-,F+ ---------- Filament
666555555555 2) NP ------------- No pin
PIN NO. 210987654321 7) NC ------------ No connection
PPPPPPPP (NC pin should be electorically open on the PC board)
CONNECTION F N N N 2 2 3 3 3 3 3 3 4) DL ------------ Datum line
- X PP 8 9 0 1 2 3 4 5 5) 1G~15G ----- Grid
GRID ASSIGNMENT
1G 2G 3G 4G 5G 6G 7G 8G 9G 10G 11G 12G 13G 14G 15G
ANODE CONNECTION
69
COMPONENT SIDE
COMPONENT SIDE
DVD-2200 76
l Resistors
Ex.: RN 14K 2E 182 G FR
RN 14K 2E 182 G FR
Type Shape Power Resist- Allowable Others
and per- ance error
formance
l Capacitors
Ex.: CE 04W 1H 2R2 M BP
CE 04W 1H 2R2 M BP
Type Shape Dielectric Capacity Allowable Others
and per- strength error
formance
CE : 0J : 6.3 V F ±1%
: HS :
CE : Aluminum foil 0J : 6.3V F : ±1% HS : High stability type CA : 1A : 10 V G ±2%
: BP :
electrolytic CS : 1C : 16 V J ±5%
: HR :
CA : Aluminum solid 1A : 10V G : ±2% BP : Non-polar type
electrolytic CQ : 1E : 25 V K ±10%
: DL :
CS : Tantalum electrolytic 1C : 16V J : ±5% HR : Ripple-resistant type CK : 1V : 35 V M ±20%
: HF :
CQ : Film 1E : 25V K : ±10% DL : For change and discharge CC : 1H : 50 V Z +80%
: U : UL
CK : Ceramic 1V : 35V M : ±20% HF : For assuring high
requency CP : 2A : 100 V −20% C : CSA
CC : Ceramic 1H : 50V Z : +80% U : UL part CM : 2B : 125 V P : +100% W : UL-CSA
CP : Oil 2A : 100V –20% C : CSA part CF : 2C : 160 V − 0% F :
CM : Mica 2B : 125V P : +100% W : UL-CSA type
CF : Metallized 2C : 160V –0% F : Lead wire forming CH : 2D : 200 V C : ±0.25pF
CH : Metallized 2D : 200V C : ±0.25pF 2E : 250 V D : ±0.5pF
2E : 250V D : ±0.5pF 2H : 500 V = :
2H : 500V = : Others
2J : 630V 2J : 630 V
• When the dielectric strength is indicated in AC, "AC" is included after the dieelectric
strength value.
76
DVD-2200 77
PARTS LIST OF P.W.B. UNIT ASS’Y (FOR U.S.A. & CANADA MODEL)
GU-3570 MAIN UNIT
Ref. No. Part No. Part Name Remarks New
SEMICONDUCTORS GROUP
RESISTORS GROUP
77
DVD-2200 78
78
DVD-2200 79
79
DVD-2200 80
CAPACITORS GROUP
80
DVD-2200 81
81
DVD-2200 82
82
DVD-2200 83
83
DVD-2200 84
84
DVD-2200 85
85
DVD-2200 86
RESISTORS GROUP
86
DVD-2200 87
CAPACITORS GROUP
87
DVD-2200 88
88
DVD-2200 89
89
DVD-2200 90
90
DVD-2200 91
RESISTORS GROUP
91
DVD-2200 92
92
DVD-2200 93
CAPACITORS GROUP
93
DVD-2200 94
94
DVD-2200 95
95
DVD-2200 96
RESISTORS GROUP
96
DVD-2200 97
97
DVD-2200 98
98
DVD-2200 99
CAPACITORS GROUP
99
DVD-2200 100
100
DVD-2200 101
101
DVD-2200 102
102
DVD-2200 103
103
DVD-2200 104
104
DVD-2200 105
RESISTORS GROUP
105
DVD-2200 106
CAPACITORS GROUP
106
DVD-2200 107
107
DVD-2200 108
108
DVD-2200 109
109
DVD-2200 110
RESISTORS GROUP
110
DVD-2200 111
111
DVD-2200 112
CAPACITORS GROUP
112
DVD-2200 113
113
DVD-2200 114
114
DVD-2200 115
RESISTORS GROUP
CAPACITORS GROUP
115
DVD-2200 116
116
30
29
101
108
31
104
10
3
102
102
100
12
9
100
11 100
34
33
108
32
1
100
103
Europe model only
101 13
101
7
5
8
6 100
25
102
102
27
28
20 23
24
106
22 24
105
19
17
16
21 2
26
21 100 WARNING:
14 Parts marked with
characteristics.
Use ONLY replace
15 manufacturer.
18
20
DVD-2200 118
SCREWS
118
DVD-2200 119
119
DVD-2200 120
120
DVD-2200 121
SCREWS
121
3
4
26
47
32
30
63
8
44
38
2
33
43 34
12 37
15 39
28
42
43
40
35
52
21 29
1 23
27
6
21
70
5 51
23
71 51
7
49
24
11 49
48
23
24
54 24
49
24
68
17 24
10 16
4
25
18 64
DVD-2200 123
123
DVD-2200 124
124
*As for greasing to the R rail
groove and groove's side edge,
apply grease to the outer face
"intentionally".
(Not only running a brush into
the groove, use it with pressing
to the outer face consciously.)
After applying , check especially for the front 3 ribs outer side
in order not to be insufficient greasing.
Froil KG 423
After attaching plate spring,
apply to the TRAY side of
the plate spring.
54
Main Chassis
DVD-2200 126
PACKING VIEW
201 208
210
209
210
212
Ref.
Part No. Part Name Remarks Q'ty New
No.
126
CX041 CY131 CY041
4P PH GU-3343 13P FFC 4P PH
AC N LET SCART PWB UN T
CX024 (E2 MODEL ONLY)
WIRING DIAGRAM
CX052 CX054
GU-3571-2
CX101 5P PH 5P PH
10P TUCP
POWER UN T
CX331 CY331
CX241
24P FFC 33P FFC 33P FFC
&8& &4+8' /'%*#
70+6 CX151
15P FFC
CX052
5P PH
CX271 CY271
27P FFC 27P FFC
CX171
17P FFC
Key UN T
CW061 CY171
GU-3571-4
6P SAN 17P FFC
CX055 CW055
GU- 3571-3 D SPLAY UN T
LED UN T MSA-9110S-5L MSA-9176B-5L
CW031
GU-3571-5 3P SAN
DVD-2200
CZ031
3P SAN
127
DVD-2200 128
NOTICE: ᵈ㧕
Measuring Disc: DVD/DVDT-S01 TDV-520A ᷹ቯ࠺ࠖࠬࠢ㧦&8&&8&65 6&8#
CD/TCD-784 %&6%&
(It is better to use wires for extending between the 㧔࠹ࠬ࠻ࡐࠗࡦ࠻ߣࡊࡠࡉ㑆ߦᑧ㐳ࡢࠗࡗࠍ↪ߔࠆߩ߇
probe and test points.) ࠃࠅ⦟ᣇᴺߢߔޕ㧕
• When watching the HF waveform, use the extending wire as •*( ᵄᒻࠍ᷹ⷰߔࠆ႐วߌߛࠆ߈ߢޔ⍴ᑧ㐳ࡢࠗࡗࠍ↪ߒ
short as possible. ߡߊߛߐޕ
• When HF waveform is noisy or cannot discriminate the eye- •*( ᵄᒻ߇ࡁࠗ࠭ߢਇ⍎⼂߇ࡦ࠲ࡄࠗࠕߪߚ߹ޔਇ⢻ߩ
pattern, replace the Traverse Unit after measuring the top. ႐วߪ NQR ᷹ቯᓟߦ࠻ࡃ࡙ࠬ࠾࠶࠻ࠍ឵ߒߡߊߛߐޕ
• Ԙ ~ Ԩ points have the certain test points shown below. •ࡐࠗࡦ࠻ߪԘ㨪Ԩߪޔਅ࿑ߩࠃ߁ߦ․ቯ࠹ࠬ࠻ࡐࠗࡦ࠻ઃ߈
ߢߔޕ
8 5 9 4
VC16
(Vref)
10
13
12
14 15 11 17 16 6 2 1
DVD-2200 129
WAVEFORMS
GU-3570 MAIN P.W.B.
Ԛ FSCON
ԝ TE
ԙ FE
Ԟ TSCON
Ԙ RFAC VC16 ԟ T+ ԧ PI
Ԡ T-
Ԩ MIRR
ԡ DMO
Ԣ FG
Ԙ RFAC VC16
ԣ A3
ԙ FE ԡ DMO
Ԛ FSCON Ԣ FG
ԛ F+
ԣ A3
Ԝ F-
ԙ FE ԝ TE
Ԛ FSCON Ԥ SLED
ԛ F+
ԥ SLD+
Ԝ F-
Ԧ SLD-
Ԛ FSCON
ԝ TE
ԙ FE
Ԟ TSCON
ԟ T+ ԧ PI
Ԡ T-
Ԩ MIRR
DVD-2200 130
A V1 V5
C V2 V6
D V3 V7
E V4 V8
17
13
7
9 8
3
4
5
2
3
4
1
E A
D
C
V1 V2
V6
V7
17
13
7
9 8
3
4
5
2
3
4
1
E A
D
C
V1 V2
V6
V7