;

;-------------------------------------------------------------------------
;
; 6801 ROM dump code
; RhinoPower
; 17th December 2009
;
; XTAL = 4MHz, E = 4MHz/6 = 666,666Hz
; Baud rate = 666,666/128 = 5208
;
;-------------------------------------------------------------------------
;
; start address of the external rom
;
start equ 0BF00h
;
; internal register equates
;
port1_ddr equ 00h
port2_ddr equ 01h
port1 equ 02h
port2 equ 03h
port3_ddr equ 04h
port4_ddr equ 05h
port3 equ 06h
port4 equ 07h
tcsr equ 08h
count_hi equ 09h
count_lo equ 0Ah
outcomp_hi equ 0Bh
outcomp_lo equ 0Ch
incap_hi equ 0Dh
incap_lo equ 0Eh
port3csr equ 0Fh
rmcr equ 10h
status equ 11h
rxbuff equ 12h
txbuff equ 13h
ram_ctrl equ 14h
;
rambot equ 80h ;start of RAM ???
;---------------------------------------------------------------------------
;
; Variables in RAM - can be viewed during save using bus analyser
;
topram equ 80h 1
tstreg equ 81h
;
;
;---------------------------------------------------------------------------
;
;
org start
;

ram ldx #rambot-1 ;Point to start of RAM minus one

ldaa #$55 ;Load test pattern
L1 inx ;Point to next memory location
staa 0,X ;Save value in RAM
 cmpa 0,X ;Compare acc. A against RAM content
beq L1 ;Branch if equal (test OK)
txs ;Initialize stack pointer
sts topram ;Save stack in location topram to remember top of RAM

init ldaa #09h ;baud = E/128, P22 is output

staa rmcr
ldaa #2
staa status ;enable transmitter
;
tstTX ldaa status ;test code to check TDRE
staa tstreg
;
dump ldx #$e000 ; X = start of internal rom
dump1 ldaa 0,x ;get byte
jsr pchar
inx
cpx #$0000
bne dump1
loop bra loop ;done stay here till reset
;
; print a char out the serial port
;
pchar psha ;save A
pchar1 ldaa status ;get comms status
anda #20h ;mask for tdre bit
beq pchar1 ;wait till empty
pula ;restore A
staa txbuff ;send it
rts
;
;
;
;------------------------------------------------------------------------
;
; Interrupt Service Routines
;
sci_tr bra sci_tr
;
tof_tr bra tof_tr
;
ocf_tr bra ocf_tr
;
icf_tr bra icf_tr
;
irq_tr bra irq_tr
;
swi_tr bra swi_tr
;
nmi_tr bra nmi_tr
;
;
;--------------------------------------------------------------------------
;
;
; Interrupt Vectors
;
org 0fff0h
;
sci_vec fdb sci_tr
tof_vec fdb tof_tr
ocf_vec fdb ocf_tr
icf_vec fdb icf_tr
irq_vec fdb irq_tr
swi_vec fdb swi_tr
nmi_vec fdb nmi_tr
st_vec fdb start