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ID NO: M11902076
NAND, NOR and XOR Gate
EXPERIMENT
Understand the symbols and characteristics of various logic gates.
EQUIPMENT REQUIRED
KL-31001 Digital Logic Lab, KL-33001 Basic Gate Experiment Module.
PREPARATION
PROCEDURE
2. Connect inputs A1, A2 to Data Switch SW0 and SW1 TTL level and output F1 to
Logic Indicator L1. Follow the input sequences below and record the output F1.
INPUT OUTPUT
STATE A2 A1 F1
1 0 0 1
2 0 1 1
3 1 0 1
4 1 1 0
(b) NOR gate Characteristics Measurement (Module KL-33001 Block d)
2. Connect inputs A3, A4 to Data Switch SW0 and SW1 TTL level and output F2 to
Logic Indicator L1. Follow the input sequences below and record the output F2.
INPUT OUTPUT
STATE A2 A1 F2
1 0 0 1
2 0 1 0
3 1 0 0
4 1 1 0
(c) XOR Gate Characteristics Measurement (Module KL-33001 Block d)
2. Connect inputs C4, C5 to Data Switch SW0 and SW1 TTL level and output F9 to
Logic Indicator L1. Follow the input sequences below and record the output F9.
INPUT OUTPUT
STATE C5 C4 F9
1 0 0 0
2 0 1 1
3 1 0 1
4 1 1 0