Excess-3

Excess-3 is a digital code related to BCD that is derived by adding 3 to

each decimal digit
1. self complementary BCD
code-
0011-1s--1100{ Excess-3}
0100---1s—1011

2. BCD—0000+1001=1001
0001+1000=1001

3. Decimal Number==
9s complement of 0=9-0=9
9s complement of 1=9-1=8
 AND GATE

1. The AND gate is a logic circuit that has two or more inputs and a single output.

2. If any of the inputs are 0s, the output is 0.

 OR GATE
1. An OR gate produces a 1 output if any of its inputs are 1s. The output is a 0 if all
the inputs are 0s.
 NOT GATE
1. The simplest logic circuit is the NOT gate.
2. It performs the function called inversion, or
complementation, and is commonly referred to as an
Inverter.
• The input to an inverter is labeled A and the output is labeled
(read “A NOT” or “NOT A”).

• The bar over the letter A indicates the complement of A.

 NAND GATE

1. A NAND gate is a combination of an inverter and an

AND gate.
• The algebraic formula for NAND-gate output is
 NOR GATE
1. A NOR gate is a combination of an inverter and
an OR gate. Its name derives from its NOT-OR
function.
2. Also shown is its equivalency to an OR gate and an
inverter.
• The algebraic expression for NOR-gate output is
 EXCLUSIVE -OR
• The XOR gate is a digital logic gate that implements an
exclusive or; that is, a true output (1/HIGH) results if one,
and only one, of the inputs to the gate is true.

• The algebraic output is written as

1. The complement of the XOR gate is the XNOR (exclusive
NOR) gate.

2. Its symbol is shown in Figure 33–14.

3. The algebraic output is written as read as “Y

equals A exclusive nor B.”
POLL
Solution
NAND AS A UNIVERSAL GATE
EXOR USING NAND
Ex-NOR using NAND
NOR AS A UNIVERSAL GATES

.
.
EX-NOR USING NOR
 EX-OR USING NOR
• APPEND NOT GATE IN THE PREVIOUS EXAMPLE TO OBTAIN EX-OR
GATE
Poll
Solutions
Poll
Solutions
Poll
Solu
Discussions
Questions
Poll
SOlu
SOP to Standard SOP Conversion
Concepts of Minterms(m) and Maxterms(M)
Poll
Solu
How are minterms and maxterms obtained
Poll
Solu
Find minterm and maxterm(Questions)
Solutions
Poll
Solu
Poll
Solu
Poll
Solu
From the truth table obtain logical expression in standard SOP form
From the truth table obtain logical expression in standard SOP form
00
01
11
10
Gray code
Poll
Solu
Poll
Solu
Poll
SOlu
SOP=FILL LOGIC 1
POS=FILL LOGIC 0
OCTET
 Y(A,B,C,D)
SUM minterm means
fill ‘1’ logic
 Y(A,B,C,D)
SUM minterm means
fill ‘1’ logic
 Y(A,B,C,D)
SUM minterm means
fill ‘1’ logic
 Y(A,B,C,D)
SUM minterm means
Simplification of Boolean expression
fill ‘1’ logic
Poll
Solutions
Solu
1. Overlapping pairs are
allowed like this
2. No logic 1 should be left
3. Go from higher (octet) to
lower (single)
Question
Solution

Follow this logic

1. Check left-for common variable
2. Check top for common variable
3. Done
Questions
Solution
Octet Conditions
Poll
Solutions
Poll
Solutions
Questions

Solve it and Share in LPULIVE

Solutions
 Discussions

A+ B.C=(A+B) (A+C)

A+AC+AB+BC
AA+AC+AB+BC(A.A=A)
 Combinational Circuits

• Combinational circuit is a circuit in which we combine the different gates in the

circuit, for example encoder, decoder, multiplexer and demultiplexer.

• Some of the characteristics of combinational circuits are following −

• The output of combinational circuit at any instant of time, depends only on the
levels present at input terminals.
 Adders
• Addition of binary bits is the most basic operation.
Diagram
Truth table
Kmap
Full adders using half adders
Carry calculations
Poll
Solutions
Poll
 Binary Subtractor
• Half subtractor is a combinational circuit with two inputs and two
output.
Full Subtractor
Truth Table
Diagram-Full Subtractor using Half Subtractor
Full subtractor using general logic diagram
Magnitude Comparator in Digital Logic
Diagram
Circuit Diagram
2 bit magnitude comparator
Kmap
Encoders
Parity Generator
Even Parity Generator
MUX
2:1 Mux
4:1 Mux

2n :1
22 :1
be
8:1 Mux
De-multiplexer(De-Mux)
Using 4:1 Mux
Using 2:1 Mux
Using 2:1 Mux
2:1 Mux
Logic gates using Mux
Abar.B+A.A=Abar.B+A=(A+Abar)(A+B)=A+B
Special case: 8:1 mux using 4:1 mux
8:1 mux
8:1 mux using 2:1 mux
Out of date
complementary metal-oxide semiconductor (CMOS)
N-channel metal-oxide semiconductor
(NMOS)
P-channel metal-oxide semiconductor
(PMOS)
Noise immunity

• noise is present in all real systems

• this adds random fluctuations to voltages representing logic
levels
• to cope with noise, the voltage ranges defining the logic
levels are more tightly constrained at the output of a gate than
at the input
• thus small amounts of noise will not affect the circuit
• the maximum noise voltage that can be tolerated by a circuit
is termed its noise immunity, VNI
Minimum value at the output
which can be considered as
High.

Minimum value at the input

which can be considered as
High.

Maximum value at the input

which can be considered as
LOW.

Maximum value at the output

which can be considered as
LOW.
Full Adder using Multiplexer
Full Adder using Multiplexer
Full adder using Decoder
Full adder using Decoder
..101 so put 0
..101 so put 0

..001 so put 1
Priority Encoder
Standard Form

Put remaining zeros

Parallel Adder or Ripple Carry Adder
1. The decimal number -34 is expressed in 2s complement form

• 11011110
Solution
• 1. 34 to binary
• 2. 8 bit represent
• 3. represent +34
• 4. Take 2’s complement of it.
2. Excess - 3 - code is also known as self-complementing code
• 3. Convert gray code 11011 to binary code
4.

8’s complement of 7777

5. XS-3 Code for 428
6. The number of parity bits in a 12 bit hamming code
7. Is this invalid BCD
?

0101 1011
Poll
• 8. Octal equivalent of HEX AB.CD ?
Self Complementing Code
The prime implicants for which each of its minterm is
covered by some essential prime implicant are
redundant prime implicants(RPI).
The prime implicants for which are neither essential
nor redundant prime implicants are called selective
prime implicants(SPI).
After MTE-Discussions
Poll
Poll
Poll
Poll
Difference between the combinational circuits and sequential circuits
are given below
Poll
Poll
Poll
Truth Table, Characteristic Table and Excitation Table(D-Flip Flop)
Characteristic Table(D Flip Flop)
Excitation Table(D Flip Flop)
Truth Table, Characteristic Table and Excitation Table(T-Flip Flop)
Characteristic Table(T Flip Flop)
Excitation Table(T-Flip Flop)
Poll
Poll
Poll
Truth Table, Characteristic Table and Excitation Table(SR Flip Flop)
Characteristic Table(SR Flip-Flop)
Excitation Table(SR Flip-Flop)
Truth Table, Characteristic Table and Excitation Table(JK Flip Flop)
Characteristic Table(JK Flip Flop)
Excitation Table(JK Flip Flop)
Poll
Poll
Poll
 Conversion of Flip-Flops(SR Flip Flop to D Flip Flop)
SR FLIP FLOP===EXCITATION TABLE ; D FLIP FLOP==CHARACTERISTIC TABLE
Poll
 Discussions

• What is SR flip flop ? Explain its truth table ?

 Conversion of Flip-Flops(D Flip Flop to T Flip Flop)
D FLIP FLOP===EXCITATION TABLE ; T FLIP FLOP==CHARACTERISTIC TABLE
 Conversion of Flip-Flops(D Flip Flop to T Flip Flop)
D FLIP FLOP===EXCITATION TABLE ; T FLIP FLOP==CHARACTERISTIC TABLE
 Discussions

• What is D flip flop ? Explain its truth table ?

 Conversion of Flip-Flops(JK Flip Flop to T Flip Flop)
J-K FLIP FLOP===EXCITATION TABLE ; T FLIP FLOP==CHARACTERISTIC TABLE
 Conversion of Flip-Flops(SR Flip Flop to JK Flip Flop)
SR FLIP FLOP===EXCITATION TABLE ; J-K FLIP FLOP==CHARACTERISTIC TABLE
 Conversion of Flip-Flops(SR Flip Flop to JK Flip Flop)
SR FLIP FLOP===EXCITATION TABLE ; J-K FLIP FLOP==CHARACTERISTIC TABLE
Conversion of Flip-Flops(SR Flip Flop to JK Flip Flop)
Draw the output waveform for the positive edge triggered D flip flop, if the clock
and D input waveform are follows:
Draw the output waveform for the positive edge triggered SR flip flop, if the clock
and SR input input waveforms are follows:
Draw the output waveform for the negative edge triggered T flip flop, if the clock
and T input input waveforms are follows:
 Timing Waveform for JK Flip Flop

Initial
Q=0
Gated SR Latch
Gated SR Latch
Counter
 Discussions

• What is T flip flop ? Explain its truth table ?

Counter
 Discussions

• What is JK flip flop ? Explain its truth table ?

Poll
Poll
Poll
Poll
 Poll

• What does the triangle on the clock input of a J-K flip-flop mean?

• A. edge-triggered
Poll
Poll
Poll
Poll
Poll
Poll
Poll
Poll
Poll
3 bit Synchronous-Up-Counter
3 bit Synchronous-Up-Counter
3 bit Synchronous-Up-Counter
3 bit Synchronous-Up-Counter
3 bit Synchronous-Down-Counter
3 bit Synchronous-Down-Counter
3 bit Synchronous-Down-Counter
110
 SHIFT REGISTERS

1. The binary data in a register can be moved from one flip flop to other
with the application of clock pulses.

2. The registers that allow such data transfer are called as shift registers.

3. Shift registers are used for data storage, data transfer.

 MODE OF OPERATIONS OF SHIFT REGISTERS

1.Serial input serial output (SISO)

2.Serial input parallel output (SIPO)
3.Parallel input serial output (PISO)
4.Parallel input parallel output (PIPO)
Serial in serial out (Shift Right Mode)
Solve and send in LPULIVE
1. In digital logic, a counter is a device which ____________

a) Counts the number of outputs

b) Stores the number of times a particular event or process has occurred
c) Stores the number of times a clock pulse rises and falls
d) Counts the number of inputs
Decade (BCD) Ripple Counter
T0 and diagram
 Programmable Logic Arrays (PLA)

It is type of fixed architecture logic device with programmable AND gates

followed by programmable OR gates.
Different terms: 03
No of the input Buffer= Number of variables
PLD(Programmable Logic Devices) are special type of IC’s
which can be programmed by the users as per their requirements.

Therefore, it is possible to implement a combinational and

sequential circuit using PLD.
Poll
 PAL (Programmable Array Logic)
1. It is most commonly used type of PLD.
2. It has programmable AND array and fixed OR array.
Design Half adder using PLA
MEMORY
 ROM
1) ROM: It is an example of nonvolatile memory.
2) ROM full form : Read Only Memory.
3) A ROM chip is also non volatile so data stored in it is not lost when
power is turned off.

Types of ROM :
a) PROM
b) EPROM
c) EEPROM
d) Mask
• PROM : Stands for programmable read-only memory, a memory
chip on which data can be written only once.
• Once a program has been written onto a PROM, it remains there
forever.
• PROMs retain their contents when the computer is turned off.
• The difference between a PROM and a ROM (read-only memory)
is that a PROM is manufactured as blank memory, whereas a
ROM is programmed during the manufacturing process.
• To write data onto a PROM chip, you need a special device called
a PROM programmer
• EPROM : Acronym for erasable programmable read-only
memory.
• EPROM is a special type of memory that retains its contents until it
is exposed to ultraviolet light.
• The ultraviolet light clears its contents, making it possible to
reprogram the memory.
• To write to and erase an EPROM, you need a special device called a
programmer or burner.
• EEPROM : Short form of electrically erasable programmable read-only
memory.

• EEPROM can be erased and reprogrammed (written to) repeatedly

through the application of electrical voltage.

• FLASH ROM– It is an updated version of EEPROM. In EEPROM, it is

not possible to alter many memory locations at the same time.

• However, Flash memory provides this advantage over the EEPROM by

enabling this feature of altering many locations simultaneously.
Poll
• Mask ROM (MROM) is a type of read-only memory (ROM)
whose contents are programmed by the integrated circuit
manufacturer (rather than by the user).
 RAM
• Random access memories are volatile memories because in
RAM’s stored data is lost when power is switch off.
• The data stored in any location can be read or write at any time
during the operation of system. Thus, RAM’s are also known as
Read/ Write memories.

• Types of RAM’s
a) SRAM (Static RAM)
b) DRAM (Dynamic RAM)
• SRAM (Static RAM): In SRAM, the data will remain stored
permanently as long as they are supplied with power, they need not
required rewriting periodically the data into the memory.

• DRAM (Dynamic RAM): In DRAM the data will not remain stored
permanently even if power is supplied and they required the data
rewriting periodically into the memory. Thus, refreshing is required in
DRAM.
• Cache memory is a small-sized type of volatile computer memory
that provides high-speed data access to a processor.
• Main memory refers to physical memory that is internal to the
computer. It determines how many programs can be executed at
one time.
Question
Question
Race around condition
➢It occur when both inputs JK are 1 and when the state of the
flip flop keep on changing from 0 to 1, 1 to 0 and 0 to 1 so on.
➢ This phenomenon is called as race around condition.
Master-Slave JK flip flop
Bidirectional Shift Register
Bidirectional Shift Register
Bidirectional Shift Register
Poll
Poll
Universal Shift Register
Universal Shift Register
Universal Shift Register

A3 A2 A1 A0
0000
1000
1100
0110
1011
Universal Shift Register

A3 A2 A1 A0
0000
0001
0011
0110
1100
 Digital To Analog Converter

A Digital to Analog Converter (DAC) consists of a number of binary inputs and a single output.