1 ; MICA CPU PROM for HEEPS-T ver 1.

114
2 ; based on
3 ; RENU CPU PROM for HEEPS-T ver 1.113
4 ; based on
5 ; Cascades2 CPU PROM for HEEPS-T ver 1.103
6 ; based on
7 ; Scifer2 CPU PROM for HEEPS-T ver 1.102
8 ; based on
9 ; ROPA K21 CPU PROM for HEEPS-I ver 0.089
10 ;
11 ;Cascades2 HT soldered in flight version is v1.102
12 ;Scifer2 HT soldered in flight version is v1.101
13
14 ;directives moved to front to make ASEM happy.
15 ;directives added to make MetaLink ASM51.EXE happy:
16 $MOD51
17 $TITLE(K21 CPU PROM VER: 36.273 MICA 1.114 for HEEPS-T)
18 $PAGEWIDTH(132)
19 $NOPAGING
20 $NODEBUG
21 $SYMBOLS
22 $OBJECT ;ASEM will object to this directive, no
problem
23 ; scf2_he.asm(19): illegal control statement
24
25
26 ;MICA HT v1.114 -- same as RENU 1.113 w/ label
changes
27 ;RENU HT v1.113 -- got 32? seconds between pulses,
~1/4 second long pulse due to ??? -- changing count
from
16 to 8
28 ;RENU HT v1.112 -- got 32 seconds between pulses, 1/2
second long pulse due to decrementing on both set
and
reset,
29 ; decrement on reset now commented
out
30 ;RENU HT v1.111 -- finished implementing using CTR
instead of A0/A1 for master/slave sweep synch stuff

31 ;RENU HT v1.110 -- using CTR instead of A0/A1 for

master/slave sweep synch stuff
32 ;RENU HT v1.109 -- continuing master/slave sweep synch
stuff
33 ;RENU HT v1.108 -- continue adding 1PPS sweep synch
stuff and continuing master/slave sweep synch stuff

34 ;RENU HT v1.107 -- adding 1PPS sweep synch stuff and

continuing master/slave sweep synch stuff
35 ;RENU HT v1.106 -- added parasynchs to end tags
36 ;RENU HT v1.105 -- adding sweep synchronizization code
using P3.1 (A0) & P3.2 (A1) to communicate
37 ;RENU HT start version is v1.104 -- same as Cascades2
v1.103 -- same as Scifer2 v1.102
38 ;Cascades2 HT start version is v1.103 -- same as
Scifer2 v1.102
39 ; v1.10? adds NEWSTYLE/OLDSTYLE conditional assembly
flags to vary the ACK handling
 40 ; v1.102 moves data above ALL register sets
41 ;Scifer2 HT soldered in flight version is v1.101
42 ; v1.101 moves CLR ACK to after any shifting w/ only
one instruction before SETB ACK
43 ; v1.100 moves ORing and ANDing to make sure that bit 6
is set and bit 7 is not set even when no shiftin
g is
done
44 ; v1.099 adds ANDing and ORing to make sure that bit 6
is set and bit 7 is not set when shifting is done

45 ; v1.098 adds bin number right shifting for 16 or 32

bins -- no hardware changes needed for differing nu

mbers of bins
46 ; v1.097 can be assembled with ASM51 or ASEM_51 to get
identical .HEX results
47 ; the HEXBIN.EXE from ASEM will FF pad rather than 00
pad, otherwise .BINs are the same
48 ; v1.096 adds stepping energy on every Nth set of bins
option (unused)
49 ; v1.096 adds 16/20 and 32/40 padding options
50 ;
51 ; v0.89 is the same as v0.86 (with FAST_OUT on) which
is what went to
52 ; Wallops for the ROPA Pre-Integration and gave
apparently good data
53 ; v0.87 added the SKIP_ONE and SKIP_TWO which HEI
needed, but apparently
54 ; screw up HII (or the implementation foo-ed something)
so 0.87 and 0.88
55 ; are sidelined and we revert to 0.86 renumbered to
0.89
56 ;
57 ; based on K21 CPU PROM VER: Cascades 0.81 for HEEPS-
I detector
58 ; derived from K21 PROM VER: Sersio 0.74 for HEEPS-M
detector
59 ; for ROPA Box 1 Tray 3 K21 CPU
60 ;
61 ; based on Cascades & Sersio sources which were based
on
62 ; SIERRA K21 source from Mark Widholm,
63 ; modified to assemble with ASM51.EXE from MetaLink
64 ;
65 ; original Sierra code used 12 HMz processor & crystal
66 ; now running on 24 MHz processor and crystal
67
68 ;SERSIO values:
69 ;detector readout angle step steps sweep
70 ; rate bins time time
71 ;HEEPS T1 32K 64 2ms 64 128ms K21
- new prog 1
72 ;HEEPS T2 32K 64 2ms 64 128ms K21
- new prog 1
73 ;HEEPS M 32K 64 2ms 32 64ms K21
- new prog 3
74 ;HEEPS E 16K 32 2ms 64 128ms K21
- prog 0
 75 ;BEEPS p 4K 16 4ms 64 256ms K21
- prog 2 modified
76 ;BEEPS O 4K 16 4ms (64) 256ms K20
- prog 2 modified (sweep generated for BEEPS p
is
shared by BEEPS O)
77
78 ;Scifer2 values:
79 ;detector readout angle step steps sweep
80 ; rate bins time time
81 ;HEEPS E 32K* 32 2ms 32 64ms
based on K21 - prog 0
82 ;HEEPS T 32K 64 2ms 64 128ms K21
- new prog 1
83 ;HEEPS M 32K 64 2ms 32 64ms K21
- new prog 3
84 ;BEEPS p 32K** 16 2ms 64 128ms K21
- prog 2 modified
85 ;BEEPS O 32K** 16 2ms (64) 128ms K20
- prog 2 modified (sweep generated for BEEPS p
is
shared by BEEPS O)
86 ;* oversampled x2
87 ;** oversampled x4
88
89 ;RENU values:
90 ;detector readout angle step steps sweep
91 ; rate bins time time
92 ;HEEPS E 32K* 32 2ms 32 64ms
based on K21 - prog 0
93 ;HEEPS T 32K 64 2ms 64 128ms K21
- new prog 1
94 ;HEEPS M 32K 64 2ms 32 64ms K21
- new prog 3
95 ;BEEPS p 16K** 16 2ms 64 128ms K21
- prog 2 modified
96 ;BEEPS O 16K** 16 2ms (64) 128ms K20
- prog 2 modified (sweep generated for BEEPS p
is
shared by BEEPS O)
97 ;* oversampled x2
98 ;** oversampled x2 (or not oversampled)
99
100 ;OVERSAMPLE EQU 1
0000 101 OVERSAMPLE EQU 0
0001 102 SAMPLE EQU 1
103
0000 104 DOSYNCH SET 0
105 ;DOSYNCH SET 1
106
107 IF (DOSYNCH)
108 ;MASTER SET 0
109 MASTER SET 1
110 SLAVE SET 0
111 ;SLAVE SET 1
112 SYNC1PPS SET 0 ;don't force energy sweep to reset at
1PPS
113 ELSE ;IF (DOSYNCH)
0000 114 MASTER SET 0
 0000 115 SLAVE SET 0
116 ENDIF ;IF (DOSYNCH)
117
118 ;SYNC1PPS SET 1 ;force energy sweep to reset at 1PPS
0000 119 SYNC1PPS SET 0 ;don't force energy sweep to reset at
1PPS
120 IF (SYNC1PPS)
121 DOSYNCH SET 0
122 MASTER SET 0
123 SLAVE SET 0
124 ENDIF ;IF (SYNC1PPS)
125
126 IF (DOSYNCH)
127 IF (MASTER)
128 SLAVE SET 0
129 ELSE;IF (MASTER)
130 MASTER SET 0
131 ENDIF ;IF (MASTER)
132 IF (SLAVE)
133 MSCOUNT EQU 1 ;v1.108 -> v1.109
134 ELSE ;IF (SLAVE)
135 ;MSCOUNT EQU 16 ;v1.108 -> v1.109
136 MSCOUNT EQU 8 ;v1.112 ->
v1.113 ;v1.108 -> v1.109
137 ENDIF ;IF (SLAVE)
138 ENDIF ;IF (DOSYNCH)
139
0001 140 OLDSTYLE SET 1
0000 141 NEWSTYLE SET 0
142 ;OLDSTYLE SET 0
143 ;NEWSTYLE SET 1
144 IF (OLDSTYLE)
0000 145 NEWSTYLE SET 0
146 ELSE
147 IF (NEWSTYLE)
148 ELSE
149 OLDSTYLE SET 1 ;IF NEITHER IS SET, SET OLDSTYLE ON
150 ENDIF ;IF (NEWSTYLE)
151 ENDIF ;IF (OLDSTYLE)
152
153 ;SKIP_ONE EQU 1 ;on RESET skip one word out
0000 154 SKIP_ONE EQU 0 ;on RESET skip one word out
155 ;SKIP_TWO EQU 1 ;on RESET skip two words out
0000 156 SKIP_TWO EQU 0 ;on RESET skip two words out
157
158 ; IF 64 BINS
0040 159 TWO6 EQU 64
0000 160 TWO5 EQU 0
0000 161 TWO4 EQU 0
162 ;;ELSE IF 32 BINS
163 ;TWO6 EQU 0
164 ;TWO5 EQU 32
165 ;TWO4 EQU 0
166 ;;ELSE IF 16 BINS
167 ;TWO6 EQU 0
168 ;TWO5 EQU 0
169 ;TWO4 EQU 16
170 ;;ENDIF
171
 172 ;PAD EQU 1
0000 173 PAD EQU 0
174
175 ;detector readout angle step steps sweep
176 ; rate bins time time
177 ;HEEPS I 32K 64 2ms 32 64ms
based on Sersio HM
178 ;HEEPS T 32K 64 2ms 64
128ms/sweep;
179
180
0001 181 FAST_OUT EQU 1 ;probably keep on for flight
182 ;FAST_OUT EQU 0
183 ;PARANOID EQU 1 ;probably turn off for flight
184 ;;PARANOID EQU 0
185 ;;METANOID EQU 1 ;definitely turn off for flight
186 ;METANOID EQU 0
0000 187 PARANOID EQU 0
188
189 USING 0 ;Select addresses for Bank 0
190
191 ; PORT USAGE
192 ; P0 FIFO output
193 ; P1 BNn input
194 ; P2 DAC output - K21 (not used on K20)
195 ; P3 single bit IO
196
197 ; IO BITS
00B0 198 TST BIT P3.0
00B1 199 A0 BIT P3.1
00B2 200 A1 BIT P3.2
00B2 201 PPS1 EQU A1
202
203 ;INT1 BIT P3.3
204
00B4 205 CTR BIT P3.4
206 ;SwpRst EQU A0
00B4 207 SwpRst EQU CTR
208
00B5 209 EVENT BIT P3.5
210 ;WR BIT P3.6 ;LOAD FIFO
00B7 211 ACK BIT P3.7
212
213 ; the AD-7111A can only sweep down when presented
214 ; an ascending count, so the count must be provided as
a count down to get an
215 ; upward sweep with the AD-7111A
216 ;
217
218 ;tailored sweep information
219 ;HEEPS-T sweep simulation program SWEEPT.FOR
220 ; khi = 2.3? 2.7? DETECTOR FACTOR
221 ; hv = 1.0 HV BOARD AMPLIFICATION FACTOR
222 ; board = 1.0 K21 BOARD DE-AMPLIFICATION FACTOR
223 ; numsteps = 64
00C6 224 RESTART_HT EQU 198 ;195 - -3 == START_HT - INC_HT
00C3 225 START_HT EQU 195
FFFD 226 INC_HT EQU -3
0006 227 LAST_HT EQU 6
 0003 228 END_HT EQU LAST_HT + INC_HT
229 ;;;Sersio HT sweep
230 ;;;HEEPS-T1, HEEPS-T2, BEEPS-T sweep simulation
program SWEEPT.FOR
231 ;;; kht1 = 7.3 DETECTOR FACTOR
232 ;;; hv = 1.0 NO HV BOARD AMPLIFICATION
233 ;;; board = 3.5 K21 BOARD DE-AMPLIFICATION FACTOR
234 ;;; numsteps = 64
235 ;;START_HT1 EQU 131
236 ;;INC_HT1 EQU -2
237 ;;LAST_HT1 EQU 5
238 ;;END_HT1 EQU 3 ;5 + -2
239
240
241 ;INTERNAL RAM
242 ;directive added to make MetaLink ASM51.EXE happy:
---- 243 DSEG ;directly addressable Data memory SEGment
definition
244
245 ; ORG 8H ;1.101 -> 1.102
0020 246 ORG 20H ;skip over register banks 0..3 ;1.101
-> 1.102
0020 247 SWP: DS 1 ;SWEEP STEP NUMBER
0021 248 VECL: DS 1
0022 249 VECH: DS 1
0023 250 DS 8
002B 251 IGNORE: DS 3
252
253 FLAG EQU R7
254
255 IF (OVERSAMPLE)
256 SKIP:
257 DS 1
258 ENDIF ;IF (OVERSAMPLE)
259
260 IF (DOSYNCH)
261 MSCOUNTER:
262 DS 1
263 ENDIF ;IF (DOSYNCH)
264
0040 265 ORG 40H ;IMAGE BINS. MUST BE AT 40H FOR HARDWARE
0040 266 BIN0: DS 1
0041 267 BIN1: DS 14
004F 268 BIN15: DS 1
0050 269 BIN16: DS 3
0053 270 BIN19: DS 1
0054 271 BIN20: DS 11
005F 272 BIN31: DS 1
0060 273 BIN32: DS 7
0067 274 BIN39: DS 1
0068 275 BIN40: DS 24
0080 276 BIN64: DS 0
277
278 ;directive added to make MetaLink ASM51.EXE happy:
---- 279 CSEG ;code memory SEGment definition
0000 280 ORG 0
0000 020017 281 JMP RESET_ ;1us JUMP AROUND INTR HANDLER
282
283 ; ---------------------------------
0013 284 ORG 13H
285 ; External INT 1 vectors to here, so each external INT
1 will jump via this
286 ; dispatch code to the appropriate PROGn
0013 287 INTV1:
0013 758122 288 MOV SP,#VECH ;1us JUMP INDIRECT THRU VEC BY
LOADING SP
0016 32 289 RETI ;1us AND DOING A RET
290 ; ---------------------------------
291
292 ; RESET HAPPENS ONLY ON POWER UP (OR ATTEMPT TO READ
EMPTY FIFO)
0017 293 RESET_:
294 ;;
295 IF (FAST_OUT)
296 ; write out data to FIFO a.s.a.p.
297 ;
0017 E4 298 CLR A
0018 F2 299 MOVX @R0,A ;WRITE 0 TO FIFO BIN0 (ADDR NOT USED)
0019 7840 300 MOV R0,#BIN0
301
302 ;----------------------------------- SET DATA TO TEST
RAMP and output test ramp
001B 303 LPRESET:
001B F6 304 MOV @R0,A
001C 08 305 INC R0
306 IF (TWO6)
001D 2403 307 ADD A,#3
308 ELSE
309 IF (TWO5)
310 ADD A,#7
311 ELSE
312 IF (TWO4)
313 ADD A,#15
314 ENDIF
315 ENDIF
316 ENDIF
001F F2 317 MOVX @R0,A ;WRITE TEST VALUE TO FIFO BIN?? (ADDR
NOT USED)
318 IF (TWO6)
0020 B880F8 319 CJNE R0,#BIN64,LPRESET ;LOOP FOR 64 BINS
320 ELSE
321 IF (TWO5)
322 IF (PAD)
323 CJNE R0,#BIN40,LPRESET ;LOOP FOR 40 BINS
324 ELSE ;IF (PAD)
325 CJNE R0,#BIN32,LPRESET ;LOOP FOR 32 BINS
326 ENDIF ;IF (PAD)
327 ELSE ;IF (TWO5)
328 IF (TWO4)
329 IF (PAD)
330 CJNE R0,#BIN20,LPRESET ;LOOP FOR 20 BINS
331 ELSE ;IF (PAD)
332 CJNE R0,#BIN16,LPRESET ;LOOP FOR 16 BINS
333 ENDIF ;IF (PAD)
334 ENDIF ;IF (TWO4)
335 ENDIF ;IF (TWO5)
336 ENDIF ;IF (TWO6)
337 ;----------------------------------- END -- SET DATA TO
TEST RAMP
338
339 ; now that FIFO is filled, do rest of initialization
340 ENDIF ;IF (FAST_OUT)
341
342
343 ;;
0023 758804 344 MOV TCON,#04H ;1us EDGE TRIG FOR INT1
345 ;
0026 7520C3 346 MOV SWP,#START_HT ;RESET VALUE
347
348 IF (DOSYNCH)
349 IF (MASTER)
350 SETB SwpRst ;TOGGLE SYNCH BIT -- GOES ON HERE, OFF
LATER
351 ENDIF ;IF (MASTER)
352 ENDIF ;IF (DOSYNCH)
353
0029 7F00 354 MOV FLAG,#0
002B 752200 355 MOV VECH,#00H
002E 752180 356 MOV VECL,#80H ;1us 80H LEAVES ROOM FOR RESET CODE
0031 75812B 357 MOV SP,#IGNORE ;1us PLACE TO PUT PC IF INTERUPTED
358
0034 7840 359 MOV R0,#BIN0
0036 E4 360 CLR A
361
362 IF (OVERSAMPLE)
363 MOV SKIP,#SAMPLE
364 ENDIF ;IF (OVERSAMPLE)
365
366 IF (DOSYNCH)
367 MOV MSCOUNTER,#MSCOUNT ;v1.108 -> v1.109
368 ENDIF ;IF (DOSYNCH)
369
370 IF (SYNC1PPS)
371 CLR SwpRst
372 ENDIF ;IF (SYNC1PPS)
373
374 ;----------------------------------- SET DATA TO TEST
RAMP
0037 375 LPRESET2:
0037 F6 376 MOV @R0,A
0038 08 377 INC R0
378
379 IF (TWO6)
0039 2403 380 ADD A,#3
381 ELSE
382 IF (TWO5)
383 ADD A,#7
384 ELSE
385 IF (TWO4)
386 ADD A,#15
387 ENDIF ;IF (TWO4)
388 ENDIF ;IF (TWO5)
389 ENDIF ;IF (TWO6)
390
391 IF (TWO6)
003B B880F9 392 CJNE R0,#BIN64,LPRESET2 ;LOOP FOR 64 BINS
393 ELSE
 394 IF (TWO5)
395 IF (PAD)
396 CJNE R0,#BIN40,LPRESET2 ;LOOP FOR 40 BINS
397 ELSE ;IF (PAD)
398 CJNE R0,#BIN32,LPRESET2 ;LOOP FOR 32 BINS
399 ENDIF ;IF (PAD)
400 ELSE
401 IF (TWO4)
402 IF (PAD)
403 CJNE R0,#BIN20,LPRESET2 ;LOOP FOR 20 BINS
404 ELSE ;IF (PAD)
405 CJNE R0,#BIN16,LPRESET2 ;LOOP FOR 16 BINS
406 ENDIF ;IF (PAD)
407 ENDIF ;IF (TWO4)
408 ENDIF ;IF (TWO5)
409 ENDIF ;IF (TWO6)
410
411 ;----------------------------------- END -- SET DATA TO
TEST RAMP
412
413 IF (DOSYNCH)
414 IF (MASTER)
415 CLR SwpRst ;TOGGLE SYNCH BIT -- GOES OFF HERE, ON
EARLIER
416 ENDIF ;IF (MASTER)
417 ENDIF ;IF (DOSYNCH)
418
003E 75A884 419 MOV IE,#84H ;1us ENABLE EXT INT1
0041 80D0 420 JMP INTV1 ;1us
421 ; JMP PROG0 ;1us ;why not just jump to PROG0?
Does the RETI @
422
423

424 ;-------------------------------------------------------
425
426 ; EVENT WAIT LOOP (USED BY ALL PROGS)
427 IF (SYNC1PPS)
428 SWEEPSYNC:
429 CJNE FLAG,#0,WT_FOO
430 SETB SwpRst
431 MOV SWP,#RESTART_HT ;RESET VALUE
432 MOV FLAG,#255
433 CLR SwpRst
434 JMP WT_FOO
435 ENDIF ;IF (SYNC1PPS)
436
437 IF (DOSYNCH)
438 IF (SLAVE)
439 SWEEPSYNC:
440 CJNE FLAG,#0,WT_FOO
441 DJNZ MSCOUNTER,WT_FOO ;v1.108 -> v1.109
442 MOV SWP,#RESTART_HT ;RESET VALUE
443 MOV FLAG,#255
444 MOV MSCOUNTER,#MSCOUNT ;v1.108 -> v1.109
445 JMP WT_FOO
446 ENDIF ;IF (SLAVE)
447 ENDIF ;IF (DOSYNCH)
448
0043 449 OK:
0043 06 450 INC @R0 ;1/2us COUNT EVENT
451
0044 452 WT:
453
454 IF (SYNC1PPS)
455 JB PPS1,SWEEPSYNC
456 MOV FLAG,#0
457 WT_FOO:
458 ENDIF ;IF (SYNC1PPS)
459
460 IF (DOSYNCH)
461 IF (SLAVE)
462 JB A1,SWEEPSYNC
463 MOV FLAG,#0
464 WT_FOO:
465 ENDIF ;IF (SLAVE)
466 ENDIF ;IF (DOSYNCH)
467
0044 30B5FD 468 JNB EVENT,WT ;1us WAIT FOR: NEXT EVENT OR INTR
0047 E590 469 MOV A,P1 ;GET BIN # INTO A
470 IF (OLDSTYLE)
0049 C2B7 471 CLR ACK ;1/2us PULSE ACK- TO ENABLE NEXT EVENT
472 ENDIF ;IF (OLDSTYLE)
473
474 ;; The AND and the OR following prevent unused input
bits from being seen. While hardware should force

these bits to proper values,

475 ;; damage to the internal pull-ups of the chips can
prevent pins that should be high from being high.
476 ;;IF (METANOID)
477 ;;; ANL A,#7FH ;64 BINS ;anding this bit out prior
to setting it is unnecessary
478 ;; ORL A,#40H
479 ;;ENDIF ;IF (METANOID)
480
481 ; mask out high bits
004B 543F 482 ANL A,#3FH ;1/2us
483 IF (TWO6)
484 ; do nothing
485 ELSE ;IF (TWO6)
486 ; mask out high bits
487 IF (TWO5)
488 CLR C ;1/2us 64 -> 32 mapping
489 RRC ;1/2us shift bin number right 1
bit
490 ELSE ; IF (TWO5)
491 IF (TWO4)
492 CLR C ;1/2us 64 -> 32 mapping
493 RRC ;1/2us shift bin number right 1
bit
494 CLR C ;1/2us 32 -> 16 mapping
495 RRC ;1/2us shift bin number right 1
bit
496 ELSE ; IF (TWO4)
497 ; do nothing
498 ENDIF ; IF (TWO4)
499 ENDIF ; IF (TWO5)
 500 ENDIF ; IF (TWO6)
004D 4440 501 ORL A,#40H ;1/2us
502
004F C2B7 503 CLR ACK ;1/2us PULSE ACK- TO ENABLE NEXT EVENT
0051 F8 504 MOV R0,A
0052 D2B7 505 SETB ACK ;1/2us
506
0054 B6FFEC 507 CJNE @R0,#255,OK ;1us CHECK FOR WRAP
0057 80EB 508 JMP WT ;1us IGNORE EVENT IF AT 255
509

510 ;-------------------------------------------------------
0080 511 ORG 80H
512 ;detector readout angle step steps sweep
513 ; rate bins time time
514 ;HEEPS T 32K 64 2ms 64 128ms K21
- new prog 1
515 ;START_HT EQU 195
516 ;INC_HT EQU -3
517 ;LAST_HT EQU 6
518 ;END_HT EQU 3 ;3 = 6 + -3 == LAST_HT + INC_HT
519
0080 520 PROG0:
0080 75812B 521 MOV SP,#IGNORE ;PLACE TO PUT PC IF INTERUPTED
0083 E540 522 MOV A,BIN0 ;1/2us
0085 F2 523 MOVX @R0,A ;1us WRITE BIN0 TO FIFO (ADDR NOT
USED)
0086 754000 524 MOV BIN0,#0 ;1us CLEAR BIN0
0089 E520 525 MOV A,SWP
008B F5A0 526 MOV P2,A ;OUTPUT SWEEP STEP TO DAC
527
528 ; ADD A,#INC_HT
529 IF (OVERSAMPLE)
530 DJNZ SKIP,SKIPIT
531 ADD A,#INC_HT
532 MOV SKIP,#SAMPLE
533 SKIPIT:
534 ELSE ;IF (OVERSAMPLE)
008D 24FD 535 ADD A,#INC_HT
536 ENDIF ;IF (OVERSAMPLE)
537
538 ;
539 ; since this next is an EQUAL compare, and the
increment is not required to
540 ; be +1 or -1, the starting value needs to be carefully
chosen both for use
541 ; here in restarting the next sweep and initially on
RESET
542 ;
008F B40302 543 CJNE A,#END_HT,FOO0 ;otherwise do restart of sweep
when end value seen
0092 74C3 544 MOV A,#START_HT ;RESET VALUE IF OVERFLOW
545
546 IF (DOSYNCH)
547 IF (MASTER)
548 DJNZ MSCOUNTER,MS_FOO ;Oh Oh ;v1.108 ->
v1.109
549 SETB SwpRst ;TOGGLE SYNCH BIT -- GOES ON HERE, OFF
LATER
 550 MS_FOO: ;Oh Oh
551 ENDIF ;IF (MASTER)
552 ENDIF ;IF (DOSYNCH)
553
0094 554 FOO0:
0094 F520 555 MOV SWP,A ;UPDATE SWEEP
0096 20B00E 556 JB TST,TST0 ; go do test ramp if TST bit set
557
0099 7841 558 MOV R0,#BIN1 ;OUTPUT BINS TO FIFO
559
009B 560 LP0:
009B E6 561 MOV A,@R0 ;GET BIN
009C F2 562 MOVX @R0,A ;WRITE TO FIFO. (ADDR NOT USED)
009D E4 563 CLR A
009E F6 564 MOV @R0,A ;CLEAR BIN
009F 08 565 INC R0
566
567 IF (TWO6)
00A0 B880F8 568 CJNE R0,#BIN64,LP0 ;LOOP FOR 64 BINS
569 ELSE
570 IF (TWO5)
571 IF (PAD)
572 CJNE R0,#BIN40,LP0 ;LOOP FOR 40 BINS
573 ELSE ;IF (PAD)
574 CJNE R0,#BIN32,LP0 ;LOOP FOR 32 BINS
575 ENDIF ;IF (PAD)
576 ELSE
577 IF (TWO4)
578 IF (PAD)
579 CJNE R0,#BIN20,LP0 ;LOOP FOR 20 BINS
580 ELSE ;IF (PAD)
581 CJNE R0,#BIN16,LP0 ;LOOP FOR 16 BINS
582 ENDIF ;IF (PAD)
583 ENDIF ;IF (TWO4)
584 ENDIF ;IF (TWO5)
585 ENDIF ;IF (TWO6)
586
587 IF (DOSYNCH)
588 IF (MASTER)
589 ; DJNZ MSCOUNTER,MS_F00 ;Zero Zero ;v1.108 -
> v1.109 ; commented out in v1.112, don't nee
d
count in BOTH places
590 CLR SwpRst ;TOGGLE SYNCH BIT -- GOES OFF HERE, ON
EARLIER
591 ;MS_F00: ;Zero Zero
592 ENDIF ;IF (MASTER)
593 ENDIF ;IF (DOSYNCH)
594
00A3 D2B7 595 SETB ACK ;MAKE SURE ACK- IS HI
00A5 809D 596 JMP WT
597
598 ; 16/64 BIN TEST PATTERN GENERATOR.
599 ; LOADS RAMP INTO 16/64 BINS WHEN TST BIT IS HIGH
00A7 600 TST0:
601
602 IF (DOSYNCH)
603 IF (MASTER)
604 SETB SwpRst ;TOGGLE SYNCH BIT -- GOES ON HERE, OFF
LATER -- always reset on Test ; v1.113
605 ENDIF ;IF (MASTER)
606 ENDIF ;IF (DOSYNCH)
607
00A7 754001 608 MOV BIN0,#1 ;BIN0 RAMP VALUE
00AA 7901 609 MOV R1,#1 ;R1 IS RAMP COUNTER
610
00AC 7841 611 MOV R0,#BIN1 ;OUTPUT BINS TO FIFO
00AE 612 TLP0:
00AE E6 613 MOV A,@R0 ;GET BIN
00AF F2 614 MOVX @R0,A ;WRITE TO FIFO. (ADDR NOT USED)
00B0 E9 615 MOV A,R1
00B1 F6 616 MOV @R0,A ;SET BIN TO RAMP VALUE
617 IF (TWO6)
00B2 2403 618 ADD A,#3
619 ELSE
620 IF (TWO5)
621 ADD A,#7
622 ELSE
623 IF (TWO4)
624 ADD A,#15
625 ENDIF ;IF (TWO4)
626 ENDIF ;IF (TWO5)
627 ENDIF ;IF (TWO6)
628
00B4 F9 629 MOV R1,A ;BUMP RAMP BY INCREMENT
00B5 08 630 INC R0
631 IF (TWO6)
00B6 B880F5 632 CJNE R0,#BIN64,TLP0 ;LOOP FOR 64 BINS
633 ELSE
634 IF (TWO5)
635 IF (PAD)
636 CJNE R0,#BIN40,TLP0 ;LOOP FOR 40 BINS
637 ELSE ;IF (PAD)
638 CJNE R0,#BIN32,TLP0 ;LOOP FOR 32 BINS
639 ENDIF ;IF (PAD)
640 ELSE
641 IF (TWO4)
642 IF (PAD)
643 CJNE R0,#BIN20,TLP0 ;LOOP FOR 20 BINS
644 ELSE ;IF (PAD)
645 CJNE R0,#BIN16,TLP0 ;LOOP FOR 16 BINS
646 ENDIF ;IF (PAD)
647 ENDIF ;IF (TWO4)
648 ENDIF ;IF (TWO5)
649 ENDIF ;IF (TWO6)
650
651 IF (DOSYNCH)
652 IF (MASTER)
653 ; DJNZ MSCOUNTER,MS_F0O ;Zero Oh ;v1.108 ->
v1.109 ; commented out in v1.112, don't need coun
t in
BOTH places
654 CLR SwpRst ;TOGGLE SYNCH BIT -- GOES OFF HERE, ON
EARLIER
655 ;MS_F0O: ;Zero Oh
656 ENDIF ;IF (MASTER)
657 ENDIF ;IF (DOSYNCH)
658
00B9 D2B7 659 SETB ACK ;MAKE SURE ACK- IS HI
00BB 8087 660 JMP WT
661
662 ;IF (PARANOID)
663 ; JMP RESET ;should never get here, so if we
do RESET
664 ;ENDIF ;IF (PARANOID)
665
666 ;"Step", "N" , "Vout" , "Scaled"
667 ;000, 195, -.264808E-02, .264808E-02
668 ;001, 192, -.301426E-02, .301426E-02
669 ;002, 189, -.343108E-02, .343108E-02
670 ;003, 186, -.390554E-02, .390554E-02
671 ;004, 183, -.444561E-02, .444561E-02
672 ;005, 180, -.506036E-02, .506036E-02
673 ;006, 177, -.576012E-02, .576012E-02
674 ;007, 174, -.655664E-02, .655664E-02
675 ;008, 171, -.746331E-02, .746331E-02
676 ;009, 168, -.849535E-02, .849535E-02
677 ;010, 165, -.967011E-02, .967011E-02
678 ;011, 162, -.110073E-01, .110073E-01
679 ;012, 159, -.125294E-01, .125294E-01
680 ;013, 156, -.142620E-01, .142620E-01
681 ;014, 153, -.162342E-01, .162342E-01
682 ;015, 150, -.184791E-01, .184791E-01
683 ;016, 147, -.210345E-01, .210345E-01
684 ;017, 144, -.239431E-01, .239431E-01
685 ;018, 141, -.272541E-01, .272541E-01
686 ;019, 138, -.310228E-01, .310228E-01
687 ;020, 135, -.353127E-01, .353127E-01
688 ;021, 132, -.401959E-01, .401959E-01
689 ;022, 129, -.457542E-01, .457542E-01
690 ;023, 126, -.520812E-01, .520812E-01
691 ;024, 123, -.592831E-01, .592831E-01
692 ;025, 120, -.674810E-01, .674810E-01
693 ;026, 117, -.768124E-01, .768124E-01
694 ;027, 114, -.874342E-01, .874342E-01
695 ;028, 111, -.995248E-01, .995248E-01
696 ;029, 108, -.113287 , .113287
697 ;030, 105, -.128953 , .128953
698 ;031, 102, -.146785 , .146785
699 ;032, 099, -.167083 , .167083
700 ;033, 096, -.190187 , .190187
701 ;034, 093, -.216487 , .216487
702 ;035, 090, -.246423 , .246423
703 ;036, 087, -.280499 , .280499
704 ;037, 084, -.319287 , .319287
705 ;038, 081, -.363439 , .363439
706 ;039, 078, -.413696 , .413696
707 ;040, 075, -.470903 , .470903
708 ;041, 072, -.536020 , .536020
709 ;042, 069, -.610142 , .610142
710 ;043, 066, -.694514 , .694514
711 ;044, 063, -.790554 , .790554
712 ;045, 060, -.899873 , .899873
713 ;046, 057, -1.02431 , 1.02431
714 ;047, 054, -1.16595 , 1.16595
715 ;048, 051, -1.32718 , 1.32718
716 ;049, 048, -1.51071 , 1.51071
 717 ;050, 045, -1.71962 , 1.71962
718 ;051, 042, -1.95741 , 1.95741
719 ;052, 039, -2.22808 , 2.22808
720 ;053, 036, -2.53619 , 2.53619
721 ;054, 033, -2.88690 , 2.88690
722 ;055, 030, -3.28610 , 3.28610
723 ;056, 027, -3.74051 , 3.74051
724 ;057, 024, -4.25776 , 4.25776
725 ;058, 021, -4.84653 , 4.84653
726 ;059, 018, -5.51672 , 5.51672
727 ;060, 015, -6.27959 , 6.27959
728 ;061, 012, -7.14795 , 7.14795
729 ;062, 009, -8.13638 , 8.13638
730 ;063, 006, -9.26150 , 9.26150
731

732 ;------------------------------------------------------------------------
733 ;PARASYNC MACRO
734 ;EOC SET ($/16)
735 ;EOC SET (EOC+1)*16
736 ; ORG EOC
737 ; ENDM
738
739
740 ; PARASYNC
000B 741 EOC SET ($/16)
00C0 742 EOC SET (EOC+1)*16
00C0 743 ORG EOC
00C0 744 ROM_ID:
00C0 4B323120 745 DB 'K21 CPU PROM VER: MICA 1.114 for HEEPS-T;
36.273 '
00C4 43505520
00C8 50524F4D
00CC 20564552
00D0 3A204D49
00D4 43412031
00D8 2E313134
00DC 20666F72
00E0 20484545
00E4 50532D54
00E8 3B203336
00EC 2E323733
00F0 20
746
747
748 ; PARASYNC
000F 749 EOC SET ($/16)
0100 750 EOC SET (EOC+1)*16
0100 751 ORG EOC
0100 752 SWEEPDATA:
753 IF (OVERSAMPLE)
754 DB 'HEEPS T 32 K 64 bins 2 ms/Step 64 Steps
128 ms/sweep; '
755 DB 'Step energy sweep every set of bins '
756 ELSE
0100 48454550 757 DB 'HEEPS T 32 K 64 bins 2 ms/Step 64 Steps
128 ms/sweep; '
0104 53205420
0108 20333220
010C 4B202036
0110 34206269
0114 6E732032
0118 206D732F
011C 53746570
0120 20202036
0124 34205374
0128 65707320
012C 20203132
0130 38206D73
0134 2F737765
0138 65703B20
013C 20
013D 53746570 758 DB 'Step energy sweep every set of bins '
0141 20656E65
0145 72677920
0149 73776565
014D 70206576
0151 65727920
0155 73657420
0159 6F662062
015D 696E7320
0161 20
759 ENDIF ;IF (OVERSAMPLE)
760
761 ; PARASYNC
0016 762 EOC SET ($/16)
0170 763 EOC SET (EOC+1)*16
0170 764 ORG EOC
0170 765 OPTIONS:
766 IF (FAST_OUT)
0170 46617374 767 DB 'Fast_Out; '
0174 5F4F7574
0178 3B2020
768 ELSE
769 DB 'NO_Fast_Out; '
770 ENDIF ;IF (FAST_OUT)
771
772 ; PARASYNC
0017 773 EOC SET ($/16)
0180 774 EOC SET (EOC+1)*16
0180 775 ORG EOC
776 IF (SKIP_TWO)
777 DB 'on RESET skip two words out; '
778 ELSE ;IF (SKIP_TWO)
779 IF (SKIP_ONE)
780 DB 'on RESET skip ONE word out; '
781 ELSE ;IF (SKIP_ONE)
0180 6F6E2052 782 DB 'on RESET DO NOT Skip ANY words out; '
0184 45534554
0188 20444F20
018C 4E4F5420
0190 536B6970
0194 20414E59
0198 20776F72
019C 6473206F
01A0 75743B20
01A4 20
783 ENDIF ;IF (SKIP_ONE)
 784 ENDIF ;IF (SKIP_TWO)
785
786 ; PARASYNC
001A 787 EOC SET ($/16)
01B0 788 EOC SET (EOC+1)*16
01B0 789 ORG EOC
790 IF (SYNC1PPS)
791 DB 'force energy sweep to reset at 1PPS; '
792 ELSE
01B0 4E4F5F53 793 DB 'NO_SYNC1PPS; '
01B4 594E4331
01B8 5050533B
01BC 2020
794 ENDIF ;IF (SYNC1PPS)
795
796 ; PARASYNC
001B 797 EOC SET ($/16)
01C0 798 EOC SET (EOC+1)*16
01C0 799 ORG EOC
800 IF (DOSYNCH)
801 IF (MASTER)
802 DB 'MASTER: SEND COMMAND TO force energy sweep
reset in other 8051s '
803 DB 'every 8 sweep resets '
804 ELSE ;IF (MASTER)
805 DB 'SLAVE: SYNC energy sweep on command '
806 DB 'every time received '
807 ENDIF ;IF (MASTER)
808 ELSE ; IF (DOSYNCH)
01C0 4E4F204D 809 DB 'NO Master/Slave SweepSynch; '
01C4 61737465
01C8 722F536C
01CC 61766520
01D0 53776565
01D4 7053796E
01D8 63683B20
01DC 20
810 ENDIF ;IF (DOSYNCH)
811
812 ; PARASYNC
001D 813 EOC SET ($/16)
01E0 814 EOC SET (EOC+1)*16
815 IF (TWO6)
01DD 36342062 816 DB '64 bins output; '
01E1 696E7320
01E5 6F757470
01E9 75743B20
01ED 20
817 ELSE
818 IF (TWO5)
819 IF (PAD)
820 DB '40 bins output; '
821 ELSE ;IF (PAD)
822 DB '32 bins output; '
823 ENDIF ;IF (PAD)
824 ELSE
825 IF (TWO4)
826 IF (PAD)
827 DB '20 bins output; '
 828 ELSE ;IF (PAD)
829 DB '16 bins output; '
830 ENDIF ;IF (PAD)
831 ENDIF ;IF (TWO4)
832 ENDIF ;IF (TWO5)
833 ENDIF ;IF (TWO6)
834
835 ; PARASYNC
001E 836 EOC SET ($/16)
01F0 837 EOC SET (EOC+1)*16
01F0 838 ORG EOC
839 IF (OLDSTYLE)
01F0 4F4C4453 840 DB 'OLDSTYLE ack handling; '
01F4 54594C45
01F8 2061636B
01FC 2068616E
0200 646C696E
0204 673B2020
841 ELSE ;IF (OLDSTYLE)
842 IF (NEWSTYLE)
843 DB 'NEWSTYLE ack handling; '
844 ELSE ;IF (NEWSTYLE)
845 DB 'NOT_OLDSTYLE ack handling; '
846 ENDIF ;IF (NEWSTYLE)
847 ENDIF ;IF (OLDSTYLE)
848
849 ; PARASYNC
0020 850 EOC SET ($/16)
0210 851 EOC SET (EOC+1)*16
0210 852 ORG EOC
853 IF (PARANOID)
854 DB 'PARANOID; '
855 ELSE
0210 4E4F545F 856 DB 'NOT_PARANOID; '
0214 50415241
0218 4E4F4944
021C 3B2020
857 ENDIF ;IF (PARANOID)
858
859 END

VERSION 1.2h ASSEMBLY COMPLETE, 0 ERRORS FOUND

A0 . . . . . . . . . . . . . . . B ADDR 00B1H NOT USED
A1 . . . . . . . . . . . . . . . B ADDR 00B2H
ACK. . . . . . . . . . . . . . . B ADDR 00B7H
AR0. . . . . . . . . . . . . . . D ADDR 0000H NOT USED
AR1. . . . . . . . . . . . . . . D ADDR 0001H NOT USED
AR2. . . . . . . . . . . . . . . D ADDR 0002H NOT USED
AR3. . . . . . . . . . . . . . . D ADDR 0003H NOT USED
AR4. . . . . . . . . . . . . . . D ADDR 0004H NOT USED
AR5. . . . . . . . . . . . . . . D ADDR 0005H NOT USED
AR6. . . . . . . . . . . . . . . D ADDR 0006H NOT USED
AR7. . . . . . . . . . . . . . . D ADDR 0007H NOT USED
BIN0 . . . . . . . . . . . . . . D ADDR 0040H
BIN1 . . . . . . . . . . . . . . D ADDR 0041H
BIN15. . . . . . . . . . . . . . D ADDR 004FH NOT USED
BIN16. . . . . . . . . . . . . . D ADDR 0050H NOT USED
BIN19. . . . . . . . . . . . . . D ADDR 0053H NOT USED
BIN20. . . . . . . . . . . . . . D ADDR 0054H NOT USED
BIN31. . . . . . . . . . . . . . D ADDR 005FH NOT USED
BIN32. . . . . . . . . . . . . . D ADDR 0060H NOT USED
BIN39. . . . . . . . . . . . . . D ADDR 0067H NOT USED
BIN40. . . . . . . . . . . . . . D ADDR 0068H NOT USED
BIN64. . . . . . . . . . . . . . D ADDR 0080H
CTR. . . . . . . . . . . . . . . B ADDR 00B4H
DOSYNCH. . . . . . . . . . . . . NUMB 0000H REDEFINABLE
END_HT . . . . . . . . . . . . . NUMB 0003H
EOC. . . . . . . . . . . . . . . NUMB 0210H REDEFINABLE
EVENT. . . . . . . . . . . . . . B ADDR 00B5H
FAST_OUT . . . . . . . . . . . . NUMB 0001H
FLAG . . . . . . . . . . . . . . REG7
FOO0 . . . . . . . . . . . . . . C ADDR 0094H
IE . . . . . . . . . . . . . . . D ADDR 00A8H PREDEFINED
IGNORE . . . . . . . . . . . . . D ADDR 002BH
INC_HT . . . . . . . . . . . . . NUMB FFFDH
INTV1. . . . . . . . . . . . . . C ADDR 0013H
LAST_HT. . . . . . . . . . . . . NUMB 0006H
LP0. . . . . . . . . . . . . . . C ADDR 009BH
LPRESET. . . . . . . . . . . . . C ADDR 001BH
LPRESET2 . . . . . . . . . . . . C ADDR 0037H
MASTER . . . . . . . . . . . . . NUMB 0000H NOT USED REDEFINABLE
NEWSTYLE . . . . . . . . . . . . NUMB 0000H NOT USED REDEFINABLE
OK . . . . . . . . . . . . . . . C ADDR 0043H
OLDSTYLE . . . . . . . . . . . . NUMB 0001H REDEFINABLE
OPTIONS. . . . . . . . . . . . . C ADDR 0170H NOT USED
OVERSAMPLE . . . . . . . . . . . NUMB 0000H
P1 . . . . . . . . . . . . . . . D ADDR 0090H PREDEFINED
P2 . . . . . . . . . . . . . . . D ADDR 00A0H PREDEFINED
P3 . . . . . . . . . . . . . . . D ADDR 00B0H PREDEFINED
PAD. . . . . . . . . . . . . . . NUMB 0000H NOT USED
PARANOID . . . . . . . . . . . . NUMB 0000H
PPS1 . . . . . . . . . . . . . . NUMB 00B2H NOT USED
PROG0. . . . . . . . . . . . . . C ADDR 0080H NOT USED
RESET_ . . . . . . . . . . . . . C ADDR 0017H
RESTART_HT . . . . . . . . . . . NUMB 00C6H NOT USED
ROM_ID . . . . . . . . . . . . . C ADDR 00C0H NOT USED
SAMPLE . . . . . . . . . . . . . NUMB 0001H NOT USED
SKIP_ONE . . . . . . . . . . . . NUMB 0000H
SKIP_TWO . . . . . . . . . . . . NUMB 0000H
SLAVE. . . . . . . . . . . . . . NUMB 0000H NOT USED REDEFINABLE
SP . . . . . . . . . . . . . . . D ADDR 0081H PREDEFINED
START_HT . . . . . . . . . . . . NUMB 00C3H
SWEEPDATA. . . . . . . . . . . . C ADDR 0100H NOT USED
SWP. . . . . . . . . . . . . . . D ADDR 0020H
SWPRST . . . . . . . . . . . . . NUMB 00B4H NOT USED
SYNC1PPS . . . . . . . . . . . . NUMB 0000H REDEFINABLE
TCON . . . . . . . . . . . . . . D ADDR 0088H PREDEFINED
TLP0 . . . . . . . . . . . . . . C ADDR 00AEH
TST. . . . . . . . . . . . . . . B ADDR 00B0H
TST0 . . . . . . . . . . . . . . C ADDR 00A7H
TWO4 . . . . . . . . . . . . . . NUMB 0000H NOT USED
TWO5 . . . . . . . . . . . . . . NUMB 0000H NOT USED
TWO6 . . . . . . . . . . . . . . NUMB 0040H
VECH . . . . . . . . . . . . . . D ADDR 0022H
VECL . . . . . . . . . . . . . . D ADDR 0021H
WT . . . . . . . . . . . . . . . C ADDR 0044H