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    Bogart chapter 4 electronic devices and circuits

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    Bogart chapter 4 electronic devices and circuits

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    © All Rights Reserved
    Download as PDF or read online from Scribd
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    43 views28 pages

    Chapter 4-Rotated-Pages-1-28

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    adil sarwar khan
    Bogart chapter 4 electronic devices and circuits

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    © All Rights Reserved
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    @ OBJECTIVES |e Enplore the bace de bie configurations forthe bipolar junetion transistor “Develop an understanding ofthe relationship between lo Ip and hs “= Understand the transistor modes of operation and how they apply to circuit operation Understand the characteristics of basic transistor curves. ‘Explore the use of a BJT transistor switch and understand how to bias the transistor switch for use ina eircut. 41 INTRODUCTION ae “Tre workhorse of modern electronic circuits, both discrete and integrated “Gnslog and digital, isthe transistor. The importance ofthis versatile device ‘Stems from its ability to produce amplification, o gain, in a circuit We say ‘Hr mplificaion has been achieved when a smal vatiation in voltage or Current fs used to create a large variation in one of those same quantities Sed this the fundamental goal of most electronic circuits. As a means for ‘ating gen, the transistor isin many ways analogous to a small valve in @ age mater system: By expending a small amount of energy (turning the BIPOLAR JUNCTION TRANSISTORS OUTLINE ‘yalve), we are able to control—increase or decrease—a large amount of ease) (lathe flow of large quantity of water) When a device such asa tran- ‘Shor fs used to ereate gain, we supply a small signal to it and refer co that as {he input, the large corrent or voltage variations that then occur at another point inthe device ae referred toas the output “The two most important Kinds of transistors are the bipolar junction type and the fiedeffect type. The bipolar junction transistor (BJT) is so named | “1 Tatroduetion "Theory of BJT Operation Common-Base Characteristics Common Emitter Characteristics Common-Collector Characteristics {hi polar-ivo polarities) because of its dependence on both holes and Bias Cirewits electrons ‘carriers, We wil study the theory and applications of change ‘polars in thinand the next chapter, and devote equal time to field-effect transistors (FETS), whieh operate under completely different principles, in Chapter. ‘We should noce that bipolars are studied first fr historical reasons, and ‘because the theory ofthese devices follows naturally from a stady of pn june: ‘ons. Their precslence in out study should in no way imply that they are of roster importance than field-effect transistors. Bipolars were the frst kind ‘St eransistors to be widely used in electronics, and they are sill an important Segment of the semiconductor industry. Most people in the industry stil use {he word transi (as we shall with the understanding that a bipolar tran- J eiatis meant However fleldetfect technology has now evolved to the point RSC Hts are ued in greater numbers than BJTs in integrated circuits for UGigital and analog applications. Design Considerations ‘The BJInverter (Transistor Switch) ‘Transistor Types, Ratings, and Specications ‘Transistor Curve Tracers | YT Circuit Analysis with Electronics Workbench Multisim Summary Exercises 4.2 THEORY OF BJT OPERATION 4-2_THEORY OF BJT OPERATION _______ [X bipolar junction transistor is a spectally constructed, dhree terminal semi Conductor device containing to pa junctions. Tt can be formed from a bar of ‘ateral that has been doped in such a way that it changes from n to p and ‘ack ton or from p to mand back top-Ineither case, a junction is created at tact of the two boundaries where the material changes from one type tothe ‘ther Figure 4-1 shows the fo ways that itis possible to alternate material ‘ypet and thereby obtain two junctions J Bipolar Justin Transistors Biasing the wo P= ure «> | ston comeacn TL we pa wre | When @ transistor is formed by sandwiching a single p region betwee) ‘worn regions as shown in Figure 4-1(a), itis alled an npn type. Figure 41 shows the pnp type, containing a single n region between two p regions ‘The middle region of each transistor type is called the base of the tran. sistor Of the remaining two regions, one is ealled the emitcer and the o(hcr is called the collar of the transistor. Let us suppose that terminals sre attached to cach region so that external electrical connections car be ‘made between thom, (In integrated cireuits, no such accessible terminal ‘may be provided, bat i is still possible to identify the base, emitter, and collector and to form conducting paths between those regions and other internal components, Figure 4-2 shows terminals attached to the regions of each transistor type. The terminals ae labeled according to the region ‘to which they connect “The physical appearance ofan actual transistor bears little resemblance to the figures we have shown s0 far. However, these kinds of diagrams are very helpful in understanding transistor theory, and Figures 4-1 and 42 fare representative of actual transistors in at least one respect: The base region is purposely shown thinner than either the emitter or collector region. For reasons that will become evident soon, the base region iz a Actual transistor Is made even thinner in proportion to the other regions than is depicted by che figures. Also, the base region is much more lighdy doped than the other regions." Both these characteristics of the base are important for the transistor to be a useful device and to perform what is called normal “transistor action.” For the sake of clrity, we wil continue our discussion of transistor theory in terms ofthe npn type only. The underiying theory is equally applicable te the pnp type and ean be “translated” for pps simply by changing each eaeie= type mentioned in connection with mpns and reversing each voltage polarity. ‘To obtain normal transistor action, i is necessary tobias both pn junctions Br connecting de vokags sources across them. Figure 43 illustrates the correct bias for eath junction in the npn transistor Ia the figure, we show the result 0° Diasing each junction separately, while in practice both junctions will be biased simultaneously by one external circuit as willbe described presently. ‘As shown in Figure 4-3(a), the emitter-base junction is forward biased by the de source labeled Vee, Note thatthe negative terminal of Vp, is connected to the mside of the mp junction, ax required for forward bias. Consequently, there is a substantial flow of diffusion current acros the junction due to the flow of the majority carviers (electrons) from the miype emitter This action 1s exactly that which we discussed in connection with a forward-biased prt “tortagalecizus te rites say hom done") mata Nesting es BITE oc ne nents ‘with bth bas sources connected 2 The depletion region this junction made narrow stn doscrbed in Chapter 2 Ths with ofthe base oe prone of lrty When the majety Se become minenty eaters in that POPE er have been inated int the base. Junctions reverse biased by junction in Cheptce he forward bin, Ragin is engaeeted nthe ‘Sons fase nc the bas, ‘ein ny ta nny cai are ‘re 3b) shows that he collector base rot ene eee labeled You The positive terminal of Ves connected 0 th aoe eg est, the depletion region at ehis Junction is re ae aay earreat that flows frm base to collector is due the minority electrons crossing the junction from the p-type baie Reval from mori eee nrnonty corrers readily cross a reverse-biased junction Chapter 2 uence atthe elec il nd they consiate the flow of rovers cvrent in the junction: Se, wet nm transistor the way it is bse for normal oP on he tours Vr an Vee onnected simalanenuly. Note inthe Fae see trminal of Vis connected co th postive terminal of Fi aa eer thos are joined to the bse The bases then the“Eround, aera ee paint ofthe ret, and can therefore be regarded as being et OV. 3 com oi ivi rapes othe base and he cect spose tith The emir etree are the conditions we require inorder t forward iss aa ee junction and to reverse bas the cllector-base uncon, te ee a region is very thin ands ightly doped relative tothe ncaa ter go here are elatiely few holesin yey fw ofthe aor ected into the base from the emiter recombine wi econ eae to the rover biased base-colletor junction and ace Tastead they Ot tJoneon under the influence of the electric eld stay TES ye: Remember oa tat te leone nected ine he at sh Ne Ror hae, nod that minriy cares =e eae tim, We conclude cha electron flow consdtses ie reverse binge type in an pm transistor. Fora pp transistor, in wh aomnee in opposte hole current isthe dominant Pe haptor 4 Despite the fact that most of the electrons injected into the base {nto the collector, a few of them do combine with holes in the base. Fora ‘electron that combines with ahole,anelectron leaves the base resion via, ‘base terminal. This ation creates very small base current, about 2% or ofthe electron current from emitter to collector As we shall see, the sma this percentage, the more useful the wansistor is in practical applications ‘Note in Figure 44 that arrows are drawn to indicate the directing ‘conventional current in the npn transistor. Of course, each arrow pointy ‘the opposite direction from the election flaws that we have described. ¢ ventional current flowing from Voc into the collector is celled collection cn ‘rent and designated [c Similarly, current int the base is I, the base and current from Veg into the emitter is emitter currant ly Figure 4 och shows the standard electronic symbol for an npn transistor, with these g ‘ents labeled alongside. Figure 4-5(b)shows the same block form ofthe that we have shown earlier and is included as an aid for relating the «al device tothe symbol. Figure 4-6 shows the standard symbol fore transistor and its equivalent block form. Comparing Figures Sand 6, note frst that the emitter of an npn wransistor is represented by an a pointing out from the base, whereas tke emitter of a pnp transistor iesho ‘san arrow pointing into the base. It is easy to remember this distineuey by thinking of the arrow as pointing inthe direction of conventional curren: flow, out of or into the emitter of each type of transistor We further naw thatthe polarities ofthe bias sources forthe pnp transistor, Vax and Yoo aos the opposite of those for the npn trans stor. In other words, the posthte sel negative terminals of each source in Figure 4-6 are the reverse of those Figure 4-5. These polarities are of course, neceseaty in each case to main fain the forward and reverse biasing ofthe junctions, as we have described Note, for example, that the negative terminal of Vic is connected #0 the type collector of the pnp transistor. Recapitulating, here is the all Important universal rule for biasing transistors for normal operate (memorize it: The emitter-base junction must be forward biased, and the cullector-base junction must be revere biased. ‘To emphasize and clarify an important point concerning transistor currents, Figure 4-7 replaces cach type of transistor by a single Block ana shows the direetions of currents entering and leaving each. Applying FIGURE $5 Bquivalent apn transistor dlagrams ebb ‘Let fl t - fe nisms panne ‘Bipdar Junction Dansistors HoH We > Bach rans type Inseplced bya singe Blok Highligh evrrent flows in sad ou of the devies oo — [toe ‘oleae | | caren law to each of Figures 47(2) and (we immediately ‘han hs oportant ration aplcbl oth pn ahd pp ranssors Hb beak h lat is geaphically depicted in Figure #8 Tey Reverse Current te cs tha nal ec ome rs rar gO erates acess ce aaaerza eects a espe acs ane Use etre Meelis formes eee se se Se ae eee Cae ee eae intact noe Site ste ce fe sis ita nen eae re ae pee beeper ere Sane ere ne oad carta aoe ines tsnaiy paren SY ecprad the base and emitter Fo oe een ata eae sn nlp eae eee Se re eee Gye thre canbe no caries injected into the tase: Consequently he ‘rly current that flows must be that “reverse” compoxent due to thermally Seep Tasca eae ‘curent that fos when the emitter Caaprer apis the collect a em core, th th ener Open. Therefore a armel oper tonite seit connected, the tual calecarcartent ie expesecd ag Ie= e+ fan ‘ ‘et Shs import iss ercer ph ie dotined al the cllector current resulting from carter injection to the total emi a Sage through the base to become collector current Clery awl wap SeSimoniastnmcyatarcenenra ae sistor to be constructed so that its base current all a posal i ‘because that makes Ic close to Ip and a cle ‘Spiel ts ‘values of a that range from 0.95 to 0.995. See emitter current that makes it through the base ne thermal seneraed collector current (leno). See Se yam gmt Pee ata nengemmenareal mo tat ame nan motets inattention a Seon mp nt are igrausityaitndiereenscurmarmnct calletor- base junction ina transistor normally reverse biased by a Shounen smc ce ‘ts saturation value (J,, in Chapter 2). Remember that [, approximat ” EkeEsiodieiettneesren ue mrbas tomers high ompertoes an lange power dips oe Wevel explore the stuatonsin more detaiinter ine eure Rete worm cia res ca betes tie org Scere hte miter Grose ‘completely dominate the reverse current that temperaturerelaed in in roman npg, faci conventional mot tox and produ eal 10 refer to Icgo as the (collector-to-base) leakage current. i seas cn ‘equal to 0 in equation 4-2 and obtain the good approximation | - tena a and co} ‘polar junction Transat eo ‘The emitter current in a certain npn transistor is 8.4 mA. If 0.8% of the The iy carvers injected into the base recombine with holes and the leak snerprren i 1 hy find (1) the base cstrent, (2) the collector current a8 cuTenctralue of =, and (4) the approximate value of a, neglecting lan (0.8% off) = (0.008)8.4 mA) = 672 nA 2. Prom equation #1, [c= fy~ Ip = 84 mA ~ 0.0672 mA = 83328 mA 2 prom equation 42a Jefe Teno = 83828 ¥ 10.°A - 10 7A = 83327 mA. By equation 4-3,a= (83327 mAY(R4 mA) ~ 09919881 4. By approximation 45,4 = fl = (8.3328 mAY(B4 mA) = 2.992 ‘For the conditions of this example, we see that the exact and approximate For ane enter 20 close thatthe difference between them can be entirely neglected. 4-3 COMMON-BASE CHARACTERISTICS _ a. ‘fr our introduction to the theory of transistor operation, we showed & rout (rigure 44) in which the base was treated as the ground, or “coramon” hint of the creat. Im other words all voltages (collector tobase and emitter Petpse) were referenced tothe base. This bias arrangement results fo what i tapes he common-base (CB) configuration forthe transistor It represents only sae thrce posfble ways to arrange the external iret to achieve a forward: Tied base tocmiter junction and a reverse biased collector:o-base junction, ieee ay one ofthe three terminals can be made the common point. We ilk ud the other two configurations in later discussions “he cgnifcanee of having a common pont in a transistor circuit fs that it giver us alngle reference for both the input voltage tothe transistor andthe eee raltage- I the CB configuration, the emiter-base vokage is regarded (uit Taput yoltage andthe cllector-base voltage is regarded asthe output weituce Soe Figure #10. Notce the reference for Vey and Vex where standard Sanne Specript notation means “voltage at rst subscript with respect to see aoe paerint” For nortaal transistor ation, Ves is postive for pnp and nega: Re for mre On the other hand, Voy is negative for pnp and positive for npn Feese aiyais of the CR configuration, the “input” voltage will be the wstter bese bias voltage (Vaa), and the “output” volage will be the i catoe base bias voltage (Vea) a Chapter 7, we will adop! a more realistic saasbeint in which we will regard small (ae) variations inthe emitter-base Thd"Pollector-base voltages as the input and ourput, respectively, For the are Sozing, we will concer ourselves only with the effecs of changes in Vax seer Ves os the behavior of the transistor Do not be confused by the Face that the “Egat” current in the npr circuit (Figure 4-10(a)) (lows our of the ph £ eke \ ts ae 7’ ‘iw I! ss see h aoe ed ™ 2 S i om oe [FIGURE 1-10 Input and output voltages in mpm and pnp common base rensiors it willbe small changes i pier, Aes wl be small hanes inthe mane off that Our objective now tt lear how the topee sul ere corvettes ribzol to occ eter va Gl conga are related 1 each other n'a CB co “eft nl de ol charter sii nd haces The apa ct “i tween input current and input volt different values of a Sed te ouput Characters show te tation been cut eae i lag or aif ahr pi carn Asset es : snare erin ce iat tag) hat {tye cea stoderwed he input corre) thease oy Common-Base Input Characteristies Letusbegin with stay ofthe CB Lets ofthe CB input characteristics of yp Tetawe the Int acim te foward bed asec amines siesta ghee iaceeers ‘on the reverse biasing output voltage, Vey. The reason pe ndency shrine ee Yn oe ‘Se eaiy minority carers ase are swept through the baseo-ole Hon. (Remember chet ee nee eee REIS Rena sch ie Gcterecel an cage pte Spero ee ea nae Fm Se a N11 Comme me sharacteristies (npn) i. polar Justin Trassstors problems they covey a weath of iaformation and we wil 5 rT of problems orore Each st shoold be srnized and welled P00 0 STS bem in ne how currents andor voces change when ome Qh) Tey 1 ade thers ar varied. Not that a fay of cures can S50 eld conta pong thre variables two represented By ‘he a0) 9008 {he elt by each cure. In Fgute 4-11 each curve covresponds 1 & era of Via and therefore ea shows How emir cUTEn! is erent ee ter atage fra fined vale of Von good ay fo ee (NS ith ase nk ofan experiment in which the reverse Blank ylaee Va fa ef mensurementsot tase fr diferent satin of Yin et fixed and id hen et Vogt new vole and repeat the meaturemen se ese Vegi set toa new valve, anew curve is obtained Se ese Aci that each curve resembles «forward biased diode cane expected Por a given vale of Vin ican be seen at's haractris Sporting Vex This variation has already Eeen expline sacra ey Vo promotes minority carrie flow We seein te HEdre ay terms they He differencein the shapesct the curves as Veni chanass tae ie lde range. For that reason, the effect of Ya on the I 1s ove aa odin practical problems An “average” forvardbiased diode ate assumed. Caer pn characteristics for app transistor wil of course have Ne ea saat appearance as those shown fran non inFigare 431. Howrey ame gene toe forwar-biasng input volage is psie when meyer, ina perf base Some daa sheats show negative valuss fr PoP ages Irom te because these quantiteshave directions thet are the oppose ar a eaponding. mpm quantities. For example, ifthe horizon) 2st oe corer ale yor app transistor then al ale als Sore gute at ese ign conventons (rater, this lack of consisteney ne ae a rae et alway be resolved by remembering the fundamental ne enfusing but Cn: Duoe-eniter forward and bese-collecor reverse, Fins for rane on that sme authors and some data shests refer co the CS We athtracter sts asthe emitercharacerste of «transistor “Tho wransistor shown in Figure 4-12 has the characterise cures shown in Fag 4 When Ver is et co 25 Vis found that c= £94 A 4. Find the a ofthe transistor (neglecting lx 3 Repeat, = 1987 maA when Vecisreplaced by» short circuit to ground: +e Figure 12, we see that Var = 07 V. From Figure 4-11, he erueat in Pigre Sponding to Var = 0.7 ¥ intersects the Vox = 29V, curve at dine Srpak Therefore, a= fle = (854 mAY(S.0 mA) - 0.9955 2, When Vg invepaced bya ahortcreultywe ave Ven 0 From Figure 2, Heer Yeg 2 OW aod Vac = 07 Therefore fil, (2987 AY Goma) = 0.9935, Pou RE 12 example +2) o junto Transbtors ®@ Chapter Bipot ou Amexperiment that ‘ould be used ro produce the autpt Sharaceriis shown in Figure #14 ee A My kk ta even < Fe ry le [rat fea[ 1 aa] aa Tne 0 ea] 0 real ie 3 [ al eal ip sa en oF 1 With Ven Set 1 V, aust Vp to obtain = 1 mA. Mesures 1 record : = 2 dncrease Veo pxvely in sal tps ach ime measuring os sr 9 pecetsry o mina he orignal value of, Cuntoue oa : ‘ea reached 2 Pt Tver ew am. aw 3 Repeat stp with Yin. adused to produce & ae sly oN oe - i te sale off Then repent sep on ae in Rees sep 3 ul the Bed value off has reached 9 mA, ‘Common-Kase Output Characteristics Consider now an experiment in which the collector (output) current measured as Vex (the output voltage) is adjusted for fixed settings {he emitter (input) current. Figure 4-13 shews a schematic dlagram say Procedure that could be used to conduct such an experiment on aa pn tras, ‘stor. Understand that Figure 4-13 does not represent a practical circa that could be used for any purpose other thin investigating transistor char acteristics. Practical transistor circults contain more resistors and have ‘input and output voltages that are different ‘rom the de bias vltages, How. ver, a this point in our study of transistor theory, we are interested fa the ‘ransstor itself. We are using characteristic curves to gaia insights into how: the voltages and currents relate to each other in the device, rather than the external circuit. Once we have gleaned all the device information we can from studying characteristic curves, we vill heve a solid undeston (of what a transistor really is and ean proceed to study practical circuits When cis plotted versus Vey for different vaiues of Iz, we obtain the family of curves shown in Figure 414: the outpue characteristics for the CB configuration. A close examination of these curves will reveal come nove facts about transistor behavior ‘We note first n Figure 4-14 that each cure starts at Je = O and rises rap {aly fora small postive increase in Veg. In otter words, I increases rapidly Just as Veg begins to increase slighty beyond ks initial negative velue Since {each curve represents a fixed value of Ip, this means that while Ii acres fing, the ratio 1, must also be increasing. But lly equals, s0 the implica. lon is thatthe value of a fora transistor is not constant. Alpha starteat and increases as Vo increases. The reason fr this fact i theta very small porio® ofthe emitter Current is able to enter the collstor region until the severae. biasing voltage Vey is allowed to reach a valve large enough t propel all arriers across the junction. When Vey is negative, the junction actually FIGURE 4-1 Common-bise output charactoristics (apn) Note thatthe sapere ect epi in Cr fe recut area eat ane oe there Vy is Repative He called the saturation region of the transistor By Mite Sines nate anes cee Se on ieahaneies mabe ieee = eect cna were sna gront ra incase creme cdeae atin an cee ee serait au ar energie alco ancitaceste Sone to ands octal constant. Tse obervation correspond io vat Serretioe canines atrrgt soicemamdsanane nance t See ee tame eee tee metho itacteterinti te iron nme acne ease ag a estnger tars ierinnat Soweas ma cteaganse we pain ce Say Sen ie Sb feausacte(p igus avrarete tua aE ema aoe annotate Fone wnmettrgenae ati Sw fhce ig one oer region of the output charctrses that deserves saa fovea th carve comnapending Ois very close to the f:= 0 line. When the emitter current is made 0 (by opening the external mite ult), no minority carriers are injected into the base, Under those condi the only callector eurrent that flows is the very small lekage curren, 8 we have previously described (soe Figure 4-9). With the scale used plot the output characteristics in Figure 4-14, a horizontal line coresp. 101, = hy» coincides with the Ic ~ Oline, for sll practical purposes. Ther of the output characteristics lying below the I ~ 0 lin is ealled the region because the collector current is essentially O (cutoff) there. A tor is said to be in the cutoff state when both the collector‘bese ‘emitter-base Junc:ions are reverse biased. Except for special digital a transistor is not normally operated in its cutoff region. AA certain npn transistor has the CB input characteristics shown in 4-1 and the CB oatput characteristics shown in Figure 16, 1. Find its collector current when Vey = 10V and Vag =0.7¥. 2, Repeat when Wig = SV and fy = 5.5:mA. 4. From Figure 4-11, we find Jy = 4 mA at Vas = 0.7 V and Veg Figure 4-14, he Jp = 4'mA curve runs just below fe = 4 mA. The current under these conditions is practically 4 mA, independent of Vay ‘The conditions given require that we interpolate the output characte tics along the vertical line Veg = SV between fg = 5 mA and ly The value of that is halfway between the Jp = 5 mA and I; = 6 curves is approximately 55 mA. Note that igh accuracy is not pe ‘when using characteristic curves in this way. In most practical situate ‘we could simply assume that Zc = Iz without seriously affecting Accuracy of other computations, Breakdown As is the case in a reverse-biased diode, the current through the collec tor-base junction of a transistor may increase suddenly if the reverse. biasing voltage across tis made sufficiently large. This increase in curreat 48 typically caused by the avalanching mechanism already described in connection with diode breakdown, However, in a transistor it can also be the result of a phenomenon called punch through, Punch through oceats when the reverse bias widens tho collector-base depletion region fo the ‘extent that it meets the base-emitter depletion region, This joining ofthe to regions effectively shores the collector to the emitter and causes a ui stantial current flow. Remember thatthe depletion region extends farther {nto the lightly doped side of a junction and that the bate is more light) oped than the collector, Furthermore, the base Is made very thin, so the {wo junctions are already relatively close to each other. Punch through ca bea limiting design factor in determining the doping level and bese widt® ota transistor Figure #15 shows how the CB output characteristics sea when the effects of breakdown are included. Note the sudden upward swing of each curve at a large value of Veg. The collectorto-base break: down voltage when Jy = 0 (emitter open) is designated BVeqy As can be seen in Figure 4-15, breakdown occurs at progressively lower voltages for increasing valves of Ip. ‘Although the base-emitter junction is not normally reverse biased, there ‘are practical applications in which itis periodically subjected to reverse bias ‘Bipolar Junction Transistors e HURL 1S Commontase Z sae utp characterises shoving the trecklown rion cours to can ek down anditereversereakdown vag isa sete ham afte colette junction Base emiterbreskdown Bates atu, so deigors mun be awe of the anulectorrs 1 cits mame fevers bse-mier vase ste met ote on anssr operation, we should mention that some veins tn be (and ocasoaly are) operated in wht 1s called a sand, Ins mode te miter used asthe collector and vice se rods ine ceris the mont hes doped of there eos ee netautnor ls specifiy designed orivered operation ft wil eet taal that mode The nin te verted mode designed eee Neale thas thew that can De eaized in conemsa coats 4-4 COMMON-MITTER CHARACTERISTICS The nox ansstor ia arrangement we wil ty is called the common rarer ey coigartin ris urate i gore 416. Nove that te sre Cee source Vag sued to forward ins the base-emir ne std Ue enteral sou reused revere tas the cllector tae ion tac magutad of Yc greater han Yqto ene tht he a esc tein remains reverse based, because, a can be S22h eee ee ie =r {te Rivets voltage lw around the Ip fs tne collects hgh Vo through Vay and back ote ole oe Ate termial of cone the ground, or comm, termina a {Ee conigraion ey ows that the np voltage i the CE configuration ie he tas itervllage ad the utp vltage isthe colector-emiter vag ‘i iapu cates fy and te output erent is Ip The common-emiter (0) pup Noe. Vp and Vor we neaive ‘ex pp sss acrangmen's Chapter HIGH 417g and output voltages anc 1h ett nt eupu tage and cre for mp ad np rani configuration isthe most useful and most widely and most widely used transistor cont tion, and we will xtndy it in considerable detail. In the process ee ‘some new facts about transistor behavior. a Tegp and Beta Before investigating the input and efor 1¢ input and output characteristics of the CE. ‘puion, we wil drive new relationship between fe ad lus Altbough vaso dis depend i ay way on the bas arrangement sedi rove with sme new paraneters that atest for rediting {pth CE, configuration and for relating CE inp and tp care k e+ leo Te leno = tle Dividing through by «, Je ena + Ie for Ip on the righthand side, Substituting Te_lexo Eee Colleccng the cerms involving /cleads to Using equation 4.6 we can obi ani ain an expression for reverse “leak inthe CE con'gartion Figure -18 shows nn and pry eeasistors in whch the basset er cea = = reais ae lft open whl heros ‘alge cer remain comer canbe seen gare Cth et aero that an flow en the bas et open severe cette tbe cltecor-Sase junto. Tis cutet flows om the colceoe eos te region dino te eminer His desgased eg calcco ebeater peur ce anon 98 ew ‘current with the base Open, (Note, once agai, that this “reverse” current is {in the same direction as normal collecor current through the transistor) ‘Because Ty mist equal O when the base is open, we can substitute Iy = On equation 4-5 w obtain (hg oo + Because the «of a transistor is close to 1,1 ~ a is close to 0, and so 1(1 ~ a) fan be quite large. Therefore, equation #7 tells us that CE leakage current {s much larger than CB leakage current. For example if fo ~ 0.1 pA and 10.995, thes Ter = (01 A/0.005 = 20 pA. n effect, collector-base leake Je current it amplified in the CE configuration, a result that can cause problems in hightemperature circuits, particulary those containing germa- ium transistors. TReturningto equation 46, let us focus on the factor al(t ~ ) that mult plies Ip This quantity is another important transistor parameter, called beta: Seta is always greater than 1 and for typical transistors ranges from around 20 to several iundred. When is close to 1, a small increase in a causes a Tange increase in the value of B. For example, if « = 0.99, then 8 = 0.99/ (1.0.99) = 99 Tf is increased by 0,005 100.995, then B= 0.995/(1 0.995) 198. Because a small change in x causes a large change in small manu: {facturing variations in transistors that are supposed to be ofthe seme type ‘cause them to have a wide range off values. Tris not unusual for transi: tors ofthe same type to have betas that vary from 50 to 200 ‘In terms of equation 4-6 becomes Te= Bla + = Bln + (8-4 leno ar Te Bly * Foo ae Although Foepis much greater than Fey itis generally quite small fn com patison to fly especialy in silicon transistors, and it can be neglected in rany practical eireits, Neglecting Jaq) in equation 4-10, we obtain the ‘approximation [= ily This approximation is widely used in transistor eixeuit ‘nelyss, and we will often weite tas an equality in furure discussions, with ‘the understarding that fq ean be neglected: Te= Bly lem = 0) ben Chapter A transistor bas foyy = 48 nA and a = 0.992. 1. Pind Band kro. 2 Findits exact) collector current when ly = 30 uA. 3. Find the approximate collector current, neglecting leakage current Fas _ 4856109 oe ST a Ong = SHA. OF Kem = (B + Shen 2 fe = Bly + Bou = 12830 pA) + 6 nA 3. FoBly = 12430 nA) = 3.72 mA Equation 48 ells us how to find the 8 ofa transistor, given tsi is ett. sag eneriseat the end of this chapter o show that we can find gins fui using the following relation: ‘4 30¢%4 increase in § means that B increases from 100 to 200. Leta alue ‘fe when 8 = 100 and a; = value of « when f = 200. From equation a a = 0.990099 100 Too +7 _ 20 * 200-47 ‘Thus, the percent change (increase) in ais = 8%. sg9q ~ 0995025 ~ 0.990009 Se 80099 e = 0.995005 % 100% = 0.488% Motegi # large change in (100%) corresponds to «small change in (0.488%), Common. ‘miter Input Characteristics Decuse the input toa transistor in the CE configuration i acress the base- ‘oemitterjuna Bipolar Jonetion Transistors 5 Commmeaitior ry Sy Common-emiter output characterises 1 tothe CB inp chaste, nat ction inate cet I ona othe CB input chaser not Infigue 429 thatthe np caret pleted in nie of mimamrtes le in of ou ‘much smaller than either f; or Ie (lp ‘athens ave often called the bar characteris iter Output Characte sonar sow ele cae km er et int ureter ee er eect Se epeeeriee ite value of the P of the transistor can be rary oe pt Ringe aamyy ig ur spot As lustrated in the figure, at Ver = 3 In~ 50 a ran hereof Bm a pn tn 1 ISS Zehr cont nan bt Sern Common polar hunetin Transits Chapters The Early voltage, 4 ‘herzontal ass rogion ofthe characteristics where the transistors operated. The region where. the cuves are approximately horizontal ls the active region ofthe CE configu. ration In ths region is essentially constant but increases somewhat with Vex ‘8 can be deduced from the rise in each curve as Ves increases to the right ‘Asin the CB configuration, the collector current in the CE configuration will increase rapidly if Vy is permitted to become large. When ly = 0 (base ‘pen the eolectoreo-emitter current at which breakdown occuts is desig: ‘nated BV The value of BVcgpis alwaysless than that of BVy forgiven tran sistor. BV s sometimes called the “sustaining voltage” and denoted LV. ‘When interpreting the characteristics of Figure +20 it is important to realize that each curve is drawn fora small, essentially constant valve of Vag {about 0.7V for slcon) Figure 421 illustrates this point. Noce in Figure 4-21 that the total collectortoemitter voltage Ves (which is the same as Vac in our case) is the sum of the small, forward-biasing value of Var and the reverse Diasing value of Voy Thus Vag = Ven Va 0 fo silicon, Vo = Vey + 0.7V. Taos, i Yo I Feduced to about 0.7V, Veg mst bocome 0, and the cllector-base june: tion sno longer reverse biased. Tis effect can be seen inthe characteristics of Figure 420 Notice that each curve is reasonably flat (inthe active region) unl Voy is reduced t around 0.2 «0 0.3V. As Vers reduced further, [start ofall, off When Voy i reduced below about 0.2V or 0.3V, the callector-base junction becomes wel onward biased and collector current diminishes rapidly. Remeny ‘ber that Veg is negative when the collector-base junction i forward biased. For ‘example, if Veg = 02V,then Veg = Veg ~ Vqe~0.2V ~0.7¥ = ~OSY. In keep- ing with our previous definition, the transistor is said to be saturated when the colletor-base junction i forward biased The saturation region i shown on the characteristic curves. Te saturation value of Veo designated Vegi, ranges from 0.1 V t003V, depending on the value of base curent. ‘Notice in Figure #20 that when Ip = 0, the collector current isthe same 1s that which flows when the base circuit is open (see Figure 4-18), that is, Tego The region below Ip = 01s the cutoff region. ‘Comparing the CB output characteristics in Figure 4-14 with the CE out- put characteristics in Figure 4-20, we note thatthe curves rise more steeply to the right inthe CE case. This ise simply reflects the fact we have already discussed in connection with the CE input characteristics: The greater the value of Vi, the smaller the base region and, consequently, the smaller the base current. But, because base current is constant along each curve in Figure 4-20, the effect appears as an increase in J In other words, the fact that thore are fewer recombinations cecurring in the base meats that a ‘eater proportion of carriers cross the junction to become collector current. Iisapparent in Figure 420 that the characteristic eurves corresponding to large values of fy rise more rapidly tothe right than those corresponding FIGURE $21 Veg Vig +07 V for SS to small values of Ip If these lines are projected to the lef, as shown in igure 422 itis found that they all intersect the horizontal axis at approx uel te same point. The point of intersection, designated Vn Figure £222, sealed the Barly voltage, after J-M. Barly, who first investigated these Felations.Of cours, a transistor is never operated with Vax equal tothe Early voltage. Vy is simply another usefol parameter characterizing @ transistors behavior it is especially useful in computer simulation programs such as SPICE that analyze transistor reuits and require complete descriptions of transistor characteristics, ‘A cortain transistor has the output characteristics shown in Figure 4-20 1. Find the pereent change in as Vee i changed from 1V 10 4V while fyi fixed at 40 pA. 2. Find he percent change in as Ip is changed from 10 wA t0 50 wA while Voi fixed at 35¥. [Neglect eakage current in each case 1, Att ntersctionof the vera Tine Vex = 1V with the curve fe = 404A, tend ps6 mA. Therefore, the bat thet pot Is approximately Gemaytio way = 140 wit he eee ise Vag = ve we find Ie 7.2 mA. Thereore, TE BRaeo na) = 180"The percent change in Bis e040 0 2. Atte intersection ofthe vertical line Vg = 3.5V with the eure S5O ing ait ma. Therefore, = (id mANO uA) = 40 Se de oral line of Contant Vg "38 V tts intersee dion a ae Bune Ip e 30 As me tnd fe = 7.3 mA. Therefore P= Gu Testya) = 8 The peeentchangein Bis % 100% = 28.57% ‘con When Viste o S= 110. s99y = 428% Sesto vist and he a {lotr at non monger reverse biesed cones ie ae oe), esha i Sauuetety Sims ty eaac iT ecane eter Sodas Pease tenet it es tres nga ie en Rens BESeeiintiate vials © “ay ipota uncon Translators HOO 0, aml 7) peeve ox Vea = Vor Van 080, Vr = Ve Von = Vn 50 Van = Ver — Yi Som Yo is the sal, essentially const voltage across the forwarbase ‘basctovemiter junction (about 0.7 for sion). Thus, etary wre 2 Vea = Ven" Veo~ 07 9 ha ‘Therefore, in order to keep the collector~base Junction reverse Wisse ‘patton a ny er> 0) its necessary that Vay De larger than Voc 0.7 V. are "rigure #25 shows tht the Dase~olecor voltage isthe input voltage a andthe bacecorent Is the input current Theemittr-clletor voltage isthe a Sutput voltage, andthe emitter current isthe output current PIGURE 1-250) (Example 4) igure #26 shows atypical set of Input eharactersis for an npn tran- sistor in the CC configuration. IIs clear that these are not the characteris. ties of forward biased diode, as they were in the CR and CE configurations. ‘We can sec that each curve is Grav fora diferent fixed value of Vox and that teach shows the base current going 0 0 very quickly as Vc inereases slightly. ‘This behavior can be explained by remembering that Vqg must remain in the neighborhood of 0.5 V t0 0.7 V in order for any appreciable base current 'o flow. But, from equation 4-13, Lae 24. Te common + (6) Wine coniguration Figure 4-23() shows the circuit andthe SPICE input file Note hata constant cea sue ed py bn ret he anor MODEL a tment species that f = 100 (BF = 100) and that, sere ad that the (onward) Bary voltage ‘The DC statement isthe de vagy command tha causes Vx t9 Beste in .05-V increments from 0 to 15.0V and J, to be stepped in 10-A a ftom 0 0 40. The pot generated by the SPICE soaps and the Probe ‘options shown in Figure 23(8) Notice that at Vz ean be sen fom the sepia plot that te pn ke 22m8 Note how the slope ofthe curves increas for an increasing voltage vue of Yq This s due to the effect ofthe Hany veltage, meaning that increases vith increasing Vo (nd ith increasing) 4-5_COMMON-COLLECTOR CHARACTERISTICS In the third and final way co arrange the biasing of a transistor, the collector is made the common point. The result sealed the comimor callector (CC) eo ‘figuration andis illustrated in Figure 4-26. It is apparent in Figure #240) that IBati eel Vagma esaa ie i tena ra 0 at isieatina senate aaa sa aaa Te gehen Some eee rere faa ec tin ewe ‘When leakaue curren 5 20 Re elected, recall that fe = il: But fy = fe fe= B+ Dy 7 [Equation 4-16 relates the input and output currents in the CC configure 4-6 BIAS CIRCUITS aa aaa Riise mae reer Se eee se biased ro achieve normal transistor action, We wis Bipolar Junction Transistors to adopt a more restrictive interpretation of “bias” Henceforth, we will be cor mith adjusting the ulue ofthe bias, as needed, vo obtain speci concern wit and output currents and voltages. In other words, we 2cePe rane ae both junetons must be biased in the proper direction and tae ac ate ona practical means for changing the degree of bias so thatthe are voltage for example, is exactly the value we want ito be, Whe Pu loved @ specific ousput voltage and output current, we say that Me have set the bias point to those values Common Base Bias Circuit ‘In practical creuits, we control the bias by connestng external resistors a ractfah the extornl voltage sources Van Vip ete. We can then change se ws inatead of voltage source values fo control the dc input and resistor Wages and currents The circuit used to et the Bias point ths way 2a Fahne crete Figure 4-28 shows common base bias clruits in which ieee Ra is connceted in series with the emitter and a resistor Ro ifn a resistor Bp 1s Sinctor Notice that we still regard emitter current es input sere wi ase emitter voltage as input voltage a5 18 past discussions of carrey tunfiguraion (see Figure 4-10) Likewise, collector current and ean oe ci et ltage are sil outputs The only difference is that the input cae OFain longer the same as Vex becase thee isa voltage drop across Teas he output voltage is no longer the same s Vs du tothe drop atone Fe The eateral voltage sources Vag and Vec ar called supply volages, Of Ro The ewerparacterisic curves are still perfectly valid for showing the coiaeehships between input and output voltages end currents Wi, Kircthoft's voltage law around the collecor-base Joop in Figure 4-28), we have Vec= lee + Vow $ ‘Rearranging equation 4-17 leads to nly, 4 Vee ten Biv When we regard Je and Vo as variables and Vig and Re as constants, we see renee eden 416s the equation ofa straight ine, When plotted on as of seavtnes the line has slope ~1/Re and it ivercepes the Icaxls 1 Yoxthe eaviton #218 isthe equation for the (npn) CB fod line. This load the hes aang same interpretation as the diode lo lin we studied in Chapter ct ne doug all possible combinations of voltage (Vey) and curent as Ae Som bias point must be a point ing somewhere on the Tne The (oS penton of the point is determined by tne input current I See ocd ne poiat where the Toad line intercepts the Varaxis by setting ze~ Dinoquaon #1bandsolvngfor Voy Dohivasan exercise and ery hat the Vepintercept is Vex {nga Hine through the two points Vo FIGURE 21. Loadie ploued on hom hres hee Poin or auirscont pen inet {Sethe itersection of the long tne winter Sk come Chapters PGE 629 aample oy (rome 4-6) Lond k for tho bine i han ins f Figue #29 Determine the Sketch the line ‘equation of the load line forthe circuit showa in Fiawe Fem Wy + Hee Roe Re Teale Tea" * Tere = 925 X10 Veg + 5x 107A, Item sage 2 rea Sapte seo tan alt i, tem te i poi yong he lad i nh determined in Examples shown Grawn onset al Ob np cheney serra i Ham rawa ona st of CB output os] Bipolae Junction Transistors ‘To locate the bias pot on the load line shown in Figure 4-31, we must determine the emitter eurrent fin the ctcuit of Figure 4-29. One way tfind Ia would be to draw an inpue load line on an input characteristic and deter tine the value of fy where the line intersects the characteristic. This isthe Same technique used in Chapter 3 to find the de current and voltage across ‘forward biased diode in series with a resistor, which Is precisely what the Input side of the transistor ireut is. However, his approach isnot practical for several reasons, not the least of whichis the fact that input characteris ties are seldom available. "The most practical way to determine f, is to regard the base-emitter junction as a forward biased diode having a fixed drop of 07 V (silicon) and solve for the diode current, the way we did in Chapter 3 Refer to Figure #32 In Figure 4-22, itis evident that Ya 07 ates Note that we are neglecting the “feedback” effect of Von on the emitter Current, Also note that the postive side of Vpe is connected to the citcuit Common, or ground, soit would normally be referced to as a negative voltage ‘with respect to ground, However, in our equations, we teat Vas the absolute Yalue of that voltage. Returning to ovr example circuit of Figure 4-29, we ‘apply equation 4-19 to find Ie (6-07)V. 265 KO In Figure 4-31, the bias point, labeled Q, is sen to be the interssction ofthe Toad line withthe curve fy = 2 mA. At that point, fo= 2mA and Vox ~ 12 “The bias point is often called the quiescent point, Q,poin, or operating point. It specifies the de ovtput voltage and current when no‘ac voltage is Euperimposed on the input. As we shall discover in Chapter 7, the circuit is {sed as an ac amplifier by connecting an ac voltage source in series with the fitter As the ae voltage alternately increases and decreases, the emitter Current does the same. As a result, the output voltage and current change ‘long the lad line over a range determined by the change in f, values ‘Fransistor input and output characteristics are useful for gaining insights into transistor behavior, and, when used with load lines, they help ws visual- ie output current and voltage variations. However, they are seldom used to {Gesiga or analyze transistor circuits, One reason they are not is that transis tors of the same type ypically have a wide variation in their characteristics, Tor that reason, manufacturers donot (cannot) publish a set of curves that ‘ould be used for every transistor of certain type. Furthermore, the accu: facy that can be obtained using approximations and purely algebraic ‘methods of analysis (as opposed to graphical methods) is almost always ade ‘vate for practical applications. We have already seen an example of this he 2mA “PIoURERALS2 The input side of eS ee ht a See s © Senet Xind of algebraic approximation, when we regarded 0, when we the inp ‘eanaltor ea forwarded dod having sed ohare dae ican be analyzed without the ass Becanse 1 and f= ait i tr that f= fe The determined Jy using equation 419, fy = (Wee iyi ellen fod approximation for fg We can then we uate os see Vou = Voe~ ee Determine the bias point of the eirui Beteemine the bias point of the circuit shown in Figure 4-29 without, ‘We have already shown (equation 4-19) hat pw Veen 02 Re” zasun 2m “Then, using fc = fy we have from equation 4-20 Yeu = Veo ~ fee 20V (2x 10 *A)i4 x 10°) = 20V-8V~ ZV Note thatthe bias point computed this way, -s8me as that found graphically in Figure #31. Summarising. here are the four equations that ean be used to solve all input and output currents and voltages In t ia ere sumed tnd voltages in the npn CB bias cic You 07 V(S), 03 ¥(Ge) Eguuions 421 can be wed for pp wane sulting bate vs or Yn ead ee Force, eee = Ima, Re = 1kM, and Vor = ~15 Vi ‘circuit re (Wes = 15 ~ (1 mAY 1k) eth bse tried ee Sic the output altagei commoner cont ie supp veltage Roan emu be st hich me wl coer Cpt, ‘As discussed in Chaprer 3, in inportant to be ale sore the operation of elesroni eats when tet Singrams te das eke he ound paths shown because tht isthe weal paciog a eee Bipolar Junction Tansstors fe rs me Bi fe | Se + + AL ee + ed > T + @ (pup Ne Ve 08 Vee we DN a or pp ansistors son 1% Pil CB iat oe Ye and ert pte oP cone Schema tM othe neces orn in 4 ee eee rae ce ; melts “Sy iegams for ieniying lsd tops around hi Fe fogure sbe tt ums are rarely drawn as a Eee a can be wnt he grams ar ately a toe tt shows toe comentional a er ae cr crea ae av done Figure 26 wl 2 ofthe CE es at in rasta schematics WHEN sh ae oe worng am ees, fn resto drain anyomited RNS parole or worn tigi inunderanding thecal ch hone eto lag, iw rod the utput ri Fie Sr tah we con obtain the equation fr the Fie orc conigurtin: Ye Ue Van Yoo na Bia" 1-22 10 the equation forthe CB loud Tne AIR neces eas a Ve ahd "238 shows» gah of te oud Ke Notte sma ofequcon esac ce ond inc has soe (eetp the Verano 2 ee se - When ee it characteristics, Plot oc Gon line is plotted on ast of CE output characters, ee Sern gph, prone the value ef ee ce a dg we can aga ep the input of lore deerme yrd aed Sodchavngaaed lake de, snare ie Tem igre #30, esse hot note a U0 2 The ad Une forthe gure ae CE entero can bias cireuit in Figure 4-34(a) «a fixed voltage drop. seriteceaein where Vax = 07 V for silicon and 0.3 V for germanium. Once again, we neglect the feedback effect of Yom the fact shown i Figure 19s ‘As in the case of the CB bias cic, the CE bias pont can be sotcrnineg algebraically The equations foran np crcult ate summarized felons 17 V (Si), 03 ¥ (Ge) Voc ~ Var Equtons 42 can be applied to a pnp bas citi Pigure 4-346) as demonstrated in Example 4-10(b). ot wiul === Ll. The elicon ransisor i the CE bias rei shown in Figure 437() has 1. Assuming thatthe transistor has the output charaeteristicsshown in Figure 4-38, determine the bias point graphically, 2, Find the bias point algebraically, 3. Repeat (1) and (2) when Ry ix changed to 161.43 4c cay -nv 9 ENS » polar Junction Transistors BLES aad ne plated (CE oupr characterises (Example "The bias point is shed isto nceraion by the change ny 4. The equation of the load line is 1 2 Ne T yO 20 = 05% 10 Yee + 6x 10? ‘The Toad line intersects the I-axls at 6 mA and the Voy axis at 12. tis shown plotted on the output characteristics in Figure 4-38 To locate the bias point, we find Ip: (2-o7)v ‘3767 Kit ‘At the intersection of the fp = 30 1A curve with the load line, labeled Q, ‘in Figure 4-38, we see thatthe bias point is /c= 2.95 mA and Vos ~ 6. rom equations 4-24, we find Vag = 07 he 30nA ~Searen MA Jc= (100)30 4A) = 3 ma Veg = 12V = (3 mA)(2kM) = 6V ‘These results rein good agreement with the bias values found graphically, Changing Ry to 161.43 KM. has no effect on the load line. Note that the ead line equation (4-22) does not involve Ry However, the value of Iyis ‘changed to (2-o7v 16443 kN ‘Thus, the bias point is shifted along the load line to the point labeled Q: ln Figure 4-38. We see that Qs is now in the saturation region of the transistor. At Oy fe~5.7 mA and Ves = O.5V. This result ltustrates tha the =T0nA Using equations #24 to find the new bias point, we have Te= Bly = (10070 4A) = 7 mA (1) Veg = 12V ~ (7 mA)2KM) = ~2V_ (1) ‘These are clearly erroneous results because the maximum value ti kc can have is 6 mA, and the minimum value that Vor can have ie OV, ‘The reason equations 4-24 are not valid in this case point isnot inthe active region. Remember that decreases in thea, tration region, and, in this example, can no longer be assumed ty. ‘equal 100. (As an exercise, use Figure 4-38 to caleulate the value 6 Bard) For the pnp siican transistor circuit shown in Figure 4-37(b), determine the following (assume B = 100): 1. Find the base current fy 2, Find the calector current le 3. Find Voy First examine Figure 4-37(b). Note that the currents and polarities ofall voltages are indicated. Vy and Vag look the same as an mpm. eis not neces: sary write Vogas Voc and Vegas Vep Fora properly blased pnp circu, these voltages will ‘be negative ‘(base-emitter junction forward biased. and collector-base junction reverse biased). 1. Tosolve for f, write the KVI. equation as follows Veo * Vee + Vag Be 120-0 37667 ka 2. Tasolve for fa use the equation Te Ble = 100 % 30 uA = 3:mA. 3. To solve for Ven waite the KVL equation as follows: Vee + leRe ~ Ves = 0 Vee = —Veo + Veg = ~12.0°+ (8mAVQ ka} Vee= ~6V. a ive value as expected. Also note that Ip and Ves have the ‘same magnitude values as the npn circuit This technique makes the analysis ‘of npn and pnp circuits almost identical. ee 30H Use SPICE analysis to find the bias points of the CE circuit shown in Figure 437 ‘he circuit is redraw with the nodes forthe SPICE analysis as shown ia Figure 4-39, Ground is always listed as node 0 (zero). The listing for the. CIR. file follows. The DC command specifies that the simulation will step the VCC. sui si ® mand sed 0 wagetcom04 1012 nV nce: The,OP comand ited rte Loree lato elt the operating pit values Ths val ‘eaten outer cou wees @ pe 12.0 O12 1 0 wae re TODEL ERAN Ww BP=200 “The folowing iaformation was obtained by “Browsing” the output File (out. Only a portion ofthe ourput file is Hsted. SISO BIAG COLT TBLEEATURE ~ 27.000 O69 © ‘hn swore (1 #0596 (0) 12.0008 ne ot Sime ‘ee one vee avcantco mle: SPICE sinuation roe sw that p= 287 as fe 297 mA, a Tee Sree tas raacs aren cose aptement vith the resus obtained is Erample #10" ‘The examples presented for commoneniter circuit ts only ecard round conmetions In some cases, itis desirable to power the circ Cal power surpy (Le, + Vecand ~ Ven Examples ofthese ircultsare shown in Figures 440(0 and) fr npn and pp crests Analysis thes fs possible by writing KVL equations along input and out PIGhRELSO Commonemitter Sree sing dal power spples fe For the npn circuit in 4-40(a), fy can be obtained by writing the KVL fap fhe ase current loop as follows Ve —InR ~ Vae = Vne = 0. Solving for Ve {Sawites tha the KVL equation be written forthe collector emivet corm Vee + Vee ~0. loop a fellows: Vee ~ Te For the pnp cireut in 4-40 Cb, fp can be calculated in the same manner by writing the KVL fo the base cutren loop as follows Vax = Ip Ws Vig = 0 Solving for Ver requ . Determine the bias point forthe pap circuit shown in Figure 4-43(b) Compare your answers to part (a) Wirite the KVE. equations forthe eircut shown in Figure 4-43b) Vee * TaRem Vow UpRa ~ 0 Vag + T6Ra— Vou (8 * 1YRs = 0 | | | Chapter e+ Ui + (B+ 1)Re)~ Vag =0 engi 6-03 (BTR ” Nese (aN ek aan) "To slve f0F Yo: Te = (04 Diy = (120 + 1)66.105 uA = 8 mA and Vig = ~16 + (8 may(t ky Vase esnive a eected, ote thatthe vlves obtained for the npn an same These values shouldbe the same because he ame component aie are used and the betas for each transi ame. The process a described ilustrates the use of KVL wit Ieand Voy tn practic, we ean simply write Wed Ma Re and Wea = Vat ee kml 4-7_DESIGN CONSIDERATIONS ha leave | Vee Ves Rew tate | Le 1 practical discetecicuit desig necessary mo circuit dsins, it is often © ued resist The standard valves closest te values calculated aoe ‘uations 429are used, and the ireul is analyzed vo determine he sealing sof Ie atd Vey IF variation from the deed bas wloes one ‘sideration in parila application, i'may be nevssy tase proce, restr o to alate the tel osle variation that tld ae ft ‘lng ressosthat havea specie olerance The nent example dembastene, ‘A common-base bias ircuit is ob circuits tobe designed fran np i re te Be ce 5 an npn sion transistor to IuSUIML pat ng crower spn ws and “sine npr Aipotar Junction Taner 44. Design the circuit, using standard valued resistors with 5% rolerance 2. What are the actual bias values ifthe resistors selected have their nom inal values? 3, What are the possible ranges of Ip and Vy, taking the resistor folerances {nto con 1. From equations 429, (s=07)¥ RB isxio ta” 867° tS 75) _ sooo Rem TSK 10 TA “Appendix B contains a table of the standard valves of resistors having and 10% tolerances. The standard 5% resistors with values closest to those calculated for Ry and Reare By ~ 3kftand Ry ~ 6.1 2. From equations 4-21, 15 V~ (143 may: KM) = 7.69, 3. The ranges of posible resistance values for Ry and Re are [R= 34M + 0.05(3 kM) ~ 2850-3150 02 [Re = SALM + 0.05(5:1 kM) = 4845-5355 2 (6-07)V_ caso gy” S365 Veni) Vec~InrBomes 5 V~ (1.509 mA)(S355.0) = 692 Veninss= Vee ~ lems = 15 V- (1.365 mA)(4845 0) = 839. ‘We see that considerable variation from the desired bias point is possi ble when using standard-valued resistors CE Bias Design In Chapter 7 we discuss the design of @ voltage divider bias eiruit that has ae ctan proverties superior to the design shown in Figure 4-33. However, ‘minimization of the number of components are the pri ‘he circuit of Figure #33 is wsod. Assuming the supply ‘when simplicity and mas 24 for Ry and Re in terms ofthe teary considerations, ‘lage Vacs fixed, we solve equatio (desired bins values for Ic and Vey 30) Crapie: 6 ‘The practical dificlty with this dsign is that the bias heal on the value off, whch varies considerably with tempe Also, there is typicall na atthe same tpe- Consequently this design isnot recommen, aplicsions where wide temperatre variations may occur o for production (where diferent tomsisors re wied). The x! oe emonstrats this point ‘An npn silicon transistor having a nominal Bof 10 isto be used in ac} figuration with Vg» 12V-The bias pots tobe fe= 2A sad Vg = 1. Design their sing tandad-alued 5% restos. 2. Find the range of possible bias aluesif the ofthe transistor cana to any vale between 50 and 150 (a tplel range Assume ta ‘resistors heve their nominal values. — “7 1. From equations #30, “207A From Appendix F, che sandard 5% resistors having values cost those calculated are Ry = 560 kf and Re = 3k iH 2. From equations 424, (2-07 = 2018 uA '50(20.18 wA) = 1.01 mA 150(20.18 wA) = 3.03 mA. 2 V —(3.03 mAy(3 kA) = 292.V —Tonake SHV Wt aye kay ‘tn most pace! aptcations, the pose vasaton of Vx rom ‘to 8.97 V would be intolerable. 4 Srv CC Bias Design ‘To abtain resistor values for the common-collector bias circuit (Figur we save euatons 428 for Ry and Ry in ems ofthe desired bia rae ‘Bipolar Junction ransstors 100 i tobe ased in a CC configuration | mA ‘An npn silicon transistor having B ‘ith Vee = 24V. The desired bias point is Vir = 16V and I 1. Design the bias circuit using standard-valued 5% resistors 2. Find the actual bias point when the standaré resistors are used, assum. {ng they have their nominal values. 1. From equation 4-31, waco ee mA mt = tL 24 V—0.7 V— (4 mA? kM) = 386.5 kM Re 10 21207). ft (258% 14) -asan From Appendix B, the standard Sf resistors having values closest 10 those calculated are Ry = 2 kf and Ry ~ 3908 2, From equations 428, | (2s-07)v ‘oun = s0i(z Kay 95 HA 101(89.358 uA) = 398mA, 24V~(398 mAY(2 KM = 1608 ¥ 4-8 THE BJT INVERTER (TRANSISTOR SWITCH) Transistors are widely used in digital loge clculs and soitching applica tions. Recall that the waveforms encountered in those applications period. {eal alternate between a “low” and a “high” voltage, sch as OV and +5 V. ‘The fundamental transistor eiruit used in switching applications is called an Inverter the npn version of which is shown in Figure 4-44. Note inthe figure that the transstor isin common-emitter configuration, but there is no bias ‘Voltage connected to the base through a resistor asin the CE bias circuits “audied earlier Instead, a resistor Ris connected inseries with the base and then diretly toa square or pulzesype waveform that serves as the inverter’ Input In the circuit shown, Voc and the™high” level ofthe input are both +5V. ‘The output is the voltage between collector and emitter (Vee) a8 usual ‘When the input tothe verter i high (+5 V),the base-emitter junction is forward biased and current flows through Ry Ins the base. The values of FIGURE $8 An np transistor ay Chapter Li hen the iat th inet high 51 there saturated and its output is low (OV), When th ut to the inverter i ‘ ‘rttor et ff and suru gighe nn nt arene sit Fed 1 ha ng st met is nae to suturate the transistor, that is, m me a ree Sere it a ee Se {tet of CE out characteris an eae een ae Socom ersten Met a on Sa ion ies ti oa Ertan panic vena Son ic tna eet marci So hae uimstoveen oa sansa os Sips 2 hte nt ae ie ere et cum thos fees i te nl Gp a ~ Vee ~ (0)(Rc) = Vc. In this situation, the transistor. 1 cutol oat eta oe this circuit is called an inverter. meee Sdaiplg tat mederetreern neuen coal fa ese ier cy nha eres Sloan crit eat seis at ‘tor inverter Because the trar i e when the inputs high Actually thse equation ae pecs ose already derived fora CE trans forthe spcoa assuming saturation exists, : ‘here Viv isthe high level ofthe input voltage, sually che same a8 Vez ‘Bipolar Junction Transistors ® ri (Example +16) 2 ean Regarding Equation 4 33,come books use the notation msea, Je were Tuy hominy noosary fo satrton ® Verity that the circuit in Figure 446 behaves keen inverter when the input switches between OV and +5Y. Assume tha the transatris silicon and that B= 100. Itis only necessary to verify that the transistor is saturated when V= +5V. ‘From equation +34. 1, - SOY a=" yo0 kn Bua 100443 wA) = 43-mA tex Bl Mags #9 mAKG AO) F215 8SV Amoi ines inn erin Vaan nous tink Wachee the transistor was in saturation by eaulating funy ~ Vee and comparing itto the clclated of 43 mA. Whes le~ Bl greater tha oy ata Son errs can i determine strat by comparing bse ret The mim bs caressa sate = gg, neta te, YE = 5 = 10 uA Since fy = 43 wA> 10 A the transistor Pls re ~ Togs) 1° uration. Ime changed Ryo, sty, 750 kth resulting base current woul ‘573 nA and the ransisr would not be saturated The collector coment ‘rovld then be 0573 mA and Vo would be 213. Inverter Design ‘To design a transistor inverter we must have criteria for specifying the val- tues of Ry and Re Typically, one of the two is known (or chosen arbitrary), land the value ofthe other is derived from the fist Using equations #33 and 4-34, we can obtain the following relationships between Ry and Re an Vas) Re = On te 39 ‘Chapter Vas iid B(Vr ~ Var) Equation -35 can be used to find fy when Reis knowe, and equation 4-36, {o'find R, when Ry is known. However, beease there uations are valid nly fora specifc value of, they are at entirely practical We have already Aiscused the fact thatthe ofa transistor of w given ype is lkely to vary over wide range-If the actual value of Bissmaller than the one used fn the design equations, te transistor will not saturate. For this reason, the @ used in the desig equations should always be the sates possible value thet Inight occur in given epplication,n other word, equations 4-35 and 4-36 ste more practical when expressed in the form of inequalities, as follows Vin — Vas y= tn tae Vests Vin ~ Yas) ‘These inequalities should hold for the entre range of values that transi. tors used inthe inverter may have. This willbe the care if the minimum possible value is use We should note that when & transistor has a higher value of than the fone for which the inverter cicult is designed, a high input simply drives it Aeeper into saturation, This overdriving of the transistor creates certain new problems, including the fact tha it slows the speed at which the device an switch fom ON to OFF, but the output is defintely low inthe ON state. ‘The results from Example 4-16 indicate an overdriving condition, because ‘Inwas about four times larger than the minimum required. In practice, how: ‘ever, a moderate amount of overdrivingis normally used in order to main: tain a low Vera 39) Re ‘An inverter having Re = 1.5 kf is to be designe so that it will operate satisfactorily with silicon transistors whose P-values range from 80 to 200. What vale of Re should be used? Assume that Voc = Vg = #5V. Using equation 4-35 with y= (Mit = Ven aie The Transistor as a ‘A transistor inverter is often called a transistor switch. This terminology is appropriate because the ON and OFF states ofthe transistor correspond closely {othe closing and opening of asvitch connected betwecn the collector and the emitter. When the transistor is ON, or saturated, the voltage between collector and emitter isneary 0, ast would be across closed switch, andthe currents ‘the maximum possible, VavRe When the transistor is OFF,no current flows fom ‘collector toemtter and the voltage is maximum, ast would be across an open switch: The switch is opened or closed by the input voltage: high input closes itand alow input opens it Figure 447 illustrates these ideas. @ ‘ola Iunetin Tonite © Ls hema ‘ y srtugeconte Yapu cos the meh and low Bow operat web reff J I I Ws e LF Iv PLCURE S18 The Bieter env intraced we aceay Vise TH : Jae inaitet wate Tf vnazn Ao f f or « L rn many switching aplication, the emiter may be connected to anaes Cn her wolage source intend of to pound; When naling StSiSsaplexeigil crit, iis quit helpful o think ofthe ansistor a ‘Spires or ents can tounderstand cre operation norms ‘etaecr cen beingcmnesid oor diane om tomer, seep Scale fhe etter the base inverter circuit were connected EEG tne grou then tout would dearly Sich Bowe Cand SY intend of tomween VV and OV. i signals to eect “A ppula es of the BJT inverter infor inceracnglogic signal elect” hana doves uch ray BIT itor eras wl ree ccna thes ean caly si the requlred current ofuly ror onaral ae cao BJT ncrtaced oly shown ns “in lagu to ths cutis gal loge signal. The logical ihevel vl agen dgial sal vases considerably. Do oot atte that logical ih SOV Stny of the ow dg ytems are using 23 for logical eh ‘tke toe $0.7 lope seem loge High aap can vary trom 25 einen in doube mensre the vatege level of your system. Secon Ctaprer ¢ ‘lay should vurn on when the logic level is high and, accordingly the relay al turn of when the inp loge level is “om"The fllowing is «sumac, ‘of considerations for designing the relay interface: TTL. logic levels are not exact. ‘Transistor switching speed is not usually an issue when turning relay ‘The B of the transistor is not usually known unless you take time to measure it 1 Determine the logic-level voltage you want fr the transistor and relay to turn on. This should be some value thatthe logic level is guerenteed to ‘reach. For a 30 TTL system, 3.0V is usually a guaranteed value Ifyou select a value such as 4.9 the transistor might not fully saturate, which ould cause the relay col to not fully energize. This could cause erratic Dbohavior of the relay, 2. Recall that in many case, the ofthe transistor isnot known. Ofcourse, the user could set up atest o use a curve tracer to extract the value for ‘calculating Ry. For typical TTL logic levels, a resistor of about 1 kit to 5A for ky works very well 3. When the input logic level slow, the transistor will be placed in the cut ‘off condition (cs 0). This is called the open collector condition To tally {urn off the relay, a pull-up resistor (R) is connected across the relay. 44 When the transistor is ON, a current will be flowing in the magnetic esi Recall that inductances store energy in terms of current, When the transistors turned OFF, the coil wil attempt to de-energize through the Dull up resistor Re, which can lead toa significantly large voltage spike (cransient). This transient can cause glitches in logic levels ned con damage the circuits. This problem can be minimized by placing a ‘erersed biased diode (D, across the coil ofthe relay, as shown in Figure $48.D, will damp any voltage on the collector to a meximum vale of 0.7 V by providing a low-esistance path forthe coil ta de-encrgive, The diodes are also quick reacting, and the junction capacitance in the ‘ode helps to suppress the back EMF induced by the de-energising col, is used to turn the relay on/off. Recall that when Q, i saturated, Veg © 0.1 (Gory close ro 0) Typical transistors for relays requiring 50 mA or ls are the 23804 and 2N2222, although many other transistors are suitable. The crcust fsshowa in Figure 448 4-8_ TRANSISTOR TYPES, RATINGS, AND SPECIFICATIONS ln modern electronic cieuits, diserete transistors are used primarily for applications m which only one or a small number of devices are required acd ‘n applications where substantial power is dissipated. Although alder \esigns, composed entirely of diserete devices, can stil be found in laree umbers,most new circults containing a large number of transistors ere ae ‘eucted in integrated-cirult form. In many applications, both disciete aed ‘stegrated components are used. In these applications, the integrated circuse ‘ppically performs complex, low-level signal conditioning, and a discrete tran sstor then drives @ powerconsuming load such as a Indicator lamp or ag ‘audio speaker. This use of the transistor is an exemple of interfaings it Nc PRCKAGE SUPFICA pela Junction Transiors 0-25(10-39, PRcrace surhoe® ry © A fow ofthe standard transistor ease (enclorue) types with TO designation (ol FEDEC) aumbers in parentheses (Courtesy of Sliconix Ine} rer ne pei mae tres goes cre ratte pactaged ine wide varity of mel an lai cnn a nace a minniginmienmrne neon siete eet tocietrinaametren cote eewemaree too sichrretrel veneer tom snc th calles age inurl he largest wlage nthe device) Soo cmerenennmenee sae cree Apis Gene cherries seem Sot ariieaeicimarmsaia ciate Sich cuseatieetaascmens Se eiemiehaadec eens seers eg to winoe ria pena aanerecearctee weet tee are cs Sec ehr e eemheat estar greta noe Sea ie epee cage [pee nieeieee pecceraa sities ec ee ae ieee pee disarny deme onan Sierra ieaiat neues diana MPS2222, MPS22228 General Purpose ™ lil (| a a al al gf all lie [he fl betel elie | J Adee eat ‘Bipolar Junction Transistors transistor specifications will be covered in detail in Chapter 16 (Section Yo). A transistor ercult designer must be certain that atransistor wsed in AS avilcular application will not be subjected to voltages or power dissia. spas that exceed the specified maximums; failure to do so may result in Severe performance degradation or permanent damage. The evapl labeled “DC Current Gain” shows how p varies with Vox junction temperature (7), and collector current (In the CE configuration, acne ga i te rato of ourput current to input CurrER, OF fll, which {Uporonimately B. As we shall learn later when /t parameters are dis: {Cassed. Bis also designated by Pye) The chart illustrates a typical transi. saetitiacteristic Fors fixed collector current, the ualueo/ increases with increasing temperature. “The elecrinal‘hanacteieice listed in Figure 4-50 show important transl: tor parameters aoctated with the de operation ofeach device. Included are Her eeEteen voltages and reverse leakage currents (called "eutofl™ currents Pathe speciticaions). Notice that the breakdown soltages previously Mbtcrred to as Bing and BVegp ae listed as Venn and Vanes respectively ‘gare #50 dace aot show some other specifieations that are usually fur ished by « manufacturer including smallsignal characteristics, Small signal ‘favectetisie ame associated with the ac operation of @ transistor, which sae will cover in Chapter 7. Other specifications ofter furnished ty the Thanufacturer indude graphs showing additional parameter variations with temperature, voltage, and current. 4-10 TRANSISTOR CURVE TRACERS “We have mentioned that characteristic curves are seldom included jn tran MiSee specifications, These vary widely among transistors of a given type SAY'Goe surely used for clrant design purposes. Hoxtover, in areas such a Component testing, preliinary circult development, and research, i BE Gnaw uceful to be able to study the characteristic curves of @ single evice and to obtain important parameter values from the curves. Recall hat parameters such af 0,3, BVeno, BVeen leakage currents, saturation sattges and che Early voltage can be discerned from appropriate sets of Characteristic curves. "The most widely used method for obtaining a set of characteristic curves is by me of on instrament called a transistor curve tracer A curve tracer i Eanaly on cuilloscope equipped with circuitry that automatically steps the easeate (or voltages) in a semiconductor device through a range of values Sar aisploy th family of characteristic curves that result Selector switches atin he user to set the maximum value and the increment (step) value of sgt canrent or voltage applied to the device. For example, to obtain a family St'tmansisior collector characteristics, the user might set the base current aera robe 10 uA, the maximum collector voltage to be 25 V, and the saerer of steps tobe 10. The characteristics would then be displayed as & family of curves showing Je versus Vez for Ip ~ 0,10 nA, 20 4A, Figure 4151 shows two typical curve tracers. ‘Finare 452(a) fs a photegraph of a curve tracer display showing a 6 cal sot of npn collector characteristics, The horizontal sensitivity of the Glaplay was st for2Vlivision, so the horizontal axis (Vey) extends from Oto SEER athe vertical sensitivity was set for 1 mAVdivision, so the vertical oer) extends from 0 to about 6.5 mA. The base cerzent increment is 10 A. ‘etn deploy, we can determine, for example, that the B ofthe transis: 40 pA is approximately Chapter 4 ‘Two rpical eave tracers Tekronis Models 3708 and S71B) (Courtesy af Teiranin Ine) rt (by Horizontal? vais eric tun| Verics 03 mai in ID wa wen tak Photographs of curve racer displays Tac cee: hh he ih od pms he a PESTINEG aS cet ed Seat Tin Wone ho e cate Tae ane te rca cru riage sigue oe some le a hs ee Teaches cSt tensa CUM idininennet ue aaa as ood ale BY sa eo hn one coe fn of ce i at prs 8 ma cet ots Ge day Ta io cbc carry anny ec a gc (a) Horizontal PICURE ns ipo enction Transistors to view (©) Horizontal 02 Viv ‘Carve tracer display of diode charaterietice Figure 4-52(b) shows collector characteristics of the seme transistor when the curve tracer settings are adjusted to generate larger values of Ver In this example, the horizontal sensitivity is 2 Vidivision, the vertical sens- tivity is 0.2 mA/division, and the base current increment is A. With these ‘Settings the breakdown characteristics are clearly evident For example, at Ip= 124A and Veg = 12 it can be seen that the transistor is in its break

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