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ORDERING INFORMATION
BLOCK DIAGRAM
3
FEAO CM6901
VCC
15
VFB
2 +
UVLO/REF
VREF
.
V Tol
- 16
2.5V -
RSET
GND
1 +
10
1.5V .
D IN-
4 -
.
D IN+ 1.25V
5 +
PRIDRV
DEAO 14
6 -
PRIDRVB
VCC .
13
+
10uA
Logic SRDRV
12
CSS SRDRVB
7 +
11
SHDN .
1V - ILIM
+ 8
RTCT CLK . ILim
9 OSC -
1V
PIN DESCRIPTION
Operating Voltage
Pin No. Symbol Description
Min. Typ. Max. Unit
External resistor which convert FEAO voltage signal into current 0 5.5 V
1 RSET signal for frequency modulation. SR is PWMing Control , when
RSET lower than 1.5V.
3 FEAO Resonant error amplifier output and compensation node for 0 5.5 V
frequency modulation control.
PWM error amplifier output and compensation node for PWM 0 4.5 V
6 DEAO
control.
Soft start for FM/PWM operation with 1V enable threshold. Also, 0 5.5 V
7 CSS
use for auto-restart operation during current limit.
9 RTCT Oscillator timing components which set the minimum frequency. 1.2 3 V
10 GND Ground
D_IN+ Non-Inverting Input Into PWM Error Amplifier Voltage -0.3 to VREF+0.3 V
VFB Non-Inverting Input Into Resonant Error Amplifier Voltage -0.3 to VREF+0.3 V
ELECTRICAL CHARACTERISTICS
(VCC=12V, RT=43K±1%, CT=820pF±1%, Freq. = 80 KHz, Duty Cycle=48% , Temp= -40 ~ 125 ℃, unless otherwise specified.)
ILIM (pin 8)
ELECTRICAL CHARACTERISTICS
(VCC=12V, RT=43K±1%, CT=820pF±1%, Freq. = 80 KHz, Duty Cycle=48% , Temp=-40 ~ 125℃, unless otherwise specified.)
VFB (Pin2)
VFB = -250mV ,
Source Current 12.4 15.6 18.8 uA
TA=25℃
Sink Current -5 uA
Source Current 7 uA
ELECTRICAL CHARACTERISTICS
(VCC=12V, RT=43K±1%, CT=820pF±1%, Freq. = 80 KHz, Duty Cycle=48% , Temp=-40 ~ 125 ℃, unless otherwise specified.)
Temperature Stability 2 %
Note1
7.68
7.67
7.66
7.65
7.64
7.63
7.62
7.61
7.6
7.59
Vref 7.58 Vref
7.57
7.56
7.55
7.54
7.53
7.52
7.51
7.5
7.49
7.48
7.47
-40 -30 -20 -10 0℃ 10 20 30 40 50 60 70 80 90 100 110 125
℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃ ℃
℃ ℃ ℃
Temp
Note2
2.555
2.55
2.545
2.54
Vfb
Vfb
2.535
2.53
2.525
2.52
-40℃
-30℃
-20℃
-10℃
0℃
10℃
20℃
30℃
40℃
50℃
60℃
70℃
80℃
90℃
100℃
110℃
125℃
Temp
Timing Diagram
Dead Time
PRIDRVB
PRIDRV
Delay Time
Delay Time
SRDRVB
SRDRV
Oscillator
The oscillator frequency is determined by the values of RT and CT.
Resonant Section
FM Modulator
Frequency modulation of the resonant controller section is accomplished by controlling the charging current of the
oscillator through resonant error amplifier. The frequency of the resonant section is ½ of the oscillator frequency.
Compensation is accomplished by connecting R and C in series to the FEAO pin.
ICHG = 4*(FEAO-VBE)/RSET
ICHG(max) = 20V/RSET
RT
VFB +
V To I OSC
2 .5 V - CT
RSET
2 PWMings:
SR Ideal Diode PWMing (Synchronous Outputs)
SR Ideal Diode PWMing for synchronous drivers is accomplished by comparing the voltage signal at the RSET pin
to RTCT ramp. The pulse-width reduction happens when the voltage at the RSET is lower than 1.5V. This allows
safe operation of the power converter with synchronous rectification when the switching frequency is below the
highest resonant point frequency fr1.
V out
V ref
3V
R f1
RT
V FB
+ 1.25V
FEA O
V To I O SC +
To
R f3 2.5V - Logic
-
1.5V CT
RSET
R f4
SRDRV
P R ID R V
In Application , low gain configuration accomplished by connecting Rf4 and Rf5 in the closed loop configuration . The
gain for the PWM is determined by Rf4 and Rf5 where the gain is equal to -Rf5/Rf4. The voltage of VRset at which
the controller goes into FM and PWM simultaneously is equal to :
Varyin Rset from VRset to VRset + 1.75 × Rf4/Rf5 will cause the duty cycle to vary from 50% to 0% while the
frequency will vary propotionally according to 1.75*Rf4/Rf5 where 1.75 is the peak-to-peak voltage of the RTCT
ramp. For proper operation, select Rf5 value so that the current through Rf5 {((D_IN+) - 1.2)/Rf5} should be less
than 5uA.
Vout
V re f
R f1
R T
VFB
+
FEAO
V To I O SC
R f3 2 .5 V - C T
R SET
R f4
V re f
R f5
-
D _ IN -
D EAO
-
D _ IN + + PW M
R T C T
Auto-retry Mode
During normal operation, CSS pin will be charged to 5.5V + VBE. When VFB exceeds 2.93V due to ILIM exceeds
1V due to over current condition, output drivers are immediate set to low , and CSS begins to discharge with 0.75uA
current source. When CSS pin is below 0.9V, 7.5uA current source start charging the CSS pin. When CSS pin
reaches 1V, the output drivers are re-enable and the controller goes into soft start mode. If over current condition
still exists then, the outputs are immediately disabled, but CSS continues to charge toward 5V. When CSS
reaches 5V, 7.5uA charging current is disabled and 0.75uA current source begins to discharge the CSS, and the
cycle repeat until over current condition is removed.
OCP Setting
5.5 V+VBE
5V
Css 0.9V
1V
ILimit
DC-DC 380VDC
D16
1N4148
DRVH C42
R60 Q12
NC 12VSYNDRVL
10Ω FCP11N60
R61 R62
47KΩ Lp(1.7mH) 47KΩ
PQ3230 Q13
L2 +12VIS +12V
160uh/PQ512 C43 T4 IR F2804PBF
9 6 2 L3
DRVHGND 8 130nH/20A
5 10
82nF/800V 2TS
D17
1N4148 27TS C45
12VSYNDRVH C48
3300uF/16V
C47
2200uF/16V
470uF/16V
9
1
10 + +
C46 + +
Q14 C49
DRVL FCP11N60 2TS Q15 2200uF/25V C50 C51
R63 IR F2804PBF R64 0.1uF 0.1uF 0.1uF
10Ω C52 11 47KΩ
NC JP11
OUT
R65 7 R91
-12V 0 NC
47KΩ 2TS H40
D18 C54 R98 + C53
EFM204 0.1uF 10KΩ 680uF/25V IPLIMIT
12
-12V
1
(2A/200V)
IPLIMIT
R66
D19 5.6
BAV99
C56 C55 R67
1uF/50V 105pF 470
D20
BAV99
12VS
220KΩ Q20
DRVL
47K 0.22uF
2N2222
R72
12K R73
8
316K 1%
R74 Q21
750 U3 CM6901 12VS 2N2907
1 16
Rset VREF
2 15
VREF 12VS
VFB VCC
3 14
Q22
FEAO PRIDRV 2N2222
VREF 4
D_IN- PRIDRVB
13
R76
R75 5 12 22Ω
C60 D_IN+ SRDRV
12VSYNDRVH
36.5KΩ 6 11
102pF DEAO SRDRVB
7
CSS GND
10 R79 12VS D26
R77 SD 56KΩ
R78 220KΩ C61 8 9 SCS140P
C62 Ilim RT/CT
VREF Q23
C63 333pF/25V
3.3K NC R88 2N2907
1uF/16V R81 R82 R83
R84 R85 R80 C64 R86 1KΩ
C66
NC
220K 47KΩ 43KΩ 150K 3M 47pF 0Ω
C65
C67 12VS
R87 1uF/25V 1000pF Q24
IPLIMIT 0.1uF/25V 2N2222
27KΩ
R89
22Ω
12VSYNDRVL
D27
Q25 SCS140P
2N2907
PACKAGE DIMENSION
PIN 1 ID
θ
θ
IMPORTANT NOTICE
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circuit product or service without notice, and advises its customers to obtain the latest version of relevant information to verify,
before placing orders, that the information being relied on is current.
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understood to be fully at the risk of the customer. In order to minimize risks associated with the customer’s applications, the
customer should provide adequate design and operating safeguards.
CMC assumes to no liability to customer product design or application support. CMC warrants the performance of its products to
the specifications applicable at the time of sale.