TESTABILITY FOR VLSI

MEL ZG531 / ES ZG532

BITS Pilani
Pilani|Dubai|Goa|Hyderabad

1
 Assignment-2 Topics

1. Power aware Testability

2. Design For Secure Testability

3. Cell Aware Test, an advanced fault model

Choose one out of three topics given above.

• Submit an assignment on the chosen topic.

• Timeline
▪ Due date of submission, 07 Nov, 2022.

• Credits
▪ 10 Marks

Note: Format details are in next page…

Recommended Template

• What is this topic about?

• Why do we need this ?
• How the architecture looks like?
• Diagrams where ever applicable.
• Comparison w.r.t existing methodology/technique.
• Advantages and Disadvantages.
• Data/Metrics if available.
• Summary

Note:
Submissions are allowed in .doc or .pdf formats only.