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Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne ©2013
Chapter 6: CPU Scheduling
Basic Concepts
Scheduling Criteria
Scheduling Algorithms
Thread Scheduling
Multiple-Processor Scheduling
Real-Time CPU Scheduling
Operating Systems Examples
Algorithm Evaluation
Operating System Concepts – 9th Edition 6.2 Silberschatz, Galvin and Gagne ©2013
Objectives
Operating System Concepts – 9th Edition 6.3 Silberschatz, Galvin and Gagne ©2013
Basic Concepts
Operating System Concepts – 9th Edition 6.4 Silberschatz, Galvin and Gagne ©2013
Histogram of CPU-burst Times
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Top-Level View
Operating System Concepts – 9th Edition 6.6 Silberschatz, Galvin and Gagne ©2013
Processor Registers
Faster and smaller than main memory
Almost all computers, loads data from a larger memory into registers
User-visible registers
May be referenced by machine language
Available to all programs – application programs and system
programs
Types of registers typically available are:
Data (Often general purpose, But some restrictions may apply)
Address (Index Register, Segment pointer, Stack pointer )
Operating System Concepts – 9th Edition 6.7 Silberschatz, Galvin and Gagne ©2013
Processor Registers…
Control and status registers
Used by processor to control operating of the processor
Used by privileged OS routines to control the execution of programs
Program counter (PC)
Contains the address of an instruction to be fetched
Instruction register (IR)
Contains the instruction most recently fetched
Program status word (PSW)
Contains status information
Condition code registers (flags)
Bits used to determine whether some instruction should or should
not be executed.
Operating System Concepts – 9th Edition 6.8 Silberschatz, Galvin and Gagne ©2013
Program counter (PC)
The Program Counter (PC), commonly called
the instruction pointer (IP), and sometimes
called the instruction address register (IAR)
Operating System Concepts – 9th Edition 6.9 Silberschatz, Galvin and Gagne ©2013
Instruction Register (IR)
The Instruction Register (IR) stores the instruction currently being executed.
Categories
Processor-memory,
Data may be transferred from processor to memory or from memory to
processor.
Processor-I/O,
Data may be transferred to or from a peripheral device by transferring
between the processor and an I/O module.
Data processing,
The processor may perform some arithmetic or logic operation on data.
Control
An instruction may specify that the sequence of execution be altered.
Operating System Concepts – 9th Edition 6.10 Silberschatz, Galvin and Gagne ©2013
Storage Registers
Registers related to fetching information from RAM
Operating System Concepts – 9th Edition 6.11 Silberschatz, Galvin and Gagne ©2013
Instruction Execution
A Program consists of a set of instructions stored in memory
Program counter (PC) holds address of the instruction to be fetched next
PC is incremented after each fetch
Simple Instruction Cycle: Two steps
Fetch : Processor reads (fetches) instructions from memory
Execute: Processor executes each instruction
Operating System Concepts – 9th Edition 6.12 Silberschatz, Galvin and Gagne ©2013
Fetch-Decode-Execute Cycle
Operating System Concepts – 9th Edition 6.13 Silberschatz, Galvin and Gagne ©2013
Example of Program Execution
Operating System Concepts – 9th Edition 6.14 Silberschatz, Galvin and Gagne ©2013
Interrupts
Interrupt the normal sequencing of the processor
Provided to improve processor utilization
Most I/O devices are slower than the processor
Processor must pause to wait for device
Common Classes of Interrupts
Program
As a result of an instruction execution
Such as:
– An Arithmetic overflow
– Divided by Zero
– Attempt to execute an illegal machine instruction
– Reference outside a user’s allowed memory space
Timer
Generated by a Timer within the processor. This allows the operating system to perform
certain functions on regular basis
I/O
Generated by an I/O controller, to signal normal completion of an operation or to signal a
variety of error condition
Hardware Failure
Generated by a failure, such as power failure or memory parity error
Operating System Concepts – 9th Edition 6.15 Silberschatz, Galvin and Gagne ©2013
Instruction Cycle with Interrupts
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Flow of Control
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Transfer of Control via Interrupts
Processor checks for interrupt
Indicated by an interrupt signal
If no interrupt, fetch next instruction
If interrupt pending:
Suspend execution of current program
Save context
Set PC to start address of interrupt handler routine
Process interrupt
Restore context and continue interrupted program
transfer of control via interrupts:
Operating System Concepts – 9th Edition 6.18 Silberschatz, Galvin and Gagne ©2013
Multiple Interrupts
Suppose an interrupt occurs while another interrupt is being processed.
E.g. printing data being received via communications line.
Two approaches:
Disable interrupts during interrupt processing
Use a priority scheme.
Operating System Concepts – 9th Edition 6.19 Silberschatz, Galvin and Gagne ©2013
Sequential Interrupt Processing
Operating System Concepts – 9th Edition 6.20 Silberschatz, Galvin and Gagne ©2013
Nested Interrupt Processing
Operating System Concepts – 9th Edition 6.21 Silberschatz, Galvin and Gagne ©2013
Example of Nested Interrupts
Operating System Concepts – 9th Edition 6.22 Silberschatz, Galvin and Gagne ©2013
Multiple Processes
Central to the design of modern Operating Systems is managing multiple
processes
Multiprogramming
The management of multiple processes within a uni-processor
system.
Multiprocessing
The management of multiple processes within a multiprocessor.
Distributed Processing
The management of multiple processes executing on multiple,
distributed computer systems.
Operating System Concepts – 9th Edition 6.23 Silberschatz, Galvin and Gagne ©2013
Concurrency
Concurrency arises in:
Multiple applications
Multiprogramming was invented to allow processing time to be dynamically
shared among a number of active applications
Structured applications
Extension of structured programming resulting concurrent processes.
Operating system structure
OS themselves implemented as a set of processes or threads in systems
programs
Operating System Concepts – 9th Edition 6.24 Silberschatz, Galvin and Gagne ©2013
Enforce Single Access
If we enforce a rule that only one process may enter the function at a
time then
P1 & P2 run on separate processors
Operating System Concepts – 9th Edition 6.25 Silberschatz, Galvin and Gagne ©2013
Process Interaction
Operating System Concepts – 9th Edition 6.26 Silberschatz, Galvin and Gagne ©2013
CPU Scheduler
The objective of multiprogramming is to have some process
running at all times, to maximize CPU utilization.
The objective of time sharing is to switch the CPU among
processes so frequently.
A process migrates between various scheduling queues
throughout its lifetime.
The aim of CPU scheduler is to assign processes to the
processor for execution.
Scheduling affects the performance of the system, because it
determines which process will wait and which will progress.
Operating System Concepts – 9th Edition 6.27 Silberschatz, Galvin and Gagne ©2013
CPU Scheduler
Long-term scheduler (or job scheduler) – selects which processes
should be brought into the ready queue – loads processes from disk to
memory
Short-term scheduler (or CPU scheduler) – selects which process
should be executed next (from the ready queue) and allocates CPU
Medium-term scheduler can be added if degree of multiple
programming needs to decrease
Remove process from memory, store on disk, bring back in from disk
to continue execution: swapping
Operating System Concepts – 9th Edition 6.28 Silberschatz, Galvin and Gagne ©2013
CPU Scheduler
CPU scheduling decisions may take place when a process:
Move from New to Ready State
Switches from Ready State to Running State
Switches from Running State to Waiting State
Switches from Waiting State to Ready State
Terminates/Exit
Queue may be ordered in various ways
Operating System Concepts – 9th Edition 6.29 Silberschatz, Galvin and Gagne ©2013
Dispatcher
Dispatcher module gives control of the CPU to the process
selected by the short-term scheduler; this involves:
switching context
switching to user mode
jumping to the proper location in the user program to
restart that program
Dispatch latency – time it takes for the dispatcher to stop
one process and start another running
Operating System Concepts – 9th Edition 6.30 Silberschatz, Galvin and Gagne ©2013
Scheduling Criteria
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CPU Scheduler
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Scheduling Algorithm Optimization Criteria
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Scheduling Algorithms
List of scheduling algorithms are as follows:
Operating System Concepts – 9th Edition 6.34 Silberschatz, Galvin and Gagne ©2013
First- Come, First-Served (FCFS) Scheduling
This policy assigns the processor to the process which is first in the
READY queue
This is used with non pre-emptive operating systems.
FCFS favors long jobs over short ones.
Operating System Concepts – 9th Edition 6.35 Silberschatz, Galvin and Gagne ©2013
First- Come, First-Served (FCFS) Scheduling
P1 P2 P3
0 24 27 30
Operating System Concepts – 9th Edition 6.36 Silberschatz, Galvin and Gagne ©2013
FCFS Scheduling (Cont.)
Suppose that the processes arrive in the order:
P2 , P3 , P1
The Gantt chart for the schedule is:
P2 P3 P1
0 3 6 30
Operating System Concepts – 9th Edition 6.37 Silberschatz, Galvin and Gagne ©2013
FCFS Scheduling (Cont.)
Advantages
Better for long processes
Simple method (i.e., minimum overhead on processor)
No starvation
Disadvantages
Convoy effect occurs. Even very small process should wait
for its turn to come to utilize the CPU. Short process behind
long process results in lower CPU utilization.
Operating System Concepts – 9th Edition 6.38 Silberschatz, Galvin and Gagne ©2013
Shortest-Job-First (SJF) Scheduling
This policy assigns the processor to the process which take the shortest
time to complete
This is one of the most efficient algorithms
SJF can be pre-emptive & non pre-emptive
SJF is optimal – gives minimum average waiting time for a given set of
processes
Operating System Concepts – 9th Edition 6.39 Silberschatz, Galvin and Gagne ©2013
Example of SJF Pre-emptive
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Example of SJF Non Pre-emptive
Operating System Concepts – 9th Edition 6.41 Silberschatz, Galvin and Gagne ©2013
SJF Scheduling (Cont.)
Advantages
It gives superior turnaround time performance to shortest
process next because a short job is given immediate
preference to a running longer job.
Throughput is high.
Disadvantages
Starvation may be possible for the longer processes.
Operating System Concepts – 9th Edition 6.42 Silberschatz, Galvin and Gagne ©2013
Priority Scheduling
Operating System Concepts – 9th Edition 6.43 Silberschatz, Galvin and Gagne ©2013
Example of Priority Scheduling
Operating System Concepts – 9th Edition 6.44 Silberschatz, Galvin and Gagne ©2013
Priority Scheduling (Cont.)
Advantages
Good response for the highest priority processes.
Disadvantages
Starvation may be possible for the lowest priority processes.
Operating System Concepts – 9th Edition 6.45 Silberschatz, Galvin and Gagne ©2013
Round Robin (RR)
Operating System Concepts – 9th Edition 6.46 Silberschatz, Galvin and Gagne ©2013
Round Robin (RR)
q large FIFO
Operating System Concepts – 9th Edition 6.47 Silberschatz, Galvin and Gagne ©2013
Time Quantum and Context Switch Time
Operating System Concepts – 9th Edition 6.48 Silberschatz, Galvin and Gagne ©2013
Round Robin (Cont.)
Advantages
Round-robin is effective in a general-purpose, times-
sharing system or transaction-processing system.
Fair treatment for all the processes.
Good response time for short processes.
Disadvantages
Care must be taken in choosing quantum value.
Context switching Overhead if time quantum is too small
Throughput is low if time quantum is too small.
Operating System Concepts – 9th Edition 6.49 Silberschatz, Galvin and Gagne ©2013
Multilevel Feedback Queue
This scheme allows processes to move between a number of
different priority queues.
Each queue has an associated scheduling algorithm
Scheduling must be done between the queues:
Operating System Concepts – 9th Edition 6.50 Silberschatz, Galvin and Gagne ©2013
Example of Multilevel Feedback Queue
Three queues:
Q0 – RR with time quantum 8
milliseconds
Q1 – RR time quantum 16 milliseconds
Q2 – FCFS
Scheduling
A new job enters queue Q0 which is
served FCFS
When it gains CPU, job receives 8
milliseconds
If it does not finish in 8
milliseconds, job is moved to queue
Q1
At Q1 job is again served FCFS and
receives 16 additional milliseconds
If it still does not complete, it is
preempted and moved to queue Q2
Operating System Concepts – 9th Edition 6.51 Silberschatz, Galvin and Gagne ©2013
Multiple-Processor Scheduling
CPU scheduling more complex when multiple CPUs are
available
Multiple-Processor Scheduling – Load Balancing
OS need to keep all CPUs loaded for efficiency
OS pushes task from overloaded CPU to other CPUs
In case of idle processors OS pulls waiting task from busy
processor
Operating System Concepts – 9th Edition 6.52 Silberschatz, Galvin and Gagne ©2013
Multi-core Processors
Operating System Concepts – 9th Edition 6.53 Silberschatz, Galvin and Gagne ©2013
Operating System Examples
Solaris scheduling
Windows scheduling
Linux scheduling
Operating System Concepts – 9th Edition 6.54 Silberschatz, Galvin and Gagne ©2013
Solaris
Priority-based scheduling
Six classes available
Time sharing (default) (TS)
Interactive (IA)
Real time (RT)
System (SYS)
Fair Share (FSS)
Fixed priority (FP)
Each class has its own scheduling algorithm
Given thread can be in one class at a time
Operating System Concepts – 9th Edition 6.55 Silberschatz, Galvin and Gagne ©2013
Windows Scheduling
Windows uses priority-based preemptive scheduling
Highest-priority thread runs next
Dispatcher is scheduler
Thread runs until
(1) blocks
(2) uses time slice
(3) preempted by higher-priority thread
Real-time threads can preempt non-real-time
32-level priority scheme
Queue for each priority
If no run-able thread, runs idle thread
Operating System Concepts – 9th Edition 6.56 Silberschatz, Galvin and Gagne ©2013
Linux Scheduling Through Version 2.5
Operating System Concepts – 9th Edition 6.57 Silberschatz, Galvin and Gagne ©2013
Deterministic Evaluation
RR is 23ms:
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Implementation
Operating System Concepts – 9th Edition 6.59 Silberschatz, Galvin and Gagne ©2013
End of Chapter 6
Operating System Concepts – 9th Edition Silberschatz, Galvin and Gagne ©2013