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The ME6209 series are a group of positive Ultra low quiescent current: 3.0uA(typ)
voltage output, three –pin regulator, that provide a High input voltage (up to 18V)
high current even when the input/output Voltage Low dropout voltage :80mV@Iout=40mA
differential is small. Low power consumption and (VOUT=3.3V)
high accuracy is achieved through CMOS Output voltage accuracy: ±2%
technology. They allow input voltages as high as
Maximum output current:250mA
18V.
(within max.power dissipation,VOUT =3.3V)
Low temperature coefficient
Selection Guide
Pin Assignment
Pin Num
Symbol Function
SOT89-3/TO-92 SOT23-3
1 1 VSS Ground
2 3 VIN Input
3 2 VOUT Output
Block Diagram
Electrical Characteristics
ME6209A18
(VIN= VOUT+1.0V,CIN=CL=10uF,Ta=25OC, unless otherwise noted)
Parameter Symbol Conditions Min. Typ. Max. Units
VOUT(E) IOUT=40mA, VOUT (T)
Output Voltage X 0.98 X 1.02 V
(Note 2) VIN=VOUT+1V (Note 1)
VIN=VOUT+1V,
Load Regulation ∆VOUT 10 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 150 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.1 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
VIN=VOUT+1V,
Load Regulation ∆VOUT 10 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 100 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.1 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
ME6209A30
(VIN= VOUT+1.0V,CIN=CL=10uF,Ta=25OC, unless otherwise noted)
Parameter Symbol Conditions Min. Typ. Max. Units
VOUT(E) IOUT=40mA, VOUT (T)
Output Voltage X 0.98 X 1.02 V
(Note 2) VIN=VOUT+1V (Note 1)
VIN=VOUT+1V,
Load Regulation ∆VOUT 20 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 80 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.1 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
VIN=VOUT+1V,
Load Regulation ∆VOUT 15 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 80 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.05 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
ME6209A36
(VIN= VOUT+1.0V,CIN=CL=10uF,Ta=25OC, unless otherwise noted)
Parameter Symbol Conditions Min. Typ. Max. Units
VOUT(E) IOUT=40mA, VOUT (T)
Output Voltage X 0.98 X 1.02 V
(Note 2) VIN=VOUT+1V (Note 1)
VIN=VOUT+1V,
Load Regulation ∆VOUT 15 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 80 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.05 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
VIN=VOUT+1V,
Load Regulation ∆VOUT 15 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 70 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.1 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
ME6209A45
(VIN= VOUT+1.0V,CIN=CL=10uF,Ta=25OC, unless otherwise noted)
Parameter Symbol Conditions Min. Typ. Max. Units
VOUT(E) IOUT=40mA, VOUT (T)
Output Voltage X 0.98 X 1.02 V
(Note 2) VIN=VOUT+1V (Note 1)
VIN=VOUT+1V,
Load Regulation ∆VOUT 15 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 73 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.05 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
VIN=VOUT+1V,
Load Regulation ∆VOUT 15 40 mV
1mA≤IOUT≤60mA
Dropout Voltage
VDIF IOUT =40mA 75 mV
(Note 3)
Supply Current ISS VIN=VOUT+1V 3 5 μ A
∆VOUT IOUT =40mA
Line Regulations 0.05 0.2 %/V
∆VIN ×VOUT VOUT+1V ≤VIN≤18V
Note :
1. VOUT (T) :Specified Output Voltage
2.VOUT (E) :Effective Output Voltage ( ie. The output voltage when “VOUT (T)+ 1.0V”is provided at the Vin pin
while maintaining a certain IOUT value.)
3.VDIF:VIN1 –VOUT (E)’
VIN1 :The input voltage when VOUT(E)’ appears as input voltage is gradually decreased.
VOUT (E)’=A voltage equal to 98% of the output voltage whenever an amply stabilized IOUT and {VOUT (T)+
1.0V} is input.
Precautions
During the test, if AC/DC power supply and the ceramic chip capacitors collocation are used, there may be
serious voltage spike phenomenon instantaneously. When the power supply access to 16V, the voltage is
rushed to about 30V instantaneously. Because of exceeding the limit voltage of chip, the chip is damaged. If
you string a small resistance of 1 ohm in the input end during the test, the peak phenomenon can be
avoided.
In the test, there is serious burr phenomenon only when the AC/DC power is used with ceramic chip
capacitors. But electrolytic capacitors and tantalum capacitance won't appear above phenomenon. Please
be sure to pay attention to this point when you use AC/DC power.
In normal use, when any type of capacitor is used with battery or the supply of fire power, the above
phenomenon doesn’t occur.
4.2 5
4.5
Output Voltage(V)
4.1 4
Output Voltage(V)
4 3.5
3.9 3
2.5 Io=0mA
3.8 2
3.7 1.5
1 Io=40mA
3.6
0.5
3.5 0
0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Output Current(mA) Input Voltage(V)
(3) Quiescent Current VS. Input Voltage (4) Dropout Voltage VS. Output Current
3.5 600
Dropout Voltage(mV)
3 500
2.5 400
2
300
1.5
1 200
0.5 100
0 0
0 2 4 6 8 10 12 14 16 18 20 0 50 100 150 200 250 300
Input Voltage(V) Output Current(mA)
3.35
Output Voltage(V)
3.3
3.25
3.2
3.15
3.1
-45 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
Temperature(℃)
Packaging Information
Millimeters Inches
DIM
Min Max Min Max
d 0.2 - 0.0079 -
Millimeters Inches
DIM
Min Max Min Max
E - 4.25 - 0.1673
L1 0.4 - 0.0157 -
L2 0.8 - 0.0315 -
L 12 16 0.4724 0.6299