NARAYANA ENGINEERING COLLEGE::NELLORE

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Course Details
Class :Second Year, B. Tech Semester: I Year: 2020-21
Course Title :Digital Electronics & Logic Design Course Code :19A04304 Credits: 3
Program/Dept.:ECE & EEE Batch : 2019-23
Faculty: Mrs. G. Sindhura Bhargavi Regulation: R-19
SHORT ANSWER QUESTIONS & ANSWERS

UNIT – I
NUMBER SYSTEM, BOOLEAN ALGEBRA &
MINIMIZATION OF BOOLEAN FUNCTIONS
1. Convert(A0CB.EE)16 into decimal number
(A0CB.EE)16 = (A×163)+( 0×162)+ (C×161)+ (B×160)+ (E×16-1)+ (E×16-2)
= (10×163)+( 0×162)+ (12×161)+ (11×160)+ (14×16-1)+ (14×16-2)
= (10×4096)+(0)+ (12×16)+ (11×1)+ (14×(1/16))+ (14×(1/256))
= 40960+192+11+0.875+0.0546
= (41163.929)10
2. State De Morgan’s theorem
De Morgan suggested two theorems that form important part of Boolean algebra. They are,
1) The complement of a product is equal to the sum of the complements.
(AB)' = A' + B'
2) The complement of a sum term is equal to the product of the complements. (A + B)' = A'B'
3. Reduce A(A+B)
A(A + B) = AA + AB
= A(1 + B) [1 + B = 1]
= A.
4. If 1435+3415=X10, then X is__
1435+3415=4845
= (4×52)+(8×51)+(4×50)
=100+40+4
X10 =14410
X=144
5. Find the complement of the function F=A+BC and show that F.F’=0
F=A+BC
F’=(A+BC)’
 =A’.(BC)’
F’=A’.(B’+C’)
This is the complement of the function F=A+BC
F.F’= (A+BC). A’.(B’+C’)
=(A+BC).( A’B’+A’C’)
=AA’B’+AA’C+BCA’B’+BCA’C’ [SINCE A.A’=0]
=0
6. What is the BCD equivalent of 456
The BCD equivalent of 456 is
4 5 6
0100 0101 0110
456=( 010001010110)BCD
7. Convert the given expression in canonical SOP form Y = AC + AB + BC
Y = AC + AB + BC
=AC (B + B’) + AB (C + C’) + (A + A') BC
=ABC + ABC' + AB'C + AB'C' + ABC + ABC' + ABC
=ABC + ABC' +AB'C + AB'C' [A + A =1]
8. Draw the logic symbols of NAND and NOR gates

    
Figure NAND and NOR gate symbols and truth tables.
9. Show that (X + Y' + XY) (X + Y') (X'Y) = 0
(X + Y' + XY)(X + Y')(X'Y) = (X + Y' + X) (X + Y’) (X' Y) [A’ + AB = A’ + B]
= (X + Y’) (X + Y’) (X'Y) [A + A = 1]
= (X + Y’) (X'Y) [A.A = A]
= X.X' + Y'.X'.Y = 0 [A.A' = 0]
10. Perform the subtraction operation on 22-7 using 2’s complement form
22 = 10110
7 = 00111
7 = 11000 1’s complement of 7
 1
11001 2’s complement of 7
10110 add 22 to 2’s complement of 7
101111 neglect carry
22-7 = 15 = 01111

11. If 1435=X6 then X is

1435= (1×52)+ (1×51)+ (1×50)
= 25+20+3
= (48)10

1435= (120)6
12. What is the range of values that can be represented using n-bit 2’s complement form of
representation? What is the corresponding range with n-bit 1’s complement form?
The given number N in the base 2 having n digits. The 2’s complement of N is defined as follows.
2’s complement of N= + (2n-1- 1) to – (2n-1),
Where, n is number of digits.
The given number N in the base r= 2 having n digits. The (r-1)’s complement of
N is defined as follows.
1’s complement of N= + (2n-1- 1) to – (2n-1-1)
Where, N= given number or digit
13. Implement Y = A+BC using minimum number of two input NAND gate
Y = A+BC

=
14. Convert the (153.513)10to octal.
`Integer part:

Fractional part:
0.513 x 8 = 4.104 4
0.104 x 8 = 0.832 0
0.832 x 8 = 6.656 6
0.656 x 8 = 5.248 5
0.248 x 8 = 1.984 1
0.984 x 8 = 7.872 7 = (0.406517)8(approximate)
(153.513)10 = (231. 406517)8
15. Substract (1 1 1 0 0 1)2 from (1 0 1 0 1 1)2 using 2’s complement method.

000110 - 1’s Complement of (1 1 1 0 0 1)2

+00001
--------------
000111 - 2’s complement.
--------------
101011
+000111 - 2’s comp. of (1 1 1 0 0 1)2
---------------
110010 in 2’s complement form
---------------
To get the answer in true form , take the 2’s complement and assign negative
number to the answer.
Answer in true form - ( 0 0 1 1 1 0 )2
16. State the associative property of Boolean algebra.
A binary operator * on a set S is said to be associative whenever
(x*y)*z = x*(y*z) for all x, y, z ε S
17. State the commutative property of Boolean algebra.
A binary operator * on a set S is said to be commutative whenever x*y = y*x for all x, y ε S
18. State the distributive property of Boolean algebra.
The distributive property states that ANDing several variables and ORing the result with a single variable
is equivalent to ORing the single variable with each of the several variables and then ANDing the sums.
The distributive property is:
A+BC= (A+B) (A+C)
19. Define duality property.
Duality property states that, starting with a Boolean relation, you can derive another Boolean relation by
1. Changing each OR sign to an AND sign
2. Changing each AND sign to an OR sign
3. Complementing any 0 or 1 appearing in the expression
For Example: A+ A’= 1 is A. A’= 0
20. Mention the different type of binary codes?
The various types of binary codes are,
i. BCD code (Binary Coded decimal).
ii. Self-complementing code.
iii. The excess-3 (X’s-3) code.
iv. Gray code.
v. Binary weighted code.
vi. Alphanumeric code.
vii. The ASCII code.
viii. Extended binary-coded decimal interchange code (EBCDIC).
ix. Error-detecting and error-correcting code.
x. Hamming code.
21. Express F=A+B’C in sum of min-terms or SOP form
F = A+B’C
= A[B+B’] [C+C’] + B’C[A+A’]
= [A B+ A B’] [C+C’] + [AB’C+ A’B’C]
= [A B+ A B’] [C+C’] + [AB’C+ A’B’C]
= A BC+ A B’C+A BC’+ A B’C’ + AB’C+ A’B’C
= A BC+ A B’C+A BC’+ A B’C’ + A’B’C
F= ∑(1, 4, 5, 6, 7)

22. What is prime implicant? How do you obtain it

 A prime implicant is a product term obtained by combining the maximum possible number of adjacent
squares in the map.
The prime implicants of a function can be obtained from the map by combining all possible maximum
numbers of squares.
23. State the limitations of karnaugh map
i) Generally it is limited to six variable map (i.e) more then six variable involving expression are not
reduced.
ii) The map method is restricted in its capability since they are useful for simplifying only Boolean
expression represented in standard form

24. SOP of F(x,y,z) = ∑(2,3,6,7) is _____________

25. POS of F(x,y,z) = ∏(0,1,4,5) is _____________

F=y
26. Convert the expression f (A,B,C)= (A+B)(B+C)(A+C) in standard POS form
f(A,B,C)= (A+B)(B+C)(A+C)
= (A+B+C.C’)(B+C+A.A’)(A+C+B.B’)
= (A+B+C) (A+B+C’)(B+C+A) (B+C+A’)(A+C+B) (A+C+B’)
= (A+B+C) (A+B+C’) (A’+ B+C) (A+B’+C)
27. Write the advantages of tabulation method over K-map method
Advantages of tabular method over K-map method:
K-map can be used for solving up to 6 variables, beyond which it becomes very difficult. Whereas tabular method
can be used for solving large number of variables.
k-map is a manual method and mainly depends on the human intuition. On the other hand, the tabular method is
suitable for hand computation and has also been programmed on various machines.
28. Write the given Boolean expression F=A+B in sum of min-terms
= A[B+B’] + B[A+A’]
= AB+AB’+ BA+BA’
= AB+AB’+BA’=∑(1, 2, 3)
29. Simplify (A’B+A’+AB)’
= (A’B)’. (A’)’. (AB)’
= (A+B’). (A). (A’+B’)
= (AA+AB’) . (A’+B’)
= (A+AB’). (A’+B’)
= AA’+AB’+ AA’B’+AB’B’
= AB’+AB’
= AB’
30. What are don’t care conditions? What is the use of these?
Functions that have unspecified output for some input combinations are called incompletely specified functions.
Unspecified minterms of a functions are called don’t care conditions. We simply don’t care whether the value of
0 or 1 is assigned to F for a particular minterm. For this reason, it is customary to call the unspecified minterms of
a function don’t care conditions. These don’t care conditions can be used on a map to provide further
simplifications of Boolean expressions.
31. What are the methods adopted to reduce Boolean function?
i) Karnaugh map
ii) Tabular method or Quine Mc-Cluskey method
iii) Variable entered map technique.
32. Simplify the following Boolean function by Karnaugh map method:
F (A, B, C, D) = Σm (1, 5, 9, 12, 13, 15)

33. Why we go in for tabulation method?

This method can be applied to problems with many variables and has theadvantage of being suitable for machine
computation.
34. Simplify the following expression into sum of products using Karnaugh map
F(A,B,C,D) = ∑(1,3,4,5,6,7,9,12,13)
Simplification of the following expression into sum of products using KarnaughMap:
F(A,B,C,D) = S (1,3,4,5,6,7,9,12,13)
Karnaugh Map for the expression F(A,B,C,D) = S (1,3,4,5,6,7,9,12,13)is shown in Fig. The grouping of cells is
also shown in the Figure.

The equations for (1) is A’B; (2) is C’D; (3) is A’D; (4) is BC’
Hence, the Simplified Expression for the above Karnaugh map is
F(A,B,C,D) = A’B+C’D+ A’D+BC’
= A’(B + D) +C’( B + D)
35. Prove the following equation using the Boolean algebraic theorems A + A’.B + A .B’= A + B
Given equation is A + A’.B + A. B’= A + B
L.H.S. = A + A’.B + A. B’
= (A + A. B’) + A’.B
= A (1+ B’) + A’.B
= A + A’.B ( 1+ B’=1)
= (A + A’) (A + B)
= (A + B) (A + A’ = 1)
= R.H.S
Hence Proved
36. Write the expression for Boolean functionF (A, B, C) = ∑m (1,4,5,6,7) in standard POS form.
f(A,B,C)= ∑M(1,4,5,6,7) in standard POS form
F = m1 + m4 + m5 + m6 + m7
F = ∑m(1,4,5,6,7)
= Π M(0,2,3)
 = M0 M2 M3
= (A+B+C)(A+B’ +C)(A+B’ +C’ )
37. Convert the given expression in canonical SOP form Y = AC + AB + BC
Y = AC + AB + BC
= AC (B + B’) + AB (C + C’) + (A + A') BC
= ABC + ABC' + AB'C + AB'C' + ABC + ABC' + ABC
= ABC + ABC' +AB'C + AB'C' [A + A =1]
= m7 + m6 +m5 +m4
= Σm (4, 5, 6, 7)
38. Write the maxterms corresponding to the logical expression
Y = (A + B + C’) (A + B' + C') (A' + B' + C)
= (A + B + C’) (A + B' + C') (A' + B' + C)
=M1.M3.M6
= ∏M (1, 3, 6)
39. Reduce A'B'C' + A'BC' + A'BC
A'B'C' + A'BC' + A'BC
= A'C'(B' + B) + A'B'C
= A'C' + A'BC [A + A' = 1]
= A'(C' + BC)
= A'(C' + B) [A + A'B = A + B]
40. Reduce AB + (AC)' + AB’C (AB + C)
AB + (AC)' + AB’C (AB + C)
= AB + (AC)' + AAB'BC + AB'CC
= AB + (AC)' + AB'CC [A.A' = 0]
= AB + (AC)' + AB'C [A.A = 1]
= AB + A' + C' =AB'C [(AB)' = A' + B']
= A' + B + C' + AB'C [A + AB' = A + B]
= A' + B'C + B + C' [A + A'B = A + B]
= A' + B + C' + B'C
= A' + B + C' + B'
= A' + C' + 1
=1
UNIT – II
COMBINATIONAL & EQUENTIAL LOGIC CIRCUITS
1. What is encoder
An encoder is a digital circuit that performs the inverse operation of a decoder. An encoder has 2 n and n output
lines. The output lines generate the binary code corresponding to the input value.
2. Define combinational logic
When logic gates are connected together to produce a specified output for certain specified combinations of input
variables, with no storage involved, the resulting circuit is called combinational logic.
3. What is priority encoder
A priority encoder is an encoder circuit that includes the priority function. The operation of priority encoder is
such that if two or more inputs are equal to 1 at the same time, the input having the highest priority will take
precedence.
4. Draw the block diagram of 1X4 de multiplexer

5. What is a Decoder.
A decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2 n
unique output lines. If the n-bit coded information has unused combinations, the decoder may have fewer than 2 n
outputs.
6. Define multiplexer.
Multiplexer is a digital switch. It allows digital information from several sources to be routed onto a single output
line.
7. Give the general procedure for converting a Boolean expression in to multilevel NAND diagram?
 Draw the AND-OR diagram of the Boolean expression.
 Convert all AND gates to NAND gates with AND-invert graphic symbols.
 Convert all OR gates to NAND gates with invert-OR graphic symbols.
 Check all the bubbles in the same diagram. For every bubble that is not compensated by another circle along the
same line, insert an inverter or complement the input literal.

8. Define magnitude comparator?

A magnitude comparator is a combinational circuit that compares two numbers, A and B,
and determines their relative magnitudes. The outcome of the comparison is specified by
three binary variables that indicate whether a>b, A = b, or A < B.
9. Design a 4 bit parallel adder using full adders
10. Draw the block diagram of 2X4 decoder with enable

11. Implement AND gate using only two input NOR gates

AND gate using only two input NOR gates

Truth table
12. Implement OR gate using only two input NAND gates
 OR gate using only two input NAND gates

Truth table
13. Draw the logic diagram of a half-adder.

14. Draw the circuit of a full-adder.

15. List out the applications of comparators?

The following are the applications of comparator
 Comparators are used as a part of the address decoding circuitry in computers to select a specific
input/output device for the storage of data.
 They are used to actuate circuitry to drive the physical variable towards the reference value.
 They are used in control applications.
16. Draw the circuit of a full-subtractor.
17. Implement the logic function f= Σm (0, 2, 3, 6) using a decoder

18. How can a decoder be converted into a demultiplexer? (Nov, 2005)

Decoder is a circuit which converts one form of code into another. Demultiplexer is a circuit which converts one
input to many outputs. If the enable line E is taken as a data input line A and B are taken as selection lines, then it
is a demultiplexer.
19. Design 8: 1 multiplexer using two 4:1 multiplexers

20. Draw the block diagram of 2-to-1 line multiplexer

21. Define Flip Flop. List different types of flip flops.
A storage elements(memory) used in clocked sequential circuits are called flip flops. A Flip - flop is a binary
storage device capable of storing one bit of information. In a stable state, the output of a flip flop is either 0 or 1.
Types of flip flops: S-R flip-flop, D- flip-flop, T- flip-flop, J-K flip-flop
22. Define race around condition
In the JK latch, the output is feedback to the input, and therefore changes in the output results change in the input.
Due to this in the positive half of the clock pulse if J and K are both high then output toggles continuously. This
condition is known as race around condition
23. What is edge-triggered flip-flop?
The problem of race around condition can solved by edge triggering flip flop. The term edge triggering means
that the flip-flop changes state either at the positive edge or negative edge of the clock pulse and it is sensitive to
its inputs only at this transition of the clock.
24. What is a master-slave flip-flop?
A master-slave flip-flop consists of two flip-flops where one circuit serves as a master and the other as a slave.
25. What is state table?
A table, which consists time sequence of inputs, outputs and flip-flop states, is called state table.
Generally it consists of three section present state, next state and output.
26. Draw the logic circuits of Flip Flop and truth table using NOR gates
Unclocked S-R Flip-Flop Using NOR Gate

clocked S-R Flip-Flop Using NOR Gate

27. Draw the logic circuit of Flip Flop and truth table using NAND gates
Unclocked S-R Flip-Flop Using NAND Gate

clocked S-R Flip-Flop Using NAND Gate

UNIT – III
SEQUENTIAL LOGIC CIRCUITS-2
1. Draw the circuit of ring counter

2. What are the difference between synchronous and asynchronous sequential circuits
3. Where the ripple counter is used
Ripple counter is used in frequency division circuits
It is used in decade counters
4. What do you mean by present state?
The information stored in the memory elements at any given time defines the present state of the sequential
circuit.
5. What do you mean by next state?
The present state and the external inputs determine the outputs and the next state of the sequential circuit.
6. Explain the flip-flop excitation tables for D flip-flop
In D flip-flop the next state is always equal to the D input and it is independent of the present state. Therefore D
must be 0 if Qn+1 has to 0, and if Qn+1 has to be 1 regardless the value of Qn.
7. Explain the flip-flop excitation tables for T flip-flop
When input T=1 the state of the flip-flop is complemented; when T=0, the state of the Flip-flop remains
unchanged.

8. What is a hazard?
Hazards are unwanted switching transients that may appear at the output of a circuit because different paths
exhibit different propagation delays.
9. What is a register?
Memory elements capable of storing one binary word. It consists of group of flip-flops, which store the binary
information.
10. Write the difference between latch and Flip Flop
Latch is a sequential device that checks all of its inputs continuously and changes its outputs according to any
time, independent of a clocking signal.
Flip-flop is a sequential device that samples its inputs and changes its outputs only at times determined by
clocking signal.
11. What are the applications of shift registers?
1. A serial-in-serial-out shift register can be used to introduce time delay in digital signals.
2. A serial-in-parallel-out shift register can be used to convert data in the serial form to the parallel
form.
3. A parallel-in-serial-out shift register can be used to convert data in the parallel form to the serial
form.
4. A shift register can also be used as a counter.
12. What is the difference between synchronous and asynchronous counter?

13. What are the difference between combinational and sequential logic circuits?

14. Define synchronous sequential circuit and an asynchronous sequential circuit.

Synchronous sequential circuit: It is a system whose behaviour can be defined from the knowledge of
its signals at discrete instants of time.
ASynchronous sequential circuit: It is a system whose behaviour depends upon the input signals at
any instant of time and the order in which the input changes. The storage elements commonly used in
asynchronous sequential circuits are time delay devices.
 UNIT – IV
MEMORY AND PROGRAMMABLE LOGIC

1. Give the comparison between PLA and PAL

2. What is FPGA
Field Programmable means that the FPGA's function is defined by a user's program rather than by the
manufacturer of the device. 
A typical integrated circuit performs a particular function defined at the time of manufacture.  In contrast, the
FPGA's function is defined by a program written by someone other than the device manufacturer.
3. List out list of PLD’s
Types of Programmable Logic Devices
SPLDs (Simple Programmable Logic Devices)
a. ROM (Read-Only Memory)
b. PLA (Programmable Logic Array)
c. PAL (Programmable Array Logic)
d. GAL (Generic Array Logic)
CPLD (Complex Programmable Logic Device)
FPGA (Field-Programmable Gate Array)
4. Compare PROM,PLA & PAL
5. Write the difference between RAM & ROM
RAM ROM
Read-only memory or ROM is
Random Access Memory or RAM is also a form of data storage that
a form of data storage that can be cannot be easily altered or
accessed randomly at any time, in reprogrammed. Stores instructions
Definition any order and from any physical that are not necessary for re-
location., allowing quick access and booting up to make the computer
manipulation. operate when it is switched off.
They are hardwired.
RAM allows the computer to read ROM stores the program required
Use data quickly to run applications. It to initially boot the computer. It
allows reading and writing. only allows reading.
ROM is non-volatile i.e. its
RAM is volatile i.e. its contents are
Volatility lost when the device is powered off.
contents are retained even when
the device is powered off.
The two main types of RAM are The types of ROM include
Types static RAM and dynamic RAM. PROM, EPROM and EEPROM.

6. What is the function of EAROM

EAROM stands for Electrically Alterable Read Only Memory. The function of EAROM is similar to other
memory devices such as ROM, PROM & EPROM i.e., it stores the data. However, the data stored in EAROM
may be altered electrically by giving suitable control signals.
7. Mention few applications of PAL
PAL is used to design digital circuits having several variables function
It is widely used in VLSI circuits and systems
8. A PLA is similar to ROM in concept? Yes or No? How? Why?
In some cases the number of don’t care conditions is excessive, it is more economical to use a second type of LSI
component called a PLA. A PLA is similar to a ROM in concept; however it does not provide full decoding of the
variables and does not generates all the min terms as in the ROM.
9. Define address and word
Address: The location of a unit of data in a memory is called address.
 Word: A complete unit of information is called a word which consists of one or more bytes.
10. Why RAMs are called as Volatile?
RAMs are called as Volatile memories because RAMs lose stored data when the power is turned OFF
11. Give the feature of flash memory.
The ideal memory has high storage capacity, non-volatility; in-system read and writes capability, comparatively
fast operation. The traditional memory technologies such as ROM, PROM, EEPROM individually exhibits one of
these characteristics, but no single technology has all of them except the flash memory.
12. What are Flash memories?
They are high density read/write memories that are non-volatile, which means data can be stored indefinitely
without power.
13. Define Static RAM and dynamic RAM.
Static RAM use flip flops as storage elements and therefore store data indefinitely as long as dc power is applied.
Dynamic RAMs use capacitors as storage elements and cannot retain data very long without capacitors being
recharged by a process called refreshing.
14. Explain EPROM.
EPROM (Erasable Programmable Read Only Memory) EPROM use MOS circuitry. They store 1’s and 0’s as a
packet of charge in a buried layer of the IC chip. We can erase the stored data in the EPROMs by exposing the
chip to ultraviolet light via its quartz window for 15 to 20 minutes. It is not possible to erase selective
information. The chip can be reprogrammed.
15. Explain EEPROM.
EEPROM (Electrically Erasable Programmable Read Only Memory). EEPROM also use MOS circuitry. Data is
stored as charge or no charge on an insulated layer or an insulated floating gate in the device. EEPROM allows
selective erasing at the register level rather than erasing all the information since the information can be changed
by using electrical signals.
16. Explain ROM.
A read only memory (ROM) is a device that includes both the decoder and the OR gates within a single IC
package. It consists of n input lines and m output lines. Each bit Combination of the input variables is called an
address. Each bit combination that comes out of the output lines is called a word. The number of distinct
addresses possible with n input variables is 2n.
17. What is programmable logic array?
How it differs from ROM? In some cases the number of don’t care conditions is excessive, it is more
economical to use a second type of LSI component called a PLA A PLA is similar to a ROM in
concept; however it does not provide full decoding of the variables and does not generates all the
minterms as in the ROM.
18. Why the input variables to a PAL are buffered
 The input variables to a PAL are buffered to prevent loading by the large number of AND gate inputs to which
available or its complement can be connected.
19. Explain PROM.
PROM (Programmable Read Only Memory) it allows user to store data or program. PROMs use the fuses with
material like nichrome and polycrystalline. The user can blow these fuses by passing around 20 to 50 mA of
current for the period 5 to 20μs.The blowing of fuses is called programming of ROM. The PROMs are one time
programmable. Once programmed, the information is stored permanent.
20. Define PLD.
Programmable Logic Devices consist of a large array of AND gates and OR gates that Can be programmed to
achieve specific logic functions.
21. List different types of ROM.
Different types of Read Only Memory(ROM)
Programmable Read Only Memory(PROM)
Erasable Programmable Read Only Memory(EPROM)
Electrically Erasable Programmable Read Only Memory(EEPROM)

UNIT – V (DIGITAL LOGIC FAMILIES & CMOS)

1.Classify the logic family by operation?

The Bipolar logic family is classified into
Saturated logic
Unsaturated logic.
The RTL, DTL, TTL, I2L, HTL logic comes under the saturated logic family. The Schottky TTL, and ECL logic
comes under the unsaturated logic family.
2. State the classifications of FET devices.
FET is classified as
1. Junction Field Effect Transistor (JFET)
2. Metal oxide semiconductor family (MOS).
3. Mention the classification of saturated bipolar logic families.
The bipolar logic family is classified as follows: RTL- Resistor Transistor Logic
DTL- Diode Transistor logic I2L- Integrated Injection Logic TTL- Transistor Transistor Logic ECL- Emitter
Coupled Logic
4.Mention the different IC packages?
DIP- Dual in line package
LCC- Leadless Chip Carrier
PLCC- Plastic Leaded Chip carrier PQFP- Plastic Quad Flat Pack PGA- Pin Grid Array
5. Mention the important characteristics of digital IC’s?
Fan out
Power dissipation Propagation Delay Noise Margin
Fan In
Operating temperature
Power supply requirements
6. Define Fan-out?
Fan out specifies the number of standard loads that the output of the gate can drive with out impairment of its
normal operation.
7. Define power dissipation?
Power dissipation is measure of power consumed by the gate when fully driven by all its inputs.
8. What is propagation delay?
Propagation delay is the average transition delay time for the signal to propagate from input to output when the
signals change in value. It is expressed in ns.
9. Define noise margin?
It is the maximum noise voltage added to an input signal of a digital circuit that does not cause an undesirable
change in the circuit output. It is expressed in volts.

10. Define fan in?

Fan in is the number of inputs connected to the gate without any degradation in thevoltage level.
11. What is Operating temperature?
All the gates or semiconductor devices are temperature sensitive in nature. The temperature in which the
performance of the IC is effective is called as operating temperature. Operating temperature of the IC vary from
00 C to 700 c.
12. What is High Threshold Logic?
Some digital circuits operate in environments, which produce very high noise signals. For operation in such
surroundings there is available a type of DTL gate which possesses a high threshold to noise immunity. This type
of gate is called HTL logic or High Threshold Logic.
13. What are the types of TTL logic?
1. Open collector output
2. Totem-Pole Output
3. Tri-state output.
14. What is depletion mode operation MOS?
If the channel is initially doped lightly with p-type impurity a conducting channel exists at zero gate voltage and
the device is said to operate in depletion mode.
15. What is enhancement mode operation of MOS?
If the region beneath the gate is left initially uncharged the gate field must induce achannel before current can
flow. Thus the gate voltage enhances the channel current and such a device is said to operate in the enhancement
mode.
16. Mention the characteristics of MOS transistor?
1. The n- channel MOS conducts when its gate- to- source voltage is positive.
2. The p- channel MOS conducts when its gate- to- source voltage is negative
3. Either type of device is turned of if its gate- to- source voltage is zero.
17. How schottky transistors are formed and state its use?
A schottky diode is formed by the combination of metal and semiconductor. The presence of schottky diode
between the base and the collector prevents the transistor from going into saturation. The resulting transistor is
called as schottky transistor.
The use of schottky transistor in TTL decreases the propagation delay without a sacrifice of power dissipation.
18. List the different versions of TTL
1.TTL (Std.TTL) 2.LTTL (Low Power TTL) 3.HTTL (High Speed TTL) 4.STTL (Schottky
TTL) 5.LSTTL (Low power Schottky TTL)
19. Why totem pole outputs cannot be connected together.
Totem pole outputs cannot be connected together because such a connection might produce excessive current and
may result in damage to the devices.
20. State advantages and disadvantages of TTL
Adv:
Easily compatible with other ICs
Low output impedance
Disadv:
Wired output capability is possible only with tristate and open collector types
Special circuits in Circuit layout and system design are required.
21. When does the noise margin allow digital circuits to function properly.
When noise voltages are within the limits of VNA(High State Noise Margin) and
VNK for a particular logic family.
22. What happens to output when a tristate circuit is selected for high impedance.
Output is disconnected from rest of the circuits by internal circuitry.
23. What is 14000 series.
It is the oldest and standard CMOS family. The devices are not pin compatible or electrically compatible with any
TTL Series.