COLUMBAN COLLEGE COUEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS ENGINEERING RESEARCH Work # S COMBIMATIOWAL LOGIC CIRCUITS SUBMITTED BY OME Cue: Minek een A REYES pecemeee ¢ 2021 Boer 3 SUBMITTED TO > DATE SuBMITTED ©MARK JERREL A. REYES COMBINATIONAL Logic CIRCUITS ARE ONLY DETERMINED BY THE Logi CAL FUNCTION OF THEIR CURRENT INPUT STATE, LEE “0” oR Logie "17, AT ARY Given) HoSTART IB TIME: WE REGULT 16 THAT COMBINATIONAL Loge ciRouITE HAVE NO FEEDBACK, AND AMY CHANGES TO THE SIGNALS BEING APPLIED qo tHeI® PUTS WIL IMME DIATELY BAUE AN EFFECT AT THE OUTPUT. IY OTHER WORDS, ID A COMBIVATIONAL Loale ciecuIT aE OUTPUT 1S DEPERDANT AT ALL TIMES OW THE ComBINATION of HS WWPUTE. THE A COMBINATIOVAL CIRCUIT 1S MEMORY LEGS. (60 IF ONE OF TIS INPUTS CONDITION CHADEES TATE, FROM 0-1 0% 1-0, 60 ToO WILL THE RESULTING OUTPUT AC BY DEFAULT COMBIDATIONAL LOGIE CIRCUITS HAVE NO MEMORY’, “TIMIRG™ OR " REEOBACK LOOPS’ WITHIN THEIR Des! at COMBINATION AL LOG: so COMBINATIONAL — |— x saaurtere owe oF MORE, sets) Ce ourpurs, wele aireut | —m ¥ oc oureut « f Civ)MaRK JERREL A. Retes COMBINATION AL Loale CIRCUIRS ARE MADE UP FROM BASIC LOGIC WAKE. NOR OR WOT GATES THAT ARE " COMBINED” oR CORPECTED TOGETHER TO PRODUCE MORE COMPLICATED wwITcHIPer clecultc. THESE Logic GATES ARE THE BUILDING BLOCEC OF COMBINATIOVAL Wale clcurre AY EXAMPLE OF A ComaINATIONAL CIRCUIT IS D DECODER. WHICH CONVERTE THE BINARY CODE DATA PRESENT AT Me WWPUT INO A KOUMBER OF DIFFERENT OUTPUT LIVES, ODE ATOR TWKe PRODUCING AL EQUIVALENT DecIMAL CODE AT IIS ouput COMBIVATIOVAL LOGIE CIRCUITS CAD Be VERN SIMPLE OR VERY COMPLICATED AND ALY COMBIDATIONAL cIROUT CAN BE IMPLEMENTED WITH ONLY NALD APD NOR GATES AC THe DRE CLACGED AG " UNIVERCAL” GATES. We THREE MAIN WAHE OF SPECIFYING TH FURCTION OF A COMBIPATIONAL LOGIE CIRCUIT ARE! |. BOOLEAN ALGEBRA - THIS FORME THE MGeeRAIC EXPREKS ION GHOWIDG THE OPERATION OF THE Louie CIRCAIT FOR GACH INPUT VARIABLE EITHER TRUE OF FALSE THAT RecULTS IDR Wale “1” oureur.Mark UeRREL AL REYES teurt tase - A TRUTH TABS DeFIDES THE FUBCTION OF A aL EME BY PROVIDIDE A coNe\6s UST THAT Hous AL THE OUTPUT GTATES DO TABULAR FORM FOR EACH POCCIBLE COMBINATION OF INPUT VARIABLE TWAT THE GATE COULD ERCOUNTER, LOGIE INGRAM THIS 6 A GRAPHICAL REPREGeN) TATION OF A LOGIC CIRCUIT THAT Cage’ + Awe) CID = ABC! | pete ELIMIIOATION A GROUP OF TWO ADIACEKT WL Give 3 VARIABLES TERA Ct.) A'B'C) 3. APER ELIMINATION & GRoup OF FOUR ADJACENT WILL GIVE 2 VARIABLE TERM CoG, c'D). 4. MPTeR ELIMINATION A GROUP OF E1EnT ADUACEKT Kec ww ewe 1 UARABLE C6, ©. @rour 1 A'B'c’D' 4 MB icD! = A'B'D @moup 22 88 'c'D' 1 he'cip 4 ABCD! + A'BC'D! 7 B'e'D 4 BD’ + ep! @Rour 5 = AB'c'D' + AB'c’D' = AB’C’ We Have FOUND 2 MINMIZED MIDTERM OF CUR FUNCTION. oN Ble’ + pty + eB’ Br. coperRucT Ware DIAGRAM OF We FOLOWIDE FUNCTION UCIDG YOR AND AND GATES ODLY Fs pete’ + AB ‘co’ + Ae'c'D t A'BC'DMARK JERREL A REteS Lunn = COD DCA-B' + BAD + Cc'D)CA-B + B.A’) Fe COD'CA@B) + C’D)CA®B) Fe Cop's epyCa © 8) r+ CC® D)L AGS) OMBIVATIONAL CIRCUIT PROBLEME - SOLUTION - Loaic. Dinéeam -F = CCOD)C HO B)